Method for manufacturing wafer having spacing means

By bonding SOI wafers to functional wafers and partially removing carrier wafers and silicon dioxide layers to form spacer holding parts, the problem of mechanical damage to sensitive surfaces in wafer manufacturing is solved, achieving effective protection and flexible processing of MEMS structures.

CN122122098APending Publication Date: 2026-05-29ROBERT BOSCH GMBH
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Patent Information

Application Number
CN202480069574.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-11-03
Filing Date
2024-09-17
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Existing technologies struggle to effectively protect sensitive surfaces from mechanical damage during wafer manufacturing, especially in the fabrication of MEMS structures, where structured chuck methods have limitations.

Method used

The bonding method of SOI wafer and functional wafer is adopted. The spacer is formed by partially removing the carrier wafer and silicon dioxide layer to protect the surface to be protected. The passivation layer is used to prevent mechanical damage during subsequent processing. The height and shape of the spacer are precisely controlled by combining etching and chemical mechanical polishing technology.

Benefits of technology

It achieves effective protection of sensitive surfaces during wafer manufacturing, avoids mechanical damage, ensures smooth subsequent processing, and can flexibly adapt to the specific needs of the manufacturing process, making it suitable for the processing of MEMS structures.

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Abstract

The invention relates to a method for producing a wafer (100) having a spacer (150) for protecting a surface (110) to be protected, comprising providing a coupled wafer (101) comprising an SOI wafer (140) and a functional wafer (120) connected thereto, the SOI wafer (140) comprises a carrier wafer (146), a functional layer (142) having a first structure (143a, 143b), and a silicon dioxide layer (144) arranged between the carrier wafer (146) and the functional layer (142), and the functional wafer (120) has a second structure (120a, 120b); and creating (340) the spacer (150) by locally removing the carrier wafer (146) and the silicon dioxide layer (144), thereby exposing the surface (110) to be protected.
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