MicroLED structures and microLED panels

Abstract

A full-color microLED structure is disclosed. The microLED structure comprises an IC backplane, at least three mesa structures stacked along a vertical axis, and a final conductive layer formed on top of the at least three mesa structures. The layer may have notches for accommodating vias so that the structure can have a small footprint. Multiple microLED structures can be arranged in an array by connecting their final conductive layers and forming trenches between adjacent microLED structures.

Description

Technical Field

[0001] The present disclosure generally relates to micro light-emitting diode (LED) technology, and more particularly to micro-LED structures and full-color micro-LED panels using micro-LED structures.

Background Art

[0002] Inorganic micro light-emitting diodes are also referred to as "micro-LEDs". They are becoming increasingly important as they are used in a variety of applications including, for example, self-emitting microdisplays, visible light communication, and optogenetics. Micro-LEDs have higher output performance than conventional LEDs due to, for example, better strain relaxation, improved light extraction efficiency, and uniform current spreading. Furthermore, compared to conventional LEDs, micro-LEDs have improved thermal effects, improved operation at higher current densities, better response speeds, higher operating temperature ranges, higher resolutions, higher color gamuts, higher contrasts, lower power consumption, etc.

[0003] Micro-LED panels are manufactured by integrating an array of thousands or millions of micro-LEDs with a driver circuit backplane. Each pixel of a micro-LED panel is formed by one or more micro-LEDs. A micro-LED panel can be a single-color or multi-color panel. In particular, in the case of a full-color LED panel, each pixel can further include a plurality of sub-pixels each formed by a plurality of micro-LEDs each corresponding to a different color. For example, three micro-LEDs corresponding to red, green, and blue respectively may be overlapped to form one pixel. Different colors can be mixed to create a wide range of colors.

[0004] However, existing micro-LED technology faces several challenges. For example, one challenge is reducing pixel size so that more pixels can fit within the same display area. In the case of full-color micro-LEDs, the pixel size is further determined by the size of the subpixels, as well as how they are arranged in space. Therefore, it is desirable to develop a micro-LED structure that can efficiently arrange subpixels within a pixel. [Overview of the Initiative]

[0005] This disclosure provides a micro-LED structure that addresses the aforementioned conventional problems in the relevant technical field. In particular, the disclosed micro-LED structure integrates three vertically stacked micro-LEDs by arranging them in different layers of the micro-LED structure and electrically connecting them to an integrated circuit (IC) back panel. The micro-LED structure effectively improves the light illumination efficiency within a single pixel area while simultaneously improving the resolution of the micro-LED panel.

[0006] Furthermore, the disclosed micro-LED structure further improves light illumination efficiency by including a reflective layer that not only effectively increases the amount of light emitted by each of the vertically stacked micro-LEDs but also reduces crosstalk between the vertically stacked micro-LEDs.

[0007] In accordance with the disclosed embodiments, a plurality of disclosed microLED structures can be arranged in a microLED array to form a microLED panel. Each of the plurality of microLED structures corresponds to a pixel of the disclosed microLED structure, and the plurality of vertically stacked microLEDs within a pixel each corresponds to a plurality of subpixels.

[0008] In accordance with the disclosed embodiments, each layer of the disclosed micro-LED structure may have other simple shapes, including one or more notches as needed to allow via passage. This arrangement can reduce the footprint of the micro-LED structure and thus result in a higher resolution LED panel.

[0009] In some embodiments, the disclosed microLED structure comprises an IC backplane, at least three mesa structures stacked along a vertical axis, and a final conductive layer formed on top of the at least three mesa structures.

[0010] In some embodiments, the mesa structure comprises at least three mesa structures: a first mesa structure formed on the IC backplane, a second mesa structure formed on the first mesa structure, and a third mesa structure formed on the second mesa structure.

[0011] In some embodiments, a dielectric layer may be present between two adjacent mesa structures. The dielectric layer can bond the two adjacent mesa structures to each other. The dielectric layer may be made of silicon dioxide (SiO2), silicon mononitride (SiN), silicon oxynitride (SiON), silicon carbon nitride (SiCN), titanium dioxide (TiO2), or aluminum oxide (Al2O3).

[0012] In some embodiments, each of the three mesa structures comprises, in order from the bottom, a bottom conductive layer, an emissive layer, and an optional top conductive layer. Each of these layers may have a notch. The top and bottom conductive layers may be films made of transparent conductive oxides (TCOs), such as indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), antimond-doped tin oxide (ATO), or fluorine-doped tin oxide (FTO).

[0013] In some embodiments, the upper surface of each light-emitting layer may have a top contact that electrically connects the respective light-emitting layer to the final conductive layer. The top contact may be an N-type contact or a P-type contact.

[0014] In some embodiments, the top contact may be located on top of the light-emitting layer. In some embodiments, the top contact may be located on top of the upper conductive layer. In some embodiments, the top contact may be located at the bottom of the upper conductive layer.

[0015] In some embodiments, the second and third mesa structures may each optionally have an upper conductive layer.

[0016] In some embodiments, the bottom conductive layer of the first mesa structure may be electrically connected to the IC backplane via pads. The bottom conductive layers of the second and third mesa structures may each be electrically connected to the IC backplane via pads.

[0017] In some embodiments, the conductive layer may have a first conductivity type, and the second and third semiconductor layers may have a second conductivity type.

[0018] In some embodiments, each of the light-emitting layers comprises a P-type semiconductor layer, an N-type semiconductor layer, and a quantum well layer between the P-type and N-type semiconductor layers. For example, each of the light-emitting layers may have a P-type semiconductor layer at the bottom and an N-type semiconductor layer at the top, thereby forming a PN junction. Alternatively, each of the light-emitting layers may have an N-type semiconductor layer at the bottom and a P-type semiconductor layer at the top, thereby forming an NP junction.

[0019] In some embodiments, adjacent micro-LED structures within an LED panel may have their final conductive layers connected to form a trench. The formed trench is located between adjacent micro-LED structures, and its bottom surface may be lower than, or at least the same height as, the top surface of the first light-emitting layer. [Brief explanation of the drawing]

[0020] [Figure 1] This is a plan view of a micro-LED structure according to some embodiments of the present disclosure. [Figure 2A] These are cross-sectional views of the micro-LED structure of Figure 1 in different cross-sections according to several embodiments of the present disclosure. [Figure 2B] These are cross-sectional views of the micro-LED structure of Figure 1 in different cross-sections according to several embodiments of the present disclosure. [Figure 2C] These are cross-sectional views of the micro-LED structure of Figure 1 in different cross-sections according to several embodiments of the present disclosure. [Figure 3] This is a cross-sectional view of an exemplary microLED panel according to some embodiments of the present disclosure. [Modes for carrying out the invention]

[0021] Herein, exemplary embodiments are referenced in detail to provide a further understanding of this disclosure. The specific embodiments described and the accompanying drawings are merely illustrative of specific ways of creating and using this disclosure and do not limit the scope of this disclosure or the accompanying claims.

[0022] Figure 1 is a plan view of a micro-LED structure 10 according to several embodiments of the present disclosure. Figures 2A to 2C are cross-sectional views of the micro-LED structure 10 along lines 10A to 10A', 10B to 10B', and 10C to 10C' in Figure 1, respectively.

[0023] Specifically, FIG. 2A is a cross-sectional view of the micro-LED structure 10 along line 10A - 10A' of FIG. 1 according to some embodiments of the present disclosure. As shown in FIG. 2A, the micro-LED structure 10 includes an IC backplane 500 having at least three pads 510, 520, 530 (530 is not shown in FIG. 2A but is shown in FIG. 1) and at least three mesa structures 100, 200, 300 stacked along a vertical axis. In some embodiments, the at least three mesa structures include a first mesa structure 100 formed on the IC backplane 500 from bottom to top, a second mesa structure 200 formed on the first mesa structure 100, and a third mesa structure 300 formed on the second mesa structure 200. In some embodiments, a first dielectric layer 410 may be formed between the first mesa structure 100 and the second mesa structure 200. A second dielectric layer 420 may be formed between the second mesa structure 200 and the third mesa structure 300.

[0024] In some embodiments, each of the at least three mesa structures can include a bottom conductive layer, a light-emitting layer, and an optional top conductive layer from bottom to top. Each layer may have a substantially regular shape (e.g., circular, rectangular with rounded corners or without rounded corners) with other methods of having cutouts. For example, the first mesa structure 100 includes a first light-emitting layer 110 having a first cutout 112, a first bottom conductive layer 120 having a first cutout (not shown), and a first top conductive layer 130 having a first cutout (not shown). The second mesa structure includes a second light-emitting layer 210 having a first cutout 212, a second cutout 214, and a third cutout 216, and a second bottom conductive layer 220 having a first cutout 222 and a second cutout 226. The third mesa structure 300 includes a third light-emitting layer 310 and a third bottom conductive layer 320 having a first cutout 322. In some embodiments, the final conductive layer 430 covers all of the at least three mesa structures.

[0025] In some embodiments, the upper surface of each light-emitting layer can have a top contact that electrically connects each light-emitting layer to the final conductive layer 430. The top contact can be an N-type contact or a P-type contact.

[0026] In some embodiments, the top contact may be disposed on top of the light-emitting layer. For example, the top contact 340 is disposed on top of the third light-emitting layer 300 and connects the upper surface of the third light-emitting layer 300 to the final conductive layer 430, and the top contact 240 (as shown in FIG. 2B) is disposed on top of the second light-emitting layer 200 and connects the upper surface of the second light-emitting layer 200 to the final conductive layer 430.

[0027] In some embodiments, the top contact may be disposed on top of the upper conductive layer. For example, as shown in FIG. 2C, the top contact 140 is disposed on top of the first upper conductive layer 130 and connects the upper surface of the first light-emitting layer 100 to the final conductive layer 430.

[0028] In some embodiments, at least three pads are each connected to a conductive layer. For example, the first pad 510 of at least three pads of the IC backplane 500 is electrically connected to the first bottom conductive layer 120, the second pad 520 of at least three pads of the IC backplane 500 is electrically connected to the second bottom conductive layer 220 via the first via, and the third pad 530 of at least three pads of the IC backplane 500 is electrically connected to the third bottom conductive layer via the second via 700.

[0029] In some embodiments, the first bottom conductive layer 120 may be a bottom bonding layer that bonds the first light-emitting layer 110 to the IC backplane 500. In some embodiments, the first bottom conductive layer 120 may be bonded to the IC backplane 500 by an additional bonding layer 440. In some embodiments, the bonding layer 440 may be a metal bonding layer.

[0030] ​Returning to Figure 1, when the layers of the micro-LED structure are projected perpendicularly onto a horizontal plane, each layer forms a projected area on the horizontal plane. Each projected area on the horizontal plane has a contour, which in this specification is referred to as the projected contour in the plan view (i.e., the top view). In some embodiments, the disclosed micro-LED structure 10 is configured such that the projected contour of the upper light-emitting layer in the plan view is located within the projected shape of the lower light-emitting layer in the plan view, thereby forming a plurality of mesa structures of different widths. The upper conductive layer 430 may cover all three mesa structures. In some embodiments, the projected contour of the upper layer in the plan view may be substantially located within the projected shape of the lower layer in the plan view, i.e., the projected contour of the upper layer in the plan view may be located within the projected shape of the lower layer.

[0031] More specifically, in some embodiments, the projected contour of the light-emitting layer 310 is located within the projected contour of the third bottom conductive layer 320, the projected contour of the light-emitting layer 210 is located within the contour of the second bottom conductive layer 220, and the projected contour of the first light-emitting layer 110 is located within the projected contour of the first bottom conductive layer 120.

[0032] In some embodiments, the upper connecting layer may be optional. If an upper connecting layer is present, the projected contour of the upper connecting layer may be the same as, or slightly smaller than, the projected contour of the light-emitting layer directly beneath it. For example, the upper conductive layer 130 may have a projected contour that overlaps with the projected contour of the first light-emitting layer 110, or, more precisely, the upper conductive layer 130 may have a projected contour that is slightly smaller than the projected contour of the first light-emitting layer 110 due to its inclined sidewalls, which will be described in more detail in a later section.

[0033] In some embodiments, the first bottom conductive layer 120, the first light-emitting layer 110, the first top conductive layer 130, the first dielectric layer 410, the second bottom conductive layer 220, the second light-emitting layer 210, the second dielectric layer 420, the third bottom conductive layer 320, and the third light-emitting layer 310 all have other regular shapes with notches (e.g., circular, elliptical, with rounded corners, or rectangles without rounded corners).

[0034] More generally, as shown in Figures 2A to 2C, when comparing any two layers, namely a first bottom conductive layer 120, a first light-emitting layer 110, a first upper conductive layer 130, a first dielectric layer 410, a second bottom conductive layer 220, a second light-emitting layer 210, a second dielectric layer 420, a third bottom conductive layer 320, and a third light-emitting layer 310, the first contour in the plan view formed by the upper layer may be located within the second contour in the plan view formed by the lower layer.

[0035] In some embodiments, the sidewall of the upper layer is set back by an offset from the sidewall of the adjacent lower layer. As shown in Figures 2A to 2C, the sidewalls of each layer of the micro-LED structure may be aligned in a straight line inclined in the side view, with occasional steps. In some exemplary embodiments, each of the first dielectric layer, second bottom conductive layer, second light-emitting layer, second dielectric layer, third bottom conductive layer, and third light-emitting layer has sidewalls aligned substantially in a straight line in the side view, and the substantially straight line is inclined at a constant angle. In some exemplary embodiments, the layers may have a substantially rectangular shape with notches. Thus, the micro-LED structure can have four sides, each side having a layer edge inclined at a constant angle. The angles may or may not coincide for all four edges.

[0036] In some embodiments, vias (i.e., 600, 700) may be located and housed within notches. For example, the first via 600 electrically connects the second pad 520 and the second bottom conductive layer 220, and passes through the second light-emitting layer 210 in the second notch 214, while the second via 700 electrically connects the third pad 530 from its upper surface to the third bottom conductive layer 320, and passes through the first bottom conductive layer 120 in the first notch 122, the first light-emitting layer 110 in the first notch 112, the first upper conductive layer in the first notch (not shown in Figure 1), the second bottom conductive layer 220 in the first notch 222, the second light-emitting layer 210 in the first notch 212, and the third bottom conductive layer 320 in the first notch 322.

[0037] In some embodiments, the top contact may also be positioned and housed within a notch. For example, the top contact 140 is positioned within a third notch 226 of the first light-emitting layer 110 and within a second notch 216 of the second bottom connecting layer 220. It is worth noting that the top contact does not necessarily need to be positioned within a notch to achieve the goal of having a smaller LED structure footprint, since the top contact connects each light-emitting layer to the final conductive layer positioned above each light-emitting layer, and the upper layer always has a smaller projected contour than the layer below it.

[0038] In some embodiments, the vias (i.e., 600, 700) and the final conductive layer 430 may be tilted in proportion to their adjacent sides on the micro-LED structure. In other words, as shown in Figures 2A to 2C, the vias (e.g., the first via 600, the second via 700) and the final conductive layer 430 may each be separated by the same height from the layers of the micro-LED structure.

[0039] In some embodiments, the sidewalls of the first dielectric layer 410, the second bottom conductive layer 220, the second light-emitting layer 210, the second dielectric layer 420, and the third bottom conductive layer 320 are all inclined. In some embodiments, the sidewalls may be inclined at the same rate as the adjacent vias.

[0040] Continuing to refer to Figure 1A, in some embodiments, dielectric material 800 can be filled around the mesa structure. In some embodiments, the dielectric material 800 can fill gaps in the micro-LED structure 10 so that the light-emitting layers (e.g., light-emitting layers 100, 200, 300) are not electrically connected to each other. In some embodiments, the dielectric material 800 can also fill gaps between vias and structural layers (i.e., between conductive layers and light-emitting layers), as well as gaps between the final conductive layer 430 and structural layers (i.e., between conductive layers and light-emitting layers).

[0041] In some embodiments, the light-emitting layers 110, 210, and 310 can emit light or light images of different colors. In some exemplary embodiments, light-emitting layer 110 is selected as a red light-emitting layer, light-emitting layer 210 is selected as a green light-emitting layer, and light-emitting layer 310 is selected as a blue light-emitting layer. The above color assignments are for illustrative purposes only. Other combinations of light colors can be assigned to the light-emitting layers to obtain any desired results, in accordance with the disclosed embodiments.

[0042] In some embodiments, each of the light-emitting layers 110, 210, and 310 may comprise two semiconductor layers of different conductivity types (e.g., P-type and N-type) and a quantum well layer between the two different types of semiconductor layers. In some embodiments, each of the light-emitting layers 110, 210, and 310 may have a P-type semiconductor layer at the bottom and an N-type semiconductor layer on top. In some other embodiments, each of the light-emitting layers 110, 210, and 310 may have an N-type semiconductor layer at the bottom and a P-type semiconductor layer on top.

[0043] In some embodiments, the conductive layer may be transparent or opaque. In some embodiments, the material of the conductive bonding layer is selected from one of metals, composite metals, or transparent conductive materials. In some embodiments, the transparent conductive material may be made of transparent plastic (resin) or silicon dioxide (SiO2), such as spin-on glass (SOG), adhesive microresist BCL-1200, etc. The metal may be selected from copper (Cu), gold (Au), etc. In some embodiments, the thickness of the conductive bonding layer may be in the range of about 0.1 microns to about 5 microns. In some embodiments, the metal composition for the bonding layer may include Au-Au bonding, Au-Sn bonding, Au-In bonding, Ti-Ti bonding, Cu-Cu bonding, or a combination thereof. For example, if an Au-Au bonding is required, each of the two Au layers requires a chromium (Cr) coating as an adhesive layer and a platinum (Pt) coating between the gold layer and the chromium coating as a diffusion prevention layer. The Cr and Pt layers may be formed on both Au layers to be bonded. In some embodiments, when the thicknesses of the two Au layers to be joined are approximately the same, interdiffusion of Au on both Au layers can join the two layers together under high pressure and high temperature. Exemplary joining techniques may include eutectic bonding, thermocompression bonding, and transient liquid phase (TLP).

[0044] In some embodiments, the dielectric layers (e.g., 410, 420) may be SiO2-SiO2 junction layers. SiO2-SiO2 junctions can further reduce the thickness of the junction layer while achieving higher junction strength.

[0045] In some embodiments, the material of the conductive layer (e.g.) may be selected from transparent conductive materials. In some embodiments, the transparent conductive material may be a transparent conductive oxide (TCO), such as indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), antimond-doped tin oxide (ATO), or fluorine-doped tin oxide (FTO). In some embodiments, the thickness of the ITO layer may be in the range of about 0.01 microns to about 1 micron.

[0046] In some exemplary embodiments, the light-emitting layer 110 within the micro-LED structure 10 is designed to emit red light. Examples of red light-emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. In some embodiments, the film within the red light-emitting layer may include a P-type (Al)(In)(Ga)P, (Al)INGaP light-emitting layer, an N-type (Al)(In)(Ga)P, or an N-type GaAs layer. In some embodiments, the P-type may be Mg-doped or C-doped, and the N-type may be Si-doped. In some embodiments, the thickness of the light-emitting layer 110 may range from about 0.3 microns to about 5 microns.

[0047] In some embodiments, the light-emitting layer 210 within the micro-LED structure 10 is designed to emit green light. Examples of green light-emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. In some embodiments, the film within the green light-emitting layer 210 may include layers of P-type GaN / InGaN light-emitting layer / N-type GaN. In some embodiments, the P-type may be Mg-doped and the N-type may be Si-doped. In some embodiments, the thickness of the light-emitting layer 210 may range from about 0.3 microns to about 5 microns.

[0048] In some embodiments, the light-emitting layer 310 within the micro-LED structure 10 is designed to emit blue light. Examples of blue light-emitting layers include III-V nitride, III-V arsenide, III-V phosphide, and III-V antimonide epitaxial structures. In some embodiments, the film within the blue light-emitting layer 310 may include layers of P-type GaN, InGaN light-emitting layers, or N-type GaN. In some embodiments, the P-type may be Mg-doped, and the N-type may be Si-doped. In some embodiments, the thickness of the blue light-emitting layer 310 may range from about 0.3 microns to about 5 microns.

[0049] In some embodiments, the micro-LED structure 10 has an upper conductive layer 430 deposited on top of the light-emitting layer 310. In some embodiments, the thickness of the final connecting layer 430 (ITO layer) may be about 0.01 microns to about 1 micron.

[0050] In some embodiments, the microlens 900 may be formed on top of the microLED structure 10.

[0051] In some embodiments, as shown in Figure 3, the multiple micro-LED structures 10 may be positioned to form a micro-LED array. In some embodiments, the final conductive layer 430 of each of the multiple micro-LED structures 10 are connected. In some embodiments, the connected final conductive layer 430 of each of the multiple micro-LED structures 10 can form trenches 60 between adjacent micro-LED structures 10. The trenches 60 formed between adjacent micro-LED structures 10 can provide current management advantages for the protection of the micro-LED structures.

[0052] In some embodiments, the bottom of the trench 60 is at the same height as or lower than the top surface of the first light-emitting layer 110, i.e., below the top surface of the first light-emitting layer 110.

[0053] The micro-LEDs described in the disclosed embodiments are very small in volume. The micro-LEDs may be organic or inorganic LEDs. In some embodiments, the micro-LEDs may be applied to a micro-LED array panel. The light-emitting area of ​​the micro-LED array panel may be very small, for example, 1 mm × 1 mm, 3 mm × 5 mm, etc. In some embodiments, the light-emitting area may be the area of ​​the micro-LED array within the micro-LED array panel. The micro-LED array panel may include one or more micro-LED arrays that form a pixel array where the micro-LEDs are pixels, for example, a 1600 × 1200, 680 × 480, or 1920 × 1080 pixel array. The diameter of the micro-LEDs may be in the range of about 100 nm to 20 μm, about 150 nm to 10 μm, or about 200 nm to 2 μm. In some embodiments, an IC backplane may be formed on the back of the micro-LED array and electrically connected to the micro-LED array. In some embodiments, the IC backplane may acquire signals, such as image data, from an external source via a signal line, in order to control the on / off state of the corresponding micro-LED (e.g., to make it light up or not).

[0054] Therefore, different types of display panels can be manufactured. For example, in some embodiments, the resolution of the display panel may range from 8×8 to 3840×2160. Common display resolutions include QVGA with a resolution of 320×240 and a 4:3 aspect ratio, XGA with a resolution of 1024×768 and a 4:3 aspect ratio, D with a resolution of 1280×720 and a 16:9 aspect ratio, FHD with a resolution of 1920×1080 and a 16:9 aspect ratio, UHD with a resolution of 3840×2160 and a 16:9 aspect ratio, and 4K with a resolution of 4096×2160 and a 1.9 aspect ratio. A wide variety of pixel sizes are also possible, ranging from submicron-sized to over 10 mm. The size of the overall display area can also vary greatly, ranging from small diagonals of tens of microns or less to hundreds of inches or more.

[0055] It will be understood by those skilled in the art that the micro-LED display panel is not limited by the above structure and may include more or fewer components than those shown, or may be a combination of some components, or may utilize different components.

[0056] It should be noted that relational terms such as “first” and “second” in this specification are used solely to distinguish one entity or action from another, and do not imply or require any actual relationship or order between these entities or actions. Furthermore, the words “comprising,” “having,” “containing,” and “including,” as well as other similar forms, are semantically equivalent and are intended to be open-ended, in that the one or more items following any one of these words do not mean an exhaustive list of such one or more items, nor do they mean that the list is limited to only the one or more items listed.

[0057] As used herein, unless otherwise specified, the term “or” encompasses all possible combinations, except where impractical. For example, if it is stated that a database may contain A or B, then unless otherwise specified or impractical, the database may contain A, B, or A and B. As a second example, if it is stated that a database may contain A, B, or C, then unless otherwise specified or impractical, the database may contain A, B, or C, or A and B, or A and C, or A, B, and C.

[0058] Those skilled in the art will understand that all or part of the steps for implementing the aforementioned embodiments may be implemented by hardware or by a program that instructs the relevant hardware. The program may be stored in the aforementioned flash memory, the aforementioned conventional computer device, the aforementioned central processing module, the aforementioned coordination module, etc.

[0059] The above description is merely an example of the embodiments of this disclosure, and this disclosure is not limited thereto. Modifications, equivalent substitutions, and improvements made without departing from the concepts and principles of this disclosure shall fall within the scope of this disclosure.

Claims

1. A microlight-emitting diode (LED) structure, An integrated circuit (IC) backplane comprising at least a first conductive pad, a second conductive pad, and a third conductive pad, A mesa structure consisting of at least three mesa structures stacked along a vertical axis, A first mesa structure formed on the IC backplane, A second mesa structure formed on the first mesa structure, A mesa structure comprising at least three mesa structures, including a third mesa structure formed on the second mesa structure, A first dielectric layer formed between the first mesa structure and the second mesa structure, A second dielectric layer formed between the second mesa structure and the third mesa structure, A final conductive layer, The first mesa structure described above is A first light-emitting layer having at least one notch, A first bottom conductive layer formed beneath the first light-emitting layer, the first bottom conductive layer having at least one notch, A first upper conductive layer formed on the first light-emitting layer, the first upper conductive layer having at least one notch, The first light-emitting layer comprises a first top contact electrically connected to the first light-emitting layer, The second mesa structure described above is A second light-emitting layer having at least one notch, A second bottom conductive layer formed beneath the first light-emitting layer, the second bottom conductive layer having at least one notch, The second light-emitting layer comprises a second top contact electrically connected to the second light-emitting layer, The third mesa structure described above is A third light-emitting layer, A third bottom conductive layer formed beneath the first light-emitting layer, the third bottom conductive layer having at least one notch, The third light-emitting layer comprises a third top contact electrically connected to the third light-emitting layer, The first conductive pad is electrically connected to the first bottom conductive structure. The second conductor is electrically connected to the second bottom conductive structure via the first via. The third conductive pad is electrically connected to the third bottom conductive structure via the second via. A microlight-emitting diode (LED) structure in which the final conductive layer is electrically connected to the first, second, and third top contacts.

2. The second mesa structure described above is A second upper conductive layer formed on the second light-emitting layer, further comprising a second upper conductive layer having at least one notch, The micro-LED structure according to claim 1, wherein the second top contact electrically connects the second light-emitting layer to the final conductive layer via the second upper conductive layer.

3. The third mesa structure described above is The present invention further comprises a third upper conductive layer formed on the third light-emitting layer, The micro-LED structure according to claim 1, wherein the third top contact electrically connects the third light-emitting layer to the final conductive layer via the third upper conductive layer.

4. The third bottom conductive layer and, The above-mentioned second light-emitting layer, The second bottom conductive layer and, The first upper conductive layer and The above-mentioned first light-emitting layer, Each of the first bottom conductive layers is The micro-LED structure according to claim 1, comprising a notch aligned with the first via.

5. The micro-LED structure according to claim 1, wherein the notch in the second light-emitting layer is aligned with the notch in the second bottom conductive layer.

6. The first bottom conductive layer and, The above-mentioned first light-emitting layer, The first upper conductive layer and The second bottom conductive layer and, The above-mentioned second light-emitting layer, The third bottom conductive layer and, The present invention comprises a first layer and a second layer selected from the third light-emitting layer, The micro-LED structure according to claim 1, wherein the first layer is located below the second layer, the first layer forms a first contour in a plan view, the second layer forms a second contour in the plan view, and the second contour is positioned within the first contour.

7. The micro-LED structure according to claim 1, wherein each of the first dielectric layer, the second bottom conductive layer, the second light-emitting layer, the second dielectric layer, the third bottom conductive layer, and the third light-emitting layer has a side wall that is substantially aligned in a straight line in a side view, and the substantially straight line is inclined at a first angle.

8. The micro-LED structure according to claim 7, wherein in the side view, each of the first via and the second via is at the same distance from at least one side wall of the first dielectric layer, the second bottom conductive layer, the second light-emitting layer, the second dielectric layer, the third bottom conductive layer, or the third light-emitting layer.

9. The micro-LED structure according to claim 1, wherein the first dielectric layer, the second bottom conductive layer, the second light-emitting layer, the second dielectric layer, the third bottom conductive layer, and the side walls of the third light-emitting layer are all inclined.

10. The micro-LED structure according to claim 1, further comprising a bottom bonding layer for bonding the first mesa structure to the first pad.

11. The microLED array according to claim 1, wherein each of the first, second, and third light-emitting layers comprises a P-type epitaxial layer, a light-emitting layer, and an N-type epitaxial layer.

12. The micro-LED array according to claim 1, wherein each of the first, second, and third light-emitting layers is a quantum well layer.

13. The micro-LED array according to claim 1, wherein the first dielectric layer, the second dielectric layer, the first bottom conductive layer, the first upper conductive layer, and the third bottom conductive layer are all transparent.

14. The first dielectric layer and the second dielectric layer are made of silicon dioxide (SiO₂ ２ ), silicon mononitride (SiN), silicon oxynitride (SiON), silicon carbon nitride (SiCN), titanium dioxide (TiO2), or aluminum oxide (Al ２ O ３ A microLED structure according to claim 1, manufactured using the method described above.

15. The microLED structure according to claim 1, wherein the first bottom conductive layer, the first upper conductive layer, the second bottom conductive layer, the third bottom conductive layer, and the final conductive layer are made of indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), antimond-doped tin oxide (ATO), or fluorine-doped tin oxide (FTO).

16. The micro-LED structure according to claim 1, wherein each of the first, second, and third top contacts is an N-type contact or a P-type contact.

17. A microLED array comprising a plurality of microLED structures according to claim 1, wherein the final conductive layers of the plurality of microLED structures are connected.

18. The microLED array according to claim 17, wherein the connected final conductive layer forms trenches between adjacent microLED structures of the plurality of microLED structures.

19. The microLED array according to claim 18, wherein the bottom of the trench is at the same height as or lower than the upper surface of the first light-emitting layer of the plurality of microLED structures.

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