Solar cell and method for manufacturing the same

Abstract

The present invention relates to a solar cell comprising a first semiconductor layer, a second semiconductor layer formed on one surface of the first semiconductor layer, a third semiconductor layer formed on the other surface of the first semiconductor layer, a first transparent conductive layer formed on the second semiconductor layer, and a second transparent conductive layer formed on the lower surface of the third semiconductor layer, wherein a first plasma damage prevention layer is provided between the second semiconductor layer and the first transparent conductive layer, and a second plasma damage prevention layer is provided between the third semiconductor layer and the second transparent conductive layer, and to a method for manufacturing the same. According to the present invention, even if the process of forming the transparent conductive layer proceeds, the plasma damage prevention layer can prevent the formation of defects in the semiconductor layer.

Description

Technical Field

[0001] The present invention relates to a solar cell.

Background Art

[0002] A solar cell is a device that converts light energy into electrical energy by utilizing the properties of semiconductors.

[0003] A solar cell has a PN junction structure formed by joining a P (positive) type semiconductor and an N (negative) type semiconductor. When sunlight is incident on a solar cell with such a structure, holes and electrons are generated in the semiconductor due to the energy of the incident sunlight. Here, due to the electric field generated at the PN junction, the holes (+) move to the P-type semiconductor side, and the electrons (-) move to the N-type semiconductor side, generating a potential difference, thereby enabling the production of electric power.

[0004] Such solar cells can generally be classified into substrate-type solar cells and thin-film solar cells.

[0005] The substrate-type solar cell is manufactured by using a semiconductor material itself, such as silicon, as a substrate, and the thin-film solar cell is manufactured by forming a semiconductor in the form of a thin film on a substrate such as glass.

[0006] The substrate-type solar cell has the advantage of being somewhat more efficient than the thin-film solar cell, and the thin-film solar cell has the advantage of having a reduced manufacturing cost compared to the substrate-type solar cell.

[0007] When a solar cell includes a silicon layer, a transparent electrode can be provided on the upper surface of the silicon layer. Here, the transparent electrode can be deposited by a plasma sputtering process. When the transparent electrode is deposited using the sputtering process, a part of the silicon (Si) semiconductor layer provided beneath the transparent electrode may crystallize or be damaged, resulting in defects. Herein lies the problem that the efficiency of the solar cell may decrease due to these defects.

[0008] Furthermore, when the transparent electrode is deposited using a sputtering process, the use of oxygen (O2) can form an oxide film on the surface of the semiconductor layer, which can degrade the electrical and optical properties of the solar cell. [Overview of the Initiative] [Problems that the invention aims to solve]

[0009] The present invention was devised to overcome the shortcomings of the solar cells described above, and aims to provide a solar cell and a method for manufacturing the same, which includes a thin-film plasma damage prevention layer on the silicon semiconductor layer in order to prevent defects from occurring in the silicon semiconductor layer. [Means for solving the problem]

[0010] To achieve the above objective, the present invention provides a solar cell comprising a first semiconductor layer, a second semiconductor layer provided on one surface of the first semiconductor layer, a first transparent conductive layer provided on the second semiconductor layer, and a first plasma damage prevention layer provided between the second semiconductor layer and the first transparent conductive layer.

[0011] The first plasma damage prevention layer may be made of an oxide selected from the group consisting of AZO, ITO, and IZO.

[0012] The thickness of the first plasma damage prevention layer may be thinner than that of the first transparent conductive layer.

[0013] The material may further include a third semiconductor layer provided on the other side of the first semiconductor layer, a second transparent conductive layer provided on the third semiconductor layer, and a second plasma damage prevention layer provided between the third semiconductor layer and the second transparent conductive layer.

[0014] The second plasma damage prevention layer may consist of an oxide selected from the group consisting of AZO, ITO, and IZO.

[0015] The thickness of the second plasma damage prevention layer may be thinner than that of the second transparent conductive layer.

[0016] The present invention may further include a first electrode provided on the first transparent conductive layer and a second electrode provided on the second transparent conductive layer.

[0017] The material may further include a fourth semiconductor layer provided between the first semiconductor layer and the second semiconductor layer, and a fifth semiconductor layer provided between the first semiconductor layer and the third semiconductor layer.

[0018] The fourth semiconductor layer may consist of an intrinsic semiconductor layer or a semiconductor layer doped to a relatively lower concentration than the second semiconductor layer, and the fifth semiconductor layer may consist of an intrinsic semiconductor layer or a semiconductor layer doped to a relatively lower concentration than the third semiconductor layer.

[0019] The present invention also provides a method for manufacturing a solar cell, comprising the steps of forming a second semiconductor layer on one surface of a first semiconductor layer made of a semiconductor wafer, forming a first plasma damage prevention layer on the second semiconductor layer, and forming a first transparent conductive layer on the first plasma damage prevention layer, wherein the first plasma damage prevention layer is formed using atomic layer deposition (ALD) and the first transparent conductive layer is formed using sputtering or chemical vapor deposition (CVD).

[0020] The step of forming the first plasma damage prevention layer may include the steps of injecting a first source material, injecting a second source material, injecting a first purge gas, injecting a first reactant, and injecting a second purge gas.

[0021] The first source substance is an aluminum (Al) series substance, the second source substance is a zinc (Zn) series substance, and the first reactant may be either oxygen (O2) or ozone (O3).

[0022] The first source substance is an indium (In) series substance, the second source substance is one of the zinc (Zn) and tin (Sn) series substances, and the first reactant may be one of oxygen (O2) and ozone (O3).

[0023] The first source substance is a substance of the zinc (Zn) series, the second source substance is one of the substances of the aluminum (Al) and indium (In) series, and the first reactant may be one of the substances of oxygen (O2) and ozone (O3).

[0024] The first source substance is a tin (Sn) series substance, the second source substance is an indium (In) series substance, and the first reactant may be either oxygen (O2) or ozone (O3).

[0025] The first plasma damage prevention layer may consist of an oxide selected from the group consisting of AZO, ITO, and IZO.

[0026] A step of forming the third semiconductor layer on the other surface of the first semiconductor layer, a step of forming a second plasma damage prevention layer on the third semiconductor layer, and a step of forming a second transparent conductive layer between the second plasma damage prevention layers are further included. The second plasma damage prevention layer is formed using an atomic layer deposition method (ALD), and the second transparent conductive layer can be formed using a sputtering method or a chemical vapor deposition method (CVD).

[0027] Furthermore, the present invention includes a step of loading a substrate having a second semiconductor layer formed on one surface of a first semiconductor layer into a chamber, and a step of forming a first plasma damage prevention layer on the second semiconductor layer. The first plasma damage prevention layer is formed using an atomic layer deposition method (ALD), and a method for manufacturing a solar cell is provided.

[0028] Furthermore, the present invention provides a method for manufacturing a solar cell, wherein the first plasma damage prevention layer is made of an oxide selected from the group consisting of AZO, ITO, and IZO.

[0029] Furthermore, after the step of forming the first plasma damage layer, the present invention further includes a step of forming a first transparent conductive layer on the first plasma damage prevention layer. The first transparent conductive layer is formed using a chemical vapor deposition method (CVD) or a plasma enhanced chemical vapor deposition method (PECVD), and a method for manufacturing a solar cell is provided.

[0030] Furthermore, the present invention provides a method for manufacturing a solar cell, wherein the step of forming the first plasma damage prevention layer and the step of forming the first transparent conductive layer proceed in situ within the chamber.

[0031] Furthermore, the present invention provides a method for manufacturing a solar cell, comprising the steps of: transporting a substrate on which a first semiconductor layer and a second semiconductor layer are formed into a chamber; forming a first plasma damage prevention layer on the second semiconductor layer; and forming a first transparent conductive layer on the first plasma damage prevention layer, wherein the first plasma damage prevention layer is formed using atomic layer deposition (ALD), and the first transparent conductive layer is formed using one of sputtering, chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD). [Effects of the Invention]

[0032] According to the present invention with the above configuration, the following effects are obtained.

[0033] According to the present invention, by forming a plasma damage prevention layer between the semiconductor layer and the transparent electrode, it is possible to prevent defects from occurring in the semiconductor layer during the deposition process of the transparent electrode through a sputtering process.

[0034] According to the present invention, by depositing the plasma damage prevention layer via atomic layer deposition (ALD), the thickness of the plasma damage prevention layer can be finely adjusted, the composition ratio can be freely adjusted according to the thickness, and furthermore, a high-density thin film can be deposited compared to physical vapor deposition (PVD) or chemical vapor deposition (CVD), resulting in a film of superior quality.

[0035] According to the present invention, by depositing the transparent electrode using chemical vapor deposition (CVD) instead of sputtering, it is possible to prevent defects from occurring in the semiconductor layer.

[0036] According to the present invention, by depositing the transparent electrode through chemical vapor deposition (CVD) instead of a sputtering process, the quality of the thin film can be improved and the efficiency of the solar cell can be increased. [Brief explanation of the drawing]

[0037] [Figure 1] This is a schematic cross-sectional view of a solar cell according to one embodiment of the present invention. [Figure 2] This is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention. [Figure 3] This is a flowchart for forming a plasma damage prevention layer according to one embodiment of the present invention. [Figure 4A] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 4B] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 4C] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 4D] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 4E] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 4F] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 4G] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to one embodiment of the present invention. [Figure 5A] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 5B] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 5C] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 5D] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 5E] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 5F]This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 5G] This is a schematic cross-sectional view showing the manufacturing process of a solar cell according to another embodiment of the present invention. [Figure 6] This is a schematic side cross-sectional view of a substrate processing apparatus for forming a plasma damage prevention layer according to the present invention. [Figure 7] This is a schematic side cross-sectional view of the third and fourth electrodes in a substrate processing apparatus for forming a plasma damage prevention layer according to the present invention. [Figure 8] This is a schematic side cross-sectional view of the third and fourth electrodes in a substrate processing apparatus for forming a plasma damage prevention layer according to the present invention. [Figure 9] This is a conceptual side view illustrating a modified embodiment of the positional differences between the first and second injection sections in a substrate processing apparatus for forming a plasma damage prevention layer according to the present invention. [Modes for carrying out the invention]

[0038] The advantages and features of the present invention, and the methods for achieving them, will become clearer by referring to an example described in detail below with accompanying figures. However, the present invention is not limited to the example disclosed below, but can be embodied in a variety of different forms, and the example provided is merely to complete the disclosure of the present invention and to fully inform those skilled in the art of the invention of the present invention of the scope of the invention. The present invention is defined solely by the claims.

[0039] The shapes, sizes, proportions, angles, numbers, etc., disclosed in the diagrams illustrating an example of the present invention are illustrative and not limited to those shown in the diagrams. Throughout the specification, the same component may refer to the same reference numeral. In describing an example of the present invention, if a detailed explanation of the relevant prior art is deemed to unnecessarily obscure the gist of the application, such detailed explanation will be omitted. Where the description of the present invention uses "includes," "has," "consists of," etc., other parts may be added unless "only" is used. When a component is expressed singly, it includes cases where it includes multiple components unless otherwise explicitly stated.

[0040] In interpreting the constituent elements, they shall be interpreted as including a margin of error, even if not explicitly stated otherwise.

[0041] When describing a spatial relationship, for example, when the positional relationship between two parts is described using phrases like "on top," "above," "below," or "next to," one or more other parts may be located between the two parts, unless expressions like "immediately" or "directly" are used.

[0042] When describing temporal relationships, for example, when a temporal sequence is described using phrases like "after," "following," "next," or "before," it can include cases that are not continuous unless "immediately" or "directly" is used.

[0043] While terms such as "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are simply used to distinguish one component from others. Therefore, the first component referred to below may also be the second component within the technical concept of the present invention.

[0044] The features of some examples of the present invention can be combined or linked together in part or as a whole, enabling various technically interconnected and driven configurations, and each embodiment can be implemented independently of others or in association with each other.

[0045] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the figures.

[0046] Figure 1 is a schematic cross-sectional view of a solar cell according to one embodiment of the present invention.

[0047] As can be seen from Figure 1, a solar cell according to one embodiment of the present invention comprises a first semiconductor layer 110, a second semiconductor layer 120a, a third semiconductor layer 120b, a first plasma damage prevention layer 200a, a second plasma damage prevention layer 200b, a first transparent conductive layer 300a, a second transparent conductive layer 300a, and a second electrode 400b.

[0048] The first semiconductor layer 110 can be made of a semiconductor wafer, for example, a silicon wafer, and more specifically, it can be made of an N-type silicon wafer or a P-type silicon wafer. Such a first semiconductor layer 110 has the same polarity as one of the semiconductor layers, either the second semiconductor layer 120a or the third semiconductor layer 120b.

[0049] Although not shown in the figure, an uneven surface can be formed on at least one of the upper or lower surfaces of the first semiconductor layer 110. If an uneven surface is formed on the upper and lower surfaces of the first semiconductor layer 110, an uneven surface can also be formed on the surfaces of the second semiconductor layer 120a, the third semiconductor layer 120b, the first plasma damage prevention layer 200a, the second plasma damage prevention layer 200b, the first transparent conductive layer 300a, and the second transparent conductive layer 300b.

[0050] The second semiconductor layer 120a is formed in the form of a thin film on the upper surface of the first semiconductor layer 110, which is made of the semiconductor wafer. The second semiconductor layer 120a can form a PN junction together with the first semiconductor layer 110, and therefore, when the first semiconductor layer 110 is made of an N-type silicon wafer, the second semiconductor layer 120a can be made of a P-type semiconductor layer. In particular, the second semiconductor layer 120a can be made of P-type amorphous silicon doped with a group 3 element such as boron (B).

[0051] Generally, since the drift mobility of holes is lower than that of electrons, it is preferable to form a P-type semiconductor layer close to the light-receiving surface in order to maximize the hole collection efficiency by incident light. Therefore, it is preferable that the second semiconductor layer 120a, which is close to the light-receiving surface, is a P-type semiconductor layer.

[0052] The first plasma damage prevention layer 200a is formed in the form of a thin film on the upper surface of the second semiconductor layer 120a. The first plasma damage prevention layer 200a is provided between the second semiconductor layer 120a and the first transparent conductive layer 300a, and can prevent defects from occurring in the second semiconductor layer 120a during the process of forming the first transparent conductive layer 300a.

[0053] Specifically, the first transparent conductive layer 300a can be formed through a sputtering process. However, since the sputtering process is carried out using a high-energy plasma, it may form defects in the second semiconductor layer 120a provided beneath the first transparent conductive layer 300a.

[0054] For example, if the second semiconductor layer 120a contains amorphous silicon (Si), a portion of the second semiconductor layer 120a containing amorphous silicon may crystallize or be damaged, and defects may be formed in the second semiconductor layer 120a.

[0055] According to one embodiment of the present invention, the first plasma damage prevention layer 200a is formed in the form of a thin film on the upper surface of the second semiconductor layer 120a, thereby protecting the second semiconductor layer 120a during the process of forming the first transparent conductive layer 300a. Therefore, the first plasma damage prevention layer 200a prevents defects from forming in the second semiconductor layer 120a even when the process of forming the first transparent conductive layer 300a is carried out.

[0056] The thickness of the first plasma damage prevention layer 200a is formed to be thinner than the thickness of the first transparent conductive layer 300a formed on the upper surface of the first plasma damage prevention layer 200a.

[0057] The first plasma damage prevention layer 200a may include at least one of IZO (Indium Zinc Oxide), AZO (Aluminum Zinc Oxide), and ITO (Indium Tin Oxide). Here, the first plasma damage prevention layer 200a can be formed using atomic layer deposition, such as thermal ALD or oxygen-containing plasma-enhanced ALD (PEALD).

[0058] When the first plasma damage prevention layer 200a is formed by atomic layer deposition (ALD), the thickness of the first plasma damage prevention layer 200a can be finely adjusted, thereby easily adjusting the composition ratio of the first plasma damage prevention layer 200a according to its thickness. Furthermore, when the first plasma damage prevention layer 200a is formed using atomic layer deposition (ALD) compared to when it is formed using physical vapor deposition (PVD) or chemical vapor deposition (CVD) under the same conditions, a high-density thin film can be deposited, resulting in the first plasma damage prevention layer 200a having relatively superior film quality.

[0059] The process of forming the first plasma damage prevention layer 200a will be explained in detail with reference to Figure 3 below.

[0060] The first transparent conductive layer 300a is provided on the upper surface of the first plasma damage prevention layer 200a and can be formed in situ with the first plasma damage prevention layer 200a in a single chamber.

[0061] The first transparent conductive layer 300a is formed in the form of a thin film on the upper surface of the first plasma damage prevention layer 200a. The first transparent conductive layer 300a collects carriers, such as holes, generated in the first semiconductor layer 110 and moves the collected carriers to the first electrode 400a.

[0062] Such a first transparent conductive layer 300a can be made of a transparent conductive material such as ITO (Indium Tin Oxide), ZnOH, ZnO:B, ZnO:Al, SnO2, or SnO2:F, from which ITO can be selected.

[0063] The first transparent conductive layer 300a can be formed by a sputtering process, a chemical vapor deposition (CVD) process, or a plasma-enhanced chemical vapor deposition (PECVD) process.

[0064] The first electrode 400a is formed on the first transparent conductive layer 300a to constitute the front surface of the solar cell. Therefore, the first electrode 400a is patterned in a predetermined form so that sunlight can be transmitted into the interior of the solar cell.

[0065] The first electrode 400a may be made of any one metal selected from the group consisting of Ag, Cu, Al, Mo, and W. On the other hand, the first electrode 400a is not limited to this and may also be formed in one or more multilayer structures.

[0066] The third semiconductor layer 120b is formed in the form of a thin film on the lower surface of the first semiconductor layer 110, which is made of the semiconductor wafer. The third semiconductor layer 120b is formed to have a different polarity from the second semiconductor layer 120a. If the second semiconductor layer 120a is made of a P-type semiconductor layer doped with a group 3 element such as boron (B), then the third semiconductor layer 120b is made of an N-type semiconductor layer doped with a group 5 element such as phosphorus (P). In particular, the third semiconductor layer 120b can be made of N-type amorphous silicon.

[0067] The second plasma damage prevention layer 200b is formed in the form of a thin film on the lower surface of the third semiconductor layer 120b.

[0068] The second plasma damage prevention layer 200b is provided between the third semiconductor layer 120b and the second transparent conductive layer 300b, and can prevent defects from occurring in the third semiconductor layer 120b during the process of forming the second transparent conductive layer 300b.

[0069] Specifically, the second transparent conductive layer 300b can be formed through a sputtering process. However, since the sputtering process is carried out using a high-energy plasma, defects may be formed in the third semiconductor layer 120b provided on the second transparent conductive layer 300b.

[0070] For example, if the third semiconductor layer 120b contains amorphous silicon (Si), a portion of the third semiconductor layer 120b containing the amorphous silicon may crystallize or be damaged as the sputtering process progresses, and defects may be formed in the third semiconductor layer 120b.

[0071] According to one embodiment of the present invention, the second plasma damage prevention layer 200b is formed in the form of a thin film on the lower surface of the third semiconductor layer 120b, thereby protecting the third semiconductor layer 120b during the process of forming the second transparent conductive layer 300b. Therefore, the second plasma damage prevention layer 200b prevents defects from forming in the third semiconductor layer 120b even when the process of forming the second transparent conductive layer 300b is carried out.

[0072] The thickness of the second plasma damage prevention layer 200b is formed to be thinner than the thickness of the second transparent conductive layer 300b formed on the lower surface of the second plasma damage prevention layer 200b.

[0073] The second plasma damage prevention layer 200b may comprise at least one of IZO (Indium Zinc Oxide), AZO (Aluminum Zinc Oxide), and ITO (Indium Tin Oxide). Here, the second plasma damage prevention layer 200b may be formed using atomic layer deposition (ALD), such as thermal atomic layer deposition (Thermal ALD) or plasma-enhanced atomic layer deposition (PEALD) containing oxygen.

[0074] When the second plasma damage prevention layer 200b is formed by atomic layer deposition (ALD), the thickness of the second plasma damage prevention layer 200b can be finely adjusted, thereby easily adjusting the composition ratio of the second plasma damage prevention layer 200b according to its thickness. Furthermore, when forming the second plasma damage prevention layer 200b using atomic layer deposition (ALD) compared to forming it using physical vapor deposition (PVD) or chemical vapor deposition (CVD) under the same conditions, a high-density thin film can be deposited, resulting in a second plasma damage prevention layer 200b with relatively superior film quality.

[0075] The process of forming the second plasma damage prevention layer 200b will be explained in detail with reference to Figure 3 below.

[0076] The second transparent conductive layer 300b is formed in the form of a thin film on the underside of the second plasma damage prevention layer 200b and can be formed in situ with the second plasma damage prevention layer 200b in a single chamber.

[0077] The second transparent conductive layer 300b plays the role of collecting carriers, such as electrons, generated in the first semiconductor layer 110 and moving the collected carriers to the second electrode 400b.

[0078] Such a second transparent conductive layer 300b can be made of a transparent conductive material such as ITO (Indium Tin Oxide), ZnOH, ZnO:B, ZnO:Al, SnO2, SnO2:F, etc., from which ITO can be selected.

[0079] The second transparent conductive layer 300b can be formed by a sputtering process, a chemical vapor deposition (CVD) process, or a plasma-enhanced chemical vapor deposition (PECVD) process.

[0080] The second electrode 400b is formed on the lower surface of the second transparent conductive layer 300b. Since the second electrode 400b is formed on the very back surface of the solar cell, it can be formed over the entire lower surface of the second transparent conductive layer 300b, but it can be patterned as shown in the figure in order to allow reflected sunlight to enter through the back surface of the solar cell.

[0081] The second electrode 400b is pattern-formed on the lower surface of the second transparent conductive layer 300b. The second electrode 400b can be made of any one metal selected from the group consisting of Ag, Cu, Al, Mo, and W. On the other hand, the second electrode 400b is not limited to this and can also be formed in one or more multilayer structures.

[0082] Figure 2 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention, and is the same as the solar cell shown in Figure 1, except that a fourth semiconductor layer 130a is further formed between the first semiconductor layer 110 and the second semiconductor layer 120a, and a fifth semiconductor layer 130b is further formed between the first semiconductor layer 110 and the third semiconductor layer 130b. Therefore, the same reference numerals are used for the same components, and repeated explanations of the same components are omitted.

[0083] When a second semiconductor layer 120a or a third semiconductor layer 120b is formed on the surface of the first semiconductor layer 110 using a high concentration of dopant gas, defects may occur on the surface of the first semiconductor layer 110 due to the high concentration of dopant gas.

[0084] Therefore, in another embodiment of the present invention shown in Figure 2, a fourth semiconductor layer 130a is formed on the upper surface of the first semiconductor layer 110, and then the second semiconductor layer 120a is formed on the fourth semiconductor layer 130a to prevent the occurrence of defects on the upper surface of the first semiconductor layer 110. Furthermore, a fifth semiconductor layer 130b is formed on the lower surface of the first semiconductor layer 110, and then the third semiconductor layer 120b is formed on the fifth semiconductor layer 130b to prevent the occurrence of defects on the lower surface of the first semiconductor layer 110.

[0085] On the other hand, Figure 2 shows the configuration in which both the fourth semiconductor layer 130a and the fifth semiconductor layer 130b are formed, but it is also possible to form only one of the semiconductor layers, either the fourth semiconductor layer 130a or the fifth semiconductor layer 130b.

[0086] According to embodiments of the present invention, the fourth semiconductor layer 130a and the fifth semiconductor layer 130b are each made of an intrinsic semiconductor layer, or the fourth semiconductor layer 130a and the fifth semiconductor layer 130b are each semiconductor layers doped to a lower concentration than the second semiconductor layer 120a and the third semiconductor layer 120b.

[0087] For example, the fourth semiconductor layer 130a may be made of an intrinsic semiconductor layer, and the fifth semiconductor layer 130b may be made of an intrinsic semiconductor layer.

[0088] Because the fourth semiconductor layer 130a is made of an intrinsic semiconductor layer and the fifth semiconductor layer 130b is made of an intrinsic semiconductor layer, it is possible that no defects will occur on the upper surface of the first semiconductor layer 110 during the process of forming the second semiconductor layer 120a on the first semiconductor layer 110, and it is possible that no defects will occur on the lower surface of the first semiconductor layer 110 during the process of forming the third semiconductor layer 120b on the first semiconductor layer (110).

[0089] To give another example, the fourth semiconductor layer 130a may be a semiconductor layer doped to a relatively lower concentration than the second semiconductor layer 120a, and the fifth semiconductor layer 130b may be a semiconductor layer doped to a relatively lower concentration than the third semiconductor layer 120b.

[0090] The dopant doped in the fourth semiconductor layer 130a and the dopant doped in the second semiconductor layer 120a may be of the same type, for example, the same P-type. Similarly, the dopant doped in the fifth semiconductor layer 130b and the dopant doped in the third semiconductor layer 120b may be of the same type, for example, the same N-type.

[0091] The formation of the fourth semiconductor layer 130a between the first semiconductor layer 110 and the second semiconductor layer 120a prevents the occurrence of defects on the upper surface of the first semiconductor layer 110, and the formation of the fifth semiconductor layer 130b between the first semiconductor layer 110 and the third semiconductor layer 120b prevents the occurrence of defects on the lower surface of the first semiconductor layer 110.

[0092] Here, it is preferable to adjust the dopant concentrations of the low-concentration doped fourth semiconductor layer 130a and fifth semiconductor layer 130b to such an extent that no defects occur on the surface of the first semiconductor layer 110.

[0093] When the dopant concentration of the fourth semiconductor layer 130a is formed to be relatively lower than that of the second semiconductor layer 120a, and the dopant concentration of the fifth semiconductor layer 130b is formed to be relatively lower than that of the third semiconductor layer 120b, the second semiconductor layer 120a and the fourth semiconductor layer 130a can be processed continuously in a single chamber, and similarly, the third semiconductor layer 120b and the fifth semiconductor layer 130b can be processed continuously in a single chamber. As a result, no additional deposition apparatus or processes are required, and consequently, the solar cell of the present invention has the advantage of excellent productivity.

[0094] Figure 3 is a flowchart showing a method for forming a plasma damage prevention layer in a solar cell according to one embodiment of the present invention.

[0095] As can be seen from Figure 3, the plasma damage prevention layer formation method according to one embodiment of the present invention comprises the steps of injecting a first source material (S110), injecting a second source material (S120), injecting a first purge gas (S130), injecting a first reactant (S140), and injecting a second purge gas (S150). Here, through the steps of injecting the first source material (S110) to injecting the second purge gas (S150), the first plasma damage prevention layer 200a and the second plasma damage prevention layer 200b contained in the solar cell according to the embodiment of the present invention shown in Figure 1 or Figure 2 can be formed.

[0096] According to one embodiment of the present invention, the step of forming the plasma damage prevention layer can be performed using atomic layer deposition (ATOM). Here, as the atomic layer deposition (ALD), for example, thermal ALD or plasma-enhanced ALD (PELAD) can be used.

[0097] Therefore, the steps of injecting the first source material (S110) to injecting the second purge gas (S150) can be performed in a vacuum chamber. Specifically, a substrate can be placed on a susceptor provided on the lower side of the vacuum chamber, and the first source material, the second source material, and the first reactant can be injected through a gas injection port provided on the upper side of the vacuum chamber to form the first plasma damage prevention layer 200a on the upper surface of the semiconductor layer 120a, or the second plasma damage prevention layer 200b on the lower surface of the third semiconductor layer 120b.

[0098] When using the atomic layer deposition (ALD) method, the process of injecting the first source material onto the second semiconductor layer 120a, injecting the second source material, processing the first purge gas, injecting the first reactant, and then processing the second purge gas can be repeated as one cycle. Furthermore, the process of injecting the first source material below the third semiconductor layer 120b, injecting the second source material, processing the first purge gas, injecting the first reactant, and then processing the second purge gas can be repeated as one cycle.

[0099] The steps of injecting the first source substance (S110) and injecting the second source substance (S120) can be carried out individually or simultaneously. Specifically, the second source substance can be injected after the first source substance has been injected, and the first and second source substances can be mixed in the same gas supply pipe and supplied to the chamber. Alternatively, the first and second source substances can be injected simultaneously, mixed in the same gas supply pipe, and supplied to the chamber.

[0100] In the step of injecting the first source material (S110), the first source material may be any one of the materials in the aluminum (Al), zinc (Zn), tin (Sn), and indium (In) series. Here, each of the above materials may be a precursor material or a gas material.

[0101] In the step of injecting the second source material (S120), the second source material may be one of the materials in the aluminum (Al), zinc (Zn), tin (Sn), and indium (In) series. In this case, each material may be a precursor material or a gaseous (Gas) material.

[0102] Here, the second source material can be selected to match the first source material.

[0103] For example, if the first source material is an aluminum (Al) series material, the second source material may be a zinc (Zn) series material.

[0104] As another example, if the first source material is an indium (In) series material, the second source material may be one of the zinc (Zn) and tin (Sn) series materials.

[0105] As another example, if the first source substance is a zinc (Zn) series substance, the second source substance may be one of the aluminum (Al) and indium (In) series substances.

[0106] As another example, if the first source material is a tin (Sn) series material, the second source material may be an indium (In) series material.

[0107] Depending on the selected combination of the first source material and the second source material, the first plasma damage prevention layer 200a and the second plasma damage prevention layer 200b formed through the step of injecting the first source material (S110) or the step of injecting the second purge gas (S150) can be formed from any one of AZO, ITO, and IZO thin films.

[0108] After the step of injecting the first source material (S120) has been carried out, the step of injecting the first purge gas (S130) can be carried out.

[0109] The first purge gas can be a non-reactive gaseous substance. For example, the first purge gas can be, but is not limited to, argon (Ar) gas or nitrogen (N2) gas. The step of injecting the first purge gas (S130) allows the first purge gas to be injected into the chamber so that no unwanted substances remain inside the chamber after the steps of injecting the first source substance (S110) and injecting the second source substance (S120) have been carried out.

[0110] After the step of injecting the first purge gas (S130) has been carried out, the step of injecting the first reactant (S140) can be carried out.

[0111] Here, the first reactant can be selected in the step of injecting the first source substance (S110) and the step of injecting the second source substance (S120) to match the first source substance and the second source substance.

[0112] For example, if the first source material is an indium (In) series material and the second source material is a tin (Sn) series material, the first reactant may be either oxygen (O2) or ozone (O3). In this case, the first plasma damage prevention layer 200a and the second plasma damage prevention layer 200b may contain ITO (InSnO).

[0113] After the step of injecting the first reactant (S140) has been carried out, the step of injecting the second purge gas (S150) can be carried out.

[0114] After the step of injecting the first reactant (S130) has been carried out, the step of injecting the second purge gas (S140) can be carried out.

[0115] Here, the step of injecting the second purge gas (S150) can be carried out in the same manner as the step of injecting the first purge gas (S130). Therefore, the second purge gas can be argon (Ar) gas or nitrogen (N2) gas, and is not limited to these. The step of injecting the second purge gas (S150) allows the second purge gas to be injected into the chamber so that no unwanted substances remain inside the chamber after the step of injecting the first reactant (S140) has been carried out.

[0116] Figures 4A to 4G are schematic cross-sectional diagrams showing the manufacturing process of a solar cell according to one embodiment of the present invention, and relate to the solar cell manufacturing method shown in Figure 1 above.

[0117] First, as can be seen in Figure 4A, a second semiconductor layer 120a is formed on the upper surface of a first semiconductor layer 110 made of a semiconductor wafer.

[0118] The first semiconductor layer 110 can be made of an N-type silicon wafer.

[0119] Although not shown in the figure, a texture processing step can be performed before the step of forming the second semiconductor layer 120a in order to form an uneven surface on at least one of the upper or lower surfaces of the first semiconductor layer 110. The texture processing step can be performed by reactive ion etching (RIE) or by wet etching.

[0120] The step of forming the second semiconductor layer 120a may consist of forming a P-type semiconductor layer, such as a P-type amorphous silicon layer, on the first semiconductor layer 110 using the PECVD (Plasma Enhanced Chemical Vapor Deposition) method.

[0121] Next, as can be seen from Figure 4B, the first plasma damage prevention layer 200a is formed on the second semiconductor layer 120a.

[0122] The step of forming the first plasma damage prevention layer 200a may consist of a step of forming a material layer such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and AZO (Aluminum Zinc Oxdie) using atomic layer deposition (ALD).

[0123] Here, the atomic layer deposition (ALD) method can be, for example, thermal ALD or plasma-enhanced ALD (PEALD).

[0124] The process for forming the first plasma damage prevention layer 200a is the same as shown in Figure 3 above, so a repeated explanation will be omitted.

[0125] Next, as can be seen in Figure 4C, a first transparent conductive layer 300a is formed on the first plasma damage prevention layer 200a.

[0126] The step of forming the first transparent conductive layer 300a may consist of a step of forming a transparent conductive material layer such as ITO (Indium Tin Oxide), ZnOH, ZnO:B, ZnO:Al, SnO2, or SnO2:F using sputtering or MOCVD (Metal Organic Chemical Vapor Deposition) method.

[0127] When the first transparent conductive layer 300a is formed via a sputtering process, the sputtering process can be carried out in a separate chamber different from the chamber in which the first plasma damage prevention layer 200a was formed in Figure 4B.

[0128] A target material to be deposited on the upper surface of the first plasma damage prevention layer 200a can be prepared within the chamber. For example, when the first transparent conductive layer 300a is formed from ITO (Indium Tin Oxdie), the target material may be an ITO sputtering target material.

[0129] After the target material has been prepared, a carrier material can be injected into the chamber. The carrier material may be, for example, argon (Ar) gas.

[0130] After injecting the carrier material, a cathode (-) can be connected to the target material, and an anode (+) can be connected where the target material is to be deposited, for example, where the first plasma damage prevention layer 200a is formed. When a power supply is applied to form a plasma, the carrier material accelerated by the plasma collides with the target material, and the target material can be deposited on the plasma damage prevention layer 200a.

[0131] When forming the first transparent conductive layer 300a via metal-organic chemical vapor deposition (MOCVD), the process can proceed in the same chamber in which the first plasma damage prevention layer 200a was formed in Figure 4B, or in a different chamber. The first transparent conductive film 300a can be formed by metal-organic chemical vapor deposition (MOCVD) by simultaneously injecting the source material and reactant onto the first plasma damage prevention layer 200a for forming the first transparent conductive layer 300a.

[0132] Next, as can be seen from Figure 4D, a third semiconductor layer 120b is formed on the lower surface of the first semiconductor layer 110.

[0133] The step of forming the third semiconductor layer 120b may consist of forming an N-type semiconductor layer, such as an N-type amorphous silicon layer, on the first semiconductor layer 110 using the PECVD (Plasma Enhanced Chemical Vapor Deposition) method.

[0134] Next, as can be seen from Figure 4E, a second plasma damage prevention layer 200b is formed on the third semiconductor layer 120b.

[0135] The step of forming the second plasma damage prevention layer 200b may consist of a step of forming a material layer such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and AZO (Aluminum Zinc Oxdie) using atomic layer deposition (ALD).

[0136] Here, the atomic layer deposition (ALD) method can be, for example, thermal ALD or plasma-enhanced ALD (PEALD).

[0137] The process for forming the second plasma damage prevention layer 200b is the same as that described in Figure 3 above, so a repeated explanation will be omitted.

[0138] Next, as can be seen from Figure 4F, a second transparent conductive layer 300b is formed on the second plasma damage prevention layer 200b.

[0139] The step of forming the second transparent conductive layer 300b may consist of a step of forming a transparent conductive material layer such as ITO (Indium Tin Oxide), ZnOH, ZnO:B, ZnO:Al, SnO2, or SnO2:F using sputtering or MOCVD (Metal Organic Chemical Vapor Deposition) method.

[0140] The second transparent conductive layer 300b can be formed in the same manner as the first transparent conductive layer 300a in Figure 4C, and since this is the same as described above and in Figure 4C, the details will be omitted.

[0141] Next, as can be seen from Figure 4G, a first electrode 400a is formed on the first transparent conductive layer 300a, and a second electrode 400b is formed on the second transparent conductive layer 300b.

[0142] The first electrode 400a and the second electrode 400b can be formed by screen printing. Here, the first electrode 400a is formed on the upper surface of the first transparent conductive layer 300a, and the second electrode 400b is formed on the lower surface of the second transparent conductive layer 300b.

[0143] Figures 5A to 5G are schematic cross-sectional diagrams showing the manufacturing process of a solar cell according to another embodiment of the present invention, and relate to the manufacturing method of the solar cell shown in Figure 2 above. Here, Figures 5A to 5F are the same as Figures 4A to 4F except that the configurations of the fourth and fifth semiconductor layers have been added, so the following explanation will focus on the differences in configuration.

[0144] First, as can be seen from Figure 5A, a fourth semiconductor layer 130a is formed on the upper surface of a first semiconductor layer 110 made of a semiconductor wafer, and a second semiconductor layer 120a is formed on the upper surface of the fourth semiconductor layer 130a. On the other hand, the explanation of the first semiconductor layer 110 is the same as in Figure 4A, so it will be omitted.

[0145] The fourth semiconductor layer 130a can be formed as an I (Intrinsic) type amorphous silicon layer using the PECVD (Plasma Enhanced Chemical Vaporization Deposition) method, or the fourth semiconductor layer 130a can be formed to be doped at a relatively lower concentration than the second semiconductor layer 120a.

[0146] When the fourth semiconductor layer 130a is doped to a lower concentration than the second semiconductor layer 120a, the process of forming the low-concentration doped fourth semiconductor layer 130a and the high-concentration doped second semiconductor layer 120a can be carried out continuously in a single chamber. That is, in a single PECVD (Plasma Enhanced Chemical Vaporization Deposition) chamber, the low-concentration doped P-type fourth semiconductor layer 130a and the high-concentration doped P-type second semiconductor layer 120a can be continuously formed while adjusting the amount of dopant gas of a group 3 element such as boron (B) being introduced.

[0147] Next, as can be seen in Figure 5B, a first plasma damage prevention layer 200a is formed on the second semiconductor layer 120a. Here, the method for forming the first plasma damage prevention layer 200a is the same as in Figure 4B, so a detailed explanation will be omitted.

[0148] Next, as can be seen in Figure 5C, a first transparent conductive layer 300a is formed on the first plasma damage prevention layer 200a. Here, the method for forming the first transparent conductive layer 300a is the same as in Figure 4C, so a detailed explanation will be omitted.

[0149] Next, as can be seen from Figure 5D, a fifth semiconductor layer 130b is formed on the lower surface of the first semiconductor layer 110, and a third semiconductor layer 120b is formed on the lower surface of the fifth semiconductor layer 130b.

[0150] The fifth semiconductor layer 130b can be formed as an I(Intrinsic) type amorphous silicon layer using the PECVD (Plasma Enhanced Chemical Vaporization Deposition) method, or the fifth semiconductor layer 130b can be formed to be doped at a relatively lower concentration than the third semiconductor layer 120b.

[0151] When the fifth semiconductor layer 130b is doped to a lower concentration than the third semiconductor layer 120b, the process of forming the low-concentration doped fifth semiconductor layer 130b and the high-concentration doped third semiconductor layer 120b can be carried out continuously in a single chamber. That is, the low-concentration doped P-type fifth semiconductor layer 130b and the high-concentration doped P-type third semiconductor layer 120b can be continuously formed in a single PECVD (Plasma Enhanced Chemical Vaporization Deposition) chamber while adjusting the amount of dopant gas of a group 3 element such as boron (B) that is introduced.

[0152] Next, as can be seen from Figure 5E, a second plasma damage prevention layer 200b is formed on the third semiconductor layer 120b. Here, the method for forming the second plasma damage prevention layer 200b is the same as in Figure 4E, so a detailed explanation will be omitted.

[0153] Next, as can be seen from Figure 5F, a second transparent conductive layer 300b is formed on the second plasma damage prevention layer 200b.

[0154] Here, the second transparent conductive layer 300b can be formed in the same manner as the second transparent conductive layer 300b in Figure 4F, and since this is the same as what was explained in Figure 4C, a detailed explanation will be omitted.

[0155] Next, as can be seen from Figure 5G, a first electrode 400a is formed on the first transparent conductive layer 300a, and a second electrode 400b is formed on the second transparent conductive layer 300b. The first electrode 400a is formed on the upper surface, and the second electrode 400b is formed on the lower surface of the second transparent conductive layer 300b. Here, the method for forming the second transparent conductive layer 300b, the first electrode 400a, and the second electrode 400b is the same as in Figure 4F, so a detailed explanation will be omitted.

[0156] In the following, the substrate processing apparatus for forming the plasma damage prevention layer according to the present invention will be described with reference to Figures 6 to 9.

[0157] Referring to Figures 6 and 7, the substrate processing apparatus 1 performs processing steps on the substrate 20. For example, the substrate processing apparatus 1 can perform a deposition step of depositing a thin film onto the substrate 20. For example, the substrate processing apparatus 1 can perform deposition steps such as CVD (Chemical Vapor Deposition) and ALD (Atomic Layer Deposition). The substrate processing apparatus 1 includes a mounting stage 2, a third electrode 3, a fourth electrode 4, a first injection unit 5, a second injection unit 6, a first injection unit 7, and a second injection unit 8.

[0158] Referring to Figure 6, the aforementioned mounting base 2 supports the substrate 20. The substrate 20 can be placed on the mounting base 2. The mounting base 2 can be positioned below the fourth electrode 4. In this case, the substrate 20 can be placed on the upper surface of the aforementioned mounting base 2. The substrate 20 may be a semiconductor substrate, a wafer, etc. The mounting base 2 can also support multiple substrates 20.

[0159] The mounting base 2 can be coupled to the chamber 50, which provides a processing space in which the processing steps are carried out. The mounting base 2 can be positioned inside the chamber 50. The mounting base 2 can also be rotatably coupled to the chamber 50. In this case, the mounting base 2 can be connected to a rotating part that provides rotational force. The rotating part can rotate the substrate 20 supported by the mounting base 2 by rotating the mounting base 2.

[0160] Referring to Figure 6, the third electrode 3 is located above the base 2 described above. The third electrode 3 can be located above the fourth electrode 4. The third electrode 3 can be positioned at a predetermined distance above the fourth electrode 4. The third electrode 3 can be placed inside the chamber 50. The third electrode 3 can be coupled to the chamber 50 so as to be located at the top of the chamber 50. The third electrode 3 can be formed in a rectangular plate shape overall, but is not limited to this, and can be formed in other shapes such as a disc shape.

[0161] Referring to Figure 6, the fourth electrode 4 is located between the third electrode 3 and the base 2 described above. The fourth electrode 4 can be located below the third electrode 3 and above the base 2 described above. The fourth electrode 4 can be positioned at a predetermined distance above the base 2 described above. The fourth electrode 4 can be placed inside the chamber 50. The fourth electrode 4 can be formed in a rectangular plate shape overall, but is not limited to this, and can also be formed in other shapes such as a disc shape.

[0162] The fourth electrode 4 and the third electrode 3 can be used to generate plasma. RF (Radio Frequency) power can be applied to either the fourth electrode 4 or the third electrode 3, while the other is grounded. This allows a discharge to occur due to the electric field between the fourth electrode 4 and the third electrode 3, thereby generating plasma. Alternatively, RF power can be applied to the fourth electrode 4 while the third electrode 3 is grounded. The fourth electrode 4 can also be grounded while RF power is applied to the third electrode 3.

[0163] An opening 41 can be formed in the fourth electrode 4. The opening 41 can be formed to penetrate the fourth electrode 4. The opening 41 can be formed to penetrate the upper and lower surfaces of the fourth electrode 4. The opening 41 can be formed in an overall cylindrical shape, but is not limited to this, and can also be formed in other shapes such as a rectangular parallelepiped shape.

[0164] If the opening 41 is formed in the fourth electrode 4, a protruding electrode 31 can be coupled to the third electrode 3. The protruding electrode 31 can be coupled to the third electrode 3 so as to protrude toward the base 2 described above. The protruding electrode 31 can protrude from the lower surface of the third electrode 3. The protruding electrode 31 and the third electrode 3 can also be formed integrally. If the third electrode 3 is grounded, the protruding electrode 31 can be grounded via the third electrode 3. If RF power is applied to the third electrode 3, RF power can be applied to the protruding electrode 31 via the third electrode 3.

[0165] Multiple openings 41 can be formed in the fourth electrode 4. The openings 41 can be located at positions spaced apart from each other. In this case, multiple protruding electrodes 31 can be coupled to the third electrode 3. The protruding electrodes 31 can be arranged at positions spaced apart from each other. The openings 41 can be located at positions corresponding to the protruding electrodes 31. This allows the protruding electrodes 31 to protrude toward the openings 41. The protruding electrodes 31 can protrude to a length that is inserted into the openings 41. Although not shown in the figure, the protruding electrodes 31 can also protrude to a length that is not inserted into the openings 41. In this case, the protruding electrodes 31 can be located above the openings 41.

[0166] Referring to Figures 6 and 7, the first injection unit 5 injects the first gas. Here, the first gas may be any one of the first source material or the second source material described in Figure 3. Therefore, as previously described, the first gas may consist of at least one of the materials in the aluminum (Al), indium (In), tin (Sn), and zinc (Zn) series.

[0167] The first gas may be a gas used to perform a processing step on the substrate 20. The first gas may also be a mixed gas, which is a mixture of a gas used to perform a processing step on the substrate 20 and a gas used to generate plasma.

[0168] The first injection unit 5 can inject the first gas into the first injection unit 7. The first gas injected into the first injection unit 7 flows along the first injection unit 7 so as to be sprayed toward the entire surface of the substrate 20, and then can be sprayed toward the base 2 described above via the third electrode 3. The entire surface of the substrate 20 can correspond to the entire upper surface of the substrate 20. The upper surface of the substrate 20 is the surface that is positioned to face the fourth electrode 4. The first injection unit 5 can be coupled to the chamber 50.

[0169] Referring to Figures 6 to 8, the second injection unit 6 is for injecting the second gas. Here, the second gas may be the first reactant described in Figure 3. Therefore, as previously explained, the second gas may consist of one of the substances containing oxygen (O2) and ozone (O3).

[0170] The second gas may be a gas used to perform a processing step on the substrate 20. The second gas may also be a mixed gas in which a gas for performing a processing step on the substrate 20 and a gas for generating plasma are mixed. The second gas and the first gas may consist of different components from each other.

[0171] The second injection unit 6 can inject the second gas into the second injection unit 8. The second gas injected into the second injection unit 8 flows along the second injection unit 8 so as to be sprayed toward the entire surface of the substrate 20, and then can be sprayed toward the base 2 described above via the third electrode 3. The second injection unit 6 can be coupled to the chamber 50. The second gas injected by the second injection unit 6 and the first gas injected by the first injection unit 5 are used to perform a processing step on the substrate 20 by being sprayed toward the substrate 20 supported by the base 2 described above. Therefore, the first gas and the second gas can be sprayed by separating the gas injection units.

[0172] The second injection section 6 and the first injection section 5 can each be positioned on the same side with respect to the third electrode 3. The second injection section 6 and the first injection section 5 can inject the second gas and the first gas into the second injection section 8 and the first injection section 7, respectively.

[0173] Next, as can be seen from Figure 7, in this embodiment, the second injection unit 6 can be positioned on one side 3a of the third electrode 3, and the first injection unit 5 can also be positioned on one side 3a of the third electrode 3. In other words, in this embodiment, the second injection unit 6 and the first injection unit 5 can be positioned on the same side with respect to the third electrode 3.

[0174] The second gas injected by the second injection unit 6 into the second injection unit 8 flows from one side 3a to the other side 3c of the third electrode 3. As a result, the second gas is injected from one side 21 to the other side 22 of the substrate 20. The dashed arrows in Figure 7 indicate the second gas.

[0175] The first gas injected by the first injection unit 5 into the first injection unit 7 flows from one side 3a to the other side 3c of the third electrode 3. As a result, it is injected toward the substrate 20 from one side 21 to the other side 22. In Figure 7, the solid arrows indicate the first gas.

[0176] Figure 7 illustrates that both the second injection section 6 and the first injection section 5 are located on one side 3a of the third electrode 3. However, the design is not limited to this configuration, and can be implemented in different ways as long as the second injection section 6 and the first injection section 5 are located on the same side relative to the third electrode 3.

[0177] For example, both the second injection section 6 and the first injection section 5 can be positioned on the other side 3c of the third electrode 3.

[0178] For example, as can be seen from Figure 9, the second injection unit 6 and the first injection unit 5 can both be arranged to inject the second gas and the first gas through the central part of the third electrode 3 on the upper side 3b of the third electrode 3.

[0179] Referring to Figures 7 and 8, the first injection unit 7 injects the first gas via the third electrode 3. The first injection unit 7 can be connected to the first injection unit 5. The first gas injected into the first injection unit 7 by the first injection unit 5 can flow along the first injection unit 7 and be injected towards the aforementioned base unit 2.

[0180] The first injection unit 7 may include a first injection member 71.

[0181] The first injection member 71 is positioned inside the third electrode 3. The first injection member 71 can function as a passage for flowing the first gas injected from the first injection section 5. The first injection member 71 can be formed to extend along the first axial direction (X-axis direction). This allows the first gas injected into the first injection member 71 to flow along the first injection member 71 in the first axial direction (X-axis direction). The first injection member 71 can be embodied as a pipe, tube, or the like. In this case, the first injection member 71 can be coupled to the third electrode 3 so as to be positioned inside the third electrode 3. The first injection member 71 can also be embodied so as to be positioned inside the third electrode 3 by forming a hole inside the third electrode 3. The first injection section 7 may include a first injection hole 72.

[0182] The first injection hole 72 is for injecting the first gas toward the base 2 described above. The first injection hole 72 can be connected to the first injection member 71. As a result, the first gas flowing along the first injection member 71 can be injected toward the base 2 described above through the first injection hole 72. The first injection hole 72 can be formed such that one end is connected to the first injection member 71 and the other end penetrates the third electrode 3. If the first injection member 71 is formed parallel to the first axial direction (X-axis direction), the first injection hole 72 can be formed parallel to the vertical direction (Z-axis direction).

[0183] The first injection unit 7 may include a plurality of first injection holes 72. The first injection holes 72 may be arranged to be spaced apart from each other along the first axial direction (X-axis direction). This allows the first injection holes 72 to inject the first gas into different parts of the substrate 20 supported by the base 2 described above. The first injection holes 72 may each be connected to different parts of the first injection member 71. This allows the first gas to flow along the first injection member 71 in the first axial direction (X-axis direction) and be injected towards the base 2 described above through the first injection holes 72.

[0184] By providing multiple first injection holes 72, the first injection unit 7 can be configured to inject the first gas evenly toward the substrate 20 with reference to the first axial direction (X-axis direction). In order to inject the first gas evenly toward the substrate 20 with reference to the second axial direction (Y-axis direction) perpendicular to the first axial direction (X-axis direction), the first injection unit 7 can include multiple first injection members 71.

[0185] The first injection members 71 can be positioned at locations spaced apart from each other along the second axial direction (Y-axis direction). The second axial direction (Y-axis direction) and the first axial direction (X-axis direction) are axial directions arranged perpendicular to each other on a single plane. Multiple first injection holes 72 can be connected to each of the first injection members 71. This allows the first injection members 71 to inject the first gas toward the base 2 described above through the first injection holes 72. Therefore, the substrate processing apparatus 1 according to the present invention can inject the first gas toward the substrate 20 not only with respect to the first axial direction (X-axis direction), but also with respect to the second axial direction (Y-axis direction). Thus, the substrate processing apparatus 1 according to the present invention is embodied in a manner that allows the first gas to be injected toward the entire surface of the substrate 20 placed on the base 2 described above. The first injection holes 72 can be formed to penetrate the protruding electrode 31. In this case, the first gas is injected through the first injection hole 72 toward the opening 41 and then can flow through the opening 41 toward the base 2 described above.

[0186] Referring to Figures 7 and 8, the second injection unit 8 injects the second gas via the third electrode 3. The second injection unit 8 can be connected to the second injection unit 6. The second gas injected into the second injection unit 8 by the second injection unit 6 can be injected towards the base unit 2 described above while flowing along the second injection unit 8.

[0187] The second injection unit 8 may include a second injection member 81.

[0188] The second injection member 81 is positioned inside the third electrode 3. The second injection member 81 can function as a passage for flowing the second gas injected from the second injection section 6. The second injection member 81 can be formed to extend along the first axial direction (X-axis direction). This allows the second gas injected into the second injection member 81 to flow along the second injection member 81 in the first axial direction (X-axis direction). The second injection member 81 can be embodied as a pipe, tube, or the like. In this case, the second injection member 81 can be coupled to the third electrode 3 so as to be positioned inside the third electrode 3. The second injection member 81 can also be embodied so as to be positioned inside the third electrode 3 by forming a hole inside the third electrode 3. In this case, if the substrate processing apparatus 1 needs to adjust the temperature of the second gas flowing along the second injection member 81, it can adjust the temperature of the third electrode 3 to directly adjust the temperature of the second gas. Therefore, the substrate processing apparatus 1 can improve the ease and accuracy of the operation of adjusting the temperature of the second gas.

[0189] The second injection unit 8 may include a second injection hole 82.

[0190] The second injection hole 82 injects the second gas toward the base 2 described above. The second injection hole 82 can be connected to the second injection member 81. This allows the second gas flowing along the second injection member 81 to be injected toward the base 2 described above through the second injection hole 82. The second injection hole 82 can be formed such that one end is connected to the second injection member 81 and the other end penetrates the third electrode 3. If the second injection member 81 is formed parallel to the first axial direction (X-axis direction), the second injection hole 82 can be formed parallel to the vertical direction (Z-axis direction).

[0191] The second injection unit 8 may include a plurality of the second injection holes 82. The second injection holes 82 may be arranged to be spaced apart from each other along the first axial direction (X-axis direction). This allows the second injection holes 82 to inject the second gas into different parts of the substrate 20 supported by the base 2 described above. The second injection holes 82 may each be connected to different parts of the second injection member 81. This allows the second gas to flow along the second injection member 81 in the first axial direction (X-axis direction) and be injected into the base 2 described above through the second injection holes 82. As can be seen from Figure 7, the second injection holes 82 and the first injection holes 72 may be arranged alternately in multiples with respect to the first axial direction (X-axis direction).

[0192] By providing multiple second injection holes 82, the second injection unit 8 can be configured to inject the second gas evenly toward the substrate 20 with reference to the first axial direction (X-axis direction). In order to inject the second gas evenly toward the substrate 20 with reference to the second axial direction (Y-axis direction) which is perpendicular to the first axial direction (X-axis direction), the second injection unit 8 can include multiple second injection members 81.

[0193] The second injection members 81 can be arranged at positions spaced apart from each other along the second axial direction (Y-axis direction). Multiple second injection holes 82 can be connected to each of the second injection members 81. This allows the second injection members 81 to inject the second gas toward the base 2 described above through the second injection holes 82. Therefore, the substrate processing apparatus 1 according to the present invention can inject the second gas toward the substrate 20 not only with respect to the first axial direction (X-axis direction), but also with respect to the second axial direction (Y-axis direction). This allows the substrate processing apparatus 1 according to the present invention to inject the second gas toward the entire surface of the substrate 20 placed on the base 2 described above. The second injection holes 82 can be arranged above the fourth electrode 4. In this case, the second gas can be injected between the third electrode 3 and the fourth electrode 4 through the second injection holes 82 and then flow toward the base 2 described above through the opening 41.

[0194] Although embodiments of the present invention have been described in more detail above with reference to the attached figures, the present invention is not necessarily limited to these embodiments and can be implemented in various modifications without departing from the technical concept of the present invention. Therefore, the embodiments disclosed herein are for illustrative purposes only and not to limit the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by such embodiments. Accordingly, the embodiments described above should be understood to be illustrative and not limiting in all respects. The scope of protection of the present invention should be interpreted by the claims, and all technical concepts within an equivalent scope should be interpreted as being included in the scope of the rights of the present invention.

Claims

1. First semiconductor layer, A second semiconductor layer provided on one surface of the first semiconductor layer, A first transparent conductive layer provided on the second semiconductor layer, and The first plasma damage prevention layer is provided between the second semiconductor layer and the first transparent conductive layer, The first plasma damage prevention layer is a solar cell formed using atomic layer deposition (ALD).

2. The solar cell according to claim 1, wherein the first plasma damage prevention layer is formed using plasma-enhanced atomic layer deposition (PEALD) containing oxygen.

3. The solar cell according to claim 1, wherein the first plasma damage prevention layer is made of an oxide selected from the group consisting of AZO, ITO, and IZO.

4. The solar cell according to claim 1, wherein the thickness of the first plasma damage prevention layer is thinner than that of the first transparent conductive layer.

5. A third semiconductor layer provided on the other side of the first semiconductor layer, A second transparent conductive layer provided on the third semiconductor layer, and The solar cell according to claim 1, further comprising a second plasma damage prevention layer provided between the third semiconductor layer and the second transparent conductive layer.

6. The solar cell according to claim 5, wherein the second plasma damage prevention layer is made of an oxide selected from the group consisting of AZO, ITO, and IZO.

7. The solar cell according to claim 5, wherein the thickness of the second plasma damage prevention layer is thinner than that of the second transparent conductive layer.

8. A first electrode provided on the first transparent conductive layer, and The solar cell according to claim 5, further comprising a second electrode provided on the second transparent conductive layer.

9. A fourth semiconductor layer provided between the first semiconductor layer and the second semiconductor layer, and The solar cell according to claim 1, further comprising a fifth semiconductor layer provided between the first semiconductor layer and the third semiconductor layer.

10. The fourth semiconductor layer consists of an intrinsic semiconductor layer or a semiconductor layer doped to a relatively lower concentration than the second semiconductor layer. The solar cell according to claim 9, wherein the fifth semiconductor layer consists of an intrinsic semiconductor layer or a semiconductor layer doped to a relatively lower concentration than the third semiconductor layer.

11. A process of forming a second semiconductor layer on one surface of a first semiconductor layer made of a semiconductor wafer, A step of forming a first plasma damage prevention layer on the second semiconductor layer, and The process includes the step of forming a first transparent conductive layer on the first plasma damage prevention layer, The first plasma damage prevention layer is formed using atomic layer deposition (ALD), A method for manufacturing a solar cell, wherein the first transparent conductive layer is formed using sputtering, chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD).

12. The method for manufacturing a solar cell according to claim 10, wherein the first plasma damage prevention layer is formed using plasma-enhanced atomic layer deposition (PEALD) containing oxygen.

13. The step of forming the first plasma damage prevention layer is Steps to inject the first source substance, Steps to inject the second source substance, The first step is to inject purge gas. A step of injecting the first reactant, and A method for manufacturing a solar cell according to claim 11, comprising the step of injecting a second purge gas.

14. The first source substance is an aluminum (Al) series substance, the second source substance is a zinc (Zn) series substance, and the first reactant is oxygen (O ２ ) and ozone (O ３ A method for manufacturing a solar cell according to claim 13, wherein the method is one of the following:

15. The first source substance is an indium (In) series substance, the second source substance is one of the zinc (Zn) and tin (Sn) series substances, and the first reactant is oxygen (O ２ ) and ozone (O ３ A method for manufacturing a solar cell according to claim 13, wherein the method is one of the following:

16. The first source substance is a zinc (Zn) series substance, the second source substance is one of the aluminum (Al) and indium (In) series substances, and the first reactant is oxygen (O ２ ) and ozone (O ３ A method for manufacturing a solar cell according to claim 13, wherein the method is one of the following:

17. The first source substance is a tin (Sn) series substance, the second source substance is an indium (In) series substance, and the first reactant is oxygen (O ２ ) and ozone (O ３ A method for manufacturing a solar cell according to claim 13, wherein the method is one of the following:

18. The method for manufacturing a solar cell according to claim 11, wherein the first plasma damage prevention layer is made of an oxide selected from the group consisting of AZO, ITO, and IZO.

19. A step of forming a third semiconductor layer on the other side of the first semiconductor layer, A step of forming a second plasma damage prevention layer on the third semiconductor layer, and The process further includes the step of forming a second transparent conductive layer on the second plasma damage prevention layer, The second plasma damage prevention layer is formed using atomic layer deposition (ALD), The method for manufacturing a solar cell according to claim 11, wherein the second transparent conductive layer is formed using sputtering, chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD).

20. A step of transporting a substrate in which a second semiconductor layer is formed on one surface of the first semiconductor layer into a chamber, and The process includes the step of forming a first plasma damage prevention layer on the second semiconductor layer, The method for manufacturing a solar cell according to claim 11, wherein the first plasma damage prevention layer is formed using atomic layer deposition (ALD).

21. The method for manufacturing a solar cell according to claim 20, wherein the first plasma damage prevention layer is made of an oxide selected from the group consisting of AZO, ITO, and IZO.

22. The process further includes the step of forming a first transparent conductive layer on the first plasma damage prevention layer, after the step of forming the first plasma damage prevention layer. The method for manufacturing a solar cell according to claim 20, wherein the first transparent conductive layer is formed using chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD).

23. The method for manufacturing a solar cell according to claim 22, wherein the steps of forming the first plasma damage prevention layer and forming the first transparent conductive layer are carried out in situ within the chamber.

24. A step of transporting a substrate on which a first semiconductor layer and a second semiconductor layer are formed into a chamber, A step of forming a first plasma damage prevention layer on the second semiconductor layer, and The process includes forming a first transparent conductive layer on the first plasma damage prevention layer, The first plasma damage prevention layer is formed using atomic layer deposition (ALD), A method for manufacturing a solar cell, wherein the first transparent conductive layer is formed using one of the following methods: sputtering, chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD).

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