Multi-stage heat chamber cleaning

Abstract

Metal-containing photoresist films can be deposited on semiconductor substrates. Unintended metal-containing material may form on the inner surface of the processing chamber during deposition, beveling and back-side cleaning, exposure, baking, developing, etching, or other photolithography operations. Dry chamber cleaning can remove unintended metal-containing material through multiple thermal steps. Dry chamber cleaning can remove some of the unintended metal-containing material by exposure to an etching gas, such as a halide-containing gas. The remaining unintended metal-containing material can be removed by repeated exposure to a modifying gas, such as air, and to the etching gas.

Description

[Technical Field]

[0001] Built-in by reference The application data sheet is filed concurrently with this specification as part of this application. Each application for which this application claims benefit or priority as identified in a concurrently filed application data sheet is incorporated herein by reference in its entirety for any purpose.

[0002] This disclosure relates to the removal of photoresist materials in semiconductor manufacturing, and more particularly to the chamber cleaning of metal-containing photoresist materials in semiconductor manufacturing. [Background technology]

[0003] The manufacturing of semiconductor devices such as integrated circuits is a multi-step process that includes photolithography. Generally, this process includes the steps of depositing material onto a wafer and patterning the material via lithography techniques to form structural features (e.g., transistors and circuits) of the semiconductor device. Typical steps of a photolithography process known in the art include the steps of preparing a substrate, applying a photoresist by spin coating or the like, exposing the photoresist to light in a desired pattern and partially dissolving the exposed areas of the photoresist with a developer, developing by applying a developer to remove either the exposed or unexposed areas of the photoresist, and performing subsequent processing to create features on the areas of the substrate from which the photoresist has been removed, such as by etching or material deposition.

[0004] The evolution of semiconductor design has been driven by the need to create even finer features on semiconductor substrate materials, and by the ability to do so. This technological progress is characterized by "Moore's Law," which states that the density of transistors in high-density integrated circuits doubles every two years. In fact, chip design and manufacturing have advanced to the point where modern microprocessors can contain billions of transistors and other circuit features on a single chip. Individual features on such chips can be as small as 22 nanometers (nm) or less, and in some cases even less than 10 nm.

[0005] One challenge in manufacturing devices with such fine features is the ability to reliably and reproducibly produce photolithography masks with sufficient resolution. Current photolithography processes typically use 193 nm ultraviolet (UV) light to expose photoresist. The fact that the light has a wavelength significantly larger than the desired size of the features to be generated on the semiconductor substrate presents an inherent problem. Achieving a feature size smaller than the wavelength of light requires the use of complex resolution enhancement techniques such as multi-patterning. Therefore, there is considerable interest and research effort in developing photolithography techniques that use shorter wavelength light, such as extreme ultraviolet (EUV) with wavelengths of 10 nm to 15 nm, for example, 13.5 nm.

[0006] However, the EUV photolithography process can present challenges, including low power and light loss during patterning. Conventional organic chemically amplified resists (CARs), similar to those used in 193nm UV lithography, have potential drawbacks when used in EUV lithography, particularly in the EUV region, as they have low absorption coefficients and the diffusion of photoactivating chemical species can cause blurring and line edge roughness. Furthermore, fine features patterned with conventional CAR materials may result in high aspect ratios and a risk of pattern collapse in order to provide the etching resistance necessary to pattern the underlying device layer. Therefore, improved EUV photoresist materials with properties such as thinner thickness, higher absorbance, and greater etching resistance are still needed.

[0007] The background art provided herein is intended to present a general overview of the current state of the technology. To the extent described in this background art section, the inventors' research and aspects of the description that may not be recognized as prior art at the time of filing are not explicitly or implicitly recognized as prior art to the present technology. [Overview of the Initiative] [Means for solving the problem]

[0008] This specification provides a method for cleaning a processing chamber. The method comprises providing a semiconductor substrate having a metal-containing resist film on the surface of the semiconductor substrate within a processing chamber, wherein the organometallic material is formed on one or more inner surfaces of the processing chamber. The method further comprises the steps of: exposing one or more inner surfaces of the processing chamber to a first non-plasma etching gas to remove a first portion of the organometallic material; exposing one or more inner surfaces of the processing chamber to a non-plasma modifying gas; and exposing one or more inner surfaces of the processing chamber to a second non-plasma etching gas to remove a second portion of the organometallic material.

[0009] In some implementations, the first non-plasma etching gas is the same as the second non-plasma etching gas. In some implementations, the first non-plasma etching gas and the second non-plasma etching gas each contain a halide-containing gas. In some implementations, the first non-plasma etching gas and the second non-plasma etching gas each contain hydrogen bromide (HBr) or hydrogen chloride (HCl). In some implementations, the non-plasma reforming gas contains oxygen, nitrogen, water vapor, hydrogen chloride, chlorine, boron trichloride, hydrogen fluoride, fluorine, nitrogen trifluoride, carbon tetrafluoride, hydrogen bromide, bromine, carbon dioxide, carbon monoxide, air, or a mixture thereof. In some implementations, the non-plasma reforming gas contains air. In some implementations, the method further includes the step of repeating the operation of exposing one or more inner surfaces of the processing chamber to the non-plasma reforming gas and the second non-plasma etching gas for one or more cycles until the organometallic material is removed or substantially removed from one or more inner surfaces of the processing chamber. In some implementations, the number of cycles includes approximately 1 to 5 cycles. In some implementations, one or more inner surfaces of the processing chamber from which the organometallic material is removed include the chamber walls, floor, and ceiling. In some implementations, one or more inner surfaces of the processing chamber from which the organometallic material is removed further include a foreline, pump exhaust, and a detoxification system. In some implementations, the steps of exposing one or more inner surfaces of the processing chamber to a first non-plasma etching gas and exposing one or more surfaces of the processing chamber to a second non-plasma etching gas are performed at a high temperature, which is approximately -15°C to approximately 200°C. In some implementations, the non-plasma modifying gas is configured to form a decomposed residue of the organometallic material, and the second non-plasma etching gas is configured to form volatile products together with the decomposed residue of the organometallic material.In some implementations, the step of exposing one or more inner surfaces to a first non-plasma etching gas converts the unremoved portion of the organometallic material into non-volatile byproducts, and the non-plasma modifying gas modifies the non-volatile byproducts to reduce their resistance to etching by a second non-plasma etching gas, or the non-plasma modifying gas removes a portion of the non-volatile byproducts and modifies a portion of the non-volatile byproducts to reduce their resistance to etching by a second non-plasma etching gas. In some implementations, the metal-containing resist film comprises a metal oxide-containing EUV photoresist material. In some implementations, the organometallic material comprises at least tin oxide. In some implementations, the step of providing a semiconductor substrate comprises depositing a metal-containing resist film on the surface of the semiconductor substrate in a processing chamber. In some implementations, the step of providing a semiconductor substrate comprises baking the metal-containing resist film on the surface of the semiconductor substrate in a processing chamber. In some implementations, the step of providing a semiconductor substrate comprises dry developing the metal-containing resist film on the surface of the semiconductor substrate in a processing chamber.

[0010] A method for cleaning a processing chamber is also provided herein. The method comprises providing a semiconductor substrate having a metal-containing resist film on the surface of the semiconductor substrate within a processing chamber, wherein the organometallic material is formed on one or more inner surfaces of the processing chamber. The method further comprises the steps of: exposing one or more inner surfaces of the processing chamber to an etching gas containing a halide-containing gas to remove a first portion of the organometallic material; exposing one or more inner surfaces of the processing chamber to a reforming gas containing oxygen, nitrogen, water vapor, carbon dioxide, carbon monoxide, or a mixture thereof; and exposing one or more inner surfaces of the processing chamber to the etching gas to remove a second portion of the organometallic material.

[0011] In some implementations, the method further includes the step of repeating, in one or more cycles, an operation in which one or more inner surfaces are exposed to a reforming gas and an etching gas until an organometallic material is removed or substantially removed from one or more inner surfaces of the processing chamber.

[0012] Apparatus for cleaning a processing chamber is also provided herein. The apparatus includes a processing chamber having a substrate support, the substrate support configured to support a semiconductor substrate including a metal-containing resist film formed on the surface of a semiconductor substrate. The apparatus further includes a vacuum line coupled to the processing chamber, a gas line coupled to the processing chamber, and a controller. The controller consists of commands for performing the following operations: providing a semiconductor substrate into the processing chamber, wherein an organometallic material is formed on one or more inner surfaces of the processing chamber; exposing one or more inner surfaces of the processing chamber to a first non-plasma etching gas to remove a first portion of the organometallic material; exposing one or more inner surfaces of the processing chamber to a non-plasma modifying gas to remove a second portion of the organometallic material.

[0013] In some implementations, the apparatus further includes a foreline coupled to the processing chamber, a pump exhaust coupled to the processing chamber, and a detoxification system coupled to the processing chamber, wherein one or more inner surfaces of the processing chamber from which the organometallic material is removed include the foreline, vacuum line, pump exhaust, and detoxification system. In some implementations, the first non-plasma etching gas is the same as the second non-plasma etching gas. [Brief explanation of the drawing]

[0014] [Figure 1] This is a flowchart illustrating exemplary methods for depositing and developing metal-containing resists in several implementation configurations. [Figure 2]A flowchart of an exemplary method for performing multi-stage thermal chamber cleaning according to some implementations. [Figure 3A] A schematic cross-sectional view of various processing stages of multi-stage thermal chamber cleaning according to some implementations. [Figure 3B] A schematic cross-sectional view of various processing stages of multi-stage thermal chamber cleaning according to some implementations. [Figure 3C] A schematic cross-sectional view of various processing stages of multi-stage thermal chamber cleaning according to some implementations. [Figure 3D] A schematic cross-sectional view of various processing stages of multi-stage thermal chamber cleaning according to some implementations. [Figure 3E] A schematic cross-sectional view of various processing stages of multi-stage thermal chamber cleaning according to some implementations. [Figure 3F] A schematic cross-sectional view of various processing stages of multi-stage thermal chamber cleaning according to some implementations. [Figure 4A] A schematic cross-sectional view of various processing stages for removing a metal-containing EUV photoresist material from the chamber wall of a processing chamber according to some implementations. [Figure 4B] A schematic cross-sectional view of various processing stages for removing a metal-containing EUV photoresist material from the chamber wall of a processing chamber according to some implementations. [Figure 4C] [ A schematic cross-sectional view of various processing stages for removing a metal-containing EUV photoresist material from the chamber wall of a processing chamber according to some implementations. [Figure 4D] A schematic cross-sectional view of various processing stages for removing a metal-containing EUV photoresist material from the chamber wall of a processing chamber according to some implementations. [Figure 5] A schematic diagram of an exemplary processing station suitable for maintaining a low-pressure environment suitable for performing a method according to a particular disclosed implementation. [Figure 6] A schematic diagram of an exemplary multi-station processing tool suitable for performing various operations according to a particular disclosed implementation. [Figure 7] This is a schematic cross-sectional view of an exemplary inductively coupled plasma apparatus for implementing the specific implementation and operation described herein. [Figure 8] This figure shows a semiconductor process cluster tool architecture having a vacuum integrated deposition and patterning module that interfaces with a vacuum transport module, suitable for implementing the processes described herein. [Modes for carrying out the invention]

[0015] In this disclosure, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially manufactured integrated circuit” are used interchangeably. Those skilled in the art will understand that the term “partially manufactured integrated circuit” can refer to a silicon wafer in any of the many stages of integrated circuit manufacturing. Wafers or substrates used in the semiconductor device industry typically have a diameter of 200 mm, 300 mm, or 450 mm. The following detailed description assumes that this disclosure is implemented on a wafer. However, this disclosure is not limited in that way. Workpieces may vary in shape, size, and material. In addition to semiconductor wafers, other workpieces on which this disclosure can be utilized include various articles such as printed circuit boards.

[0016] This disclosure generally relates to the field of semiconductor processing. In certain embodiments, this disclosure relates to processes and apparatus for processing photoresists (e.g., EUV-sensitive metal and / or metal oxide-containing photoresists) for removing metal oxide-containing materials from a processing chamber in the context of EUV patterning or other wavelength patterning situations. While the following description may focus on EUV photoresists, it will be apparent that the photoresists described herein may also be suitable for use with radiation of other wavelengths, and the techniques and apparatus described herein are not limited to EUV photoresist manufacturing.

[0017] This specification provides detailed references to specific embodiments of the Disclosure. Examples of specific embodiments are shown in the accompanying drawings. While the Disclosure is described in relation to these specific embodiments, it will be understood that the Disclosure is not intended to be limited to such specific embodiments. Rather, it is intended to cover alternatives, modifications, and equivalents that may fall within the spirit and scope of the Disclosure. The following description includes numerous specific details to provide a complete understanding of the Disclosure. The Disclosure may be implemented without some or all of these specific details. In other examples, well-known process operations are not described in detail so as not to unnecessarily obscure the Disclosure.

[0018] Introduction Thin film patterning in semiconductor processing is often a crucial step in semiconductor manufacturing. Patterning includes lithography. In conventional photolithography, such as 193nm photolithography, a pattern is printed by emitting photons from a photon source onto a mask, which in turn triggers a chemical reaction within the photoresist, and after development, specific parts of the photoresist are removed to form the pattern.

[0019] Advanced technology nodes (as defined by the International Semiconductor Technology Roadmap) include 22nm, 16nm, and later nodes. At the 16nm node, for example, the width of a typical via or line in a damascene structure is typically around 30nm or less. Scaling features on advanced semiconductor integrated circuits (ICs) and other devices is driving lithography to improve resolution.

[0020] Extreme ultraviolet (EUV) lithography can extend lithography techniques by using shorter wavelengths for the imaging source than can be achieved with conventional photolithography methods. State-of-the-art lithography tools, also called scanners, can use EUV light sources with wavelengths of approximately 10–20 nm, or 11–14 nm, for example, 13.5 nm. EUV radiation is strongly absorbed by a wide range of solid and fluid materials, including quartz and water vapor, and therefore operates in a vacuum.

[0021] EUV lithography utilizes an EUV resist that is patterned to form a mask for use when etching an underlying layer. The EUV resist may be a polymer-based chemically amplified resist (CAR) manufactured by liquid-based spin-on technology. An alternative to CAR is a directly photopatternable metal oxide-containing film, such as those available from Inpria, Inc. in Corvallis, Oregon, and described, for example, in U.S. Patent Application Publication 2017 / 0102612, U.S. Patent Application Publication 2016 / 021660, and U.S. Patent Application Publication 2016 / 0116839, which are incorporated herein by reference for disclosure of at least a photopatternable metal oxide-containing film. Such films can be manufactured by spin-on technology or dry deposition. Metal oxide-containing films can be patterned directly (i.e., without using a separate photoresist) by EUV exposure in a vacuum atmosphere, providing a patterning resolution of less than 30 nm, as described in, for example, U.S. Patent No. 9,996,004 entitled “EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARDMASKS,” granted on 12 June 2018, and / or International Patent Application No. PCT / US2019 / 31618 entitled “METHODS FOR MAKING EUV PATTERNABLE HARD MASKS,” filed on 9 May 2019, the disclosure relating to the composition, deposition, and patterning of directly photopatternable metal oxide films for forming EUV resist masks, which are incorporated herein by reference. Generally, patterning involves exposing an EUV resist with EUV radiation to form a photopattern within the resist, and then developing it to remove a portion of the resist according to the photopattern to form a mask.

[0022] This disclosure relates to lithography patterning techniques and materials exemplified by EUV lithography, but it should be understood that it is also applicable to other next-generation lithography techniques. In addition to EUV, including the standard 13.5 nm EUV wavelength currently in use and under development, the radiation source most relevant to such lithography is DUV (Deep UV), which generally refers to the use of a 248 nm or 193 nm excimer laser source, X-rays formally including EUV in the lower energy range of the X-ray range, and an electron beam capable of covering a wide energy range. Specific methods may depend on the particular materials and applications used in the semiconductor substrate and the final semiconductor device. Therefore, the methods described in this application are merely examples of methods and materials that may be used in the art.

[0023] These direct-photopatternable EUV resists may consist of, or contain, high-EUV absorbance metals, as well as their organometallic oxides / hydroxides and other derivatives. During EUV exposure, EUV photons and the resulting secondary electrons can induce chemical reactions, such as β-H elimination reactions, in SnOx-based resists (and other metal oxide-based resists), providing chemifunctionality that promotes crosslinking and other changes in the resist film. These chemical changes can then be utilized in the development process to selectively remove exposed or unexposed areas of the resist film, creating an etching mask for pattern transfer.

[0024] Metal oxide-containing films can be directly patterned (i.e., without using a separate photoresist) by EUV exposure in a vacuum atmosphere, providing a patterning resolution of less than 30 nm, for example, as described in U.S. Patent No. 9,996,004, issued June 12, 2018, entitled “EUV PHOTOPATTERNING OF VAPOR-DEPOSITED METAL OXIDE-CONTAINING HARDMASKS,” the disclosure relating to the composition, deposition, and patterning of directly photopatternable metal oxide films for forming at least EUV resist masks, which are incorporated herein by reference. Generally, patterning involves exposing an EUV resist with EUV radiation to form a photopattern within the resist, and then developing it to remove a portion of the resist according to the photopattern to form a mask.

[0025] This disclosure relates to lithography patterning techniques and materials exemplified by EUV lithography, but it should be understood that it is also applicable to other next-generation lithography techniques. In addition to EUV, including the standard 13.5 nm EUV wavelength currently in use and under development, the radiation source most relevant to such lithography is DUV (Deep UV), which generally refers to the use of a 248 nm or 193 nm excimer laser source, X-rays formally including EUV in the lower energy range of the X-ray range, and an electron beam capable of covering a wide energy range. Such a method involves contacting a substrate having exposed hydroxyl groups with a hydrocarbyl-substituted tin capping agent to form a hydrocarbyl-terminated SnOx film as an imaging / PR layer on the surface of the substrate. Specific methods may depend on the particular materials and applications used in the semiconductor substrate and the final semiconductor device. Therefore, the methods described in this application are merely examples of methods and materials that may be used in the art.

[0026] Direct photopatternable EUV resists may consist of or contain metals and / or metal oxides mixed within an organic component. Metals / metal oxides are highly promising because they can enhance EUV photon adsorption, generate secondary electrons, and / or exhibit increased etching selectivity for underlying film stacks and device layers.

[0027] When manufacturing semiconductor devices, it is crucial that the manufacturing process is accurate and reproducible. Unfortunately, as a semiconductor manufacturing reaction chamber processes multiple substrates over time, the processing conditions and chemical reactions within the chamber change. During the deposition and coating of metal-containing resist films onto semiconductor substrates, for example, during dry deposition as described herein, some unintended deposition of metal-containing material may occur on the chamber surface. After performing several processing operations within the processing chamber, the unintended formation of metal-containing material on the chamber surface may reach a level that makes the metal-containing material prone to flaking and delamination. In some cases, particles and film impurities originating from metal-containing material on the inner surface of the processing chamber may fall onto the substrate surface during processing. For example, particles and film impurities may originate from the inner chamber walls, ceiling, showerhead, substrate support, lift pins, gas lines, nozzles, etc. Such particles and film impurities flaking or delaminating from the inner surface of the processing chamber can lead to contamination and defect problems in the semiconductor substrate. This contamination can cause contamination of the semiconductor substrate itself, as well as contamination of downstream processing tools such as patterning (scanner) and developing tools. Furthermore, the accumulation of metal-containing materials can shift deposition conditions through gas release or absorption from precursor materials.

[0028] Traditionally, the removal of unintended deposits on the inner surface of a processing chamber can be done by manually opening the chamber and mechanically scrubbing / wiping the interior with one or more cleaning agents. In some cases, these methods may involve replacing parts and can take more than a day to perform chamber maintenance. Such methods are time-consuming, costly, and may not be effective.

[0029] Multi-stage heat chamber cleaning This disclosure provides a dry cleaning method for metal-containing materials from the inner surface of a processing chamber. The dry cleaning can be performed using a multi-stage thermal approach, in which a portion of the metal-containing material formed on the inner surface of the processing chamber is removed by a first heat treatment using a non-plasma etching gas. The remaining portion of the metal-containing material is modified or partially removed by a second heat treatment using a non-plasma modifying gas. The remaining portion of the metal-containing material is removed or substantially removed by a third heat treatment using the same non-plasma etching gas as the first heat treatment or a different etching gas. The non-plasma etching gas may include halogenated chemicals. The non-plasma modifying gas may include oxygen, nitrogen, water vapor, hydrogen chloride, chlorine, boron trichloride, hydrogen fluoride, fluorine, carbon tetrafluoride, nitrogen trifluoride, hydrogen bromide, bromine, carbon dioxide, carbon monoxide, air, or mixtures thereof. In some implementations, the multi-stage thermal chamber cleaning is a periodic dry cleaning method in which the second and third heat treatments are repeated in one or more cycles. These cycles may be repeated until the metal-containing material is completely removed from the inner surface of the processing chamber. The multi-stage heat treatment of this disclosure removes the metal-containing material from the inner surface of the processing chamber without impacting it with plasma. Dry cleaning of the processing chamber may be performed in any processing chamber used in deposition, bevel edge and / or back surface cleaning, exposure, bake, develop, or etching operations.

[0030] Figure 1 is a flowchart of an exemplary method for depositing and developing a metal-containing photoresist in several configurations. Specifically, the flowchart of process 100 represents dry chamber cleaning during the deposition, development, and other photolithography operations of the metal-containing photoresist. The operations of process 100 may be performed in different orders and / or with different, fewer, or additional operations. Embodiments of process 100 can be illustrated with reference to Figures 2A-2B, 3A-3F, and 4A-4D. One or more operations of process 100 can be performed using the apparatus described in any one of Figures 5-8. In some embodiments, the operations of process 100 can be performed, at least in part, according to software stored on one or more non-temporary computer-readable media. In some configurations, dry chamber cleaning may be performed after deposition, bevel edge and / or back surface cleaning, post-coating bake, exposure, post-exposure bake, or dry development.

[0031] In block 102 of process 100, a layer of photoresist is deposited. This may be either a dry deposition process such as vapor deposition or a wet process such as spin-on deposition.

[0032] The photoresist may be a metal-containing EUV resist. EUV-sensitive metal or metal oxide-containing films may be deposited on a semiconductor substrate by any suitable technique, including wet (e.g., spin-on) or dry (e.g., CVD) deposition techniques. For example, the described process for organotin oxide-based EUV photoresist compositions has been demonstrated and is applicable to both commercially spin-coatable formulations (e.g., those available from Inpria, Inc. in Corvallis, Oregon) and formulations applied using the dry vacuum deposition techniques further described below.

[0033] The semiconductor substrate may include any material structure suitable for photolithography, particularly for the manufacture of integrated circuits and other semiconductor devices. In some embodiments, the semiconductor substrate is a silicon wafer. The semiconductor substrate may be a silicon wafer with irregular surface topography and features created on it ("underlying features"). As referred to herein, the "surface" of the substrate is the surface on which the film of the present disclosure is deposited or which is exposed to EUV during processing. The underlying features may include areas where material has been removed (e.g., by etching) or added (e.g., by deposition) during processing prior to carrying out the method of the present disclosure. Such conventional processing is an iterative process in which two or more layers of features are formed on the substrate, and may include the method of the present disclosure or other processing methods.

[0034] EUV-sensitive thin films may be deposited on semiconductor substrates, and such films can function as resists for subsequent EUV lithography and processing. Such EUV-sensitive thin films, upon exposure to EUV, undergo changes such as the loss of bulky pendant substituents bonded to metal atoms in low-density M-OH-rich materials, and contain materials that allow for their crosslinking into higher-density MOM-bonded metal oxide materials. EUV patterning creates regions of the film with altered physical or chemical properties compared to unexposed regions. These properties can be utilized in subsequent processing, such as to dissolve either the unexposed or exposed regions, or to selectively deposit material in either the exposed or unexposed regions. In some implementations, the unexposed film has a more hydrophobic surface than the exposed film under conditions under which such subsequent processing is performed. For example, material removal can be achieved by leveraging differences in the chemical composition, density, and crosslinking of the films. Removal can be carried out by dry processes, as further described below.

[0035] The thin film is, in various implementation forms, an organometallic material, such as an organotin material containing tin oxide, or other metal oxide materials / groups. The organometallic compound may be prepared by a gas-phase reaction between an organometallic precursor and a reactant. In various implementation forms, the organometallic compound is formed by mixing a specific combination of an organometallic precursor having a bulky alkyl group or fluoroalkyl group with a reactant, polymerizing the mixture in the gas phase, and depositing a low-density EUV-sensitive material on a semiconductor substrate.

[0036] In various implementation forms, the organometallic precursor contains at least one alkyl group on each metal atom that can withstand a gas-phase reaction, while other ligands or ions coordinated to the metal atom can be replaced by a reactant. Examples of the organometallic precursor include the formula: M a R b L c (Formula 1) In the formula, M is an element having a high patterning radiation absorption cross-section, R is alkyl, such as C n H 2n+1 , preferably n = 1 to 6, L is a ligand, ion or other group that is reactive with a reactant, and a ≥ 1, b ≥ 1, c ≥ 1.

[0037] In various implementation forms, M has an atomic absorption cross-sectional area of 1×10 7 cm 2 / mol or more. M may be selected from the group consisting of, for example, tin, hafnium, tellurium, bismuth, indium, antimony, iodine, germanium, and combinations thereof. In some implementation forms, M is tin. R is, for example, of the formula C n F x H (2n+1)It may be fluorinated, having a β-hydrogen or β-fluorine. In various implementations, R has at least one β-hydrogen or β-fluorine. For example, R may be selected from the group consisting of methyl, ethyl, i-propyl, n-propyl, t-butyl, i-butyl, n-butyl, sec-butyl, n-pentyl, i-pentyl, t-pentyl, sec-pentyl and mixtures thereof. L may be any moiety that is readily substituted by the reaction partner to form an M-OH moiety, such as a moiety selected from the group consisting of amines (e.g., dialkylamino, monoalkylamino), alkoxy, carboxylate, halogen and mixtures thereof.

[0038] The organometallic precursor may be any of a wide variety of candidate metal-organic precursors. For example, when M is tin, such precursors include t-butyltris(dimethylamino)tin, i-butyltris(dimethylamino)tin, n-butyltris(dimethylamino)tin, sec-butyltris(dimethylamino)tin, i-propyl(tris)dimethylaminotin, n-propyltris(dimethylamino)tin, ethyltris(dimethylamino)tin, and similar alkyl(tris)(t-butoxy)tin compounds, such as t-butyltris(t-butoxy)tin. In some implementations, the organometallic precursor is partially fluorinated.

[0039] The reaction partner has the ability to substitute a reactive group, ligand, or ion (e.g., L in Formula 1 above) to link at least two metal atoms via chemical bonding. The reaction partner may include water, peroxides (e.g., hydrogen peroxide), di- or polyhydroxy alcohols, fluorinated di- or polyhydroxy alcohols, fluorinated glycols, and other sources of hydroxyl groups. In various implementations, the reaction partner reacts with the organometallic precursor by forming oxygen bridges between adjacent metal atoms. Other possible reaction partners include hydrogen sulfide and hydrogen disulfide, which can bridge metal atoms via sulfur bridges.

[0040] The thin film may include, in addition to organometallic precursors and reaction partners, optional materials for modifying the chemical or physical properties of the film, such as modifying the film's sensitivity to EUV or increasing its etching resistance. Such optional materials may be introduced during vapor formation before deposition on the semiconductor substrate, after thin film deposition, or both. In some implementations, a mild, remote H2 plasma may be introduced to replace some Sn-L bonds with Sn-H bonds, thereby increasing the reactivity of the resist under EUV.

[0041] In various implementation configurations, EUV patternable films are fabricated and deposited on semiconductor substrates using deposition apparatus and processes known in the art. In such processes, polymerized organometallic materials are formed on the surface of the semiconductor substrate either in the gas phase or in situ. Suitable processes include, for example, chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with CVD components, such as discontinuous ALD where the metal precursor and reaction partners are separated either in time or space.

[0042] Generally, the method includes mixing a vapor stream of organometallic precursors with a vapor stream of a reaction partner to form a polymerized organometallic material, and depositing the organometallic material onto the surface of a semiconductor substrate. In some implementations, two or more organometallic precursors are included in the vapor stream. In some implementations, two or more reaction partners are included in the vapor stream. As will be understood by those skilled in the art, the mixing and deposition aspects of the process may be simultaneous in a substantially continuous process.

[0043] In an exemplary continuous CVD process, two or more gas streams of organometallic precursors and reaction partners are introduced into the deposition chamber of a CVD apparatus via separate inlet pathways, where they mix and react in the gas phase to form an aggregated polymer material (e.g., via metal-oxygen-metal bond formation). The streams may be introduced, for example, using separate inlets or dual plenum showerheads. The apparatus is configured to allow the streams of organometallic precursors and reaction partners to mix in the chamber, enabling the organometallic precursors and reaction partners to react and form a polymerized organometallic material. Without limiting the mechanism, function, or utility of this technique, it is conceivable that products from such gas-phase reactions become heavier in molecular weight as metal atoms are crosslinked by reaction partners, and then condense or otherwise deposit on a semiconductor substrate. In various packaging configurations, the steric hindrance of bulky alkyl groups prevents the formation of dense networks, resulting in smooth, amorphous, low-density films.

[0044] In some implementations, EUV patternable films are fabricated and deposited on semiconductor substrates using wet deposition apparatuses and processes, among those known in the art. Organometallic materials are formed, for example, by spin coating on the surface of a semiconductor substrate.

[0045] The thickness of the EUV patternable film formed on the surface of a semiconductor substrate can vary depending on the surface properties, the materials used, and the processing conditions. In various mounting configurations, the film thickness may range from 0.5 nm to 100 nm and may be thick enough to absorb most of the EUV light under EUV patterning conditions. EUV patternable films can accommodate absorption of 30% or more, which significantly reduces the number of available EUV photons towards the bottom of the film. Higher EUV absorption results in more crosslinking and densification near the top of the EUV-exposed film compared to the bottom of the film. Insufficient crosslinking can make the resist more susceptible to lift-off or collapse during wet development, a risk not present in dry development. All-dry lithography techniques facilitate more efficient utilization of EUV photons by using more opaque resist films. Efficient utilization of EUV photons can occur with EUV patternable films that have higher overall absorption, but it should be understood that in some cases, the EUV patternable film may have less than 30% absorption. For comparison, the maximum total absorption of most other resist films is less than 30% (e.g., 10% or less, or 5% or less) so that the resist material at the bottom of the resist film is sufficiently exposed. In some implementations, the film thickness is 10nm to 40nm or 10nm to 20nm. Without limiting the mechanism, function, or utility of the present disclosure, unlike wet spin coating processes in the art, the process of the present disclosure is considered to have fewer limitations on the surface adhesion properties of the substrate and is therefore applicable to a wide variety of substrates. Furthermore, as described above, the deposited film can closely conform to surface features, which is advantageous when forming a mask on a substrate such as a substrate with underlying features without "filling" or planarizing such features.

[0046] In addition to depositing a metal-containing EUV resist thin film on a semiconductor substrate in block 102 of process 100, some metal-containing material may be formed on the inner surfaces and downstream portions of the processing chamber. The inner surfaces may include the chamber walls, floor, and ceiling of the processing chamber. Other inner surfaces may include the showerhead, nozzles, ESC / pedestal and substrate support surface, as well as through tunnels or passages connecting the processing chamber. The metal-containing material may be formed as a result of a dry deposition process such as CVD or ALD. The thickness of the metal-containing material may increase over time as additional processing (e.g., deposition) operations are performed within the processing chamber. The metal-containing material tends to peel off from the inner surfaces of the processing chamber, shedding or delaminating particles and causing contamination in downstream processes. The accumulation of metal-containing material may also shift the deposition conditions via gas release or absorption of precursor material.

[0047] In block 150 of process 100, dry chamber cleaning is performed after the deposition of the metal-containing EUV resist thin film in block 102 of process 100. This makes it possible to perform deposition and dry cleaning in the same processing chamber. However, it will be understood that in some implementations, dry chamber cleaning may be performed in a different processing chamber than the deposition operation. In fact, since residues (i.e., metal-containing material formed on the inner surface of the processing chamber) may also be formed in the chamber in which any of these operations are performed, whether in the same chamber as the deposition chamber or not, dry chamber cleaning may be performed after bevel edge and / or back surface cleaning, baking, developing, or etching operations.

[0048] The dry deposited material removed is generally composed of Sn, O, C, and N, but the same cleaning technique can be extended to other metal oxide resists and material films. Furthermore, this technique can be used for film delamination and photoregistry work.

[0049] In block 104, an optional cleaning process is performed to clean the back surface and / or bevel edge of the semiconductor substrate. Back surface and / or bevel edge cleaning may non-selectively etch the EUV resist film to equally remove films with varying levels of oxidation or crosslinking on the substrate back surface and bevel edge. During the application of an EUV patternable film by either wet or dry deposition, some unintended deposition of resist material may occur on the substrate bevel edge and / or back surface. Unintended deposition can later cause unwanted particles to migrate to the top surface of the semiconductor substrate, resulting in particle defects. Furthermore, this bevel edge and back surface deposition can cause downstream processing problems, including contamination of patterning (scanner) and developing tools. Conventionally, the removal of this bevel edge and back surface deposition has been performed by wet cleaning techniques. In the case of spin-coated photoresist materials, this process is called edge bead removal (EBR) and is performed by guiding a flow of solvent from above and below the bevel edge while the substrate is spinning. The same process can be applied to soluble organotin oxide resists deposited by vapor deposition techniques.

[0050] Substrate bevel edge and / or back surface cleaning may be a dry cleaning process. In some configurations, the dry cleaning process includes vapor and / or plasma having one or more of the following gases: HBr, HCl, BCl3, SOCl2, Cl2, BBr3, H2, O2, PCl3, CH4, methanol, ammonia, formic acid, NF3, and HF. In some configurations, the dry cleaning process may use the same chemicals as the dry developing process described herein. For example, bevel edge and / or back surface cleaning may use a hydrogen halide developing chemistry. In the case of the bevel edge and / or back surface cleaning process, the vapor and / or plasma must be limited to specific areas of the substrate so that only the back surface and bevel are reliably removed without film degradation on the front surface of the substrate.

[0051] Processing conditions may be optimized for bevel edge and / or back surface cleaning. In some implementations, higher temperatures, higher pressures, and / or higher reaction flow rates can result in increased etching rates. Suitable processing conditions for dry bevel edge and back surface cleaning may be, depending on the photoresist film and its composition and properties, a reaction flow rate of 100 to 10,000 sccm (e.g., 500 sccm of HCl, HBr, HI or H2 and Cl2 or Br2, BCl3 or H2, or other halogen-containing compounds), a temperature of -15°C to 200°C (e.g., 80°C), a pressure of 20 to 1,000 mTor (e.g., 100 mTor) or 50 to 765 Tor (e.g., 760 Tor), a plasma output of 0 to 500 W at high frequency (e.g., 13.56 MHz, 2.45 GHz, 40 kHz, 2 MHz), and a time of about 10 to 100 seconds. Bevel and / or back cleaning can be achieved using Coronaus® tools, available from Lam Research Corporation in Fremont, California, but a wider range of processing conditions may be used depending on the capabilities of the processing reactor.

[0052] Bevel edge and / or back surface cleaning may be alternatively extended to complete photoresist removal or photoresist "rework," where the applied EUV photoresist is removed, for example, if the original photoresist is damaged or otherwise defective, and the semiconductor substrate is prepared for reapplication of the photoresist. The photoregistry work should be achieved without damaging the underlying semiconductor substrate, and therefore oxygen-based etching should be avoided. Instead, variations of organic vapor chemistry or halogen-containing chemistry may be used. It will be understood that the photoregistry work can be applied at any stage during process 100. Thus, the photoregistry work may be applied after deposition, after bevel edge and / or back surface cleaning, after PAB treatment, after EUV exposure, after PEB treatment, after development, or after hard bake. In some implementation configurations, the exposed and unexposed areas of the photoresist are removed non-selectively, but the photoregistry work may be performed selectively on the underlying layer.

[0053] In some implementations, the photoregistry work process includes vapor and / or plasma having one or more of the following gases: HBr, HCl, HI, BCl3, Cl2, BBr3, H2, PCl3, CH4, methanol, ammonia, formic acid, NF3, and HF. In some implementations, the photoregistry work may use the same chemical reactions as the dry chamber cleaning process described herein. For example, the photoregistry work may use hydrogen halide chemistry.

[0054] Processing conditions may be optimized for photoregistry work. In some implementations, higher temperatures, higher pressures, and / or higher reaction flow rates can result in increased etching rates. Suitable processing conditions for photoregistry work, depending on the photoresist film, composition, and properties, include: a reactant flow rate of 100-5000 sccm (e.g., 500 sccm of HCl, HBr, HI, BCl3 or H2 and Cl2 or Br2), a temperature of -20°C to 140°C (e.g., 80°C), a pressure of 200-50,000 mTor (e.g., 300 mTor), or a pressure of 50-765 Tor (e.g., 760 Tor), a plasma output of 0-2000 W (e.g., 500 W) at high frequency (e.g., 13.56 MHz, 2.45 GHz, 40 kHz, 2 MHz), and 0-200 V. b The wafer bias may be 0.5 (higher biases can be used for harder substrate materials), and the processing time may be approximately 20 seconds to 30 minutes. These conditions are suitable for some processing reactors, such as the Kiyo etching tool available from Lam Research Corporation in Fremont, California, but please note that a wider range of processing conditions can be used depending on the capabilities of the processing reactor.

[0055] In block 150 of process 100, the dry chamber cleaning operation may be performed after the bevel edge and / or back surface cleaning in block 104 of process 100. This makes it possible to perform both the bevel edge and / or back surface cleaning and the dry chamber cleaning within the same processing chamber. However, it will be understood that in some implementations, the dry chamber cleaning may be performed in a different processing chamber than the bevel edge and / or back surface cleaning.

[0056] In block 106 of process 100, after the deposition of the metal-containing EUV resist film and before EUV exposure, an optional post-application bake (PAB) is performed. The PAB treatment includes a combination of heat treatment, chemical exposure, and moisture to increase the EUV sensitivity of the metal-containing EUV resist film and may reduce the EUV dose for developing a pattern in the metal-containing EUV resist film. The PAB treatment temperature may be adjusted and optimized to increase the sensitivity of the metal-containing EUV resist film. For example, the treatment temperature may be about 90°C to about 200°C or about 150°C to about 190°C. In some implementations, the PAB treatment may be performed at a pressure between atmospheric pressure and vacuum, and for a treatment time of about 1 to 15 minutes, for example, about 2 minutes. In some implementations, the PAB treatment is performed at a temperature of about 100°C to 230°C for about 1 to 5 minutes.

[0057] In block 150 of process 100, a dry chamber cleaning operation may be performed after the PAB treatment in block 106 of process 100. This makes it possible to perform baking and dry chamber cleaning in the same processing chamber. However, it will be understood that in some implementations, dry chamber cleaning may be performed in a different processing chamber than the PAB treatment.

[0058] In block 108 of process 100, the metal-containing EUV resist film is exposed to EUV radiation to develop the pattern. Generally speaking, EUV exposure causes changes in the chemical composition and crosslinking of the metal-containing EUV resist film, creating etching-selective contrasts that can be used for subsequent development.

[0059] Next, the metal-containing EUV resist film may be patterned by exposing regions of the film to EUV light, typically under relatively high vacuum. Useful EUV apparatus and imaging methods described herein include those known in the art. In particular, as described above, EUV patterning creates exposed regions of the film, which have altered physical or chemical properties compared to unexposed regions. For example, in the exposed regions, β-hydride elimination may leave reactive and available metal hydride functional groups, which undergo metal-carbon bond cleavage and are converted to hydroxide and crosslinked metal oxide groups via metal-oxygen crosslinking during a subsequent post-exposure bake (PEB) process. This process can be used to generate chemical contrast for development as a negative-type resist. Generally, a greater number of β-H groups in the alkyl group results in a more sensitive film. This can also be described as more branched and weaker Sn-C bonds. After exposure, the metal-containing EUV resist film may be baked to induce further crosslinking of the metal oxide film. The difference in properties between the exposed and unexposed regions may be utilized in subsequent processes, such as dissolving the unexposed regions or depositing material on the exposed regions. For example, a metal oxide-containing mask can be formed by developing the pattern using a dry method.

[0060] In particular, in various implementations, hydrocarbyl-terminated tin oxides present on the surface are converted to hydrogen-terminated tin oxides in the exposed region(s) of the imaging layer, especially when exposure is performed in a vacuum using EUV. However, removal of the exposed imaging layer from vacuum to air, or controlled introduction of oxygen, ozone, H2O2, or water, can result in oxidation of surface Sn-H to Sn-OH. The difference in properties between the exposed and unexposed regions may be utilized in subsequent processing, for example, by reacting the irradiated region, unirradiated region, or both with one or more reagents to selectively add material to or remove material from the imaging layer.

[0061] This does not limit the mechanism, function, or usefulness of this technology, for example, 10 mJ / cm².2 ~100 mJ / cm 2 EUV exposure at this dose induces cleavage of Sn-C bonds, resulting in the loss of alkyl substituents, reduced steric hindrance, and the breakdown of low-density films. Furthermore, the reactive metal-H bonds generated by the β-hydride elimination reaction react with adjacent active groups such as hydroxyls in the film, leading to further crosslinking and densification, creating a chemical contrast between the exposed and unexposed regions.

[0062] A photo-patterned metal-containing EUV resist is provided following exposure of a metal-containing EUV resist film to EUV light. The photo-patterned metal-containing EUV resist includes EUV-exposed and unexposed regions.

[0063] In block 150 of process 100, a dry chamber cleaning operation may be performed after EUV exposure in block 108 of process 100. This makes it possible to perform exposure and dry chamber cleaning within the same processing chamber. However, in some implementations, it will be understood that dry chamber cleaning may be performed in a different processing chamber from the EUV exposure.

[0064] In block 110 of process 100, an optional post-exposure bake (PEB) is performed to further enhance the contrast of the etching selectivity of the photopatterned metal-containing EUV resist. The photopatterned metal-containing EUV resist can be heat-treated in the presence of various chemical species to facilitate crosslinking of the EUV exposure areas, or simply baked in ambient air on a hot plate at, for example, 100°C to 250°C for 1 to 5 minutes (e.g., 190°C for 2 minutes).

[0065] In various implementations, the bake strategy involves careful control of the bake environment, introduction of reactive gases, and / or careful control of the rate of increase in bake temperature. Examples of useful reactive gases include, for example, air, H2O, H2O2 vapor, CO2, CO, O2, O3, CH4, CH3OH, N2, H2, NH3, N2O, NO, alcohols, acetylacetone, formic acid, Ar, He, or mixtures thereof. The PEB treatment is designed to (1) promote the complete evaporation of organic fragments generated during EUV exposure, (2) oxidize any Sn-H, Sn-Sn, or Sn radical species generated by EUV exposure to metal hydroxides, and (3) promote bridging between adjacent Sn-OH groups to form a more densely bridging network such as SnO2. The bake temperature is carefully selected to achieve optimal EUV lithography performance. If the PEB temperature is too low, bridging will be insufficient, resulting in reduced chemical contrast for development at a given dose. If the PEB temperature is too high, harmful effects can occur, including severe oxidation and film shrinkage in unexposed areas (in this example, areas removed by developing the patterned film to form a mask), as well as undesirable interdiffusion at the interface between the photopatterned metal-containing EUV resist and the underlying layer, both of which can contribute to loss of chemical contrast and increased defect density due to insoluble scum. The PEB treatment temperature may be about 100°C to about 300°C, about 170°C to about 290°C, or about 200°C to about 240°C. In some implementations, the PEB treatment may be performed at a pressure between atmospheric pressure and vacuum, and for a treatment time of about 1 to 15 minutes, for example, about 2 minutes. In some implementations, the PEB heat treatment may be repeated to further increase etching selectivity.

[0066] In block 150 of process 100, a dry chamber cleaning operation can be performed after the PEB treatment in block 110 of process 100. This makes it possible to perform baking and dry chamber cleaning within the same processing chamber. However, it will be understood that in some implementations, dry chamber cleaning may be performed in a different processing chamber than the PEB treatment.

[0067] In block 112 of process 100, a photopatterned metal-containing EUV resist is developed to form a resist mask. In various configurations, either the exposed areas are removed (positive gradation) or the unexposed areas are removed (negative gradation). In some configurations, development may involve selective deposition on either the exposed or unexposed areas of the photopatterned metal-containing EUV resist, followed by an etching operation. In some configurations, development may be performed by exposure to an etching gas containing a halide-containing chemical. In some configurations, development may be performed without plasma collision. Alternatively, development may be performed using one or more streams of halide-containing etching gas activated by a remote plasma source or by exposure to remote UV radiation. The photoresist for development may contain elements selected from the group consisting of tin, hafnium, tellurium, bismuth, indium, antimony, iodine, and germanium. The elements may have a high patterning radiation absorption cross-section. In some configurations, the elements may have a high EUV absorption cross-section. In some implementations, metal-containing EUV resists may have an overall absorption rate exceeding 30%. In all-dry lithography processes, this provides more efficient utilization of EUV photons, enabling the development of thicker, more EUV-opaque resists.

[0068] An example of a development process involves subjecting an organotin oxide-containing EUV-sensitive photoresist thin film (e.g., 10-30 nm thick, e.g., 20 nm) to EUV exposure and post-exposure baking, followed by development. The photoresist film may be deposited based on a gas-phase reaction between an organotin precursor, such as isopropyl(tris)(dimethylamino)tin, and water vapor, or it may be a spin-on film containing tin clusters in an organic matrix.

[0069] In block 150 of process 100, dry chamber cleaning may be performed after dry development in block 112 of process 100. This makes it possible to perform dry development and dry chamber cleaning in the same processing chamber. However, it will be understood that in some implementations, dry chamber cleaning may be performed in a different processing chamber than that used for dry development. Furthermore, it will be understood that dry chamber cleaning may be performed in the same or a different processing chamber as the etching operation. The etching operation may be applied to etch the substrate sublayer of a semiconductor substrate.

[0070] In block 114 of process 100, the semiconductor substrate is optionally hard-baked. During hard-baking, the semiconductor substrate is exposed to high temperatures. For example, the semiconductor substrate may be exposed to temperatures of approximately 50°C or higher, approximately 100°C to approximately 300°C, or approximately 170°C to approximately 290°C. Hard-baking can remove residual solvent or etching gas from development.

[0071] Figure 2 is a flowchart illustrating an exemplary method for performing multi-stage thermal chamber cleaning in several implementation configurations. The operation of process 200 may be performed in different orders and / or with different, fewer, or additional operations. Configurations of process 200 can be illustrated with reference to Figures 3A-3F and 4A-4D. One or more operations of process 200 may be performed using the apparatus described in any one of Figures 5-8. In some implementation configurations, the operation of process 200 may be implemented, at least in part, according to software stored on one or more non-temporary computer-readable media.

[0072] In block 202 of process 200, a semiconductor substrate having a metal-containing resist film on its surface is provided in a processing chamber. Furthermore, an organometallic material is formed on one or more inner surfaces of the processing chamber. The organometallic material formed on one or more inner surfaces of the processing chamber may have the same or similar chemical composition as the metal-containing resist film on the semiconductor substrate.

[0073] The metal-containing resist film may be deposited on the surface of a semiconductor substrate in a processing chamber or another chamber (i.e., a deposition chamber), and the metal-containing resist film may be dry or wet deposited on the semiconductor substrate. In some configurations, the metal-containing resist film is provided as a metal-containing resist film that has been photopatterned after development. In some configurations, the metal-containing resist film is provided as a positive or negative resist film having EUV-exposed and non-EUV-exposed regions after EUV exposure. In some configurations, the metal-containing resist film is provided as a metal-containing resist film that can be photopatterned before EUV exposure and development. In some configurations, the metal-containing resist film is a metal-containing EUV resist film, and the metal-containing EUV resist film may be an organometallic oxide or organometallic-containing film. The organometallic oxide film may contain tin oxide. The composition of the metal-containing resist film is described, for example, in International Patent Application PCT / US2019 / 31618, filed on 9 May 2019, which may be incorporated herein by reference in its entirety for any purpose. The method includes a method in which a polymerized organometallic material is generated in the gas phase and deposited on a semiconductor substrate. For example, the elements in the metal-containing resist film may be selected from the group consisting of tin, hafnium, tellurium, bismuth, indium, antimony, iodine, germanium, and combinations thereof.

[0074] The metal-containing resist film may be deposited in the processing chamber or processed (e.g., bake, develop, rework) in the processing chamber. Processing the substrate in the processing chamber may result in the accumulation of unintended resist material over time. In some embodiments, the processing chamber containing the semiconductor substrate may be an exposure chamber. Exposure may result in unintended deposits on the chamber surface. In some embodiments, the processing chamber containing the semiconductor substrate may be a dry deposition chamber. Providing a semiconductor substrate may include dry deposition of a metal-containing resist film on the surface of the semiconductor substrate. Unintended metal-containing material may form on one or more inner surfaces of the processing chamber as an organometallic material. Unintended metal-containing material may form as a result of a dry deposition process such as CVD or ALD. In other embodiments, the processing chamber containing the semiconductor substrate may be a bevel edge and / or back surface cleaning chamber. Without being limited by any theory, unwanted metal-containing resist film may be removed from specific areas of the semiconductor substrate during bevel edge and / or back surface cleaning, but such processing may result in the redeposition of metal-containing material on the inner surfaces of the processing chamber. In some other embodiments, the processing chamber in which the semiconductor substrate is provided may be a PAB processing chamber or a PEB processing chamber. In such cases, the step of providing the semiconductor substrate may include baking a metal-containing resist film onto the surface of the semiconductor substrate within the processing chamber. Unintended metal-containing material may form on one or more inner surfaces of the processing chamber as an organometallic material. For example, baking a metal-containing resist film within a PAB processing chamber or a PEB processing chamber may result in gas release of the material coating the inner surface of the PAB processing chamber or PEB processing chamber. In some other embodiments, the processing chamber in which the semiconductor substrate is provided may be a developing chamber. In such cases, the step of providing the semiconductor substrate may include dry developing the metal-containing resist film onto the surface of the semiconductor substrate.Unintended metal-containing materials may form as organometallic materials on one or more inner surfaces of the processing chamber. For example, dry development may result in the formation of volatile byproducts that are redeposited as metal-containing materials on one or more inner surfaces of the processing chamber.

[0075] As more and more semiconductor substrates are processed within the processing chamber, unintended metal-containing materials may grow on the interior surfaces. These unintended metal-containing materials can form on the chamber walls, ceiling, floor, showerhead surfaces, nozzle surfaces, through tunnels and passages, and substrate support surfaces. They can also form in the forelines, pump exhaust or exhaust lines, and abatement systems. Periodic cleaning is necessary to remove these unintended deposits of metal-containing materials. Cleaning is performed "in-situ," and dry chamber cleaning is performed in the same processing chamber where the unintended metal-containing materials (e.g., organometallic materials) formed.

[0076] Figure 3A is a schematic cross-sectional view of a processing chamber in which a semiconductor substrate is supported on a pedestal. The processing chamber 300 for processing the semiconductor substrate 308 may include a chamber wall 302 enclosing the processing space of the processing chamber 300 and a pedestal 306 for supporting the semiconductor substrate 308. The chamber wall 302 may include a passage 303 connecting the processing chamber 300 to other tools or components such as a vacuum transfer module. In some cases, the processing chamber 300 may further include a showerhead 304 or other gas distributor for introducing a processing gas into the processing chamber 300. The inner surface of the processing chamber 300 may include the chamber wall 302 and other exposed inner surfaces of the chamber components. Other such exposed inner surfaces of the chamber components may include the exposed surface of the pedestal 306, the exposed surface of the showerhead 304, and the passage 303. In some embodiments, the inner surface of the processing chamber 300 may include, for example, aluminum oxide ceramics, anodized aluminum, plastics, alloy C22, yttria coatings, and stainless steel hardware components (generally downstream). The inner surface of the processing chamber 300 is not necessarily resistant to plasma and halogen vapors such as hydrogen halides, but is typically composed of a material that is stable in plasma, halogen vapors, and water vapor. In some implementations, the chamber walls 302 of the processing chamber 300 may include aluminum oxide, anodized aluminum oxide, alloy C22, yttria coating, and plastic.

[0077] A semiconductor substrate 308 may be provided in the processing chamber 300. The semiconductor substrate 308 may include a substrate layer (not shown) to be etched, and the substrate layer may include spin-on carbon (SoC), spin-on glass (SOG), amorphous carbon, silicon, silicon oxide, silicon nitride, silicon carbide, or silicon oxynitride. A metal-containing photoresist film (not shown) may be deposited on the substrate layer of the semiconductor substrate 308 by dry or wet deposition. The metal-containing photoresist film may be photopatterned to etch the substrate layer of the semiconductor substrate 308. In some packaging configurations, the metal-containing photoresist film is a metal-containing EUV photoresist film, and the metal-containing EUV photoresist is an organometallic oxide or organometallic film. For example, the metal-containing EUV photoresist film may contain at least Sn, O, and C atoms.

[0078] Figure 3B shows a schematic cross-sectional view of a processing chamber in which a metal-containing material is formed on the inner surface of the processing chamber. The chamber wall 302 (including the passage 303) of the processing chamber 300 is formed of the metal-containing material 310. The semiconductor substrate 308 can undergo one or more processing operations, such as a lithography operation, within the processing chamber 300. In some embodiments, the semiconductor substrate 308 undergoes a deposition operation for depositing a metal-containing resist film. In some embodiments, the semiconductor substrate 308 undergoes a bevel edge and / or back surface cleaning operation to remove undesirable metal-containing resist films on the bevel edge and / or back surface of the semiconductor substrate 308. In some embodiments, the semiconductor substrate 308 undergoes an exposure operation to create exposed and unexposed areas of the metal-containing resist film. In some embodiments, the semiconductor substrate 308 undergoes a bake operation in a PAB or PEB process of the metal-containing resist film. In some embodiments, the semiconductor substrate 308 undergoes a develop operation to remove exposed or unexposed areas of the metal-containing resist film. During processing of the semiconductor substrate 308, unintended growth of the metal-containing material 310 may accumulate on the chamber walls 302 of the processing chamber 300, as well as on the exposed surfaces of the showerhead 304, pedestal 306, and passage 303. The metal-containing material 310 may peel or detach from the inner surface of the processing chamber, potentially leading to contamination and defect problems in the semiconductor substrate, which is undesirable.

[0079] The metal-containing material 310 may have the same composition as the metal-containing photoresist film on the semiconductor substrate 308. In some packaging configurations, the metal-containing material is an organometallic material or an organometallic oxide material. For example, the metal-containing material may contain at least Sn, O, and C atoms, or the metal-containing material may contain at least Sn, O, C, and N atoms.

[0080] Figure 4A shows a schematic cross-sectional view of the organometallic material 402 formed on the chamber wall 404 of the processing chamber. The organometallic material 402 may contain particles or clusters of metal oxide. In some embodiments, the organometallic material 402 is formed by a vapor deposition method such as CVD or ALD. Over time, the organometallic material 402 may accumulate thickness on the chamber wall 404 of the processing chamber. The organometallic material 402 may be an organotin oxide.

[0081] Returning to Figure 2, in block 204 of process 200, one or more inner surfaces of the processing chamber are exposed to a first non-plasma etching gas to remove a first portion of the organometallic material. Some of the other portions may be transformed or otherwise modified by exposure to the first non-plasma etching gas. The modified portions of the organometallic material may constitute non-volatile etching byproducts of the unremoved portion of the organometallic material. Alternatively, some of the other portions may simply constitute the unremoved portion of the organometallic material after exposure to the first non-plasma etching gas.

[0082] The etching gas may contain a halide-containing gas. As used herein, a halide refers to an anion of F, Cl, Br, or I. In some embodiments, the halide-containing gas may contain hydrogen halides such as hydrogen fluoride (HF), hydrogen chloride (HCl), hydrogen bromide (HBr), hydrogen iodide (HI), or a combination thereof. The etching gas may contain HBr or HCl. In some embodiments, the halide-containing gas may contain hydrogen, as well as halogen gases such as fluorine (F2), chlorine (Cl2), bromine (Br2), and iodine (I2). In some embodiments, the halide-containing gas may contain boron trichloride (BCl3), boron tribromide (BBr3), or a mixture thereof. In some other embodiments, the halide-containing gas may contain organic halides, acyl halides, carbonyl halides, thionyl halides, or a mixture thereof. In some cases, the etching gas includes hydrogen halides, boron trichloride, boron tribromide, or mixtures thereof. In some embodiments, the etching gas flows with or without an inert / carrier gas such as He, Ne, Ar, Xe, or N2.

[0083] Exposure to an etching gas for removing or transforming organometallic materials may be performed without plasma. The etching gas may remove a first portion of the organometallic material without the collision of plasma. Furthermore, the etching gas may transform other portions of the organometallic material without the collision of plasma. The first non-plasma etching gas exposure may be carried out by heating one or more inner surfaces of the processing chamber to a high temperature. One or more heaters may be thermally coupled to one or more surfaces of the processing chamber to heat one or more surfaces to a high temperature. In some embodiments, the high temperature may be about -15°C to about 200°C, about -15°C to about 140°C, or about 0°C to about 120°C. Higher temperatures may promote the volatility of etching byproducts. By applying plasma-free thermal methods, productivity can be significantly improved.

[0084] By heating the processing chamber to a high temperature, the first non-plasma etching gas removes a first portion of the organometallic material and optionally converts other portions of the organometallic material. In some cases, the first portion of the organometallic material removed by the non-plasma etching gas may be the bulk of the organometallic material or a substantial fraction of it. In some implementations, the “substantial fraction” of the organometallic material removed constitutes at least 60 volume%, at least 70 volume%, at least 80 volume%, or at least 90 volume% of the organometallic material formed on one or more inner surfaces of the processing chamber. As an example, if the thickness of the organometallic material is about 5 nm, the non-plasma etching gas may remove at least 3.75 nm, at least 4 nm, at least 4.25 nm, at least 4.5 nm, or at least 4.75 nm of the organometallic material. However, in some other cases, the first portion of the organometallic material removed by the first non-plasma etching gas may be less than the bulk of the organometallic material. Unremoved portions of the organometallic material may remain after exposure to a first non-plasma etching gas, and these unremoved portions may be modified or transformed to be more resistant to the first non-plasma etching gas. Exposure to a modifying gas can make the unremoved portions more easily removed by the first non-plasma etching gas (or other etching gas).

[0085] In some implementations, the step of exposing one or more inner surfaces to a first non-plasma etching gas is performed without a semiconductor substrate in the processing chamber. However, in some other implementations, the step of exposing one or more inner surfaces to a first non-plasma etching gas is performed with a semiconductor substrate or wafer cover in the processing chamber.

[0086] The various steps of multi-stage thermal cleaning can remove organometallic materials from one or more of the following internal surfaces, namely the chamber walls, ceiling, floor, showerhead surface, nozzle surface, through tunnels and passages, substrate support surface, foreline, pump exhaust or exhaust line, and abatement system. Thus, the first non-plasma etching gas can react with organometallic materials deposited on at least one of the chamber walls, ceiling, floor, showerhead surface, nozzle surface, through tunnels and passages, substrate support surface, foreline, pump exhaust or exhaust line, or abatement system.

[0087] Before introducing a non-plasma etching gas, the processing chamber may be prepared under desired conditions for dry chamber cleaning. Preparation of the processing chamber can achieve specific pressure conditions, levels of loose particles or film impurities, moisture levels, temperature conditions, or protection of surfaces or components (e.g., pedestals) within the processing chamber from etching gases.

[0088] In some embodiments, the step of preparing the processing chamber may include the step of removing the semiconductor substrate from the processing chamber. In this way, the processing chamber may not contain the semiconductor substrate or any other processing substrate during dry chamber cleaning. Thus, the semiconductor substrate having a metal-containing resist film may be transported out of the processing chamber before dry chamber cleaning. In some embodiments, the step of preparing the processing chamber may include the step of placing a dummy substrate on a substrate support in the processing chamber. The dummy substrate may be placed on the substrate support to protect the substrate support (e.g., an electrostatic chuck) from exposure to non-plasma etching gases during dry chamber cleaning. The dummy substrate may also be placed on the substrate support to protect the substrate support from exposure to plasma during dry chamber cleaning. Alternatively, protection of the substrate support may be achieved by placing a protective cover on the substrate support during dry chamber cleaning.

[0089] In some embodiments, the step of preparing the processing chamber may include purging and / or pumping the processing chamber to remove unwanted particles from within the processing chamber. A vacuum line or purge line may be coupled to the processing chamber. The vacuum line may include a vacuum pump system which may include a one- or two-stage mechanical dry pump and / or turbomolecular pump. A purge gas can be flowed into the processing chamber to facilitate the removal of unwanted particles from within the processing chamber. Such unwanted particles may include particles or flakes from organometallic materials and their by-products. The vacuum pump system can reduce the chamber pressure and / or remove unwanted particles from the processing chamber. The vacuum pump system may be configured to generate a vacuum pressure in a relatively low range (e.g., about 6 Torr to atmosphere) or a relatively high range (e.g., about 1 mTorr to about 6 Torr). In some embodiments, the step of preparing the processing chamber may include a combination of pumping and purging operations.

[0090] Purging of metal-organic precursors may be useful to avoid undesirable by-products and to ensure thorough removal of metal-organic CVD precursors before dry chamber cleaning. Sufficient pumping / purging and / or water injection may be performed before dry chamber cleaning to promote complete reaction. In some embodiments, the chamber walls and other components may be heated to release unreacted precursors.

[0091] In some embodiments, the step of preparing the processing chamber may include the step of raising the temperature of one or more inner surfaces within the processing chamber. Preheating the inner surfaces of the processing chamber can release unreacted precursors. Preheating the inner surfaces can also release reaction by-products. Unreacted precursors and by-products can alter the material structure of the organometallic material on the inner surfaces, which can affect both the heat treatment and plasma processes of dry chamber cleaning. Preheating the inner surfaces can further facilitate the removal of moisture within the processing chamber. Without being limited by any theory, the presence of water vapor slows down the reaction between the etching gas and the organometallic material for removal / conversion of the organometallic material. Furthermore, the temperature increase within the processing chamber promotes a higher etching rate for the removal of the organometallic material. One or more heaters thermally coupled to one or more inner surfaces of the processing chamber heat one or more inner surfaces to a high temperature, for example, about -20°C to about 200°C, about -15°C to about 180°C, or about 0°C to about 140°C.

[0092] The first non-plasma etching gas may be introduced through a showerhead coupled to the processing chamber or through a separate chamber inlet. The first non-plasma etching gas may flow into the processing chamber to react with the organometallic material to form volatile products. In some implementations, the first non-plasma etching gas may react with the organometallic material to form volatile products at temperatures below about 200°C. Although not limited to any theory, the organometallic material may include organometallic oxide materials having a tetrahedral coordination structure, and etching gases having halide chemicals (e.g., HBr or HCl) can protonate oxygen lone pairs to form volatile byproducts such as R-Sn-Br. Water is also a byproduct. The reaction rate can be increased by removing water and increasing the temperature of the processing chamber. After the volatile products have formed, the processing chamber may be pumped and purged to remove the volatile products. Furthermore, the processing chamber may be pumped and purged to remove residual etching gases.

[0093] Dry chamber cleaning can be optimized for low etching selectivity or high etching rate of organometallic materials deposited in the processing chamber. In this way, unwanted materials can be removed quickly and efficiently. Low etching selectivity can be achieved for the non-selective removal of photoresist materials and metal oxide materials (e.g., tin oxide). Low etching selectivity can be achieved for the non-selective removal of exposed EUV resist materials and unexposed EUV resist materials. In some embodiments, higher temperatures and / or higher pressures may result in lower etching selectivity of the etching gas. During exposure to the first non-plasma etching gas, one or more organometallic materials on the inner surfaces may be exposed to high temperatures. High temperatures may be about -20°C to about 200°C, about -15°C to about 180°C, or about 0°C to about 140°C. During exposure to the first non-plasma etching gas, the pressure in the processing chamber may be relatively high. In some embodiments, the chamber pressure is about 0.01 Torr to atmospheric pressure, about 0.1 Torr to 100 Torr, or about 0.1 Torr to about 6 Torr. In some embodiments, the chamber pressure is circulated between high and low pressure during exposure to the etching gas. The etching gas flow rate may also be adjusted to control etching selectivity. In some embodiments, the etching gas flow rate is about 50 sccm to about 10,000 sccm, about 100 sccm to about 10,000 sccm, or about 100 sccm to about 5,000 sccm.

[0094] The first non-plasma etching gas generally serves to remove organometallic materials from the internal chamber surface, and the etching rate may be adjusted by controlling the temperature of one or more inner surfaces of the processing chamber. Organometallic materials can be removed at etching rates exceeding 10 nm / s. Higher temperatures and / or pressures may increase the etching rate. Resist materials can be removed using vapor at various temperatures (e.g., HCl or HBr at temperatures above -20°C).

[0095] Due to its ability to thermally remove portions of the deposited film (unexposed or uncrosslinked) without requiring the use of plasma, the method described herein can also be used to clean downstream and upstream components of the tool beyond the processing chamber (e.g., the exhaust line from the processing chamber to the vacuum pump). More generally, this dry chamber cleaning method can be used to clean other contaminated parts and components having a similar composition of metals having volatile products containing -Cl, -Br, -F, -H, -CH4, and oxides and / or R groups.

[0096] In some embodiments, coatings compatible with halogen cleaning chemistry, such as PTFE, anodized aluminum, alloy C22, yttrium oxide (Y2O3), or organic polymer coatings, may be used on the chamber walls and other components exposed to dry chamber cleaning. In some embodiments, the processing chamber may include a temperature control unit for a chamber portion coupled to one or more inner surfaces (e.g., the chamber wall) to control the temperature. In some embodiments, the processing chamber may include gas inlets other than showerheads for delivering etching gas. The gas inlets may be located in areas of the processing chamber where the concentration of organometallic material is higher. Alternatively, the gas inlets may be located in areas of the processing chamber where etching gas is less likely to reach through delivery via the showerhead. In some embodiments, the gas inlets may be located under the substrate support, on the walls of the processing chamber, and / or near the exhaust of the processing chamber. Multiple gas inlets may be used to deliver etching gas into the processing chamber. This ensures dry cleaning of the entire processing chamber.

[0097] To prevent corrosion of chamber components, the etching gas may be separated from the deposition gas / precursor. In various embodiments, the etching gas may be delivered into the processing chamber via one or more gas inlets separate from the showerhead, and the deposition gas may be delivered into the processing chamber via the showerhead. In some embodiments, the showerhead may supply separate gases by keeping the gas largely separated within the showerhead. The showerhead may include multiple plenum volumes. Multiple exhaust lines can be used to ensure separation of gases downstream from the processing chamber. To enable separation of the chemical properties of the etching gas from the deposition gas / precursor, switches may be operably coupled to multiple exhaust lines. For example, the hydrogen halide chemistry may be separated from the organotin precursor and water vapor. The halides may be discharged via a first exhaust line during the pumping / purging operation, and the deposition precursor and water vapor may be discharged via a second exhaust line during the pumping / purging operation.

[0098] To protect the showerhead, a pressure difference can be used to prevent etching gas from entering the showerhead (e.g., backflow). In some embodiments, the etching gas may be used to clean the inner surface of the showerhead by flowing the etching gas through it. However, residual halides or moisture may be retained within the channels of the showerhead. In some embodiments, the showerhead may be made from a transparent material and heated with a suitable light source. For example, an irradiation source tuned to a suitable wavelength (e.g., IR or blue wavelength) may be used to directly heat and remove residual halides and / or moisture. Alternatively, residual halides and / or moisture may be removed by gas purging.

[0099] In some embodiments, periodic dry chamber cleaning may be performed upon detection. A detection source can trigger chamber cleaning and / or the end of cleaning. The detection source may be a sensor installed within the processing chamber, such as a color-based sensor, an intensity-based sensor, a vision-based camera / sensor, or a combination thereof. Other detection sources may include a chamber manometer and / or throttle valve sensor. Other detection sources may include chamber sensors such as an RF matching network, a temperature sensor, a heater control sensor, a Langmuir probe, or an RF harmonic sensor. In some cases, a sensor may trigger dry chamber cleaning by an in-situ measuring device for chamber wall deposition. Dry chamber cleaning may be initiated after a certain amount of photoresist material has been formed, or after a threshold of particle, uniformity, wafer, or thickness count has been reached. In some cases, a sensor may terminate dry chamber cleaning after a threshold indicating completion of dry chamber cleaning has been reached.

[0100] Figure 3C shows a schematic cross-sectional view of the processing chamber during dry chamber cleaning with a non-plasma etching gas. The semiconductor substrate 308 in Figures 3A and 3B is transported out of the processing chamber 300 or removed by another method. The etching gas 320 flows into the processing chamber 300 to remove a portion of the metal-containing material 310 from the inner surface of the processing chamber 300. Thus, the etching gas 320 can remove a portion of the metal-containing material 310 from the chamber wall 302, including the passage 303, as well as from the exposed surfaces of the showerhead 304 and pedestal 306.

[0101] The etching gas 320 may contain a halide-containing gas. In some implementations, the etching gas 320 contains HF, CF4, NF3, HCl, HBr, HI, BCl3, BBr3, or a mixture thereof. For example, the etching gas contains HBr. The etching gas 320 can remove a portion of the metal-containing material 310 without impacting it with plasma. Thus, a portion of the metal-containing material 310 is removed by non-plasma heat treatment. The inner surface of the processing chamber 300 may be heated to a temperature of about -20°C to about 200°C, about -15°C to about 180°C, or about 0°C to about 140°C to facilitate the removal of the metal-containing material 310. However, some of the unremoved portions of the metal-containing material 310 may remain as residue 312 on the inner surface of the processing chamber 300, including the chamber walls 302, the passages 303, and the exposed surfaces of the showerhead 304 and pedestal 306. The residue 312 may contain non-volatile by-products formed as a result of the modification / conversion of the metal-containing material 310 by the etching gas 320. The residue 312 may constitute metal-containing material 310 that cannot be easily removed by continuous exposure to the etching gas 320 in non-plasma heat treatment. In some cases, the non-volatile by-products may be non-volatile tin halides (e.g., Sn(II)-Br x ) includes. Residue 312 may also contain redeposited metal-containing material.

[0102] Figure 4B shows a schematic cross-sectional view of the chamber wall 404 after the etching gas has removed a portion of the organometallic material 402 from the chamber wall 404. The etching gas may be a hydrogen halide such as HBr or HCl. The chamber wall 404 may be heated to a high temperature to promote low etching selectivity. The processing chamber may be increased to a high pressure to promote low etching selectivity. The removal of the organometallic material 402 may be performed without the use of plasma. Thus, a portion of the organometallic material 402 is removed by plasma-free heat treatment, and the remaining portion of the organometallic material 402 forms a residue 406 on the chamber wall 404. The reaction between the etching gas and the organometallic material 402 may produce volatile and non-volatile etching byproducts. The residue 406 may contain non-volatile etching byproducts. In some cases, volatile etching byproducts may be redeposited on the chamber wall 404, and the residue 406 may potentially contain etching byproducts redeposited together with non-volatile etching byproducts.

[0103] Returning to Figure 2, in block 206 of process 200, one or more inner surfaces of the processing chamber are exposed to a non-plasma modifying gas within the processing chamber. After exposure to the first non-plasma etching gas, any remaining unremoved portions of the organometallic material are resistant to removal by continued exposure to the first non-plasma etching gas. However, exposure of the remaining unremoved portions of the organometallic material to a non-plasma modifying gas may reduce their resistance to removal by the non-plasma etching gas (e.g., the first non-plasma etching gas). This results in the ability to completely remove the organometallic material without plasma.

[0104] The non-plasma reforming gas has different chemical properties from the first non-plasma etching gas. The non-plasma reforming gas may include oxygen, nitrogen, water vapor, hydrogen chloride, chlorine, boron trichloride, hydrogen fluoride, fluorine, carbon tetrafluoride, nitrogen trifluoride, hydrogen bromide, bromine, carbon dioxide, carbon monoxide, air, or mixtures thereof. In some implementations, exposing one or more inner surfaces of the processing chamber to the non-plasma reforming gas includes exposing one or more inner surfaces of the processing chamber to ambient air. The processing chamber may be opened and exposed to ambient air without requiring a separate gas flow and / or gas line. In some implementations, the step of exposing one or more inner surfaces of the processing chamber to the non-plasma reforming gas includes the step of exposing one or more inner surfaces of the processing chamber to oxygen, nitrogen, water vapor, carbon dioxide, carbon monoxide, or mixtures thereof. In some implementations, the step of exposing one or more inner surfaces of the processing chamber to a non-plasma modifying gas includes the step of exposing one or more inner surfaces of the processing chamber to a halogen-containing gas different from the first non-plasma etching gas. For example, the first non-plasma etching gas may include HBr, and the non-plasma modifying gas may include HCl.

[0105] While not limited to any particular theory, the first non-plasma etching gas is used to etch at least a portion of the organometallic material into non-volatile tin halides (e.g., Sn(II)-Br x It may also be converted to a non-volatile salt such as ) . For example, an etching gas containing HBr can be converted to SnO x R y It reacts with a photoresist material containing Sn(II)-Br x A non-volatile salt containing can be formed. The non-volatile salt forms a residue that does not etch even when continuously exposed to the first non-plasma etching gas. However, the non-plasma reforming gas can change the form and / or composition of the non-volatile salt. The non-plasma reforming gas is Sn(II)-Br x Sn(IV)-Br x or Sn(II)-O xIt is possible to convert the modified residue into a non-plasma etching gas, and the modified residue is more susceptible to etching by the first non-plasma etching gas. Therefore, exposure to the non-plasma modifying gas decomposes the non-volatile products or residue, reducing their resistance to etching by the first non-plasma etching gas. In some cases, the non-plasma modifying gas may etch at least a portion of the non-volatile products or residue. This means that the non-plasma modifying gas may further etch portions of the organometallic material that the first non-plasma etching gas could not etch, converting the non-volatile products into volatile products. However, in some other cases, the non-plasma modifying gas does not necessarily etch additional portions of the organometallic material.

[0106] In some implementations, a second portion of organometallic material on one or more inner surfaces of a processing chamber is exposed to a non-plasma reforming gas. The second portion may constitute an unremoved portion or an organometallic material converted to a non-volatile salt. The non-plasma reforming gas is configured to have chemical properties and reactivity suitable for reacting with the second portion of organometallic material so that the newly formed material can react with a first non-plasma etching gas to form volatile byproducts(s). Alternatively, the non-plasma reforming gas is configured to have chemical properties and reactivity suitable for reacting with the second portion of organometallic material to form volatile byproducts(s).

[0107] The processing conditions for flowing the non-plasma reforming gas into the processing chamber may be controlled to effectively reform the second portion of the organometallic material. In some implementations, the temperature may be about -60°C to about 120°C, about -40°C to about 100°C, or about -20°C to about 80°C. In some cases, higher temperatures within the above temperature ranges are desirable to facilitate reforming and / or etching by the non-plasma reforming gas. However, if the temperature is too high, etching of the residue may become more difficult. Without being limited by any theory, excessively high temperatures may thermally break down the residue and essentially anneal it. In some implementations, the chamber pressure may be about 1 mTor to about 20 Torr, or about 5 mTor to about 760 Torr. In some cases, the chamber pressure is preferably atmospheric pressure (i.e., about 760 Torr) during exposure to the non-plasma reforming gas. In some implementations, the exposure period may be approximately 5 minutes to 3 days, approximately 10 minutes to 2 days, or approximately 20 minutes to 1 day. As an example, one or more inner surfaces of the processing chamber may be exposed to ambient air for a duration of approximately 1 day at room temperature (approximately 20°C) and atmospheric pressure (approximately 760 Torre). As an alternative to air purging, one or more inner surfaces of the processing chamber may be exposed to oxygen, nitrogen, or water vapor at a high temperature of approximately 60°C for approximately 4 hours. The second portion of the organometallic material is not exposed to plasma during exposure to the non-plasma reforming gas.

[0108] In some configurations, the processing chamber does not include the semiconductor substrate during the reforming gas exposure. In some embodiments, the processing chamber may include a dummy substrate on a substrate support within the processing chamber. The dummy substrate may be provided on the substrate support to protect the substrate support (e.g., an electrostatic chuck) from exposure to plasma during dry chamber cleaning. Alternatively, protection of the substrate support may be achieved by providing a protective cover on the substrate support during dry chamber cleaning. In some configurations, the semiconductor substrate may be present on the substrate support during dry chamber cleaning.

[0109] Figure 3D shows a schematic cross-sectional view of the processing chamber after dry chamber cleaning with a non-plasma etching gas. As described above, exposure to the etching gas 320 in Figure 3C can remove some of the metal-containing material 310, but may leave residue 312 of the metal-containing material. The residue 312 may form on the exposed surfaces of the chamber walls 302 and passage 303, as well as the showerhead 304 and pedestal 306. The etching gas 320 may react with some of the metal-containing material 310 to form volatile byproducts, but the etching gas 320 may also react with some other of the metal-containing material 310 to form non-volatile byproducts / compounds. Non-volatile byproducts formed from the reaction between the etching gas 320 and the metal-containing material 310 may form residue 312. In some cases, some of the volatile byproducts from the etching gas 320 may redeposit on the inner surface of the processing chamber 300, which may form at least some of the residue 312. For example, if etching gas 320 contains HBr and metal-containing material 310 contains SnO x R y If present, etching gas 320 reacts with a portion of the metal-containing material 310 to form Sn(II)-Br x Non-volatile salts can be generated. Consequently, continuous exposure to HBr during heat treatment may not be sufficient to remove such non-volatile salts from the inner surface of the processing chamber 300. The residue 312 may contain loose particles that can easily flake or peel off from the inner surface of the processing chamber 300, and the residue 312 may contaminate wafers and / or downstream processing tools.

[0110] Figure 3E is a schematic cross-sectional view of the processing chamber during dry chamber cleaning with a reforming gas. The inner surface of the processing chamber 300 may be exposed to the reforming gas 330 to reform the residue 312. The residue 312 may constitute a converted or reformed portion of the organometallic material 310. Following a heat treatment using etching gas 320 to remove a portion of the metal-containing material 310, the dry chamber cleaning may proceed to a heat treatment using reforming gas 330 to reform the residue 312. The reforming gas 330 may include oxygen, nitrogen, water vapor, hydrogen chloride, chlorine, boron trichloride, hydrogen fluoride, fluorine, carbon tetrafluoride, nitrogen trifluoride, hydrogen bromide, bromine, carbon dioxide, carbon monoxide, air, or mixtures thereof. In some implementations, the reforming gas 330 includes ambient air. The heat treatment using the reforming gas 330 may remove the residue 312 or reform the residue 312. The reformed gas 330 may reform the residue 312 to form decomposed residue 314. The reforming of residue 312 results in decomposed residue 314 with altered morphology and / or composition. The decomposed residue 314 tends to form volatile etching byproducts together with the etching gas (e.g., etching gas 320). Exposure to the reformed gas 330 is performed without plasma collision.

[0111] Figure 4C shows a schematic cross-sectional view of the chamber wall 404 after exposure to a reforming gas. The reforming gas may be configured to reform the form and / or composition of the residue 406. While etching gases in non-plasma heat treatment may not be able to remove the residue 406, reforming gases can have suitable chemical properties and reactivity for decomposing the residue 406. Without being limited by any theory, reforming gas exposure can be used for Sn(II)-Br x The non-volatile salt is Sn(IV)-Br x or Sn(II)-O x It can also be converted to Sn(IV)-Br xThe products may be arranged in smaller clusters and may have water molecules incorporated into their structure. Smaller clusters are more readily reactive with etching gases such as HBr. In some cases, the reforming gas may include ambient air. In some implementations, the reforming gas may include oxygen, nitrogen, water vapor, carbon dioxide, carbon monoxide, or mixtures thereof. In some implementations, the reforming gas may include a halide-containing gas different from the etching gas used to remove a portion of the organometallic material 402. After a portion of the organometallic material 402 is removed from the chamber wall 404 by heat treatment, the remaining portion of the organometallic material 402 in the form of residue 406 can be decomposed by subsequent heat treatment. In this way, a decomposed or modified residue 408 with low resistance to etching is formed. The decomposed or modified residue 408 remains on the chamber wall 404 but tends to form volatile etching byproducts upon exposure to etching gases.

[0112] Returning to Figure 2, in block 208 of process 200, one or more inner surfaces of the processing chamber are exposed to a second non-plasma etching gas to remove a second portion of the organometallic material. Exposure to the second non-plasma etching gas may occur even if there is no semiconductor substrate in the processing chamber, although in some cases the processing chamber may have a semiconductor substrate or at least a wafer cover. The second portion of the organometallic material includes the unremoved portion of the organometallic material that has been modified by the non-plasma modifying gas. The second non-plasma etching gas may be identical to the first non-plasma etching gas. Thus, multi-stage thermal chamber cleaning can proceed by circulating the first non-plasma etching gas and the non-plasma modifying gas to remove the organometallic material. However, in some cases the second non-plasma etching gas may be different from the first non-plasma etching gas. In some implementations, the second non-plasma etching gas may include a halide-containing gas such as HF, HCl, HBr, HI, BCl3, BBr3, NF3, CF4, or a mixture thereof. In some cases, the second non-plasma etching gas may include HBr or HCl.

[0113] The second exposure to a non-plasma etching gas for removing the organometallic material is performed without plasma collision. Therefore, the multi-stage thermal chamber cleaning includes a series of thermal steps, including blocks 204, 206, and 208, which are performed without plasma collision. Furthermore, the multi-stage thermal chamber cleaning includes a series of thermal steps, including blocks 204, 206, and 208, which may occur when no semiconductor substrate is present in the processing chamber.

[0114] After modification of the residual organometallic material with a non-plasma modifying gas, a second portion of the organometallic material is removed by exposure to a second non-plasma etching gas. Rather than using plasma to remove the residual organometallic material, this disclosure circulates a thermal etching gas and a thermal modifying gas. Portions of organometallic material not removed by the thermal etching gas may be modified by the thermal modifying gas and subsequently removed by the thermal etching gas.

[0115] A second non-plasma etching gas can be introduced into the processing chamber to react with the organometallic material to form volatile products. The second non-plasma etching gas may be introduced through a showerhead coupled to the processing chamber or through a separate chamber inlet. After the volatile products have formed, the processing chamber may be pumped and purged to remove the volatile products. Furthermore, the processing chamber may be pumped and purged to remove any residual etching gases.

[0116] The second exposure to a non-plasma etching gas may be carried out by heating one or more inner surfaces of the processing chamber to a high temperature. One or more heaters may be thermally coupled to one or more surfaces of the processing chamber to heat one or more surfaces to a high temperature. In some embodiments, the high temperature may be about -15°C to about 200°C, about -15°C to about 140°C, or about 0°C to about 120°C. Higher temperatures may accelerate the volatility of etching byproducts.

[0117] During exposure to the second non-plasma etching gas, one or more organometallic materials on an inner surface may be exposed to high temperatures such as about -15°C to about 200°C, about -15°C to about 140°C, or about 0°C to about 120°C. During exposure to the second non-plasma etching gas, the pressure in the processing chamber may be relatively high. In some embodiments, the chamber pressure is about 0.01 Torr to atmospheric pressure, about 0.1 Torr to 100 Torr, or about 0.1 Torr to about 6 Torr. In some embodiments, the chamber pressure is circulated between high and low pressure during exposure to the etching gas. The etching gas flow rate may also be adjusted to control etching selectivity. In some embodiments, the etching gas flow rate is about 50 sccm to about 10,000 sccm, about 100 sccm to about 10,000 sccm, or about 100 sccm to about 5,000 sccm.

[0118] After removing a second portion of the organometallic material with a second non-plasma etching gas, some of the organometallic material may still remain. In such cases, repeated cycles of exposure to the reforming gas and etching gas are required to completely remove the organometallic material from one or more inner surfaces of the processing chamber. In some implementations, process 200 further includes repeating blocks 206 and 208 for one or more cycles until the organometallic material is removed or substantially removed from one or more inner surfaces of the processing chamber. The number of cycles may be between about 1 and about 10 cycles, or between about 1 and about 5 cycles, until the organometallic material is removed or substantially removed. In other words, process 200 may be continued by flowing the reforming gas and the etching gas for additional cycles until a desired amount of organometallic material is removed from the processing chamber. Removal of the organometallic material may be performed not only on the chamber walls, floor, ceiling, and showerhead surface of the processing chamber, but also on the foreline of the processing chamber, the pump exhaust or exhaust line, and the abatement system.

[0119] Figure 3F shows a schematic cross-sectional view of the processing chamber during dry chamber cleaning with modified etching gas. The inner surface of the processing chamber 300 may be exposed to etching gas 340 to remove the decomposed residue 314. The etching gas 340 in Figure 3F may be the same as the etching gas 320 in Figure 3C. The etching gas 340 flows into the processing chamber 300 to remove a portion of the metal-containing material 310 from the inner surface of the processing chamber 300, including the chamber walls 302, the passages 303, and the exposed surfaces of the showerhead 304 and pedestal 306. The etching gas 340 may contain a halide-containing gas such as HF, HCl, HBr, HI, BCl3, BBr3, NF3, CF4, or a mixture thereof. For example, the etching gas 340 contains HBr. The etching gas 340 reacts with the decomposed residue 314 to form volatile etching byproducts. Exposure to the etching gas 340 is performed without plasma collision. The inner surface of the processing chamber 300 may be heated to a temperature of approximately -20°C to approximately 200°C, approximately -15°C to approximately 180°C, or approximately 0°C to approximately 140°C to facilitate the removal of the decomposed residue 314. However, some of the decomposed residue 314 may remain as residual material. The residual material may then be removed by periodically flowing the reforming gas 330 and etching gas 320 / 340 until the residual material is completely removed. The number of cycles may be between approximately 1 to approximately 10 cycles, or between approximately 1 to approximately 5 cycles.

[0120] Figure 4D shows a schematic cross-sectional view of the chamber wall 404 after repeated exposure to a reforming gas and an etching gas to remove decomposed or modified residue 408 from the chamber wall 404. After exposure to the reforming gas to form decomposed or modified residue 408, the decomposed or modified residue 408 can be removed from the chamber wall 404 by flowing an etching gas, such as a halide-containing gas. The etching gas may have the same chemical action as the etching gas used in Figure 4B to remove a portion of the organometallic material 402. The removal of the decomposed or modified residue 408 may be performed without the use of plasma. Thus, the organometallic material 402 and the associated residues 406 and 408 are removed by plasma-free heat treatment. The reaction between the etching gas and the decomposed or modified residue 408 may produce volatile etching byproducts. However, any remaining residue 408 may be removed by repeated exposure to the reforming gas and etching gas until the chamber wall 404 no longer contains residue 408.

[0121] Various implementations of this disclosure may include combining all dry operations, such as vapor deposition, EUV lithography patterning, dry development, and dry chamber cleaning. Various other implementations may include combinations of wet and dry process operations, for example, spin-on EUV photoresist (wet process) may be combined with dry chamber cleaning or other wet or dry processes as described herein. Various post-deposition (or post-coating) processes are also described, such as bevel and back surface cleaning, chamber cleaning, discam, smoothing, curing to modify and improve film properties, and photoregistry work processing. Utilizing all dry operations, including dry chamber cleaning, may have certain advantages. Such dry process operations can avoid the material and productivity costs associated with wet process operations, such as wet chamber cleaning or wet development.

[0122] Although this disclosure frequently refers to the cleaning of exposed and / or developed EUV-sensitive films, the cleaning processes described are not limited to EUV films of similar composition (e.g., other MOs).x R y The method can be extended to other films (such as metal oxide films), for example, the metal may form volatile products having -Cl, -Br, -F, -H, -CH4, etc., as described herein, including unexposed EUV resist films. Furthermore, in some embodiments, films other than EUV resists, such as hard masks, UV resists, or films of similar composition having other applications, can be cleaned by this method. In this regard, the cleaning process described relates to the chemical composition of the film, in contrast to its function.

[0123] Device The apparatus of this disclosure is configured for dry chamber cleaning, such as in-situ dry chamber cleaning. The apparatus may be configured for other processing operations, such as deposition, bevel and back surface cleaning, post-coating bake, EUV scanning, development, post-exposure bake, photoregistry work, discam, smoothing, curing, and other operations. In some implementations, the apparatus is configured to perform all dry operations. In some implementations, the apparatus is configured to perform a combination of wet and dry operations. The apparatus may include a single wafer chamber or multiple stations within the same processing chamber. Using multiple stations within the same processing chamber, various processing operations as described in this disclosure may be performed at different stations within the same processing chamber. For example, PEB heat treatment may be performed at one station and development at another station.

[0124] An apparatus configured for dry chamber cleaning includes a processing chamber having a substrate support. The substrate support may support a semiconductor substrate on which a metal-containing resist film is formed. The apparatus may include a gas line coupled to the processing chamber for delivering an etching gas. In some configurations, the etching gas includes a hydrogen halide such as HBr. The apparatus may include a vacuum line or pump exhaust port coupled to the processing chamber. The vacuum line or pump exhaust may be configured to pump / purge gas from the processing chamber. The apparatus may further include a foreline coupled to the processing chamber. In some cases, in-situ dry chamber cleaning can remove unwanted material from one or more of the following: chamber walls, floor, ceiling, showerhead surface, nozzle surface, through tunnels and passages, substrate support surface, foreline, pump exhaust or exhaust line, and abatement system. For example, in-situ dry chamber cleaning can remove unwanted material not only from the chamber walls but also from the foreline, pump exhaust, and abatement system. The apparatus may include one or more heaters for temperature control. Such heaters may be provided in the processing chamber and / or substrate support. In some implementations, there may be multiple gas inlets located within the processing chamber to direct the etching gas near areas where unintended metal-containing material tends to form. The apparatus may further include one or more sensors for detecting particle count, wafer count, thickness count, or other parameters to trigger dry chamber cleaning and / or the end of dry chamber cleaning.

[0125] In some implementations, the processing chamber is made of inexpensive materials such as plastic. In some other implementations, the processing chamber is made of metal such as anodized aluminum, or ceramic such as aluminum oxide.

[0126] In some implementations, the processing chamber for performing dry chamber cleaning may be selected from the group consisting of a dry deposition chamber, a bevel edge and / or back surface cleaning chamber, a bake chamber, an exposure chamber, a dry development chamber, or an etching chamber. Dry chamber cleaning may be performed in situ using other substrate processing operations when processing the photoresist material. The processing chamber for performing dry chamber cleaning may be configured for multi-stage cleaning, including only heat treatment. Therefore, the processing chamber may be equipped for gas delivery to expose the internal chamber surface to thermal etching gas and thermal reforming gas.

[0127] Figure 5 is a schematic diagram of exemplary processing stations suitable for performing dry chamber cleaning, dry development, bevel edge and / or back surface cleaning, etching, rework, discam, or smoothing operations in several implementation configurations. Multiple processing stations 500 may be included in a common low-pressure processing tool environment. For example, Figure 6 shows an implementation of a multi-station processing tool 600, such as the VECTOR® processing tool available from Lam Research Corporation in Fremont, California. In some implementation configurations, one or more hardware parameters of the processing tool 600, including those described in detail below, may be programmed by one or more computer controllers 650.

[0128] The processing station may be configured as a module within the cluster tool. Figure 6 shows a semiconductor process cluster tool architecture having vacuum integrated deposition and patterning modules suitable for implementation of the implementation configuration described herein. Such a cluster processing tool architecture may include resist deposition, resist exposure (EUV scanner), resist development, and etching modules, as described above with reference to Figures 7 and 8 and further below.

[0129] In some implementations, some of the processing functions may be performed sequentially within the same module, for example, dry development and etching or dry deposition and dry chamber cleaning. Implementations of the present disclosure relate to methods and apparatus for receiving a wafer containing an EUV resist thin film layer arranged on a layer stack to be etched, as described herein, into a dry development / etching chamber after photopatterning in an EUV scanner, dry developing the photopatterned EUV resist thin film layer, and etching a substrate layer using the patterned EUV resist as a mask.

[0130] Returning to Figure 5, the processing station 500 is in fluid communication with the reactant delivery system 501a to deliver the processing gas to the distribution showerhead 506. The reactant delivery system 501a optionally includes a mixing vessel 504 for mixing and / or adjusting the processing gas for delivery to the showerhead 506. One or more mixing vessel inlet valves 520 may control the introduction of the processing gas into the mixing vessel 504. If plasma exposure is used, the plasma may be delivered to the showerhead 506 or generated within the processing station 500.

[0131] Figure 5 includes an optional vaporization point 503 for vaporizing the liquid reactants supplied to the mixing vessel 504. In some implementations, a liquid flow controller (LFC) may be provided upstream of the vaporization point 503 to control the mass flow rate of the liquid for vaporization and delivery to the processing station 500. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC may then be adjusted in response to a feedback control signal provided by a proportional-integral-derivative (PID) controller electrically connected to the MFM.

[0132] The showerhead 506 distributes the processing gas toward the substrate 512. In the mounting configuration shown in Figure 5, the substrate 512 is located below the showerhead 506 and is shown resting on the pedestal 508. The showerhead 506 may have any suitable shape and may have any suitable number and arrangement of ports for distributing the processing gas toward the substrate 512.

[0133] In some implementations, the pedestal 508 may be raised or lowered to expose the substrate 512 to the volume between the substrate 512 and the showerhead 506. In some implementations, the height of the pedestal may be programmed by a suitable computer controller 550. In some implementations, the showerhead 506 may have multiple plenum volumes with multiple temperature controls.

[0134] In some implementations, the pedestal 508 may be temperature-controlled via a heater 510. In some implementations, the pedestal 508 may be heated to a temperature above -20°C and up to 300°C or more during non-plasma heat exposure, for example, 40°C to 160°C, for example, about 80°C to 140°C, as described in the disclosed implementations. In some implementations, the heater 510 of the pedestal 508 may include a plurality of independently controllable temperature control zones.

[0135] Furthermore, in some implementations, pressure control of the processing station 500 may be provided by a butterfly valve 518. As shown in the implementation in Figure 5, the butterfly valve 518 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some implementations, pressure control of the processing station 500 may also be adjusted by changing the flow rate of one or more gases introduced into the processing station 500.

[0136] In some implementations, the position of the showerhead 506 may be adjusted relative to the pedestal 508 to change the volume between the substrate 512 and the showerhead 506. Furthermore, it will be understood that the vertical position of the pedestal 508 and / or the showerhead 506 may be changed by any suitable mechanism within the scope of this disclosure. In some implementations, the pedestal 508 may include a pivot axis for rotating the orientation of the substrate 512. In some implementations, it will be understood that one or more of these exemplary adjustments may be performed programmatically by one or more suitable computer controllers.

[0137] If plasma can be used, the showerhead 506 and / or pedestal 508 electrically communicate with a radio frequency (RF) power supply 514 and a matching network 516 to power the plasma. Thus, either or both of the showerhead 506 and the pedestal 508 may be powered for plasma generation. In some implementations, plasma energy may be controlled by controlling one or more of the processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 514 and matching network 516 may operate at any suitable power to form a plasma having a desired composition of radical species. An example of a suitable output is up to about 1000 W. In this disclosure, thermal chamber cleaning is achieved without plasma.

[0138] In some implementations, instructions for the controller may be provided via input / output control (IOC) sequencing instructions. For example, instructions for setting the conditions of a process stage may be included in the corresponding recipe phase of the processing recipe. In some cases, the stages of the processing recipe may be arranged sequentially so that all instructions for a process stage are executed simultaneously with that process stage. In some implementations, instructions for setting one or more reactor parameters may be included in the recipe stage. For example, the recipe stage may include instructions for setting the flow rate of an etching gas such as HBr, and a time delay instruction for the recipe stage. In some implementations, the controller may include any of the features described below with respect to the system controller 650 in Figure 6.

[0139] As described above, one or more processing stations may be included in a multi-station processing tool. Figure 6 shows a schematic diagram of an implementation of a multi-station processing tool 600 having an inbound load lock 602 and an outbound load lock 604, one or both of which may include a remote plasma source. An atmospheric pressure robot 606 is configured to move a wafer from a cassette loaded through a pod 608 to the inbound load lock 602 via an atmospheric port 610. The wafer is then placed by the robot 606 on a pedestal 612 within the inbound load lock 602, the atmospheric port 610 is closed, and the load lock is pumped down. If the inbound load lock 602 includes a remote plasma source, the wafer may be exposed to remote plasma processing to treat the substrate surface within the load lock before being introduced into the processing chamber 614. Furthermore, the wafer may also be heated within the inbound load lock 602, for example, to remove moisture and adsorbed gases. Next, the chamber transfer port 616 to the processing chamber 614 is opened, and another robot (not shown) places the wafer into the reactor on the pedestal of the first station, which is located inside the reactor for processing. The configuration shown in Figure 6 includes a load lock, but it will be understood that in some configurations, direct entry of the wafer into the processing station may be provided.

[0140] The illustrated processing chamber 614 includes four processing stations numbered 1 to 4 in the implementation shown in Figure 6. Each station has a heated pedestal (station 1 is shown as 618) and a gas line inlet. In some implementations, each processing station may serve a different or multiple purpose. For example, in some implementations, the processing station may be switchable between a thermal etching gas and a thermal reforming gas process mode. Although the illustrated processing chamber 614 includes four stations, it will be understood that the processing chamber according to this disclosure may have any appropriate number of stations. For example, in some implementations, the processing chamber may have five or more stations, and in other implementations, the processing chamber may have three or fewer stations.

[0141] Figure 6 shows an implementation of a wafer handling system 690 for transporting wafers within a processing chamber 614. In some implementations, the wafer handling system 690 may transport wafers between various processing stations and / or between processing stations and load locks. It will be understood that any suitable wafer handling system can be used. Non-limiting examples include wafer carousels and wafer handling robots. Figure 6 also shows an implementation of a system controller 650 used to control the processing conditions and hardware state of the processing tool 600. The system controller 650 may include one or more memory devices 656, one or more mass storage devices 654, and one or more processors 652. The processors 652 may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc.

[0142] In some implementations, the system controller 650 controls all activities of the processing tool 600. The system controller 650 is stored in a mass storage device 654, loaded into a memory device 656, and runs system control software 658 on the processor 652. Alternatively, the control logic may be hardcoded within the controller 650. For these purposes, application-specific integrated circuits, programmable logic devices (e.g., field-programmable gate arrays, or FPGAs) may be used. Wherever “software” or “code” is used in the following description, functionally equivalent hardcoded logic may be used instead. The system control software 658 may include instructions for controlling timing, gas mixing, gas flow rate, chamber and / or station pressure, chamber and / or station temperature, wafer temperature, target power level, RF power level, substrate pedestal, chuck and / or susceptor position, and other parameters of a particular process performed by the processing tool 600. The system control software 658 may be configured in any suitable manner. For example, various processing tool component subroutines or control objects may be written to control the behavior of processing tool components used to execute various processing tool processes. The system control software 658 may be coded in any suitable computer-readable programming language.

[0143] In some implementations, the system control software 658 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. In some implementations, other computer software and / or programs stored in the mass storage device 654 and / or memory device 656 associated with the system controller 650 may be used. Examples of such programs or sections of programs include a substrate positioning program, a processing gas control program, a pressure control program, a heater control program, and a plasma control program.

[0144] The substrate positioning program may include program code for processing tool components used to load the substrate onto the pedestal 618 and control the spacing between the substrate and other parts of the processing tool 600.

[0145] The process gas control program may include code to control the composition and flow rate of the process gas (e.g., etching gas) and optionally to flow the gas into one or more process stations before deposition in order to stabilize the pressure within the process stations. The pressure control program may include code to control the pressure within the process stations by adjusting, for example, throttle valves in the exhaust system of the process stations, the gas flow to the process stations, etc.

[0146] The heater control program may include code for controlling the current to a heating unit used to heat the substrate or the surface of the internal chamber. Alternatively, the heater control program may control the delivery of a heat transfer gas (such as helium) to the substrate or the surface of the internal chamber.

[0147] The plasma control program may include code for setting the RF power levels applied to process electrodes in one or more processing stations according to the implementation described herein.

[0148] The pressure control program may include code for maintaining the pressure in the reaction chamber according to the implementation described herein.

[0149] In some implementations, there may be a user interface associated with the system controller 650. The user interface may include a display screen, a graphical software display and / or processing conditions for the device, as well as user input devices such as a pointing device, keyboard, touch screen, and microphone.

[0150] In some implementations, parameters adjusted by the system controller 650 may relate to processing conditions. Non-limiting examples include the composition and flow rate of the processing gas, temperature, pressure, and plasma conditions (such as RF bias power level). These parameters may be provided to the user in the form of a recipe, which may be entered using a user interface.

[0151] In some implementations, the system controller 650 may consist of commands to perform the following operations: providing a semiconductor substrate in a processing chamber, wherein an organometallic material is formed on one or more inner surfaces of the processing chamber 614; exposing one or more inner surfaces of the processing chamber 614 to a non-plasma etching gas to remove a first portion of the organometallic material; exposing one or more inner surfaces of the processing chamber 614 to a non-plasma reforming gas; and exposing one or more inner surfaces of the processing chamber 614 to a non-plasma etching gas to remove a second portion of the organometallic material. In some implementations, the system controller 650 may further consist of commands to repeat, in one or more cycles, the exposure of one or more inner surfaces of the processing chamber 614 to the reforming gas and the non-plasma etching gas until the organometallic material is removed from the processing chamber 614 or substantially removed. In some implementations, the non-plasma etching gas includes a halide-containing chemical such as HBr or HCl. In some implementations, the non-plasma reforming gas includes oxygen, nitrogen, water vapor, carbon dioxide, carbon monoxide, or a mixture thereof. In some implementations, the non-plasma reforming gas contains different halogenated chemicals than the non-plasma etching gas.

[0152] Signals for monitoring the process may be provided by analog and / or digital input connections to the system controller 650 from various processing tool sensors. Signals for controlling the process may be output to the analog and digital output connections of the processing tool 600. Non-limiting examples of processing tool sensors that can be monitored include mass flow controllers, pressure sensors (such as manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used in conjunction with data from these sensors to maintain processing conditions.

[0153] The system controller 650 may provide program instructions for carrying out the deposition process described above. The program instructions may control various process parameters such as DC power level, RF bias power level, pressure, and temperature. The instructions may also control parameters to operate the developing, washing, and / or etching processes in the various implementations described herein.

[0154] The system controller 650 typically includes one or more memory devices and one or more processors configured to execute instructions so that the device performs the method according to the disclosed implementation. A machine-readable medium containing instructions for controlling process operation according to the disclosed implementation may be coupled to the system controller 650.

[0155] In some implementations, the system controller 650 may be part of a system, and may be part of the examples described above. Such a system may include a semiconductor processing apparatus comprising one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (such as wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronic equipment for controlling pre-processing, processing, and post-processing operations of semiconductor wafers or substrates. The electronic equipment may be referred to as a “controller” capable of controlling various components or sub-components of one or more systems. Depending on the processing conditions and / or the type of system, the system controller 650 may be programmed to control any of the processes disclosed herein, including processing gas delivery, temperature setting (e.g., heating and / or cooling), pressure setting, vacuum setting, power setting, radio frequency (RF) generator setting, RF matching circuit setting, frequency setting, flow rate setting, fluid delivery setting, position and operation setting, wafer transport and other transport tools for entering and exiting the tool, and / or load locks connected to or interfaced with a particular system.

[0156] Generally, the system controller 650 may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive and issue instructions, control operations, enable cleaning operations, enable endpoint measurement, etc. The integrated circuits may include chips in the form of firmware that store program instructions, chips defined as digital signal processors (DSPs), application-specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers (e.g., software) that execute the program instructions. The program instructions may also be instructions communicated to the system controller 650 in the form of various individual settings (or program files) that define operating parameters for performing a particular process on a semiconductor wafer or system. In some implementations, the operating parameters may be part of a recipe defined by a process engineer to achieve one or more processing steps during the manufacturing of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0157] In some implementations, the system controller 650 may be part of or coupled to a computer, which is integrated into the system, coupled to, or otherwise networked to the system, or a combination thereof. For example, the system controller 650 may be in the “cloud” or in all or part of a fab host computer system, enabling remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, examine trends or performance metrics from multiple manufacturing operations, change parameters of the current process, set up process steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide processing recipes to the system over a network, which may include a local network or the internet. The remote computer may include a user interface that enables input or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the system controller 650 receives instructions in the form of data, which specify the parameters of each process step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be executed and the type of tool to which the system controller 650 is configured to interface or control. Therefore, as described above, the system controller 650 may be distributed, for example, by including one or more separate controllers that are networked together and operate toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes is one or more integrated circuits on a chamber, which communicate with one or more integrated circuits located remotely (at the platform level or as part of a remote computer, for example) that are combined to control the processes on the chamber.

[0158] Exemplary systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, ALD chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, EUV lithography chambers (scanners) or modules, developing chambers or modules, and any other semiconductor processing systems related to or usable in the manufacturing and / or production of semiconductor wafers.

[0159] As described above, depending on one or more processing steps performed by the tool, the system controller 650 may communicate with one or more of the following: other tool circuits or modules, other tool components, cluster tools, other tool interfaces, neighboring tools, adjacent tools, tools located throughout the factory, the main computer, another controller, or tools used for material transport to carry wafer containers to and from tool locations and / or load ports in the semiconductor manufacturing plant.

[0160] Here, we describe ICP reactors that are suitable for etching operations in certain implementation configurations. While ICP reactors are described herein, it should be understood that capacitively coupled plasma reactors may also be used in some implementation configurations.

[0161] Figure 7 schematically shows a cross-sectional view of an inductively coupled plasma apparatus 700 suitable for carrying out specific implementations or embodiments such as dry developing, washing, and / or etching, an example of which is a Kiyo® reactor manufactured by Lam Research Corp. in Fremont, California. Other implementations may use other tools or tool types capable of performing the dry developing, washing, and / or etching processes described herein.

[0162] The inductively coupled plasma apparatus 700 includes an overall processing chamber 724 structurally defined by chamber walls 701 and a window 711. The chamber walls 701 may be made of stainless steel, aluminum, or plastic. The window 711 may be made of quartz or other dielectric material. An optional internal plasma grid 750 divides the entire processing chamber into an upper sub-chamber 702 and a lower sub-chamber 703. In most implementations, the plasma grid 750 may be removed, thereby utilizing the chamber space consisting of sub-chambers 702 and 703. A chuck 717 is located near the bottom inner surface of the lower sub-chamber 703. The chuck 717 is configured to receive and hold a semiconductor wafer 719 on which etching and deposition processes are performed. The chuck 717 may be an electrostatic chuck for supporting the wafer 719, if present. In some implementations, an edge ring (not shown) surrounds the chuck 717, and if present on the chuck 717, its upper surface is substantially planar with the top surface of the wafer 719. The chuck 717 also includes electrostatic electrodes for securing and releasing the wafer 719 from the chuck. For this purpose, a filter and a DC clamp power supply (not shown) may be provided. Other control systems may be provided for lifting the wafer 719 from the chuck 717. The chuck 717 is rechargeable using an RF power supply 723. The RF power supply 723 is connected to a matching circuit 721 via a connector 727. The matching circuit 721 is connected to the chuck 717 via a connector 725. In this way, the RF power supply 723 is connected to the chuck 717. In various implementations, the bias power of the electrostatic chuck may be set to about 50V, or to different bias powers depending on the process performed according to the disclosed implementation. For example, the bias power may be approximately 20Vb to 100V, or approximately 30V to 150V.

[0163] The elements for plasma generation include a coil 733 positioned above the window 711. In some implementations, the coil is not used in the disclosed implementation. The coil 733 is manufactured from a conductive material and includes at least one complete turn. An example of the coil 733 shown in Figure 7 includes three turns. The cross-section of the coil 733 is indicated by symbols, where coils with "X" extend in the rotational direction so as to enter the page, and coils with "●" extend in the rotational direction so as to exit the page. The elements for plasma generation also include an RF power supply 741 configured to supply RF power to the coil 733. Generally, the RF power supply 741 is connected to a matching circuit 739 via a connector 745. The matching circuit 739 is connected to the coil 733 via a connector 743. In this way, the RF power supply 741 is connected to the coil 733. An optional Faraday shield 749a is placed between the coil 733 and the window 711. The Faraday shield 749a may be maintained in a spaced relationship with respect to the coil 733. In some configurations, the Faraday shield 749a is positioned directly above the window 711. In some configurations, the Faraday shield 749b is located between the window 711 and the chuck 717. In some configurations, the Faraday shield 749b is not maintained in a spaced relationship with respect to the coil 733. For example, the Faraday shield 749b may be positioned directly below the window 711 without any gap. The coil 733, the Faraday shield 749a, and the window 711 are configured to be substantially parallel to each other. The Faraday shield 749a can prevent metal or other types of material from accumulating on the window 711 of the processing chamber 724.

[0164] The process gas may enter the processing chamber through one or more main gas inlets 760 located in the upper sub-chamber 702 and / or through one or more side gas inlets 770. Similarly, although not explicitly shown, the process gas may be supplied to the capacitively coupled plasma processing chamber using similar gas inlets. A vacuum pump, e.g., a single or two-stage mechanical dry pump and / or turbomolecular pump 740, may be used to draw the process gas from the processing chamber 724 and maintain the pressure within the processing chamber 724. For example, the vacuum pump may be used to evacuate the lower sub-chamber 703 during a purging operation. A valve-controlled conduit may be used to fluidly connect the vacuum pump to the processing chamber 724 and to selectively control the application of the vacuum environment provided by the vacuum pump. This may be done using a closed-loop controlled flow limiting device, such as a throttle valve (not shown) or a pendulum valve (not shown), during plasma processing in operation. Similarly, a vacuum pump and valve-controlled fluid connection to the capacitively coupled plasma processing chamber may also be used.

[0165] During the operation of the apparatus 700, one or more process gases may be supplied through the gas inlets 760 and / or 770. In certain implementations, the process gas may be supplied only through the main gas inlet 760 or only through the side gas inlet 770. In some cases, the gas inlets shown in the figure may be replaced, for example, with more complex gas inlets, one or more showerheads. The Faraday shield 749a and / or optional grid 750 may include internal channels and holes that allow for the delivery of the process gas to the process chamber 724. Either or both of the Faraday shield 749a and the optional grid 750 may function as showerheads for delivering the process gas. In some implementations, a liquid vaporization and delivery system may be located upstream of the process chamber 724 so that, once the liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the process chamber 724 through the gas inlets 760 and / or 770.

[0166] High-frequency power is supplied to coil 733 from the RF power supply 741, causing an RF current to flow through coil 733. The RF current flowing through coil 533 generates an electromagnetic field around coil 733. The electromagnetic field generates an induced current in the upper sub-chamber 702. The various ions and radicals generated interact physically and chemically with wafer 719, etching the features of wafer 719 and selectively depositing layers on wafer 719.

[0167] When the plasma grid 750 is used so that both the upper sub-chamber 702 and the lower sub-chamber 703 are present, the induced current acts on the gas present in the upper sub-chamber 702, generating an electron-ion plasma within the upper sub-chamber 702. An optional internal plasma grid 750 limits the amount of hot electrons in the lower sub-chamber 703. In some implementations, the apparatus 700 is designed and operated so that the plasma present in the lower sub-chamber 703 is an ionic plasma.

[0168] Both the upper electron-ion plasma and the lower ionic plasma may contain positive and negative ions, but the ratio of negative ions to positive ions will be higher in the ionic plasma. Volatile etching and / or deposition byproducts may be removed from the lower sub-chamber 703 via port 722. The chuck 717 disclosed herein may operate at high temperatures ranging from about 10°C to about 250°C. The temperature depends on the process operation and the specific recipe.

[0169] The apparatus 700 may be coupled to equipment (not shown) when installed in a cleanroom or manufacturing facility. This equipment includes piping that provides processing gas, vacuum, temperature control, and environmental particle control. These components are coupled to the apparatus 700 when installed in the target manufacturing facility. Furthermore, the apparatus 700 may be coupled to a transport chamber that allows a robot to load and unload semiconductor wafers into the apparatus 700 using typical automation.

[0170] In some implementations, a system controller 730 (which may include one or more physical or logical controllers) controls some or all of the operation of the processing chamber 724. The system controller 730 may include one or more memory devices and one or more processors. In some implementations, the apparatus 700 includes a switching system for controlling the flow rate and duration when the disclosed implementation is performed. In some implementations, the apparatus 700 may have a switching time of up to about 500 ms, or up to about 750 ms. The switching time may depend on the chemical properties of the flow, the selected recipe, the reactor structure, and other factors.

[0171] In some implementations, the system controller 730 is part of a system, and the system may be part of the examples described above. Such a system may include a semiconductor processing apparatus comprising one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (such as wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronic equipment for controlling pre-processing, processing, and post-processing operations of semiconductor wafers or substrates. The electronic equipment may be integrated with the system controller 730 and may control various components or sub-components of one or more systems. Depending on the processing parameters and / or the type of system, the system controller 730 may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, loading and unloading of wafers into and out of tools and other transport tools, and / or load locks connected to or interfaced with a specific system.

[0172] As described above, depending on one or more processing steps performed by the tool, the controller may communicate with one or more of the following: other tool circuits or modules, other tool components, cluster tools, other tool interfaces, neighboring tools, adjacent tools, tools located throughout the factory, the main computer, another controller, or tool locations in the semiconductor manufacturing plant, and / or tools used for material transport to carry wafer containers to and from the load port.

[0173] EUVL patterning may be performed using any suitable tool, such as the TWINSCAN NXE:3300B® platform supplied by ASML in Verdhoven, Netherlands, often referred to as a scanner. The EUVL patterning tool may be a standalone device in which the substrate enters and exits for deposition and etching, as described herein. Alternatively, as will be discussed later, the EUVL patterning tool may be a module on a larger multi-element tool. Figure 8 shows a semiconductor process cluster tool architecture having vacuum integrated deposition, EUV patterning, and dry develop / etch modules interfaced with a vacuum transport module, suitable for performing the process described herein. The process may be performed without such a vacuum integrated device, although such a device may be advantageous in some implementation configurations.

[0174] Figure 8 shows a semiconductor process cluster tool architecture having vacuum-integrated deposition and patterning modules interfaced with vacuum transport modules, suitable for implementing the processes described herein. The arrangement of transport modules for "transporting" wafers between multiple storage facilities and processing modules is sometimes referred to as a "cluster tool architecture" system. The deposition and patterning modules are vacuum-integrated according to the requirements of a particular process. Other modules, such as those for etching, may also be included in the cluster.

[0175] The vacuum transfer module (VTM) 838 interfaces with four processing modules 820a–820d, which may be individually optimized to perform various manufacturing processes. For example, processing modules 820a–820d may be implemented to perform deposition, evaporation, ELD, dry development, washing, etching, stripping, and / or other semiconductor processes. For example, module 820a may be an ALD reactor capable of performing the non-plasma thermal atomic layer deposition described herein, such as the Vector tool available from Lam Research Corporation in Fremont, California. Module 820b may be a PECVD tool such as Lam Vector®. Please note that the figures are not necessarily drawn to scale.

[0176] Airlocks 842 and 846, also known as load locks or transport modules, interface with the VTM 838 and patterning module 840. For example, as mentioned above, a suitable patterning module may be the TWINSCAN NXE:3300B® platform supplied by ASML GmbH in Verdhoven, Netherlands. This tool architecture allows for the transport of workpieces, such as semiconductor substrates or wafers, under vacuum to prevent them from reacting before exposure. The integration of the deposition module with the lithography tool is facilitated by the fact that EUVL also requires significantly lower pressures, considering the strong light absorption of incident photons by ambient gases such as H2O and O2.

[0177] As mentioned above, this integrated architecture is merely one possible implementation of the tools for carrying out the described process. The process may also be implemented using more general standalone EUVL scanners and deposition reactors, such as the Lam Vector tool, which may be standalone or integrated into a cluster architecture that includes other tools such as etching and delamination (e.g., the Lam Kiyo or Gamma tool) as modules, as illustrated with reference to Figure 8, which does not include an integrated patterning module.

[0178] Airlock 842 may be an "outbound" load lock pointing to the transport of substrates from the VTM 838 working on the deposition module 820a to the patterning module 840, and airlock 846 may be an "inbound" load lock pointing to the transport of substrates from the patterning module 840 back to the VTM 838. The inbound load lock 846 may also provide an external interface for tools that load and unload substrates. Each processing module has one face that interfaces the module to the VTM 838. For example, the deposition processing module 820a has face 836. Inside each face, sensors, for example sensors 1-18 as shown, are used to detect the passage of wafers 826 as they move between the respective stations. The patterning module 840 and airlocks 842 and 846 may also have additional faces and sensors not shown.

[0179] The main VTM robot 822 transports the wafer 826 between modules, including airlocks 842 and 846. In one configuration, robot 822 has one arm, and in another configuration, robot 822 has two arms, each arm having an end effector 824 for picking up and transporting wafers such as wafer 826. The front-end robot 844 is used to transport the wafer 826 from the exit-side airlock 842 to the patterning module 840, and from the patterning module 840 to the entry-side airlock 846. The front-end robot 844 may also transport the wafer 826 between the entry-side load lock and the outside of the tool for substrate access and ejection. The entry-side airlock module 846 has the ability to match the environment between air and vacuum, so that the wafer 826 can move between these two pressure environments without being damaged.

[0180] It should be noted that EUVL tools typically operate under higher vacuum than deposition tools. In this case, it is desirable to increase the vacuum environment of the substrate during transport between the deposition and EUVL tools so that the substrate can be degassed before entering the patterning tool. The exit airlock 842 may provide this function by holding the transported wafer at a low pressure below the pressure inside the patterning module 840 for a certain period of time, thereby venting off-gass, and as a result the optics of the patterning module 840 are not contaminated by gas release from the substrate. A suitable pressure for the exit airlock venting gas is 1E-8 Torre or less.

[0181] In some implementations, the system controller 850 (which may include one or more physical or logical controllers) controls some or all of the operation of the cluster tools and / or their separate modules. Note that the controller may be local to the cluster architecture, or it may be located outside the cluster architecture within the manufacturing floor, or remotely, and connected to the cluster architecture via a network. The system controller 850 may include one or more memory devices and one or more processors. The processors may include a central processing unit (CPU) or computer, analog and / or digital input / output connections, a stepper motor controller board, and other similar components. Instructions for performing appropriate control operations are executed on the processors. These instructions may be stored in memory devices associated with the controller or provided via a network. In certain implementations, the system controller runs system control software.

[0182] The system control software may include instructions for controlling the timing of application and / or the magnitude of any aspect of tool or module operation. The system control software may be configured in any suitable way. For example, various processing tool component subroutines or control objects may be written to control the operation of processing tool components necessary to execute various processing tool processes. The system control software may be coded in any suitable computationally readable programming language. In some implementations, the system control software includes input / output control (IOC) sequencing instructions for controlling the various parameters described above. For example, each stage of a semiconductor manufacturing process may include one or more instructions to be executed by the system controller. Instructions for setting processing conditions for condensation, deposition, evaporation, patterning, and / or etching stages may be included, for example, in the corresponding recipe stages.

[0183] Apparatus for forming negative pattern masks in various implementation configurations is provided. The apparatus may include a processing chamber for patterning, deposition, and etching, and a controller which includes instructions for forming the negative pattern mask. The instructions may include a code for patterning features in a chemically amplified (CAR) resist on a semiconductor substrate by EUV exposure within the processing chamber to expose the substrate surface, a code for developing the photopatterned resist, and a code for etching the underlying layer or layer stack using the patterned resist as a mask.

[0184] It should be noted that the computer controlling wafer movement may be local to the cluster architecture, or it may be located outside the cluster architecture within the manufacturing floor, or remotely, and connected to the cluster architecture via a network. A controller as described above with respect to any of Figures 5, 6, or 7 may be implemented with the tool shown in Figure 8.

[0185] conclusion The examples and implementations described herein are for illustrative purposes only, and it should be understood that various modifications or changes will be suggested to those skilled in the art. Various design alternatives may be implemented, although various details have been omitted for clarity. Accordingly, these embodiments should be considered illustrative and not limiting, and this disclosure should not be limited to the details shown herein, but may be modified within the scope of this disclosure. [Explanation of Symbols]

[0186] 100 Process, 200 Process, 300 Processing Chamber, 302 Chamber Wall, 303 Passageway, 304 Shower Head, 306 Pedestal, 308 Semiconductor Substrate, 310 Metal-Containing Material, Organometallic Material, 312 Residue, 314 Decomposed Residue, 320 Etching Gas, 330 Reforming Gas, 340 Etching Gas, 402 Organometallic Material, 404 Chamber Wall, 406 Residue, 408 Reforming Residue, 500 Processing Station, 501 Reactant Delivery System, 503 Vaporization Point, 504 Mixing Vessel, 506 Distribution Shower Head, Shower Head, 508 Pedestal, 510 Heater, 512 Substrate, 514 RF Power Supply, 516 Matching Network, 518 Butterfly Valve, 520 Mixing Vessel Inlet Valve, 600 Multi-Station Processing Tool, Processing Tool, 602 Inbound load lock, 604 Outbound load lock, 606 Robot, 608 Pod, 610 Atmospheric port, 612 Pedestal, 614 Processing chamber, 616 Chamber port, 618 Pedestal, 650 Computer controller, System controller, 652 Processor, 654 Mass storage device, 656 Memory device, 658 System control software, 690 Wafer handling system, 700 Inductively coupled plasma apparatus, 701 Chamber wall, 702 Upper sub-chamber, 703 Lower sub-chamber, 711 Window, 717 Chuck, 719 Semiconductor wafer, Wafer, 721 Matching circuit, 722 Port, 723 RF power supply, 725 Connection, 727 Connection, 730 System controller, 733 Coil, 739 Matching circuit, 740 Turbomolecular pump, 741 RF power supply, 743 Connection, 745 Connection section, 749 Faraday shield, 750 Internal plasma grid, 760 Main gas inlet, gas inlet, 770 Side gas inlet, gas inlet, 820a Processing module, deposition module, 820b Processing module, 820c Processing module, 820d Processing module, 822 Main VTM robot, 824 End effector, 826 Wafer, 836 Surface, 840 Patterning module, 842 Airlock, 844 Front-end robot, 846 Airlock, Inlet load lock, Airlock module, 850System Controller

Claims

1. A method for cleaning a processing chamber, A step of providing a semiconductor substrate having a metal-containing resist film on its surface within the processing chamber, wherein an organometallic material is formed on one or more inner surfaces of the processing chamber. The steps include: exposing one or more inner surfaces of the processing chamber to a first non-plasma etching gas in order to remove a first portion of the organometallic material; The steps include: exposing one or more inner surfaces of the processing chamber to a non-plasma reforming gas; The steps include: exposing one or more inner surfaces of the processing chamber to a second non-plasma etching gas in order to remove the second portion of the organometallic material; A method for cleaning a processing chamber, including [a specific component].

2. The method according to claim 1, wherein the first non-plasma etching gas is the same as the second non-plasma etching gas.

3. The method according to claim 1, wherein the first non-plasma etching gas and the second non-plasma etching gas each contain a halogenated gas.

4. The method according to claim 3, wherein the first non-plasma etching gas and the second non-plasma etching gas each comprise hydrogen bromide (HBr) or hydrogen chloride (HCl).

5. The method according to claim 1, wherein the non-plasma reformed gas includes oxygen, nitrogen, water vapor, hydrogen chloride, chlorine, boron trichloride, hydrogen fluoride, fluorine, nitrogen trifluoride, carbon tetrafluoride, hydrogen bromide, bromine, carbon dioxide, carbon monoxide, air, or a mixture thereof.

6. The method according to claim 5, wherein the non-plasma reformed gas includes air.

7. The step of repeating the operation of exposing one or more inner surfaces of the processing chamber to the non-plasma modifying gas and the second non-plasma etching gas in one or more cycles until the organometallic material is removed or substantially removed from one or more inner surfaces of the processing chamber, The method according to claim 1, further comprising:

8. The method according to claim 7, wherein the number of cycles includes approximately 1 to approximately 5 cycles.

9. The method according to claim 1, wherein the one or more inner surfaces of the processing chamber from which the organometallic material is removed include chamber walls, floor, and ceiling.

10. The method according to claim 9, wherein the one or more inner surfaces of the processing chamber from which the organometallic material is removed further include a foreline, a pump exhaust, and a detoxification system.

11. The method according to claim 1, wherein the steps of exposing one or more inner surfaces of the processing chamber to the first non-plasma etching gas and exposing one or more surfaces of the processing chamber to the second non-plasma etching gas are performed at a high temperature, the high temperature being about -15°C to about 200°C.

12. The method according to claim 1, wherein the non-plasma reforming gas is configured to form a decomposed residue of the organometallic material, and the second non-plasma etching gas is configured to form volatile products together with the decomposed residue of the organometallic material.

13. The method according to claim 1, wherein the step of exposing one or more inner surfaces to the first non-plasma etching gas is to convert the unremoved portion of the organometallic material into a non-volatile byproduct, and the non-plasma modifying gas modifies the non-volatile byproduct so that it has reduced resistance to etching by the second non-plasma etching gas, or the non-plasma modifying gas removes a portion of the non-volatile byproduct and modifies a portion of the non-volatile byproduct so that it has reduced resistance to etching by the second non-plasma etching gas.

14. The method according to claim 1, wherein the metal-containing resist film comprises a metal oxide-containing EUV photoresist material.

15. The method according to claim 1, wherein the organometallic material comprises at least tin oxide.

16. The method according to claim 1, wherein the step of providing the semiconductor substrate includes the step of depositing the metal-containing resist film on the surface of the semiconductor substrate in the processing chamber.

17. The method according to claim 1, wherein the step of providing the semiconductor substrate includes the step of baking the metal-containing resist film on the surface of the semiconductor substrate in the processing chamber.

18. The method according to claim 1, wherein the step of providing the semiconductor substrate includes the step of dry developing the metal-containing resist film on the surface of the semiconductor substrate in the processing chamber.

19. A method for cleaning a processing chamber, A step of providing a semiconductor substrate having a metal-containing resist film on its surface within the processing chamber, wherein an organometallic material is formed on one or more inner surfaces of the processing chamber. To remove the first portion of the organometallic material, the steps include: exposing one or more inner surfaces of the processing chamber to an etching gas containing a halide-containing gas; The steps include exposing one or more inner surfaces of the processing chamber to a reformed gas containing oxygen, nitrogen, water vapor, carbon dioxide, carbon monoxide, or a mixture thereof, The steps include: exposing one or more inner surfaces of the processing chamber to the etching gas in order to remove the second portion of the organometallic material; A method for cleaning a processing chamber, including [a specific component].

20. The step of repeating the operation of exposing one or more inner surfaces of the processing chamber to the modifying gas and the etching gas in one or more cycles until the organometallic material is removed or substantially removed from one or more inner surfaces of the processing chamber, The method according to claim 19, further comprising:

21. A device for cleaning a processing chamber, A processing chamber having a substrate support, wherein the substrate support is configured to support the semiconductor substrate including a metal-containing resist film formed on the surface of the semiconductor substrate, A vacuum line coupled to the processing chamber, A gas line connected to the processing chamber, A controller composed of instructions, To provide the semiconductor substrate in the processing chamber, wherein the organometallic material is formed on one or more inner surfaces of the processing chamber. To remove the first portion of the organometallic material, one or more inner surfaces of the processing chamber are exposed to a first non-plasma etching gas, Exposing one or more inner surfaces of the processing chamber to a non-plasma reforming gas, To remove the second portion of the organometallic material, one or more inner surfaces of the processing chamber are exposed to a second non-plasma etching gas, A controller consisting of instructions for performing an action, An apparatus for cleaning a processing chamber, including [a specific component].

22. A foreline coupled to the processing chamber, The pump exhaust connected to the processing chamber, A detoxification system coupled to a processing chamber, wherein one or more inner surfaces of the processing chamber from which the organometallic material is removed include the foreline, the vacuum line, the pump exhaust, and the detoxification system, The apparatus according to claim 21, further comprising:

23. The apparatus according to claim 21, wherein the first non-plasma etching gas is the same as the second non-plasma etching gas.

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