Method for operating inverters and diode clamp inverters

Abstract

An inverter is described. This inverter is connectable to a DC power source and comprises a DC bus having a first leg and a second leg, a plurality of electronic switches connected in series, where the first electronic switch of the electronic switches is connected to the first leg, the second electronic switch of the electronic switches is connected to the second leg, and the plurality of electronic switches define a plurality of intermediate switch nodes between them, a voltage divider connected to the first leg and the second leg, where the voltage divider comprises a plurality of capacitors connected in series and defining at least one first partial voltage node, at least one pair of first level clamping diodes, where each pair of first level clamping diodes comprises at least two diodes connected in series and defining a diode node between at least two diodes, the diode node being connected to one of the at least one first partial voltage node. At least one diode of the pair of first level clamping diodes is connected to the intermediate switch node to define a first partial clamp voltage at the intermediate switch node, on the side of the diodes other than the diode node. The inverter further includes at least one flying capacitor connected in parallel with the first level clamping diode pair. The electronic switches are grouped into high-side switches and low-side switches. The control inputs of the high-side switches are functionally connected to switch all of the high-side switches simultaneously, and the control inputs of the low-side switches are functionally connected to switch all of the low-side switches simultaneously. The inverter is configured to generate two-level AC output power.

Description

[Technical Field]

[0001] Aspects of the present invention relate to inverters, particularly power inverters, and especially power inverters suitable for medium-voltage and / or high-voltage applications. The present invention particularly relates to the operation of a diode clamp inverter having a plurality of electronic switches connected in series. [Background technology]

[0002] A power inverter is typically an electronic circuit for generating alternating current from a direct current (DC) source. Inverters can be particularly useful in converters without transformers and / or in converters such as solid-state transformers. Such converters are becoming increasingly important due to advancements in fields such as electrified transportation, supercomputing and data centers, renewable energy production, transmission, and utilization, as well as many other industrial sectors that require power conversion. Furthermore, inverters can be used to drive machinery such as electric motors. Advantageously, compared to other solutions, inverter-based circuits can have higher power density and allow for improved control of the generated output power.

[0003] Inverters often utilize electronic switches, such as power semiconductor switches, to generate the desired output power. With increasing power demand, inverters suitable for switching voltages exceeding 200 volts, medium voltages, and even high voltages are becoming increasingly important. However, semiconductor switches with the required cutoff voltage can be expensive and / or have other performance drawbacks such as undesirable frequency response, higher internal resistance, and / or limited operating life.

[0004] The document ADAM GP ET AL: “Capacitor Balance Issues of the Diode-Clamped Multilevel Inverter operated in a Quasi Two-State mode”, IEEE TRANSACTIONS ON INDUSTRIAL ELECRONICS, IEEE SERVICE CENTER, vol. 55, no 8, 1 August 2008, pages 3088-3099, XP011232121, ISSN: 0278-0046, DOI: 10.1109 / TIE.2008.922607 describes a diode-clamped multilevel inverter. The voltage across each switching device is clamped to a capacitor divider through a diode network. This circuit operates in multilevel mode, utilizing a series capacitor bank to provide an intermediate output voltage level. Alternatively, a quasi-two-level modulation technique is used for output voltage synthesis.

[0005] Reference WO 2023 / 031346 A1 describes a flying capacitor converter having a non-dissipative voltage balancing circuit for charging the flying capacitor of the converter. The charging of C1 is S B,b1 This is achieved through the (internal) antiparallel diode. The discharge of C1 is achieved by the main semiconductor switch S 2b Synchronized with the balancing switch S B,a1 This can be achieved by switching, and as a result, the flying capacitor C1 becomes the DC bus capacitor C iYZ It is connected in parallel.

[0006] Reference EP 3 197 033 A1 describes methods and equipment for removing harmonics based on two complementary techniques, namely, selective harmonic rejection (SHE PWM) through pulse width modulation in combination with a multi-wiring transformer.

[0007] Therefore, there is a need for improved inverters, particularly those suitable for use at medium or high voltages. [Overview of the project]

[0008] Taking the above into consideration, the present invention is provided as described in the attached claims.

[0009] In one embodiment, an inverter is described. The inverter is connectable to a DC power source and comprises a DC bus having a first leg and a second leg, a plurality of electronic switches connected in series, wherein the first electronic switch of the electronic switches is connected to the first leg, the second electronic switch of the electronic switches is connected to the second leg, and the plurality of electronic switches define a plurality of intermediate switch nodes between them, a voltage divider connected to the first leg and the second leg, wherein the voltage divider comprises a plurality of capacitors connected in series and defining at least one first partial voltage node, and at least one diode of the first level clamping diode pair, wherein each first level clamping diode pair comprises at least two diodes connected in series and defining a diode node between at least two diodes, and the diode node is connected to one of the at least one first partial voltage node, and at least one diode of the first level clamping diode pair is connected to an intermediate switch node to define a first partial clamp voltage at an intermediate switch node on the side of the diode other than the diode node. The inverter further includes at least one flying capacitor connected in parallel with the first level clamping diode pair. The electronic switches are grouped into high-side switches and low-side switches. The control inputs of the high-side switches are functionally connected to switch all of the high-side switches simultaneously, and the control inputs of the low-side switches are functionally connected to switch all of the low-side switches simultaneously. The inverter (100) is configured to generate two-level AC output power.

[0010] In one embodiment, a method for operating a diode clamp inverter is described. This diode clamp inverter includes a plurality of electronic switches connected in series, the first of which is connected to a first leg of a DC bus, and the second of which is connected to a second leg of a DC bus. The electronic switches are grouped into high-side switches and low-side switches. The diode clamp inverter further includes at least one first-level clamping diode pair, each first-level clamping diode pair including at least two diodes connected in series and defining a diode node between at least two diodes. At least one diode of the first-level clamping diode pair is connected to an intermediate switch node on the side of the diodes other than the diode node to define a first partial clamp voltage at the intermediate switch node. The method includes providing a flying capacitor in parallel with at least one clamping diode pair, simultaneously switching all the high-side switches, simultaneously switching all the low-side switches, and generating two-level AC output power by switching the high-side switches and / or low-side switches.

[0011] In one embodiment, low voltage is described. Low voltage can be a voltage greater than 200 volts (V), such as a voltage between 200V and 1kV. In one embodiment, medium voltage is described. Medium voltage can be a voltage greater than 1kV, such as a voltage between 1kV and 52kV, and especially between 1kV and 30kV. For example, medium voltage can be a voltage received from a medium voltage grid, such as a 10kV grid, 15kV grid, 20kV grid, 25kV grid, 30kV grid, or even a 50kV grid, and optionally rectified.

[0012] In one embodiment, an electronic switch is described. The electronic switch may be a semiconductor component such as a transistor and / or thyristor. In particular, the electronic switch may be a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), a high-electron-mobility transistor (HEMT), or an integrated-gate commutation thyristor (IGCT).

[0013] In one embodiment, a plurality of electronic switches are described. The plurality of electronic switches are connected in series. The plurality of electronic switches may be connected to a DC power supply. The DC power supply may define a voltage such as a DC link voltage. The DC power supply may be connected to the first and second legs of a DC bus, and the DC bus may be connected to the electronic switches, for example, two of the outermost electronic switches of the plurality of electronic switches connected in series. The plurality of electronic switches have control inputs. For example, each electronic switch may have a control input such as a gate, base, or trigger. The control input may be configured to receive a control signal for selectively switching the electronic switch to either a conducting state, i.e., a closed state, or a non-conducting state, i.e., an open state.

[0014] In one embodiment, a plurality of electronic switches are grouped into high-side switches and low-side switches. The control inputs of the high-side switches are functionally connected to switch all of the high-side switches simultaneously, and the control inputs of the low-side switches are functionally connected to switch all of the low-side switches simultaneously. In some embodiments, the group of high-side switches and the group of low-side switches may each be functionally similar to a single switch.

[0015] In one embodiment, each of the multiple electronic switches has a cutoff voltage, such as a rated cutoff voltage. The cutoff voltage of an electronic switch may be lower than the voltage to be applied between the first and second legs of a DC bus. The sum of the cutoff voltages of the multiple electronic switches may be higher than the voltage to be applied between the first and second legs of a DC bus. An inverter configured to switch an 800V DC voltage may have multiple electronic switches with a cutoff voltage rating of 150V. Similarly, each of the multiple electronic switches may have a cutoff voltage of less than 1.7kV, less than 1.2kV, less than 1kV, less than 600V, less than 400V, less than 200V, or even less than 150V. Advantageously, electronic switches with lower cutoff voltages may be less expensive, more readily available, and / or have improved or more desirable switching characteristics. Advantageously, by connecting multiple electronic switches in series according to the embodiments described herein, the cutoff voltages of the multiple electronic switches can be sufficiently high to operate the inverter at a desired voltage, such as a low voltage or even a medium voltage.

[0016] According to one embodiment, the inverter has a voltage of at least 200V, at least 400V, at least 800V, at least 1kV, at least 2kV, at least 5kV, at least 10kV, at least 20kV, or even at least 30kV. DC It can be configured to switch the power of a DC power supply having

[0017] According to one embodiment, the inverter may be configured to switch the power of a DC power supply and / or provide output power having at least 1 kilowatt (kW), at least 2 kW, at least 5 kW, at least 10 kW, at least 20 kW, at least 50 kW, at least 100 kW, at least 200 kW, at least 500 kW, or even at least 1 MW.

[0018] According to one aspect, the inverter may include diodes, and these diodes form a clamping diode pair. Each diode may have a current rating of less than 50 amperes (A), less than 20 A, less than 10 A, or even less than 5 A.

[0019] According to one aspect, the inverter may include flying capacitors. Each flying capacitor may have a capacitance of 10 microfarads (μF) or less, 5 μF or less, 2 μF or less, 1 μF or less, 500 nanofarads (nF) or less, 200 nF or less, or even 100 nF or less.

[0020] According to one aspect, the inverter may be configured to drive a medium-frequency transformer, particularly in two-level operation, by generating a two-level AC output voltage having, for example, a medium frequency. For example, the inverter and / or the medium-frequency transformer may be included in a converter such as a DC / DC converter, a DC / AC converter, or even an AC / AC converter. The medium frequency according to the embodiments described herein may be understood as a frequency of 400 hertz (Hz) or more, 600 Hz or more, 800 Hz or more, 1 kHz or more, 2 kHz or more, 5 kHz or more, 20 kHz or more, 50 kHz or more, or even 100 kHz or more. Depending on the type of electronic switch, for example, in the case of a SiC MOSFET or a GaN HEMT, frequencies in the megahertz range are also possible.

[0021] According to one aspect, the inverter may be configured to exclusively generate a two-level AC output power, such as an output power having a +V DC signal and a -V DC signal, or a +V DC / 2 signal and a +V DC / 2 signal. The two-level AC output power includes a zero voltage signal and, for example, a +V DC signal and a -V DCAn output voltage including a zero-volt signal in addition to the signal can be understood as a two-level AC output. In particular, the inverter may be configured such that the inputs to the high-side switches are functionally connected to switch all of the high-side switches simultaneously, and the control inputs to the low-side switches are functionally connected to switch all of the low-side switches simultaneously, so that the high-side switches and / or low-side switches do not operate independently of each other. Thus, a method of operating the inverter may involve exclusively generating two-level AC output power.

[0022] In one embodiment, a group of high-side switches and a group of low-side switches may each be functionally similar to a single switch and should not be operated individually and / or independently of other high-side switches and / or low-side switches.

[0023] In one embodiment, the inverter may not have a switch-based voltage balancing circuit configured to set, balance, and / or maintain the voltage of the flying capacitor. Advantageously, the voltage level of the flying capacitor can be balanced through the operation of one or more pairs of clamping diodes.

[0024] Advantageously, the inverters according to the embodiments and / or models described herein provide a stable and robust partial clamp voltage at the intermediate switch node. Advantageously, no active balancing is required to provide the partial clamp voltage. Thus, high voltage ratings can be achieved by connecting multiple electronic switches in series. The inverters according to the embodiments and / or models described herein can be flexibly adapted to specific requirements, are simple, highly efficient, and / or highly reliable.

[0025] Further advantages, features, aspects, and details that can be combined with the embodiments described herein will become apparent from the dependent claims, description, and drawings.

[0026] Details are explained below with reference to the drawings. [Brief explanation of the drawing]

[0027] [Figure 1] Figure 1 is a schematic circuit diagram of a three-level inverter according to one embodiment. [Figure 2] Figure 2 is a schematic circuit diagram of a 4-level inverter according to one embodiment. [Figure 3] Figure 3 is a schematic circuit diagram of a 5-level inverter according to one embodiment. [Figure 4] Figure 4 is a schematic circuit diagram of a 7-level inverter according to one embodiment. [Figure 5] Figure 5 is a schematic circuit diagram of a simplified 5-level inverter according to one embodiment. [Figure 6] Figure 6 is a schematic circuit diagram of a simplified 7-level inverter according to one embodiment. [Figure 7] Figure 7 is a graph showing signals for switching between the high-side switch and the low-side switch over time in an inverter according to one embodiment. [Modes for carrying out the invention]

[0028] References to various embodiments are then made in detail, with one or more examples of these illustrated in each figure. Each example is provided for illustrative purposes only and is not intended to be limiting. For example, features illustrated or described as part of one embodiment may be used in or in combination with any other embodiment to bring about further embodiments. This disclosure is intended to include such modifications and variations.

[0029] In the following description of the drawings, the same reference numerals refer to the same or similar components. In some cases, the same or similar components may be assigned different reference numerals, for example, due to different configurations within an electronic circuit. Generally, only the differences relating to individual embodiments will be described. Unless otherwise specified, the description of a part or aspect in one embodiment also applies to the corresponding part or aspect in another embodiment.

[0030] Next, with reference to Figure 1, the inverter 100 will be described. The inverter 100 may be a three-level inverter. The inverter 100 is connected to a DC power supply 160 that provides DC power to a DC bus. The DC bus includes a first leg 102 and a second leg 104. The inverter 100 includes four electronic switches 110, 112, 120, and 122, such as MOSFETs, IGBTs, or any other type of transistor / thyristor, connected in series between the first leg and the second leg. Switch 110 is connected to the first leg 102 of the DC bus, and switch 120 is connected to the second leg of the DC bus. For example, as shown in Figure 1, switches 110, 112, 120, and 122 may be N-channel MOSFETs. The drain connector of switch 110 may be connected to leg 102 of the DC bus that carries a positive voltage, and the source connector of switch 120 may be connected to leg 104 of the DC bus that carries a negative voltage. According to some embodiments, each electronic switch may incorporate a complementary transistor, such as a second N-channel MOSFET connected in series with reverse drain / source polarity, for example, to increase the reverse cutoff voltage of the electronic switch.

[0031] Multiple switches 110, 112, 120, and 122 define intermediate switch nodes 115 and 125 between these electronic switches. Similarly, an intermediate switch node connected to output 170 may be defined by the innermost switches 112 and 122. For the multiple switches 110, 112, 120, and 122 to be able to operate at a DC bus voltage higher than the cutoff voltage of each individual switch, the voltage applied to each switch should not exceed the cutoff voltage of that switch. For example, the voltage applied to switch 110 may be the difference between the voltage at the first leg 102 of the DC bus and the voltage applied to the intermediate switch node 115, which may be lower than the voltage between the first leg 102 and the second leg 104 of the DC bus.

[0032] As shown in Figure 1, the inverter 100 includes a capacitive voltage divider 155. The voltage divider 155 includes two capacitors 150 and 152. The capacitors 150 and 152 are connected in series between the first leg 102 and the second leg 104 of the DC bus, defining a first partial voltage node 154 between the capacitors 150 and 152. The capacitors 150 and 152 may have equivalent characteristics, such as equivalent, similar, or even identical capacitance. For example, the voltage divider 155 may define a voltage at the first partial voltage node 154, such as half the voltage of the DC bus.

[0033] According to the embodiment, the voltage divider may include an even number of capacitors. The first partial voltage node 154 may define and / or include a neutral voltage node. For example, the first partial voltage node 154 may be connected to a neutral voltage output terminal.

[0034] In addition to functioning as voltage dividers, capacitors 150 and 152 can store energy. For example, capacitors 150 and 152 can be DC link capacitors and can operate as decoupling capacitors and / or bypass capacitors.

[0035] As shown in Figure 1, the inverter 100 includes a first-level clamping diode pair 135. The first-level clamping diode pair 135 consists of two diodes 130 connected in series. H , 130 L Includes two diodes 130 H , 130 L This consists of two diodes 130 H , 130 L A diode node 134 is defined between them, and the diode node 134 is connected to the first partial voltage node 154. H , 130 L Each of the diodes is connected to intermediate switch nodes 115 and 125 on the side of the diode other than diode node 134. As shown in Figure 1, diode 130 H It is connected to the intermediate switch node 115, and diode 130 L It is connected to the intermediate switch node 125. Therefore, the two diodes 130 H , 130 L Each diode defines a partial clamp voltage at intermediate switch nodes 115 and 125.

[0036] According to the embodiment, the voltage V DC When applied to the DC bus, the voltage at the first partial voltage node 154 is V DC It can be / 2. Therefore, clamping diode 130 H In the intermediate switch node 115, V DC A voltage of 1 / 2 can be defined, and any higher voltage can be clamped. Similarly, clamping diode 130 L At intermediate switch node 125, V DC A voltage of 2 / 2 can be defined, and any higher voltage can be clamped.

[0037] According to the embodiment, the voltage can be defined by the switching operation of the electronic switches 110, 112, 120, and 122. For example, two high-side switches 110 and 112 can be closed, i.e., switched to a conducting state, and thus the voltage at the intermediate switch node 115 can be defined to be equal to the voltage at the first leg 102.

[0038] As shown in Figure 1, the inverter 100 includes a flying capacitor 140 connected in parallel with the first-level clamping diode pair 135. In particular, the flying capacitor 140 may be located between the partial clamp voltages defined by the first-level clamping diode pair. Thus, the flying capacitor 140 may be connected to at least one intermediate switch node 115, 125. In the example shown in Figure 1, the flying capacitor is connected to two intermediate switch nodes 115, 125.

[0039] Advantageously, the flying capacitor 140 improves the robustness of the inverter 100 by storing energy within the flying capacitor that is suitable for robustly defining the relative voltage between the clamping diodes 135, or even at one or more intermediate switch nodes 115, 125. In particular, the voltage defined by the flying capacitor 140 remains essentially stable even during the switching of the electronic switches 110, 112, 120, and 122.

[0040] Advantageously, active balancing of the flying capacitor is not required, particularly due to the function of one or more clamping diode pairs, such as the first-level clamping diode pair 135. In particular, inverter 100 has the robustness of a flying capacitor inverter and the simplicity of a diode clamp inverter. According to one embodiment, inverter 100 can be considered a diode clamp flying capacitor inverter.

[0041] As shown in Figure 1, the electronic switches 110, 112, 120, and 122 are grouped into high-side switches 110, 112 and low-side switches 120, 122. The high-side switches are located between the first leg 102 of the DC bus and the output 170, while the low-side switches are located between the second leg 104 of the DC bus and the output 170. Note that the terms "high-side" and "low-side" may relate to the function of the switches in the circuit and do not necessarily relate to the location of the switches in the circuit or the type of switch used, such as N-channel or P-channel transistors.

[0042] The high-side switches 110 and 112 each have a control input 111, such as a gate. Similarly, the low-side switches 120 and 122 each have a control input 121. The control inputs 111 of the high-side switches and the control inputs 121 of the low-side switches are functionally connected. When controlled by a signal at control input 111, the high-side switches 110 and 112 switch simultaneously. Similarly, when controlled by a signal at control input 121, the low-side switches 120 and 122 also switch simultaneously.

[0043] In some embodiments, the control device may be configured to provide signals to each control input 111 and / or control input 121, individually connected to each control input 111 and / or control input 121 via an insulator, in order to simultaneously switch the high-side switch and the low-side switch. The insulator may provide isolation between the control inputs of the electronic switch.

[0044] According to the embodiment, the inverter 100 shown in Figure 1 may be a three-level inverter. This can be understood as three partial voltage levels defined for a plurality of electronic switches, namely, the voltage level between the first leg 102 and the second leg 104 of the DC bus, the voltage level between the intermediate switch nodes 115 and 125, and the voltage level at output 170. The term three-level inverter should not be understood as the inverter 100 being configured to provide three levels of output power. In particular, the inverter 100 is ±V DC The rectangular output power of 1 / 2 can be provided by, for example, two-level operation, by simultaneously switching the high-side switches 110 and 112 and the low-side switches 120 and 122 alternately. A method for operating a diode clamp inverter such as inverter 100 will be described in more detail with reference to Figure 7.

[0045] Advantageously, either current is transmitted through the flying capacitor 140 or the clamping diode 135. H , 130 L It is not intended for current to flow through the flying capacitor 140 or diode 130. H , 130 L These can be sized to accommodate much lower current ratings compared to electronic switches 110, 112, 120, and 122. For example, even in high-power applications such as 200kW inverters, the diodes in the flying capacitor(s) and clamping diode(s) can be small components such as SMD components.

[0046] For example, in some embodiments, in a 200kW converter, diode 130 H , 130 LThe current rating of the diodes may be less than 10 amperes (A), or even as low as 5 A, and the capacitance of the flying capacitor 140 may be as low as 500 nanofarads (nF), or even as low as 220 nF. It has been observed that the clamping diode pairs and flying capacitors in the inverters according to the embodiments described herein are exposed to current mainly due to the non-identical switching times of the multiple electronic switches. Therefore, the required ratings of the clamping diode pairs and flying capacitors may be essentially independent of the power being switched.

[0047] Next, we will describe inverter 200 with reference to Figure 2. Inverter 200 may be a 4-level inverter. We will only explain the differences from inverter 100, which was described with reference to Figure 1.

[0048] The inverter 200 includes a capacitive voltage divider 155, which includes four capacitors 150, 250, 152, and 252 connected in series. The first partial voltage node 154 H This is defined by capacitors 150 and 250. Second partial voltage node 154 L This is defined by capacitors 152 and 252. According to the embodiment, a partial voltage node 154, which is a neutral voltage node, may be defined by capacitors 250 and 252.

[0049] Inverter 200 has four diodes 130 H , 132 H , 130 L , 132 L Includes a first-level clamping diode pair 135, including two diodes 130 H , 132 H This consists of two diodes 130 H , 132 H Between diode node 134 H Define the diode node 134 H This is the first partial voltage node 154 H Connected. Two diodes 130L , 132 L This consists of two diodes 130 L , 132 L Between diode node 134 L Define the diode node 134 L This is the second partial voltage node 154 L Connected. Two diodes 130 H , 130 L Each diode is connected to diode node 134 H , 134 L On the other side of the diode, it is connected to intermediate switch nodes 115 and 125. As shown in Figure 2, diode 130 H It is connected to an intermediate switch node 115 between electronic switches 110 and 112, and diode 130 L It is connected to the intermediate switch node 125 between electronic switches 120 and 122. Therefore, the two diodes 130 H , 130 L Each diode defines a partial clamp voltage at the connected intermediate switch nodes 115, 125. Flying capacitor 140 H , 140 L It is connected in parallel with the first level clamping diode pair 135. In particular, the flying capacitor 140 H diode 130 H , 132 H Each of the 134 nodes H On the other side, diode 130 H , 132 H It can be connected to the flying capacitor 140. L diode 130 L , 132 L Each of the 134 nodes L On the other side, diode 130 L , 132 L It can be connected to.

[0050] According to one embodiment, as shown in Figure 2, the first-level clamping diode pair 135 may include two first-level clamping diode pairs. For example, diode 130H , 132 H can form a first first-level clamping diode pair, and diode 130 L , 132 L can form a second first-level clamping diode pair. Each diode node 134 H , 134 L is a partial voltage node 154 H , 154 L can be connected to

[0051] According to an embodiment, when voltage V DC is applied to the DC bus, the voltage at the first partial voltage node 154 H can be 3 / 4V DC , and the voltage at the second partial voltage node 154<00​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​H ,230 L A diode node 234 is defined between them. Diode node 234 is connected to the first level partial clamp voltage node 254. Furthermore, diode node 234 is connected to the flying capacitor 140 H , 140 L Two diodes 230 are connected to one side of each of them. H ,230 L Each of the diodes is connected to intermediate switch nodes 115 and 125 on the side of the diode other than diode node 234. As shown in Figure 2, diode 230 H It is connected to the intermediate switch node 115 between electronic switches 112 and 114, and diode 130 L It is connected to the intermediate switch node 125 between electronic switches 122 and 124. Therefore, the two diodes 230 H ,230 L Each diode defines a partial clamp voltage at the connected intermediate switch nodes 115 and 125. The second-level clamping diode pair 235 can function similarly to the first-level clamping diode pair, for example, the first-level clamping diode pair 135 shown in Figure 1, except that the voltage at diode node 234 is defined by the first-level clamping diode pair 135 of the inverter 200 instead of the voltage divider 155.

[0054] The inverter 200 further includes a flying capacitor 240 connected in parallel to the second-level clamping diode pair. Electronic switches 110, 112, and 114 are grouped as high-side switches, and electronic switches 120, 122, and 124 are grouped as low-side switches.

[0055] Next, the inverter 300 will be described with reference to Figure 3. The inverter 300 may be a 5-level inverter. Only the differences between it and the inverter 100 described with reference to Figure 1 and / or the inverter 200 described with reference to Figure 2 will be described.

[0056] The inverter 300 includes a second-level clamping diode pair 235 and a third-level clamping diode pair 335. The second-level clamping diode pair 235 and the third-level clamping diode pair 335 may function similarly to the first-level clamping diode pair 135 and the second-level clamping diode pair 235 shown in Figure 2, but with diode node 234 H and 234 L The difference is that the voltage at this point is defined by the clamping diode pair 135 of the first level of the inverter 300, instead of the voltage divider 155.

[0057] The inverter 300 includes two second-level clamping diode pairs 235 connected in series. The first clamping diode pair is diode 230 H ,232 H It is formed by and between those diodes there is a diode node 234 H The second clamping diode pair is defined as diode 230 L ,232 L It is formed by and between those diodes there is a diode node 234 L The second level partial clamp voltage node is defined by diode 232. H ,232 L It is formed between two flying capacitors 240 H ,240 L They are connected in series with each other, and the flying capacitor 240 H This is diode 230 H ,232 H It is connected in parallel to the clamping diode pair formed by the flying capacitor 240 L This is diode 230 L ,232 L It is connected in parallel to the clamping diode pair formed by the same mechanism.

[0058] Inverter 300 has 6 diodes 130 H , 132H , 130 L , 132 L , 136 H , 136 L Includes a first-level clamping diode pair 135, which comprises two diodes 130. H , 132 H This consists of two diodes 130 H , 132 H Between diode node 134 H Define the diode node 134 H This is the first partial voltage node 154 H Connected. Two diodes 130 L , 132 L This consists of two diodes 130 L , 132 L Between diode node 134 L Define the diode node 134 L This is the second partial voltage node 154 L Two diodes 136 are connected. H , 136 L This defines the diode node connected to the neutral part voltage node 154. Two diodes 130 H , 130 L Each diode is connected to diode node 134 H , 134 L On the other side of the diode, it is connected to intermediate switch nodes 115 and 125. As shown in Figure 3, diode 130 H It is connected to an intermediate switch node 115 between electronic switches 110 and 112, and diode 130 L It is connected to the intermediate switch node 125 between electronic switches 120 and 122. Therefore, the two diodes 130 H , 130 L Each diode defines a partial clamp voltage at the connected intermediate switch nodes 115 and 125. Diode 136 H This is on the diode side other than the diode node, second level clamping diode vs diode node 235 234 H It is connected to diode 136.L This is on the diode side other than the diode node, second level clamping diode vs diode node 235 234 L It is connected to the flying capacitor 140, 140. H , 140 L It is connected in parallel with the first level clamping diode pair 135. In particular, the flying capacitor 140 H diode 130 H , 132 H Each of the 134 nodes H On the other side, diode 130 H , 132 H It can be connected to the flying capacitor 140. L diode 130 L , 132 L Each of the 134 nodes L On the other side, diode 130 L , 132 L It can be connected to the following. In particular, the flying capacitor 140 is connected to the diode 136 H , 136 L Diode 136 other than the diode node H , 136 L On each side of it, diode 136 H , 136 L It can be connected to.

[0059] As shown in Figure 3, the inverter 300 includes eight electronic switches, with switches 110, 112, 114, and 116 being high-side switches and switches 120, 122, 124, and 126 being low-side switches. Partial clamp voltages are supplied to intermediate switch nodes 115, 125 and / or defined by first-level, second-level, and third-level clamp diode pairs 135, 235, and 335, and flying capacitors.

[0060] As is evident from the embodiments described with reference to Figures 1 to 3, the inverter according to the embodiments may include any number of electronic switches connected in series. Therefore, higher-level clamping diode pairs may be provided to define the voltage at the intermediate switch nodes. For example, each clamping diode pair may define the voltage at the high-side intermediate switch node and / or the low-side intermediate switch node.

[0061] An inverter according to an embodiment may include at least one pair of n-th level clamping diodes, the n-th level clamping diode pair including at least two diodes connected in series and defining a diode node between the two diodes. The diode node may be connected to a (n-1)-th level partial clamp voltage node. A first-level diode node may be connected to a partial voltage node defined by a voltage divider. At least one diode of each n-th level clamping diode pair is connected to an intermediate switch node to define an n-th level partial clamp voltage at the intermediate switch node. The inverter may include at least one flying capacitor connected in parallel to the n-th level clamping diode pair, and may also include a plurality of flying capacitors, each capacitor connected to two diodes of each n-th level clamping diode pair. n may be 2 or more. An inverter with n=2 may be inverter 200 as shown in Figure 2. An inverter with n=3 may be inverter 300 as shown in Figure 3. An inverter with n=5 may be inverter 400 as shown in Figure 4.

[0062] Next, referring to Figure 4, a 7-level inverter 400 is shown. Only the differences from inverters 100, 200, and 300, which were described with reference to Figures 1 to 3, will be explained. This inverter includes a voltage divider 155 containing six capacitors. The inverter further includes twelve electronic switches connected in series.

[0063] The first-level clamping diode pair 135 includes 10 diodes connected in series and is connected to a partial voltage node defined by a voltage divider 155 at the diode node defined by the diodes of the first-level clamping diode pair 135. The outermost diode of the first-level clamping diode pair 135 defines a first partial clamp voltage at the intermediate switch nodes of electronic switches 410, 420. Five flying capacitors 440 are connected to the first-level clamping diode pair 135 at the clamp partial voltage node defined by the first-level clamping diode pair 135.

[0064] The second-level clamping diode pair 235 includes eight diodes connected in series and is connected to the clamp partial voltage node defined by the first-level clamping diode pair 135 at the diode node defined by the diodes of the second-level clamping diode pair 235. The outermost diode of the second-level clamping diode pair 235 defines a second partial clamp voltage at the intermediate switch nodes of the electronic switches 410, 420. The four flying capacitors 442 are connected to the second-level clamping diode pair 235 at the clamp partial voltage node defined by the second-level clamping diode pair 235.

[0065] The third-level clamping diode pair 335 includes six diodes connected in series and is connected to the clamp partial voltage node defined by the second-level clamping diode pair 235 at the diode node defined by the diodes of the third-level clamping diode pair 335. The outermost diode of the third-level clamping diode pair 335 defines a third partial clamp voltage at the intermediate switch nodes of the electronic switches 410, 420. The three flying capacitors 444 are connected to the third-level clamping diode pair 335 at the clamp partial voltage node defined by the third-level clamping diode pair 335.

[0066] The fourth-level clamping diode pair 435 includes four diodes connected in series and is connected to the clamp partial voltage node defined by the third-level clamping diode pair 335 at the diode node defined by the diodes of the fourth-level clamping diode pair 435. The outermost diode of the fourth-level clamping diode pair 435 defines the fourth partial clamp voltage at the intermediate switch nodes of the electronic switches 410, 420. The two flying capacitors 446 are connected to the fourth-level clamping diode pair 435 at the clamp partial voltage node defined by the fourth-level clamping diode pair 435.

[0067] The fifth-level clamping diode pair 535 includes two diodes connected in series and is connected to a clamp partial voltage node defined by the fourth-level clamping diode pair 435 at a diode node defined by the diodes of the fifth-level clamping diode pair 535. The diodes of the fourth-level clamping diode pair 435 define a fourth partial clamp voltage at the intermediate switch nodes of electronic switches 410, 420. A flying capacitor 448 is connected to the fifth-level clamping diode pair 535 at a fifth clamp partial voltage node defined by the fifth-level clamping diode pair 535.

[0068] As is evident from the embodiments shown in Figures 1 to 4, the number of clamping diode pairs and flying capacitor components increases non-linearly with the number of electronic switches. Therefore, >7-level inverters may be undesirable for some applications. Inverters having a beneficially reduced number of components and at least some of the advantages of the inverters described with reference to Figures 1 to 4 can be obtained, for example, by combining submodules of 3-level, 4-level, 5-level, 6-level, or even higher-level inverters.

[0069] According to one embodiment, an inverter based on a lower-level inverter submodule can be obtained by connecting one of the first partial voltage nodes to an intermediate switch node. Advantageously, the first partial voltage node may be a neutral voltage node, in particular a neutral voltage node defined by a voltage divider. In particular, the neutral voltage node may be connected to a neutral voltage intermediate switch node, i.e., an intermediate switch node symmetrically provided between a pair of electronic switches.

[0070] Next, with reference to Figure 5, a five-level inverter 500 based on two three-level submodules will be described. The three-level submodules may be similar in operation to the three-level inverter 100 described with reference to Figure 1. Inverter 500 shares some of the characteristics of inverters according to the embodiments described herein, such as inverters 100, 200, 300, and 400 described with reference to Figures 1 to 4. Only the differences from inverters 100, 200, 300, and 400 will be described.

[0071] The inverter 500 includes a voltage divider 155 having four capacitors 150, 152, 250, and 252 connected in series. The voltage divider has three sub-voltage nodes 154, 154 H , 154 L The region is defined. The partial voltage node 154 may be a neutral voltage node.

[0072] The inverter 500 includes eight electronic switches 510, 512, 514, 516, 520, 522, 524, and 526 connected in series to the DC bus. The outermost electronic switches 510 and 516 may be connected to legs 102 and 104 of the DC bus.

[0073] As shown in Figure 5, the inverter 500 has a first level clamping diode pair 535 H And the second first level clamping diode vs 535 L and, including, in some embodiments, a first level clamping diode pair 535 H and the second first level clamping diode vs 535 L The diode is not directly connected. First level clamping diode vs 535 H and the second first level clamping diode vs 535 L This consists of two diodes 530 connected in series and defining the first and second diode nodes. H , 530 L and 532 H , 532 LEach includes the first diode node, the first partial voltage node 154 H The second diode node is connected to the second partial voltage node 154. L Connected.

[0074] First level clamping diode pair 535 H The first diode 530 H However, the first intermediate switch node 1151 is connected to define the first partial clamp voltage of the electronic switches 510, 512. The first level clamping diode pair 535 H The second diode 530 L It is connected to a second intermediate switch node 1152 to define the second partial clamp voltage of the electronic switches 524 and 526.

[0075] Second first level clamping diode pair 535 L The first diode 532 H However, to define the third partial clamp voltage of the electronic switches 520, 522, a third intermediate switch node 1252 is connected. Second first level clamping diode pair 535 L The second diode 532 L However, the electronic switches 514 and 516 are connected to a fourth intermediate switch node 1251 to define the fourth partial clamp voltage.

[0076] Inverter 500 has two outputs 174 and 176 that are connected differently compared to outputs 170 and 172 of inverters 100, 200, 300, and 400. In particular, in some embodiments, neither of outputs 174 nor 176 is connected to a neutral point such as a neutral voltage node 154.

[0077] Flying Capacitor 540 H , 540 L However, the first and second first level clamping diodes vs 535 H , 535 L Each of them is connected in parallel.

[0078] In inverter 500, electronic switches 510, 512, 514, and 516 are grouped as high-side switches, and electronic switches 520, 522, 524, and 526 are grouped as low-side switches. Therefore, the control inputs 111 of the high-side switches 510, 512, 514, and 516 and the control inputs 121 of the low-side switches 520, 522, 524, and 526 are functionally connected to switch the high-side switches and / or low-side switches simultaneously.

[0079] When the high-side switch is closed, outputs 174 and 176 are connected to the voltage of the DC power supply. When the low-side switch is closed, these outputs are short-circuited through the low-side switch. Thus, in a non-limiting example, inverter 500 may be particularly suitable for driving inductive loads such as a medium-frequency transformer having a DC interruption capacitor connected in series. As an addition or alternative, inverter 500 may be one of several inverters, for example, in a bridge configuration.

[0080] Next, with reference to Figure 6, a 7-level inverter 600 based on two 4-level submodules will be described. The 4-level submodules may be similar in operation to the 4-level inverter 200 described with reference to Figure 2. Inverter 600 shares some of the characteristics of inverters according to embodiments described herein, such as inverters 100, 200, 300, 400, and 500 described with reference to Figures 1 to 5. Only the differences from inverters 100, 200, 300, 400, and 500 will be described.

[0081] The inverter 600 includes a voltage divider 155 having six capacitors connected in series and defining partial voltage nodes. The partial voltage node 154 may be a neutral voltage node.

[0082] Similar to the 4-level inverter 200, each of the 4-level submodules has a first-level clamping diode paired with a 635 H,635 L And, a flying capacitor 640 connected in parallel to the first level clamping diode pair. H ,640 L and, including, each first level clamping diode pair 635 H ,635 L However, at the intermediate switching node, two partial clamp voltages are defined: the first level clamping diode versus the 635. H ,635 L The partial clamp voltage node defined by the second level clamping diode vs 636 H ,636 L It is connected to the diode node. Each second level clamping diode pairs with 636 H ,636 L However, at the intermediate switching node, two partial clamp voltages are defined. Flying capacitor 648 H ,648 L However, they are connected in parallel to each of the first and second level clamping diode pairs.

[0083] As described with reference to the inverter 500 shown in Figure 5, the inverter 600 includes a high-side switch 610 and a low-side switch 620.

[0084] In some embodiments, the voltage divider 155 has been described as a plurality of series-connected capacitors, but different voltage dividers can be implemented, in addition or alternative, without departing from the scope of the present disclosure. For example, the voltage divider may include, for example, one or more capacitors provided between the legs of a DC bus and / or between the legs of a DC bus and a neutral voltage node, and some or all of the partial voltage nodes may be defined by a voltage divider including a plurality of resistors, such as a resistive voltage divider in parallel with a capacitive voltage divider.

[0085] Next, with reference to Figure 7, a method for operating the diode clamp inverter will be described. The diode clamp inverter may be an inverter according to the embodiments described herein, such as inverter 100, 200, 300, 400, 500, or 600.

[0086] According to the embodiments, the operation of the method, in particular the method relating to the switching of an electronic switch, may be performed by a control device in accordance with the embodiments described herein.

[0087] The inverter may include a number of electronic switches connected in series, with a first electronic switch connected to a first leg of the DC bus and a second electronic switch connected to a second leg of the DC bus. The electronic switches are grouped into high-side switches and low-side switches. The inverter has at least one first-level clamping diode pair, each first-level clamping diode pair including at least two diodes connected in series and defining a diode node between at least two diodes. At least one diode of the first-level clamping diode pair is connected to an intermediate switch node on the diode side other than the diode node to define a first partial clamp voltage at the intermediate switch node.

[0088] According to one embodiment, the inverter may include a flying capacitor connected in parallel with the clamping diode pair.

[0089] The method involves providing a flying capacitor in parallel with at least one pair of clamping diodes. Multiple flying capacitors may be provided. The flying capacitor(s) may be one or more of the flying capacitors 140, 240, 340, 440, 442, 444, 446, 448, 540, 640, and 648 described with reference to Figures 1 to 6.

[0090] The method further includes simultaneously switching all high-side switches and simultaneously switching all low-side switches.

[0091] Next, referring to Figure 7, a graph 700 is provided showing the switching of the high-side switch and the low-side switch. Graph 700 shows the signal S along time t. Hx S Lx This indicates the signal level. Signal S Hx This can be provided to the input of a high-side switch, such as the control input 111 described with reference to Figures 1 to 6, and the signal S Lx This can be provided to the input of a low-side switch, such as input 121, as described with reference to Figures 1 to 6.

[0092] As shown in Graph 700, signal S Hx S Lx The signals S are provided alternately at a predetermined frequency. Hx S Lx When switching between them, for example, to allow all closed switches to return to the open state and / or to stabilize the voltage applied to the intermediate switching node, a dead time T is required. d A dead time T is provided. d This can beneficially allow the voltage across each of the multiple switches to be stabilized at a voltage lower than the maximum cutoff voltage of the switch, which can beneficially prevent failures such as the avalanche breakdown effect of MOSFETs, but is not limited to these.

[0093] As shown in Graph 700, by switching multiple electronic switches, the inverter generates two-level AC output power with voltages such as an output voltage that essentially has a rectangular waveform. In addition, in some embodiments, for example, when all switches are in the open state, for example, a dead time T d During this time, an output state with a zero output voltage may be generated. In some embodiments, the output voltage is +V DC / 2 and -V DCOutput states may include those with an output voltage level of / 2, and optionally zero (open circuit). In some embodiments, the output voltage is +V DC This may include output states with output voltage levels of zero (closed circuit) and optionally zero (open circuit).

[0094] According to some embodiments, the method may include driving a medium-frequency transformer with an output voltage. According to some embodiments, the method may include, for example, the use of an inverter according to the embodiments described herein to drive a medium-frequency transformer. This use may include converting voltages, such as converting a DC voltage to an AC voltage or a DC voltage to a DC voltage.

[0095] Methods for operating inverters and diode clamp inverters have been described according to exemplary embodiments. As will be apparent from this disclosure, these inverters can be readily adapted to specific requirements. In particular, instead of relying on electronic switches with higher cutoff voltages to switch higher DC voltages, higher-level inverters including a higher plurality of electronic switches connected in series may be used.

[0096] The inverter according to the embodiment shown in Figure 5 or Figure 6 may have a beneficially reduced number of components while providing a beneficially large number of electronic switches. Providing submodule-based inverters, such as a 10-level inverter based on a 5-level submodule or a 13-level inverter based on a 7-level submodule, is within the scope of this disclosure. The following implementations, which may be combined with the embodiments or models described herein, are described:

[0097] Implementation form 1: An inverter that is connectable to a DC power supply and comprises a DC bus having a first leg and a second leg, a plurality of electronic switches connected in series, wherein the first electronic switch is connected to the first leg, the second electronic switch is connected to the second leg, and the plurality of electronic switches define a plurality of intermediate switch nodes between them, a voltage divider connected to the first leg and the second leg, wherein the voltage divider comprises a plurality of capacitors connected in series and defining at least one first partial voltage node, at least one pair of first level clamping diodes, wherein each pair of first level clamping diodes is connected in series and defining a diode node between at least two diodes The electronic switch comprises two diodes, each diode node connected to one of at least one first partial voltage nodes, and at least one diode of a first level clamping diode pair connected to an intermediate switch node to define a first partial clamp voltage at the intermediate switch node on the diode side other than the diode node, and at least one flying capacitor connected in parallel to the first level clamping diode pair, wherein the electronic switch is grouped into a high-side switch and a low-side switch, the control input of the high-side switch functionally connected to switch all of the high-side switches simultaneously, and the control input of the low-side switch functionally connected to switch all of the low-side switches simultaneously.

[0098] Implementation form 2: A method for operating a diode clamp inverter, the diode clamp inverter comprising a plurality of electronic switches connected in series, wherein a first electronic switch of the electronic switches is connected to a first leg of a DC bus, a second electronic switch of the electronic switches is connected to a second leg of a DC bus, the electronic switches are grouped into high-side switches and low-side switches, and at least one pair of first-level clamping diodes, wherein each pair of first-level clamping diodes comprises at least two diodes connected in series and defining a diode node between at least two diodes, and at least one diode of the pair of first-level clamping diodes is connected to an intermediate switch node on the side of the diodes other than the diode node to define a first partial clamp voltage at the intermediate switch node, the method comprising providing a flying capacitor in parallel with at least one pair of clamping diodes, simultaneously switching all high-side switches, simultaneously switching all low-side switches, and generating two-level AC output power by switching the high-side switches and / or low-side switches.

Claims

1. Inverter (100), A DC bus that can be connected to a DC power supply (160) and has a first leg (102) and a second leg (104), A plurality of electronic switches (110, 112, 120, 122) are connected in series, where the first electronic switch (110) is connected to the first leg (102), and the second electronic switch (120) is connected to the second leg (104), and the plurality of electronic switches define a plurality of intermediate switch nodes (115, 125) between them. A voltage divider (155) connected to the first leg (102) and the second leg (104), wherein the voltage divider comprises a plurality of capacitors (150, 152) connected in series and defining at least one first partial voltage node (154), At least one pair of first-level clamping diodes (135), where each pair of first-level clamping diodes (135) is connected in series with at least two diodes (130 Ｈ , 130 Ｌ The at least two diodes (130) define a diode node (134) between them. Ｈ , 130 Ｌ ) comprising, the diode node (134) is connected to one of the at least one first partial voltage node (154), and at least one diode (130) of the first level clamping diode pair (135) Ｈ , 130 Ｌ ) is connected to the intermediate switch nodes (115, 125) on the side of the diode other than the diode node (134) in order to define a first partial clamp voltage at the intermediate switch nodes (115, 125), At least one flying capacitor (140) connected in parallel to the first level clamping diode pair (135), Equipped with, The aforementioned electronic switches (110, 112, 120, 122) are grouped into high-side switches (110, 112) and low-side switches (120, 122). The control input (111) of the high-side switches (110, 112) is functionally connected to switch all of the high-side switches (110, 112) simultaneously. The control input (121) of the low-side switches (120, 122) is functionally connected to switch all of the low-side switches (120, 122) simultaneously. The inverter (100) is configured to generate two-level AC output power.

2. The inverter according to claim 1, further comprising a control device connected to the control inputs (111, 121) and configured to provide signals for simultaneously switching the high-side switches (110, 112) and signals for simultaneously switching the low-side switches (120, 122).

3. The inverter according to claim 1 or 2, wherein the voltage divider comprises an even number of capacitors, and the at least one first partial voltage node (154) comprises a neutral voltage node.

4. The at least one pair of first-level clamping diodes (135) defines a second partial clamp voltage at the first-level partial clamp voltage node (254), At least one second-level clamping diode pair (235), wherein the second-level clamping diode pair is connected in series and includes at least two diodes (230 Ｈ , 230 Ｌ ), and the at least two diodes define a diode node (234) between them, the diode node (234) is connected to the first-level partial clamp voltage node (254), and at least one diode (230 Ｈ , 230 Ｌ ) of the second-level clamping diode pair is connected to the intermediate switch node (115, 125) to define a third partial clamp voltage at the intermediate switch node (115, 125), At least one flying capacitor (240) connected in parallel to the second level clamping diode pair (235), An inverter according to any one of claims 1 to 3, further comprising the above.

5. The present invention comprises at least two pairs of second-level clamping diodes (235) according to claim 4 connected in series, with each diode node (234 Ｈ , 234 Ｌ ) has a first-level partial clamp voltage node (134) which has a different second partial clamp voltage. Ｈ , 134 Ｌ It is connected to ) The flying capacitor connected in parallel to the second level clamping diode pair is connected in series with at least two flying capacitors (240 Ｈ , 240 Ｌ ) The inverter according to claim 4.

6. At least one n-th level clamping diode pair (335), wherein the n-th level clamping diode pair comprises at least two diodes connected in series and defining a diode node (334) between at least two diodes (330, 332), the diode node (334) being connected to an (n-1)-th level partial clamp voltage node, and at least one diode (330, 332) of each n-th level clamping diode pair (335) being connected to an intermediate switch node (115, 125) to define an n-th level partial clamp voltage at the intermediate switch node (115, 125). At least one flying capacitor (340) connected in parallel to the n-level clamping diode pair, Equipped with, Here, n is 2 or more, the inverter according to claim 4 or 5.

7. The inverter according to any one of claims 1 to 6, wherein one of the first partial voltage nodes is connected to an intermediate switch node.

8. Connected in series and with three partial voltage nodes (154, 154) Ｈ , 154 Ｌ The voltage divider (155) comprises four capacitors (150, 152, 250, 252) that define the voltage, Eight electronic switches (510, 512, 514, 516, 520, 522, 524, 526) are connected in series to the DC bus, Two diodes connected in series and defining the first diode node (530 Ｈ , 530 Ｌ A first level clamping diode pair (535) comprising Ｈ ) and here, the first diode node is the first partial voltage node (154) of the three partial voltage nodes. Ｈ It is connected to ) and here, The first level clamping diode pair (535 Ｈ ) the first diode (530 Ｈ ) in order to define the first partial clamp voltage of the electronic switches (510, 512), the first intermediate switch node (115 １ It is connected to ) The first level clamping diode pair (535 Ｈ ) the second diode (530 Ｌ ) defines the second partial clamp voltage of the electronic switches (524, 526) using a second intermediate switch node (115 ２ It is connected to ) Two diodes connected in series and defining a second diode node (532 Ｈ , 532 Ｌ A second first level clamping diode pair (535) is provided. Ｌ ) and here, the second diode node is the second partial voltage node (154) of the three partial voltage nodes. Ｌ It is connected to ) and here, The second pair of first level clamping diodes (535 Ｌ ) the first diode (532 Ｈ ) defines the third partial clamp voltage of the electronic switches (520, 522) by using a third intermediate switch node (125 ２ It is connected to ) The second pair of first level clamping diodes (535 Ｌ ) the second diode (532 Ｌ ) to define the fourth partial clamp voltage of the electronic switches (514, 516), a fourth intermediate switch node (125 １ It is connected to ) The third of the three partial voltage nodes (154) is connected to the fifth intermediate switch node. An inverter (500) according to any one of claims 1 to 7, comprising:

9. The inverter according to any one of claims 1 to 8, wherein the inverter is configured to switch the power of a DC power supply having a voltage of at least 10 kV and / or a power of at least 100 kW.

10. The inverter according to any one of claims 1 to 9, wherein the current rating of the diodes in each clamping diode pair is less than 10 A, and / or the capacitance of each of the flying capacitors is less than 500 nF.

11. The inverter according to any one of claims 1 to 10, wherein the inverter is configured to drive a medium-frequency transformer in two-level operation.

12. The inverter according to any one of claims 1 to 11, wherein the electronic switch is selected from the group consisting of MOSFET, IGBT, HEMT, and IGCT, and in particular, the electronic switch is rated for a cutoff voltage of less than 1.7 kV.

13. A method for operating a diode clamp inverter, wherein the diode clamp inverter is A plurality of electronic switches (110, 112, 120, 122) connected in series, wherein the first electronic switch (110) is connected to the first leg (102) of the DC bus, the second electronic switch (120) is connected to the second leg (104) of the DC bus, and the electronic switches (110, 112, 120, 122) are grouped into high-side switches (110, 112) and low-side switches (120, 122). At least one pair of first-level clamping diodes (135), where each pair of first-level clamping diodes (135) is connected in series with at least two diodes (130 Ｈ , 130 Ｌ The at least two diodes (130) define a diode node (134) between them. Ｈ , 130 Ｌ ) comprising at least one diode (130) of the first level clamping diode pair (135) Ｈ , 130 Ｌ ) is connected to the intermediate switch nodes (115, 125) on the side of the diode other than the diode node (134) in order to define a first partial clamp voltage at the intermediate switch nodes (115, 125), The method comprises, A flying capacitor (140) is provided in parallel with at least one pair of clamping diodes, Switching all high-side switches (110, 112) simultaneously, Switching all low-side switches (120, 122) simultaneously, By switching the aforementioned high-side switch and / or the aforementioned low-side switch, two-level AC output power is generated, A method that includes [a certain feature].

14. The method according to claim 13, comprising: operating the high-side switch so that the high-side switch is functionally similar to a single switch; and operating the low-side switch so that the low-side switch is functionally similar to a single switch.

15. The method according to claim 14, further comprising driving a medium-frequency transformer with the output power.

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