Stand-up wafer cassette

The stand-up wafer cassette addresses wafer alignment issues by vertically supporting wafers with arched surfaces, ensuring stability and efficient handling in semiconductor manufacturing.

JP3253988UActive Publication Date: 2025-12-12HANGZHOU ZHONGGUI ELECTRONICS TECH CO LTD
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Patent Information

Application Number
JP2025002932U
Authority / Receiving Office
JP · JP
Patent Type
Utility models
Current Assignee / Owner
Filing Date
2025-08-27
Publication Date
2025-12-12
Estimated Expiration
2032-12-30

AI Technical Summary

Technical Problem

The instability of wafer alignment due to the notch width of 6-inch wafers causes tilting and shifting during transportation, affecting subsequent processing in semiconductor manufacturing.

Method used

A stand-up wafer cassette with arched concave surfaces and corresponding working surfaces that support wafers vertically, ensuring stable positioning and alignment, even with notches, and allowing for efficient transfer and storage without precise notch alignment.

Benefits of technology

The vertical support system stabilizes wafers, reduces space requirements, and enhances wafer handling efficiency, minimizing the risk of misalignment and breakage while maintaining performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide an upright wafer cassette that is not affected by notches and can stably support wafers. [Solution] The stand-up wafer cassette includes at least one base unit (10). The base unit includes a first wafer base (1) and a second wafer base (2). The first wafer base has a first arched concave surface (11) on the top, forming a first working surface (12) on one side facing the second wafer base. The first working surface corresponds to the area where the first arched concave surface is located, and the shape of the first working surface is the left side of a Y-shape divided vertically in half. The second wafer base has a second arched concave surface (21) on the top, forming a second working surface (22) on one side facing the first wafer base. The second working surface corresponds to the area where the second arched concave surface is located, and the shape of the second working surface is the right side of a Y-shape divided vertically in half. The first and second working surfaces work together to support the wafers and keep them upright. The design of the first and second arched concave surfaces, and the first and second working surfaces, ensures that the entire arch line is positioned after the wafers are placed in the cassette, providing greater stability.
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Description

[Technical Field]

[0001] The present invention relates to the field of semiconductor integrated circuit chip manufacturing, and more particularly to a stand-up wafer cassette. [Background technology]

[0002] Chemical mechanical planarization (CMP) is a process used in integrated circuit manufacturing. As technology advances, the requirements for this process increase. A chemical mechanical planarization (CMP) system typically includes a semiconductor device front-end module (EFEM), a cleaning unit, a polishing unit, and a transfer module. The EFEM primarily includes a wafer storage cartridge, a sheet-transport robot arm, and an air purification system. The cleaning unit primarily includes a variable number of ultrasonic cleaning elements, roll brushing cleaning elements, drying elements, and a device for transporting wafers between these elements. The polishing unit primarily includes a polishing table, a polishing head, a polishing liquid supply system, and a polishing pad repair system. The transfer module includes a series of robotic arms or moving platforms that transport wafers to be polished from the EFEM to the polishing unit and transfer polished wafers from the polishing unit to the cleaning unit.

[0003] The width of the notch (flat) of a 6-inch wafer reaches 57.5 mm, which makes the vertical alignment of the wafer unstable, causing the wafer to tilt or shift position, which affects subsequent transportation. Summary of the Invention

[0004] SUMMARY OF THE INVENTION In order to overcome the drawbacks of the prior art, the present invention provides a stand-up wafer cassette that is not affected by notches and can stably support wafers.

[0005] The technical solution adopted by the present invention to solve the technical problem is a stand-up wafer cassette. It includes at least one base unit. The base unit includes a first wafer base and a second wafer base. The top of the first wafer base is provided with a first arched concave surface, and a first working surface is formed on the side facing the second wafer base. The first working surface corresponds to the area where the first arched concave surface is located, and the shape of the first working surface is the left side structure of a Y-shape divided vertically in half. A second arched concave surface is provided on the top of the second wafer base, and a second working surface is formed on the side facing the first wafer base. The second working surface corresponds to the area where the second arched concave surface is located, and the shape of the second working surface is the right side structure of a Y-shape divided vertically in half. The first and second working surfaces cooperate to support the wafer so that it stands vertically.

[0006] In this invention, a first arched concave surface is provided on the top of a first wafer base, and a second arched concave surface is provided on the top of a second wafer base. The two arched concave surfaces can be continuous or discontinuous, and the corresponding first and second working surfaces can interface to form a stable support for the wafer, ensuring high precision in the wafer's fixed position and no misalignment, facilitating subsequent wafer transfer. Even if the wafer has a large notch, it will not wobble, eliminating the need to precisely position or control the notch's position. The wafers are vertically positioned, avoiding the significant space problems associated with horizontal storage, reducing the footprint of the base unit and improving space utilization. Vertical storage also makes it easier for a robot arm to remove wafers from a cleaning enclosure in which subsequent cleaning modules all place wafers vertically.

[0007] Furthermore, the first working surface forms line contact with the wafer, and the second working surface forms line contact with the wafer, supporting the wafer so that it stands upright.

[0008] Alternatively, the first working surface may form line contact with the wafer, and the second working surface may form surface contact with the wafer, supporting the wafer in a vertical position.

[0009] Alternatively, the first working surface makes surface contact with the wafer, and the second working surface makes surface contact with the wafer to support the wafer so that it stands upright.

[0010] The first and second working surfaces each form line contact with the wafer, resulting in a small contact area and minimal impact on wafer performance. The first working surface forms line contact with the wafer, while the second working surface forms surface contact with the backside of the wafer, leaving the performance of the front side of the wafer unaffected. The first and second working surfaces each form surface contact with the edge of the wafer, providing greater stability to the wafer's support structure.

[0011] Furthermore, the first working surface includes a first inclined surface and a first vertical surface, and the second working surface includes a second inclined surface and a second vertical surface. The first vertical surface and the second vertical surface are in face-to-face contact, and the first inclined surface and the second inclined surface are in line contact with the wafer, respectively. The first inclined surface and the second inclined surface are V-shaped, which is convenient for embedding the wafer, and both inclined surfaces form line contact with the wafer, resulting in a small contact area.

[0012] Furthermore, the first working surface includes a first inclined surface and a first vertical surface, and the second working surface includes a second inclined surface and a second vertical surface. The first vertical surface and the second vertical surface are in contact with each other while being offset vertically, and the first inclined surface is in line contact with the wafer, and the portion where the second vertical surface and the first vertical surface are offset is in surface contact with the wafer, or the second inclined surface is in line contact with the wafer, and the portion where the first vertical surface and the second vertical surface are offset is in surface contact with the wafer. The wafer is firmly supported, and the wafer will not shift even if the notch faces downward.

[0013] Furthermore, the first working surface includes a first inclined surface and a first vertical surface, and the second working surface includes a second inclined surface and a second vertical surface, the first vertical surface and the second vertical surface being in surface contact with the outer edges of both side surfaces of the wafer, respectively.

[0014] Furthermore, the bottom of the first vertical surface or the second vertical surface forms a support surface perpendicular thereto, and the bottom of the second vertical surface or the first vertical surface forms a step surface resting on the support surface, which can be translated along the support surface to adjust the distance between the first vertical surface and the second vertical surface, which distance is 0.5 mm-2 mm. The adjustable distance between the first vertical surface and the second vertical surface can easily accommodate different wafer models, providing high flexibility in use. During wafer processing, there is a thickness tolerance, and the distance can be adjusted to accommodate the above-mentioned processing errors.

[0015] Furthermore, when the surface contact width of the wafer with the first vertical surface and / or the second vertical surface is h and the radius of the wafer is R, h:R is 0.01-1. Setting the above values ​​not only prevents scratches on the wafer surface, but also saves space, makes the wafer arrangement more stable, and reduces the possibility of breakage.

[0016] Furthermore, the central angle of the first and / or second arcuate concave surfaces is 30 to 180°, which ensures that the entire arc line is positioned after the wafer is placed in the cassette, providing stable support for the wafer, making it more stable and suitable for 6-inch, 8-inch, and 12-inch wafers.

[0017] Furthermore, the present invention includes a plurality of base units, and the second wafer base and the first wafer base of an adjacent base unit are integrally formed. The plurality of base units can be arbitrarily combined, which makes the structure more compact and allows for more wafers to be placed, and has a wide range of applications.

[0018] Furthermore, the first wafer base and the second wafer base are integrally formed.

[0019] Furthermore, the first concave arcuate surface and / or the second concave arcuate surface may be provided continuously or discontinuously, and the structures of the first working surface and / or the second working surface may be the same or different.

[0020] The advantages of this invention are as follows: 1. By storing wafers vertically, vertical space is utilized rationally, avoiding the significant space problems associated with horizontal storage. Vertical storage also makes it easier for the robot arm to access the cleaning enclosure, where the subsequent cleaning modules store wafers vertically. 2. The design of the first and second arched concave surfaces and the first and second working surfaces ensures that the entire arch line is positioned after the wafer is placed in the cassette, providing greater stability. 3. Linear or planar support is provided for the wafer and cassette. Notched wafers are well-fixed even when the notches contact the cassette. The notches do not need to face upward, eliminating the need for precise positioning and control of the notches. 4. Support for two or more wafers can be achieved, minimizing the space required. In the case of multiple wafers, each wafer can be designed with two working surfaces on each side, resulting in a more compact structure. 5. The wafers are stored stably, and even if some of the wafer arcs come into contact with the first and second working surfaces, they will not be displaced. 6. The performance of the wafers is not affected. [Brief explanation of the drawings]

[0021] [Figure 1] 1 is a front view of a base unit according to a first embodiment of the present invention. [Figure 2] 1 is a perspective view of a base unit according to a first embodiment of the present invention; [Figure 3] 1 is a side view of a plurality of base units according to a first embodiment of the present invention; [Figure 4] 4 is a half cross-sectional view taken along the line AA in FIG. 3. [Figure 5] FIG. 5 is an enlarged view of the structure of B in FIG. [Figure 6] 1 is a perspective view of a plurality of base units according to a first embodiment of the present invention; [Figure 7] FIG. 10 is a perspective view of a base unit according to a second embodiment of the present invention. [Figure 8] FIG. 10 is a side view of a base unit according to a second embodiment of the present invention. [Figure 9] 9 is a cross-sectional view taken along CC in FIG. 8. [Figure 10] FIG. 10 is an enlarged view of the structure of D in FIG. 9. [Figure 11] FIG. 10 is a front view of a third embodiment of the present invention. [Figure 12] FIG. 10 is a perspective view of a third embodiment of the present invention. [Figure 13] FIG. 10 is a side cross-sectional view of a third embodiment of the present invention. [Figure 14] FIG. 14 is an enlarged view of the structure of FIG. 13E. DETAILED DESCRIPTION OF THE INVENTION

[0022] In order to allow those skilled in the art to better understand the aspects of the present invention, the following clearly and completely describes the technical aspects of the embodiments of the present invention in conjunction with the drawings of the embodiments of the present invention. It is clear that the described embodiments are only a part, not all, of the embodiments of the present invention. All other embodiments that those skilled in the art can obtain based on the embodiments of the present invention without any creative work fall within the scope of protection of the present invention.

[0023] Embodiment 1 As shown in FIGS. 1 to 5, the stand-up wafer cassette includes at least one base unit 10 including a first wafer base 1 and a second wafer base 2.

[0024] A first arched concave surface 11 is provided on the top of the first wafer base 1, and a first working surface 12 is formed on the side of the first wafer base 1 facing the second wafer base 2, corresponding to the area where the first arched concave surface 11 is located. The shape of the first working surface 12 is the left side of a Y-shape cut vertically in half. The central angle of the first arched concave surface 11 is 90 to 180 degrees.

[0025] A second arched concave surface 21 is provided on the top of the second wafer base 2, and a second working surface 22 is formed on the side of the second wafer base 2 facing the first wafer base 1, corresponding to the area where the second arched concave surface 21 is located. The shape of the second working surface 22 is a right-hand side structure formed by vertically halving a Y-shape. The central angle of the second arched concave surface 21 is 30 to 180°, and preferably 90 to 180°.

[0026] The first working surface 12 and the second working surface 22 cooperate to support the wafer 3 so that it stands up vertically.

[0027] In this embodiment, there is a notch 31 on the outer edge of the wafer 3, and this notch 31 is formed by cutting the edge of the wafer 3 horizontally, i.e., it has a flat surface, and the flat width of the notch 31 reaches 55 mm to 60 mm.

[0028] In this embodiment, the cross sections of the first wafer base 1 and the second wafer base 2 are both trapezoidal structures with a larger top and a smaller bottom, but it goes without saying that in other embodiments they may have other structures such as a square.

[0029] As shown in FIG. 4, the first working surface 12 is in line contact with the wafer 3, and the second working surface 22 is in surface contact with the wafer 3, supporting the wafer 3 so that it stands upright.

[0030] More specifically, as shown in FIG. 5 , the first working surface 12 has a first inclined surface 121 and a first vertical surface 122, and the second working surface 22 has a second inclined surface 221 and a second vertical surface 222. The first vertical surface 122 and the second vertical surface 222 are in contact with each other with a vertical offset, i.e., the top ends of the first vertical surface 122 and the second vertical surface 222 are not aligned. In this case, the first inclined surface 121 makes line contact with the wafer 3, more precisely, the contact with the ridge between the front and side surfaces of the wafer 3. The offset portion of the second vertical surface 222 and the first vertical surface 122 makes surface contact with the wafer 3; that is, a portion of the second vertical surface 222 is directly attached to the first vertical surface 122, and a portion of the second vertical surface 222 is higher than the first vertical surface 122. This portion is attached to the rear edge of the wafer 3 to achieve surface contact, i.e., the portion indicated by L in FIG. 5 . In this case, the front surface of the wafer 3 does not come into contact with the base unit 10 at all, ensuring maximum performance.

[0031] The first vertical surface 122 and the second vertical surface 222 may be vertical flat surfaces or vertical wave surfaces, and do not necessarily have to be flat surfaces as long as they are supported so as to be in contact with the wafer 3.

[0032] If the width of the portion where the back surface of wafer 3 is bonded to and in surface contact with second vertical surface 222 is defined as h and the radius of wafer 3 is defined as R, h:R is 0.01-1, preferably 0.01-0.06. Also, h:L is greater than 0 and less than or equal to 1. Setting the above values ​​not only prevents damage to the wafer surface, but also saves space, makes wafer placement more stable, and reduces the possibility of breakage.

[0033] As shown in Figure 6, the number of base units 10 may be multiple, and the second wafer base 2 and the first wafer base 1 of adjacent base units 10 may be integrally formed; in other words, the first working surface 12 and the second working surface 22 may be formed on both sides of the first wafer base 1 and the second wafer base 2, respectively.

[0034] In the above configuration, the first wafer base 1 and the second wafer base 2 are separate bodies, but of course in other embodiments, the first wafer base 1 and the second wafer base 2 may be integrated so as to form the first arched concave surface 11, the second arched concave surface 21, the second working surface 22, and the first inclined surface 121 directly on the top surface of the base unit 10.

[0035] In this embodiment, the first arched concave surface 11 and the second arched concave surface 21 are continuous surfaces, but of course in other embodiments they may be discontinuous surfaces, in which case there are multiple first arched concave surfaces 11 and multiple second arched concave surfaces 21, i.e., multiple first working surfaces 12 and multiple second working surfaces 22.

[0036] Embodiment 2 This embodiment differs from embodiment 1 in that, as shown in Figures 7 to 10, the first working surface 12 makes line contact with the wafer 3 and the second working surface 22 makes line contact with the wafer 3, thereby supporting the wafer 3 in an upright position.

[0037] More specifically, as shown in FIG. 10 , the first working surface 12 includes a first inclined surface 121 and a first vertical surface 122, and the second working surface 22 includes a second inclined surface 221 and a second vertical surface 222. The first vertical surface 122 and the second vertical surface 222 are in complete face-to-face contact. That is, the top ends of the first vertical surface 122 and the second vertical surface 222 are aligned, and the first working surface 12 and the second working surface 22 are aligned in a Y-shape. At this time, the first inclined surface 121 is in line contact with the wafer 3, specifically, the ridge between the front and side surfaces of the wafer 3, and the second inclined surface 221 is in line contact with the wafer 3, specifically, the ridge between the back and side surfaces of the wafer 3. In this case, neither the front nor the back surface of the wafer 3 comes into contact with the base unit 10, and its performance is maximized.

[0038] The first inclined surface 121 and the second inclined surface 221 have a V-shape with the opening facing upward, and are flared to facilitate placement of the wafer 3. The inclination angles of the first inclined surface 121 and the second inclined surface 221 can each be approximately 30°.

[0039] Embodiment 3 As shown in Figures 11 to 14, this embodiment differs from embodiment 1 in that the first working surface 12 is in surface contact with the wafer 3 and the second working surface 22 is in surface contact with the wafer 3 to support the wafer 3 in an upright position.

[0040] 14, the first working surface 12 includes a first inclined surface 121 and a first vertical surface 122, and the second working surface 22 includes a second inclined surface 221 and a second vertical surface 222. The first vertical surface 122 and the second vertical surface 222 face each other but are not in contact with each other. In this case, the first working surface 12 and the second working surface 22 may face each other completely or may face each other with a slight offset. In other words, the first working surface 12 and the second working surface 22 are configured in a Y-shape with a gap therebetween.

[0041] The first vertical surface 122 and the second vertical surface 222 respectively contact the outer edges of the front and back surfaces of the wafer 3. If the width of the surface contact portion of the wafer 3 bonded to the first vertical surface 122 and the second vertical surface 222 is defined as h and the radius of the wafer 3 is defined as R, then h:R is 0.01-1, and h<3 mm in FIG.

[0042] The distance between the first vertical surface 122 and the second vertical surface 222 can be adjusted to accommodate wafers of different thicknesses or to accommodate wafer processing errors. A support surface 223 perpendicular to the first vertical surface 122 or the second vertical surface 222 is formed at the bottom of the first vertical surface 122 or the second vertical surface 222. In this embodiment, the support surface 223 is formed at the bottom of the second vertical surface 222. The support surface 223 extends in the direction of the first vertical surface 122, and a step surface 123 is formed at the bottom of the second vertical surface 222. The step surface 123 can be suspended on the support surface 223 and moved parallel to the support surface 223 to adjust the distance between the first vertical surface 122 and the second vertical surface 222. That is, the distance S in FIG. 14 is adjustable and is 0.5-2 mm, preferably 0.6-1.6 mm.

[0043] A screw hole 13 is drilled in the first wafer base 1, and after the gap adjustment is completed, a set screw is inserted into the screw hole 13 to firmly support the second wafer base 2 and fix the gap between the first wafer base 1 and the second wafer base 2.

[0044] Embodiment 4 In the first to third embodiments, the first working surface 12 and the second working surface 22 of a single wafer cassette all have the same structure. The difference between this embodiment and the previous embodiments is that the three types of structures can be combined, i.e., there can be multiple first arched concave surfaces 11 and multiple second arched concave surfaces 21. In this case, all three types of structures can be applied to the same wafer cassette, and adjacent first arched concave surfaces 11 and adjacent second arched concave surfaces 21 can have first working surfaces 12 and second working surfaces 22 with different structures. Of course, the curvatures of the first arched concave surfaces 11 and the second arched concave surfaces 21 can be the same or different.

[0045] The above-described embodiments are intended to illustrate rather than limit the present invention, and any modifications and variations made thereto are intended to fall within the spirit and scope of the present invention and the appended claims.

Claims

1. A stand-up wafer cassette, At least one base unit (10) including a first wafer base (1) and a second wafer base (2); The top of the first wafer base (1) is provided with a first arched concave surface (11), and a first working surface (12) is formed on the side facing the second wafer base (2), the first working surface (12) corresponds to the area where the first arched concave surface (11) is located, and the shape of the first working surface (12) is the left side structure of a Y-shape divided vertically in half; a second arched concave surface (21) is provided on the top of the second wafer base (2), and a second working surface (22) is formed on the side facing the first wafer base (1), the second working surface (22) corresponds to the area where the second arched concave surface (21) is located, and the shape of the second working surface (22) is a right-hand structure obtained by vertically dividing a Y-shape into half; The stand-up wafer cassette is characterized in that the first working surface (12) and the second working surface (22) cooperate to support the wafer (3) so that it stands upright.

2. The first working surface (12) is in line contact with the wafer (3), and the second working surface (22) is in line contact with the wafer (3) to support the wafer (3) so that it stands upright; Alternatively, the first working surface (12) is in line contact with the wafer (3), and the second working surface (22) is in surface contact with the wafer (3) to support the wafer (3) so that it stands upright, Alternatively, the first working surface (12) is in surface contact with the wafer (3), and the second working surface (22) is in surface contact with the wafer (3) to support the wafer (3) so that it stands upright.

3. The first working surface (12) has a first inclined surface (121) and a first vertical surface (122), and the second working surface (22) has a second inclined surface (221) and a second vertical surface (222); 2. The stand-up wafer cassette according to claim 1, wherein the first vertical surface (122) and the second vertical surface (222) are in face-to-face contact, and the first inclined surface (121) and the second inclined surface (221) are in line contact with the wafer (3).

4. The first working surface (12) includes a first inclined surface (121) and a first vertical surface (122), and the second working surface (22) includes a second inclined surface (221) and a second vertical surface (222). The first vertical surface (122) and the second vertical surface (222) are in contact with each other while being offset vertically, the first inclined surface (121) is in line contact with the wafer (3), and the offset portion of the second vertical surface (222) and the first vertical surface (122) is in surface contact with the wafer (3); Alternatively, the second inclined surface (221) is in line contact with the wafer (3), and the offset portion of the first vertical surface (122) and the second vertical surface (222) is in surface contact with the wafer (3).

5. The first working surface (12) includes a first inclined surface (121) and a first vertical surface (122), and the second working surface (22) includes a second inclined surface (221) and a second vertical surface (222).

2. The stand-up wafer cassette according to claim 1, wherein the first vertical surface (122) and the second vertical surface (222) are in contact with the outer edge surfaces of both sides of the wafer (3), respectively.

6. 6. The stand-up wafer cassette according to claim 5, wherein a bottom of the first vertical surface (122) or the second vertical surface (222) forms a support surface (223) perpendicular thereto, and a bottom of the second vertical surface (222) or the first vertical surface (122) forms a step surface (123), the step surface (123) is placed on the support surface (223) and can translate along the support surface (223) to adjust the distance between the first vertical surface (122) and the second vertical surface (222), the distance being 0.5 to 2 mm.

7. 6. The stand-up wafer cassette according to claim 4, wherein, when a surface contact width between the wafer (3) and the first vertical surface (122) and / or the second vertical surface (222) is h and a radius of the wafer (3) is R, h:R is 0.01-1.

8. 2. The stand-up wafer cassette according to claim 1, wherein the central angle of the first concave arcuate surface (11) and / or the second concave arcuate surface (21) is 30 to 180 degrees.

9. 2. The stand-up wafer cassette according to claim 1, comprising a plurality of base units (10), wherein the second wafer base (2) and the first wafer base (1) of adjacent base units (10) are integrally arranged.

10. 2. The stand-up wafer cassette according to claim 1, wherein the first wafer base (1) and the second wafer base (2) are integrally formed.

11. 2. The stand-up wafer cassette according to claim 1, wherein the first arched concave surface (11) and / or the second arched concave surface (21) are provided continuously or intermittently, and the structures of the first working surface (12) and / or the second working surface (22) thereof are the same or different.