Storage Systems

Abstract

To update to new hardware and new software non-stop by suppressing the influence of redundancy and performance degradation.SOLUTION: Each controller of a plurality of storage controllers is an old storage controller before replacement or a new storage controller after replacement. The new storage controller can execute a first program and a second program. The old storage controller can execute at least the second program. When all of the plurality of storage controllers are the new storage controller, the new storage controller processes data input and output to and from a storage drive using the first program. When at least one of the storage controllers is the old storage controller, each storage controller processes the data input and output to and from the storage drive using the second program.SELECTED DRAWING: Figure 11

Description

[Technical field]

[0001] The present invention relates to replacement of a storage controller in a storage system. [Background technology]

[0002] In recent years, the increasing capacity of NAND flash memory has led to storage systems storing large amounts of data. In addition, storage systems are required to be able to replace their hardware and software with the latest ones without affecting the business of upper-level applications. Normally, replacing a storage system requires time for the configuration of the new storage system and the data migration process.

[0003] US Patent No. 9,959,043 shows an invention for updating software in a storage system without interruption. After a software update, both the new and old data formats exist, and the new data contains references to data in the old format. When data is updated, it can be written in the new data format, allowing it to be updated to the new data format without stopping data reading and writing.

[0004] US Patent No. 9,098,211 describes an invention for performing non-disruptive data migration between multiple storage systems. To allow the host to recognize a single storage system, a virtual storage system, virtual port, and virtual logical unit (LUN) are configured across multiple storages. By associating the port name and port address of the migration source physical port with the virtual port name and port address of the migration destination system, migration to the new storage system can be completed without interruption.

[0005] In a dual-controller storage system, there is a method for updating the storage system hardware without stopping it. This method allows you to update to a new controller without moving data from the connected drives. In addition, the configuration information of the storage system is maintained. The new hardware is replaced by replacing the storage controllers one by one in turn. This is a common method for replacing controllers in a storage system. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] U.S. Patent No. 9,959,043 [Patent Document 2] U.S. Patent No. 9,098,211 Summary of the Invention [Problem to be solved by the invention]

[0007] In the specification of U.S. Patent No. 9,959,043, when the data format of each data in a logical volume is updated, the new data format is referenced from the new data format to the old data, thereby supporting the new data format in the new software while maintaining the old data format.

[0008] However, when upgrading a storage controller in a storage system, there exists control logic that must be applied after the storage controller upgrade is completed due to differences in the hardware components of the hardware storage controller and the specifications of the storage system. For example, a new storage controller may be equipped with a powerful CPU or hardware offload engine, which may enable the adoption of data encryption or data compression algorithms that require higher computational costs. The specification of U.S. Patent No. 9,959,043 does not disclose a method for determining the start of application of these control logics.

[0009] When updating the hardware and software of a storage system without interruption, a technique is desired that provides redundancy and reduces the effects of performance degradation. [Means for solving the problem]

[0010] A storage system of one embodiment of the present invention includes a plurality of storage controllers each including a processor and memory and processing data input / output to / from a storage drive, wherein each of the plurality of storage controllers is an old storage controller before replacement or a new storage controller after replacement, wherein the new storage controller is capable of executing a first program and a second program, and wherein the old storage controller is capable of executing at least the second program, and when all of the plurality of storage controllers are the new storage controllers, the new storage controller processes data input / output to / from the storage drive using the first program, and when the plurality of storage controllers includes at least one of the old storage controllers, each storage controller of the plurality of storage controllers processes data input / output to / from the storage drive using the second program. Effect of the Invention

[0011] According to one aspect of the present invention, in a multi-controller storage system, it is possible to update to new hardware and new software without interruption, while maintaining redundancy and minimizing the effects of performance degradation. [Brief description of the drawings]

[0012] [Figure 1] 1 is a block diagram showing a configuration of a storage system according to an embodiment. [Figure 2A] FIG. 11 is an explanatory diagram showing an overview of a procedure for upgrading a storage controller when the number of storage controllers is less than the maximum number of a storage system in an embodiment. [Figure 2B] FIG. 11 is an explanatory diagram showing an overview of a procedure for upgrading a storage controller when the number of storage controllers is less than the maximum number of a storage system in an embodiment. [Figure 2C] FIG. 11 is an explanatory diagram showing an overview of a procedure for upgrading a storage controller when the number of storage controllers is less than the maximum number of a storage system in an embodiment. [Figure 2D] FIG. 11 is an explanatory diagram showing an overview of a procedure for upgrading a storage controller when the number of storage controllers is less than the maximum number of a storage system in an embodiment. [Figure 2E] FIG. 11 is an explanatory diagram showing an overview of a procedure for upgrading a storage controller when the number of storage controllers is less than the maximum number of a storage system in an embodiment. [Diagram 3] FIG. 2 is an explanatory diagram illustrating the configuration of a memory included in a storage controller in the embodiment. [Figure 4] FIG. 2 is an explanatory diagram showing the configuration of a program area in a memory of a storage controller in an embodiment. [Diagram 5] FIG. 2 is an explanatory diagram illustrating the configuration of a shared memory in a memory of a storage controller in an embodiment. [Figure 6] 11 is an explanatory diagram showing the configuration of hardware configuration information held in the memory of a storage controller in the embodiment. [Figure 7] FIG. 2 is an explanatory diagram illustrating an example of the configuration of a drive in an embodiment. [Figure 8] FIG. 11 is an explanatory diagram illustrating an example of the configuration of a logical-physical management table in the embodiment. [Figure 9] 11 is an explanatory diagram showing software compatibility management information held in the memory of a storage controller in the embodiment. [Figure 10] 11 is a flowchart illustrating an overall controller update process executed by a storage controller in an embodiment. [Figure 11]13 shows a flowchart of an example of a host read process in the embodiment. [Figure 12] 11 is a flowchart showing a control logic including a control logic switching determination process executed by a storage controller in an embodiment. [Figure 13] 1 shows a flowchart of an example of data compression processing in an embodiment. [Figure 14] 11 is a flowchart showing a control logic including a compatibility determination process in an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the accompanying drawings, functionally identical elements may be indicated by the same numerals. The accompanying drawings show specific embodiments and examples according to the principles of the present invention. These embodiments and examples are for understanding the present invention and should not be used to interpret the present invention in a limiting manner.

[0014] Furthermore, embodiments of the present invention may be implemented in software running on a general-purpose computer, in dedicated hardware, or in a combination of software and hardware, as described below.

[0015] In the following, each process in the embodiment of the present invention may be described with a "program" as the subject (acting entity). Since a program is executed by a processor to perform a defined process using a memory and a communication port (communication control device), the processor may be used as the subject in the description. A part or all of the program may be realized by dedicated hardware, or may be modularized. Various programs may be installed in each computer by a program distribution server or storage media.

[0016] In the following description, an interface may include at least one of a user interface and a communication interface. The user interface may include at least one of one or more I / O devices, such as input devices (e.g., keyboards and pointing devices) and output devices (e.g., display devices), and a display computer.

[0017] The communication interface may include one or more communication interface devices, which may be one or more homogeneous communication interface devices (e.g., one or more NICs (Network Interface Cards)) or two or more heterogeneous communication interface devices (e.g., a NIC and an HBA (Host Bus Adapter)).

[0018] In the following description, a memory includes one or more memory devices. The memory may be a volatile memory or a non-volatile memory. The memory is primarily used during processing by the processor.

[0019] In the following description, a processor includes one or more processor devices, which are typically central processing units (CPUs).

[0020] In the following description, an "accelerator" includes one or more hardware integrated circuits, and the at least one hardware integrated circuit is typically a field programmable gate array (FPGA).

[0021] In the following description, information may be described using expressions such as "xxx table", but the information may be expressed in any data structure. In other words, to show that the information does not depend on the data structure, the "xxx table" may be referred to as "xxx information". In the following description, the configuration of each table is an example, and one table may be divided into two or more tables, or two or more tables may all or partly be one table.

[0022] In the following description, when elements of the same type are not differentiated from one another, common reference symbols are used, and when elements of the same type are differentiated from one another, reference symbols or element IDs (e.g., identification numbers) may be used. For example, when multiple storage controllers are not differentiated from one another, they are described as "storage controller 102," and when each storage controller is differentiated from the other, they are described as "storage controller 102A," "storage controller 102B," and so on.

[0023] The same is true for other elements (such as a storage node 101, a front-end network port 103, a CPU (Central Processing Unit) 104, a memory 105, a back-end network port 106, an interconnect network port 107, a drive box 109, a host computer 120, etc., which will be described later).

[0024] In the following description, the storage system may include one or more storage devices. At least one storage device may be a general-purpose physical computer. At least one storage device may be a virtual storage device, or may execute SDx (Software-Defined anything). As SDx, for example, SDS (Software Defined Storage) (an example of a virtual storage device) or SDDC (Software-defined Datacenter) may be adopted.

[0025] There are several issues when updating the hardware and software of a storage system without interruption. The first issue is that control logic that cannot operate with an old storage controller needs to be operated with a new storage controller when the old storage controller is not present in the storage system. Specifically, no matter how many storage controllers are present in the storage system, the control logic needs to be switched after all storage controllers have been upgraded to the new storage controller. Here, the control logic is hardware or a combination of hardware and software that performs processing according to a specific algorithm for controlling the storage system.

[0026] The second challenge is that even if the control logic within the storage system is functionally compatible between an old storage controller and a new storage controller, performance may change depending on the hardware version, which may result in a decrease in processing performance.

[0027] For example, the logic of the algorithm for compressing and decompressing data built into a new storage controller can be used to compress and decompress data quickly by using an accelerator circuit built into the new storage controller. However, since an older storage controller does not have this accelerator circuit, it is possible that the CPU processing load will be high when reading data, resulting in reduced performance.

[0028] Here is a specific example where this characteristic can be a problem: If a failure occurs in the new storage controller while switching control logic to remove the old storage controller after adding a new storage controller, it is necessary to restore the system to the state before the update.

[0029] In this case, if the new controller uses an accelerator to read data that was compressed before the failure occurred, the old storage controller, which does not have an accelerator, must decompress the data using software to read it, resulting in a significant drop in data read throughput from the host computer.

[0030] Also, if at least one new storage controller remains in the storage system, a decrease in read performance from the host computer can be prevented by converting the old storage controller to a format that allows high-speed reading before removing the new storage controller. However, in this case, the storage system cannot be restored to the state before the update until the conversion is complete, and there is a problem that recovery from a failure takes time.

[0031] In one embodiment of the present disclosure, in a multi-controller storage system configuration after a new storage controller is added, the new storage software running in the new storage controller and the old software running in the old storage controller transparently access common control information via an inter-storage controller network, and in processes performed by communicating between the storage controllers, the software on the new storage controller operates to be compatible with the software on the old storage controller.

[0032] In this way, each process performed in the storage system can be performed on either the old storage controller or the new storage controller, and each process can be switched to be performed on the new storage controller without stopping I / O.

[0033] It also allows for flexible and rapid response to cases where maintenance is performed during an upgrade or when the upgrade is interrupted and the original state is restored. At the same time, configuration information such as LUN (Logical Unit Number) that was set before the update, status of replication, and access frequency information used for storage media tiering can be carried over to the processing performed by the new controller.

[0034] In one embodiment of the present disclosure, an old storage controller of a storage system is replaced with a new storage controller, the new storage controller being capable of executing a first program and a second program, and the old storage controller being capable of executing at least the second program.

[0035] Before replacement of all storage controllers in the storage system is complete, the new storage controller and the old storage controller process data input / output to / from the storage drives using the second program, and after replacement is complete, the new storage controller processes data input / output to / from the storage drives using the first program instead of the second program, thereby making it possible to suppress degradation of the processing performance of the storage system.

[0036] Fig. 1 is a block diagram showing the configuration of a storage system according to an embodiment of this specification. A storage system 100 according to this embodiment includes multiple storage controllers 102 and 112, one or more interconnect switches 108, and one or more drive boxes 109. Fig. 1 shows storage controllers 102A to 102D and 112A and 112B as examples of the multiple storage controllers 102 and 112.

[0037] Of these, storage controllers 102A to 102D are old storage controllers that will be removed in the future. The storage controllers 102A and 102B are included in one storage node 101A, and the storage controllers 102C and 102D are included in another storage node 101B. On the other hand, the storage controllers 112A and 112B are new storage controllers that have been added and are included in one storage node 111A.

[0038] The old storage controller 102 to be removed has a CPU 104, memory 105, a front-end network port (hereinafter also referred to as an FE port) 103, a back-end network port (hereinafter also referred to as a BE port) 106, and an interconnect network port (hereinafter also referred to as an IC port) 107. Similarly, the new storage controller 112 to be added has a CPU 104, memory 105, FE port 103, BE port 106, and IC port 107.

[0039] 1, one storage controller 102 has one CPU 104, one memory 105, two FE ports 103, one BE port 106, and one IC port 107, but these numbers are just an example and the actual numbers are arbitrary. Similarly, the actual number of each component in the storage controller to be expanded is arbitrary. In addition to these components, a hardware offload engine such as an FPGA may be installed.

[0040] The FE port 103 is connected to a network switch 121. The network switch 121 is connected to one or more host computers 120 (host computers 120A and 120B in the example of FIG. 1). The storage controller 102 receives commands such as commands to write and read user data from the host computer 120 via the FE port 103 and the network switch 121, and returns responses to these commands. The same is true for the storage controller 112.

[0041] The BE port 106 is connected to a drive box 109. The storage controller 102 writes and reads user data to and from the drive box 109 via the BE port 106. The storage controller 112 operates in a similar manner.

[0042] The drive box 109 includes one or more storage drives (also simply referred to as drives) 110 that store data written by the host computer 120. Each drive 110 includes a storage medium. This storage medium may be a large-capacity non-volatile storage medium, such as a magnetic disk or a flash memory. Typical examples of the drive 110 include a hard disk drive and an SSD (Solid State Drive).

[0043] The IC port 107 is connected to an interconnect switch 108. The interconnect switch 108 is connected to the IC port 107 of each of the storage controllers 102 and 112. The storage controller 102 can communicate with other storage controllers 102 in the storage system 100 via the IC port 107 and the interconnect switch 108, and can send and receive, for example, control information. The same applies to communication between the storage controllers 102 and 112, and between the storage controllers 112.

[0044] The CPU 104 is a computing device that executes programs stored in the memory 105 to realize various functions of the storage controllers 102 and 112. The functions realized by the CPU 104 will be described in detail later.

[0045] The memory 105 includes an area for storing programs executed by the CPU 104, an area for storing control information for the storage controllers 102 and 112, and an area for storing data to be written or read by the host computer 120. Details of these areas will be described later.

[0046] The accelerator circuit 113 is a dedicated circuit for offloading various functions on the storage controllers 102 and 112 from the CPU 104. The accelerator circuit 113 is implemented as a dedicated circuit such as an FPGA or an ASIC. Examples of the processes to be offloaded are data compression and decompression processes, encryption processes, data hash calculation processes, etc. By using the accelerator circuit to perform processes such as compression and decompression of host data, it is possible to achieve a high compression ratio and reduce the load on the CPU 104.

[0047] Furthermore, each of the storage controllers 102 and 112 is connected to a management device 122 via a management network 123. Note that in Fig. 1, for ease of explanation, the same reference numerals are used for hardware elements of the storage controllers 102 and 112 with the same names. However, between the storage controllers 102 and 112, hardware elements with the same names and reference numerals may have different configurations. For example, the accelerator circuits 113 of the storage controllers 102, 112 may execute different processes.

[0048] Next, a procedure for upgrading the storage controller 102 will be described with reference to Figures 2A to 2E. Figures 2A to 2E are explanatory diagrams showing an overview of a procedure for upgrading the storage controller when the number of storage controllers is less than the maximum number of the storage system.

[0049] 2A shows the storage system 100 before the start of the upgrade of the storage controller 102. At this time, the storage system 100 has old storage controllers 102A to 102D, and does not have new storage controllers 112A and 112B. At this time, redundancy is ensured by the four storage controllers 102A to 102D.

[0050] 2B shows storage system 100 after new storage node 111A has been added when storage node 101B is being upgraded. New storage node 111A includes new storage controllers 112A and 112B. At this time, storage system 100 has the added new storage controllers 112A and 112B in addition to old storage controllers 102A-102D. At this time, redundancy is ensured by the six storage controllers 102A-102D and 112A-112B.

[0051] 2C shows the storage system 100 after the upgrade of the storage node 101B is completed. At this time, the old storage node 101B, i.e., the old storage controllers 102C and 102D, have already been removed, and the storage system 100 has the old storage controllers 102A and 102B and the new storage controllers 112A and 112B. At this time, redundancy is ensured by the four storage controllers 102A, 102B, 112A, and 112B.

[0052] 2D shows storage system 100 after new storage node 111B has been added when storage node 101A is being upgraded. New storage node 111B includes new storage controllers 112C and 112D. At this time, storage system 100 has F, old storage controllers 102A and 102B, as well as the newly added storage controllers 112A-112D. At this time, redundancy is ensured by the six storage controllers 102A, 102B, and 112A-112D.

[0053] 2E shows the storage system 100 after the upgrade of the storage node 101A is completed. At this time, the old storage node 101A, that is, the old storage controllers 102A and 102B, have already been removed, and the storage system 100 has new storage controllers 112A-112D. At this time, redundancy is ensured by the four storage controllers 112A-112D.

[0054] If a problem occurs during the update, you can restore the initial state by performing the upgrade procedure in reverse order.

[0055] FIG. 3 is an explanatory diagram showing an example of the configuration of the memory 105 in the storage controllers 102 and 112 in the embodiment.

[0056] The memory 105 includes, as storage areas, a program area 401, a local memory area 402, a cache memory area 403, and a shared memory area 404. The program area 401 stores a control program executed by the CPU 104 in the storage controllers 102, 112. The local memory area 402 includes a memory area that is temporarily used when the control program is executed, and an area for storing a copy of control information included in the shared memory area 404.

[0057] The cache memory area 403 is an area in which data written from the host computer 120 (also called host data or user data) and data read by the host computer 120 are temporarily stored. The shared memory area 404 includes information about the storage system 100 used by the control program. The shared memory area 404 is unique information shared by all storage controllers 102 and 112, and may be stored across multiple storage controllers 102 and 112. The shared memory area 404 may also be made redundant between multiple storage controllers to provide fault tolerance for the storage controllers 102, 112 and memory 105.

[0058] FIG. 4 is an explanatory diagram showing an example of the configuration of the program area 401 in the memory 105 of the storage controllers 102 and 112 in the embodiment.

[0059] The program area 401 stores a non-stop controller update sequence control unit 501, a processing takeover control unit 502, a controller addition unit 503, a controller removal unit 504, a control logic switching unit 505, an IO program 506, and a compression / decompression processing program 507. All of these are programs stored in the memory 105 and executed by the CPU 104.

[0060] In the following description, the processes executed by each of the above-mentioned units are actually executed by the CPU 104 according to a program. The program may include, in addition to the above, an operating system, for example. In this embodiment, a plurality of storage controllers are mounted in the storage system, and the hardware of each controller and the programs operating on each controller may be of different generations for each controller. In order to determine whether programs of different generations can work together, each program is given version information whose value is incremented as it is updated.

[0061] For example, the version information of a compression processing program released on August 1, 2021 would be given in the format of 10.1.0, and the version information of a new compression processing program released on August 1, 2022 would be given in the format of 11.0.0, etc.

[0062] The non-stop controller update sequence control unit 501 controls the sequence of replacing the storage controller 102 of this embodiment. The process takeover control unit 502 performs a process of taking over the process control right for each LUN, the LUN registration of the FE port, and the data stored in the shared memory from the storage controller 102 to be replaced to the storage controller 112 to be replaced. The controller addition unit 503 performs a process when adding a new storage controller 112. The controller removal unit 504 performs a process when removing an old storage controller 102.

[0063] The control logic switching unit 505 performs processing to switch the control logic to logic dedicated to the new storage controller 112 after the upgrade of the old storage controller 102 is completed and all storage controllers in the storage system become the new storage controller 112. The IO program 506 is a program that responds to an IO request issued by the host computer 120.

[0064] The compression / decompression processing program 507 is a program that performs compression / decompression processing on data written from the host in order to reduce the amount of data. Some programs perform compression / decompression processing entirely by software using the CPU, while other programs perform compression / decompression processing using an accelerator circuit mounted on the storage controller.

[0065] 5 is an explanatory diagram showing the configuration of the shared memory area 404 in the memory 105 of the storage controllers 102, 112 in this embodiment. The shared memory area 404 stores hardware configuration information 601, installed controller management information 602, LUN configuration information 603, FE port configuration information 604, takeover management information 605, installed software management information 606, and software compatibility management information 607.

[0066] Details of the hardware configuration information 601 will be explained using Fig. 6. Implemented controller management information 602 holds information on the maximum number of controllers that can be implemented in the storage system 100. LUN configuration information 603 is information indicating the configuration of each logical unit, and one piece of LUN configuration information 603 is held for one logical unit.

[0067] The LUN configuration information 603 includes an LUNID, a registered FE port ID list, and a control CPU ID. The LUNID is identification information for each logical unit. The FE port ID list is a list of identification information for FE ports to which paths to each logical unit are set. The control CPU ID is identification information for the CPU 104 that has exclusive access to control information related to I / O processing for each logical unit. The control CPU ID is a unique ID within the storage system, and makes it possible to identify which storage controller in the storage system has the CPU that has control of the LUN.

[0068] Each logical unit is associated with FE ports belonging to multiple different storage controllers for the purpose of load balancing and failover in the event of a failure. FE port configuration information 604 is information indicating the configuration of each FE port 103. It manages which LUNID is assigned to each FE port. Each storage controller 102 holds FE port configuration information 604 regarding all FE ports possessed by the storage controller 102. The FE port configuration information 604 includes an FE port ID, an FE port address, and a list of LUNIDs assigned to each FE port.

[0069] The takeover management information 605 is information indicating the target to be taken over from the old storage controller 102 to be replaced to the new storage controller to be replaced. This information is temporarily generated during the upgrade process of the storage controller. The takeover management information 605 includes the controller ID to be removed, LUN control right information, FE port LUN registration information, shared memory storage information, LUN control right transfer destination information, transfer destination LUN registration information for each FE port, and shared memory transfer destination information. The installed software management information 606 is information for managing version information of the software installed in each storage controller in the storage system. This will be described in detail later with reference to FIG. 9.

[0070] The software compatibility management information 607 is information that indicates compatibility between versions of each program installed in the storage controller and between controller versions. The software compatibility management information 607 will be described in detail later with reference to FIG.

[0071] It should be noted that some of the software described with reference to Figures 4 and 5 may be omitted from one or both of the storage controllers 102, 112, and other programs or information may be implemented in one or both of the storage controllers 102, 112.

[0072] 6 is an explanatory diagram showing the configuration of hardware configuration information 601 held in the memory 105 of the storage controllers 102, 112 in the embodiment. The hardware configuration information 601 includes a controller ID 701, controller version information 702, program version information 703, an implemented FE port ID 703, an implemented BE port ID 704, an implemented CPU ID 705, an implemented interconnect port ID 706, an implemented memory ID 707, implemented accelerator information 708, and controller upgrade status management information 709.

[0073] The controller ID 701 is identification information for each storage controller. IDs are prepared for the maximum number of controllers that can be implemented in the storage system 100. When a new storage controller 102 is added to the storage system 100, an unused controller ID is assigned.

[0074] The controller version information 702 is version information of the hardware corresponding to the controller ID 701. This makes it possible to determine whether each storage controller is an old storage controller or a new storage controller. If a storage controller is not implemented, a value indicating invalidity, such as NULL, is set.

[0075] The implemented FE port ID 703, the implemented BE port ID 704, the implemented CPU ID 705, the implemented interconnect port ID 706, and the implemented memory ID 707 are identification information of the FE port 103, the BE port 106, the CPU 104, the IC port 107, and the memory 105 respectively implemented in each storage controller 102. The implemented accelerator information 708 is information regarding the type of the accelerator circuit 113 implemented in each storage controller 102 or 112.

[0076] The controller upgrade status management information 709 is management information for determining whether the storage system 100 is in a normal status where the controller is not being upgraded, or in an upgrade status, and if an upgrade is in progress, which controller ID, which controller version, and which software version of the controller are being upgraded to. Information is set in the entire storage controller upgrade sequence described later so that processing can be switched depending on whether an upgrade is in progress or not.

[0077] When multiple storage controllers can be installed in the storage system 100, the hardware configuration information 601 holds a table for the maximum number of installable storage controllers.

[0078] 7 shows areas present on a drive 110 in an embodiment. The drive 110 includes a data area 1101 and a metadata area 1102. The data area 1101 stores host data received from the host computer 120. As will be described later, the data area 1101 stores compressed or uncompressed host data.

[0079] The metadata area 1102 stores control data used by the storage controller in the same node to execute necessary processes in the storage system. In Fig. 7, a logical-physical management table 1103 is shown as an example of the control data. The logical-physical management table 1103 manages mapping information between the logical address space accessed by the host computer 120 and the physical address space in which the host data is stored. The logical-physical management table 1103 is shared between the storage controllers. The logical-physical management table 1103 will be described in detail later.

[0080] Fig. 8 shows an example of the configuration of the logical-physical management table 1103. The logical-physical management table 1103 manages address mapping between the logical address space and the physical address space. In the example of the configuration of Fig. 8, the logical-physical management table 1103 includes a logical address column 421, a drive number column 422, a physical address column 423, a compressed size column 424, and an offset column 425.

[0081] The logical address column 421 indicates the logical address of the logical chunk 511. The drive number column 422 indicates the number of the drive that provides the storage area allocated to the logical chunk specified by the logical address. The physical address column 423 indicates the physical address of the physical chunk allocated to the logical chunk specified by the logical address.

[0082] The post-compression size column 424 indicates the data size of compressed data that includes logical chunk data. As described above, compressed data is generated from multiple logical chunk data, and the data of one logical chunk is part of the compressed data. Note that the post-compression size column 424 indicates a logical chunk that is stored in the drive 31 in an uncompressed state as "uncompressed." The offset column 425 indicates the offset of the logical chunk data in the original data of the compressed data, that is, in the data obtained by decompressing the compressed data.

[0083] 9 shows an example of the configuration of installed software management information 606 in the embodiment. The installed software management information 606 is management information for understanding which version of software is installed in each storage controller in the storage system. The installed software management information 606 includes a controller ID 6061, a software type 6062, a software sub-type 6063, and software version information 6064.

[0084] The controller ID 6061 is identification information for each storage controller. It corresponds to the controller ID 701 stored in the hardware configuration information 601, and the version information of the software installed in the controller can be associated with the installed controller version information 702 using the controller ID 701 as a key.

[0085] The software type 6062 indicates the type of software stored in the program area 401. The software sub-type 6063 is used when more detailed version management is required, such as software (program) that operates only with a specific controller version or later in the software type 6061, or software (program) that does not operate without a specific accelerator circuit. The software version information 6064 is a version number for understanding whether or not there is compatibility with existing functions as a result of adding a new function to the software or improving an existing function.

[0086] 10 shows an example of the configuration of software compatibility management information 607 in the embodiment. The software compatibility management information 607 is information for determining whether or not there is compatibility for software (programs) that require cooperation between different storage controllers. An example of software that requires cooperation between different storage controllers is software that requires communication of control information and data between storage controllers, such as the non-stop controller update sequence control unit 501.

[0087] Another example is software that performs processes that place a high load on the CPU, such as compression or encryption algorithms, and that you would not want to run in order to prevent performance degradation unless you have the latest hardware and a high-performance CPU.

[0088] The software compatibility management information 607 includes a software type 6071, a software sub-type 6072, software version information 60763, and software compatibility information 6074. The software type 6071 indicates the type of software stored in the program area 401. The software sub-type 6072 is used when more detailed version management is required, such as software that works only with a specific controller version or later within the software type 6071, or software that does not work without a specific accelerator circuit.

[0089] The software version information 6073 is a version number for understanding whether or not a new function has been added to the software, or an existing function has been improved, and whether or not the function is compatible with the existing function.

[0090] The software compatibility information 6074 is information for understanding which hardware is compatible when the version number of a certain software type 6071 is the software version information 6073. In other words, it indicates which hardware each software type can run on. In this embodiment, three types of storage controller types are assumed.

[0091] Controller version 1 is a storage controller that is not equipped with a compression / decompression accelerator, controller version 2 is a storage controller that is equipped with a first-generation accelerator, and controller version 3 is a storage controller that is equipped with a second-generation accelerator. In this embodiment, it is assumed that the second-generation accelerator is equipped with a more advanced compression algorithm compared to the first-generation accelerator, and thus has a better data compression rate than the first-generation accelerator and is also superior in terms of performance to the first-generation accelerator.

[0092] Additionally, performance information is provided for each version and algorithm. In this example, the performance impact is expressed as large, medium, or small, but a specific processing performance (processing speed) such as 100MB / s can also be expressed as an absolute value, and the number of levels is not limited. Here, small performance impact refers to an algorithm (program) that is executed using an accelerator circuit, and the case in which the CPU load is the smallest. Medium performance impact refers to algorithms designed to be processed by software, such as gzip and LZ4.

[0093] "Large performance impact" refers to algorithms that place a very large load on the CPU by implementing in software an advanced algorithm that would normally be implemented using an accelerator circuit. Essentially, algorithms that place a large load on the CPU are intended to allow data to be read when the accelerator circuit fails, and are not intended to be used under normal circumstances.

[0094] In this drawing, two types of software versions, 10.0.0 and 11.0.0, are described in the software version information 6073. It is assumed that version 10.0.0 was released at the same time as controller version 2 was released, and software version 11.0.0 was released at the same time as controller version 3.

[0095] At this time, referring to the software compatibility management information 607, when the software version information 6073 is 10.0.0, the software compatibility information 6704 of the non-stop controller update sequence control unit 501 indicates that an upgrade from controller version 1 to 2 is possible. Also, it can be determined that an upgrade to controller version 3 is possible by upgrading the software version information 6073 to 11.0.0.

[0096] Next, the row where the software type 6071 is the compression / decompression processing program will be explained. The compression / decompression processing program 507 lists three types as examples: software method, accelerator method 1, and accelerator method 2. The software method is a compression / decompression algorithm that can be run only by software, such as gzip and LZ4. Accelerator method 1 is a method supported by software version 10.0.0 or later and controller version 2.

[0097] Compared to the software compression method, in software version 10.0.0, accelerator method 1 is capable of decompressing data with little impact on performance on controller version 2 which is equipped with an accelerator. However, in controller version 1 which is not equipped with an accelerator, data compressed with accelerator method 1 cannot be decompressed by software alone, and it can be seen that there is no compatibility for reading data between controllers.

[0098] 11 is a flowchart showing the entire controller update process executed by the storage controller. In this embodiment, the process procedure for updating in storage node units is shown. The same procedure can be used even when updating in storage controller units.

[0099] First, the storage controller 102 identifies an upgrade source node (step S101). For example, the storage controller 102 receives a designation of the upgrade source node from the management device 122. If multiple upgrade source nodes are designated, one upgrade source node is selected from among them. The storage controller 102 further receives information on the upgrade destination. The information on the upgrade destination includes hardware information and software information of the upgrade destination.

[0100] Next, the storage controller 102 refers to the hardware configuration information 601 and the software compatibility management information 607 to determine whether the upgrade is possible. If it is determined that the upgrade is not possible (S102: NO), the controller update process is rejected and terminated. To perform the upgrade, it is necessary to update the software version of the node to be upgraded to an appropriate version that supports the upgrade.

[0101] The storage controller 102 refers to the hardware configuration information 601 and acquires the controller version information 702 corresponding to the controller ID of the update source. Next, the storage controller 102 refers to the hardware information and software information of the update destination and acquires the controller version and the software version of the non-stop controller update sequence control unit 501.

[0102] Next, the storage controller 102 refers to the software compatibility management information 607 and obtains an entry whose software type 6071 matches the non-stop controller update sequence control unit 501, whose software version information 6073 matches the software version installed in the upgrade destination controller, and whose software compatibility information 6074 matches the controller version of the upgrade destination controller.

[0103] If the retrieved information indicates that a controller upgrade is supported, it is determined that the upgrade is possible. If the entry content is N / A (Not Available) or no entry matching the conditions is found, it is determined that the upgrade is not possible.

[0104] If it is determined that the upgrade is possible (S102: YES), the controller update process is permitted. The storage controller 102 changes the controller upgrade status management information 709 of the hardware configuration information 601 of the node to be upgraded from "normal status" to "upgrading" (S103).

[0105] Next, the storage controller 102 refers to the installed controller management information 602 and judges whether the current configuration is the maximum configuration (S104). If it is judged to be already the maximum configuration (S104: YES), it judges to upgrade the storage controller by a procedure of subtraction and then addition, and proceeds to S105. If it is judged that the number of storage controllers is less than the maximum (S104: NO), it judges to upgrade the storage controller by a procedure of addition and then subtraction, and proceeds to S113.

[0106] In S105, the control right of the LUN, the FE port allocation of the LUN, and the stored shared memory information are evacuated from the storage controller to be removed to another storage controller 102, 112 that is not to be removed, or to both. The evacuated information is stored in the takeover management information 605.

[0107] Next, the storage controller 102 removes the old storage node 101 to be removed (S106). Specifically, the controller version information 702 corresponding to the hardware configuration information 601 of the old storage node 101 as the storage system is changed to "not installed."

[0108] Next, the storage controller 102 displays instructions for the installation of the old storage node 101 and the installation of the new storage node 111 on the management screen (S107) to encourage the worker to install the equipment and wire the cables, etc., and waits for an operation from the worker (S108). The management screen is, for example, a screen displayed by a display device (not shown) of the management device 122.

[0109] When the operation from the worker is accepted, the storage controller 102 executes the process of adding the new storage node 111 (S109). Specifically, the storage controller 102 initializes the hardware configuration information 601 corresponding to the new storage controller 112 mounted on the new storage node 111. At this time, the storage controller 102 assigns an unused controller ID in the storage system as the controller ID 701 of the new storage controller 112. This allows the storage node controller 102 to detect that the new storage controller 112 has been implemented in the storage system by referring to the hardware configuration information 601.

[0110] Next, the storage controller 102 changes the controller upgrade status management information 709 in the hardware configuration information 601 of the newly added storage node 111 from "normal status" to "upgrading" (S110). This status change enables the storage controller to determine that the controller is currently undergoing upgrade work.

[0111] Next, the storage controller 102 uses the information stored in the takeover management information 605 to transfer the LUN control right, LUN allocation for each FE port, and shared memory information allocated to the storage controller before evacuation to the newly added storage controller 112 (S111). Next, proceed to S112.

[0112] In S112, the storage controller 102 refers to the controller version information 702 of the hardware configuration information 601 corresponding to all storage controllers in the storage system to determine whether or not the old storage controller 102 remains in the storage system. If the old storage controller 102 remains, the process returns to S101. If the replacement with all new storage controllers 112 has been completed, the process proceeds to S120.

[0113] In S120, the storage controller 112 changes the controller upgrade status management information 709 in the hardware configuration information 601 from "upgrading" to "normal status."

[0114] Steps S113 to S119 are processing steps for implementing an upgrade by adding and then removing a storage controller node.

[0115] In S113, the storage controller 102 displays a physical installation work instruction for the new storage node 111 on the management screen to encourage the worker to install the equipment and wire the cables, etc., and then waits for an operation from the worker (S114).

[0116] When the operation from the worker is accepted, the storage controller 102 executes the process of adding the new storage node 111 (S115). Specifically, the storage controller 102 initializes the hardware configuration information 601 corresponding to the new storage controller 112 mounted on the new storage node 111. At this time, the storage controller 102 assigns an unused controller ID in the storage system as the controller ID 701 of the new storage controller 112. This allows the storage controller 102 to detect that the new storage controller 112 has been implemented in the storage system by referring to the hardware configuration information 601.

[0117] The storage controller 102 changes the controller upgrade status management information 709 in the hardware configuration information 601 of the newly added storage node 111 from "normal status" to "upgrading" (S116). This status change enables the storage controller to determine that the controller is currently undergoing an upgrade operation.

[0118] Next, the storage controller 102 moves the LUN control rights, LUN allocation for each FE port, and shared memory information located on the storage controller 102 to be removed, which are registered in the storage controller 102 to be removed, to the newly added storage controller 112 (S117).

[0119] When the migration is complete, the storage controller 102 removes the storage node to be removed (S118). Specifically, the controller version information 702 corresponding to the hardware configuration information 601 of the old storage node 101 as the storage system is changed to "not installed."

[0120] Next, the storage controller 102 displays a physical removal work instruction for the removed old storage node 101 on the management screen to encourage the worker to remove the devices and cables (S119). After that, the process proceeds to S112. In response to the instruction in S119, the worker performs the physical removal work.

[0121] 12 shows a flowchart of an example of host read processing in the embodiment. The controller 102 or 112 receives a read request from the host computer 120. The CPU 104 of the controller 102 or 112 executes the IO program 506. The IO program 506 analyzes the IO request received from the host computer 120, here a read request (S201). The read request indicates read request data, and specifically indicates the identifier of the logical volume to be accessed, the starting logical address and data length of the requested data. In other words, one or more logical chunks that store the data to be transferred are specified.

[0122] Next, the IO program 506 refers to the logical / physical management table 1103 and identifies the drive number and physical address of the physical chunk corresponding to each of the specified logical chunks (S202).

[0123] Next, the IO program 506 reads the host data from the drive 110, and stores it in the cache memory area 403 of the memory 105 (S203). Specifically, the IO program 506 reads the host data from the physical address acquired from the logical-physical management table 1103.

[0124] Next, the IO program 506 determines whether the data read from the drive 110 is compressed data or non-compressed data (S204). The IO program 506 can determine whether the data is compressed or non-compressed data by referencing the post-compression size column 11034 of the logical / physical management table 1103.

[0125] If the read data is compressed data (S204: YES), the IO program 506 judges whether or not a dedicated circuit for data decompression (accelerator circuit 113) is implemented on the storage controller 102 or 112 (S205). Specifically, it refers to the implemented accelerator information 708 of the hardware configuration information 601 and judges whether logic for decompressing the read compressed data is included.

[0126] If a dedicated circuit is implemented (S205: YES), the IO program 506 decompresses the data using the dedicated circuit (S206), and transfers this host data to the host computer (S208).

[0127] If a dedicated circuit is not implemented (S205: NO), the IO program 506 decompresses the compressed data in software without using a dedicated circuit (S207), and transfers the host data to the host computer (S208). Normally, data compressed using an accelerator circuit can be decompressed using the same accelerator circuit, but if an accelerator circuit breaks down midway or an accelerator circuit is removed, it may be necessary to decompress data compressed by the accelerator without using the accelerator circuit.

[0128] If the read data is uncompressed data (S204: NO), the IO program 506 transfers the host data to the host computer (S208).

[0129] 13 shows a flowchart of an example of data compression processing in the embodiment. Data compression processing is performed on data written from the host computer 120 with the aim of reducing the amount of data stored in the drive 110. Although not shown, a sequence up to when the storage controller 102 or 112 receives a write request from the host computer 120 will be described. First, the storage controller 102 or 112 receives a write request from the host computer 120.

[0130] The CPU 104 of the controller 102 or 112 executes an IO program 506. The IO program 506 stores the data received from the host computer 120 in the cache memory area 403. Thereafter, for the purpose of data redundancy, the data is transferred to the cache memory area 403 on another storage controller 102 or 112, and the host computer 120 is notified that the write process has been completed.

[0131] The compression process described using this diagram may be performed immediately after data is stored in the cache memory area 403 from the host computer 120, or may be performed after waiting for a certain amount of data to accumulate in the cache memory area 403 in synchronization with a write request from the host computer. The IO program 506 then performs compression processing, and stores the data in the drive 110 after the compression processing is completed.

[0132] First, the IO program 506 identifies data that has been written from the host computer 120 and stored in the cache memory area 403 (S301). Specifically, the identifier of the logical volume to be accessed, the start logical address of the write data, and the data length are indicated. In other words, one or more logical chunks that store the data to be compressed are specified.

[0133] Next, the IO program 506 judges whether or not a dedicated circuit for data compression (accelerator circuit 113) is implemented on the controller (S302). Specifically, it refers to the implemented accelerator information 708 of the hardware configuration information 601 and judges whether or not the logic for compressing the read compressed data is included.

[0134] If a dedicated circuit is not implemented (S302: NO), the IO program 506 compresses the compressed data in a software manner without using a dedicated circuit (S306), and ends the data compression process.

[0135] If a dedicated circuit is implemented (S302: YES), the IO program 506 judges whether the storage controller 102 or 112 is being upgraded (S303). Specifically, it refers to the controller upgrade status management information 709 of the hardware configuration information 601 and judges whether the storage controller 102 or 112 is being upgraded or not.

[0136] If an upgrade is not in progress (S303: NO), the IO program 506 compresses the data using a dedicated circuit (S305) and ends the data compression process. If an upgrade is in progress (S303: YES), the IO program 506 calls the compatibility information determination process described below, performs data compression processing based on the results (S304), and ends the data compression process.

[0137] FIG. 14 is a flow chart illustrating control logic including a compatibility determination process executed by storage controller 102 or 112 in an embodiment.

[0138] First, the IO program 506 acquires version information of its own storage controller 102 or 112 and version information of the software installed in that storage controller (S401). Specifically, it refers to information 6064 in installed software management information 606 to identify the software version installed in its own storage controller 102 or 112, and refers to controller version information 702 in hardware configuration information 601 to identify the hardware version of its own storage controller 102 or 112.

[0139] Next, the IO program 506 acquires version information of the upgrade destination or upgrade source storage controller and version information of the software implemented in the storage controller (S402).

[0140] Specifically, the IO program 506 refers to the controller upgrade status management information 709 to identify which storage controller in the storage system the own storage controller 102 or 112 is attempting to upgrade to, or from which storage controller with the controller ID. By referring to the hardware configuration information 601 corresponding to the upgrade destination or upgrade source controller ID, the IO program 506 acquires the hardware version of the upgrade destination controller or upgrade destination controller and the implemented software version in the same manner as in S401.

[0141] Next, the IO program 506 extracts the compression algorithm supported by both the upgrade source and destination storage controllers (S403). Specifically, in the software compatibility management information 607, the software type 6071 refers to a row corresponding to a compression / decompression processing program, the software compatibility information 6074 column refers to a cell corresponding to the upgrade source and destination controller versions, and identifies the software sub-type 6072 for which both the upgrade source and destination cells are set to "supported."

[0142] If there is only one compression algorithm (software sub-type) that satisfies the condition (S404: NO), the IO program 506 performs compression using that compression algorithm (S406). If multiple compression algorithms (software sub-types) satisfy the condition (S404: YES), the IO program 506 selects the compression algorithm with the highest priority in terms of performance impact, and performs compression processing (S405).

[0143] In Fig. 10, the magnitude of the performance impact is expressed as a relative value of large, medium, and small, but as a policy, a selection may be made so that the performance impact on the entire system is small and that the performance impact on the source device that has limited hardware resources such as CPU is small. The compression algorithm with the highest IO processing speed for the entire storage system is selected.

[0144] Specifically, the priority is set in the order of the performance impact of the upgrade source and destination in the following order: small-small > small-medium > medium-small > medium-medium > small-large > medium-large > large-small > large-medium > large-large. The algorithm with the highest priority that satisfies the conditions is selected. The reason for selecting to reduce the performance impact of the upgrade source is that, generally, by upgrading the controller, performance can be expected to improve compared to before the upgrade by adopting the latest generation of hardware such as a CPU. In this way, in one embodiment of this specification, the priority is set in advance so that the program with the fastest IO processing speed is selected.

[0145] Taking Figure 10 as an example, if the software version from which the upgrade is to be made is 11.0.0 and the controller version is 1, and the software version to which the upgrade is to be made is 11.0.0 and the controller version is 2, it can be determined that the compression and decompression algorithms supported by both controllers are software method 1 and accelerator method 1.

[0146] However, for accelerator method 1, only controller version 2 is capable of actually using an accelerator to compress and decompress data; controller version 1 does not have an accelerator that supports accelerator method 1, and only indicates that data can be compressed and decompressed using software, albeit at a slow speed, for compatibility reasons. In this case, if data is compressed and decompressed using the algorithm of accelerator method 1 with controller version 1, there is a concern that IO processing performance will be significantly reduced. For this reason, a method of compressing data using software without using an accelerator circuit is selected.

[0147] If the software version of the source of the upgrade is 11.0.0 and the controller version is 2, and the software version of the destination of the upgrade is 11.0.0 and the controller version is 3, the compression and decompression algorithms supported by both controllers can be identified as software method 1, accelerator method 1, and accelerator method 2.

[0148] Regarding accelerator method 1, only controller version 2 can actually use an accelerator to compress and decompress data. Controller version 3 does not have an accelerator that supports accelerator method 1, and for compatibility reasons, it indicates that data can be compressed and decompressed using software, albeit at a slower speed.

[0149] In addition, regarding accelerator method 2, only controller version 3 is capable of compressing and decompressing data using an accelerator. Controller version 2 does not have an accelerator that supports accelerator method 2, and therefore can compress and decompress data using software, albeit at a slower speed, for compatibility reasons only.

[0150] Therefore, a method of compressing data using software method 1 without using an accelerator circuit is selected.

[0151] In this way, the performance impact priority is determined so that an accelerator-based compression algorithm that can use accelerator circuits in both the upgrade source and upgrade destination storage controllers is preferentially selected. The IO program 506 performs compression using an accelerator-based algorithm supported by both storage controllers. If there is no accelerator-based algorithm supported by both storage controllers, the IO program 506 performs compression using a software-based algorithm supported by both storage controllers.

[0152] The above description regarding the selection of a software sub-type (algorithm) for a data compression process can also be applied to the selection of a software sub-type for other processes. As described above, by determining whether a storage controller is being upgraded and selecting a process that has a small impact on performance for both the source and destination storage controllers, it is possible to prevent some new storage controllers 112 from executing a process that is not compatible with the old storage controllers 102 before the upgrade of all storage controllers in the storage system 100 is completed.

[0153] The present invention is not limited to the above-mentioned embodiment, but includes various modified examples. For example, the above-mentioned embodiment has been described in detail to clearly explain the present invention, and is not necessarily limited to those including all of the configurations described. It is also possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace a part of the configuration of each embodiment with another configuration.

[0154] In addition, the above-mentioned configurations, functions, processing units, etc. may be realized in part or in whole by hardware, for example, by designing them as integrated circuits. In addition, the above-mentioned configurations, functions, etc. may be realized in software by a processor interpreting and executing a program that realizes each function. Information such as the program, table, file, etc. that realizes each function can be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card or SD card.

[0155] In addition, the control lines and information lines shown are those that are considered necessary for the explanation, and not all control lines and information lines in the product are necessarily shown. In reality, it can be considered that almost all components are connected to each other. [Explanation of symbols]

[0156] 100 Storage Systems 101 Node 102, 112 Storage Controller 104 CPU 105 Memory 110 Drive 113 Accelerator Circuit 120 Host 122 Management device 601 Hardware configuration information 606 Implemented Software Management Information 607 Software Compatibility Management Information

Claims

1. 1. A storage system comprising: A plurality of storage controllers each including a processor and a memory for processing data input and output to the storage drive; Each of the plurality of storage controllers is an old storage controller before replacement or a new storage controller after replacement, the new storage controller is capable of executing a first program and a second program; The old storage controller is capable of executing at least the second program, When all of the plurality of storage controllers are the new storage controllers, the new storage controller processes data input / output to the storage drive using the first program; A storage system, wherein when the plurality of storage controllers includes at least one of the old storage controllers, each storage controller of the plurality of storage controllers processes data input / output to the storage drive using the second program.

2. 2. The storage system according to claim 1, the new storage controller includes an accelerator circuit; The processor of the new storage controller compresses data using the accelerator circuit in accordance with the first program; The processor of the new storage controller compresses data in accordance with the second program without using the accelerator circuit.

3. 3. The storage system according to claim 2, the legacy storage controller includes a first accelerator circuit; Before becoming a replacement target, the old storage controller compresses data using the first accelerator circuit; After becoming the replacement target, the old storage controller compresses data using the processor of the old storage controller without using the first accelerator circuit.

4. 2. The storage system according to claim 1, the old storage controller is capable of executing a third program; the new storage controller includes an accelerator circuit for compressing data according to a first algorithm; the first program compresses data using the accelerator circuit; the second program compresses data without using the accelerator circuitry; the third program is capable of compressing data by the processor using the first algorithm; A storage system, wherein the priority of a combination of the third program executed by the old storage controller and the first program executed by the new storage controller is lower than the priority of the second program executed by both the old storage controller and the new storage controller.

5. 2. The storage system according to claim 1, A storage system, wherein when there are a plurality of programs executable by both the old storage controller and the new storage controller, the second program is selected from the plurality of programs according to a preset priority.

6. 2. The storage system according to claim 1, A storage system, wherein when there are a plurality of programs executable by both the old storage controller and the new storage controller, a program having the fastest IO processing speed is selected from the plurality of programs as the second program.

7. 2. The storage system according to claim 1, One storage controller of the plurality of storage controllers Refer to the hardware configuration information and software configuration information of the original storage controller and the replacement destination storage controller, A storage system which rejects the exchange of the original storage controller and the destination storage controller when the hardware configuration information and the software configuration information deviate from preset exchange conditions.

8. A data processing method in a storage system, comprising: The storage system includes a plurality of storage controllers each including a processor and a memory for processing data input and output to a storage drive; Each of the plurality of storage controllers is an old storage controller before replacement or a new storage controller after replacement, the new storage controller is capable of executing a first program and a second program; The old storage controller is capable of executing at least the second program, The data processing method includes: When all of the plurality of storage controllers are the new storage controllers, the new storage controller processes data input / output to the storage drive using the first program; A data processing method, wherein when the plurality of storage controllers includes at least one of the old storage controllers, each storage controller of the plurality of storage controllers processes data input / output to the storage drive using the second program.

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