Transporting sampled signals over multiple electromagnetic paths - Patents.com

Abstract

To adapt media signal quality results recognized as appropriate for particular applications to comply with control / status protocols specified for those applications.SOLUTION: The subject of the present disclosure is to achieve adequate media communication results despite EM propagation difficulties, by applying SSDS-CDMA techniques to media signal communication and control and status exchange in order to implement diverse media interfaces.

Description

[Technical field]

[0001] The invention entitled "Media Interface Incorporating Adaptive Compression" is hereby incorporated by reference.

[0002] Media Signal Communication The technical field of this application is the communication of media signals, i.e. sampled signals ultimately directed to human perception. In particular, the subject of this application is the implementation of any media interface with adaptive compressed media transport. [Background technology]

[0003] The physical basis of communication Electromagnetic Propagation Path (EM Path) Electromagnetic propagation paths (EM paths) allow the rapid propagation of physical energy as signals across physical space from a transmitting terminal to a receiving terminal. EM paths for media signal communication are generally available in one of three types: wired pairs (cables), free space (wireless), and optical waveguides (fiber).

[0004] Various kinds of EM pathways cover heterogeneous spatial configurations, from within an integrated circuit package to within the chassis of a camera or phone, to the space around the body of a person wearing a device, to within the built environment surrounding people (such as indoors or in a vehicle), or even throughout a building or across a campus. Some EM pathways carry media signals over distances exceeding tens of kilometers, thus enabling remote communication.

[0005] Electromagnetic signal (EM signal) For purposes of this application, an electromagnetic signal (EM signal) is a variable quantity represented as electromagnetic energy whose amplitude varies with time. An EM signal propagates from a transmitter terminal to a receiver terminal through an EM path.

[0006] An EM signal can be characterized as continuous or discrete independently in each of the following two dimensions:

[0007] ·time

[0008] Continuous: The time between successive values ​​assigned to a variable is limited by the resolution at which time can be measured.

[0009] o Discrete ("sampled"): The time between successive values ​​being assigned to a variable is predetermined, and the inverse of the average sampling interval is the "sampling rate" of the EM signal.

[0010] ·amplitude

[0011] o Continuous: The number of possible amplitudes of EM signal values ​​is limited by the resolution with which the energy can be measured.

[0012] o Discrete ("quantized"): The number of possible amplitudes of the EM signal values ​​is predetermined. The base 2 logarithm of the number of different amplitudes possible is the "number of bits" of the quantized EM signal.

[0013] There are four combinations of these attributes and therefore four separate types of EM signals:

[0014] An "analog" signal is an EM signal that is continuous in time and continuous in amplitude.

[0015] "Digital" signals are EM signals that are discrete in time and discrete in amplitude.

[0016] A "pulsating" signal is an EM signal that is continuous amplitude at discrete times. The unconventional meaning of the term "pulsating" is retained for clarity in this application. Pulsating signals are sometimes referred to by those skilled in the art as "sampled analog signals."

[0017] A "neuronal" signal is an EM signal that is continuous in time and discrete in amplitude. This is not necessarily the customary meaning of the term "neuron," but is appropriate as the fourth attribute in the classification methodology herein. Neuronal signals are outside the scope of this application.

[0018] A small physical portion of the EM signal is in transit between the transmitter and receiver terminals while traveling down the EM path. The maximum amount of information that can be in transit across the EM path at a single instant is a number whose numerator depends on the physical distance traveled between the transmitter and receiver, and whose denominator can be as large as the speed of light.

[0019] Incomplete EM pathway Due to phenomena such as attenuation, reflections due to impedance mismatch, and impinging signals, every EM path degrades the EM signal propagating through it in the sense that measurements of the EM signal made at a receiving terminal will necessarily differ to some extent from the level provided at the corresponding transmitting terminal. Thus, every EM path is an imperfect electromagnetic propagation path. Measurements made at a receiving terminal will therefore always be in error with respect to the corresponding level provided through the EM path to the transmitting terminal paired with the receiving terminal. The quality of any given EM path is characterized by a comparison of the level measured at the receiving terminal after transmission through the EM path to the level provided at the transmitter.

[0020] As an embodiment, cables are the EM pathways most frequently referred to herein, but the principles, methods and apparatus described and claimed apply to all EM pathways alike.

[0021] Media Signal A media signal is a special type of EM signal. It is an ordered sequence of samples. It may be generated by a physical measurement device, e.g. an image sensor, or a video engine, e.g. a graphics processor. Also the input to an image or video display matrix is ​​a media signal.

[0022] Video signals are an important class of media signals. As an embodiment, media signals are referred to herein as video signals for convenience. There are many alternative electronic formats for video signals. Video consists of an ordered sequence of images, each of which in turn describes a two-dimensional array of color values. The color values ​​may be represented in a variety of color spaces, all with different resolutions of each frame, and different frame rates. Most video signals can be represented as a one-dimensional list of color values, i.e., an ordered series of samples. These samples are quantized in digital video systems, and they are continuous in pulsating (sampled analog) video systems.

[0023] Media Signal Snippet A media signal snippet is a finite, contiguous subseries from an ordered sequence of samples of a media signal. Examples of media snippets include still images (e.g., JPG, BMP) and videos (e.g., MP4, AVI). A media signal source, such as a video camera, generates a finite sequence that is arbitrarily longer than a media signal snippet.

[0024] The physical basis of media signal snippets A media signal snippet exists as a physical object that is finite in spatiotemporal extent but unbounded.

[0025] Common examples of physical embodiments of media snippets include a voltage across an array of capacitors, as in the case of an image sensor, and the contents of a dynamic computer memory, ink on paper, or a current flowing through an array of diodes, as in the case of a direct LED display. Media signal snippets may also be realized as waveforms traveling in free space.

[0026] The physical embodiment of a media signal snippet may span an arbitrarily small or large amount of time and space. Each of the types of media signal snippet embodiments listed in the previous paragraph is capable of being spatially compact and persisting over long intervals.

[0027] Most familiar physical embodiments of media signal snippets are spatially compact: images are a particularly important type of media signal snippet, and examples of certain familiar embodiments of images include a set voltage held on a capacitor in an image sensor of a camera, a set of emitter drive powers supplied to an LED array of a direct LED display, and a set of bits representing an image in a frame buffer memory of an electronic device.

[0028] Media Signal Communication Media Signaling Requirements Media signal communication is the physical process of repeatedly transforming a set of samples from one or more input media signals between physical embodiments from one place to another through electromagnetic propagation.

[0029] A media signal communication system consists of media signal generating devices ("sources") and media signal consuming devices ("sinks") that exchange energy through electromagnetic propagation across one or more EM paths. Most of the energy is allocated to transmitting EM signals representing the input media signals from the source to the sinks. A relatively modest additional amount of energy is allocated to transmitting control and status information between the source and the sinks. For clarity herein, the source is considered to be "upstream" or "uphill" of the sink with respect to the direction of media signal communication.

[0030] A source transforms one or more input media signals by repeatedly transforming one or more input media signal snippets into intervals of one or more EM signals that are provided to an associated EM path.

[0031] The sink reconstructs the one or more output media signals by iteratively reconstructing one or more output media signal snippets from intervals of the one or more EM signals transmitted across the associated EM path.

[0032] Media signal communication quality and human perception One measure of success for media communications is the degree to which the output signal is an adequate representation of the input signal. What defines adequate, or in this case goodness of fit, varies widely among applications. For video communications, the inherent error characteristics of image sensors and displays allow a range of image quality requirements, spanning the following example ranges, for example: i) Every bit of every color value in every image is correct (it is difficult to manufacture high-resolution displays and image sensors without defects). ii) There are some "bad" pixels with a certain distribution iii) "There is no one who can tell the difference" (e.g., 4:2:2 compression) iv) "I can see something when it's pointed out to me" (e.g., a soft noise). v) Obvious defects (e.g. block artifacts resulting from discrete cosine transform impairments) vi) Blank Screen (no video signal whatsoever, not acceptable for any application)

[0033] Where freedom exists in the definition of quality, the requirements for media signal communication are distinct from those for binary data communication. When communicating binary data, such as email, all symbols are expected to be perfectly reconstructed at the destination. In contrast, the output media signal is suitable for some purposes, including human perception, even when the media communication does not exactly reconstruct all symbols. For example, lossy compression is becoming more and more widely accepted for video communication, as increasing video resolution tests the practical limits of bit-serial video transport capabilities.

[0034] The usefulness of the methods and apparatus disclosed herein is based in part on the observation that human perception of video signal communication quality depends on the statistics of the spatiotemporal distribution of individual color value errors in the reconstructed video signal, as well as the aggregate magnitude of the errors.

[0035] Media Transport A media transport consists of a source circuit paired with a sink circuit on a single EM path. Media transport selection is an important design consideration for media equipment because systems are assembled by end consumers who buy off-the-shelf equipment from various factories, connected together through EM paths that are in some cases difficult to predict and difficult to constrain. End consumers expect interoperability, but it is difficult to expect equipment manufacturers to work on all possible legacy EM paths. An ideal media transport would accommodate the widest variety of legacy EM paths.

[0036] Media Interface Those skilled in the art use the term "interface" in various ways. "Media interface" in this specification refers to a standard for source devices, for sink devices, for media signal communication, which in some cases is an acceptable EM path.

[0037] A media interface relies on a media transport by specifying a number of EM paths, here P, and pairing a media transport source of P with a media transport sink of P. A media interface also specifies a control / status exchange protocol. A media interface further specifies physical connector characteristics and EM path characteristics. Whatever the physical constraints and control / status protocols, all media interfaces rely on a media transport.

[0038] Video interfaces are a particularly important type of media interface. Examples of video interfaces include HDMI (EIA / CEA-861), DVI, DisplayPort, MIPI, USB, AHD, various IP video interfaces, and many others.

[0039] Bit Serial Media Interface Most media transports are bit-serial in design, and therefore EM paths transmit one bit at a time. A media interface that aggregates several bit-serial media transports on several EM paths at once is itself a bit-serial media interface. At the physical level, such a bit-serial media transport interprets each sample as being exactly how many bits each of them are communicated.

[0040] Physical considerations related to the propagation of EM signals through EM paths impose limits on the rate at which bits can be transmitted through any real-world EM path. Thus, all bit-serial media transports impose hard frequency limitations that lead to resolution and frame rate limits in media interface standards.

[0041] A key differentiator among bit-serial video interfaces is the media transport specified: for example, HDMI and DVI specify TMDS, DisplayPort specifies fixed data rate packet transport, MIPI's D-PHY, M-PHY, and C-PHY each specify bit-serial communication, USB specifies bit-serial differential signaling over one or more twisted pair data cables, AHD specifies 2-channel Y / C FDMA over coaxial cable, while various IP video interfaces specify Ethernet over various EM paths, etc.

[0042] The ever-increasing market demand for media content delivery with the inherently limited bit-serial media transport has led to the development of IP video. IP video typically relies on video compression. The goal of video compression is to reduce the bandwidth of the media signal, measured in bits per second. Each compression algorithm represents each media signal snippet with a smaller set of bits that must be communicated precisely.

[0043] IP video is a class of bit-serial media transport in which a video signal snippet is first algorithmically encoded into a compressed representation that requires fewer bits than the original input video signal snippet, allowing the compressed representation to be transported in a bit-serial manner over conventional (email-compatible) network links. The compressed representation is no longer a video signal, although it remains a digital signal. IP video is subject to the same constraints as other bit-serial media transports.

[0044] Video compression is algorithmically challenging and therefore expensive to develop. Video compression is computationally intensive and therefore expensive to implement. The video compression process adds latency to the communication process.

[0045] Furthermore, the quality of the reconstructed video is sometimes visibly impaired by compression artifacts. Examples of objectiorraWTligTf spatial frequency artifacts include "contour" edges that appear in gradual gradients presented on large digital display areas, and "blocking" artifacts that result from very slight errors, on the order of 0.1%, in the DC components of DCT blocks in motion-based compression algorithms.

[0046] A distinguishing feature of bit-serial media communication is that if the electrical characteristics of the EM path are insufficient to support the required bit communication rate, the bit-serial media communication system will suddenly fail, producing artifacts in the reconstructed output signal that a human observer finds annoying, or losing the ability to reconstruct a useful output signal altogether. Edge cases leading to complete failure of communication have a strong impact on consumers of the media signal, leading to the need for more resilient media transport than bit-serial solutions have proven to be.

[0047] SSDS-CDMA for sampled signal communications In pursuit of an alternative video transport that avoids the limitations of known video transports, the Spread Spectrum Direct Sequence-Code Division Multiple Access (SSDS-CDMA) transmission system defined in "Spread Spectrum Systems with Commercial Applications", by Robert C. Dixon, Vol. 3, Wiley & Sons, 1994, is incorporated herein by reference.

[0048] SSDS is a widely used communication method for sampled signals that relies on spreading codes. The code is a unique indexed sequence of a certain number of values ​​called "chips", and the spreading code has certain frequency characteristics.

[0049] The SSDS transmitter modulates (encodes) each sampling of the input information signal with a higher frequency spreading code to create an output EM signal that has certain characteristics with respect to electromagnetic propagation.

[0050] The SSDS receiver measures the input EM signal as an ordered series of levels, correlates (decodes) the received EM signals with synchronized instances of the code applied by the creator of the EM signal, and collects output samples as output information.

[0051] SSDS is well known to provide multiple benefits, including resilience to EM path imperfections including, for example, attenuation, dispersion, and reflections. SSDS is particularly resilient to narrowband infringing signals, which correspond to sudden bursts of energy occurring in the EM path that are centered around a frequency, rather than being spread uniformly across all frequencies. One exemplary source of infringing signals is mobile phone emissions.

[0052] SSDS takes into account reflected waves from impedance discontinuities, and the characteristic delay of these reflected waves is much larger than a single dispatch or measurement interval. The only practical concern with reflections is that the receiver be able to lock onto the reflected EM signal rather than the EM signal provided at the transmitter terminal.

[0053] SSDS robustness is generally applied to ensuring that at least some percentage of a set of bits is correctly transmitted over a potentially difficult EM path. In contrast to this prevalent bit-serial design objective, the success of media transport is measured not as what percentage of the payload of bits is delivered, but rather as how adequate the output media quality is for a given application, taking into account the cost of implementing the media transport.

[0054] Acquiring and tracking synchronization information in SSDS-CDMA systems In any SSDS communication system, the receiver needs to be synchronized with the transmitter. Typically, synchronization is done in two parts: an initial coarse synchronization, also known as acquisition, followed by a finer synchronization, also known as tracking. While there are many sources of error in acquiring synchronization, in the embodiments disclosed herein, Doppler shift, multipath interference, as well as some of the more subtle effects that affect prior art SSDS-CDMA, are not present due to the relatively constrained nature of most infrastructure EM paths.

[0055] SSDS-CDMA for media signal communication SSDS-CDMA is a communication method in which several independent SSDS output EM signals, each modulated with a distinct spreading code, share a common EM path. The SSDS-CDMA receiver distinguishes between the various SSD output EM signals that contribute to the received EM signal based on the particular spreading code applied at each modulator.

[0056] Differentiation from known SSDS-CDMA methods SSDS is different from that claimed in this application.

[0057] SSDS applies when nearly every bit of a digital signal must be transmitted correctly, as opposed to satisfying the approximations required for media transport for many applications, including most human-viewing applications.

[0058] · SSDS is commonly applied in terms of a single signal stream through an EM path that is often in free space, whereas media transport carries media signal snippets through an EM path that is often a waveguide.

[0059] SSDS-CDMA differs from that shown in this application.

[0060] In known SSDS-CDMA applications, the coded values ​​are transmitted independently of each other; in contrast, the media interface disclosed herein relies on a media transport that synchronously codes all values ​​in a vector of N media signal sample values ​​as a sequence of L values ​​that are transmitted end-to-end along the EM path.

[0061] Whereas some known SSDS-CDMA applications seek to hide transmitted signals in the surrounding noise floor in order to minimize energy consumption, minimize potentially harmful EM emissions, and minimize the probability of interception, the media interface disclosed herein relies on a media transport capable of transmitting maximum energy over the EM path permitted by the relevant FCC / CE / CCC regulations.

[0062] Known (bit-serial) SSDS-CDMA relies on chip-phase shifted code variants to discriminate transmitters, whereas the encoder-decoder pair claimed here uses orthogonal codebooks to minimize inter-track interference (II).

[0063] o Orthogonal codebooks may contain non-spreading codes. An identity matrix (shown in Figure 15) is an example of one such codebook.

[0064] One embodiment of an orthogonal codebook incorporates spreading codes to 1) ensure that the transmission of each input / output vector sample benefits from the SSDS resilience to aggressors, and 2) for signals intended for perception, transform electrical impairments and II into perceptually harmless artifacts.

[0065] Media signals are sequences of samples, where not all bits of all samples have the same value, i.e., the most significant bits of a sample are generally the most perceptually important, while all bits of all samples potentially encompass value. Digital transports, such as transition-minimum differential signaling, transmit the bit sequence. Digital media transports apply digital compression algorithms to rebalance the bit values. Compression increases cost, latency, power consumption, and design complexity while decreasing quality. With both compression and decoding, all bits are transmitted with equal importance. Apparatus and methods disclosed herein transmit sample sequences, which is a more direct approach to communicating media signals. These processes apply statistical coding / decoding that a) compensates for at least physical propagation errors, while the digital transport compensates for such errors, and b) provides the highest fidelity reconstruction given the residual, uncorrectable physical propagation errors. The effectiveness of the process does not depend on analyzing the media signal, but on selecting an appropriate codebook, and as a direct result of this "context-triviality", the process is implemented with low latency and low gate count. Summary of the Invention [Problem to be solved by the invention]

[0066] Various aspects described herein help to relax the hard limits on EM propagation distance and video resolution mentioned above, and also to enhance and replace various known media interfaces and known media signal transports. [Means for solving the problem]

[0067] In an aspect, the media interface specifies media transport and bidirectional protocols for exchanging control and status information between sources and sinks across one or more EM paths. The number of EM paths and bidirectional communication protocols specified in the media interface are selected based on the requirements of a particular application. The methods and apparatus disclosed herein aim to achieve media signal quality results that are recognized as appropriate for particular applications while being adapted to comply with the control / status protocols specified for those applications.

[0068] In one aspect, the method and apparatus disclosed herein applies various SSDS-CDMA methods to media interface implementations by simultaneously:

[0069] a) Applying a novel SSDS-CDMA based media transport to approximately reconstruct media signal samples from one or more input EM signals.

[0070] b) Applying SSDS-CDMA to reconstruct binary status information from the input EM signal.

[0071] c) Applying SSDS-CDMA to encode binary control information that propagates counter to the direction of media signal propagation.

[0072] In practical video interfaces, including those that allow two-way digital audio, the total amount of information to be communicated is dominated by video. Thus, control and status information is communicated at a much lower bit rate compared to the video sample rate. Thus, the spreading codes applied to the control and status bits aim to achieve a much higher process gain compared to the spreading codes applied to the video samples. The higher process gain is achieved by modulating with a longer spreading code, ensuring signal acquisition especially in challenging EM propagation environments. Such a high process gain is particularly important in this context, since the EM propagation environment is made especially challenging by the presence in the EM path of a high bandwidth EM signal that represents the video signal itself.

[0073] This specification discloses, in one aspect, a method and apparatus for implementing a wide range media interface by aggregating P instances of SSDS-CDMA media transport in a single EM path, consisting of a transmitter and receiver pair on the EM path, and adding bidirectional status / control communication. The method and apparatus disclosed herein are suitable for all sampled signals, and are particularly well suited for media communication that supports human perception. Bandwidth-limited analog EM signals are sampled where they are measured at predetermined intervals, and are therefore suitable for communication by the method and apparatus disclosed herein.

[0074] Certain aspects of the methods and apparatus disclosed herein allow for a downstream digital data signal (a "status channel") and an upstream digital data signal (a "control channel") by adding an EM signal to the EM signal created for the input media signal. While media signal communication allows for some error, bit-serial digital signal communication requires a certain percentage of the bits to be accurately reconstructed at the receiver.

[0075] In certain aspects of the present application, the methods and apparatus disclosed herein include a media transport directed to making uncompensated errors in EM signal level measurements at the sink relative to the levels provided at the paired source appear as white noise in the reconstructed output signal, with the goal being to leverage the robust human ability to see and hear content despite the presence of white noise added to the input signal.

[0076] While each bit-serial media transport constrains the type of EM path over which bits can be reliably reconstructed, the media transport applied in the methods and apparatus disclosed herein adapts the output media signal quality to the quality of the EM path at hand. This feature makes the subject matter applicable to upgrading equipment in existing media systems, allowing straightforward reuse of legacy infrastructure.

[0077] Repeated redistribution, encoding, and provisioning methods In one aspect, a method for iteratively distributing samples from one or more input signals to one or more input vectors, each of which is stored in an encoder input memory, encoding each input vector into an ordered sequence of output levels to be provided, and providing each sequence of output levels to a unique EM path comprises a sequence of steps.

[0078] In an aspect, a preliminary step for the method is to select a value for P that is an integer ≧1, and values ​​for N and L, each of which is an integer, such that L≧N≧2. P is the number of EM paths over which the EM signal is transmitted. N is the number of samples per input vector. L is the number of chips per spreading code. A high L means high electrical resilience due to the greater gain of the spreading process, but a higher L requires faster circuits, all other things being equal. A high N means high media signal throughput, but a higher N means lower resilience when L is fixed. In one embodiment for communicating HDMI signals over UTP, P=4, N=63, and L=64. In a further embodiment for communicating HDMI signals over UTP, P=4, N=126, and L=512.

[0079] In an aspect, another preliminary step is to determine a set of time intervals during which the main steps of the method are performed: distribution interval, encoding interval, transport interval, decoding interval, and collection interval. These intervals may be different from each other.

[0080] In an aspect, the pre-determination of the transport interval depends on a trade-off involving, for example, N, L, the energy density limits of the EM path, and the limitations of the implementation technology. That is, for a fixed N and L, a shorter transport interval means, all other things being equal, a higher media signal throughput at the expense of the additional cost of a faster implementation. In an embodiment, the transport interval is 100 nanoseconds, corresponding to 10 million input vectors being transported per second.

[0081] In a preferred embodiment, the distribution interval, the encoding interval, the transport interval, the decoding interval, and the collection interval are of one common duration.

[0082] In one aspect, another preliminary step is to select a set of N codes ("codebook"). A unique code is associated with each index in the encoder input vector. The codes are uniquely indexed sequences of L chips, each of which is different from the other N-1 codes in the set. In a preferred embodiment, each of these chips is a binary value that is +1 or -1, and each code is DC balanced. Each code in the codebook is associated with a unique position in the input vector. The first step in the method applied in each of the P encoders is to modulate the sample at each index in the input vector by a value indexed to correspond to the code associated with that input vector index. In one class of embodiments, the possible chip values ​​are -1 and +1, binary values ​​selected to facilitate DC balanced direct sequence modulation by the code. In another class of embodiments, the number of possible values ​​for each chip is a predetermined integer greater than two, and thus the chip is a digital value whose representation requires multiple bits. In another class of embodiments, there are an infinite number of possible chip values ​​within a given range, and therefore the code is a pulsating (sampled analog) signal.

[0083] In an aspect, the method steps distribute samples from one or more input media signals into P indexed input vectors, each of length N. The distributing step occurs during a pre-determined distribution interval. The distributing step implements a pre-determined distribution permutation that is a one-to-one mapping between indices in the set of input media signal snippets and indices in the P input vectors. The properties of the permutation do not matter, and thus any of the N! possible permutations are equally favorable. In certain embodiments, the input media signal samples are assigned to input vector positions in the P encoder in a straightforward round-robin order.

[0084] In an aspect, a further step of the method is an encoding step that occurs during a predetermined encoding interval in each of the P encoders. The encoding step repeats the modulating sub-step L times, once for each of the L code indices.

[0085] Each modulating sub-step is performed within a predetermined modulation interval. The modulating sub-step includes the following sub-sub-steps:

[0086] i. determining a modulation interval (modulation interval) for this substep;

[0087] ii. modulating each sample in the input vector with a value addressed at the loop index in the corresponding code; and

[0088] iii. summing the results of all modulating sub-steps ii. to form one of an ordered series of output levels;

[0089] The ordered sequence of output levels resulting from sub-sub-step iii represents an EM signal that, taken as a whole, has certain properties conducive to reconstructing an output vector that properly represents the corresponding encoder input vector.

[0090] In an aspect, a further step of the method for each of the EM paths of P is the following providing step: all L values ​​in the ordered series of power levels are provided to the EM path within a predetermined transport interval. The providing step repeats the dispatching substep L times, once for each of the L indices in the ordered series of power levels. Each dispatching substep is performed during a predetermined dispatch interval and comprises the following substeps:

[0091] i. determining a dispatch interval for this substep; and

[0092] ii. Providing an indexed level of the ordered series of output levels to an EM pathway.

[0093] Uniform modulation and dispatch intervals In a range of preferred embodiments, each dispatch interval is equal to the same indexed modulation interval. In a range of preferred embodiments, the dispatch interval and the modulation interval are uniform for all substeps and are therefore equal to the transport interval divided by L. In certain embodiments, the uniform dispatch interval is 100 picoseconds.

[0094] Non-uniform modulation and dispatch intervals Modulation schemes that rely on the temporal characteristics of the emitted EM signal require that each modulation interval be equal to the corresponding dispatch interval. For simplicity, the discussion herein will refer only to modulation intervals.

[0095] In an aspect, additional information can be transmitted over the EM path by varying successive modulation intervals. An ordered series of varied modulation intervals is itself a modulation that adds phase information to the EM signal provided in the media signal SSDS-CDMA modulation.

[0096] An additional practical benefit of varying the subsequent modulation intervals is that it provides additional EMI / RFI (electromagnetic interference / radio frequency interference) spectral energy suppression, thereby increasing the likelihood of EMI compliance. If the sequence of modulation intervals is a PN sequence or a sequence close to a PN, this method produces beneficial phase noise in the EM signal provided to the EM path. Modulating the modulation intervals broadens the individual spikes in the comb pattern formed in the frequency domain representation of the EM signal energy, thereby further increasing the likelihood of EMI compliance.

[0097] There are several ways to predetermine the modulation interval. One method relies on a look-up table. Another method relies on an algorithmic modulation interval determiner circuit such as a PN generator. There are also other methods that achieve this goal.

[0098] In certain embodiments, the modulation interval is 80 picoseconds or 120 picoseconds, with the selection between the two values ​​being made such that the sequence of modulation intervals is close to a PN sequence having an average of 100 picoseconds. Such an embodiment may be considered a "binary modulation interval" embodiment. In one aspect of the embodiment, the predetermined duration of the modulation interval is generated in a linear feedback shift register whose output constitutes the binary PN sequence and controls a delay generation circuit.

[0099] In certain embodiments, the modulation intervals are one of 40 ps, ​​60 ps, ​​80 ps, ​​100 ps, ​​120 ps, ​​140 ps, ​​160 ps, ​​and 180 ps, ​​respectively, with the subsequent value selection being made such that the sequence of modulation intervals is a PN code. Such an embodiment may be considered a "3-bit modulation interval" embodiment. In general, if the number of possible modulation interval durations is 2k, such an embodiment may be considered a "k-bit modulation interval duration" embodiment. In a preferred embodiment, the sequence of modulation intervals is a sequence whose average value is close to PN, which is the coding interval divided by L.

[0100] In certain embodiments, the modulation interval is in a continuous range between 80 picoseconds and 120 picoseconds, and determination of a minimum modulation interval is not possible. An example of such an impossibility occurs in an embodiment in which the modulation interval duration is determined by a stochastic process. In certain embodiments, the noise source is derived from a Johnson-Nyquist noise generator that relies on physical phenomena. Such an embodiment may be considered a "continuous modulation interval duration" embodiment.

[0101] In a further embodiment of the distributing, encoding and providing method, the modulation interval is uniform to facilitate ease of performing the encoding step, while the dispatch interval is varied for the benefits discussed above. In one aspect, this embodiment provides for a pre-determined length of the input media signal snippet to be subsequently provided in the providing step. It remains to be explored how this EM signal representation may itself be further compressed.

[0102] Conversion of digital output signal values ​​to analog EM signal levels A switched-capacitor (analog) implementation of the modulation results in an EM signal level that only needs to be amplified to enter the EM path. A digital implementation of the arithmetic calculation, on the other hand, results in a number that represents the EM signal level. In certain aspects, the method optionally further enables converting the output value from the digital number to an EM signal level as part of the providing step. In either case, the physical result is an EM signal to be transmitted through the EM path.

[0103] Repeated receiving, decoding and collecting method In one aspect, a method for receiving an ordered sequence of input values ​​corresponding to a sequence of output values ​​produced in a corresponding encoding method applied to one or more input media signal snippets from an EM path during a predetermined transport interval, decoding the ordered sequence of input values ​​into an output vector, and distributing the output vector to one or more reconstructed media signal snippets comprises a sequence of steps.

[0104] The first step is to acquire synchronization with the signal coming from the EM path. The literature on SSDS-CDMA systems contains numerous methods and devices for acquiring synchronization.

[0105] The next step is to prepare an output vector that contains a predetermined number N of positions into which the reconstructed samples should be spread.

[0106] The next step is to associate each index in the output vector with a code from a pre-determined code set, where each code is an indexed sequence of values, or "chips." Each code is orthogonal to all of the other N-1 codes in the set. Each code is also L chips long. Furthermore, the code set is the same as the code set applied in the corresponding encoding method. L and N for the decoding method match the corresponding parameter values ​​in the corresponding encoding method.

[0107] The next step is receiving, which occurs during the same transport interval as the paired method for collecting, encoding and providing performs its providing step. The receiving step repeats a measuring inner loop, executed once for each index of L in the ordered sequence of input values, comprising the following substeps:

[0108] i. determining the duration of this measurement interval; and

[0109] ii. Measuring an indexed value out of an ordered sequence of values ​​delivered from an EM path.

[0110] The considerations regarding the transport intervals and measurement intervals are the same as those regarding the transport intervals in the corresponding collecting, encoding and providing method. In a uniform sequence of measurement intervals, the duration of each measurement interval is given by dividing the transport interval by L. The ordered series of input values ​​provided in the receiving step collectively represents the input media signal snippet to be encoded in and reconstructed in the corresponding collecting, encoding and providing method.

[0111] The considerations for non-uniform sequences of measurement intervals, and the construction of those sequences, are the same as for non-uniform sequences of dispatch intervals in the corresponding collection, encoding and provisioning methods.

[0112] The next step is a decoding step. The decoding step is performed during a predetermined decoding interval. In a preferred embodiment, the decoding interval is equal to the transport interval. The decoding step performs L iterations of a decoding loop, one for each of the L indices in the ordered sequence of inputs, each step being performed during a demodulation interval, and each step being composed of several sub-steps:

[0113] i. determining the duration of this demodulation interval;

[0114] ii. demodulating the indexed values ​​in the ordered sequence of inputs with a common indexed value in the code corresponding to the output vector index;

[0115] iii. Sub-step i) Indexing the demodulated results from 1) into the corresponding output vectors. sum with the boxed elements,

[0116] iv. Store the sum result from substep i)2) in the corresponding output vector index and

[0117] v. Tracking synchronization with the transmitted signal

[0118] In the uniform sequence of demodulation intervals, the duration of each demodulation interval is equal to the duration of the transport interval divided by L. In certain embodiments, the uniform demodulation interval is 100 picoseconds.

[0119] In a non-uniform sequence of demodulation intervals, successive demodulation intervals vary between predetermined values. The sequence of demodulation intervals recovers the phase modulated signal generated in a corresponding manner of collecting, encoding and providing. The purpose of this phase modulation of the demodulation intervals is to minimize EFI and RFI in the EM path.

[0120] The considerations for determining and controlling the demodulation interval are the same as those for determining and controlling the modulation interval in the corresponding acquisition, encoding and provisioning method.

[0121] The final step is the distributing step. The distributing step is performed during a pre-determined distribution interval. In a preferred embodiment, the distribution interval is equal to the transport interval. This distributing step implements a pre-determined permutation that is a one-to-one mapping between indices in the output vector and indices in the set of reconstructed media signal snippets. This permutation is the inverse of the permutation applied in the corresponding encoding method. This decoder permutation presents zero or more samples from the output vector for each reconstructed media signal snippet.

[0122] Device for collecting, encoding and providing data In an aspect, an apparatus for collecting sample input vectors from one or more input media signal snippets, encoding the input vectors into an ordered sequence of output values ​​during a predetermined encoding interval, and providing the ordered sequence of output values ​​to an EM path during a predetermined transport interval comprises a collection of elements.

[0123] One of those elements is a memory for receiving and storing all of the samples in an input vector of a predetermined length N. The predetermination of N involves a trade-off: a larger N, all other things being equal, results in a larger throughput at the expense of electrical resilience. In certain embodiments, N=16.

[0124] Another element is the permuter. The permuter assigns input media signal snippet samples to input vector positions. The permuter implements a pre-determined permutation, also called a "one-to-one mapping." There are N! possible such permutations. In a preferred embodiment, the permutation is selected for convenience.

[0125] Another element is a controller for repeating the following steps for all N indices of the input vector during a predetermined collection interval.

[0126] Configuring the permuter to store subsequent input media signal snippet samples at the indexed input vector locations.

[0127] Another element is a set of N code generators for generating a predetermined set of codes. There is one code generator for each input vector index. Each code in the code set is a value-indexed sequence, or "chip." The codes are all of a common predetermined length L, so there are L chips in each code. The predetermination of L involves a trade-off: a larger L provides greater electrical resilience at the expense of faster circuit implementation. In certain embodiments, L=1024. Each code is different from every other code in the set.

[0128] Another element is a set of N modulators, one for each input vector index. Equivalently, one for each code in the code set. Each modulator has two inputs: one input is the corresponding input sample, while the other input is the corresponding chip.

[0129] Another element is a single A / -input summing circuit ("summer"). The summer input is driven by one modulator output per input vector index.

[0130] Another element is a controller for repeating a modulating sub-step performed within a predetermined modulation interval, consisting of the following sub-sub-steps, for every index of the set of codes at a rate sufficient to enumerate all indexes of the set of codes within the predetermined encoding interval:

[0131] i. determining the duration of this modulation interval; and

[0132] ii. modulating each element of the input vector with a value stored in a commonly indexed location in a corresponding code using a modulator corresponding to that element; and

[0133] iii. summing all the modulation results of sub-sub-step ii) using an adder to form an indexed output value in the ordered series of output values;

[0134] In a preferred embodiment, the coding interval is equal to the transport interval, and therefore each modulator can be understood as directly modulating its input samples with a corresponding code over the course of one coding interval.

[0135] In the uniform sequence of modulation intervals, the duration of each modulation interval is equal to the duration of the transport interval divided by L. In certain embodiments, the uniform modulation interval is 100 picoseconds.

[0136] In a non-uniform sequence of modulation intervals, successive modulation intervals vary between predetermined values. The sequence of modulation intervals is itself a signal that adds a time dimension (phase modulation) to the direct sequence modulation. This phase modulation of the modulation intervals results in minimizing EFI and RFI.

[0137] In certain embodiments, the modulation interval is 80 picoseconds or 120 picoseconds, with the selection between the two values ​​being made such that the sequence of modulation intervals is close to a PN having an average of 100 picoseconds. Such an embodiment may be considered a "binary chip interval duration" embodiment.

[0138] In certain embodiments, the modulation intervals are each one of 40 ps, ​​60 ps, ​​80 ps, ​​100 ps, ​​120 ps, ​​140 ps, ​​160 ps, ​​and 180 ps, ​​with the subsequent duration selection being made such that the sequence of modulation intervals is a PN code. Such an embodiment may be considered a "3-bit chip interval duration" embodiment. In general, if the number of possible modulation interval durations is 2k, such an embodiment may be considered a "k-bit chip interval duration" embodiment.

[0139] In certain embodiments, the modulation interval is in a continuous range between 80 picoseconds and 120 picoseconds, and determination of a minimum modulation interval is not possible. An example of such an impossibility occurs in an embodiment in which the modulation interval duration is determined by a stochastic process. In certain embodiments, the noise source is derived from a Johnson-Nyquist noise generator that relies on physical phenomena. Such an embodiment may be considered a "continuous chip interval duration" embodiment.

[0140] Another element is an output terminal for providing an ordered sequence of values ​​produced during the coding interval.

[0141] Another element is a provisioning controller for repeating, during the transport interval, for each of the L indices in the ordered sequence of output values, the dispatching sub-steps performed within the dispatch interval, which are the following sub-sub-steps:

[0142] i. determining the duration of this dispatch interval; and

[0143] ii. Providing an indexed value in an ordered sequence of outputs produced during an encoding interval such that the sum of the dispatch intervals does not exceed the transport interval.

[0144] The ordered sequence of outputs provided after L iterations of the above dispatching sub-step collectively represents the input media signal snippet.

[0145] In a uniform sequence of dispatch intervals, the duration of each dispatch substep is equal to the duration of the transport interval divided by L. In certain embodiments, the dispatch interval is 100 picoseconds.

[0146] In a non-uniform sequence of dispatch intervals, successive dispatch intervals are varied to provide, for example, supplemental EMI / RFI (electromagnetic interference / radio frequency interference) spectrum energy suppression and EMI compliance. When the sequence of modulated intervals is a PN sequence, the device produces beneficial phase noise in the physical signal provided to the EM path. The modulated intervals widen the individual spikes in the comb, spreading the energy in the frequency domain and reducing the EMI footprint.

[0147] In certain embodiments, the dispatch interval is 80 picoseconds or 120 picoseconds, with the selection between the two values ​​being made such that the sequence of dispatch intervals is close to a PN sequence having an average of 100 picoseconds. Such an embodiment may be considered a "binary dispatch interval duration" device. In one aspect of the embodiment, the predetermined duration of the dispatch interval is generated in a linear feedback shift register whose output constitutes the binary PN sequence and controls a delay generation circuit.

[0148] In certain embodiments, the dispatch intervals are each one of 40 ps, ​​60 ps, ​​80 ps, ​​100 ps, ​​120 ps, ​​140 ps, ​​160 ps, ​​and 180 ps, ​​with the selection of successive values ​​being made such that the sequence of dispatch intervals is a PN code. Such an embodiment may be considered a "3-bit dispatch interval" device. In general, if the number of possible dispatch interval durations is 2k, such an embodiment may be considered a "k-bit dispatch interval duration" device.

[0149] In certain embodiments, the dispatch interval is in a continuous range between 80 picoseconds and 120 picoseconds, and determination of a minimum dispatch interval is not possible. An example of such an impossibility occurs in an embodiment in which the dispatch interval duration is determined by a stochastic process. In certain embodiments, the noise source is derived from a Johnson-Nyquist noise generator that relies on physical phenomena. Such an embodiment may be considered a "continuous dispatch interval duration" device.

[0150] In certain embodiments, an interval in the non-uniform sequence of dispatch intervals exactly matches an interval at a corresponding index in the non-uniform sequence of coding intervals, In such embodiments, EMI / RFI reduction can be achieved under control of the encoding controller or under control of the providing controller, depending on the convenience of the implementer.

[0151] In a further embodiment of the on-line collecting, encoding and providing apparatus, the modulation interval is uniform to ease the encoding controller implementation, while the dispatch interval is varied rather than uniform to minimize EMI and RFI. In one aspect, this embodiment double buffers a predetermined number of values ​​in the ordered series to be provided between the encoding controller and the providing controller.

[0152] It remains to be explored the range of potential positive and negative interactions that may result from a modulation interval in a non-uniform sequence of modulation intervals differing from a corresponding dispatch interval in a non-uniform sequence of dispatch intervals in a real-time device.

[0153] In a further aspect, the value is transmitted over an EM path.

[0154] In further aspects, the source assembly apparatus varies these parameters under algorithmic control, for example to accommodate changing payload properties, changing EM path propagation characteristics, or changing application requirements.

[0155] In certain embodiments, the device processes the snippets repeatedly indefinitely.

[0156] Receiving, Decoding and Distributing Apparatus In an aspect, an apparatus for receiving an ordered series of input values ​​corresponding to an ordered series of output values ​​generated at a corresponding collecting, encoding and providing apparatus applied to one or more input media signal snippets from an EM path during a predetermined transport interval, decoding the ordered series of input values ​​into an output vector of samples during a predetermined decoding interval, and distributing the output vector as one or more reconstructed media signal snippets during a predetermined distribution interval comprises a collection of elements.

[0157] One of these elements is a memory for reconstructing all the samples and storing them in an output vector of a predetermined length N, which is equal to N of the corresponding encoding device.

[0158] One of those elements is a set of code generators. There are N code generators, one for each output vector index. Each code generator produces a pre-determined code, which is an indexed sequence of values, or "chips." Each code in the code set is of a different pre-determined length L, which is equal to the L of the corresponding encoding device. Each code is different from all other codes in the set. The code set is identical to the code set of the corresponding collect, encode and provide device.

[0159] Another of the elements is a set of N correlators: there is one correlator corresponding to each output vector index, and equivalently, there is one correlator corresponding to each code in the code set. Each correlator has two inputs: one input is the received input value, and the other input is the corresponding chip.

[0160] One of the elements is a set of N summing circuits. There is one summing circuit associated with each output vector index. Each summing circuit has two inputs: one input is the output of the corresponding correlator, and the other input is the contents of the correspondingly indexed output vector position.

[0161] One of these elements is a synchronization acquisition and tracking circuit. The timing acquisition and tracking circuit comprises a clock recovery circuit and a correlation spike detector. The correlation spike detector performs absolute power measurements of the reconstructed media signal samples and feeds the output of the detector into a control circuit that adjusts the PLL settings in the clock recovery circuit.

[0162] One of those elements is a receiving controller for repeating, during a transport interval, a measuring step during a measurement interval for each of L indices in the ordered sequence of input values, the measuring step comprising the following sub-steps:

[0163] determining the duration of the measurement interval of iL such that the measurement interval does not exceed the transport interval; and

[0164] ii. configuring a synchronization acquisition and tracking circuit to infer a reference clock frequency and phase by analyzing a signal coming from the EM path; and

[0165] iii. Measuring indexed values ​​in an ordered sequence of inputs at an input terminal.

[0166] The ordered sequence of inputs received after the L measurement intervals have elapsed represents the input media signal snippet to be reconstructed.

[0167] The considerations regarding the transport intervals and the measurement intervals are the same as those regarding the transport intervals in the corresponding collecting, encoding and providing methods: In a uniform sequence of measurement intervals, the duration of each measurement interval is equal to the duration of the transport interval divided by L.

[0168] The considerations for non-uniform sequences of measurement intervals, and the construction of those sequences, are the same as for non-uniform sequences of dispatch intervals in the corresponding collecting, encoding and providing devices.

[0169] Another of those elements is a demodulation controller for repeating, during a predetermined decoding interval, for each of the L indices in the ordered sequence of input values, a demodulating step during a demodulation interval, which consists of the following substeps:

[0170] determining the duration of this demodulation interval; and

[0171] repeating the following sub-substeps for each of the N indices in the output vector:

[0172] i. configuring an indexed correlator to correlate received input values ​​by a common indexed value in an indexed code to provide a portion of the indexed output sample;

[0173] ii. configuring an indexed summing circuit to sum the output of the indexed correlator with the contents of the indexed output vector location; and

[0174] iii. Configuring a correspondingly indexed location in the output vector memory to receive the output of the summing circuit.

[0175] In the uniform sequence of demodulation intervals, the duration of each demodulation interval is equal to the duration of the transport interval divided by L. In a given embodiment of the apparatus, the uniform demodulation interval is 100 picoseconds.

[0176] In a non-uniform sequence of demodulation intervals, successive demodulation intervals vary between predetermined values. The sequence of demodulation intervals recovers the phase modulated signal generated in the corresponding acquisition, encoding and providing device. The purpose of this phase modulation of the demodulation intervals is to minimize EFI and RFI in the EM path.

[0177] The considerations for determining and controlling the demodulation interval are the same as those for determining and controlling the modulation interval in the corresponding acquiring, encoding and providing device.

[0178] One of those elements is a controller for repeating, during a predetermined distribution interval, for each of the N indices in the output vector, the following steps:

[0179] i. configuring a synchronization acquisition and tracking circuit to infer a reference clock frequency and phase by analyzing a signal coming from an EM path; and

[0180] ii. Receiving indexed values ​​in the ordered sequence of inputs at a rate sufficient to enumerate all sequence indexes within the transport interval.

[0181] The ordered sequence of inputs that has been received after completion of L iterations of the inner loop described above, taken in its entirety, represents the media signal snippet to be reconstructed.

[0182] One of those elements is a distributing controller for repeating the following steps for all N indices of the output vector during a predetermined distributing interval:

[0183] i. Configuring a permuter to provide the position of the indexed output vector as a subsequent reconstructed media signal snippet sample.

[0184] In a further aspect, an ordered sequence of input values ​​is received on the EM path.

[0185] In certain embodiments, the receiving, decoding and distributing devices are applied to successive snippets indefinitely, utilizing iterations to achieve and improve synchronization with the corresponding collecting, encoding and providing devices.

[0186] Apparatus for communicating sampled signals over a single EM path - Patents.com Claimed in another aspect is an apparatus for communicating sampled signals incorporating a collecting, encoding and providing apparatus paired with a corresponding receiving, decoding and distributing apparatus.

[0187] In a further aspect, a sampled signal communication device incorporating a collecting, encoding and providing device configured to convey digital signals is paired with a corresponding receiving, decoding and distributing device configured to convey digital signals.

[0188] In a further aspect, a sampled signal communication device incorporating a collecting, encoding and providing device configured to convey a pulsatile signal is paired with a corresponding receiving, decoding and distributing device configured to convey a digital signal.

[0189] In a further aspect, a sampled signal communication device incorporating a collecting, encoding and providing device configured to convey a digital signal is paired with a corresponding receiving, decoding and distributing device configured to convey a pulsatile signal.

[0190] In a further aspect, a sampled signal communication device incorporating a collecting, encoding and providing device configured to convey a pulsatile signal is paired with a corresponding receiving, decoding and distributing device configured to convey the pulsatile signal.

[0191] Tunneling Claimed in one aspect is a method and apparatus for piggybacking bit-serial control media signals and bit-serial status media signals that require a modest amount of bit accuracy onto the same EM path that carries an EM signal representing a high bandwidth input media signal.

[0192] The media signal bandwidth is an order of magnitude larger than the bandwidth of the control and status information. In fact, video is such a bandwidth hog that in recent years, as video resolution has increased, the relative bandwidth of digital audio signals has shrunk to resemble the relative bandwidth of the control and status information. This is due to the relatively modest bandwidth requirements of the individual audio channels. Other status information includes video framing, such as vsync and hsync. These further signals are "sub-band signals." These further signals are low data rate signals compared to the video signals and / or timing reference waveforms. These further signals are carried in "tunneling," which means applying SSDS-CDMA techniques with very long codes compared to the preferred codebook for media transport. It is crucial that these very long code SSDS-CDMA techniques deliver the complete sequence of control and status bits correctly. The further modulated timing / control signals must be correctly added together with the output of the media transport source assembly before being amplified at the transmitter assembly output. The modulated status signal must be correctly added to the signal at the receiver assembly input so that the media transport sink assembly can correctly measure the ordered series of values ​​coming from the EM path.

[0193] There are at least three possible strategies for tunneling with respect to some of the available EM pathways:

[0194] 1. Superimpose one or more tunneled signals on one or more of the P EM signals generated in the media signal SSDS-CDMA. If the relatively long code modulating the tunneled signal is orthogonal to the codes in the codebook (and all other long codes that also modulate the tunneled signal), then inter-track interference (ITI) should be negligible and mitigable.

[0195] 2. Aggregate all tunneled signals onto their own high speed wired bundle (repurposed from one of HDMI's four TMDS bundles), thus preserving a "full bandwidth" TMDS bundle for each of the three parallel EM signals generated in the media signal SSDS-CDMA. The drawback of this approach is the potential waste of the high bandwidth EM path on low bandwidth control / status bits.

[0196] 3. Repurpose any available unshielded conductor pairs for control and status, i.e. apply spreading using very long codes to overcome the electrical poorness of the unshielded pairs, and aggregate all tunneled signals onto these repurposed pins.

[0197] Transmitter refinements simplify timing recovery In certain embodiments, timing recovery information is injected into the ongoing signal using the scheme depicted in FIG.

[0198] Note that the codes superimposed in FIG. 33 must be orthogonal to all codes in the codebook.

[0199] Note that, optionally, a long PN sequence code superposition scheme can be used to provide other timing information, including hsync and vsync.

[0200] High Speed ​​Timing Recovery Circuit FIG. 34 shows a circuit strategy for a high speed timing recovery circuit.

[0201] Please note that the PN code generated in FIG. 34 must be the same as that referenced in FIG.

[0202] A high speed timing recovery circuit is embedded in the receiver assembly.

[0203] Tunneled Timing Signals In some cases, the group of signals that are tunneled includes these timing signals:

[0204] · Clock: The highest speed timing reference. The rate at which values ​​are driven at the transmitter and received at the receiver. In certain embodiments, the encoder and decoder also operate at the chip clock rate, and recovery of the chip clock frequency and phase is critical to the receiver assembly function.

[0205] · Code Clock (or Bank Clock): The rate at which new groups of samples are processed in the Encoder and Decoder. Chip clock frequency = L times code clock frequency

[0206] hsync (or row clock): the edge that indicates the beginning of the next row of dots in a frame (by "dot" we mean a value associated with a physical location on the image sensor or display).

[0207] ○hsync frequency = N × code clock frequency / number of samples per line

[0208] o Note that hsync is a redundant signal once the video format is known and timing lock has been acquired.

[0209] vsync (or frame clock): the edge that marks the first row of a frame

[0210] * vsync frequency = hsync frequency / number of lines per frame

[0211] Media interface method and apparatus Claimed in another aspect are methods and apparatus for a media interface incorporating the sample serial media transports disclosed herein. In one embodiment, one or more sample serial media transports carry media signals while less bandwidth control and status information is exchanged bit exact through a separate EM path. In a further embodiment, the control and status information is transmitted across the same EM path used for media transport in a process called "tunneling". The control and status information must be delivered bit exact, but the information rate is relatively low. For this reason, the control and status information is suitable for bit serial SSDS-CDMA techniques. Options include a) choosing to use very long codes for this low bandwidth digital payload, and b) choosing to select a codebook to be orthogonal to the codebook governing the modulation / demodulation of the media loads that share the EM path.

[0212] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of technologies and techniques. For example, the data, instructions, commands, information, signals, bits, samples, symbols, and chips referenced throughout the foregoing description may be represented as voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0213] Those skilled in the art will recognize that various exemplary logic blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software or computer instructions, or a combination of both. To clearly illustrate this interchangeability of hardware and software, various exemplary components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the application and design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in various ways for each application, but such implementation decisions should not be interpreted as causing a departure from the scope of the invention.

[0214] The method or algorithm steps described in connection with the embodiments disclosed herein may be directly implemented in hardware, or by a software module executed by a processor, or a combination of the two. In the case of a hardware implementation, the processing may be implemented within one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof. A software module, also known as a computer program, computer code, or instructions, may include some source code or object code segments or instructions, and may reside in any computer readable medium, such as RAM memory, flash memory, ROM memory, EPROM memory, registers, hard disk, removable disk, CD-ROM, DVD-ROM, Blu-ray® disk, or any other form of computer readable medium. In some aspects, the computer readable medium may comprise a non-transitory computer readable medium (e.g., a tangible medium). Furthermore, for other aspects, the computer-readable medium may comprise a transitory computer-readable medium (e.g., a signal). Combinations of the aforementioned media should also be included within the scope of computer-readable media. In another aspect, the computer-readable medium may be integral to the processor. The processor and the computer-readable medium may reside in an ASIC or related device. Software codes may be stored in memory units, and the processor may be configured to execute those codes. The memory unit may be implemented within the processor or external to the processor, and if implemented externally, the memory unit may be communicatively coupled to the processor via various means known in the art.

[0215] Further, it should be appreciated that modules and / or other suitable means for performing the methods and techniques described herein can be downloaded and / or otherwise obtained on a computing device. For example, such a device can be coupled to a server to facilitate the transfer of means for performing the methods described herein. Alternatively, the various methods described herein can be provided via a storage means (e.g., a physical storage medium such as RAM, ROM, a compact disk (CD), or a floppy disk, etc.) such that a computing device can acquire the various methods when the storage means is coupled to or provided to the device. Moreover, any other suitable technique for providing the methods and techniques described herein to a device can be utilized.

[0216] In one aspect, the invention may comprise a media signal communication product for performing the methods or operations presented herein. For example, such a media signal communication product may comprise a camera, a video processor, or a display, any of which may include a stored program computer (or information processor) capable of performing the operations described herein.

[0217] The methods disclosed herein comprise one or more steps or actions for achieving the described method. The method steps and / or actions may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of specific steps and / or actions may be modified without departing from the scope of the claims.

[0218] The term "determining" as used herein encompasses a wide variety of actions. For example, "determining" may include calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, database, or another data structure), ascertaining, etc. "Determining" may also include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory), etc. "Determining" may also include resolving, selecting, choosing, establishing, etc.

[0219] The system may be a computer-implemented system consisting of a display device, a processor, a memory, and an input device. The memory may comprise instructions that cause the processor to perform the methods described herein. The processor, memory, and display device may be included in a standard computing device such as a desktop computer, a portable computing device such as a laptop computer or tablet, or may be included in a customized device or system. The computing device may be a standalone computing device, a programmable device, or a distributed device with several components operatively (or functionally) connected via wired or wireless connections. An embodiment of the computing device comprises a central processing unit (CPU), a memory, a display device, and may include input devices such as a keyboard, a mouse, and the like. The CPU comprises an input / output interface, an arithmetic and logic unit (ALU), and a control unit and program counter element in communication with input and output devices (e.g., input devices and display devices) through the input / output interface. The input / output interface may comprise a network interface and / or a communication module that communicates with an equivalent communication module in another device using a predefined communication protocol (e.g., Bluetooth, Zigbee, IEEE802.15, IEEE802.11, TCP / IP, UDP, etc.). A graphical processing unit (GPU) may also be included. The display device may comprise a flat screen display (e.g., LCD, LED, plasma, touch screen, etc.), a projector, CRT, etc. The computing device may comprise a single CPU (core) or multiple CPUs (multiple cores), or multiple processors. The computing device may use parallel processors, vector processors, or may be a distributed computing device.The memory may comprise RAM and ROM components operatively coupled to the processor and may be provided internally or externally to the device. The memory may be used to store an operating system and further software modules or instructions. The processor may be configured to load and execute the software modules or instructions stored in the memory. [Brief description of the drawings]

[0220] [Figure 1] FIG. 1 illustrates a method for encoding an input vector of samples as an ordered series of output levels that are provided as an EM signal for transmission on an EM path.

[0221] [Diagram 2] FIG. 2 illustrates how the EM signal received from the EM path is decoded as a series of input levels ordered to form an output vector of samples.

[0222] [Diagram 3] FIG. 1 illustrates a media transport system for communicating several input media signals as EM signals transmitted end-to-end over a single EM path to generate a matching number of output media signals.

[0223] [Figure 4] FIG. 13 illustrates an embodiment of a distribution permutation that allocates samples from one or more input signals to locations in an encoder input memory, with the illustrated example being a round-robin allocation from at least three input signals to a single encoder input memory.

[0224] [Diagram 5] FIG. 2 illustrates an exemplary round robin permutation for allocating samples from a 4:4:4 input video signal to locations in an 8-sample input memory.

[0225] [Figure 6]6 further illustrates an iterative aspect of the method of extending the exemplary round robin permutation of FIG. 5 to subsequent iterations that allocate a second 8-sample snippet from the input video signal to the input memory.

[0226] [Figure 7] FIG. 1 illustrates an apparatus for repeatedly distributing samples from an input signal to an N-sample input memory, encoding the input memory contents as an ordered series of L output EM signal levels, and providing the output EM signal levels as an output EM signal for transmission through an EM path.

[0227] [Figure 8] FIG. 1 illustrates an embodiment of a communications modulator.

[0228] [Figure 9] FIG. 1 illustrates an apparatus that repeatedly measures an EM signal as an ordered series of L input levels, decodes the ordered series of input levels into an N sample output memory, and collects the output samples into an output video signal.

[0229] [Figure 10] FIG. 1 illustrates the architecture of one synchronization acquisition and tracking circuit.

[0230] [Figure 11] FIG. 1 illustrates an alternative synchronization acquisition and tracking circuit architecture.

[0231] [Figure 12] FIG. 13 illustrates an embodiment of a collection permutation for allocating samples from a decoder output memory to one or more output signals, the illustrated example being a round-robin allocation for at least three output signals from a single decoder output memory.

[0232] [Figure 13]FIG. 13 illustrates an exemplary round robin acquisition permutation allocation of samples from an 8-sample output memory to a 4:4:4 output video signal.

[0233] [Figure 14] 14 further illustrates an iterative aspect of the method of extending the exemplary round robin permutation of FIG. 13 to subsequent iterations, which assigns a second 8-sample snippet from the output memory to the output video signal.

[0234] [Figure 15] FIG. 2 illustrates the schema of one binary codebook that is a subset of the identity matrix.

[0235] [Figure 16] FIG. 2 illustrates an example of a 127×127 binary codebook in which each code is a unique rotation of a common PN sequence.

[0236] [Figure 17] FIG. 2 illustrates an example of a 128×128 binary codebook that is a Walsh-Hadamard matrix.

[0237] [Figure 18] FIG. 2 illustrates an example of a 128×128 binary codebook constructed by element-wise multiplying each row of a Walsh-Hadamard matrix with a common PN-approximating sequence.

[0238] [Figure 19] FIG. 2 illustrates the interconnections between components of a media signal collection, processing, and presentation system.

[0239] [Figure 20] FIG. 13 is a diagram showing an example of an EM signal arriving from an EM path at a receiver terminal.

[0240] [Figure 21]1 is a flow chart illustrating an iterative distributing, encoding and providing method, suggesting the variety of ways in which various steps can be decoupled for practical benefit.

[0241] [Figure 22] 1 is a flow chart also illustrating an iterative receiving, decoding and collecting method.

[0242] [Figure 23] FIG. 1 shows an example comparing uniform and non-uniform modulation / demodulation intervals.

[0243] [Figure 24] FIG. 13 illustrates an example of comparing a binary chip value greater than binary with consecutive chip values.

[0244] [Diagram 25] A diagram showing an example of a test pattern reconstructed in a media transport embodiment of the method and apparatus disclosed herein, in which an EM signal is transmitted through a simulated low-quality EM path (36 dB electrical SNR).

[0245] [Figure 26] This is an unused diagram.

[0246] [Figure 27] FIG. 4 illustrates a single EM path media interface implemented with the media transport system of FIG. 3 with further adaptations to enable bidirectional exchange of control and status information.

[0247] [Figure 28] FIG. 13 illustrates three sets of alternative logical assignments for a 19-pin HDMI connector pins, two of which are suitable for EM signaling according to the methods and apparatus disclosed herein, where P≧4.

[0248] [Figure 29] FIG. 27 illustrates a source HDMI-to-hyPHY transcoder assembly that receives video signals over an HDMI interface and exchanges control and status information, and exchanges EM signals representing the video signals over a hyPHY-HDMI-AA interface (defined in FIG. 28) and forwards control and status information.

[0249] [Diagram 30] FIG. 1 illustrates a sink HDMI-to-hyPHY transcoder assembly that exchanges EM signals over a hyPHY-HDMI-AA interface and transmits a reconstructed video signal over an HDMI interface, as well as exchanging control and status information.

[0250] [Diagram 31] A diagram showing two alternative sets of logical pin assignments for an 8P8C UTP connector suitable for EM signaling in accordance with the methods and apparatus disclosed herein, where P=4.

[0251] [Diagram 32] FIG. 31 illustrates a source HDMI-to-hyPHY transcoder assembly that receives video signals over an HDMI interface and exchanges control and status information, and exchanges EM signals representing the video signals over a hyPHY-UTP-A32 interface (defined in FIG. 31 ) and forwards control and status information.

[0252] [Diagram 33] FIG. 1 illustrates a sink hyPHY-to-HDMI transcoder assembly that exchanges EM signals over a hyPHY-UTP-A32 interface and transmits a reconstructed video signal over an HDMI interface, as well as exchanging control and status information.

[0253] [Diagram 34]A diagram showing a source assembly subcircuit that adds an EM signal containing timing recovery information to an EM signal representing an input media signal snippet, the added EM signal facilitating synchronization acquisition and tracking in a paired sink assembly.

[0254] [Diagram 35] FIG. 13 illustrates a sink assembly subcircuit that heuristically seeks phase and frequency lock with an incoming EM signal that contains timing recovery information.

[0255] [Diagram 36] 1 illustrates an embodiment of a source assembly that connects an HDMI sink, including an uphill variant and an uphill PHY, to a hyPHY-UTP-S source.

[0256] [Figure 37] 13 illustrates an embodiment of a source assembly uphill variant.

[0257] [Figure 38] FIG. 1 illustrates an embodiment of an implementation of a source assembly uphill PHY.

[0258] [Figure 39] FIG. 1 illustrates an embodiment of a sink assembly for connecting a hyPHY-UTP-S sink to an HDMI source.

[0259] [Diagram 40] FIG. 1 illustrates an embodiment of a sink assembly downhill PHY.

[0260] [Diagram 41] 13A-13D show an embodiment of an implementation of the sink assembly downhill variant.

[0261] Glossary Terminology associated with spread spectrum transmission systems as generally understood is defined and explained in detail in "Spread Spectrum Systems with Commercial Applications" by Robert C. Dixon, Vol. 3, Wiley & Sons, 1994.

[0262] EM Signal A physical quantity that can be measured along an EM path.

[0263] Visual Perception A person's subjective awareness, comprehension, or understanding of EM signals whose wavelengths are in the visible spectrum.

[0264] Media Signal A sampled signal that is intended for human perception via some output device.

[0265] Media Signal Snippet A finite, ordered, contiguous series of samples from a media signal.

[0266] Media Transport - A method or apparatus for communicating one or more media signals over a single EM path

[0267] Sink A media sink device that is on the downhill side of one or more EM paths in terms of the direction of media communication. Iteratively reconstructs output media signal snippets from input EM signals.

[0268] Source A media source device that is on the uphill side of one or more EM paths in terms of the direction of media communication. It repeatedly encodes input media signal snippets as output EM signals.

[0269] Media Interface A standard for source and sink devices to communicate media signals as EM signals, implemented with one or more instances of media transport, plus provisions for bidirectional communication of control and status information. The Media Interface also specifies requirements for the mechanical, electrical and logical characteristics of the connectors that connect source and sink devices to the EM path, as well as requirements for the EM path itself.

[0270] Tunneling - A technique for transmitting small amounts of bit-accurate digital signals over the same EM paths used in media transport via SSDS-CDMA modulation using very long codes orthogonal to the preferred media transport codebook.

[0271] Color space An abstract mathematical model that describes a color gamut as a tuple of numbers, usually three or four components (e.g., RGB, YUV, YCbCr, and CMYK).

[0272] Color value Signal amplitude corresponding to a basis vector in color space

[0273] Dot A geometric location in a 2D focal or display area that is completely described as a single color value. (This definition repurposes single-layer photodiodes and photoemitters to match the current state of the art in image sensors and displays.)

[0274] Pixel A mathematical object associated with a geometric location in a 2D domain, such as an image frame. A pixel is fully described as a set of color values, and even more fully described as a vector in color space.

[0275] Image 2D array of color values

[0276] Video A sequence of images displayed at a predetermined frame rate that creates the perception of motion and continuity in the viewer.

[0277] "Analog" EM Signals

[0278] Any measurable electromagnetic energy. A physical quantity that varies continuously with time, and the number of different amplitudes available is limited by our ability to measure the energy. Examples of analog representations of signals include:

[0279] Image Sensor: Voltage (At each "pixel" in the sensor, a capacitor is precharged to a known voltage, and the capacitor is conditionally discharged through a photodiode during a pre-determined exposure interval. The brighter the portion of the focal zone, the more photons that pass through the photodiode, and the higher the current in the photodiode, the lower the voltage on the capacitor after the exposure interval.)

[0280] LED / LCD Display: Current (The brightness of each "pixel" (the smallest controllable part) in a display is determined by the control current at any given time.)

[0281] "Digital" Representation of a Signal

[0282] A number that changes at predetermined intervals. Examples of digital representations of signals include:

[0283] PC:R entry, G entry, or B entry in TIF file

[0284] Serial Digital Interface: An ordered series of bits in a predetermined format

[0285] P is the number of EM paths connecting the source to the sink.

[0286] N is the number of elements in the encoder input vector and the corresponding decoder output vector.

[0287] L is the typical number of chips in each code, or equivalently, the number of chip intervals applied during each encoding or decoding interval. N can be any number. The larger L is compared to N, the more electrical resilience is imparted to the transmitted information signal.

[0288] Input Vector A finite, ordered sequence of samples collected from an input media signal snippet. The input vector comprises N values.

[0289] Output Vector A finite, ordered sequence of collected samples that are distributed into a reconstructed media signal snippet. The output vector comprises N values.

[0290] EM Path The physical electromagnetic (EM) propagation path through which electromagnetic energy is transmitted from terminal to terminal and the environment along that path. All EM paths are imperfect media since the EM signal level measured at a receiver terminal is never exactly equal to the EM signal level provided at the corresponding transmitter terminal.

[0291] Waveguide An EM path that physically restricts and confines an EM signal propagation vector.

[0292] Chip One value in the sequence of values ​​that make up a code; a value from a limited, but not necessarily finite, predetermined set of possible values.

[0293] Code A predetermined sequence of chips. In this disclosure, L is a variable that represents the length of the code in chips. In certain aspects, the statistical / frequency characteristics of the code are critical to the media signal transport embodiments disclosed herein.

[0294] Binary Codebook A codebook in which chips are binary and can take one of two values.

[0295] PN sequence A code whose output exhibits spectral characteristics similar to that of white noise. "PN" stands for "pseudo-noise". The signal energy of an ideal PN sequence is uniform across the transmission spectrum, and therefore the Fourier transform of such a sequence has equal energy at all frequencies and looks like a fine-toothed comb. (Note: not all codes are PN sequences.)

[0296] Spreading Characteristics of individual codes and the effect of modulating a signal with a PN sequence A signal modulated with an ideal PN sequence exhibits spectral characteristics similar to those of white noise.

[0297] Spreading Code PN Sequence (Note: Not all PN sequences are ideally "spread")

[0298] Diffusion ratio =L = the number of successive chips that modulate each input sample = the number of successive chips to demodulate the ordered sequence of received values ​​to decode the output vector = Diffusion coefficient (Dixon uses the terms "diffusion ratio" and "diffusion coefficient" interchangeably) = SSDS process gain = code length = chip sequence length = the number of encoder chips that modulate each sample in the input vector = the number of decoder chip correlations that contribute to each sample in the output vector

[0299] Orthogonality A property of a set of codes (a "codebook"). A codebook is considered orthogonal if all of the N codes in the codebook are pairwise unrelated and independent sequences. (An orthogonal codebook minimizes inter-track interference among the N tracks.)

[0300] Walsh-Hadamard Code Set A set of PN sequences where each code constitutes an orthogonal basis vector for the L-dimensional space of codes. For any two codes in the set, the cross product is 0, representing zero cross-correlation. For any code in the set, the autoproduct is 1, representing 100% autocorrelation.

[0301] Distribution Interval The period allocated to initializing the input vector with N samples collected from the input media signal.

[0302] Coding Interval The period allocated to modulating one set of N input vector samples with L chips per symbol.

[0303] Modulation Interval The period allocated to modulate one input vector sample with chips in the code associated with that vector. In a uniform sequence of modulation intervals, each modulation interval = coding interval / L. The modulation intervals do not have to be uniform. The sum of the modulation intervals must not exceed the coding interval duration.

[0304] Transport Interval: A period allocated to simultaneously providing EM signals corresponding to one set of input vector content and receiving EM signals corresponding to one set of output vector content.

[0305] Dispatch Interval The period allocated to providing an EM path with one of an ordered series of levels corresponding to one set of input vector contents. Dispatch intervals do not have to be uniform. The sum of the dispatch intervals must not exceed the transport interval duration. In certain embodiments, the dispatch intervals are varied to mitigate possible EMI / RFI issues.

[0306] Measurement Interval The period allocated to receiving one of an ordered sequence of levels from the EM path. Measurement intervals may not be uniform. The sum of the measurement intervals may not exceed the transport interval duration. In a preferred embodiment, each measurement interval is equal to the dispatch interval in a paired apparatus or method for providing.

[0307] Decoding Interval The period allocated to demodulating one ordered sequence of values ​​received from the EM path with L chips per code set to reconstruct N output vector samples.

[0308] Demodulation Interval The period allocated to demodulating one received value with the chips in the code associated with that value. In a uniform sequence of demodulation intervals, each demodulation interval = decoding interval / L. The demodulation intervals do not have to be uniform. The sum of the demodulation intervals must not exceed the decoding interval duration.

[0309] Collection Interval The period allocated to allocate N output vector samples to the output media signal. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0310] The provided embodiments disclose how certain methods and apparatus may be used and employed in a range of environments.

[0311] In certain aspects, embodiments include methods and apparatus for communicating video signals, along with bidirectional control and status information, as specified at the associated video interface, over a predetermined number P of EM paths by repeating the following three sequences of steps an indefinite number of times:

[0312] In certain embodiments, one independent sequence of repeated steps includes the following steps:

[0313] Distributing P*N samples from the input video signal during a predetermined distribution interval to form an N-element input vector in each of the P encoders, one associated with each EM path;

[0314] In each of the P encoders, encoding an input vector into an ordered sequence of L levels during a predetermined encoding interval;

[0315] transmitting each ordered set of levels of L as an EM signal over an associated EM path during a predetermined transport interval, the following substeps being performed once for each level:

[0316] Dispatching the levels to the transmitting terminal during a predetermined dispatch interval;

[0317] Propagating a level through the associated EM pathway (multiple levels may be propagating at one time); and

[0318] Measuring the levels at the receiving terminal during a pre-determined measurement interval,

[0319] decoding, in each of the P decoders, one associated with each EM path, the received ordered sequence of L levels during a predetermined decoding interval to form an N-sample output vector; and

[0320] Collecting P*N output vector samples as an output video signal during a predetermined collection interval.

[0321] In certain embodiments, another independent sequence of repeated steps includes the following steps:

[0322] Assigning one or more of the following status bits to one of the EM paths of P:

[0323] Encoding the status bits using any one of many known SSDS-CDMA techniques for communicating binary signals, ensuring that the codes used are orthogonal to all codes in the media transport codebook and to codes used for control communications;

[0324] summing an EM signal level resulting from the status bits SSDS-CDMA modulation and an EM signal level resulting from the media signal SSDS-CDMA modulation to generate an output EM signal;

[0325] applying an ordered series of EM signal levels to a transmitter terminal;

[0326] transmitting the output EM signal via an assigned EM path;

[0327] measuring a sequence of EM signal levels at a receiver terminal;

[0328] Correlating the received EM signals with the same code to reconstruct the status bits;

[0329] interpreting some of the status bits to adjust the sync synchronization while collecting other status bits as down-cable protocol signals according to the media interface;

[0330] In one aspect, another independent sequence of repeated steps includes the following steps:

[0331] assigning one or more of the following control bits to one of the EM paths of P;

[0332] Encoding the control bits using any one of many known SSDS-CDMA techniques for communicating binary signals, ensuring that the codes used are orthogonal to all codes in the media transport codebook and to codes used for status communication;

[0333] applying the sequence of ordered EM signal levels generated by the control bits SSDS-CDMA modulation to a receiver terminal to generate an output EM signal;

[0334] · conveying the output EM signal through the assigned EM path in a direction opposite to the direction of media signal transmission;

[0335] measuring a sequence of EM signal levels at the transmitter terminal;

[0336] Correlating the measured EM signals with the same sign to reconstruct the control bits;

[0337] Collecting control bits as upcable protocol signals according to the media interface.

[0338] An embodiment of the encoding process 506 is shown in Figure 1. The encoding process consists of a predetermined number L of iterations of an arithmetic calculation shown repeated in each of the L columns in Figure 1. The set of inputs to the encoding process is an input vector 350 containing a predetermined number N of media signal samples 300. The arithmetic calculation consists of N modulator 308 operations, all of the results of which are summed in a summer 310. Each iteration of the arithmetic calculation produces an indexed EM signal level Yj 112 in the ordered series of output levels 110 for presentation.

[0339] The encoding process 506 repeats the modulating step once for each of the L modulation intervals 13, or equivalently, once for each common index in the code 304 of the predetermined codebook 354 of the indexed chip 104. The sub-steps of the modulating step include, but are not limited to, the following sub-steps:

[0340] i) modulating each input sample 300 during a first portion of the modulation interval 13 with a commonly indexed chip 104 in a code 304 that corresponds to the index of the input sample in the input vector 350. 308. The sum of the L modulation intervals must not exceed the pre-determined coding interval 12. In certain embodiments, the modulation interval is not uniform. If the input signal is pulsating, the samples are continuous values ​​and the modulation embodiment is analog multiplication. If the code is binary (1 / -1), the samples are levels and the analog modulation embodiment is conditional inversion. If the input signal is digital, the samples are numbers and the modulation embodiment is a digital multiplier. If the code is binary (1 / -1) and the input signal is digital, the digital multiplier embodiment is conditional negation.

[0341] ii) Summing 310 the N modulation results 114 from step i) to form one of the ordered series 110 output values ​​Yj 112 for providing during the remaining modulation interval 13. If the input signal is pulsating, the modulation result is a continuous value and the sum is a summing circuit. If the input signal is digital, the modulation result is a numeric value and the sum is a summer.

[0342] By following the disclosed steps to generate one value for each code 304 index during each modulation interval 112, during a coding interval 12, the ordered series 110 of values ​​Yj 112 represents the input vector 350. This process is accomplished for each coding interval such that the coding process 506 can be repeated indefinitely for successive input vectors.

[0343] In a preferred embodiment of the encoding process 506 of FIG. 1, the codebook 354 is a set of N mutually orthogonal / .-chip 104 codes 304, each of which is a spreading code. The L index of the code corresponds to the L chip intervals τ allocated during the encoding interval. The ratio L / N is the "SSDS process gain" defined in Dixon, p. 6. This ratio captures the tradeoff: the electrical resilience imparted to each sample in the input vector increases with the ratio between L and N. The available implementation technology imposes an upper limit on L. The larger N is, the larger the bandwidth of the input media signal that can be accommodated. Thus, designers are incentivized to make N very large. However, a fixed L means that increasing N reduces the electrical resilience imparted to each sample in the input vector. In a preferred embodiment, L≧N.

[0344] The encoding process 506 of FIG. 1 repeats the following steps during each modulation interval 13, and even more so for each common index in the set code 354:

[0345] i) using a modulator 308 to modulate each input sample 300 with a commonly indexed chip 104 whose code 304 corresponds to the index of the input sample in the input vector 350; if the input signal is pulsating, the input samples are continuous values ​​and the embodiment of the modulation is analog multiplication; if the code is binary (1 / -1), the input samples are levels and the embodiment of the analog multiplication is conditional inversion; if the input media signal is digital, the input samples are numbers and the embodiment of the modulation is digital multiplication; if the media signal is digital and the code is binary (1 / -1), the embodiment of the digital multiplication is conditional negation, and

[0346] ii) summing 310 the modulation results 114 from step i) to form one of the ordered series 110 of output values ​​112 for providing;

[0347] Here, the ordered series 110 of values ​​X j 112 , one value for each code 304 index, collectively represents the input vector 350 .

[0348] The sum of the modulation intervals 13 must not exceed the coding interval 12. The sequence of modulation intervals does not have to be uniform. In certain embodiments, the sequence of modulation intervals is uniform and each modulation interval=coding interval divided by L.

[0349] The only signal that appears entirely within the encoding process 506 in FIG. 1 is that which begins with the input vector 350 and the codebook 354 and changes during the process of generating the ordered sequence 110 of values ​​Xj 112.

[0350] 2 shows a decoding process 507 that is part of a receiving, decoding and collecting method and apparatus for reconstructing output samples from L levels 214 of an ordered series 216 generated in a corresponding distributing, encoding and providing apparatus or method and transmitted over an EM path. The decoding process results in an N-element output vector 352 of output samples 302 that are collected to output a signal in the collecting method or apparatus. The complete set of N output samples is reconstructed once per decoding interval. The decoding process repeats the demodulating step L times, each time during its own predetermined demodulation interval 214, to reconstruct the output vector 352.

[0351] The demodulation intervals 15 do not have to be uniform. In certain embodiments, the sequence of demodulation intervals is uniform and each is equal to the decoding interval 14 divided by L.

[0352] 2 relies on a codebook 356. The codebook is a set of N mutually orthogonal / .-chip 206 codes 202, each of which must be a spreading code. The L indices of the codes correspond to the L chip intervals τ assigned to receive the output vector 352.

[0353] At the beginning of the decoding process 507 (before Y0 is processed), the output vector samples 302 are each initialized to zero.

[0354] During each demodulation interval 15, the received values ​​214 are correlated at chips 206 that are indexed such that the index in the codebook 356 corresponds to the code 202 that corresponds to the index of the output value 302 in the output vector 352. 334. If the media signal is pulsating, the samples are continuous values ​​and the correlating embodiment is analog multiplication. If the code is binary (1 / -1), the analog multiplication embodiment is conditional inversion. If the media signal is digital, the samples are numeric and the correlating embodiment is digital multiplication. If the media signal is digital and the code is binary (1 / -1), the digital multiplication embodiment is conditional negation.

[0355] All L correlation results 204 at each input vector 350 index generated during each demodulation interval 15 are progressively added over the course of a decoding interval 14 to yield a respective output sample 302. 302.

[0356] The output vector 352 contains the reconstructed media signal samples 302 after L demodulation intervals 15 collected to output media signal samples 344 .

[0357] The only signal that appears entirely within the decoder process 507 in Figure 2 changes during the decoding process of the output vector 352. The codebook 356 remains unchanged.

[0358] Reference is now made to FIG. 3, where element 3 represents a media transport, i.e., a system for communicating one or more media signals across a single EM path. The system includes a source assembly 326 connected to a sink assembly 328 over an EM path 314. As described elsewhere, the twisted pair representation of the EM path shown in FIG. 3 is only one of various physical embodiments to which the methods and apparatus disclosed herein may be applied. The source assembly receives an input media signal 500 and provides an EM signal at a transmit terminal 338. The EM signal propagates through the EM path. In certain embodiments, the EM path is a waveguide that allows the maximum amount of energy to be transmitted. The sink assembly receives the EM signal as a series of input levels at a receive terminal 340 and collects reconstructed samples to output a media signal 502.

[0359] The source assembly encoder 358 consumes an input vector 350 of input samples 504 and generates an ordered series of levels as an EM signal provided at the terminal 338. The sink assembly measures the EM signal at the receiving terminal and generates an output vector 352 of reconstructed samples 344, each approximating the input media signal sample corresponding to that sample, such that after multiple iterations of the process, an output media signal is generated that represents the corresponding input media signal. In a preferred embodiment, the encoding interval, providing interval, receiving interval, and decoding interval are common, operating together in a high speed operating region 510.

[0360] An encoder input vector 350 is collected from successive samples 504 from each of one or more input media signals 500 during a distribution interval 100 by a distribution permutation (an arbitrary, pre-determined, bijective distribution mapping function) 346. A corresponding output media signal 502 is collected from a decoder output vector 352 during a collection interval 102 with a collection permutation (a bijective collection mapping function 348. In a preferred embodiment, the collection permutation is the inverse of the corresponding distribution permutation.

[0361] The source assembly 326 converts the encoder input vector 350 into a sequence of levels that are dispatched to the EM path 314 and measured at the sink assembly 328. The EM path connects the source assembly output transmit terminal 338 to the sink assembly input receive terminal 340. An impedance 316 terminates the EM path at the receive terminal. The sink assembly measures the propagated signal at the receive terminal and decodes the sequence of received levels into a decoder output vector 352.

[0362] The video transport 3 shown in Figure 3 is capable of injecting a relatively large amount of mains supply energy into the EM path 314. In certain embodiments, the EM path is a waveguide.

[0363] Without loss of generality, the media transport 3 is described as communicating sampled input media signals from a source assembly 326 to a sink assembly 328, but it will be apparent to one skilled in the art that the information may flow in the opposite direction on the EM path 314, implementing a secondary decoder in parallel with the primary encoder 326 and attached to the transmission medium at 338, which receives information from a secondary encoder block in parallel with the primary decoder 328 and drives a line at 340 to achieve bidirectional communication. The payload in either direction is any kind of sampled signal, digital or pulsating. The main difference between a primary encoder / decoder versus a secondary encoder / decoder is the difference in the amount of information communicated. The lesser amount, and therefore secondary, information flow is for example command and control signals, or audio signals carrying microphone measurements or driving speaker deviations or connecting similar devices. This capability is known as upstream communication. The amount of information in upstream communication is an order of magnitude smaller than the amount of information in the media signal. Information in the form of digital or pulsating signals can flow in the reverse direction using a distinct code sequence for the upstream communication, such distinct code sequence being orthogonal to the primary code sequence.

[0364] 4 illustrates one of the N! possible permutations of the distribution permuter 346 between the input media signal 500 samples 504 and the distribution permutation input buffer 351 locations 301. This scheme allows for any number of input media signals in the list implied by the ellipsis between β and ω on the left side of the drawing, and for each input media signal to contribute any number of samples from its snippet of signals to the input vector during each distribution interval 100.

[0365] 4 illustrates a straightforward round robin permutation performed within the distribution permuter 346, in which the next sample 504 from each input media signal snippet 500, shown in this embodiment as consisting of media signal snippets α, β, ..., ω, is assigned in sequence to the next available index in the distribution permuter input buffer 351 until all N distribution permuter input buffer positions 301 are filled. The numbered circles indicate the order in which input media signal snippet samples are selected in this embodiment for inclusion in the encoder input vector. Exactly N samples are collected during the distribution interval.

[0366] Although there are N! equally good choices for the permutation performed in the distribution permuter 346, the collection permuter 348 (FIGS. 12, 13, and 14) performs the inverse of the permutation performed in the corresponding distribution permuter. Ensuring agreement on such details is the subject of a media interface standard for future implementation.

[0367] The schema shown in Figure 4 applies to many possible types of sampled signals. For example, there can be a single media signal consisting of a representation of a video where each successive sample is a color value (e.g., three per pixel (R / G / B)). Another example is also a single media signal consisting of color values ​​from several independent video signals interleaved. Further examples include media signals of various types, e.g., video signals, audio signals, chemical signals, mechanical / tactile signals, etc. One such hybrid example embodiment includes various numbers of samples from / for each media signal during each transport interval. Further examples include each of the four types of signals (digital, analog, pulsating, and neutral) alone or jointly.

[0368] The schema of Figure 4 emphasizes that the input vector 350 contents are selected in a pre-determined sequence from a set of input media signal snippets. This means that the scheme is completely general, since any sequence of samples is itself a sampled signal. From a media transport point of view, it does not matter where the input media signal samples are collected from or where the media signal samples are distributed.

[0369] The permuter 346 in FIG. 4 can be implemented in many ways, one embodiment is to read the output 378 from a port, another alternative is to read the output from a memory that is initialized to contain the input samples 504 in a sequence.

[0370] Figure 5 illustrates a particularly common special case of the distribution permutation described in Figure 4. In this example, three input signals 500 represent the three R, G, and B color planes of a 4:4:4 video signal, respectively. The number N of elements in the encoder input vector 350 evenly equals 8 in this example. This example shows a round-robin allocation during one distribution interval.

[0371]

[0043] Further to the example beginning with FIG. 5 and consistent with repeatedly communicating media signal snippets, FIG. 6 illustrates a round robin allocation during transmission of the second distribution interval.

[0372] 7, the source assembly 326 receives input media signal samples 504 from one or more input media signals 500. The distribution permuter 346 initializes an input vector 350 via a distribution permuter input buffer 351. An encoder 358 generates an ordered sequence of levels that are provided as an EM signal at a line driver 312 in a transmit terminal 338 connected to an EM path 314. As described elsewhere, the twisted pair representation of the EM path shown in FIG. 7 is only one of various physical embodiments to which the methods and apparatus disclosed herein may be applied. The source assembly includes a distribution permuter buffer memory 351 for receiving and storing permuted input samples, an input sample memory 350 for receiving a set of samples in parallel and providing samples for encoding during a pre-determined encoding interval, and a codebook memory 354 for receiving and storing a pre-determined set of codes. One code 304 in the codebook memory is associated with each input sample 300 in the input vector.

[0373] The embodiment of the source assembly 326 data path shown in Figure 7 includes multiple modulators 308, one per input sample 300, that are repeatedly reused once per modulation interval. During each modulation interval, each modulator is applied to a commonly indexed chip 306 in a corresponding code to modulate a corresponding input sample, and a summing circuit 310 sums all the modulator outputs 508 to generate the next level that is provided to the EM path 314 at the line driver 312 via output terminal 338. In certain embodiments, the EM path is a waveguide that allows the maximum amount of energy to be transmitted.

[0374] If the input media signal 500 is pulsating, the input samples 301 are continuous values ​​and the embodiment of the modulator 308 is an analog multiplier. If the code 330 is binary (1 / -1) in this case, the embodiment of the analog modulator is a conditional inversion. If the media signal is digital, the samples are numeric and the embodiment of the modulator is a digital multiplier. If the code is binary (1 / -1) in this case, the embodiment of the digital modulator is a conditional negation.

[0375] An application media signal 500 of duration longer than a single collection interval 100 is encoded over the course of several collection intervals, and thus a corresponding number of encoding intervals 12, and a corresponding number of transport intervals 2. In a preferred embodiment, the parameters defining the source assembly 326, including the collection interval, encoding interval, transport interval, N8, L10, codebook 354, and distribution permuter 346 permutation, all remain constant throughout the steps involved in processing one set of input media signal samples 504 corresponding to a single set of input vector 350 contents, to facilitate timing acquisition and tracking at the paired receiver assembly.

[0376] In one embodiment of the source assembly, all encoding parameters are "hard coded" and cannot be changed. Because the encoding of one input vector is logically independent of the encoding of all preceding and subsequent input vectors, the encoding parameters may change value for each input vector of media signal samples. Thus, in a further embodiment of the source assembly, any of the encoding parameters may be varied from collection interval to collection interval under algorithmic control, for example, in response to changes in media signal characteristics, EM path 314 characteristics, and / or application requirements.

[0377] For digital implementations of the encoder modulator 308 where the encoder chip 306 happens to be constrained to binary (e.g., 1s and 0s), one embodiment of the modulator includes combinational circuitry that inverts the signed integer representation of each input sample 342. A corresponding embodiment of the line driver 312 performs the digital-to-analog conversion.

[0378] For analog implementations of the encoder modulator 308 where the encoder chip 306 happens to be constrained to binary (eg, 1 and -1), one modulator embodiment comprises a commutation modulator such as the example shown in FIG.

[0379] 8 applies a chip input 104 to a corresponding input sample 342 to generate a modulated output signal 508. This type of modulator, known as a commutation modulator, inverts the input sample 342 based on the polarity of the chip input 104. Coupled inductors 606, 608 apply a galvanically isolated copy of the input sample 342 across commutation diodes 612, 610 to a center tap connected to signal 602, with each of the diodes 612, 610 transmitting in turn based on the polarity of the bias applied at signal 626. The chip input 104 applies a differential signal via signal 628 to the center tap of the inductor 608 and to one of the terminals of the inductor 608. In one of the two differential polarities of the chip input 104, current will flow, by Kirchhoff's circuit laws, through inductor 622 to signal 626, then through forward biased diode 612 into inductor 608, out the center tap of inductor 608 to signal 602, and complete the current loop through inductor 616. On the opposite polarity of 4, current flows through inductor 616 to signal 602, resulting in the center tap of inductor 608. The signal exits inductor 608, flows through forward biased diode 610 to signal 626, and then the current returns through inductor 622, again completing the current loop by Kirchhoff's circuit laws. Note that the circuit direction in these two cases flows in opposite directions. Capacitors 618 and 620 are DC removal capacitors that ensure that the direction of current flow in signal 628 is properly converted to positive or negative polarity and biases inductor 608 accordingly. Input sample 342 is coupled to the bias signal flow as previously described. This combined signal then flows out of coupled inductor 608, through one of two established paths originating from center tap 602, and out one or the other of the terminals of inductor 608, thereby establishing positive and negative signal representations through the polarity of the bias signal applied at 626. Capacitor 614 is a DC blocking capacitor that removes DC components from modulated output signal 508.

[0380] 9, a single EM path sink assembly 328 receives a signal from the EM path 314 at an input terminal 340 of the assembly 328. As explained elsewhere, the twisted pair representation of the EM path shown in FIG. 9 is only one of various physical embodiments to which the methods and apparatus disclosed herein may be applied. In certain embodiments, the EM path is a waveguide that allows the maximum amount of energy to be transmitted. The EM path is terminated at a termination impedance 316. The signal entering the sink assembly is measured at a line amplifier 322 whose sampling aperture is adjusted at a clock recovery circuit 318, and which is controlled through a feedback path at an equalizer 324.

[0381] In a preferred embodiment, the parameters that define the sink assembly 326, including the transport interval, the decode interval, the collection interval, N8, L10, the codebook 356, and the collection permuter 348 permutation, all remain constant throughout the steps involved in reconstructing one set of N output media signal samples 357 in the output memory 352. In one embodiment of the sink assembly, all the decode parameters are "hard-coded" and cannot be changed. However, the decoding of one output vector is logically independent from the decoding of all preceding and all subsequent output vectors. Thus, in a further embodiment, the decode parameters change value for each output vector of reconstructed media signal samples. In a further embodiment of the sink assembly, any of the decode parameters may be varied from collection interval to collection interval under algorithmic control, for example, in response to changes in media signal characteristics, EM path 314 characteristics, and / or application requirements. In a further embodiment of the sink assembly, the predetermined individual measurement intervals and demodulation intervals are not uniform.

[0382] In a further embodiment of an analog version of the sink assembly 328, the analog portion can be implemented as a switched capacitor circuit. The similarity to state of the art ADC designs will be apparent to those skilled in the art, as the operation of this circuit entails the use of sample and hold circuits, multiplier circuits, and pipeline type operations. In fact, one such implementation of an analog sink assembly can accommodate any amplitude representation, from binary representations, through two-variable representations, to continuous representations, through simple selection of threshold setting levels in the pipeline operation of the sink assembly. In certain embodiments, the sink assembly is a parametrically reconfigurable design to accommodate digital or pulsating signals, thereby allowing system flexibility.

[0383] An output vector 352 is reconstructed in the decoder 512 from the ordered sequence of received levels 214 over the course of a decoding interval by accumulating partial contributions in the storage element 302 during each demodulation interval of the decoding process (507 in FIG. 2). For each output vector position, the embodiment of the sink assembly 328 shown in FIG. 9 associates one code 330, one correlator, and one integrator 336 with a corresponding index in the codebook memory 356.

[0384] The decoding controller 507 performs the following process: Before starting to decode the ordered sequence of received values, the output vector 352 entries 302 are cleared (by storing a value of 0 in each). Then, during each predetermined demodulation interval for each subsequent output vector index, it correlates the received values ​​214 generated in the line amplifiers 322 with the correspondingly indexed chips 332, and uses the summing circuit 336 to collect and direct the correlation results 321 with the contents of the corresponding output sample memory 352 to the correlator 334. The summing circuit results at each demodulation interval are stored in the output sample memory for reference in the subsequent demodulation interval.

[0385] For digital implementations of the decoder 512 where the chips 332 happen to be constrained to be binary (e.g., 1s and 0s), one embodiment of the correlator 334 comprises a combinational circuit that inverts the signed integer representation of each received value 342 by the chip. A corresponding embodiment of the line driver 312 performs the digital-to-analog conversion.

[0386] For an analog implementation of the decoder 512, where the chips happen to be constrained to be binary (eg, 1 and -1), the correlator may consist of an analog modulator, the example of which is shown in FIG.

[0387] The output of each correlator 334 is integrated by a corresponding integrator 336 along with the contents of the output sample memory 302 corresponding to that correlator 334. For a digital embodiment of the decoder 512, the integrator is a straightforward combinatorial adder. For an analog embodiment of the decoder, one embodiment of the integrator comprises an op-amp-based integrator.

[0388] If the reconstructed media signal 502 is pulsating, the output samples 302 are continuous values ​​and the embodiment of the correlator 334 is an analog multiplier. If the code 332 is binary (1 / -1) in this example, the embodiment of the analog correlator is a conditional inverter. If the media signal is digital, the samples are numeric and the embodiment of the correlator is a digital multiplier. If the code is binary (1 / -1) in this case, the embodiment of the digital correlator is a conditional negator.

[0389] The repetition of the process provides the sink assembly an opportunity to acquire and track synchronization. A correlation spike detector 320 monitors the output of the array of decoder correlators 334. In one embodiment, all of the sink assembly 328 functional elements are synchronized with a clock recovery circuit 318 that monitors the output 214 of the line amplifier 322 and the output of the correlation spike detector to acquire and track carrier synchronization.

[0390] There are further benefits that arise from the fact that the modulation / providing intervals in the source assembly and the measurement / demodulation intervals during the transport interval are controlled by a crystal oscillator or other precise time source in certain embodiments. Given the performance specifications of the known precise time source, the difference in the underlying precise time source frequency between the source assembly and the sink assembly is only on the order of parts in tens of thousands. Another consideration in favor of simplicity, and therefore low implementation cost, is that the sequence length of the pseudo-noise generating circuit is not very large, not too large, for a value of L.

[0391] The encoding / decoding process allows the above simplifications and makes it possible to do without a lengthy initial timing acquisition procedure. The sink assembly measurement / demodulation interval is performed close to the source assembly modulation / dispatch interval, and the relative phase (i.e., index into the codebook) of the PN generator at the receiver is easily obtained on this basis. In certain embodiments, the circuitry implemented is merely a tracking system with slight variations in its ability to change frequency to match that of the source assembly, and to obtain the relative phase of the receiver with respect to the transmitter.

[0392] The synchronization acquisition system can be described as a sliding correlator that takes as inputs the received signal from the media and the output from a PN generator that is local to the receiver. The local PN generator is driven from a PLL, or phase-locked loop, with narrowband frequency diversity, i.e., the local PN generator runs natively at a frequency close to the target frequency and has a band of control around the center frequency. The output from the sliding correlator is analyzed to determine if the lock condition has been reached or if the frequency is too high or too low, and the lock detector then drives the PLL to speed up or slow down first and stay in the feedback loop.

[0393] The sliding correlator architecture can be implemented as a sampled and digitized representation of the incoming signals, where the correlation is formed in digital logic. Another implementation of the sliding correlator can be a switched analog circuit, where the incoming signals are sampled in analog and the correlation is performed in switched capacitor circuits.

[0394] One conventional technique in the acquisition process is to have a coarse phase alignment achieved through searching through various taps or delays of the receiver assembly PN generator, and a fine phase frequency alignment achieved in the PLL. However, in certain embodiments of the system, the time required to search all of the available taps in the PN sequence generator is relatively short. Conventionally, one searches among the various taps of the PN generator to find a relatively close correlation spike, and then this correlation can be fine-tuned by changing the frequency of the PLL. Through this, both coarse and fine adjustments can be achieved. Since certain embodiments of the system are relatively unconstrained, it is possible to simply slide the phase by changing the frequency and achieving both coarse and fine adjustments through changing the PLL.

[0395] Further embodiments allow the transmitter to transmit a training sequence with pre-determined characteristics to facilitate synchronization acquisition and tracking. This training sequence may appear at the beginning of every grouping of data video data, or may be present continuously as a sub-band, i.e. modulated with an additional code that is orthogonal to all codes in the codebook that are applied to the media signal snippet and transmitted simultaneously. The independent training sequence or sub-band serves as a probe of the EM characteristics of the EM path, which may then be referenced for adjustments on the parameters of the signal correction circuitry, such as pre-emphasis. Hereafter, this signal is referred to as the "probe signal" without loss of generality. This probe signal may be held constant over k transport intervals for some pre-determined k, and the code associated with this probe signal may be k*L chips long. As with the media signal samples in the input vector, this probe signal may be implemented in a discrete (digital) or continuous (pulsating) representation. This approach increases the resilience of the probe track to noise, interference, and reflections. In this application, the probe signal is particularly powerful in that it can be made to have a constant amplitude that allows the channel attenuation to be directly measurable, making it easy to acquire and track.

[0396] Figure 10 shows the architecture of one particular embodiment of a synchronization acquisition and tracking circuit, which can be described as a sliding correlator. The key input is the received signal 214, and the key output is a clock signal 826. The circuit of Figure 10 comprises a PN generator 814 clocked by a phase-locked loop (PLL) 810 that is finely tuned by a correlation peak detector 320. The PN generator is designed with narrowband frequency diversity, i.e., it runs natively at a frequency close to the target frequency and has a band of control around the center frequency. The output 824 from the sliding correlator is analyzed by the correlation peak detector to determine if the lock condition has been reached or if the frequency is too high or too low. The lock detector then adjusts the PLL to servo to synchronization.

[0397] The sliding correlator architecture shown in Figure 10 can be implemented as a sampled and digitized representation of the incoming signals, where the correlation is made in digital logic. Another implementation of the sliding correlator can be a switched analog circuit, where the incoming signals are sampled and the correlation is performed in a switched capacitor circuit. One embodiment simply adjusts the phase by changing the frequency and achieves both coarse and fine adjustments by adjusting the PLL frequency.

[0398] In an alternative embodiment, the source assembly 326 sends a training sequence with known characteristics as a preamble to a series of vector transmissions to facilitate synchronization acquisition and tracking. This training sequence may appear at the beginning of every vector transmission or may be transmitted as a separate snippet along with the incoming media signal snippet. Transmitting the training sequence as a separate EM signal allows this probe signal to characterize the quality of the transmission media. Such characterization data is used as various signal correction parameters such as pre-emphasis. Furthermore, the training sequence signal can be of much longer period than one collection interval, increasing the SSDS process gain and, as a result, resilience to noise and interference. In the present disclosure, the training sequence is particularly powerful in facilitating acquisition and tracking simply because the training sequence can be made to have a constant amplitude.

[0399] An example of a parallel correlation synchronization acquisition and tracking system is shown in Figure 11. This system analyzes adjacent taps 902, 904, 906 in the PN sequence generator 814. By evaluating three adjacent taps in parallel in the correlation spike detector 320, as well as the correlations associated with each of those individual taps, the lock detection algorithm is greatly simplified.

[0400] In a further embodiment, the receive circuit is adapted to send a phase-aligned and synchronized signal back to the transmit circuit in a separate sub-band. Completing the control loop in this manner allows the transmitter to transition between providing a probe signal and encoding a media signal snippet in certain embodiments. After initial power-up, the transmit circuit transmits a probe signal until it acquires a sub-band signal returned from the receive circuit. Upon receiving the returned signal, the transmit circuit begins transmitting data according to the received parameters. This closed loop control system enables a robust, self-calibrating media interface to be implemented.

[0401] Another preferred embodiment is a parallel correlation system shown in Figure 11. This system analyzes adjacent taps in the PN sequence generator. By examining three adjacent taps and the correlations associated with each of those individual taps, the lock detection algorithm is greatly simplified.

[0402] In a further embodiment, the sink assembly is adapted to send a phase-aligned and synchronized signal back to the source assembly in an independent sub-band. Completing the control loop in this manner allows the source assembly to transition between providing a probe signal and encoding a media signal snippet in certain embodiments. After initial power-up, the source assembly transmits a probe signal until the source assembly acquires a sub-band signal returned from the sink assembly. When the returned signal is received, the source assembly begins transmitting an EM signal according to parameters received from the sink assembly. This closed loop control system allows for a robust, self-calibrating media transport to be implemented.

[0403] 12 illustrates a straightforward round robin permutation of the collection permuter 348. This permutation is applied iteratively to continue collecting samples 302 from the decoder output vector 352 for samples 804 in the output media signal 502 α', β', ..., ω' until all N output vector positions are exhausted. There are potentially different numbers of samples per reconstructed output signal that are all collected during one collection interval. The numbered circles indicate the order in which the decoder output vector contents are collected to output the signal during a collection interval. Exactly N samples are collected during a collection interval.

[0404] Although there are N! equally good choices for collection permuter 348 permutations, successful media signal transport requires that the collection permuter implements the inverse of the collection permuter 346 (shown in other figures) permutations. Ensuring agreement on such details is properly the subject of international standards rather than the subject of this disclosure.

[0405] The schema illustrated in Fig. 12 applies to many possible types of signals. For example, there can be a single media signal where each successive sample consists of a video representation of a color value (e.g., three per pixel (R / G / B)). Another example is also a single media signal, which consists of color values ​​from several independent video signals interleaved. Further examples include signals of various types, e.g., video signals, audio signals, chemical signals, mechanical / tactile signals, etc. One such hybrid example embodiment includes various numbers of samples from / for each media signal during each transport interval. Further examples include each of the four types of signals (digital, analog, pulsating, neutral) alone or jointly.

[0406] There are many ways to implement the collection permuter 348, one embodiment is to write each successive output sample to a port, another alternative is to store the output samples in a memory that can be read to provide the output in the desired order.

[0407] FIG. 13 illustrates the round-robin allocation of samples from indices in an 8-element decoder output vector to parallel RGB output video signals resulting from receipt of the first transport interval.

[0408] Figure 13 illustrates a particularly common special case of the general scheme shown in Figure 12. In this example, the reconstructed media signal consists of three signals 502 representing the R, G, and B color planes, respectively, of a single reconstructed RGB-based video signal. The number of elements, N, in the decoder 512 happens to be 8. This example shows a round-robin allocation during a given collection interval.

[0409] Further to the embodiment set forth in FIG. 13, FIG. 14 illustrates round robin allocation during immediately subsequent collection intervals.

[0410] Figure 15 shows the structure of a binary codebook that is a subset of the identity matrix for the example of L = N + 3. The chip index j 916 runs horizontally across the figure from 0 to L-1, and the input / output vector index l 914 runs vertically down the figure from 0 to N-1.

[0411] Figure 16 shows an example of a 127x127 binary codebook where each code is a unique rotation of a common PN sequence. In this figure, black squares correspond to a value of "1" while white squares correspond to a value of "-1". The matrix for pulsating modulation is constructed by the following steps:

[0412] 1. Instantiate an L×L identity matrix

[0413] 2. Keep only the first N rows

[0414] Convert 3.0 entries to -1 values

[0415] 4. The result is the example codebook shown in Figure 16.

[0416] Figure 17 shows an example of a 128x128 binary codebook, which is a Walsh-Hadamard matrix. In this figure, black squares correspond to a value of "1" while white squares correspond to a value of "-1".

[0417] Figure 18 shows an example of a 128x128 binary codebook constructed by convolving a Walsh-Hadamard matrix with a sequence close to PN. In this figure, black squares correspond to a value of "1" while white squares correspond to a value of "-1".

[0418] In certain embodiments, the input media signal 500 and the reconstructed media signal 502 comprise video signals, for example as shown in Figures 5, 6, 13, and 14 with fully populated R / G / B color planes. FIG. 19 illustrates an embodiment in which the subject matter of this disclosure is applied to a (class of) video system. All elements are associated with an instance of a media interface 1. All media interfaces are implemented with one or more media transports combined with provisions for control and status communication. Each media transport includes one source assembly 326 and one sink assembly 328. As explained elsewhere, each of the EM paths 314 illustrated in FIG. 19 is but one of various physical embodiments in which the methods and apparatus disclosed herein may be applied. The architecture shown in Figure 19 includes a predetermined number C of cameras 516 and another predetermined number D of displays 518. The architecture shown in Figure 19 also includes a media processing unit (MPU) 548. The MPU contains a video processor 536, non-volatile storage 560 with which the video processor exchanges storage signals 562, and a wide area network interface 544 with which the video processor communicates with the Internet 576 via Internet Protocol signals 546.

[0419] The camera 516 shown in Figure 19 comprises a lens 520 that bends incident light 528 to project focused light 534 onto a focal plane 554 occupied by an image sensor 522. The image sensor generates an output signal 524 comprising an ordered series of light measurements, each corresponding to a geometric location in the focal plane, each measurement acquired during a predetermined image sensor exposure interval 4. In one pipeline balanced embodiment, the image sensor exposure interval is equal to the transport interval 2. The camera also includes a source assembly 326. 538 is a circuit that adapts the image sensor output samples as an input media signal for the encoder.

[0420] The image sensor 522 output signal 524 is inherently pulsating, and converting it to a digital signal would use additional analog-to-digital converter circuitry, which would certainly increase non-zero manufacturing costs while providing no potential for increased fidelity. The simplest embodiment of the subject matter of this disclosure conveys the pulsating signal directly, without requiring analog-to-digital conversion of the light measurements, resulting in purposeful transmission of high resolution video signals at minimal cost compared to conventional configurations.

[0421] The display 518 shown in FIG. 19 comprises a sink assembly 328 and a circuit 540 that adapts the sink assembly output (reconstructed display control signal snippets) to an input 526 of a display element array controller 556. The array controller generates a series of brightness control values ​​558. Each brightness control value determines the brightness maintained during a predetermined display array refresh interval 6 of each light emitting element at each geometric location in an array of display elements 530. In one pipeline balanced embodiment, the display array refresh interval is equal to the transport interval 2. The display array consists of elements such as several types of diodes that emit light 552. The viewer's brain interprets such activity as moving images over time.

[0422] The central entity of the video system shown in the video embodiment of FIG. 19 is a central processing unit (MPU) 548, which is based on a video processor 536. The MPU receives signals from all cameras 516 via the media interface 1, and the MPU transmits signals to all displays 518 in the system via the media interface 1. All camera signals and all display signals are independent of all other video signals in the system. Potentially trivial circuitry 568 adapts each sink assembly output 570 (reconstructed camera output signal snippet) to a data format required for the video processor. Similarly, potentially trivial circuitry 574 adapts the prepared display input signal 566 from the video processor data format to an input media signal 566 for the corresponding display. The circuits 568, 574 are widely known in the art.

[0423] In certain embodiments, MPU 548 performs various operations on the video, including decoding stored content 562 retrieved from non-volatile memory 560, storing compressed video signals 562 in non-volatile memory, and / or exchanging Internet Protocol signals 546 with the Internet 576 via WAN modem 544. A bidirectional converter 542 converts between Ethernet packets and pulsating or digital signals that travel through the video processor's data path.

[0424] In one embodiment, the video processor 536 is a CPU. In a further embodiment, the video processor is a GPU. The video processor may be implemented with a digital data path or with a pulsating data path. A digital data path requires an A / D on the input and a D / A on the output, and is therefore inherently less efficient for video than a pulsating data path.

[0425] The wide variety of common video systems can be viewed as parametric variations of the schema shown in FIG. 19, e.g.

[0426] In one embodiment of a circa 1990 home entertainment system, C=0, i.e. there is no camera. D=1, i.e. the CRT display is housed in a box placed on a table. The MPU 548 is a tuner / amplifier circuit assembly, the EM path 314 is a coaxial cable, and the Media Interface 1 is PAL.

[0427] In one embodiment of a home entertainment system circa 2016, C=2, a Kinect® system, includes stereo monochrome computer vision. D=1, an HDMI display, is hung on the wall. MPU 548 is a gaming console, e.g., Sony PlayStation® or Microsoft Xbox®, EM path 314 is an HDMI cable, and Media Interface 1 is an HDMI.

[0428] In one possible embodiment of a home entertainment system, for example one implementing iVR® ("immersive virtual reality"), C=256, i.e. high resolution cameras provide 360 ​​degree 3D machine vision input to provide a wide range of new inputs for gesture-based and motion-based interfaces. D=2048, i.e. all solid walls, ceilings and floors are constructed from flexible, robust display panels. MPU 548 is a computationally enhanced variant of a PlayStation® or Xbox®. EM pathway 314 is any American Wire Gauge (AWG) wire pair, and media interface 1 is implemented with media transport 3, which is the subject of this disclosure. This embodiment enables a qualitatively different experience from pixel-rich internet content than previously anticipated.

[0429] In one embodiment of a passenger vehicle system, C=8, various infrared (IR) and ultraviolet (UV) sensors, and visible light sensors collect data for safety related machine vision analysis. D=4, displays are provided on the dashboard and on the front seat headrests for rear passenger entertainment. MPU 548 is the engine control unit (ECU). EM path 314 is CAT-3 and Media Interface 1 is LVDS.

[0430] In one possible embodiment of the passenger car system, C=32, i.e. various IR and UV sensors, as well as visible light sensors, collect data for machine vision analysis for safety, and video-rich internet interaction is enabled for passengers. D=64, i.e. displays are provided on all solid surfaces, as well as on the exterior glass and on the dashboard, for both control and passenger entertainment. MPU 548 is the Engine Control Unit (ECU). EM Path 314 is an inexpensive cable, and Media Interface 1 is the subject of this disclosure. This embodiment allows passengers to enjoy an iVR entertainment experience, while the driver can utilize the most responsive heads-up display possible to control the vehicle.

[0431] In one embodiment of a retail signage video system (e.g., fast food restaurant menu), the MPU 548 is a tower PC or server. The EM path 314 is CAT-5 / 6 and the media interface 1 is HDBaseT.

[0432] In one possible embodiment of a retail signage video system, the MPU 548 is a tower PC or server. The EM path 314 is any AWG wire pair and the media interface 1 is implemented with the media transport 3 that is the subject of this disclosure. This embodiment allows the display 518 to be located farther away from the MPU, thus saving cost by allowing a single MPU to serve a larger number of displays. Additionally, cables are much less expensive and easier to terminate such cables in the field (currently a major barrier to HDMI enabling iVR).

[0433] In one embodiment of an HD video surveillance system, the MPU 548 is a DVR, the EM path 314 is a coaxial cable, and the media interface 1 is analog HD.

[0434] In one possible embodiment of an 8K video surveillance system, the MPU 548 is a DVR, the EM path 314 is any AWG wire pair, and the media interface 1 is implemented with the media transport 3 that is the subject of this disclosure. This embodiment cost-effectively brings high resolution video over legacy infrastructure cabling.

[0435] Other embodiments that may illustrate parametric instantiations of the schema of FIG. 19 include a circa 1970's cinema system where C=0 and D=1, an exemplary surround view system where C=0 and D=8, a futuristic iVR cinema system where C=64 and D=64, an HD rock concert video system where C=8 and D=8, and an 8K rock concert video system where C=128 and D=128 enabling a high resolution live experience incorporating video feeds of performers, video feeds of audience members, prepared video signals, and synthetically generated video signals.

[0436] The subject of this disclosure is an aspect of a media transport 3 that can be used to implement any media interface on one or more EM paths of any type. In many applications requiring the transport of video, audio, and other types of media signals, it is desirable to be able to transport information along the EM path in a direction opposite to the direction of the primary media signal information flow. For example, the MPU 548 shown in FIG. 19 can benefit from the ability to send control and configuration information to sensors including cameras and microphones. The disclosed media transport does not preclude low bandwidth upstream communication.

[0437] The source assembly 326 encodes a vector of N samples per encoding interval. If we call the number of encoding intervals per second / (so that / = 1 / encoding interval), then the throughput of the source assembly is Nf samples per second, and it provides the EM path 314 to transmit Lf samples per second, where L >= N. For example, 1920 x 1080 1080p60 HD video is about 2 million pixels or 6 million samples per frame, or 360 million samples per second for RGB encoding of each pixel. This gives us that Nf = 360e6 = .36e9. We can reasonably expect that Lf = 1GHz = 1e9. Therefore, N / L = .36, i.e., if L = 128, then N = 46. The source assembly transmits the entire ordered set of output values ​​during the transport interval.

[0438] Figure 20 shows an example oscilloscope trace of the incoming signal from the EM path (314 in Figure 19) to the sink assembly 328 input terminal 340. The vertical scale is voltage and the horizontal scale is 100 picosecond oscilloscope intervals. In Figure 20, 20 oscilloscope intervals correspond to one sink assembly measurement interval.

[0439] Figure 21 shows a flow chart for the method of collecting, encoding and providing. The flow chart suggests many ways in which the various steps can be separated to practical effect. There are many ways to implement the providing step, one embodiment is to provide the level on the sending terminal, another alternative is to store the output in a memory that can be read to provide the output.

[0440] Figure 22 shows a flow chart for the method of receiving, decoding and collecting. Iteration is inherent in this method because it relies on iteration to track synchronization with the paired method of collecting, encoding and providing. There are many ways to implement the receiving step, one example is to continuously measure the value on the port, another alternative is to read the input from a memory that is initialized to provide the input. Receiving can be adapted to any form of intra-device signaling.

[0441] FIG. 23 shows an example comparing uniform and non-uniform spacing for modulating, dispatching, measuring, and demodulating.

[0442] FIG. 24 shows an example of comparing binary valued chips with continuous valued chips.

[0443] Figure 25 shows an example of a test pattern being transmitted over an EM path, exhibiting a relatively low electrical signal-to-noise ratio in the presence of a strong interfering signal. Many known video transports would fail completely under such adverse conditions. As is evident in this figure, the media signal is readily visible.

[0444] FIG. 26 is not used.

[0445] Figure 27 illustrates a single EM path media interface 1 that is a superset of the media transport method / apparatus 3 that is the subject of Figure 3. As explained elsewhere, the twisted pair representation of the EM path 314 shown in Figure 27 is only one of a variety of physical embodiments to which the methods and apparatus disclosed herein may be applied. In addition to the media transport, the media interface includes these circuits:

[0446] An incoming content decoder that exposes the incoming media signal. Examples include an MPEG4 decoder or an HDMI HDCP decoder.

[0447] The transmitter assembly includes bit-serial SSDS-CDMA modulation of a modest number of down-cable control signals using very long codes. While the amount of information to be communicated is relatively small, it is important that each control bit is transmitted accurately.

[0448] The source assembly includes the well-known bit-serial SSDS-CDMA modulation of the EQ, Measurer, and a modest number of up-cable status signals using very long codes. While the amount of information to be communicated is relatively small, it is important that each status bit is conveyed accurately.

[0449] The sink assembly includes a known bit-serial SSDS-CDMA modulation of a modest number of up-cable status signals using very long codes. While the amount of information to be communicated is relatively small, it is important that each status bit is conveyed accurately.

[0450] The sink assembly includes the well-known bit-serial SSDS-CDMA modulation of a modest number of down-cable control signals using very long codes. While the amount of information to be communicated is relatively small, it is important that each control bit is conveyed accurately.

[0451] An originating content encoder that prepares the reconstructed media signal for the system application to which it is intended. Examples include an MPEG4 encoder or an HDMI HDCP encoder.

[0452] FIG. 28 illustrates three sets of alternative logical assignments for the 19-pin HDMI connector pins, two of which are suitable for EM signaling according to the methods and apparatus disclosed herein, where P≧4.

[0453] FIG. 29 shows a source assembly for receiving an HDMI video signal over an HDMI interface and exchanging control and status information, and for exchanging EM signals representing the video signal over a hyPHY-HDMI-AA interface (defined in FIG. 28) and transferring control and status information using the detailed apparatus disclosed herein.

[0454] FIG. 30 illustrates a sink assembly using the detailed apparatus disclosed herein to exchange EM signals over a hyPHY-HDMI-AA interface (defined in FIG. 28) and transmit a reconstructed video signal over an HDMI interface, as well as to exchange control and status information.

[0455] FIG. 29 is a source assembly and FIG. 30 is a sink assembly paired to implement HDMI over HDMI cable, where the EM signal is generated from the media signal SSDS-CDMA. Samples from the high bandwidth media signal are routed to four encoder and presentation circuits that drive four shielded EM paths driven from the source assembly as hyPHY0...hyPHY3. The media signals reconstructed at the receiver assembly from each of the four EM paths are combined appropriately with post processing and media transport encryption. All of the modest amount of bit-accurate bidirectional control and status communication is tunneled over the other EM paths available at the HDMI Type A connector.

[0456] FIG. 31 shows two alternative sets of logical pin assignments for an 8P8C UTP connector suitable for EM signaling according to the methods and apparatus disclosed herein, where P=4.

[0457] FIG. 32 illustrates a source assembly using the detailed apparatus disclosed herein to receive HDMI video signals over an HDMI interface and exchange control and status information, and to exchange EM signals representing the video signals over a hyPHY-UTP-A32 interface (defined in FIG. 31) and forward control and status information.

[0458] Figure 33 shows a sink assembly using the detailed apparatus disclosed herein to exchange EM signals over a hyPHY-UTP-A32 interface and transmit a reconstructed video signal over an HDMI interface, as well as to exchange control and status information. The sink assembly repeatedly receives four EM signals over a UTP cable as input series of measured levels, decodes each input series of levels into a memory of output samples, and collects the output samples as an HDMI video signal, with control and status information being exchanged via modulation of the information with a high process gain spreading code orthogonal to the code in the codebook selected for media sample communication. In this asymmetric exemplary architecture, control information is tunneled over a designated one of the pairs (hyPHY3), while status information is tunneled over a different designated one of the pairs (hyPHY2).

[0459] 34 illustrates a source assembly subcircuit that adds an EM signal containing timing recovery information to an EM signal representing an input media signal snippet. The added EM signal facilitates synchronization acquisition and tracking in a paired sink assembly.

[0460] FIG. 34 shows an embodiment of a timing recovery information injector circuit. The purpose of injecting timing recovery information is to facilitate timing acquisition and tracking in a paired receiver assembly. In a preferred embodiment, the circuit of FIG. 33 is incorporated into the transmitter assembly.

[0461] The codes that are superimposed in FIG. 34 must be orthogonal to all of the codes in the codebook.

[0462] It should be noted that it may be possible to apply a long code control / status tunneling scheme to provide media framing information, for example hsync and vsync for a video signal.

[0463] Figure 35 shows a sink assembly subcircuit that heuristically seeks phase and frequency lock with the incoming EM signal that contains the timing recovery information. The PN code generated in Figure 35 must be identical to that seen in Figure 34 in the paired source assembly.

[0464] FIG. 36 illustrates an embodiment of a source assembly that connects an HDMI sink containing an uphill variant and an uphill PHY to a hyPHY-UTP-S source.

[0465] FIG. 37 shows an embodiment of the source assembly uphill variant.

[0466] FIG. 38 illustrates an embodiment of an implementation of a source assembly upstream PHY.

[0467] Figure 39 shows an embodiment of a sink assembly connecting a hyPHY-UTP-S sink to an HDMI source over four EM paths. The sink assembly is a bidirectional device, so the "inputs" are wrt video flow. The four UTP inputs, media sink ports, connect to the four UTP terminals and receive four EM signals generated on the media signals SSDS-CDMA, receive four sideband EM signals corresponding to digital status information and digital audio information, and generate four sideband EM signals corresponding to digital control information and digital audio information, transcoding between connections, and on the HDMI transmitter side, the ctrl / status EM signals on the four EM paths to / from the HDMI 19 pin and the HDMI transmitter.

[0468] FIG. 40 illustrates an embodiment of a sink assembly downhill PHY.

[0469] FIG. 41 shows an embodiment of an implementation of the sink assembly downhill variant.

[0470] Throughout this specification and the appended claims, unless the context indicates otherwise, the words "comprises" and "includes," as well as variations such as "comprising" and "including," are understood to imply the inclusion of a specified integer or group of integers, but not the exclusion of any other integer or group of integers.

[0471] The mention of any prior art in this specification is not intended, and should not be construed as, any form of admission that such prior art forms part of the common general knowledge.

[0472] Those skilled in the art will recognize that the present invention is not limited to the use of the present invention in the particular applications described. Although some of the examples described relate to RGB full-color images, the subject matter of the present disclosure applies regardless of the depth / number of media signals and regardless of the color space of any video in the media signal, including all variations of chrominance / luminance separated (and chrominance subsampled) color spaces (e.g., YUV, YUV4:2:0, etc.), as well as monochrome (i.e., Y only). Additionally, regardless of the specific elements and / or features described or illustrated herein, the present invention is not limited to the preferred embodiments of the present invention. It will be recognized that the present invention is not limited to the disclosed embodiment or embodiments, but that numerous rearrangements, modifications, and substitutions are possible without departing from the scope of the present invention as described and defined in the appended claims.

Claims

1. 1. A method for distributing samples from one or more input media signals to P electromagnetic paths, comprising the steps of: a) assigning said samples to said P indexed input vectors each of length N; In the step of allocating, the sample is allocated to one of the indices of the input vector according to a pre-determination; The P is an integer of 2 or more, b) encoding the samples by the P encoders, one for each of the input vectors, each of the encoders encoding the input vector with a code from a set of N codes; the code is associated with one of the samples of the input vector; the N codes are an indexed sequence of L chips, the code is distinct from and orthogonal to the other N−1 codes in the code set; The N and the L satisfy L≧N≧2, and are both integers; the encoder performs the sub-step of: The code index is a value from 1 to the L, i. modulating the samples in the input vector corresponding to the encoder by the chips addressed by the code index of the corresponding code; ii. A sub-step of summing the modulation results of i. to form one output level among the L output levels corresponding to the code index, one by one; d) outputting the L output levels to each of the P electromagnetic paths corresponding to one of the encoders such that the L output levels are available in the P electromagnetic paths corresponding to one of the encoders; The L output levels represent the N samples of the input vector encoded by the encoder corresponding to each of the electromagnetic paths.

2. the one or more input media signals originate from a single signal source; The P electromagnetic paths each terminate at one sink. The method of claim 1.

3. The one or more input media signals may be video signals, audio signals, chemical signals, mechanical signals, tactile signals, or control signals. The method of claim 1.

4. a dispensing interval for dispensing the sample; an encoding interval for performing the encoding sub-steps i. and ii.; and a transport interval for outputting the L output levels. The method of claim 1.

5. The samples are modulated during a modulation interval; Varying the modulation intervals such that successive modulation intervals are pseudo-noise or pseudo-noise-like sequences. The method of claim 1.

6. The samples may be analog or digital samples. The method of claim 1.

7. the L output levels formed by each of the encoders are analog output levels; The L output levels made available per encoder are the L analog output levels. The method of claim 1.

8. the L output levels produced by each of the encoders are digital output levels; The L output levels are converted from digital to analog signals and transmitted through the electromagnetic path. The method of claim 1.

9. sending at least one down cable control signal to the same electromagnetic path as one of the ordered series of L power levels or to another electromagnetic path. The method of claim 1.

10. a codebook constituting said code set; The codebook is an identity matrix or a subset of an identity matrix. The method of claim 1.

11. 1. A method for receiving P ordered series of input levels indicative of one or more media signals, comprising: The ordered series is received from P electromagnetic paths; The P is an integer of 2 or more, a) for each ordered series of input levels, identifying an output vector associated with a predetermined number N of indexed positions; b) for each ordered series of input levels, corresponding to an index of the output vector a code from a predefined code set; The N codes are indexed sequences of L chips, the N codes are distinct and orthogonal to the other N−1 codes in the code set; The N and the L satisfy L≧N≧2, and are both integers; c) performing the following decoding sub-step L times on the electromagnetic paths, the input levels, and the associated output vectors: The code index is a value from 1 to the L, i. for each associated output vector index, multiplying the chip addressed by said code index of said code associated with said output vector index by an input level in the ordered series of said input levels addressed by said code index; ii. For each index of an output vector, summing the result of i. above and the position of the output vector associated with the code index. iii. For each index of the output vector, storing the summation result from step ii. in the position of the output vector associated with the code index. d) storing samples from the positions of said output vectors into one or more reconstructed media signals. method.

12. the one or more media signals emanate from a single signal source; The one or more reconstructed media signals terminate at one sink. The method of claim 11.

13. The one or more input media signals may be video signals, audio signals, chemical signals, mechanical signals, tactile signals, or control signals. The method of claim 11.

14. a collection interval for collecting said samples; a decoding interval for performing the decoding sub-steps i., ii., and iii.; and setting a measurement interval for receiving the L input levels. The method of claim 11.

15. said P ordered series of input levels being generated by applying a corresponding coding method to said one or more media signals; the code set for each of the ordered series of input levels is identical to the code set applied in a corresponding encoding method; The one or more reconstructed media signals may include a reconstructed version of the one or more media signals. The method of claim 11.

16. the ordered series of input levels being analog input levels; The samples collected from the output vector are analog samples. The method of claim 11.

17. The samples collected from the output vector are digital samples. The method of claim 11.

18. Transmitting an up cable status signal to the same electromagnetic path as the ordered series of input levels or to a separate electromagnetic path. The method of claim 11.

19. 1. An apparatus for distributing samples from one or more input media signals to P electromagnetic paths, comprising: a) a permuter that assigns the samples to each of the P indexed input vectors of length N; the permuter assigns the samples to one of the indices of the input vector according to a pre-determination; The P is an integer of 2 or more, b) an encoder for each of the P input vectors that encodes the input vector with a code from a set of N codes in encoding the samples; the code is associated with one of the samples of the input vector; the N codes are an indexed sequence of L chips, the code is distinct from and orthogonal to the other N−1 codes in the code set; The N and the L satisfy L≧N≧2, and are both integers; the encoders perform the following sub-step L times for the input vectors corresponding to the encoders to form an ordered series of the L output levels for each encoder: The code index is a value from 1 to the L, i. modulating the samples in the input vector by the chips addressed by the code index of the corresponding code; ii. A sub-step of summing the modulation results of i. to form one output level among the L output levels corresponding to the code index, one by one; d) an output terminal for outputting the L output levels to each of the P electromagnetic paths corresponding to one of the encoders, so that the L output levels can be utilized in the P electromagnetic paths corresponding to one of the encoders; The L output levels represent the N samples of the input vector encoded by the encoder corresponding to each of the electromagnetic paths. Device.

20. the one or more input media signals originate from a single signal source; The P electromagnetic paths each terminate at one sink.

20. The apparatus of claim 19.

21. The one or more input media signals may be video signals, audio signals, chemical signals, mechanical signals, tactile signals, or control signals.

20. The apparatus of claim 19.

22. a dispensing interval for dispensing the sample; an encoding interval for performing the encoding sub-steps i. and ii.; and a transport interval for outputting the L output levels.

20. The apparatus of claim 19.

23. The samples are modulated during a modulation interval; The encoder varies the modulation intervals such that successive modulation intervals are pseudo-noise or pseudo-noise-like sequences.

20. The apparatus of claim 19.

24. The samples may be analog or digital samples.

20. The apparatus of claim 19.

25. the L output levels formed by each of the encoders are analog output levels; The L output levels made available per encoder are the L analog output levels.

20. The apparatus of claim 19.

26. The L output levels formed for each encoder are digital output levels; The L output levels are converted from digital to analog signals and transmitted through the electromagnetic path.

20. The apparatus of claim 19.

27. sending at least one down cable control signal to the same electromagnetic path as one of the ordered series of L power levels or to another electromagnetic path; 20. The apparatus of claim 19.

28. a codebook constituting said code set; The codebook is an identity matrix or a subset of an identity matrix.

20. The apparatus of claim 19.

29. 1. An apparatus for receiving P ordered series of input levels representing one or more media signals, comprising: said P input terminals receiving an ordered series of input levels; The ordered series is received from P electromagnetic paths; The P is an integer of 2 or more, A decoder for each of the electromagnetic paths; The decoder comprises: identifying an output vector that includes a predetermined number N of indexed positions for each ordered series of input levels; For each ordered series of input levels, corresponding a code from a predetermined code set to an index of said output vector; The N codes are indexed sequences of L chips, the N codes are distinct and orthogonal to the other N−1 codes in the code set; The N and the L satisfy L≧N≧2, and are both integers; Execute the following decoding sub-step L times: The code index is a value from 1 to the L, i. for each index of an output vector corresponding to said code index, multiplying the chip addressed by said code index of said code associated with said output vector index by an input level in the ordered series of said input levels addressed by said code index; ii) for each index of the output vector corresponding to the code index, summing the result of i) and the elements of the output vector for each index; iii) for each index of the output vector corresponding to the code index, storing the sum result of ii) at a position of the output vector corresponding to the code index; and a permuter for storing samples from the positions of the output vectors into one or more reconstructed media signals. Device.

30. the one or more media signals emanate from a single signal source; The one or more reconstructed media signals terminate at one sink.

30. The apparatus of claim 29.

31. The one or more input media signals may be video signals, audio signals, chemical signals, mechanical signals, tactile signals, or control signals.

30. The apparatus of claim 29.

32. a collection interval for collecting said samples; a decoding interval for performing the decoding sub-steps i., ii., and iii.; and setting a measurement interval for receiving the L input levels.

30. The apparatus of claim 29.

33. said P ordered series of input levels being generated by applying a corresponding coding method to said one or more media signals; the code set for each of the ordered series of input levels is identical to the code set applied in a corresponding encoding method; The one or more reconstructed media signals may include a reconstructed version of the one or more media signals.

30. The apparatus of claim 29.

34. the ordered series of input levels being analog input levels; The samples collected from the output vector are analog samples.

30. The apparatus of claim 29.

35. The samples collected from the output vector are digital samples.

30. The apparatus of claim 29.

36. Transmitting an up cable status signal to the same electromagnetic path as the ordered series of input levels or to a separate electromagnetic path.

30. The apparatus of claim 29.

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