SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS

Abstract

To form a wiring with a low resistance value on a substrate.SOLUTION: A substrate processing method includes a first oxide removing step of supplying first processing gas to a substrate provided with a first metal film and a silicon-containing film to remove a metal oxide on the surface of the first metal film, a silicide forming step of supplying second processing gas to the substrate to silicide the surface of the silicon-containing film, and a film forming step of supplying a film forming gas to the substrate to stack a second metal film on the first metal film and the silicide after the first oxide removing step and the silicide forming step.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a substrate processing method and a substrate processing apparatus. [Background technology]

[0002] In manufacturing a semiconductor device, metal wiring is formed on a semiconductor wafer (hereinafter, referred to as a wafer) that is a substrate. In the process of forming this wiring, a process of removing oxides on the surface of the metal film may be performed. For example, Patent Document 1 describes a method of removing the oxides on a tungsten film. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-59916 A Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present disclosure is to provide a technique capable of forming wiring having a low resistance value on a substrate. [Means for solving the problem]

[0005] The substrate processing method of the present disclosure includes a first oxide film removal step of supplying a first process gas to a substrate having a first metal film and a silicon-containing film provided thereon, to remove a metal oxide film on a surface of the first metal film; a metal silicide forming step of supplying a second process gas to the substrate to form a metal silicide film on a surface of the silicon-containing film; The first oxidation film a film formation step of supplying a film formation gas to the substrate after the removing step and the metal silicide forming step to laminate a second metal film on the first metal film and the metal silicide film; Equipped with 、 the first process gas is a gas containing a halide; the first oxide film removal step is performed without generating plasma from the first process gas; the first process gas and the second process gas are gases containing the same metal halide, The metal silicide forming step is performed by converting the second process gas into plasma. Effect of the Invention

[0006] According to the present disclosure, wiring with low resistance can be formed on a substrate. [Brief description of the drawings]

[0007] [Figure 1A] FIG. 2 is a cross-sectional side view of a wafer undergoing processing according to one embodiment of the present disclosure. [Figure 1B] FIG. 2 is a vertical cross-sectional side view of the wafer. [Figure 1C] FIG. 2 is a vertical cross-sectional side view of the wafer. [Figure 2A] FIG. 2 is a vertical cross-sectional side view of the wafer. [Figure 2B] FIG. 2 is a vertical cross-sectional side view of the wafer. [Figure 2C] FIG. 2 is a vertical cross-sectional side view of the wafer. [Diagram 3] 1 is a flow chart showing a process flow performed on the wafer A. FIG. [Figure 4] FIG. 2 is a plan view showing an embodiment of a substrate processing apparatus for performing the above-mentioned processing. [Diagram 5] 2 is a vertical sectional side view showing an example of a processing module provided in the substrate processing apparatus; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In order to explain an embodiment of the substrate processing method of the present disclosure, the structure of a wafer A, which is a substrate before processing, will be described. Fig. 1A is a vertical cross-sectional side view showing a surface layer of the wafer A before processing. The wafer A is made of, for example, Si (silicon), but the layer made of Si (Si layer) is omitted.

[0009] An SiOx (silicon oxide) layer 11 is formed on the upper side of the Si layer, and a vertically long hole is formed in this SiOx layer 11, and a W (tungsten) film 21 is provided on the lower side of the hole. The lower side of this W film 21 is formed so as to be recessed into the Si layer, forming a wiring structure called a Buried Power Rail (BPR) aimed at miniaturizing semiconductor devices manufactured from the wafer A.

[0010] The SiOx layer 11 and W film 21 form a recess 12 that opens upward. The sidewall of the recess 12 is formed of the SiOx layer 11, and the sidewall of the recess 12 is configured with a step 13 so that the opening width at the upper side is larger than that at the lower side. The step 13 made of the SiOx layer 11 has a hole along the vertical direction (thickness direction of the wafer A), and a Si film 22 is embedded in the hole. The upper part of the Si film 22 protrudes slightly from the upper surface of the step 13. The Si film 22 is configured as, for example, a source or drain of a semiconductor device manufactured from the wafer A, and its lower end is connected to the Si layer.

[0011] Since the films and layers are configured as described above, the bottom of the recess 12 is configured by the W film 21, the SiOx layer 11 forming the step 13, and the Si film 22. The surfaces of the W film 21 and the Si film 22 facing the inside of the recess 12 are naturally oxidized to become a WOx film (tungsten oxide film) 23 and a SiOx film 24, respectively.

[0012] To summarize the processing of the above wafer A, a Ru (ruthenium) film 27 is formed as a metal wiring in the recess 12, and is laminated with the W film 21 and the Si film 22 to make electrical contact. In forming this contact, the surface layer of the Si film 22 is metal-silicided with Ti (titanium). Furthermore, prior to this metal-silicidation and the formation of the Ru film, the WOx film 23 and the SiOx film 24 are removed.

[0013] A series of processes performed on wafer A will be described below with reference to Figs. 1B, 1C, and 2A-2C, which show changes in the surface of wafer A. Also, reference will be made to the process flow chart of Fig. 3 as appropriate. During the series of processes shown in this flow chart, the environment surrounding wafer A is a vacuum atmosphere. In other words, wafer A is not exposed to the atmosphere during this series of processes. Each process is performed with wafer A housed in a process container.

[0014] First, NH3 gas and HF gas, which are the third process gases, are supplied to the wafer A. These gases react with the SiOx film 24, and the SiOx film 24 is changed (transformed) into an ammonium fluorosilicate (AFS) film 24A (FIG. 1B, step S1). Next, an inert gas, for example, N2 gas, is supplied to the wafer A, and the wafer A is heated to a temperature higher than that at the time of performing step S1. As a result, the AFS film 24A is sublimated and removed from the surface of the wafer A, and the Si film 22 is exposed in the recess 12 (FIG. 1C, step S2).

[0015] Next, while the wafer A is at a temperature of, for example, about 400° C., TiCl4 (titanium tetrachloride) gas is supplied to the wafer A as a first process gas. The WOx film 23, which is a metal oxide film, reacts with the TiCl4 gas and is etched, and the W film 21 is exposed in the recess 12 (FIG. 2A, step S3). Next, while the wafer A is at the same temperature as when step S3 is performed, TiCl4 gas and H2 gas, which is a reducing gas for TiCl4, are supplied to the wafer A as a second process gas, and these gases are turned into plasma to perform plasma CVD. During this process, TiCl4 is reduced to generate Ti, and a Ti film 25, which becomes a wiring barrier film, is formed so as to cover the SiOx layer 11. That is, the Ti film 25, which is a third metal film, is formed so as to cover the sidewall of the recess 12. Ti is also deposited on the Si film 22, and the Ti reacts with the surface of the Si film 22 due to plasma energy to form a TiSix (titanium silicide) film 26 as a metal silicide film. That is, the TiSix film 26 is formed so as to cover the Si film 22 (FIG. 2B, step S4). Since Ti has a relatively low adsorptivity to the W film 21, the formation of the Ti film 25 on the W film 21 is suppressed in step S4.

[0016] Thereafter, the temperature of the wafer A is set to a temperature lower than that during the execution of steps S3 and S4, for example, a temperature of 200° C. or lower. Then, the wafer A is supplied with a film forming gas, for example, Ru3(CO) 12 Gas is supplied and CVD is performed. As a result, the Ru film 27 is formed so as to be embedded in the recess 12 (FIG. 2C, step S5). Therefore, as described above, a contact is formed between the Ru film 27 and the W film 21, and a contact is formed between the Ru film 27 and the Si film 22 via the TiSix film 26. Steps S1 and S2 correspond to a second oxide film removal step, step S3 corresponds to a first oxide film removal step, step S4 corresponds to a metal silicide formation step, and step S5 corresponds to a film formation step.

[0017] If WOx is present between the Ru film 27 and the W film 21, the wiring resistance between the Ru film 27 and the W film 21 will increase. However, since the WOx film 23 is removed in the above step S3, the wiring resistance can be reduced. If SiOx is present between the Ru film 27 and the Si film 22, the wiring resistance between the Ru film 27 and the Si film 22 will increase. However, since the SiOx film 24 is removed in steps S1 and S2 as described above, the wiring resistance can also be reduced. Furthermore, since the surface of the Si film 22 is metal silicided in step S4 and the Si film 22 and the Ru film 27 are connected via the TiSix film 26 in step S5, the wiring resistance between the Si film 22 and the Ru film 27 can be more reliably reduced. Therefore, the wiring resistance can be reduced for the semiconductor device manufactured from the wafer A on which the above steps S1 to S5 have been performed.

[0018] Next, a substrate processing apparatus 3, which is an embodiment of a substrate processing apparatus capable of performing steps S1 to S5, will be described with reference to the plan view of Fig. 4. The substrate processing apparatus 3 includes a loader module 31, a load lock module 35, a first vacuum transfer module 41, a second vacuum transfer module 42, a connection module 43, a first processing module 51, a second processing module 52, a third processing module 53, and a fourth processing module 54. In the following description, the first vacuum transfer module 41 and the second vacuum transfer module 42 may be collectively referred to as vacuum transfer modules 41, 42. The first to fourth processing modules 51 to 54 may be simply referred to as processing modules 51 to 54.

[0019] The loader module 31, the load lock module 35, the first vacuum transfer module 41, the connection module 43, and the second vacuum transfer module 42 are arranged in a straight line in this order in the horizontal direction. In the following description of the substrate processing apparatus 3, the side where the loader module 31 is located is referred to as the front side, and the side where the second vacuum transfer module 42 is located is referred to as the rear side.

[0020] The loader module 31 includes a housing whose interior is at atmospheric pressure, a transport mechanism 32 for wafer A provided in the housing, and a load port 33. In this example, four load ports 33 are provided in a row on the left and right side of the front side of the housing. A transport container 34 for storing wafer A, called a FOUP (Front Opening Unified Pod), is placed on each load port 33. The transport mechanism 32 is formed of, for example, a multi-joint arm that can move left and right, and can transport wafer A between the transport container 34 on each load port 33 and each load lock module 35.

[0021] In this embodiment, three load lock modules 35 are provided side by side. The load lock module 35 has a housing, and the housing is connected to the loader module 31 and the first vacuum transfer module 41 via gate valves G provided at the front and rear sides, respectively. When the gate valves G at the front and rear sides of the housing are closed, the pressure inside the housing can be freely changed between atmospheric pressure and vacuum pressure. In addition, a stage (not shown) on which the wafer A is placed is provided inside the housing, and the stage is configured to be able to deliver the wafer A to the transfer mechanism 32 and the vacuum transfer mechanism 44 (described later) that access the load lock module 35, respectively.

[0022] The first vacuum transfer module 41 and the second vacuum transfer module 42 are configured similarly to each other and include housings 41A and 42A, respectively. An exhaust port 45 is opened in each of the housings 41A and 42A, and one end of an exhaust pipe is connected to the exhaust port 45. The other end of the exhaust pipe is connected to an exhaust mechanism 46 formed of a turbo molecular pump, and the inside of the housing 41A and the inside of the housing 42A are each maintained in a vacuum atmosphere by exhaust from the exhaust port 45 by the exhaust mechanism 46.

[0023] In this embodiment, two connection modules 43 are provided side by side. The connection module 43 includes a housing 43A, which is connected to the housings 41A and 42A of the vacuum transfer modules 41 and 42. The inside of the housing 43A of the connection module 43 is made into a vacuum atmosphere with the same pressure as the inside of the housings 41A and 42A by exhausting the air by the exhaust mechanism 46. A wafer W is placed in the housing 43A, and a stage (not shown) configured to be able to transfer the wafer W between the housing 43A and the vacuum transfer mechanism 44 described later is provided.

[0024] Hereinafter, the interiors of the housings 41A, 42A, and 43A, which are kept under a vacuum atmosphere by the exhaust mechanism 46, will be collectively referred to as the vacuum transfer path 40 for the wafer A. To provide a further explanation of the housings 41A and 42A, these housings 41A and 42A each include an N2 (nitrogen) gas supply unit (not shown), and the N2 gas is supplied into the housings 41A and 42A, respectively. This keeps the pressure in the vacuum transfer path 40 at a predetermined pressure higher than the pressure in the processing vessels constituting the processing modules 51 to 54, thereby preventing the inflow of gas into the vacuum transfer path 40. When no N2 gas is supplied by the N2 gas supply unit, the exhaust mechanism 46 exhausts the vacuum transfer path 40 at a pressure of 1×10 -7 Torr (1.333×10 -5 The reason for such a configuration will be described later.

[0025] A first processing module 51 and a third processing module 53 are connected to one of the left and right sides of the housing 41A of the first vacuum transfer module 41 via a gate valve G1, and these processing modules 51 and 53 are arranged side by side in the front and rear. A second processing module 52 and a third processing module 53 are connected to the other of the left and right sides of the housing 41A via a gate valve G1, and these processing modules 52 and 53 are arranged side by side in the front and rear. Two fourth processing modules 54 are connected to one of the left and right sides of the housing 42A of the second vacuum transfer module 42 via the gate valve G1. Two third processing modules 53 are arranged side by side in the front and rear on each of the left and right sides of the housing 42A. The processing modules 51 to 54 can process the wafer A in parallel with each other. Since the processing by the fourth processing module 54 takes more time than the processing by the other processing modules 51 to 53, in this example, the number of the fourth processing modules 54 is the largest among the processing modules 51 to 54, thereby improving the throughput.

[0026] A vacuum transfer mechanism 44 is provided in the housings 41A and 42A, and is configured, for example, by an articulated arm that can move back and forth. The vacuum transfer mechanism 44 in the housing 41A transfers the wafer A between the load lock module 35, the connection module 43, the first processing module 51, the second processing module 52, and the third processing module 53. The vacuum transfer mechanism 44 in the housing 42A transfers the wafer A between the connection module 43 and the fourth processing module 54.

[0027] Correspondence between the processes performed in each of the process modules 51 to 54 and each step S described in the flow of FIG. 3 is shown. Step S1 is performed in the first process module 51, step S2 is performed in the second process module 52, steps S3 and S4 are performed in the third process module 53, and step S5 is performed in the fourth process module 54. Each of the process modules 51 to 54 includes a process vessel 61 that is evacuated so that the inside is a vacuum atmosphere, and each step S is performed in the process vessel 61. Therefore, the above-mentioned steps S2 and S3 are performed on the wafer A in the same process vessel 61. The third process module 54 constitutes a first process gas supply unit and a second process gas supply unit, and the process vessel 61 of the third process module 54 corresponds to the first process vessel. And the process vessel 61 of the fourth process module 54 that constitutes a film forming gas supply unit corresponds to the second process vessel.

[0028] The substrate processing apparatus 3 includes a control unit 30, which is a computer, and the control unit 30 includes a program. The program includes commands (each step) for processing the wafer A and transporting the wafer A, and the program is stored in a storage medium, such as a compact disc, a hard disk, or a DVD, and is installed in the control unit 30. The control unit 30 outputs control signals to each part of the substrate processing apparatus 3 by the program, and controls the operation of each part. Specifically, the control unit 30 controls the operation of the processing modules 51 to 54, the opening and closing of the gate valves G and G1, the operation of the transport mechanism 32, the operation of each vacuum transport mechanism 44, the operation of the exhaust mechanism 46, the switching of the pressure in the load lock module 35, and the like. The control of the operation of the processing modules 51 to 54 specifically includes, for example, the temperature control of the wafer A by supplying power to the heater 66, which will be described later, the control of the supply and cut-off of each gas into the processing container 61, and the control of the formation of plasma by turning on and off the high frequency power source 73 for the processing module 53.

[0029] The transfer path of the wafer A in the substrate processing apparatus 3 will be described below. First, the wafer A is transferred in the order of the transfer container 34, the loader module 31, the load lock module 35, and the first vacuum transfer module 41. The wafer A is then transferred in the order of the first processing module 51, the first vacuum transfer module 41, the second processing module 52, the first vacuum transfer module 41, the third processing module 53, the first vacuum transfer module 41, the connection module 43, the second vacuum transfer module 42, and the fourth processing module 54. Thereafter, the wafer A is transferred in the order of the second vacuum transfer module 42, the connection module 43, the first vacuum transfer module 41, the load lock module 35, and the loader module 31, and is returned to the transfer container 34.

[0030] The pressure inside the housing of the load lock module 35 is switched from atmospheric pressure to vacuum when the wafer A is transferred to the first vacuum transfer module 41, and from vacuum to atmospheric pressure when the wafer A is transferred to the loader module 31. Then, from when the wafer A is transferred into the first vacuum transfer module 41 until when the wafer A is transferred out of the first vacuum transfer module 41, the wafer A is transferred between the processing containers 61 of the processing modules 51 to 54 via the vacuum transfer path 40, so that the wafer A is not exposed to the atmospheric atmosphere while the series of processes in steps S1 to S5 are being performed as described above.

[0031] Next, an example of the third process module 53 which performs steps S3 and S4 as a representative among the process modules 51 to 54 will be described with reference to the vertical side view of Fig. 5. As described above, the third process module 53 includes a process container 61, and the transfer port for the wafer A formed in the side wall of the process container 61 is opened and closed by the gate valve G1. The process container 61 in the third process module 53 is grounded. One end of an exhaust pipe 62 opens in the wall of the process container 61, and an exhaust mechanism 63 provided at the other end of the exhaust pipe 62 exhausts the inside of the process container 61 to a vacuum atmosphere of a desired pressure.

[0032] A stage 64 on which the wafer A is placed is provided within the processing vessel 61, and the wafer A is transferred between the stage 64 and the vacuum transfer mechanism 44 by means of lift pins 65 configured to be freely raised and lowered on the stage 64. A heater 66 is embedded in the stage 64, and heats the wafer A to the aforementioned temperature during processing. Also, an electrode 67 for generating plasma is embedded in the stage 64, and the electrode 67 is grounded.

[0033] A gas shower head 71 is provided on the ceiling of the processing vessel 61 via an insulating member 68. A high-frequency power supply 73 is connected to the gas shower head 71 via a matching box 72. The gas shower head 71 and the electrode 67 of the stage 64 are configured as parallel plate electrodes, and a plasma can be formed between the gas shower head 71 and the stage 64 by supplying high-frequency power from the high-frequency power supply 73.

[0034] The downstream end of a gas supply path 74 is connected to the gas shower head 71. The upstream side of the gas supply path 74 branches to form gas paths 75, 76, and 77. The upstream end of the gas path 75 is connected to a TiCl4 gas supply source 75A, the upstream end of the gas path 76 is connected to an H2 gas supply source 76A, and the upstream end of the gas path 77 is connected to an Ar gas supply source 77A. The Ar (argon) gas is a plasma forming gas and also a carrier gas for the TiCl4 gas and the H2 gas.

[0035] Gas supply devices 78 including valves and mass flow controllers are provided in the gas flow paths 75-77, and supply and cut off of each gas to the downstream side according to a control signal from the control unit 30. With this configuration, TiCl4 gas, Ar gas, and H2 gas can be independently supplied into the processing vessel 61. In step S3, TiCl4 gas and Ar gas are supplied into the processing vessel 61. At this time, the high frequency power supply 73 is turned off, and as described above, no plasma is formed in the processing vessel 61, and the WOx film 23 is etched. Then, in step S4, TiCl4 gas, Ar gas, and H2 gas are supplied into the processing vessel 61. At this time, the high frequency power supply 73 is turned on, and as described above, plasma is formed in the processing vessel 61, and the Ti film 25 and the TiSix film 26 are formed.

[0036] The process modules 51, 52, and 54 other than the third process module 53 will be briefly described below, focusing on the differences from the third process module 53. These process modules 51, 52, and 54 are not provided with a high frequency power supply 73 or an electrode 67 of the stage 64, and are configured such that plasma is not generated in the process vessel 61. In addition, gases corresponding to the processes performed in each process module are stored as gas supply sources for supplying gas into the process vessel 61. Except for these differences, the process modules 51, 52, and 54 are configured generally similarly to the third process module 53, and therefore, the wafer A on the stage 64 in each process vessel 61 can be heated to the exemplified temperatures while the exemplified gases are supplied to the wafer A to perform the processes.

[0037] As described above, steps S3 and S4 are performed in the third processing module 53, and step S5 is performed in the fourth processing module 54. That is, steps S3, S4, and step S5 are performed by storing wafer A in a different processing vessel 61. This is because the processing temperature of wafer A in steps S3 and S4 is different from the processing temperature of wafer A in step S5, as described above. That is, by performing the processing in separate processing vessels 61 in this way, it is not necessary to change the temperature of stage 64 in each processing vessel 61, and the apparatus is configured to improve throughput. Note that steps S3, S4, and S5 are performed in different processing vessels in this way because the cleaning method in processing vessel 61 is different between steps S3 and S4 using Ti for processing and step S5 using Ru for processing.

[0038] Therefore, as explained in the description of the transfer path of the substrate processing apparatus 3, a transfer process is performed in which the wafer A is transferred from the processing chamber 61 of the third processing module 53 to the processing chamber 61 of the fourth processing module 54 through the vacuum transfer path 40. If water molecules remain in the vacuum transfer path 40 during the transfer process, the surface of the W film 21 will be re-oxidized by oxygen derived from the water molecules. In other words, although the WOx film 23 is removed in step S3, the WOx film 23 will be formed again before the formation of the Ru film 27.

[0039] Therefore, in the substrate processing apparatus 3, after the vacuum transfer path 40 is opened to the atmosphere for maintenance or the like, the pressure in the vacuum transfer path 40 is reduced to 1×10 -7 By setting the pressure to be lower than Torr, water molecules are almost completely removed from the vacuum transfer path 40. Although the removal of water molecules remaining in the vacuum transfer path 40 has been described, each component leaking into the vacuum transfer path 40 is also removed by this evacuation. Therefore, each molecule that is a factor in forming the WOx film 23, such as oxygen molecules contained in the components, is also removed at the same time. At this time, N2 gas is not supplied to the vacuum transfer path 40.

[0040] Thereafter, while maintaining the exhaust state by the exhaust mechanism 46 (assuming no gas supply to the vacuum transfer path 40), -7 While maintaining the evacuation state where the pressure is lower than 10 Torr), N2 gas is supplied to the vacuum transfer path 40 to increase the pressure in the vacuum transfer path 40. This prevents gas from flowing from the processing vessel 61 into the vacuum transfer path 40 as described above. Then, with evacuation and N2 gas being supplied in this state, the wafer A is transferred to the vacuum transfer path 40 and is handed over between the processing modules 51 to 54 in the order described above for processing. As described above, the vacuum transfer path 40 is opened to a pressure of 1×10 -7 After the pressure is lowered to below Torr, the wafer A is transferred and processed, and until the processing of the wafer A is completed, the vacuum transfer path 40 is not exposed to the atmosphere.

[0041] As described above, the wafer A passes through the vacuum transfer path 40 in a state where there are almost no water molecules, and is transferred from the third processing module 53 to the fourth processing module 54. Therefore, the re-formation of the WOx film 23 during this transfer is prevented. Although the prevention of the re-formation of the WOx film 23 has been described, since the water molecules in the vacuum transfer path 40 have been removed in this way, the re-formation of the SiOx film 24 is also prevented from occurring after the SiOx film 24 is removed in steps S1 and S2, until the Ru film 27 is formed.

[0042] In addition, the above 1 × 10 -7 The pressure lower than Torr is a pressure at which a single layer of oxygen atoms does not adhere to the film when the time required for transferring the wafer A between the processing chambers 61 is 20 seconds or less. Therefore, when transferring the wafer A along the transfer path described above, if the time required for transferring from one processing module to the next processing module is 20 seconds or less, oxidation of the surface of the wafer W can be avoided and the surface can be kept clean. The transfer operation of the vacuum transfer mechanism 44 may be controlled in this manner.

[0043] Incidentally, in step S3, it is also possible to remove the WOx film 23 by performing plasma etching. However, by performing etching without forming plasma using gas made of TiCl4, which is a halide, as described above, damage to the SiOx layer 11 is prevented. As a result, the reliability of the wiring of the semiconductor device can be increased.

[0044] Steps S3 and S4 are performed in the same processing vessel 61 of the third processing module 53, that is, in the same processing vessel 61. This shortens the time from the end of step S3 to the start of step S4, thereby improving the throughput of the substrate processing apparatus 3. In addition, sharing the processing vessel 61 in this way has the advantage of simplifying the configuration of the substrate processing apparatus 3.

[0045] Furthermore, when steps S3 and S4 are performed in the common processing chamber 61, TiCl4 gas is used in each of steps S3 and S4, and different processes are performed on the wafer A depending on whether plasma is generated and whether H2 gas is supplied. Since TiCl4 gas is used in common in steps S3 and S4, the piping system connected to the processing chamber 61 can be simplified, which has the advantage of reducing the manufacturing and operating costs of the apparatus.

[0046] In addition, the removal of the WOx film 23 in step S3 may use a gas made of a halide other than TiCl4. Specific examples include BCl3 gas, WF6 gas, WCl5 gas, WCl6 gas, and the like. In addition, a halide of Mo or a halide of Ti other than TiCl4 may be used. However, since it is preferable to use a common gas in steps S3 and S4 as described above, it is preferable to use TiCl4 gas, which is a metal halide, in step S3. Even if a gas made of a halide different from the TiCl4 gas used in step S4, such as the BCl3 gas, is used in step S3, these steps S3 and S4 can be performed on the wafer A in the same processing vessel 61. In addition, in this step S3, it has been described that Ar gas is supplied as an inert gas together with the halogen-containing gas, but the inert gas is not limited to Ar gas and may be, for example, N2 gas.

[0047] The Ru film 27 was formed in the recess 12 using Ru3(CO) 12 For example, a gas containing (2,4-dimethylpentadienyl)(ethylcyclopentadienyl)ruthenium[(Ru(DMPD)(EtCp)], bis(2,4-dimethylpentadienyl)Ruthenium[Ru(DMPD)2], (4-dimethylpentadienyl)(methylcyclopentadienyl) Ruthenium[(Ru(DMPD)(MeCp)], Bis(Cyclopentadienyl)Ruthenium[(Ru(C5H5)2], Cis-dicarbonyl bis(5-methylhexane-2,4-dionate)ruthenium(II), bis(ethylcyclopentadienyl)Ruthenium(II)[Ru(EtCp)2], Ru(chd)(ipmb), Ru(EtBz)(EtCHD) or the like may be used as a deposition gas containing Ru3(CO) 12 The Ru film 27 can be formed by using the same instead of the above.

[0048] The second metal film formed in the recess 12 is preferably a Ru film 27 in order to reduce the wiring resistance, but is not limited to the Ru film 27. For example, by supplying a film forming gas, a Mo (molybdenum) film or a W film can be formed instead of the Ru film 27, which is preferable because it can provide a relatively small wiring resistance. Note that, although an example in which the Ru film 27 is laminated on the W film 21, which is the first metal film, is shown, this first metal film is not limited to a W film, and may be a Ru film or a Mo film, which are exemplified as the second metal film.

[0049] In the above example, the silicon-containing film to be metal silicided is the Si film 22, but is not limited to the Si film 22. Specifically, it may be, for example, a SiGe (silicon germanium) film. Note that the silicon-containing film referred to here means a film composed of silicon itself (i.e., a Si film) or a film composed of multiple components, one of which is silicon, such as the above-mentioned SiGe film, and does not mean a film containing silicon as an impurity.

[0050] The above-mentioned substrate processing apparatus 3 may be configured such that, for example, the first processing module 51 and the second processing module 52 are not provided, and steps S1 and S2 are not performed. Specifically, for example, the SiOx film 22 may be removed by wet etching outside the substrate processing apparatus 3, and then the wafer A may be transported to the substrate processing apparatus 3. In this way, in the substrate processing apparatus 3, only the processes subsequent to the removal of the WOx film 23 in step S3 and thereafter may be performed. The above-mentioned vacuum transport path 40 may be configured to have a width of 1×10 -7 Regarding the pressure being set lower than Torr, in the case of an apparatus configuration in which only the processes after step S3 are performed, the vacuum transfer path 40 only needs to reach a vacuum degree within the above range before the wafer W is transferred to the vacuum transfer path 40 after the removal of the WOx film 23 is completed. This prevents the WOx film 23 from being reformed at each stage until the formation of the Ru film 27 after the removal of the WOx film 23. In the case where the SiOx film 24 is also removed in the substrate processing apparatus 3, such a vacuum degree may be achieved, for example, before the wafer W is transferred from the second processing module 52 to the vacuum transfer path 40 after the removal of the SiOx film 24 is completed. Alternatively, the vacuum transfer path 40 may reach a vacuum degree in the above range at the timing before the wafer W is transferred from the load lock module 35 to the vacuum transfer path 40 as described above.

[0051] 3, the removal of the WOx film 23 in step S3 is performed first, followed by the formation of silicide and the deposition of the Ti film 25 in step S4. However, step S4 may be performed first, followed by step S3. In that case, however, a Ti film will be formed on the WOx film 23 in step S4. For this reason, it may take a relatively long time to complete the removal of the WOx film 23 in the later step S3, and therefore it is preferable to perform steps S3 and S4 in that order as described in FIG.

[0052] It should be noted that the embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The above-described embodiments may be omitted, substituted, modified, or combined in various forms without departing from the scope and spirit of the appended claims. [Explanation of symbols]

[0053] A Wafer 21 W membrane 22Si film 23 WOx membrane 26 TiSix membrane 27 Ru membrane

Claims

1. a first oxide film removal step of supplying a first process gas to a substrate provided with a first metal film and a silicon-containing film to remove a metal oxide film on a surface of the first metal film; a metal silicide forming step of supplying a second process gas to the substrate to form a metal silicide film on a surface of the silicon-containing film; a film formation step of supplying a film formation gas to the substrate to laminate a second metal film on the first metal film and the metal silicide film after the first oxide film removal step and the metal silicide formation step; Equipped with the first process gas is a gas containing a halide; the first oxide film removal step is performed without generating plasma from the first process gas; the first process gas and the second process gas are gases containing the same metal halide, The metal silicide forming step is performed by generating plasma from the second process gas.

2. 2. The substrate processing method according to claim 1, wherein the metal silicide forming step is performed after the first oxide film removing step.

3. 3. The substrate processing method according to claim 1, further comprising the steps of: before the metal silicide forming step, supplying a third process gas to the substrate to modify the silicon oxide film on the surface of the silicon-containing film; and heating the substrate to sublimate and remove the modified silicon oxide film.

4. 4. The substrate processing method according to claim 1, wherein the metal halide is titanium tetrachloride.

5. the first metal film and the silicon-containing film constitute a bottom of a recess having a sidewall formed of silicon oxide; the metal silicide forming step includes a step of forming a third metal film so as to cover a side wall of the recessed portion; 5. The substrate processing method according to claim 1, wherein the film forming step is a step of filling the recess in which the third metal film is formed with the second metal film.

6. 6. The substrate processing method according to claim 1, wherein the second metal film is a ruthenium film, a tungsten film or a molybdenum film.

7. 7. The substrate processing method according to claim 1, wherein the first oxide film removing step and the metal silicide forming step are performed on the substrate within the same processing vessel.

8. the first oxide film removal step is performed on the substrate in a first processing chamber, the inside of which is kept in a vacuum atmosphere; the film forming step is performed on the substrate in a second processing vessel different from the first processing vessel, the second processing vessel having a vacuum atmosphere inside; a transport step of transporting the substrate from the first processing vessel to the second processing vessel through a transport path in a vacuum atmosphere after the first oxide film removal step is performed; In the transport step, before the substrate is transported to the transport path, the pressure of the transport path is set to 1.333×10 －５ a pressure of less than 100 Pa; The method for processing a substrate according to any one of claims 1 to 7, further comprising:

9. A first processing gas supply unit that supplies a first processing gas for removing a metal oxide film on a surface of a first metal film to a substrate on which the first metal film and a silicon-containing film are provided; a second process gas supply unit that supplies a second process gas to the substrate for forming a metal silicide film on a surface of the silicon-containing film; a mechanism for generating plasma from the second process gas; a deposition gas supply unit for supplying a deposition gas to the substrate to which the first process gas and the second process gas have been supplied, and for stacking a second metal film on the first metal film and the metal silicide film; Equipped with the first process gas is a gas containing a halide; supplying the first process gas to the substrate without generating a plasma in order to remove the metal oxide film; the first process gas and the second process gas are gases containing the same metal halide, The metal silicide film is formed by converting the second process gas into plasma.

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