Power Conversion Equipment
The power conversion device addresses downsizing challenges by reducing reactors and capacitors through innovative semiconductor and diode configurations, achieving efficient voltage transformation with minimal component count and reduced losses.
Patent Information
- Application Number
- JP2021182598
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-11-09
- Publication Date
- 2025-01-15
- Estimated Expiration
- 2041-11-09
AI Technical Summary
Existing power converters face challenges in downsizing due to limitations in mounting space, necessitating a reduction in the number of passive and semiconductor elements.
A power conversion device with a novel configuration that reduces the number of reactors and capacitors by integrating semiconductor switches and diodes in series connections, along with intermediate capacitors, and employs a control device to manage switching modes for efficient voltage transformation.
The proposed configuration achieves a downsized power conversion device with reduced component count and loss, enabling efficient voltage boosting or stepping down while maintaining high frequency operation without excessive switching frequency increases.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present invention relates to a power conversion device that transforms a voltage inputted from an input terminal and outputs the transformed voltage from an output terminal. [Background technology]
[0002] Known as this type of power conversion device is a boost converter that uses LC resonance to achieve a boost ratio of 1.5, as described in Patent Document 1. In detail, the boost converter shown in Fig. 5 of Patent Document 1 includes four switches, four diodes, two reactors, and five capacitors. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] U.S. Pat. No. 1,063,7352 Summary of the Invention [Problem to be solved by the invention]
[0004] Due to space limitations in the installation location of the power conversion device, there is a demand for miniaturization of the power conversion device, and therefore it is desirable to reduce the number of passive elements, including reactors, and semiconductor elements, including switches.
[0005] A primary object of the present invention is to provide a power conversion device capable of reducing the number of components. [Means for solving the problem]
[0006] The present invention relates to a power conversion device that transforms a voltage input from an input terminal and outputs the transformed voltage from an output terminal, a series connection of an upper arm first semiconductor portion and an upper arm second semiconductor portion; a series connection of an intermediate arm first switch portion and an intermediate arm second switch portion; a series connection of a lower arm first semiconductor portion and a lower arm second semiconductor portion; a series connection of a reactor and a first intermediate capacitor that connects a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion and a connection point between the intermediate arm second switch portion and the lower arm first semiconductor portion; The power supply includes a second intermediate capacitor provided in an electrical path connecting a connection point between the intermediate arm first switch section and the intermediate arm second switch section and a connection point between the lower arm first semiconductor section and the lower arm second semiconductor section.
[0007] The present invention can be embodied as a power conversion device having a boost function, for example, as follows.
[0008] A power conversion device that boosts a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals and outputs the boosted voltage from a high potential side output terminal and a low potential side output terminal as the output terminals, the upper arm first semiconductor portion is an upper arm first diode portion, the upper arm second semiconductor portion is an upper arm second diode portion, the lower arm first semiconductor portion is a lower arm first switch portion, the lower arm second semiconductor portion is a lower arm second switch portion, the high potential side output terminal is connected to the cathode of the upper arm first diode portion, a high potential side of both ends of the intermediate arm first switch section is connected to an anode of the upper arm second diode section; a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section, the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, The high potential side input terminal is connected to a connection point between the upper arm second diode portion and the intermediate arm first switch portion.
[0009] Moreover, the present invention can be embodied as a power conversion device having a boost function, for example, as follows.
[0010] a first high potential side terminal, a first low potential side terminal, a second high potential side terminal, and a second low potential side terminal are provided as the input terminal and the output terminal; the upper arm first semiconductor portion is an upper arm first switch portion, the upper arm second semiconductor portion is an upper arm second switch portion, the lower arm first semiconductor portion is a lower arm first switch portion, the lower arm second semiconductor portion is a lower arm second switch portion, the second high potential side terminal is connected to a high potential side of both ends of the upper arm first switch section, a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section, a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section, the second low potential side terminal and the first low potential side terminal are connected to the low potential side of both ends of the lower arm second switch section, The first high potential side terminal is connected to a connection point between the upper arm second switch portion and the intermediate arm first switch portion.
[0011] Moreover, the present invention can be embodied as a power conversion device having a step-down function, for example, as follows. A power conversion device that steps down a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals, and outputs the voltage from a high potential side output terminal and a low potential side output terminal as the output terminals, the upper arm first semiconductor portion is an upper arm first switch portion, the upper arm second semiconductor portion is an upper arm second switch portion, the lower arm first semiconductor portion is a lower arm first diode portion, the lower arm second semiconductor portion is a lower arm second diode portion, the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the intermediate arm second switch section, the low potential side output terminal and the low potential side input terminal are connected to an anode of the lower arm second diode section, The high potential side output terminal is connected to a connection point between the upper arm second switch portion and the intermediate arm first switch portion.
[0012] According to the present invention, it is possible to reduce the number of reactors and capacitors, which are relatively large among the components of a power conversion device, and to achieve miniaturization of the power conversion device. [Brief description of the drawings]
[0013] [Figure 1] 1 is a configuration diagram of a power conversion device according to a first embodiment. [Diagram 2] 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. [Diagram 3] FIG. 4 is a diagram showing a current flow state in Mode 1. [Figure 4] FIG. 13 is a diagram showing a current flow state in Mode 2. [Diagram 5] FIG. 13 is a diagram showing a current flow state in Mode 3. [Figure 6] FIG. [Figure 7] FIG. 11 is a configuration diagram of a power conversion device according to a second embodiment. [Figure 8] 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. [Figure 9] FIG. 4 is a diagram showing a current flow state in Mode 1. [Figure 10] FIG. 13 is a diagram showing a current flow state in Mode 2. [Figure 11]FIG. 13 is a diagram showing a current flow state in Mode 3. [Figure 12] FIG. 11 is a configuration diagram of a power conversion device according to a third embodiment. [Figure 13] 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. in boost control. [Figure 14] FIG. 4 is a diagram showing a current flow state in Mode 1. [Figure 15] FIG. 13 is a diagram showing a current flow state in Mode 2. [Figure 16] FIG. 13 is a diagram showing a current flow state in Mode 3. [Figure 17] 4 is a time chart showing the transition of the switch drive state, current, voltage, etc. in boost control. [Figure 18] FIG. 4 is a diagram showing a current flow state in Mode 1. [Figure 19] FIG. 13 is a diagram showing a current flow state in Mode 2. [Figure 20] FIG. 13 is a diagram showing a current flow state in Mode 3. [Figure 21] FIG. 13 is a configuration diagram of a power conversion device according to another embodiment. [Figure 22] FIG. 13 is a configuration diagram of a power conversion device according to another embodiment. [Figure 23] FIG. 13 is a configuration diagram of a power conversion device according to another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014] First Embodiment Hereinafter, a first embodiment of a power conversion device according to the present invention will be described with reference to the drawings. The power conversion device is mounted on a moving object such as a vehicle, an aircraft, or a ship. The vehicle is, for example, a hybrid vehicle equipped with a rotating electric machine and an engine, or an electric vehicle equipped with only the rotating electric machine of the rotating electric machine and the engine.
[0015] 1, the power conversion device 10 includes a first capacitor 21, an intermediate arm first switch QM1 (corresponding to the "intermediate arm first switch section"), an intermediate arm second switch QM2 (corresponding to the "intermediate arm second switch section"), a lower arm first switch QL1 (corresponding to the "lower arm first switch section"), and a lower arm second switch QL2 (corresponding to the "lower arm second switch section"). In this embodiment, each of the switches QM1, QM2, QL1, and QL2 is an N-channel MOSFET having a body diode.
[0016] A first end of the first capacitor 21 and a drain of the intermediate-arm first switch QM1 are connected to a first high-potential side terminal TH1 (corresponding to a "high-potential side input terminal") of the power conversion device 10. A drain of the intermediate-arm second switch QM2 is connected to a source of the intermediate-arm first switch QM1, and a drain of the lower-arm first switch QL1 is connected to a source of the intermediate-arm second switch QM2. A drain of the lower-arm second switch QL2 is connected to a source of the lower-arm first switch QL1. A second end of the first capacitor 21 and a first low-potential side terminal TL1 (corresponding to a "low-potential side input terminal") of the power conversion device 10 are connected to a source of the lower-arm second switch QL2. Each of the terminals TH1 and TL1 is connected to, for example, a DC side terminal of an ACDC converter or a secondary battery. The secondary battery is, for example, a lithium-ion storage battery or a nickel-metal hydride storage battery.
[0017] The power conversion device 10 includes an upper arm first diode DH1 (corresponding to the "upper arm first diode section"), an upper arm second diode DH2 (corresponding to the "upper arm second diode section"), and a second capacitor 22. A second high potential side terminal TH2 (corresponding to the "high potential side output terminal") of the power conversion device 10 and a first end of the second capacitor 22 are connected to a cathode of the upper arm first diode DH1. A second low potential side terminal TL2 (corresponding to the "low potential side output terminal") of the power conversion device 10 and a source of the lower arm second switch QL2 are connected to a second end of the second capacitor 22. A cathode of the upper arm second diode DH2 is connected to an anode of the upper arm first diode DH1. A drain of the intermediate arm first switch QM1 is connected to an anode of the upper arm second diode DH2. Each of the terminals TH2 and TL2 is connected to, for example, a DC side terminal of an ACDC converter or a secondary battery. The secondary battery is, for example, a lithium ion battery or a nickel metal hydride battery. In this embodiment, the rated voltage (for example, 450 V) of the DC side terminal of the ACDC converter or the secondary battery connected to the second high potential side terminal TH2 and the second low potential side terminal TL2 is higher than the rated voltage (for example, 300 V) of the DC side terminal of the ACDC converter or the secondary battery connected to the first high potential side terminal TH1 and the first low potential side terminal TL1.
[0018] The power conversion device 10 includes a reactor 30, a first intermediate capacitor 31, and a second intermediate capacitor 32. The first end of the reactor 30 is connected to the anode of the upper-arm first diode DH1 and the cathode of the upper-arm second diode DH2. The second end of the reactor 30 is connected to the first end of the first intermediate capacitor 31. The second end of the first intermediate capacitor 31 is connected to the source of the intermediate-arm second switch QM2 and the drain of the lower-arm first switch QL1. The first end of the second intermediate capacitor 32 is connected to the source of the intermediate-arm first switch QM1 and the drain of the intermediate-arm second switch QM2. The second end of the second intermediate capacitor 32 is connected to the source of the lower-arm first switch QL1 and the drain of the lower-arm second switch QL2.
[0019] The power conversion device 10 includes a first voltage sensor 51 and a second voltage sensor 52. The first voltage sensor 51 detects the voltage across the terminals of the first capacitor 21, and the second voltage sensor 52 detects the voltage across the terminals of the second capacitor 22. The detection values of the voltage sensors 51, 52 are input to a control device 60 included in the power conversion device 10.
[0020] The control device 60 performs switching control of the intermediate arm first switch QM1, the intermediate arm second switch QM2, the lower arm first switch QL1, and the lower arm second switch QL2, thereby performing power conversion processing to boost the voltage input from the first high potential side terminal TH1 (corresponding to the "high potential side input terminal") and the first low potential side terminal TL1 (corresponding to the "low potential side input terminal") and output it from the second high potential side terminal TH2 (corresponding to the "high potential side output terminal") and the second low potential side terminal TL2 (corresponding to the "low potential side output terminal"). Note that the functions provided by the control device 60 can be provided by, for example, software recorded in a physical memory device and a computer that executes the software, hardware, or a combination of these.
[0021] Next, the power conversion process will be described with reference to FIG. 2. In FIG. 2(a), the solid line indicates the transition of the low-voltage side voltage VL detected by the first voltage sensor 51, and the dashed line indicates the transition of the high-voltage side voltage VH detected by the second voltage sensor 52. FIG. 2(b) indicates the transition of the current iCf flowing from the connection point of the upper-arm first diode DH1 and the upper-arm second diode DH2 to the reactor 30, and FIG. 2(c) indicates the transition of the current iL flowing to the first capacitor 21. In FIG. 2(d), the solid line indicates the transition of the driving state of the middle-arm first switch QM1, and the dashed line indicates the transition of the driving state of the middle-arm second switch QM2. In FIG. 2(e), the solid line indicates the transition of the driving state of the lower-arm first switch QL1, and the dashed line indicates the transition of the driving state of the lower-arm second switch QL2. In Fig. 2(f), the solid line indicates the transition of the terminal voltage VDH1 of the upper-arm first diode DH1, and the dashed line indicates the transition of the terminal voltage VDH2 of the upper-arm second diode DH2. In Fig. 2(g), the solid line indicates the transition of the terminal voltage VQM1 (drain-source voltage) of the middle-arm first switch QM1, and the dashed line indicates the transition of the terminal voltage VQM2 of the middle-arm second switch QM2. In Fig. 2(h), the solid line indicates the transition of the terminal voltage VQL1 of the lower-arm first switch QL1, and the dashed line indicates the transition of the terminal voltage VQL2 of the lower-arm second switch QL2. In Fig. 2, the signs of each current and voltage are positive in the direction of the arrow shown in Fig. 1.
[0022] The control device 60 performs a process of repeating one cycle consisting of Mode1, Mode2, Mode3, and Mode2 as a power conversion process. As a result, the input voltage of the first high potential side terminal TH1 and the first low potential side terminal TL1 is multiplied by about 1.5 and output from the second high potential side terminal TH2 and the second low potential side terminal TL2. During the period of Mode1, the intermediate arm second switch QM2 and the lower arm second switch QL2 are turned on, and the intermediate arm first switch QM1 and the lower arm first switch QL1 are turned off. During the period of Mode2, the intermediate arm first and second switches QM1 and QM2 are turned on, and the lower arm first and second switches QL1 and QL2 are turned off. During the period of Mode3, the intermediate arm first switch QM1 and the lower arm first switch QL1 are turned on, and the intermediate arm second switch QM2 and the lower arm second switch QL2 are turned off.
[0023] 3, a current flows in a closed circuit including the upper-arm second diode DH2, the reactor 30, the first intermediate capacitor 31, the intermediate arm second switch QM2, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. In detail, LC resonance occurs in this closed circuit by the reactor 30 and the first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.
[0024] When the capacitance of the first intermediate capacitor 31 is C1, the capacitance of the second intermediate capacitor 32 is C2, and the inductance of the reactor 30 is L, a first resonance period Tc1, which is the resonance period of the LC resonance in Mode 1, is expressed by the following equation (eq1).
[0025]
number
[0026] 4, a current flows in a closed circuit including the intermediate arm first switch QM1, the intermediate arm second switch QM2, the first intermediate capacitor 31, the reactor 30, the upper arm first diode DH1, the second capacitor 22, and the first capacitor 21. In detail, LC resonance occurs between the reactor 30 and the first intermediate capacitor 31, and a sinusoidal current flows in this closed circuit.
[0027] The second resonance period Tc2, which is the resonance period of the LC resonance in Mode 2, is expressed by the following equation (eq2).
[0028]
number
[0029] The control device 60 switches the intermediate arm second switch QM2 off and switches the lower arm first switch QL1 on at a timing when a half cycle (=Tc2×1 / 2) of the second resonance period Tc2 has elapsed since the start of Mode2. This transitions from Mode2 to Mode3. At this time, soft switching of the ZCS can be realized by switching the intermediate arm second switch QM2 off and the lower arm first switch QL1 on, and loss can be reduced.
[0030] 5, a current flows through a closed circuit including the intermediate arm first switch QM1, the upper arm second diode DH2, the reactor 30, the first intermediate capacitor 31, the lower arm first switch QL1, and the second intermediate capacitor 32. In detail, an LC resonance occurs in this closed circuit by the reactor 30 and the first and second intermediate capacitors 31 and 32, and a sinusoidal current flows. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.
[0031] The control device 60 switches the intermediate arm second switch QM2 on and switches the lower arm first switch QL1 off at a timing when a half cycle of the first resonance cycle Tc1 has elapsed since the start of Mode 3. This transitions from Mode 3 to Mode 2. At this time, soft switching of the ZCS can be realized by switching on the intermediate arm second switch QM2 and switching off the lower arm first switch QL1, and thus it is possible to reduce losses.
[0032] The control device 60 switches the intermediate arm first switch QM1 off and switches the lower arm second switch QL2 on at a timing when a half cycle of the second resonance period Tc2 has elapsed since the start of Mode2. This causes a transition from Mode2 to Mode1, and ends one cycle consisting of Mode1, Mode2, Mode3, and Mode2. At this time, soft switching of the ZCS can be realized by switching the intermediate arm first switch QM1 off and the lower arm second switch QL2 on, and loss can be reduced.
[0033] FIG. 6 shows the difference in size between the comparative example and this embodiment. The comparative example is the power conversion device of FIG. 5 of the above-mentioned Patent Document 1. The comparative example requires four switches and their drive circuits, while the present embodiment also requires four. On the other hand, the comparative example requires four diodes, while the present embodiment requires two. Also, the comparative example requires two reactors, while the present embodiment requires one, and in particular, the inductance of the reactor is 1 / 4 of that of the comparative example. Also, the comparative example requires five capacitors, while the present embodiment requires four, and in particular, the capacitance of the capacitor is 2 / 5 of that of the comparative example. In the comparative example and this embodiment, if the sum of the numbers of each component such as diodes is considered to be the size, the size of the comparative example is 19, while the size of this embodiment is 12.5. That is, in this embodiment, the size of the power conversion device 10 is reduced by about 34%.
[0034] In particular, since passive components such as capacitors and reactors tend to be large in size, this embodiment, which can reduce the number of capacitors and reactors, can suitably achieve miniaturization of the power conversion device.
[0035] 2, the current iCf fluctuates at a frequency twice the switching frequency of each of the switches QM1, QM2, QL1, and QL2. This makes it possible to increase the frequency of the voltage applied to the reactor 30 and each of the intermediate capacitors 31 and 32 without excessively increasing the switching frequency of each of the switches QM1, QM2, QL1, and QL2. As a result, it is possible to reduce the size of the reactor 30 and each of the intermediate capacitors 31 and 32 without excessively increasing the switching frequency of each of the switches QM1, QM2, QL1, and QL2.
[0036] In contrast, in the above comparative example, the frequency of the voltage applied to the reactor and the capacitor is the same as the switching frequency of the switch, so that in the comparative example, when the reactor and the capacitor are made smaller, the switching frequency of the switch needs to be increased.
[0037] <Modification of the first embodiment> The timing of switching from one mode to another among Modes 1 to 3 is not limited to the timing when the currents iL and iCf become 0, but may be the timing when the currents iL and iCf become close to 0. The timing when the currents iL and iCf become close to 0 is, for example, the timing when the currents iL and iCf are greater than 0 and are 1 / 10, 1 / 20, or 1 / 40 of the maximum value that the peak values of the currents iL and iCf can take. The timing when the currents iL and iCf become close to 0 is a combination of the timing when the currents iL and iCf become 0 and the timing when the currents iL and iCf become close to 0.
[0038] The reactor 30 is not limited to being provided between the connection point of the upper arm first and second diodes DH1, DH2 and the first intermediate capacitor 31, but may be provided between the first intermediate capacitor 31 and the connection point of the intermediate arm second switch QM2 and the lower arm first switch QL1.
[0039] <Second embodiment> The second embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, as shown in FIG. 7, instead of the upper arm first and second diodes DH1 and DH2, upper arm first and second switches QH1 and QH2 are provided, and instead of the lower arm first and second switches QL1 and QL2, lower arm first and second diodes DL1 and DL2 (corresponding to "lower arm first and second diode section") are provided. In this embodiment, the upper arm first and second switches QH1 and QH2 are N-channel MOSFETs. In FIG. 7, the same components as those shown in FIG. 1 are denoted by the same reference numerals for convenience.
[0040] A drain of the upper-arm first switch QH1 is connected to a first end of the second capacitor 22 and the second high potential side terminal TH2. A source of the upper-arm first switch QH1 is connected to a drain of the upper-arm second switch QH2. A source of the upper-arm second switch QH2 is connected to a drain of the middle-arm first switch QM1.
[0041] The source of the intermediate arm second switch QM2 is connected to the cathode of the lower arm first diode DL1, and the anode of the lower arm first diode DL1 is connected to the cathode of the lower arm second diode DL2. The second ends of the first capacitor 21 and the second capacitor 22 are connected to the anode of the lower arm second diode DL2.
[0042] A first end of the reactor 30 is connected to a connection point between the upper-arm first switch QH1 and the upper-arm second switch QH2. A second end of the first intermediate capacitor 31 is connected to a connection point between the intermediate-arm second switch QM2 and the lower-arm first diode DL1. A second intermediate capacitor 32 connects the connection point between the intermediate-arm first switch QM1 and the intermediate-arm second switch QM2 to the connection point between the lower-arm first diode DL1 and the lower-arm second diode DL2.
[0043] The control device 60 performs a power conversion process in which a voltage inputted from the second high potential side terminal TH2 (corresponding to a "high potential side input terminal") and the second low potential side terminal TL2 (corresponding to a "low potential side input terminal") is stepped down and outputted from the first high potential side terminal TH1 (corresponding to a "high potential side output terminal") and the first low potential side terminal TL1 (corresponding to a "low potential side output terminal") by controlling the switching of the upper arm first switch QH1, the upper arm second switch QH2, and the intermediate arm first switch QM1 and the intermediate arm second switch QM2. This power conversion process will be described with reference to FIG. 8. FIGS. 8(a) to (c) correspond to FIGS. 2(a) to (c). In FIG. 8(d), a solid line indicates a transition in the drive state of the upper arm first switch QH1, and a dashed line indicates a transition in the drive state of the upper arm second switch QH2. In FIG. 8(e), the solid line indicates the transition of the driving state of the intermediate-arm first switch QM1, and the dashed line indicates the transition of the driving state of the intermediate-arm second switch QM2. In FIG. 8(f), the solid line indicates the transition of the terminal voltage VQH1 of the upper-arm first switch QH1, and the dashed line indicates the transition of the terminal voltage VQL2 of the upper-arm second switch QH2. In FIG. 8(g), the solid line indicates the transition of the terminal voltage VQM1 of the intermediate-arm first switch QM1, and the dashed line indicates the transition of the terminal voltage VQM2 of the intermediate-arm second switch QM2. In FIG. 8(h), the solid line indicates the transition of the terminal voltage VDL1 of the lower-arm first diode DL1, and the dashed line indicates the transition of the terminal voltage VDL2 of the lower-arm second diode DL2. In FIG. 8, the signs of the currents and voltages are positive in the direction of the arrows shown in FIG. 7.
[0044] The control device 60 performs a process of repeating one cycle consisting of Mode1, Mode2, Mode3, and Mode2 as a power conversion process. As a result, the input voltages of the second high potential side terminal TH2 and the second low potential side terminal TL2 are multiplied by approximately 0.67 (2 / 3) and output from the first high potential side terminal TH1 and the first low potential side terminal TL1. During the period of Mode1, the upper arm second switch QH2 and the intermediate arm second switch QM2 are turned on, and the upper arm first switch QH1 and the intermediate arm first switch QM1 are turned off. During the period of Mode2, the upper arm first switch QH1 and the intermediate arm first and second switches QM1 and QM2 are turned on, and the upper arm second switch QH2 is turned off. During the period of Mode3, the upper arm second switch QH2 and the intermediate arm first switch QM1 are turned on, and the upper arm first switch QH1 and the intermediate arm second switch QM2 are turned off. Note that each Mode of this embodiment is different from each Mode of the first embodiment.
[0045] 9, a current flows in a closed circuit including the upper-arm second switch QH2, the first capacitor 21, the lower-arm second diode DL2, the second intermediate capacitor 32, the intermediate arm second switch QM2, the first intermediate capacitor 31, and the reactor 30. In detail, LC resonance occurs in this closed circuit by the reactor 30 and the first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.
[0046] The control device 60 switches the upper-arm second switch QH2 off and switches the upper-arm first switch QH1 on at a timing when a half cycle of the first resonance period Tc1 has elapsed since the start of Mode1. The control device 60 also switches the middle arm first switch QM1 on. This transitions from Mode1 to Mode2. At this time, soft switching of the ZCS can be realized by switching on the upper arm first switch QH1 and the middle arm first switch QM1 and switching off the upper arm second switch QH2, and thus it is possible to reduce losses.
[0047] 10, a current flows in a closed circuit including the first capacitor 21, the second capacitor 22, the upper arm first switch QH1, the reactor 30, the first intermediate capacitor 31, the intermediate arm second switch QM2, and the intermediate arm first switch QM1. In detail, LC resonance occurs between the reactor 30 and the first intermediate capacitor 31, and a sinusoidal current flows in this closed circuit. The resonance period of this LC resonance is the second resonance period Tc2.
[0048] The control device 60 switches off the upper-arm first switch QH1 and switches on the upper-arm second switch QH2 at a timing when a half cycle of the second resonance period Tc2 has elapsed since the start of Mode2. The control device 60 also switches off the middle arm second switch QM2. This transitions from Mode2 to Mode3. At this time, soft switching of the ZCS can be realized by switching off the upper-arm first switch QH1 and the middle arm second switch QM2 and switching on the upper-arm second switch QH2, and thus it is possible to reduce losses.
[0049] 11, a current flows in a closed circuit including the upper-arm second switch QH2, the middle arm first switch QM1, the second middle capacitor 32, the lower-arm first diode DL1, the first middle capacitor 31, and the reactor 30. In detail, LC resonance occurs in this closed circuit by the reactor 30 and the first and second middle capacitors 31 and 32, causing a sinusoidal current to flow. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.
[0050] The control device 60 switches the upper-arm second switch QH2 off and switches the upper-arm first switch QH1 on at a timing when a half cycle of the first resonance period Tc1 has elapsed since the start of Mode3. The control device 60 also switches the middle arm second switch QM2 on. This transitions from Mode3 to Mode2. At this time, soft switching of the ZCS can be realized by switching the upper arm second switch QH2 off and switching the upper arm first switch QH1 and the middle arm second switch QM2 on, and this makes it possible to reduce losses.
[0051] The control device 60 switches the upper-arm first switch QH1 off and switches the upper-arm second switch QH2 on at a timing when a half cycle of the second resonance period Tc2 has elapsed since the start of Mode2. The control device 60 also switches the middle-arm first switch QM1 off. This causes a transition from Mode2 to Mode1, and one cycle consisting of Mode1, Mode2, Mode3, and Mode2 ends. At this time, soft switching of the ZCS can be realized by switching off the upper-arm first switch QH1 and the middle-arm first switch QM1 and switching on the upper-arm second switch QH2 and the middle-arm second switch QM2, and thus it is possible to reduce losses.
[0052] According to the present embodiment described above, like the first embodiment, it is possible to reduce the number of parts of the power conversion device 10 having a step-down function.
[0053] <Modification of the second embodiment> The timing of switching from one mode to another among Modes 1 to 3 is not limited to the timing when the currents iL and iCf become 0, as in the modified example of the first embodiment, but may be the timing when the currents iL and iCf become close to 0.
[0054] <Third embodiment> The third embodiment will be described below with reference to the drawings, focusing on the differences from the first and second embodiments. In this embodiment, as shown in Fig. 12, instead of the lower arm first and second diodes DL1 and DL2 in the configuration shown in Fig. 7, lower arm first and second switches QL1 and QL2 are provided. In Fig. 12, the same components as those shown in Figs. 1 and 7 are denoted by the same reference numerals for convenience.
[0055] The control device 60 selects and executes either voltage step-up control or voltage step-down control as the power conversion process.
[0056] First, the boost control will be described with reference to Fig. 13. Fig. 13(a)-(f),(h),(i) correspond to Fig. 8(a)-(g), and Fig. 13(g) and(j) correspond to Fig. 2(e) and(h).
[0057] The control device 60 performs step-down control by repeating one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2. Note that each mode of the present embodiment is different from each mode of the first and second embodiments.
[0058] During the period of Mode1, the upper-arm second switch QH2, the intermediate arm second switch QM2, and the lower-arm second switch QL2 are turned on, and the upper-arm first switch QH1, the intermediate arm first switch QM1, and the lower-arm first switch QL1 are turned off. As a result, as shown in Fig. 14, a current flows in a closed circuit including the upper-arm second switch QH2, the reactor 30, the first intermediate capacitor 31, the intermediate arm second switch QM2, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit by the reactor 30 and the first and second intermediate capacitors 31 and 32, and a sinusoidal current flows. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.
[0059] The control device 60 switches off the upper-arm second switch QH2 and the lower-arm second switch QL2 and switches on the upper-arm first switch QH1 and the intermediate-arm first switch QM1 at a timing when a half cycle of the first resonance cycle Tc1 has elapsed since the start of Mode 1. This transitions from Mode 1 to Mode 2. At this time, soft switching of the ZCS can be realized by switching off the upper-arm second switch QH2 and the lower-arm second switch QL2 and switching on the upper-arm first switch QH1 and the intermediate-arm first switch QM1, and thus it is possible to reduce losses.
[0060] 15, a current flows in a closed circuit including the middle arm first switch QM1, the middle arm second switch QM2, the first middle capacitor 31, the reactor 30, the upper arm first switch QH1, the second capacitor 22, and the first capacitor 21. In detail, LC resonance occurs between the reactor 30 and the first middle capacitor 31 in this closed circuit, and a sinusoidal current flows. The resonance period of this LC resonance is the second resonance period Tc2.
[0061] At a timing when a half cycle of the second resonance cycle Tc2 has elapsed since the start of Mode2, the control device 60 switches off the upper-arm first switch QH1 and the intermediate-arm second switch QM2, and switches on the upper-arm second switch QH2 and the lower-arm first switch QL1. This transitions from Mode2 to Mode3. At this time, soft switching of the ZCS can be realized by switching off the upper-arm first switch QH1 and the intermediate-arm second switch QM2, and switching on the upper-arm second switch QH2 and the lower-arm first switch QL1, and this can reduce losses.
[0062] 16, a current flows in a closed circuit including the middle arm first switch QM1, the upper arm second switch QH2, the reactor 30, the first middle capacitor 31, the lower arm first switch QL1, and the second middle capacitor 32. In detail, LC resonance occurs in this closed circuit by the reactor 30 and the first and second middle capacitors 31 and 32, causing a sinusoidal current to flow. The resonance period of this LC resonance is the above-mentioned first resonance period Tc1.
[0063] At a timing when a half cycle of the first resonance cycle Tc1 has elapsed since the start of Mode3, the control device 60 switches off the upper-arm second switch QH2 and the lower-arm first switch QL1, and switches on the upper-arm first switch QH1 and the intermediate-arm second switch QM2. This transitions from Mode3 to Mode2. At this time, soft switching of the ZCS can be realized by switching off the upper-arm second switch QH2 and the lower-arm first switch QL1 and switching on the upper-arm first switch QH1 and the intermediate-arm second switch QM2, and thus it is possible to reduce losses.
[0064] The control device 60 switches the upper-arm first switch QH1 and the intermediate-arm first switch QM1 off and switches the upper-arm second switch QH2 and the lower-arm second switch QL2 on at a timing when a half cycle of the second resonance cycle Tc2 has elapsed since the start of Mode2. This causes a transition from Mode2 to Mode1, and ends one cycle consisting of Mode1, Mode2, Mode3, and Mode2. At this time, soft switching of the ZCS can be realized by switching off the upper-arm first switch QH1 and the intermediate-arm first switch QM1 and switching on the upper-arm second switch QH2 and the lower-arm second switch QL2, thereby reducing losses.
[0065] Next, the step-down control will be described with reference to Fig. 17. Fig. 17(a) to (j) correspond to Fig. 13(a) to (j) above.
[0066] The control device 60 performs step-down control by repeating one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 2. That is, in this embodiment, the switching control of the step-down control is the same as the switching control of the step-up control. Current flow patterns in Modes 1 to 3 of the step-down control are shown in Figs. 18 to 20.
[0067] As described above, in the present embodiment, the switching control manner is the same in the voltage step-up control and the voltage step-down control, so that the voltage step-up control and the voltage step-down control can be seamlessly switched from one control to the other without switching the switching control manner.
[0068] <Other embodiments> Each of the above embodiments may be modified as follows.
[0069] In the third embodiment, the timing of switching from one mode to another among Modes 1 to 3 is not limited to the timing when the currents iL and iCf become 0, as in the modified example of the first embodiment, but may be the timing when the currents iL and iCf become close to 0.
[0070] The switch section of the power conversion device 10 is not limited to one semiconductor switch, but may be a series connection of multiple semiconductor switches, and the diode section of the power conversion device 10 is not limited to one diode, but may be a series connection of multiple diodes. Fig. 21 shows an example in which the upper arm first and second diodes DH1 and DH2 in the configuration shown in Fig. 1 are configured as a series connection of two diodes, and each of the switches QM1, QM2, QL1, and QL2 is configured as a series connection of two N-channel MOSFETs. This allows each switch and each diode to be a low-voltage element.
[0071] The switch section of the power conversion device 10 may be a parallel connection of multiple switches, and the diode section of the power conversion device 10 may be a parallel connection of multiple diodes. Fig. 22 shows an example in which the upper arm first and second diodes DH1 and DH2 in the configuration shown in Fig. 1 are configured as a parallel connection of two diodes, and each of the switches QM1, QM2, QL1, and QL2 is configured as a parallel connection of two N-channel MOSFETs. This allows each switch and each diode to be an element with a low current capacity.
[0072] As shown in Fig. 23, the power conversion device 10 may be provided with a plurality of second intermediate capacitors. In the example shown in Fig. 23, the power conversion device 10 includes a second A intermediate capacitor 32A and a second B intermediate capacitor 32B. The power conversion device 10 includes a first changeover switch SA and a second changeover switch SB. In Fig. 23, each changeover switch SA and SB is configured with two N-channel MOSFETs with drains connected to each other. The first changeover switch SA and the second A intermediate capacitor 32A are connected in series, and the second changeover switch SB and the second B intermediate capacitor 32B are connected in series. Each changeover switch SA and SB may be configured with two N-channel MOSFETs with sources connected to each other.
[0073] The capacitance of the second-A intermediate capacitor 32A is different from the capacitance of the second-B intermediate capacitor 32B. Therefore, by turning on at least one of the first changeover switch SA and the second changeover switch SB by the control device 60, the first resonance period Tc1 can be changed.
[0074] The switches included in the power conversion device 10 are not limited to N-channel MOSFETs, and may be, for example, IGBTs with freewheel diodes connected in inverse parallel. [Explanation of symbols]
[0075] 10...power conversion device, 30...reactor, 31, 32...first and second intermediate capacitors, DH1, DH2...upper arm first and second diodes, QM1, QM2...intermediate arm first and second switches, QL1, QL2...lower arm first and second switches, 60...control device.
Claims
1. In a power conversion device (10) that transforms a voltage inputted from input terminals (TH1, TH2; TL1, TL2) and outputs the transformed voltage from output terminals (TH2, TH1; TL2, TL1), a series connection of an upper arm first semiconductor portion (DH1, QH1) and an upper arm second semiconductor portion (DH2, QH2); a series connection of an intermediate arm first switch section (QM1) and an intermediate arm second switch section (QM2); a series connection of a lower arm first semiconductor portion (QL1, DL1) and a lower arm second semiconductor portion (QL2, DL2); a series connection of a reactor (30) and a first intermediate capacitor (31) connecting a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion and a connection point between the intermediate arm second switch portion and the lower arm first semiconductor portion; a second intermediate capacitor (32; 32A, 32B) provided in an electrical path connecting a connection point between the intermediate arm first switch section and the intermediate arm second switch section and a connection point between the lower arm first semiconductor section and the lower arm second semiconductor section; A power conversion device comprising:
2. A power conversion device that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as the input terminals and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as the output terminals, the upper arm first semiconductor portion is an upper arm first diode portion (DH1), the upper arm second semiconductor portion is an upper arm second diode portion (DH2), the lower arm first semiconductor portion is a lower arm first switch portion (QL1), the lower arm second semiconductor unit is a lower arm second switch unit (QL2), the high potential side output terminal is connected to the cathode of the upper arm first diode portion, a high potential side of both ends of the intermediate arm first switch section is connected to an anode of the upper arm second diode section; a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section, the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, The power conversion device according to claim 1 , wherein the high potential side input terminal is connected to a connection point between the upper arm second diode section and the intermediate arm first switch section.
3. 3. The power conversion device according to claim 2, further comprising a control device (60) that executes boost control by repeating in this order: Mode 1, which turns off the intermediate arm first switch unit and the lower arm first switch unit and turns on the intermediate arm second switch unit and the lower arm second switch unit; Mode 2, which turns on the intermediate arm first switch unit and the intermediate arm second switch unit and turns off the lower arm first switch unit and the lower arm second switch unit; Mode 3, which turns on the intermediate arm first switch unit and the lower arm first switch unit and turns off the intermediate arm second switch unit and the lower arm second switch unit; and Mode 2.
4. 4. The power conversion device according to claim 3, wherein the control device executes switching from the Mode 1 to the Mode 2, switching from the Mode 2 to the Mode 3, switching from the Mode 3 to the Mode 2, and switching from the Mode 2 to the Mode 1 at a timing when the current flowing through the reactor becomes close to zero.
5. A first high potential side terminal (TH1), a first low potential side terminal (TL1), a second high potential side terminal (TH2), and a second low potential side terminal (TL2) are provided as the input terminal and the output terminal, the upper arm first semiconductor portion is an upper arm first switch portion (QH1), the upper arm second semiconductor unit is an upper arm second switch unit (QH2), the lower arm first semiconductor portion is a lower arm first switch portion (QL1), the lower arm second semiconductor unit is a lower arm second switch unit (QL2), the second high potential side terminal is connected to a high potential side of both ends of the upper arm first switch section, a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section, a high potential side of each of both ends of the lower arm first switch section is connected to a low potential side of each of both ends of the intermediate arm second switch section, the second low potential side terminal and the first low potential side terminal are connected to a low potential side of both ends of the lower arm second switch section, The power conversion device according to claim 1 , wherein the first high potential side terminal is connected to a connection point between the upper arm second switch section and the intermediate arm first switch section.
6. 6. The power conversion device according to claim 5, further comprising a control device (60) that executes control of repeating in this order: Mode 1 in which the upper arm first switch unit, the intermediate arm first switch unit, and the lower arm first switch unit are turned off and the upper arm second switch unit, the intermediate arm second switch unit, and the lower arm second switch unit are turned on; Mode 2 in which the upper arm first switch unit, the intermediate arm first switch unit, and the intermediate arm second switch unit are turned on and the upper arm second switch unit, the lower arm first switch unit, and the lower arm second switch unit are turned off; Mode 3 in which the upper arm second switch unit, the intermediate arm first switch unit, and the lower arm first switch unit are turned on and the upper arm first switch unit, the intermediate arm second switch unit, and the lower arm second switch unit are turned off; and Mode 2.
7. 7. The power conversion device according to claim 6, wherein the control device executes switching from the Mode 1 to the Mode 2, switching from the Mode 2 to the Mode 3, switching from the Mode 3 to the Mode 2, and switching from the Mode 2 to the Mode 1 at a timing when the current flowing through the reactor becomes close to zero.
8. A power conversion device that steps down a voltage input from a high potential side input terminal (TH2) and a low potential side input terminal (TL2) as the input terminals, and outputs the voltage from a high potential side output terminal (TH1) and a low potential side output terminal (TL1) as the output terminals, the upper arm first semiconductor portion is an upper arm first switch portion (QH1), the upper arm second semiconductor unit is an upper arm second switch unit (QH2), the lower arm first semiconductor portion is a lower arm first diode portion (DL1), the lower arm second semiconductor portion is a lower arm second diode portion (DL2), the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a high potential side of each of both ends of the intermediate arm first switch section is connected to a low potential side of each of both ends of the upper arm second switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the intermediate arm second switch section, the low potential side output terminal and the low potential side input terminal are connected to an anode of the lower arm second diode section, The power conversion device according to claim 1 , wherein the high potential side output terminal is connected to a connection point between the upper arm second switch section and the intermediate arm first switch section.
9. 9. The power conversion device according to claim 8, further comprising a control device (60) that executes voltage step-down control by repeating in this order: Mode 1 in which the upper arm first switch unit and the intermediate arm first switch unit are turned off and the upper arm second switch unit and the intermediate arm second switch unit are turned on; Mode 2 in which the upper arm first switch unit, the intermediate arm first switch unit and the intermediate arm second switch unit are turned on and the upper arm second switch unit is turned off; Mode 3 in which the upper arm second switch unit and the intermediate arm first switch unit are turned on and the upper arm first switch unit and the intermediate arm second switch unit are turned off; and Mode 2.
10. 10. The power conversion device according to claim 9, wherein the control device executes switching from the Mode 1 to the Mode 2, switching from the Mode 2 to the Mode 3, switching from the Mode 3 to the Mode 2, and switching from the Mode 2 to the Mode 1 at a timing when the current flowing through the reactor becomes close to zero.
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