Quantum computing system having flex circuit board for improved signal transmission - Patents.com

Abstract

The quantum computing system may include one or more classical processors. The quantum computing system may include quantum hardware including one or more qubits. The quantum computing system may include a chamber mount configured to support the quantum hardware. The quantum computing system may include a vacuum chamber configured to receive the chamber mount and to place the quantum hardware in a vacuum. The vacuum chamber may form a cooling gradient from an end of the vacuum chamber to the quantum hardware. The quantum computing system may include a plurality of flex circuit boards including one or more signal lines. Each of the plurality of flex circuit boards may be configured to transmit signals via one or more signal lines through the vacuum chamber to couple the one or more classical processors to the quantum hardware.

Description

[Technical field]

[0001] Claiming priority

[0001] This application claims the benefit of priority to U.S. Provisional Application No. 63 / 079,256, entitled Quantum Computing System having Flex Circuit Boards for Improved Signal Transmission, filed September 16, 2020, which is incorporated herein by reference.

[0002]

[0002] The present disclosure relates generally to quantum computing systems, and more particularly to improved signal transmission for quantum computing systems. [Background technology]

[0003] Quantum computing is a computational method that exploits quantum effects such as superposition of basis states and quantum entanglement to perform certain calculations more efficiently than classical digital computers. In contrast to digital computers, which store and manipulate information in the form of bits, e.g., "1" or "0," quantum computing systems can manipulate information using quantum bits ("qubits"). A qubit can refer to a quantum device that allows for the superposition of multiple states (e.g., data in both "0" and "1" states) and / or the superposition of data itself in multiple states. According to conventional terminology, the superposition of "0" and "1" states in a quantum system can be expressed as, for example,

number

number

[0004]

[0004] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the description that follows, or may be learned from the description, or may be learned by practice of the embodiments. [Means for solving the problem]

[0005]

[0005] One exemplary aspect of the present disclosure relates to a quantum computing system. The quantum computing system can include one or more classical processors. The quantum computing system can include quantum hardware including one or more qubits. The quantum computing system can include a chamber mount configured to support the quantum hardware. The quantum computing system can include a vacuum chamber configured to receive the chamber mount and place the quantum hardware in a vacuum. The vacuum chamber can form a cooling gradient from an end of the vacuum chamber to the quantum hardware. The quantum computing system can include a plurality of flex circuit boards including one or more signal lines. Each of the plurality of flex circuit boards can be configured to transmit a signal by the one or more signal lines through the vacuum chamber to couple the one or more classical processors to the quantum hardware.

[0006] Another exemplary aspect of the present disclosure relates to a method of operating a quantum computing system including a flex circuit board. The method can include transmitting, by one or more classical processors, control pulses on one or more signal lines. The one or more signal lines can be disposed within the one or more flex circuit boards. The method can include transmitting, by the one or more signal lines, the control pulses through the one or more flex circuit boards to one or more quantum computing devices. The method can include applying, by the one or more quantum computing devices, the control pulses to perform at least one quantum operation based at least in part on the control pulses.

[0007]

[0007] Another exemplary aspect of the present disclosure relates to a quantum computing system. The quantum computing system can include one or more classical processors. The quantum computing system can include quantum hardware including one or more qubits. The quantum computing system can include a chamber mount configured to support the quantum hardware. The quantum computing system can include a vacuum chamber configured to receive the chamber mount and to place the quantum hardware in a vacuum. The vacuum chamber can form a cooling gradient from an end of the vacuum chamber to the quantum hardware. The quantum computing system can include at least one first flex circuit board coupled to the one or more classical processors by a classical flex interconnect. The at least one first flex circuit board can include copper. The quantum computing system can include at least one second flex circuit board coupled to the at least one first flex circuit board by a first flex-flex interconnect. The at least one second flex circuit board can include a copper alloy. The quantum computing system can include at least one surface mounted attenuator board including one or more surface mounted attenuators coupled to the at least one second flex circuit board. The at least one surface mount attenuator substrate may comprise copper. The quantum computing system may comprise at least one third flex circuit board coupled to the at least one surface mount attenuator substrate by a second flex-flex interconnect. The at least one third flex circuit board may comprise niobium. The quantum computing system may comprise at least one fourth flex circuit board coupled to the at least one third flex circuit board by a third flex-flex interconnect. The at least one fourth flex circuit board may comprise copper. The quantum computing system may comprise a connector configured to couple the at least one fourth flex circuit board to the quantum hardware.

[0008]

[0008] Other aspects of the present disclosure relate to various systems, apparatus, non-transitory computer-readable media, user interfaces, and electronic devices.

[0009]

[0009] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and the appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the associated principles.

[0010]

[0010] Detailed descriptions of embodiments aimed at those skilled in the art are set forth in the specification, which refer to the accompanying drawings. [Brief description of the drawings]

[0011] [Figure 1] 1 illustrates an exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Diagram 2]

[0012] 1 illustrates an exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Diagram 3]

[0013] 1 illustrates an exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Figure 4]

[0014] 1 illustrates a cross-sectional view of an exemplary flex circuit board according to an exemplary embodiment of the present disclosure. [Diagram 5]

[0015] 1 illustrates a cross-sectional view of an exemplary flex circuit board according to an exemplary embodiment of the present disclosure. [Figure 6]

[0016] 1 illustrates a cross-sectional view of an exemplary flex circuit board according to an exemplary embodiment of the present disclosure. [Figure 7]

[0017] 1 illustrates a cross-sectional view of an exemplary butt-joint flex-flex interconnect according to an exemplary embodiment of the present disclosure. [Figure 8]

[0018] 1 illustrates a cross-sectional view of an exemplary overlap joint flex-flex interconnect according to an exemplary embodiment of the present disclosure. [Figure 9]

[0019] 1 illustrates a cross-sectional view of an exemplary T-joint connector according to an exemplary embodiment of the present disclosure. [Figure 10A]

[0020] 1 illustrates an exemplary hermetic seal according to an exemplary embodiment of the present disclosure. [Figure 10B]

[0021] 1 illustrates an exemplary mating seal assembly according to an exemplary embodiment of the present disclosure. [Figure 11]

[0022] 1 illustrates an exemplary surface mount attenuator substrate according to an exemplary embodiment of the present disclosure. [Figure 12]

[0023] 1 illustrates an example method of operating a quantum computing system including a flex circuit board, according to an example embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012]

[0024] An exemplary aspect of the present disclosure relates to a quantum computing system with improved signal transmission. One challenge in quantum computing relates to communication between a supercooled quantum system, including quantum hardware (e.g., qubits), and a classical computing system (e.g., binary computing system). The quantum computing system may be at least partially controlled by a classical computing system, which may be interfaced with electronic control and / or measurement devices (e.g., hardware). The classical computing system may remain separate from the quantum hardware. For example, the quantum hardware may be located within a vacuum chamber (e.g., within the vacuum formed by the vacuum chamber) and / or the classical computing system may be located outside the vacuum chamber (e.g., outside the vacuum formed by the vacuum chamber). The vacuum chamber may provide a temperature gradient between the classical computing system, which may operate at about room temperature, and the quantum hardware, which may operate at about absolute zero (e.g., less than about 20 millikelvin).

[0013]

[0025] Quantum computing systems may require fast and robust communication between classical computing systems and quantum systems (e.g., qubits) to accurately and reliably perform quantum gate operations and / or quantum state measurements. To address this requirement, many systems employ physical signal lines, such as wires, between the classical computing system and the quantum system.

[0014]

[0026] The increased complexity of quantum hardware (e.g., an increased number of qubits) can present challenges with managing the physical signal lines between the classical computing system and the quantum hardware. For example, in some cases, each qubit may require one or more signal lines to transmit signals to and / or from the qubit. For example, the number of required signal lines may increase at least approximately, if not more than linearly, with the number of qubits in the quantum system. For example, in some cases, four signal lines may be required for each qubit, even if some or all of the signal lines are multiplexed. Thus, an increase in the density of quantum hardware can contribute to an increase in the density of signal lines and / or interconnects required between signal lines and components of the quantum computing system, such as the quantum hardware, the ends (e.g., inlets) of the vacuum chamber, feedthroughs for different cooling stages, and / or other components. Additionally, an increase in the complexity of quantum hardware can contribute to greater susceptibility to crosstalk, noise, interference, and the like. Thus, the signal lines must provide sufficient performance relative to other considerations, such as thermal conductivity, noise and / or crosstalk robustness.

[0015]

[0027] As an example, many quantum computing applications employ superconducting qubits that achieve superconductivity, or zero electrical resistance, at temperatures near about absolute zero, i.e., about 0 Kelvin, such as less than about 3 Kelvin. Thus, one challenge associated with quantum computing includes cooling quantum hardware having superconducting qubits to a temperature at which the superconducting qubits achieve superconductivity, which may depend on the transition temperature of the superconducting material used for the superconducting qubits. For example, in some cases, the superconducting qubits must be cooled to less than about 0.1 Kelvin (K), such as less than about 0.02 Kelvin, i.e., 20 milliKelvin (mK). Additionally and / or alternatively, the superconducting qubits must be cooled to a temperature low enough such that the thermal occupation of photons at the frequency of the qubit is sufficiently small. Typically, the classical computing system may be maintained at a higher temperature (e.g., near room temperature) than the quantum hardware. A physical signal line may be connected to the quantum hardware, thus forming a thermal conductor between the classical computing system and the quantum hardware. The physical signal lines can reduce the efficiency of cooling systems (e.g., cryogenic cooling systems) configured to cool the quantum hardware and / or other components of the quantum computing system. Thus, even a single signal line can increase the cooling requirements, but as the complexity of quantum hardware continues to increase, this issue can become more significant. Thus, the signal lines coupling the quantum hardware to the classical computing system can desirably be physically small (e.g., closely spaced), provide low thermal loads, provide low electrical dissipation, and / or provide other desirable thermal properties.

[0016]

[0028] As another example, it may be desirable to precisely drive qubits with signals from signal lines. For example, signal reflections caused by the signal lines and / or other components (e.g., connectors) of the quantum computing system can adversely affect the performance of the quantum hardware. Thus, the signal lines may desirably have low reflectivity (e.g., less than about 30 dB). Additionally and / or alternatively, the signal lines may desirably provide low distortion (e.g., pulse distortion) so that control signals are precisely transmitted over the signal lines. Low distortion signal lines may provide improved precise control signal implementation and / or execution of quantum algorithms in the quantum hardware and / or precise readout from the quantum hardware. Additionally and / or alternatively, the signal lines may desirably provide low crosstalk (e.g., less than about 60 dB) between separate signal lines and / or other components. Signal lines providing low crosstalk may provide improved isolated qubit communication, such as providing that signals on a signal line intended for one qubit are isolated from other qubits and / or contribute to reduced noise in each additional signal line.

[0017]

[0029] As another example, noise and / or other external factors may affect the performance of the quantum computing system. The signal lines coupling the quantum hardware to the classical computing system may desirably provide little interference in the environment of the quantum hardware. For example, the signal lines may desirably emit little or no heat photons and / or contribute other factors that may disrupt the operation of the quantum hardware, particularly through filtering of the signal lines. Additionally and / or alternatively, the quantum computing system may desirably prevent external heat photons, signal noise, and / or other external factors from interfering with the operation of the quantum hardware (e.g., by providing filtering and / or blocking heat photon paths from higher temperatures in the environment, such as the vacuum chamber and / or the external environment).

[0018]

[0030] Systems and methods according to exemplary aspects of the present disclosure can provide a quantum computing system that provides solutions to these and / or other problems. According to exemplary aspects of the present disclosure, the quantum computing system can include one or more classical processors and quantum hardware including one or more qubits. The quantum computing system can include a chamber mount configured to support the quantum hardware and a vacuum chamber configured to receive the chamber mount and place the quantum hardware in a vacuum. The vacuum chamber can form a cooling gradient from an end of the vacuum chamber to the quantum hardware. For example, the vacuum chamber can form a cooling gradient from a first temperature, such as room temperature (e.g., about 300 Kelvin), to a second temperature, such as absolute zero (e.g., about 10 milliKelvin), to provide a temperature in the quantum hardware at which the qubits experience superconductivity. In some embodiments, the cooling gradient can be formed by multiple cooling stages that progressively increase and / or decrease the temperature. As an example, the cooling stages can be stages of a stepped cryogenic cooling system, such as a dilution refrigerator.

[0019]

[0031] The quantum computing system may include one or more signal lines between the classical processor and the quantum hardware. According to an exemplary embodiment of the present disclosure, the quantum computing system may include one or more flex circuit boards including one or more signal lines. The flex circuit board may be configured to transmit signals by one or more signal lines through a vacuum chamber to couple one or more classical processors to the quantum hardware. The flex circuit board may include multiple signal lines and may provide significantly improved signal line density in addition to providing improved isolation, reduced thermal conductivity, and / or improved scalability. For example, including a flex circuit board according to an exemplary embodiment of the present disclosure to couple classical processors to quantum hardware may provide an infrastructure that reliably scales to the increasingly larger qubit counts achieved and / or expected in current and / or future quantum computing systems.

[0020]

[0032] As used herein, a "flex circuit board" refers to a substrate including at least one generally planar substrate (e.g., a layered substrate) or other support on which one or more signal lines are formed or disposed and which has flexibility in at least one plane. As used herein, "flexibility" refers to the ability to deform (e.g., be subjected to mechanical stress, etc.) without breaking. For example, a rectangular flex circuit board may be flexible along the largest surface of the rectangular flex circuit board. A rectangular flex circuit board may be flexible and / or rigid along at least a portion of its edges. Flexibility can be achieved as a property of the material (e.g., metals such as copper, copper alloys, niobium, aluminum, dielectric materials, non-metals, polymers, rubbers, etc.) from which the flex circuit board and / or layers of the flex circuit board are formed, by hinging and / or segmenting the flex circuit board (e.g., hinging and / or segmenting rigid portions), and / or in any other suitable manner. The substrate may be strictly planar (e.g., having a cross-section that is substantially linear across its length and width) and / or may be generally planar in that the substrate bends, wrinkles, or otherwise exhibits a shape that is non-linear in at least one cross-section, but generally has a depth that is significantly less (e.g., less than about 10%) than its length and width.

[0021]

[0033] In some embodiments, the flex circuit board can include at least one ground plane. The ground plane can form an outer surface of the flex circuit board, such as an outer surface along a maximum surface. In some embodiments, the flex circuit board can include two ground planes, such as two parallel, spaced apart ground planes. For example, the two ground planes can form both maximum outer surfaces of the flex circuit board. The ground planes can act as electrical isolation layers to isolate signal lines on one side of the ground plane from interfering signals (e.g., from signal lines on other layers, other substrates, the environment, etc.) on the other side of the ground plane. For example, the ground planes can be coupled to earth and / or other suitable grounds.

[0022]

[0034] The ground plane may be or include any suitable conductive material. In some embodiments, the ground plane may be or include a superconducting ground plane including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature below about 1 Kelvin, such as about 0 Kelvin. By way of example, the ground plane may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the ground plane may be or include a material having high signal transmission performance characteristics, such as low resistance, low reflectance, low distortion, etc., such that the signal is not substantially altered by passing through the signal line. By way of example, the ground plane may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the ground plane may be or include a material having desirable thermal properties, such as suitably high and / or low heat transfer, such as, for example, copper, copper alloys, thin superconducting materials, etc.

[0023]

[0035] In some embodiments, the flex circuit board can include at least one dielectric layer. The dielectric layer can be or include any suitable dielectric material, such as a dielectric polymer. In some embodiments, the dielectric layer can be or include a flexible dielectric material. As an example, the dielectric layer can be or include a polyimide. At least a portion of the dielectric layer can be formed on or disposed proximate to at least a portion of an inner surface of the ground plane. For example, in some embodiments, the inner surface of the ground plane can mate with an outer surface of the dielectric layer. Additionally, in some embodiments, the inner surfaces of the two dielectric layers can mate with a signal line disposed therebetween.

[0024]

[0036] The flex circuit board may include one or more signal lines. The one or more signal lines may be disposed on a surface (e.g., an inner surface) of at least one dielectric layer. As an example, in some implementations, the one or more signal lines may be disposed between opposing inner surfaces of two dielectric layers. The signal lines may be or include any suitable conductive material. In some embodiments, the signal lines may be or include superconducting signal lines including superconducting materials such as superconducting materials that achieve superconductivity at temperatures below about 1 Kelvin, such as about 0 Kelvin. By way of example, the signal lines may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the signal lines may be or include materials having high signal transmission performance characteristics. By way of example, the signal lines may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the signal wires may be or include materials having desirable thermal properties, such as, for example, copper, copper alloys, thin superconducting materials, and the like.

[0025]

[0037] In some embodiments, the flex circuit board may include one or more vias. For example, the vias may extend through the ground planes, the dielectric layers, and / or the signal lines. The vias may serve to improve isolation of the signal lines. Additionally and / or alternatively, the vias may serve to couple multiple ground planes and / or to transmit signals between layers of the flex circuit board. In some embodiments, the vias may be plated with a via plate that extends along the vias. In some embodiments, the via plate may be or include a conductive material, such as copper.

[0026]

[0038] A quantum computing system can include quantum hardware in data communication with one or more classical processors. For example, the quantum hardware can represent and / or manipulate information using qubits. A qubit can be or include any suitable quantum device that allows for a superposition of multiple states (e.g., both "0" and "1" states). As an example, a qubit can be or include a unit of a superconducting material, such as a superconducting material that achieves at least superconductivity at temperatures below about 100 millikelvin, which may require operation at reduced temperatures, such as below about 100 millikelvin. In some embodiments, a quantum computing system can include one or more multilevel quantum subsystems, such as a register of qubits. In some implementations, the multilevel quantum subsystem can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0027]

[0039] A classical processor may be a binary processor, such as a processor that operates on data represented as a plurality of bits. As an example, a bit may be represented by a voltage difference between a low voltage (e.g., 0V) and a high voltage (e.g., 5V) at a reference point, such as a memory cell, a circuit node, or the like. The low voltage may be associated with a "0" state, and the high voltage may be associated with a "1" state. The classical processor may be configured to control the quantum hardware in addition to any other suitable functions of the classical processor. For example, the classical processor may be coupled to the quantum hardware (e.g., by signal lines included in a flex circuit board according to an exemplary aspect of the present disclosure) and / or configured to send control signals to perform quantum operations using the quantum hardware. As an example, the classical processor may be configured to send control signals that implement quantum gate operations in the quantum hardware (e.g., by a control device). Additionally and / or alternatively, the classical processor may be configured to send control signals that cause the quantum hardware to perform quantum state measurements and / or provide quantum state measurements to the classical processor (e.g., by a readout device). For example, a classical processor can accept measurements of a quantum system that can be interpreted by the classical processor.

[0028]

[0040] According to an exemplary embodiment of the present disclosure, a quantum computing system can include one or more flex circuit boards including one or more signal lines. A classical processor can be coupled to at least one first flex circuit board. For example, the classical processor can be coupled to the first flex circuit board by a classical flex interconnect. The classical flex interconnect can convert a classical signal transmission medium (e.g., a coaxial cable) to the first flex circuit board.

[0029]

[0041] As an example, the classical flex interconnect may be or may include a compression interposer. The compression interposer may include an array (e.g., a two-dimensional array) of spring pads. For example, a connector that receives signals from a classical processor via one or more coaxial cables (e.g., one coaxial cable per signal line) may be compressed against the compression interposer to form signal communication between the spring pads and the connector (e.g., coaxial cable). Each of the spring pads may be coupled to a signal line on the flex circuit board such that a signal may be transmitted from the classical processor (e.g., coaxial cable) to the signal line. The compression interposer may provide for connecting a signal transmission medium having a relatively low spatial density, such as a coaxial cable that may occupy a relatively large space per cable, to a signal transmission medium having a relatively high spatial density, such as a signal line embedded in a flex circuit board provided according to an exemplary embodiment of the present disclosure. Furthermore, the compression interposer may achieve high isolation between signal lines and / or low reflectivity along the signal lines suitable for quantum computing applications.

[0030]

[0042] In some embodiments, the first flex circuit board may be or may include a first flex circuit board material for the ground plane and / or the signal lines. The first flex circuit board material may be selected to provide high signal transfer performance characteristics. By way of example, the first flex circuit board material may be or may include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the first flex circuit board may include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0031]

[0043] The first flex circuit board can pass through an airtight seal disposed at an end (e.g., an entrance) of the vacuum chamber. For example, the flex circuit board can be configured to penetrate the airtight seal such that a first portion of the flex circuit board is disposed within the vacuum chamber and a second portion of the flex circuit board is disposed outside the vacuum chamber, while the airtight seal forms a vacuum seal for the vacuum chamber. The airtight seal allows the first flex circuit board to enter the vacuum chamber without (e.g., substantially) breaking the vacuum created by the vacuum chamber. As an example, the airtight seal can include a mating seal for each first flex circuit board. The mating seal can receive the first flex circuit board and form a vacuum seal with a surface of the first flex circuit board. Additionally, the airtight seal can include one or more seal slots configured to receive the mating seal and / or the first flex circuit board. For example, the mating seal can form a vacuum seal with the seal slot while allowing the first flex circuit board to pass through the seal slot and enter the vacuum chamber. In this manner, the flex circuit board can enter the vacuum chamber without experiencing signal interruption due to breakage of the circuit board, as the board can be passed through the vacuum chamber continuously. In some embodiments, the hermetic seal can include a fastening system, e.g., screws, bolts, seal rings, O-rings, etc., to secure the mating seal to the seal slot and / or form a vacuum seal. In some embodiments, the hermetic seal can form a vacuum seal without the need for adhesive materials (e.g., glues, resins, etc.), e.g., such that residual adhesive materials do not contaminate the flex circuit board.

[0032]

[0044] The first flex circuit board can be coupled to at least one second flex circuit board. The first flex circuit board can be coupled to the second flex circuit board by at least one flex-flex interconnect. For example, the flex-flex interconnect can couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the first flex circuit board to the second flex circuit board. By way of example, the flex-flex interconnect can be formed by soldering, welding, and / or otherwise fusing components of the first flex circuit board to the second flex circuit board. The flex-flex interconnect can be or include any suitable interconnection of two flex circuit boards, such as, for example, a butt joint, an overlap joint, a spring array joint (e.g., the boards overlap and are joined by a spring array connector such as a compression interposer), and / or any other suitable interconnection.

[0033]

[0045] In some embodiments, the second flex circuit board can be coupled to at least one surface mount attenuator substrate. For example, the surface mount attenuator substrate can be a flexible printed circuit board. In some embodiments, the surface mount attenuator substrate can be or include a surface mount attenuator substrate material for a ground plane and / or a signal line. The surface mount attenuator substrate material can be selected to provide high signal transfer performance characteristics. By way of example, the surface mount attenuator substrate material can be or include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the surface mount attenuator substrate can include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0034]

[0046] The surface mount attenuator substrate can include one or more surface mount attenuators. The surface mount attenuators can be configured to attenuate or block thermal photon interference. In some embodiments, the surface mount attenuator substrate and / or the surface mount attenuators can be disposed at a sufficiently low temperature such that the surface mount attenuators do not generate thermal photons. In some embodiments, the surface mount attenuators can be disposed within an isolation plate. The isolation plate can be configured to isolate the one or more surface mount attenuators. The isolation plate can be attached to the surface mount attenuator substrate. In some embodiments, the isolation plate can be mounted to a ground plane and / or can be grounded. The isolation plate can include one or more cavities configured to isolate a first surface mount attenuator from a second surface mount attenuator. For example, the cavity can surround the first surface mount attenuator in the direction of the second surface mount attenuator to block crosstalk between the attenuators.

[0035]

[0047] The second flex circuit board can have at least a different material composition than the first flex circuit board. In some embodiments, the second flex circuit board can be or include a second flex circuit board material for the ground plane and / or signal lines. The second flex circuit board material can be selected to provide high signal transfer performance characteristics and / or low thermal conductivity. By way of example, the second flex circuit board material can be or include a copper alloy and / or other suitable material having desired thermal properties. For example, the second flex circuit board can include a copper alloy signal line and / or ground plane to reduce thermal conductivity from the top of the vacuum chamber and / or to dissipate heat generated in the surface mounted attenuator. For example, the surface mounted attenuator can generate more heat than the surrounding components, and the second flex circuit board material can be selected to transfer increased heat from the attenuator and / or quantum hardware in addition to and / or alternatively to provide desired signal transfer characteristics. For example, the material (e.g., a copper alloy) can be selected to reduce the thermal load of the attenuator while mitigating electrical losses. As an example, the copper alloy can be or include C194.

[0036]

[0048] The quantum computing system can include at least one third flex circuit board. For example, the second flex circuit board and / or the surface mount attenuator board can be coupled to the third flex circuit board by any suitable flex-flex interconnect (e.g., butt joint, overlap joint, etc.), etc. The third flex circuit board can be positioned in the vacuum chamber at a point where the cooling gradient is sufficiently cooled for a material to exhibit superconductivity. For example, at least a portion of the third flex circuit board can have a temperature less than about 3 Kelvin.

[0037]

[0049] In some embodiments, the third flex circuit board may be or include a third flex circuit board material for the ground plane and / or signal lines. The third flex circuit board material may be selected to be superconducting at a temperature where at least a portion of the third flex circuit board experiences superconductivity. By way of example, the third flex circuit board material may be or include niobium, tin, aluminum, and / or other suitable superconducting materials. For example, the third flex circuit board may include copper plated niobium signal lines and / or ground planes to provide superconductivity. For example, copper plating on a copper plated niobium substrate may be useful for interfacing with superconducting niobium that may improve signal transfer characteristics. In some embodiments, a copper plated niobium substrate may be formed by first applying a layer of niobium, then applying a thin layer of copper to prevent oxide formation, then applying a thicker layer of copper.

[0038]

[0050] In some embodiments, the third flex circuit board can be coupled to at least one fourth flex circuit board by any suitable flex-flex interconnect (e.g., butt joint, overlap joint, etc.). The fourth flex circuit board can couple the third flex circuit board to the quantum hardware. For example, a connector on an end of the fourth flex circuit board can be attached to a port in signal communication with the quantum hardware. By way of example, the connector can be a T-joint connector, such as a T-joint connector including a superconducting material (e.g., tin). Additionally and / or alternatively, the connector can be a planar spring array.

[0039]

[0051] In some embodiments, the fourth flex circuit board may be or include a fourth flex circuit board material for the ground plane and / or the signal lines. The fourth flex circuit board material may be selected to provide high signal transmission performance characteristics. By way of example, the fourth flex circuit board material may be or include copper, brass, gold, and / or other suitable materials having high signal transmission performance characteristics. For example, the fourth flex circuit board may include copper signal lines and / or ground planes to provide high signal transmission performance characteristics. Additionally and / or alternatively, the fourth flex circuit board material may be selected to be superconducting at a temperature at which at least a portion of the fourth flex circuit board operates. By way of example, the fourth flex circuit board material may be or include niobium, tin, aluminum, and / or other suitable superconducting materials.

[0040]

[0052] In some embodiments, the fourth flex circuit board may be or include a filter, such as an XYZ and / or IR filter. For example, the filter may be configured to reduce the effects of noise, thermal photons, and / or other potential sources of interference. As an example, the filter may include a cavity in the fourth flex circuit board that is filled with a particulate suspension to provide XYZ / IR filtering.

[0041]

[0053] Systems and methods according to example embodiments of the present disclosure can provide many technical effects and advantages. For example, including a flex circuit board for coupling classical processors to quantum hardware according to example embodiments of the present disclosure can provide quantum computing systems with improved signal transfer characteristics, reduced susceptibility to noise, improved thermal handling characteristics, improved scalability to an increasing number of qubits, and / or other advantages.

[0042]

[0054] As used herein, use of the terms "about" or "approximately" in conjunction with a stated numerical value is intended to refer to within 10% of the stated numerical value.

[0043]

[0055] Exemplary embodiments of the present disclosure will now be described in further detail with reference to the figures.

[0044]

[0056] FIG. 1 illustrates an exemplary quantum computing system 100. The exemplary system 100 is an example of a system implemented as a classical or quantum computer program on one or more classical or quantum computing devices at one or more locations, in which the systems, components, and techniques described below may be implemented. FIG. 1 illustrates an exemplary quantum computing system that can be used to implement aspects of the present disclosure. Those skilled in the art using the disclosure provided herein will understand that other quantum computing structures or systems can be used without departing from the scope of the present disclosure.

[0045]

[0057] The system 100 includes quantum hardware 102 in data communication with one or more classical processors 104. For example, the quantum hardware 102 can represent and / or manipulate information using qubits. A qubit can be or include any suitable quantum device that allows for the superposition of multiple states (e.g., data in both "0" and "1" states). By way of example, a qubit can be or include a unit of a superconducting material, such as a superconducting material that achieves superconductivity at a temperature less than about 3 Kelvin, such as about 1 Kelvin, such as about 20 milliKelvin.

[0046]

[0058] Quantum hardware 102 may include components for performing quantum computations. For example, quantum hardware 102 may include a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). Quantum system 110 may include one or more multi-level quantum subsystems, such as a register of qubits. In some implementations, the multi-level quantum subsystem may include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0047]

[0059] The classical processor 104 may be a binary processor, such as a processor that operates on data represented as a plurality of bits. As an example, a bit may be represented by a voltage difference between a low voltage (e.g., 0V) and a high voltage (e.g., 5V) at a reference point, such as a memory cell, a circuit node, or the like. The low voltage may be associated with a "0" state, and the high voltage may be associated with a "1" state. The classical processor 104 may be configured to control the quantum hardware 102 in addition to any other suitable functions of the classical processor 104. For example, the classical processor 104 may be coupled (e.g., by a signal line) to the quantum hardware 102 and / or configured to send control signals to perform quantum operations using the quantum hardware 102. As an example, the classical processor 104 may be configured to send control signals that implement quantum gate operations in the quantum hardware 102 (e.g., by the control device 112). Additionally and / or alternatively, classical processor 104 can be configured to send control signals that cause quantum hardware 102 to perform quantum state measurements and / or provide quantum state measurements to classical processor 104 (e.g., via readout device 114). For example, classical processor 104 can accept measurements of quantum system 110 that can be interpreted by classical processor 104.

[0048]

[0060] The type of multi-level quantum subsystem utilized by system 100 may vary. For example, in some cases it may be convenient to include one or more readout devices 114 attached to one or more superconducting qubits, such as transmon, flux, gmon, xmon, or other qubits.

[0049]

[0061] Quantum circuits may be constructed and applied to a register of qubits included in quantum system 110 via multiple signal lines (e.g., signal line 120 in FIG. 2) coupled to one or more control devices 112. An exemplary control device 112 operating on a register of qubits may be used to implement a quantum logic gate or a circuit of quantum logic gates, e.g., Hadamard gates, controlled NOT (CNOT) gates, controlled phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, etc. The one or more control devices 112 may be configured to operate on quantum system 110 via one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem may be a superconducting qubit, and control device 112 may be configured to provide control pulses on control lines (e.g., signal line 120 in FIG. 2) to generate a magnetic field to tune the frequency of the qubit.

[0050]

[0062] The quantum hardware 102 may further include a readout device 114 (e.g., a readout resonator). Measurement results 108 obtained via the measurement device may be provided to the classical processor 104 for processing and analysis. In some implementations, the quantum hardware 102 may include quantum circuits, and the control device 112 and readout device 114 may implement one or more quantum logic gates that operate on the quantum system 110 via physical control parameters (e.g., microwave pulses) transmitted via wires included in the quantum hardware 102. Further examples of control devices include arbitrary waveform generators from which DACs generate signals.

[0051]

[0063] The readout device 114 may be configured to perform quantum measurements on the quantum system 110 and transmit the measurement results 108 to the classical processor 104 (e.g., over signal line 120 in FIG. 2). Additionally, the quantum hardware 102 may be configured to accept data from the classical processor 104 (e.g., over signal line 120 in FIG. 2) that specifies the physical control parameter values ​​106. The quantum hardware 102 may use the accepted physical control parameter values ​​106 to update the operation of the control device 112 and the readout device 114 on the quantum system 110. For example, the quantum hardware 102 may accept data that specifies new values ​​representing voltage strengths of one or more DACs included in the control device 112 and may update the operation of the DACs on the quantum system 110 accordingly. The classical processor 104 may be configured to initialize the quantum system 110 with an initial quantum state, for example, by sending data to the quantum hardware 102 that specifies an initial set of parameters 106.

[0052]

[0064] The readout device 114 reads the state of an element of the quantum system, such as a qubit, to measure the state of the element (e.g., qubit).

number

number

[0053]

[0065] The system 100 includes a control device 112. The control device 112 can operate the quantum hardware 102. For example, the control device 112 can include a waveform generator configured to generate control pulses according to exemplary aspects of the present disclosure.

[0054]

[0066] In some implementations, the control device 112 may include a data processing device and associated memory. The memory may include a computer program having instructions that, when executed by the data processing device, cause the data processing device to perform one or more functions described herein, such as applying control signals to qubits and / or tunable couplers.

[0055]

[0067] FIG. 2 illustrates an exemplary quantum computing system 100 according to an exemplary embodiment of the present disclosure. As illustrated in FIG. 2, the quantum hardware 102, such as, but not limited to, the quantum system 110, the control device 112, the readout device 114, and / or any other suitable components of the quantum hardware 102 described with respect to FIG. 1, can be disposed within a cryogenic cooling system 130. Additionally and / or alternatively, the classical processor 104 can be disposed outside of the cryogenic cooling system 130. The cryogenic cooling system 130 can be a vacuum chamber or can be disposed within a vacuum chamber. For example, the quantum hardware 102 and / or the signal lines 120 (e.g., a flex circuit board) can be supported by a chamber mount configured to be inserted into a vacuum canister to form a vacuum chamber. For example, the chamber mount can be configured to place the quantum hardware 102 in a vacuum (e.g., formed by a vacuum chamber). The cryogenic cooling system 130 is configured to provide a temperature gradient (e.g., multiple cooling stages) within the vacuum chamber. For example, the temperature gradient can be formed by multiple cryogenic cooling stages, such as stages of a dilution refrigerator. Exemplary stages of a dilution refrigerator can be or include, for example, a first intermediate clamp stage, a first stage pulse tube stage, a second intermediate clamp stage, a second stage pulse tube stage, a stationary stage, an intermediate heat exchanger stage, a mixing chamber stage, a Joule-Thomson cooling stage, a helium liquefaction stage, and / or any other suitable stages of a dilution refrigerator.

[0056]

[0068] Cryogenic cooling system 130 may be configured to cool quantum hardware 102. Additionally and / or alternatively, classical processor 104 is not cooled by cryogenic cooling system 130. For example, classical processor 104 may operate at temperatures near room temperature (e.g., about 300 Kelvin) and / or at temperatures near about 100 Kelvin, whereas quantum hardware 102 may operate at temperatures near absolute zero (e.g., less than about 1 Kelvin) and thus require cooling by cryogenic cooling system 130 to operate effectively.

[0057]

[0069] The quantum computing system 100 can include a signal line 120. The signal line 120 can couple the classical processor 104 to the quantum hardware 102. For example, the classical processor 104 and the quantum hardware 102 can communicate signals, such as transmitting parameters 106 and / or measurements 108 of FIG. 1, in addition to any other suitable signals, so that the classical processor 104 can be coupled to the quantum hardware 102 by the signal line 120. For example, according to an exemplary embodiment of the present disclosure, the signal line 120 can be or include one or more flex circuit boards, such as superconducting flex circuit boards, configured to couple the quantum hardware 102 and the classical processor 104. In general, the signal line 120 includes a physical connection to enable faster and / or more robust communication between the quantum hardware 102 and the classical processor 104. As shown in FIG. 2, the signal line 120 can be at least partially disposed within a cryogenic cooling system 130 to provide coupling to the quantum hardware 102. The increased density of signal lines 120 (e.g., associated with the increased complexity of quantum hardware 102) can present challenges in operating quantum computing system 100, which can be mitigated by the inclusion of a flex circuit board in accordance with an exemplary embodiment of the present disclosure.

[0058]

[0070] FIG. 3 illustrates an exemplary quantum computing system 300 according to an exemplary embodiment of the present disclosure. The quantum computing system 300 can include one or more classical processors 302 and quantum hardware 304 including one or more qubits. The quantum computing system 300 can include a chamber mount 308 configured to support the quantum hardware 304 and a vacuum chamber configured to receive the chamber mount 308 and place the quantum hardware 304 in a vacuum. The vacuum chamber can form a cooling gradient from an end of the vacuum chamber (e.g., cap 307) to the quantum hardware 304. For example, the vacuum chamber can form a cooling gradient from a first temperature, such as room temperature (e.g., about 300 Kelvin), to a second temperature, such as absolute zero (e.g., about 10 milliKelvin), to provide a temperature at the quantum hardware 304 at which the qubits experience superconductivity. In some embodiments, the cooling gradient can be formed by multiple cooling stages that progressively increase and / or decrease the temperature. As an example, the cooling stages can be stages of a stepwise cryogenic cooling system, such as a dilution refrigerator.

[0059]

[0071] The quantum computing system 300 may include one or more signal lines between the classical processor 302 and the quantum hardware 304. According to an exemplary embodiment of the present disclosure, the quantum computing system 300 may include one or more flex circuit boards 306 including one or more signal lines. The flex circuit board 306 may be configured to transmit signals by one or more signal lines through a vacuum chamber to couple the one or more classical processors 302 to the quantum hardware 304. The flex circuit board 306 may include multiple signal lines and may provide significantly improved signal line density in addition to providing improved isolation, reduced thermal conductivity, and / or improved scalability. For example, including a flex circuit board 306 according to an exemplary embodiment of the present disclosure to couple the classical processor 302 to the quantum hardware 304 may provide an infrastructure to reliably scale to the increasingly larger qubit counts achieved and / or expected in current and / or future quantum computing systems. Exemplary flex circuit boards that may be employed according to exemplary embodiments of the present disclosure are illustrated in FIGS. 4-6.

[0060]

[0072] In some embodiments, some or all of the flex circuit board 306 may include at least one ground plane. The ground plane may form an outer surface of the flex circuit board 306, such as an outer surface along a maximum surface. In some embodiments, the flex circuit board 306 may include two ground planes, such as two parallel, spaced apart ground planes. For example, two ground planes may form both maximum outer surfaces of the flex circuit board 306. The ground planes may act as electrical isolation layers to isolate signal lines on one side of the ground plane from interfering signals (e.g., from signal lines on other layers, other substrates, the environment, etc.) on the other side of the ground plane. For example, the ground planes may be coupled to earth and / or other suitable grounds.

[0061]

[0073] The ground plane may be or include any suitable conductive material. In some embodiments, the ground plane may be or include a superconducting ground plane including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature less than about 3 Kelvin, such as about 1 Kelvin, such as about 20 milliKelvin. By way of example, the ground plane may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the ground plane may be or include a material having high signal transmission performance characteristics, such as low resistance, low reflectance, low distortion, etc., such that the signal is not substantially altered by passing through the signal line. By way of example, the ground plane may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the ground plane may be or include a material having desirable thermal properties, such as suitably high and / or low heat transfer, such as, for example, copper, copper alloys, etc.

[0062]

[0074] In some embodiments, the flex circuit board 306 can include at least one dielectric layer. The dielectric layer can be or include any suitable dielectric material, such as a dielectric polymer. In some embodiments, the dielectric layer can be or include a flexible dielectric material. As an example, the dielectric layer can be or include a polyimide. At least a portion of the dielectric layer can be formed on or disposed proximate to at least a portion of an inner surface of a ground plane. For example, in some embodiments, an inner surface of the ground plane can mate with an outer surface of the dielectric layer. Additionally, in some embodiments, the inner surfaces of two dielectric layers can mate with a signal line disposed therebetween.

[0063]

[0075] The flex circuit board 306 may include one or more signal wires. The one or more signal wires may be disposed on a surface (e.g., an inner surface) of at least one dielectric layer. As an example, in some implementations, the one or more signal wires may be disposed between opposing inner surfaces of two dielectric layers. The signal wires may be or include any suitable conductive material. In some embodiments, the signal wires may be or include superconducting signal wires including superconducting materials such as superconducting materials that achieve superconductivity at temperatures less than about 3 Kelvin, such as about 1 Kelvin, about 20 milliKelvin, etc. By way of example, the signal wires may be or include niobium, tin, aluminum, and / or other suitable superconducting materials. Additionally and / or alternatively, the signal wires may be or include materials having high signal transmission performance characteristics. By way of example, the signal wires may be or include copper, gold, and / or other suitable materials having high signal transmission performance characteristics. Additionally and / or alternatively, the signal wires may be or include a material having desired thermal properties, such as, for example, copper, copper alloys, and the like.

[0064]

[0076] In some embodiments, the flex circuit board 306 may include one or more vias. For example, the vias may extend through the ground planes, the dielectric layers, and / or the signal lines. Additionally and / or alternatively, the vias may serve to couple multiple ground planes and / or transmit signals between layers of the flex circuit board. The vias may serve to improve isolation of the signal lines. In some embodiments, the vias may be plated with a via plate that extends along the vias. In some embodiments, the via plate may be or include a conductive material, such as copper.

[0065]

[0077] For example, in some embodiments, the quantum computing system 300 can include quantum hardware 304 in data communication with one or more classical processors 302. For example, the quantum hardware 304 can represent and / or manipulate information using qubits. A qubit can be or include any suitable quantum device that allows for a superposition of multiple states (e.g., both "0" and "1" states). As an example, a qubit can be or include a unit of a superconducting material, such as a superconducting material that achieves superconductivity at a temperature less than about 3 Kelvin, such as about 1 Kelvin, such as about 20 milliKelvin. In some embodiments, the quantum computing system 300 can include one or more multilevel quantum subsystems, such as a register of qubits. In some implementations, the multilevel quantum subsystem can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0066]

[0078] The classical processor 302 can be a binary processor, such as a processor that operates on data represented as a plurality of bits. As an example, a bit can be represented by a voltage difference between a low voltage (e.g., 0V) and a high voltage (e.g., 5V) at a reference point, such as a memory cell, a circuit node, or the like. The low voltage can be associated with a "0" state, and the high voltage can be associated with a "1" state. The classical processor 302 can be configured to control the quantum hardware 304 in addition to any other suitable functions of the classical processor 302. For example, the classical processor 302 can be coupled to the quantum hardware 304 (e.g., by signal lines included in the flex circuit board 306 according to an exemplary embodiment of the present disclosure) and / or can be configured to send control signals to perform quantum operations using the quantum hardware 304. As an example, the classical processor 302 can be configured to send control signals that implement quantum gate operations in the quantum hardware 304 (e.g., by a control device). Additionally and / or alternatively, classical processor 302 can be configured to send control signals that cause quantum hardware 304 to perform quantum state measurements and / or provide quantum state measurements (e.g., by a readout device) to classical processor 302. For example, classical processor 302 can accept measurements of the quantum system that can be interpreted by classical processor 302.

[0067]

[0079] According to an exemplary embodiment of the present disclosure, the quantum computing system 300 can include one or more flex circuit boards 306 including one or more signal lines. The classical processor 302 can be coupled to at least one first flex circuit board. For example, the classical processor 302 can be coupled to the first flex circuit board 314 by a classical flex interconnect 332. The classical flex interconnect 332 can transfer from a classical signal transmission medium (e.g., a coaxial cable) 312 to the first flex circuit board 314.

[0068]

[0080] As an example, the classical flex interconnect 332 may be or may include a compression interposer. The compression interposer may include an array (e.g., a two-dimensional array) of spring pads. For example, a connector that receives signals from the classical processor 302 via one or more coaxial cables 312 (e.g., one coaxial cable 312 per signal line) may be compressed against the compression interposer to form signal communication between the spring pads and the connector (e.g., coaxial cable). Each of the spring pads may be coupled to a signal line on the first flex circuit board 314 such that a signal may be transmitted from the classical processor 302 (e.g., coaxial cable) to the signal line. The compression interposer may provide for connecting a signal transmission medium 312 having a relatively low spatial density, such as a coaxial cable that may occupy a relatively large space per cable, to a signal transmission medium having a relatively high spatial density, such as a signal line embedded in the first flex circuit board 314 provided according to an exemplary embodiment of the present disclosure. Additionally, compressive interposers can achieve high isolation between and / or low reflectivity along signal lines suitable for quantum computing applications.

[0069]

[0081] In some embodiments, the first flex circuit board 314 can be or can include a first flex circuit board material for the ground plane and / or signal lines. The first flex circuit board material can be selected to provide high signal transfer performance characteristics. By way of example, the first flex circuit board material can be or can include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the first flex circuit board 314 can include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0070]

[0082] The first flex circuit board 314 can pass through an airtight seal 352 disposed at an end (e.g., entrance) of the vacuum chamber, such as the cap 307. For example, the flex circuit board (e.g., the first flex circuit board 314) can be configured to pass through the airtight seal 352, such that a first portion of the flex circuit board (e.g., the first flex circuit board 314) is disposed within the vacuum chamber and a second portion of the flex circuit board (e.g., the first flex circuit board 314) is disposed outside the vacuum chamber, while the airtight seal 352 forms a vacuum seal for the vacuum chamber. The airtight seal 352 allows the first flex circuit board 314 to enter the vacuum chamber without (e.g., substantially) breaking the vacuum created by the vacuum chamber. As an example, the airtight seal 352 can include a mating seal for each first flex circuit board 314. The mating seal can receive the first flex circuit board 314 and form a vacuum seal with a surface of the first flex circuit board 314. Additionally, the airtight seal 352 can include one or more seal slots configured to receive the mating seal and / or the first flex circuit board 314. For example, the mating seal can form a vacuum seal with the seal slots while allowing the first flex circuit board 314 to pass through the seal slots and enter the vacuum chamber. In this manner, the flex circuit board 306 can enter the vacuum chamber without experiencing signal interruption due to circuit board breakage, as the boards can pass through the vacuum chamber continuously. In some embodiments, the airtight seal 352 can include a fastening system, e.g., screws, bolts, seal rings, O-rings, etc., to secure the mating seal to the seal slots and / or form a vacuum seal. In some embodiments, the airtight seal 352 can form a vacuum seal without the need for adhesive materials (e.g., glue, resin, etc.), e.g., such that residual adhesive materials do not contaminate the flex circuit board 306. An exemplary hermetic seal that may be employed according to an exemplary embodiment of the present disclosure is shown in FIGS. 10A-10B.

[0071]

[0083] The first flex circuit board 314 can be coupled to at least one second flex circuit board 316. The first flex circuit board 314 can be coupled to the second flex circuit board 316 by at least one flex-flex interconnect 334. For example, the flex-flex interconnect 334 can couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the first flex circuit board 314 to the second flex circuit board 316. By way of example, the flex-flex interconnect 334 can be formed by soldering, welding, and / or otherwise fusing components of the first flex circuit board 314 to the second flex circuit board 316. The flex-flex interconnect 334 can be or include any suitable interconnect of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnect. For example, exemplary flex-flex interconnects that may be employed in accordance with exemplary embodiments of the present disclosure are shown in FIGS.

[0072]

[0084] The second flex circuit board 316 may have at least a different material composition than the first flex circuit board 314. In some embodiments, the second flex circuit board 316 may be or include a second flex circuit board material for the ground plane and / or signal lines. The second flex circuit board material may be selected to provide high signal transfer performance characteristics and / or low thermal conductivity. By way of example, the second flex circuit board material may be or include a copper alloy and / or other suitable material having desired thermal properties. For example, the second flex circuit board 316 may include a copper alloy signal line and / or ground plane to reduce thermal conductivity from the top of the vacuum chamber (e.g., the first circuit board 314) and / or to dissipate heat generated in subsequent components such as the surface mounted attenuator 354.

[0073]

[0085] In some embodiments, the second flex circuit board 316 may be coupled to at least one surface mount attenuator board 318. For example, the second flex circuit board 316 may be coupled to the surface mount attenuator board 318 by at least one flex-flex interconnect 336. For example, the flex-flex interconnect 336 may couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the second flex circuit board 316 to the surface mount attenuator board 318. By way of example, the flex-flex interconnect 336 may be formed by soldering, welding, and / or otherwise fusing components of the second flex circuit board 316 to the surface mount attenuator board 318. The flex-flex interconnect 336 may be or include any suitable interconnect of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnect. For example, exemplary flex-flex interconnects that may be employed in accordance with exemplary embodiments of the present disclosure are shown in FIGS.

[0074]

[0086] The surface mount attenuator substrate 318 may be a flexible printed circuit board. In some embodiments, the surface mount attenuator substrate 318 may be or include a surface mount attenuator substrate material for ground planes and / or signal lines. The surface mount attenuator substrate material may be selected to provide high signal transfer performance characteristics. By way of example, the surface mount attenuator substrate material may be or include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the surface mount attenuator substrate may include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0075]

[0087] The surface mount attenuator substrate 318 can include one or more surface mount attenuators 354. The surface mount attenuators 354 can be configured to attenuate or block thermal photon interference. In some embodiments, the surface mount attenuator substrate 318 and / or the surface mount attenuators 354 can be disposed at a sufficiently low temperature such that the surface mount attenuators 354 do not generate thermal photons. In some embodiments, the surface mount attenuators 354 can be disposed within an isolation plate. The isolation plate can be configured to isolate the one or more surface mount attenuators. The isolation plate can be attached to the surface mount attenuator substrate 318. In some embodiments, the isolation plate can be mounted to a ground plane and / or can be grounded. The isolation plate can include one or more cavities configured to isolate a first surface mount attenuator from a second surface mount attenuator. For example, the cavity can surround the first surface mount attenuator in the direction of the second surface mount attenuator to block crosstalk between the attenuators. An example surface mount attenuator substrate and / or surface mount attenuator that may be employed in accordance with an example embodiment of the present disclosure is shown in FIG.

[0076]

[0088] The quantum computing system 300 may include at least one third flex circuit board 320. For example, the surface mount attenuator substrate 318 may be coupled to the third flex circuit board 320 by at least one flex-flex interconnect 338. For example, the flex-flex interconnect 338 may couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the surface mount attenuator substrate 318 to the third flex circuit board 320. By way of example, the flex-flex interconnect 338 may be formed by soldering, welding, and / or otherwise fusing components of the surface mount attenuator substrate 318 to the third flex circuit board 320. The flex-flex interconnect 338 may be or include any suitable interconnect of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnect. For example, exemplary flex-flex interconnects that may be employed in accordance with exemplary embodiments of the present disclosure are shown in FIGS.

[0077]

[0089] The third flex circuit board 320 can be positioned within the vacuum chamber at a point where the cooling gradient is sufficient for a material to exhibit superconductivity. For example, at least a portion of the third flex circuit board 320 can have a temperature less than about 3 Kelvin.

[0078]

[0090] In some embodiments, the third flex circuit board 320 may be or include a third flex circuit board material for the ground plane and / or signal lines. The material of the third flex circuit board 320 may be selected to be superconductive at a temperature at which at least a portion of the third flex circuit board 320 experiences superconductivity. By way of example, the material of the third flex circuit board 320 may be or include niobium, tin, aluminum, and / or other suitable superconducting materials. For example, the third flex circuit board 320 may include copper plated niobium signal lines and / or ground planes to provide superconductivity. For example, copper plating on a copper plated niobium substrate may be useful for interfacing with superconducting niobium, which may improve signal transfer characteristics. In some embodiments, a copper plated niobium substrate may be formed by first applying a layer of niobium, then applying a thin layer of copper to prevent oxide formation, then applying a thicker layer of copper.

[0079]

[0091] In some embodiments, the third flex circuit board 320 may be coupled to at least one fourth flex circuit board 322. The third flex circuit board 320 may be coupled to the fourth flex circuit board 322 by at least one flex-flex interconnect 340. For example, the flex-flex interconnect 340 may couple (structurally and / or electrically) a ground plane, a dielectric layer, and / or a signal line of the third flex circuit board 320 to the fourth flex circuit board 322. By way of example, the flex-flex interconnect 340 may be formed by soldering, welding, and / or otherwise fusing components of the third flex circuit board 320 to the fourth flex circuit board 322. The flex-flex interconnect 340 may be or include any suitable interconnect of the two flex circuit boards 306, such as, for example, a butt joint, an overlap joint, and / or any other suitable interconnect. For example, exemplary flex-flex interconnects that may be employed in accordance with exemplary embodiments of the present disclosure are shown in FIGS.

[0080]

[0092] The fourth flex circuit board 322 can couple the third flex circuit board 320 to the quantum hardware 304. For example, a connector 342 on an end of the fourth flex circuit board 322 can be attached to a port in signal communication with the quantum hardware 304. By way of example, the connector can be a T-joint connector, such as a T-joint connector including a superconducting material (e.g., tin). Additionally and / or alternatively, the connector 342 can be a planar spring array. An example T-joint connector that can be employed according to an example embodiment of the present disclosure is shown in FIG. 9.

[0081]

[0093] In some embodiments, the fourth flex circuit board 322 may be or may include a fourth flex circuit board material for the ground plane and / or signal lines. The material of the fourth flex circuit board 322 may be selected to provide high signal transmission performance characteristics. By way of example, the material of the fourth flex circuit board 322 may be or may include copper, brass, gold, and / or other suitable materials having high signal transmission performance characteristics. For example, the fourth flex circuit board 322 may include copper signal lines and / or ground planes to provide high signal transmission performance characteristics. Additionally and / or alternatively, the material of the fourth flex circuit board 322 may be selected to be superconducting at a temperature at which at least a portion of the fourth flex circuit board 322 operates. By way of example, the material of the fourth flex circuit board 322 may be or may include niobium, tin, aluminum, and / or other suitable superconducting materials.

[0082]

[0094] In some embodiments, the fourth flex circuit board 322 may be or include a filter 356, such as an XYZ and / or IR filter 356. For example, the filter 356 may be configured to reduce the effects of noise, thermal photons, and / or other potential interference sources. As an example, the filter 356 may include a cavity in the fourth flex circuit board 322 filled with a filter material, such as a particulate suspension, to provide XYZ / IR filtering. In some examples, the filter material may provide less attenuation for signals at a first frequency and more attenuation for signals at a second, higher frequency. For example, some filter materials provide attenuation that increases substantially monotonically with increasing signal frequency for at least a portion of a target frequency band. In some embodiments, aspects of the filter material may be configured for low-pass and / or band-pass operation.

[0083]

[0095] In some embodiments, the filter 356 may be bounded by one or more boundaries of a cavity (e.g., a cavity in a dielectric material) in the fourth flex circuit board 322. For example, the cavity in the fourth flex circuit board 322 may be filled with a filter material (e.g., a magnetically supported polymer). In some embodiments, the cavity may be filled (e.g., partially or completely) with the filter material via an access in the fourth flex circuit board 322 if the filter material is in any pourable, injectable, and / or moldable state (e.g., flowable particulates, soft / plasticized material, gel, slurry, paste, foam, uncured thermoset material, softened / molten thermoplastic material, etc.). In some embodiments, the cavity may be filled with the filter material in a substantially solid state (e.g., by pressing into the cavity, etc.).

[0084]

[0096] FIG. 4 illustrates a cross-sectional view of an exemplary flex circuit board 400 according to an exemplary embodiment of the present disclosure. The flex circuit board 400 can include one or more signal lines 406. The flex circuit board 400 can be configured to transmit signals via the one or more signal lines 406, such as through a vacuum chamber, to couple one or more classical processors to quantum hardware. The flex circuit board 400 can include multiple signal lines 406 and can provide significantly improved signal line density in addition to providing improved isolation, reduced thermal conductivity, and / or improved scalability. For example, including a flex circuit board 400 according to an exemplary embodiment of the present disclosure to couple classical processors to quantum hardware can provide an infrastructure that reliably scales to the increasingly larger numbers of qubits achieved and / or expected in current and / or future quantum computing systems.

[0085]

[0097] As used herein, a "flex circuit board" refers to a substrate including at least one generally planar substrate (e.g., a layered substrate) or other support on which one or more signal lines 406 are formed or disposed and that has flexibility in at least one plane. As used herein, "flexibility" refers to the ability to deform (e.g., be subjected to mechanical stress, etc.) without breaking. For example, a rectangular flex circuit board 400 may be flexible along the largest surface of the rectangular flex circuit board 400. A rectangular flex circuit board 400 may be flexible and / or rigid along at least a portion of its edges. Flexibility can be achieved as a property of the materials (e.g., metals such as copper, copper alloys, niobium, aluminum, dielectric materials, non-metals, polymers, rubbers, etc.) from which the flex circuit board 400 and / or layers of the flex circuit board 400 are formed, by hinging and / or segmenting the flex circuit board 400 (e.g., hinging and / or segmenting rigid portions), and / or in any other suitable manner. The substrate may be strictly planar (e.g., having a cross-section that is substantially linear across its length and width) and / or may be generally planar in that the substrate bends, wrinkles, or otherwise exhibits a shape that is non-linear in at least one cross-section, but generally has a depth that is significantly less (e.g., less than about 10%) than its length and width.

[0086]

[0098] In some embodiments, the flex circuit board 400 can include at least one ground plane 402. The ground plane 402 can form an outer surface of the flex circuit board 400, such as an outer surface along a maximum surface. In some embodiments, the flex circuit board 400 can include two ground planes 402, such as two parallel, spaced apart ground planes 402. For example, the two ground planes 402 can form both maximum outer surfaces of the flex circuit board 400. The ground planes 402 can act as electrical isolation layers to isolate signal lines 406 on one side of the ground plane 402 from interfering signals (e.g., from signal lines 406 on other layers, other substrates, the environment, etc.) on the other side of the ground plane 402. For example, the ground planes 402 can be coupled to earth ground and / or other suitable ground.

[0087]

[0099] The ground plane 402 may be or include any suitable conductive material. In some embodiments, the ground plane 402 may be or include a superconducting ground plane 402 including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature of less than about 3 Kelvin, such as less than about 1 Kelvin, about 20 milliKelvin, etc. By way of example, the ground plane 402 may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the ground plane 402 may be or include a material that has high signal transmission performance characteristics, such as low resistance, low reflectivity, low distortion, etc., such that a signal is not substantially altered by passing through the signal line. By way of example, the ground plane 402 may be or include copper, gold, and / or other suitable materials that have high signal transmission performance characteristics. Additionally and / or alternatively, the ground plane 402 may be or include a material having desirable thermal properties, such as suitably high and / or low heat transfer, such as, for example, copper, copper alloys, etc.

[0088]

[0100] In some embodiments, the flex circuit board 400 can include at least one dielectric layer 404. The dielectric layer 404 can be or include any suitable dielectric material, such as a dielectric polymer. In some embodiments, the dielectric layer 404 can be or include a flexible dielectric material. As an example, the dielectric layer 404 can be or include a polyimide. At least a portion of the dielectric layer 404 can be formed on or be disposed proximate to at least a portion of an inner surface of the ground plane 402. For example, in some embodiments, the inner surface of the ground plane 402 can mate with an outer surface of the dielectric layer 404. Additionally, in some embodiments, the inner surfaces of the two dielectric layers 404 can mate with a signal line 406 disposed therebetween.

[0089]

[0101] The flex circuit board 400 may include one or more signal lines 406. The one or more signal lines 406 may be disposed on a surface (e.g., an inner surface) of at least one dielectric layer 404. As an example, in some implementations, the one or more signal lines 406 may be disposed between opposing inner surfaces of two dielectric layers 404. The signal lines 406 may be or include any suitable conductive material. In some embodiments, the signal lines 406 may be or include a superconducting signal line 406 including a superconducting material, such as a superconducting material that achieves superconductivity at a temperature less than about 3 Kelvin, such as about 1 Kelvin, about 20 milliKelvin, etc. By way of example, the signal line 406 may be or include niobium, tin, aluminum, molybdenum disulfide, BSCCO, and / or other suitable superconducting materials. Additionally and / or alternatively, the signal line 406 may be or include a material having high signal transmission performance characteristics. By way of example, the signal wires 406 may be or include copper, gold, and / or other suitable materials having suitably high and / or low signal transmission performance characteristics. Additionally and / or alternatively, the signal wires 406 may be or include materials having desired thermal properties, such as, for example, copper, copper alloys, etc.

[0090]

[0102] FIG. 5 illustrates a cross-sectional view of an exemplary flex circuit board 500 according to an exemplary embodiment of the present disclosure. The flex circuit board 500 can include various components described with reference to the flex circuit board 400 of FIG. 4, such as, for example, a ground plane 402, a dielectric layer 404, and / or a signal line 406. Additionally, the flex circuit board 500 can include one or more vias 502. For example, the vias 502 can extend through the ground plane 402, the dielectric layer 404, and / or the signal line 406. The vias 502 can serve to improve isolation of the signal line 406. Additionally and / or alternatively, the vias 502 can serve to couple multiple ground planes 402 and / or to transfer signals between layers (e.g., 402, 404, 406) of the flex circuit board 500. In some embodiments, the vias 502 can be plated with a via plate 504 extending along the vias 502. The via plate 504 can be any suitable material. For example, in some embodiments, the via plate 504 may be or include a conductive material, such as copper.

[0091]

[0103] 6 illustrates a cross-sectional view of an exemplary flex circuit board 600 according to an exemplary embodiment of the present disclosure. The flex circuit board 600 may include various components described with reference to the flex circuit board 400 of FIG. 4, such as, for example, the ground plane 402, the dielectric layer 404, and / or the signal line 406. Additionally, the flex circuit board 600 may include interconnect pads 602. The interconnect pads 602 may be coupled to conductive materials on the flex circuit board 600, such as the ground plane 402 and / or the signal line 406. Additionally and / or alternatively, the vias 604 in the flex circuit board 600 may be plated with a via plate 606. The via plate 606 may be formed from the same material and / or may be formed simultaneously with the interconnect pads 602.

[0092]

[0104] In some embodiments, the ground plane 402 and / or the signal line 406 may be a superconducting material and the interconnect pad 602 may be a material such as copper to provide an improved interface with the superconducting ground plane 402 and / or the superconducting signal line 406. For example, this may solve some of the difficulties associated with interfacing with and / or between superconducting materials. In some embodiments, an adhesion layer (not shown) may be included between the interconnect pad 602 and the conductive material (e.g., the ground plane 402 and / or the signal line 406). In some embodiments, the adhesion layer may be a material different from the material of the ground plane 402 and / or the signal line 406 and / or the interconnect pad 602, such as titanium. In some embodiments, the interconnect pad 602 may be formed from deposited copper and then electroplated copper. The interconnect pad 602 may be deposited in a vacuum to prevent contamination of the interface between the interconnect pad 602 and the flex circuit board 600.

[0093]

[0105] 7 illustrates a cross-sectional view of an exemplary butt joint flex-flex interconnect 700 according to an exemplary embodiment of the present disclosure. In one example, the flex circuit butt joint 700 includes a first flex circuit board 702, a second flex circuit board 706, a ground support layer 740, a solder connection 750, a solder bridge 760, an isolation plate 770, a solder connection 780, and a solder connection 782.

[0094]

[0106] The first flex circuit board 702 includes a removed portion 704, a ground plane 720, a dielectric layer 722, a signal line 724, a dielectric layer 726, and a ground plane 728. In one example, the removed portion 704 of the first flex circuit board 702 exposes some or all of the signal line 724. In some examples, the removed portion 704 is a pocket etched or otherwise created in an edge or side of the first flex circuit board 702 that exposes the signal line 724 for butt connection with a signal line of another board (e.g., exposed signal line 734 of the second flex circuit board 706).

[0095]

[0107] The second flex circuit board 706 includes a removed portion 708, a ground plane 730, a dielectric layer 732, a signal line 734, a dielectric layer 736, and a ground plane 738. In one example, the removed portion 708 of the first flex circuit board 702 exposes some or all of the signal line 734. In some examples, the removed portion 708 is a pocket etched or otherwise created in an edge or side of the second flex circuit board 706 that exposes the signal line 734 for, for example, butt connection with a signal line 724 of the first flex circuit board 702 or another board.

[0096]

[0108] In one example, the first flex circuit board 702 and the second flex circuit board 706 are aligned such that the removed portion 704 of the first flex circuit board 702 and the removed portion 708 of the second flex circuit board 706 are disposed opposite one another. For example, the first flex circuit board 702 and the second flex circuit board 706 may be substantially aligned such that the removed portion 704 and the removed portion 708 form a signal trace gap 710.

[0097]

[0109] In one example, signal trace gap 710 generally represents an area of ​​physical space where signal line 724 is exposed to removed portion 704 of first flex circuit board 702 and signal line 734 is exposed to removed portion 708 of second flex circuit board 706. As such, signal trace gap 710 may generally be an area formed when removed portion 704 of first flex circuit board 702 and removed portion 708 of second flex circuit board 706 are positioned in relative proximity to one another.

[0098]

[0110] In one example, a side or edge of the first flex circuit board 702 corresponding to the removed portion 704 is aligned proximate to a side or edge of the second flex circuit board 706 corresponding to the removed portion 708. In some examples, the removed portion 704 of the first flex circuit board 702 and the removed portion 708 of the second flex circuit board 706 may be positioned such that the first flex circuit board 702 and the second flex circuit board 706 are touching or in contact with each other near the signal trace gap 710. In some examples, the first flex circuit board 702 and the second flex circuit board 706 may not be in contact, but instead may remain relative or in proximity to each other. In some examples, for example, when the first flex circuit board 702 and the second flex circuit board 706 are touching or in contact, one or more exposed signal lines 724 are touching or in contact with one or more exposed signal lines 734 near the signal trace gap 710.

[0099]

[0111] In one example, solder bridge 760 connects one or more exposed signal lines 724 to one or more exposed signal lines 734 near signal trace gap 710. For example, solder bridge 760 can connect exposed signal lines 724 that are in contact or not in contact with exposed signal lines 734, and first flex circuit board 702 and second flex circuit board 706 are either in contact or not in contact. Solder bridge 760 can generally be any type of connecting substance or layer, such as, for example, a solder bridge or connecting material that joins different objects or elements to one another.

[0100]

[0112] In one embodiment, the solder bridge 760 includes one or more conductive materials that allow currents, pulses, signals, and / or other types of communication to pass or travel through the signal lines 724 and 734, or vice versa. In some examples, the solder bridge 760 may be formed of one or more conductive metals, including but not limited to silver, copper, gold, aluminum, and the like. In some examples, the solder bridge 760 may be formed of one or more superconducting materials that become superconducting under certain conditions, such as, for example, at temperatures less than about 3 Kelvin, such as about 1 Kelvin, such as about 20 milliKelvin. In some examples, the solder bridge 760 may include one or more conductive adhesives, for example, in addition to or instead of a solder material. A conductive adhesive may generally include a conductive adhesive, paste, or glue. Such a conductive adhesive may include one or more conductive materials and / or one or more materials that become superconducting under certain conditions.

[0101]

[0113] The ground support layer 740 is coupled to the ground plane 728 of the first flex circuit board 702 and the ground plane 738 of the second flex circuit board 706 via solder connections 750. In one example, the ground support layer 740 extends at least partially across the first flex circuit board 702 and also extends at least partially across the second flex circuit board 706. The ground support layer 740 may be coupled to an exterior portion of the first flex circuit board 702 and an exterior portion of the second flex circuit board 706, for example, to join and support adjacent flex circuit boards. In one example, the solder connections 750 may be one or more solder or adhesive connections coupling the ground support layer 740 to the first flex circuit board 702 and to the second flex circuit board 706.

[0102]

[0114] An insulating isolation plate 770 is coupled to the ground plane 720 of the first flex circuit board 702 via solder connections 780 and to the ground plane 730 of the second flex circuit board 706 via solder connections 782. In one example, the isolation plate 770 extends at least partially across the first flex circuit board 702 and at least partially across the second flex circuit board 706, covering the signal trace gap 710 on the other side of the ground support layer 740. In some examples, the isolation plate 770 covers the signal trace gap 710, the signal line 724 near the removed portion 704 of the first flex circuit board 706, the solder bridge 760 (if present), and the signal line 734 near the removed portion 708 of the second flex circuit board 702. In some examples, the isolation plate 770 may be coupled to one or both of the first flex circuit board 702 and / or the second flex circuit board 706. The flex circuit butt joint 700 can also include a separator plate 770 with or without the use of a ground support layer 740 .

[0103]

[0115] In one example, the flex circuit butt joint 700 can be configured, for example, without a ground support layer 740 and without an isolation plate 770, with at least one of the ground support layer 740 or the isolation plate 770, or with both the ground support layer 740 and the isolation plate 770. In some examples, one or more of the ground support layers 740 and / or the isolation plate 770 may be formed of copper. In some examples, the isolation plate 770 may have one or more holes cut before, during, and / or after circuit board bonding, for example, to provide access to the signal lines 724, 734 near the signal trace gap 710.

[0104]

[0116] In some examples, the flex circuit butt joint 700 is used to join two separate flex circuit boards together. In some examples, the flex circuit butt joint 700 can join one flex circuit board to another type of circuit board, such as a rigid circuit board. Additionally, examples of the present disclosure may be used to join any two separate flexible or rigid circuit boards together. Various examples of the flex circuit butt joint 700 can be used to connect different flex circuit boards and other types of circuit boards used in quantum computing systems, classical computing systems, and / or both quantum and classical computing systems, such as interconnects used to couple quantum and classical computing systems to operate together. In various examples, each of any number of flex circuit boards and / or other types of boards may be joined or chained together, one after the other, in a series, using, for example, a plurality of different flex circuit butt joint 700 interconnects. For example, the second flex circuit board 706 may be joined to a third circuit board (not shown) via a flex circuit butt joint, which may be joined to a fourth circuit board (also not shown) via another flex circuit butt joint, etc.

[0105]

[0117] 8 illustrates a cross-sectional view of an exemplary overlap joint flex-flex interconnect 800 according to an exemplary embodiment of the present disclosure. The overlap joint flex-flex interconnect 800 can be used to interconnect multiple flex circuit boards. The overlap joint flex-flex interconnect 800 can be formed between a first flex circuit board 810 and a second flex circuit board 820. The first flex circuit board 810 can include a ground plane 812, a dielectric layer 814, and / or a signal line 816. Similarly, the second flex circuit board 820 can include a ground plane 822, a dielectric layer 824, and / or a signal line 826. The first flex circuit board 810 and the second flex circuit board 820 can include the same material and / or different materials.

[0106]

[0118] The first flex circuit board 810 can include at least one via 818 that extends from the signal line 816 through the dielectric layer 814 to a second side of the first flex circuit board (e.g., the side having the ground plane 812). For example, the via 818 can be the same material (e.g., a superconducting material) as the signal line 816 and / or can be a different material. The via 818 can be surrounded by a gap 819. For example, the gap 819 can be circular on the surface having the ground plane 812. In some embodiments, the via 818 can extend through both dielectric layers 814, as shown in FIG. 8. For example, the via 818 can be a so-called "through via" that extends from a first surface of the first flex circuit board 810 to a second surface of the first flex circuit board 810. Additionally and / or alternatively, the via 818 may be a so-called "blind via" that extends from the signal line 816 to only one side of the first flex circuit board 810 (eg, to the signal pad 832).

[0107]

[0119] The second flex circuit board 820 may further include at least one via 828 extending from the signal line 826 through the dielectric layer 824 to a second side of the second flex circuit board (e.g., the side having the ground plane 822). For example, the via 828 may be the same material (e.g., a superconducting material) as the signal line 826 and / or may be a different material. The via 828 may be surrounded by a gap 829. For example, the gap 829 may be circular on the surface having the ground plane 822. In some embodiments, the via 828 may extend through both dielectric layers 824. In some embodiments, as shown in FIG. 8, the via 828 may extend through both dielectric layers 824. For example, the via 828 may be a so-called "through via" that extends from a first surface of the second flex circuit board 820 to a second surface of the second flex circuit board 820. Additionally and / or alternatively, the via 828 may be a so-called "blind via" that extends from the signal line 826 to only one side of the second flex circuit board 820 (eg, to the signal pad 832).

[0108]

[0120] The overlap joint flex-flex interconnect 800 may include an overlap joint 830. For example, the overlap joint 830 may be formed at the overlap of the first flex circuit board 810 and the second flex circuit board 820. The overlap joint 830 may include at least a signal pad 832. The signal pad 832 may be configured to couple a signal line 816 (e.g., by a via 818) of the first flex circuit board 810 to a signal line 826 (e.g., by a via 828) of the second flex circuit board 820. The signal pad 832 may facilitate signal transmission between the first flex circuit board 810 and the second flex circuit board 820. Additionally, the overlap joint 830 may include one or more ground pads 834. The ground pad 834 may couple a ground plane 812 of the first flex circuit board 810 to a mating ground plane 822 of the second flex circuit board 822. For example, the ground pad 834 can be placed in electrical communication with the ground layers 812 and 822. One or more gaps 836 can be provided between the signal pad 832 and the ground pad 834 to separate the signal pad 832 from the ground pad 834. In some embodiments, the signal pad 832, the ground pad 834, and / or the gap 836 can be designed for impedance matching of the transmitted signal. For example, the signal pad 832 and / or the ground pad 834 can be formed from solder, solder pads, solder paste, etc.

[0109]

[0121] 9 illustrates a cross-sectional view of an exemplary T-joint connector 900 according to an exemplary embodiment of the present disclosure. The T-joint connector 900 can be configured to couple one or more flex circuit boards 910 to a mounting circuit board 920. For example, the T-joint connector 900 can be configured to vertically connect multiple flex circuit boards 910 to a single mounting circuit board 920. This can provide a high density interconnect suitable for connecting a large number of signal lines (e.g., from multiple boards) to a single board having a relatively high signal line density while maintaining desirable signal transmission characteristics.

[0110]

[0122] Each flex circuit board 910 can include at least one ground plane 912, at least one dielectric layer 914, and / or one or more signal lines 916. For example, flex circuit board 910 can be a flex circuit board such as any of flex circuit boards 400, 500, 600 of Figures 4-6. In some embodiments, ground plane 912 and / or signal lines 916 can be or include a superconducting material such as aluminum, tin, or the like, with a temperature of less than about 3 Kelvin, such as about 1 Kelvin, such as about 20 milliKelvin.

[0111]

[0123] The mounting circuit board 920 may be a flex circuit board (e.g., formed from one or more flexible substrates) as described herein and / or may be a rigid circuit board. The mounting circuit board 920 may include at least a ground plane 922 and a dielectric layer 924. The ground plane 922 and / or the dielectric layer 924 may be flexible and / or rigid. Additionally, a surface of the mounting circuit board 920 opposite the ground plane 922 may include one or more ground pads 926 and / or one or more signal pads 928. For example, the surface opposite the ground plane 922 may include a two-dimensional array of signal pads 928. The ground pads 926 may be positioned to provide insulation between the signal pads 928. For example, the ground pads 926 may be positioned in spaces between the two-dimensional array of signal pads 928.

[0112]

[0124] The T-joint connector can include one or more spring interconnects 930. The spring interconnects 930 can be disposed on a surface of the flex circuit board 910. The spring interconnects 930 can be coupled to and / or in electrical communication (e.g., signal communication) with the one or more signal lines 916. FIG. 9 shows a cross-section of the T-joint connector 900 showing only one spring interconnect 930 per flex circuit board 910. It should be appreciated that in some embodiments, multiple spring interconnects 930 can be spaced across the surface of the flex circuit board 910. For example, a line of spring interconnects 930 can be coupled to a corresponding line of signal pads 928 in a two-dimensional array of signal pads 928.

[0113]

[0125] Each of the spring interconnects 930 can include a spring element 932. In some embodiments, the spring elements 932 can be attached to the flex circuit board 910 by signal pads 934, such as solder pads. The signal pads 934 can provide signal communication with the spring elements 932. The vias 936 can extend from the signal lines 916 to the signal pads 934 and / or the spring elements 932. For example, the vias 936 can provide signal communication between the signal lines 916 and the spring elements 932. In some embodiments, a gap 938 can be provided between the signal pads 934 and the ground plane 912 to separate the ground plane 912 from the signal pads 934 and / or the spring elements 932.

[0114]

[0126] In some embodiments, the spring element 932 may include a superconducting material at a temperature less than about 3 Kelvin, such as about 1 Kelvin, such as about 20 milliKelvin. For example, in some embodiments, the spring element 932 may be formed of a superconducting material. Additionally and / or alternatively, in some embodiments, the spring element 932 may include a coating of a superconducting material, such as tin. For example, the spring element 932 may be formed of a non-superconducting material (e.g., beryllium) and coated with a superconducting material (e.g., tin). In this manner, the spring element 932 may function adequately as a spring using a material having desired mechanical properties (e.g., elasticity, tension, etc.) that may not be superconducting, while the superconducting coating may provide superconductivity as the coating may be sufficient to provide superconducting properties in the spring interconnect 930.

[0115]

[0127] In some embodiments, the T-joint connector 900 can include one or more ground substrates (not shown) between the flex circuit boards 910. The ground substrates can isolate the first flex circuit board 910 from the second flex circuit board 910 and / or isolate the flex circuit boards 910 from external interference. Additionally and / or alternatively, a ground substrate may be included between the flex circuit board 910 and the mounting substrate 920. The ground substrate may contact the mounting substrate 920 (e.g., ground pad 928) and / or other suitable ground such that the ground substrate is grounded.

[0116]

[0128] In some embodiments, the T-joint connector 900 may be self-aligned. For example, various alignment systems such as shims, tabs, connector hardware, etc. may be used to align the flex circuit board 910 to the mounting circuit board 920 and / or align the spring elements 932 to the signal pads 928. As an example, the flex circuit board 910 and / or the spring interconnects 930 may be disposed within connector hardware configured to align the T-joint connector 900 to an interfacing mating interface on the mounting circuit board 920.

[0117]

[0129] FIG. 10A illustrates an exemplary hermetic seal 1000 according to an exemplary embodiment of the present disclosure. The hermetic seal 1000 can be configured to receive at least one flex circuit board and allow a portion of the flex circuit board to enter the vacuum chamber. For example, the hermetic seal 1000 may be disposed at an end (e.g., an entrance) of the vacuum chamber, such as a cap of a chamber mount. The flex circuit board can be configured to penetrate the hermetic seal 1000 such that a first portion of the flex circuit board is disposed within the vacuum chamber and a second portion of the flex circuit board is disposed outside the vacuum chamber, while the hermetic seal 1000 forms a vacuum seal for the vacuum chamber. The hermetic seal 1000 allows the flex circuit board to enter the vacuum chamber without (e.g., substantially) breaking the vacuum created by the vacuum chamber.

[0118]

[0130] As an example, the hermetic seal 1000 can include a hermetic seal base 1002. The hermetic seal base 1002 can be attached to a chamber mount, such as a cap of the chamber mount. In some embodiments, the hermetic seal base 1002 can be formed contiguous with the chamber mount. The hermetic seal base 1002 can include slots configured to receive various components of the hermetic seal 1000, such as, for example, a mating seal 1004, a screw 1010, and / or a screw 1012.

[0119]

[0131] The hermetic seal 1000 can include one or more mating seals 1004. For example, the hermetic seal 1000 can include a mating seal 1004 for each flex circuit board. The mating seal 1004 can receive the flex circuit board and form a vacuum seal with a surface of the flex circuit board. This is further described with reference to FIG. 10B. Additionally, the hermetic seal 1000 can include one or more seal slots configured to receive the mating seal 1004 and / or the flex circuit board. For example, the mating seal 1004 can form a vacuum seal with the seal slot while allowing the flex circuit board to pass through the seal slot and the hermetic seal 1000 (e.g., into a vacuum chamber). In this manner, the flex circuit board can pass through the hermetic seal 1000 (e.g., into a vacuum chamber) without experiencing signal interruption due to breakage of the circuit board, since the board can pass through the hermetic seal 1000 continuously (e.g., into a vacuum chamber).

[0120]

[0132] The hermetic seal 1000 can include various fastening elements for securing the mating seal 1004 to the hermetic seal base 1002 (e.g., a seal slot) and / or for forming a vacuum seal with the hermetic seal base 1002. For example, the hermetic seal 1000 can include a first side support 1006. The first side support 1006 can be attached to a first side of the hermetic seal base 1002, such as the side that receives the mating seal 1004. For example, the first side support 1006 can be attached to the hermetic seal base 1002 by a screw 1010. The first side support 1006 can secure the mating seal 1004 to the hermetic seal base 1002. Additionally and / or alternatively, the first side support 1006 can secure the seal ring 1014 and / or seal ring cap 1016 to the mating seal 1004 to aid in forming a vacuum seal between the mating seal 1004 and the first side support 1006. A slot 1007 in the first side support 1006 can allow a flex circuit board to pass through the airtight seal 1000.

[0121]

[0133] Additionally and / or alternatively, the hermetic seal 1000 can include a second side support 1008. The second side support 1008 can be attached to a second side of the hermetic seal base 1002, such as a side on an inner surface of a vacuum chamber. For example, the second side support 1008 can be attached to the hermetic seal base 1002 by screws 1012. The second side support 1008 can further secure the mating seal 1004 to the hermetic seal base 1002 and / or assist in forming a vacuum seal between the mating seal 1004 and the hermetic seal base 1002. Additionally and / or alternatively, a slot in the second side support 1008 can allow a flex circuit board to pass through the hermetic seal 1000.

[0122]

[0134] 10B illustrates an exemplary mating seal assembly 1050 according to an exemplary embodiment of the present disclosure. As shown in FIG. 10B, the mating seal 1004 can receive a flex circuit board 1052 and form a vacuum seal with a surface of the flex circuit board 1052. This can further provide for individual removal of the flex circuit board 1052 from the airtight seal 1000, as the single mating seal 1004 and flex circuit board 1052 can be removed from the slot.

[0123]

[0135] In some embodiments, the mating seal 1004 can be adhesive-less. For example, the mating seal 1004 can form a vacuum seal with the flex circuit board 1052 without the aid of an adhesive, such as a glue, resin, sealant, or the like. For example, the mating seal 1004 can include a rigid outer shell, and the inner surface of the outer shell can include an epoxy seal. This can provide advantages, such as, for example, easier removal of the flex circuit board 1052 from the airtight seal 1000 and / or reduced adhesive build-up on the flex circuit board 1052. In some embodiments, the mating seal 1004 can form a vacuum seal even in the absence of the flex circuit board 1052. Additionally and / or alternatively, the mating seal 1004 can be replaced by another seal in the absence of the flex circuit board 1052, such that not all slots in the airtight seal 1000 must receive the flex circuit board 1052 in order to form a vacuum seal.

[0124]

[0136] 11 illustrates an exemplary surface mount attenuator substrate 1100 in accordance with an exemplary embodiment of the present disclosure. For example, the surface mount attenuator substrate 1100 may include a flex circuit substrate 1102. In some embodiments, one or more additional flex circuit substrates may be coupled to the surface mount attenuator substrate 1100 (e.g., to the flex circuit substrate 1102). In some embodiments, the surface mount attenuator substrate 1100 and / or the surface mount attenuator 1114 may be placed at a sufficiently low temperature such that the surface mount attenuator does not generate thermal photons.

[0125]

[0137] The surface mount attenuator substrate 1100 may include one or more surface mount attenuators 1114. The surface mount attenuators 1114 may be configured to attenuate or block signal components at the surface mount attenuator, such as due to thermal photon interference. For example, the surface mount attenuators 1114 may be coupled to signal lines of the surface mount attenuator substrate 1100, such as signal lines of the flex circuit board 1102. As an example, vias 1116 may extend through the surface mount attenuator substrate 1100 (e.g., a ground plane of the flex circuit board 1102) to couple the surface mount attenuators to signal lines within the flex circuit board 1102.

[0126]

[0138] The surface mount attenuators 1114 can be disposed within an isolation plate 1110. For example, the isolation plate 1110 can be attached to a surface mount attenuator substrate 1100, such as a flex circuit board 1102. In some embodiments, the isolation plate 1110 can be mounted to a ground plane of the flex circuit board 1102 and / or otherwise grounded. The isolation plate 1110 can be configured to isolate one or more surface mount attenuators 1114 (e.g., from other surface mount attenuators 1114). For example, the isolation plate can include one or more cavities 1112 configured to isolate a first surface mount attenuator 1114 from a second surface mount attenuator 1114. For example, the cavities can surround the first surface mount attenuator 1114 in the direction of the second surface mount attenuator 1114 to block crosstalk between the attenuators 1114.

[0127]

[0139] In some embodiments, the surface mount attenuator substrate 1100 (e.g., flex circuit board 1102) may be or include surface mount attenuator substrate material, such as for ground planes and / or signal lines. The surface mount attenuator substrate material may be selected to provide high signal transfer performance characteristics. By way of example, the surface mount attenuator substrate material may be or include copper, brass, gold, and / or other suitable materials having high signal transfer performance characteristics. For example, the surface mount attenuator substrate 1100 (e.g., flex circuit board 1102) may include copper signal lines and / or ground planes to provide high signal transfer performance characteristics.

[0128]

[0140] FIG. 12 illustrates an exemplary method of operating a quantum computing system including a flex circuit board, according to an exemplary embodiment of the present disclosure. Method 700 may be implemented using any suitable quantum computing system, such as any of the quantum computing systems 100 or 300 illustrated in FIGS. 1-3. FIG. 12 illustrates steps that are performed in a particular order for purposes of illustration and discussion. Those skilled in the art will appreciate, using the disclosure provided herein, that the various steps of any method disclosed herein may be adapted, modified, performed simultaneously, omitted, include steps not shown, rearranged, and / or expanded in various ways without departing from the scope of the present disclosure.

[0129]

[0141] The method 1200 may include, at 1202, transmitting a control pulse to one or more signal lines. For example, the control pulse may be transmitted by one or more classical processors coupled to the signal lines. The control pulse may be or may include classical (e.g., binary) computer-readable signal data, such as a voltage signal, and / or a signal implementable by a quantum computing device. The signal lines may be disposed on one or more flex circuit boards. For example, the flex circuit board may be any suitable flex circuit board described herein, such as flex circuit boards 400, 500, and / or 600 of FIGS. 4-6. The flex circuit board may be disposed within any suitable quantum computing system, such as quantum computing systems 100 and / or 300 of FIGS. 1-3.

[0130]

[0142] Method 1200 may include, at 1204, transmitting a control pulse to one or more quantum computing devices via one or more flex circuit boards. For example, the control pulse may be transmitted to the quantum computing devices via signal lines in the one or more flex circuit boards. The control pulse may be transmitted by the signal lines through a temperature gradient in the vacuum chamber. For example, the signal lines carrying the control pulse may progressively reduce the temperature from the classical processor (e.g., room temperature and / or a temperature on the order of about 100 Kelvin) to the quantum computing devices (e.g., a temperature less than about 1 Kelvin, such as about 10 mK).

[0131]

[0143] Method 1200 may include, at 1206, applying a control pulse to perform at least one quantum operation based at least in part on the control pulse. As an example, in some embodiments, the quantum operation may be or may include obtaining a state measurement of the quantum computing device. For example, the control pulse may instruct the quantum computing device to measure a quantum state and / or to decompose the quantum state into basis state representations. Further, the measured quantum state may be transmitted (e.g., by a signal line) to a classical processor.

[0132]

[0144] As another example, in some embodiments, a quantum operation can be or can include performing at least one quantum gate operation by and / or in a quantum computing device. For example, a control pulse can describe a microwave pulse that is applied to a quantum computing device (e.g., a qubit) to perform a quantum gate operation. Examples of quantum gate operations include, but are not limited to, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, and the like.

[0133]

[0145] Implementations of the digital and / or quantum subject matter and digital functional and quantum operations described herein may be implemented in digital electronic circuitry, suitable quantum circuitry, or more generally, in quantum computing systems, in specifically implemented digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware including the structures disclosed herein and their structural equivalents, or in one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0134]

[0146] Implementations of the digital and / or quantum subject matter described herein can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by or to control the operation of a data processing device. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits / qubit structures, or one or more combinations thereof. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagating signal capable of encoding digital and / or quantum information (e.g., a machine-generated electrical signal, a machine-generated optical signal, or a machine-generated electromagnetic signal) that is generated to encode the digital and / or quantum information for transmission to a suitable receiver device for execution by the data processing device.

[0135]

[0147] The terms quantum information and quantum data refer to information or data carried, held, or stored by a quantum system, where the smallest non-trivial system is a qubit, i.e., a system that defines a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems can include multi-level systems, for example having two or more levels. By way of example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis state is identified with a ground state and a first excited state, but it is understood that other configurations are possible in which the computational state is identified with a higher level excited state (e.g., a qubit).

[0136]

[0148] The term "data processing apparatus" refers to digital and / or quantum data processing hardware and encompasses any kind of apparatus, device, and machine for processing digital and / or quantum data, including, by way of example, a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or a plurality of digital and quantum processors or computers, and combinations thereof. The apparatus may also be or further include special-purpose logic circuits, such as, for example, a field programmable gate array (FPGA), or an application-specific integrated circuit (ASIC), or a quantum simulator, i.e., a quantum data processing apparatus designed to simulate or generate information about a particular quantum system. In particular, a quantum simulator is a special-purpose quantum computer that does not have the ability to perform general-purpose quantum computation. In addition to hardware, the apparatus may optionally include code that generates an execution environment for digital and / or quantum computer programs, such as code constituting a processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0137]

[0149] A digital computer program may also be called or written as a program, software, software application, module, software module, script, or code, and may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be deployed in any form, such as as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program may also be called or written as a program, software, software application, module, software module, script, or code, and may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be translated into a suitable quantum programming language or written in a quantum programming language, e.g., QCL, Quipper, Cirq, etc.

[0138]

[0150] The digital and / or quantum computer programs may, but need not, correspond to files in a file system. The programs can be stored as part of files that hold other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple cooperating files (e.g., files that store one or more modules, subprograms, or portions of code). The digital and / or quantum computer programs can be deployed to run on one digital or one quantum computer, or on multiple digital and / or quantum computers located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using quantum systems, e.g., qubits. In general, digital data communication networks cannot transmit quantum data, but quantum data communication networks can transmit both quantum data and digital data.

[0139]

[0151] The processes and logic flows described herein may, as appropriate, be performed by one or more programmable digital and / or quantum computers operating on one or more digital and / or quantum processors and executing one or more digital and / or quantum computer programs to perform functions by operating on input digital and quantum data and generating outputs. The processes and logic flows may also be performed by special purpose logic circuitry (e.g., FPGAs or ASICs) or quantum simulators, or may be implemented by a combination of special purpose logic circuitry or quantum simulators and one or more programmed digital and / or quantum computers, and the apparatus may also be so implemented.

[0140]

[0152] A system of one or more digital and / or quantum computers or processors "configured" or "operable" to perform a particular operation or action means that software, firmware, hardware, or a combination thereof is installed on the system that, during operation, causes the system to perform the operation or action. One or more digital and / or quantum computer programs are configured to perform a particular operation or action means that one or more programs contain instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer can accept instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform the operation or action.

[0141]

[0153] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program can be based on a general purpose or dedicated digital and / or quantum microprocessor or both, or on any other kind of central digital and / or quantum processing unit. In general, the central digital and / or quantum processing unit accepts instructions and digital and / or quantum data from a read-only memory, or a random access memory, or a quantum system suitable for transmitting quantum data, e.g. photons, or a combination thereof.

[0142]

[0154] Some exemplary elements of a digital and / or quantum computer are a central processing unit for carrying out or executing instructions, and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory may be supplemented by or incorporated into dedicated logic circuits or quantum simulators. In general, a digital and / or quantum computer also includes one or more mass storage devices for storing digital and / or quantum data, such as magnetic, magneto-optical, or optical disks, or a quantum system suitable for storing quantum information, or is operatively coupled to accept digital and / or quantum data from these one or more mass storage devices, or to transfer digital and / or quantum data to these one or more mass storage devices, or to do both. However, a digital and / or quantum computer need not have such devices.

[0143]

[0155] Digital and / or quantum computer readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media and memory devices, including, by way of example, semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks; and quantum systems, such as trapped atoms or electrons. Quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, such as a light-matter interface where light is used for transmission, and material for storing and preserving quantum characteristics of quantum data, such as superposition or quantum coherence.

[0144]

[0156] Control of the various systems described herein, or portions thereof, may be implemented in a digital and / or quantum computer program product stored on one or more non-transitory machine-readable storage media and including instructions executable on one or more digital and / or quantum processing devices. The systems described herein, or portions thereof, may each be implemented as an apparatus, method, or electronic system that may include one or more digital and / or quantum processing devices and memories for storing executable instructions for performing the operations described herein.

[0145]

[0157] Although this specification includes details of many specific implementations, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to a particular implementation. Certain features described in the context of separate implementations herein may also be implemented in combination in a single implementation. Conversely, various functions described in the context of a single implementation may also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, even if features are described above as acting in a particular combination and initially claimed as such, one or more features from the claimed combination may, in some cases, be deleted from the combination, and the claimed combination may be subject to subcombinations or variations of the subcombination.

[0146]

[0158] Similarly, although operations are shown in the figures in a particular order, this should not be understood as requiring such operations to be performed in the particular order shown, or in sequential order, or that all of the illustrated operations be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the program components and systems described may generally be integrated together in a single software product or packaged in multiple software products.

[0147]

[0159] Particular implementations of the present subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As an example, the processes depicted in the accompanying figures do not necessarily require the particular order depicted, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. 1. A quantum computing system comprising: one or more classical processors; Quantum hardware including one or more qubits; a chamber mount configured to support the quantum hardware; a vacuum chamber configured to receive the chamber mount and to place the quantum hardware in a vacuum, the vacuum chamber forming a cooling gradient from an end of the vacuum chamber to the quantum hardware; a plurality of flex circuit boards comprising one or more signal lines, each of the plurality of flex circuit boards configured to transmit signals via the one or more signal lines through the vacuum chamber to couple the one or more classical processors to the quantum hardware; Equipped with 1. A quantum computing system, wherein the end of the vacuum chamber comprises a hermetic seal, the hermetic seal comprising a plurality of mating seals, and each of the plurality of flex circuit boards penetrates a respective one of the plurality of mating seals of the hermetic seal.

2. 10. The quantum computing system of claim 1, further comprising a classical-flex interconnect configured to couple the one or more classical processors to the plurality of flex circuit boards.

3. The quantum computing system of claim 2 , wherein the classical flex interconnect comprises a compression interposer.

4. The quantum computing system of claim 1 , further comprising one or more flex-to-flex interconnects between the plurality of flex circuit boards.

5. 10. The quantum computing system of claim 1, further comprising one or more surface mounted attenuators coupled to the one or more signal lines.

6. 6. The quantum computing system of claim 5, further comprising an isolation plate configured to isolate the one or more surface mounted attenuators.

7. The plurality of flex circuit boards include: at least one ground plane; at least one dielectric layer disposed on an inner surface of the at least one ground plane; Equipped with The quantum computing system of claim 1 , wherein at least a portion of the one or more signal lines are disposed on an interior surface of the at least one dielectric layer.

8. two parallel spaced apart ground planes; two dielectric layers each disposed on an inner surface of one of the ground planes; Equipped with The quantum computing system of claim 7 , wherein at least a portion of the one or more signal lines are disposed on an inner surface of the two dielectric layers.

9. The quantum computing system of claim 1 , wherein the plurality of flex circuit boards comprises one or more vias.

10. The quantum computing system of claim 1 , wherein the plurality of flex circuit boards comprises copper.

11. The quantum computing system of claim 1 , wherein the plurality of flex circuit boards comprises a copper alloy.

12. The quantum computing system of claim 1 , wherein the plurality of flex circuit boards comprises a superconducting material, the superconducting material exhibiting superconductivity at a temperature below 3 Kelvin.

13. The quantum computing system of claim 12 , wherein a ground plane of the flex circuit board comprises the superconducting material.

14. The quantum computing system of claim 12 , wherein the one or more signal lines comprise the superconducting material.

15. 10. The quantum computing system of claim 1, further comprising at least one filter configured to filter signals on the one or more signal lines.

16. 10. The quantum computing system of claim 1, further comprising a connector coupling the plurality of flex circuit boards to the quantum hardware.

17. The quantum computing system of claim 16 , wherein the connector comprises a T-joint connector.

18. A method of operating a quantum computing system according to any one of claims 1 to 17, comprising: sending, by one or more classical processors, control pulses to one or more signal lines, the one or more signal lines being disposed on one or more flex circuit boards; transmitting the control pulses via the one or more signal lines through the one or more flex circuit boards to one or more quantum computing devices; applying the control pulses to perform, by the one or more quantum computing devices, at least one quantum operation based at least in part on the control pulses; A method comprising:

19. 1. A quantum computing system comprising: one or more classical processors; Quantum hardware including one or more qubits; a chamber mount configured to support the quantum hardware; a vacuum chamber configured to receive the chamber mount and to place the quantum hardware in a vacuum, the vacuum chamber forming a cooling gradient from an end of the vacuum chamber to the quantum hardware; at least one first flex circuit board coupled to the one or more classical processors by a classical flex interconnect, the at least one first flex circuit board comprising copper; at least one second flex circuit board coupled to the at least one first flex circuit board by a first flex-flex interconnect, the at least one second flex circuit board comprising a copper alloy; at least one surface mount attenuator substrate comprising one or more surface mount attenuators coupled to the at least one second flex circuit board, the at least one surface mount attenuator substrate comprising copper; at least one third flex circuit board coupled to the at least one surface mount attenuator substrate by a second flex-flex interconnect, the at least one third flex circuit board comprising niobium; at least one fourth flex circuit board coupled to the at least one third flex circuit board by a third flex-flex interconnect, the at least one fourth flex circuit board comprising copper; a connector configured to couple the at least one fourth flex circuit board to the Quantum Hardware; A quantum computing system comprising:

Images