Imaging device and electronic device

By setting a vertical transistor on the semiconductor substrate to adjust the transistor's crystal direction and gate electrode shape, the problem of thermal oxidation rate unevenness caused by crystal plane differences is solved, and the charge transfer efficiency is improved.

JP7621331B2Active Publication Date: 2025-01-24SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
JP2022508109
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-03-18
Filing Date
2021-01-28
Publication Date
2025-01-24
Estimated Expiration
2041-01-28

AI Technical Summary

Technical Problem

In the prior art, different crystal surfaces of semiconductor materials lead to different thermal oxidation rates, resulting in uneven gate film thickness, affecting charge transfer efficiency.

Method used

By setting a vertical transistor on the semiconductor substrate, the transistor direction and the shape of the gate electrode are adjusted to reduce thermal oxidation inhomogeneity and enhance charge transfer efficiency.

Benefits of technology

It improves the charge transfer efficiency, reduces the resistance of charge during the transfer process, and enhances the charge transfer capability.

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Patent Text Reader

Abstract

Provided are an imaging device and an electronic apparatus having high charge transfer efficiency. The imaging device is provided with a semiconductor substrate and a vertical transistor provided on the semiconductor substrate. The semiconductor substrate has a hole portion opening on a first major surface side. The vertical transistor includes a first gate electrode provided in the hole portion, and a first gate insulating film provided between an inner wall of the hole portion and the first gate electrode. A cross section of the first gate electrode taken in a plane parallel to the first major surface has a thin and long shape in a <100> crystal orientation direction of the semiconductor substrate.
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Description

[Technical field]

[0001] The present disclosure relates to an imaging device and an electronic device. [Background technology]

[0002] In a solid-state imaging device having a photodiode and a transistor for reading out charges photoelectrically converted by the photodiode, a configuration is known in which the transfer transistor for transferring charges is made vertical in order to reduce the area occupied by the device and to increase the light receiving area of ​​the photodiode (see, for example, Patent Document 1). The vertical transistor includes a hole formed in a semiconductor substrate, a gate insulating film formed to cover the inner wall of the hole, and a gate electrode formed to fill the hole via the gate insulating film. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2011-14751 A Summary of the Invention [Problem to be solved by the invention]

[0004] The inner walls of holes formed in a semiconductor substrate have various crystal planes. Typical crystal planes of semiconductor materials (e.g., Si) are the (110) plane and the (100) plane which is inclined at 45° to the (110) plane. Because there is a difference in thermal oxidation rate between the (110) plane and the (100) plane, the gate insulating film formed on the inner walls of the hole has a thickness difference according to the crystal plane. This thickness difference can become a potential barrier and inhibit the transfer of charges.

[0005] The present disclosure has been made in consideration of the above circumstances, and has an object to provide an imaging device and electronic device with excellent charge transfer efficiency. [Means for solving the problem]

[0006] An imaging device according to an aspect of the present disclosure includes a semiconductor substrate and a vertical transistor provided on the semiconductor substrate, the semiconductor substrate having a hole that opens to a first main surface side, the vertical transistor having a first gate electrode provided in the hole and a first gate insulating film provided between an inner wall of the hole and the first gate electrode, and a cross section of the first gate electrode cut along a plane parallel to the first main surface has a crystal orientation of the semiconductor substrate. <100> It has an elongated shape in the direction.

[0007] According to this, the (110) surface of the inner wall of the hole, on which the first gate insulating film is formed as a thick film, is located near the end in the long axis direction of the cross section of the first gate electrode cut along a plane parallel to the first main surface. Then, by thermal oxidation of the (110) surface, a thick film portion of the first gate insulating film is formed near the end in the long axis direction. By arranging the regions (thick film regions) in the semiconductor substrate that contact the thick film portions at the source end and drain end of the vertical transistor, respectively, the potential barrier generated in the thick film region can be offset and reduced by the respective potential gradients generated at the source end and drain end. As a result, the charge e of the vertical transistor - The transfer efficiency can be improved.

[0008] According to an aspect of the present disclosure, there is provided an electronic device comprising an optical component, an imaging device into which light transmitted through the optical component is incident, and a signal processing circuit that processes a signal output from the imaging device. The imaging device comprises a semiconductor substrate and a vertical transistor provided in the semiconductor substrate. The semiconductor substrate has a hole that opens to a first main surface side. The vertical transistor has a first gate electrode provided in the hole and a first gate insulating film provided between an inner wall of the hole and the first gate electrode. A cross section taken along a plane parallel to the first main surface has a crystal orientation of the semiconductor substrate. <100> In this way, it is possible to provide an electronic device that includes an imaging device with excellent charge transfer efficiency. [Brief description of the drawings]

[0009] [Figure 1]FIG. 1 is a diagram illustrating an example of the configuration of an imaging device according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is a plan view showing an example of a pixel sharing structure of the imaging device according to an embodiment of the present disclosure. [Diagram 3] FIG. 3 is a plan view illustrating a configuration example of a pixel according to an embodiment of the present disclosure. [Figure 4] FIG. 4 is a cross-sectional view showing a configuration example of a pixel according to an embodiment of the present disclosure. [Diagram 5] FIG. 5 is a cross-sectional view showing a first configuration example of a first gate electrode and a first gate insulating film according to an embodiment of the present disclosure. [Figure 6] FIG. 6 is a cross-sectional view showing a second configuration example of the first gate electrode and the first gate insulating film according to an embodiment of the present disclosure. [Figure 7] FIG. 7 is a graph showing a schematic diagram of a potential distribution in a semiconductor substrate around a first gate electrode according to an embodiment of the present disclosure. [Figure 8] FIG. 8 is a cross-sectional view showing the configuration of a first gate electrode and a first gate insulating film according to a comparative example of the present disclosure. [Figure 9] FIG. 9 is a graph showing a schematic diagram of a potential distribution in a semiconductor substrate around a first gate electrode according to a comparative example of the present disclosure. [Figure 10] FIG. 10 is a plan view showing a configuration of a pixel according to the first modification of the embodiment of the present disclosure. [Figure 11] FIG. 11 is a plan view showing a configuration of a pixel according to the second modification of the embodiment of the present disclosure. [Figure 12] FIG. 12 is a plan view showing a configuration of a pixel according to the third modification of the embodiment of the present disclosure. [Figure 13] FIG. 13 is a plan view showing a configuration of a pixel according to the fourth modification of the embodiment of the present disclosure. [Figure 14] FIG. 14 is a plan view showing a configuration of a pixel according to the fifth modification of the embodiment of the present disclosure. [Figure 15] FIG. 15 is a conceptual diagram showing an example in which the technology according to the present disclosure (the present technology) is applied to an electronic device. [Figure 16]FIG. 16 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied. [Figure 17] FIG. 17 is a block diagram showing an example of a functional configuration of the camera head and the CCU shown in FIG. [Figure 18] FIG. 18 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied. [Figure 19] FIG. 19 is a diagram showing an example of the installation position of the imaging unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In the description of the drawings referred to in the following description, the same or similar parts are denoted with the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc., differ from the actual ones. Therefore, the specific thickness and dimensions should be determined with reference to the following description. In addition, it goes without saying that the drawings include parts with different dimensional relationships and ratios.

[0011] In addition, the definitions of directions such as up and down in the following description are merely for the convenience of explanation and do not limit the technical ideas of the present disclosure. For example, if an object is rotated 90 degrees and observed, up and down are converted to left and right and read, and if it is rotated 180 degrees and observed, up and down are reversed and read.

[0012] In the following description, a plan view means a view from a normal direction of a surface 111a of a semiconductor substrate 111, which will be described later.

[0013] <Embodiment> (Overall configuration example) FIG. 1 is a diagram showing a configuration example of an imaging device 100 according to an embodiment of the present disclosure. The imaging device 100 shown in FIG. 1 is, for example, a CMOS solid-state imaging device. As shown in FIG. 1, the imaging device 100 is configured to have a pixel region (so-called imaging region) 103 in which pixels 102 including a plurality of photoelectric conversion elements are regularly arranged two-dimensionally on a semiconductor substrate 111 (for example, a silicon substrate), and a peripheral circuit section. The pixel 102 is configured to have a photodiode serving as a photoelectric conversion element and a plurality of pixel transistors (so-called MOS transistors). The plurality of pixel transistors can be configured with three transistors, a transfer transistor, a reset transistor, and an amplification transistor. The plurality of pixel transistors can also be configured with four transistors by adding a selection transistor to the above three transistors. The equivalent circuit of the unit pixel is the same as that of a normal pixel, and detailed description thereof will be omitted.

[0014] The pixel 102 may have a shared pixel structure. The shared pixel structure is composed of a plurality of photodiodes, a plurality of transfer transistors, one shared floating diffusion, and each of the other pixel transistors. That is, in the shared pixel structure, the photodiodes and transfer transistors constituting the plurality of unit pixels share each of the other pixel transistors except for the transfer transistor.

[0015] The peripheral circuit section includes a vertical drive circuit 104, a column signal processing circuit 105, a horizontal drive circuit 106, an output circuit 107, a control circuit 108, and the like.

[0016] The control circuit 108 receives an input clock and data instructing an operation mode, etc., and outputs data such as internal information of the imaging device. That is, the control circuit 108 generates clock signals and control signals that serve as a reference for the operation of the vertical drive circuit 104, the column signal processing circuit 105, the horizontal drive circuit 106, etc., based on a vertical synchronization signal, a horizontal synchronization signal, and a master clock. The control circuit 108 then inputs these signals to the vertical drive circuit 104, the column signal processing circuit 105, the horizontal drive circuit 106, etc.

[0017] The vertical drive circuit 104 is configured, for example, by a shift register, selects a pixel drive wiring, supplies a pulse for driving the pixel to the selected pixel drive wiring, and drives the pixel by row. That is, the vertical drive circuit 104 selects and scans each pixel 102 in the pixel area 103 in the vertical direction by row, and supplies a pixel signal based on a signal charge generated in the photoelectric conversion element of each pixel 102 according to the amount of light received to the column signal processing circuit 105 through a vertical signal line 109.

[0018] The column signal processing circuit 105 is arranged, for example, for each column of the pixels 102, and performs signal processing such as noise removal for each pixel column on signals output from one row of the pixels 102. That is, the column signal processing circuit 105 performs signal processing such as CDS for removing fixed pattern noise specific to the pixels 102, signal amplification, AD conversion, etc. At the output stage of the column signal processing circuit 105, a horizontal selection switch (not shown) is provided and connected between the output stage and the horizontal signal line 110.

[0019] The horizontal drive circuit 106 is configured, for example, by a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 105 in turn, and cause each of the column signal processing circuits 105 to output a pixel signal to a horizontal signal line 110.

[0020] The output circuit 107 processes and outputs signals sequentially supplied from each of the column signal processing circuits 105 through a horizontal signal line 110. For example, the output circuit 107 may perform only buffering, or may perform black level adjustment, column variation correction, various digital signal processing, etc. The input / output terminal 112 exchanges signals with the outside.

[0021] (Pixel configuration example) 2 is a plan view showing an example of a pixel sharing structure of the imaging device 100 according to an embodiment of the present disclosure. As shown in FIG. 2, in the imaging device 100, a total of four pixels 102, for example, arranged in two pixels in each of the vertical and horizontal directions, constitute one shared pixel structure. One shared pixel structure includes four photodiodes PD (an example of a "photoelectric conversion unit" in the present disclosure), four transfer transistors Tr (an example of a "vertical transistor" in the present disclosure), and one shared floating diffusion FD (an example of an "electronic load The memory cell includes a shared transistor (an example of a "holding unit"), one shared selection transistor (not shown), one shared reset transistor (not shown), and one shared amplification transistor (not shown).

[0022] The floating diffusion FD is disposed at the center of four pixels 102 constituting one shared pixel structure. A gate electrode GE of a transfer transistor Tr is disposed near the floating diffusion FD. The gate electrodes GE of the four pixels 102 are disposed so as to surround one floating diffusion FD in a plan view. A pixel separation section 120 is provided on the periphery of each pixel 102. The pixel separation section 120 is formed of, for example, an impurity diffusion layer of a different conductivity type from that of the semiconductor substrate 111, deep trench isolation, or the like.

[0023] 2, the vertically upper side of the paper is the front surface 101a side of the semiconductor substrate 111, where a multilayer wiring layer (neither shown) consisting of a plurality of wiring layers and an interlayer insulating film is provided. Meanwhile, the vertically lower side of the paper is the back surface side of the semiconductor substrate 111, which is a light incident surface into which light is incident, where an on-chip lens, a color filter, and the like (neither shown) are provided. The imaging device 100 is a back-illuminated CMOS image sensor that photoelectrically converts light incident from the back surface side of the semiconductor substrate 111.

[0024] FIG. 3 is a plan view showing a configuration example of a pixel 102 according to an embodiment of the present disclosure. FIG. 4 is a cross-sectional view showing a configuration example of a pixel 102 according to an embodiment of the present disclosure. FIG. 4 is a schematic cross-sectional view taken along line A3-A'3 in FIG. 3. The semiconductor substrate 111 is, for example, a single-crystal silicon substrate, or a single-crystal silicon layer formed by epitaxial growth on a substrate (not shown). As shown in FIG. 4, the conductivity type of the semiconductor substrate 111 is, for example, P-type.

[0025] 3 and 4, the photodiode PD is provided inside a P-type semiconductor substrate 111. The photodiode PD is formed of, for example, an N-type impurity diffusion layer. The photodiode PD photoelectrically converts incident light incident from the back side of the semiconductor substrate 111, and converts the resulting charge e - Accumulate.

[0026] The transfer transistor Tr is provided from the inside of the semiconductor substrate 111 to the surface 111a (an example of a "first main surface" in the present disclosure). The transfer transistor Tr is, for example, an N-type vertical transistor having a gate electrode GE and a gate insulating film 1 provided between the gate electrode GE and the semiconductor substrate 111, a photodiode PD as a source, and a floating diffusion FD as a drain. The transfer transistor Tr transfers a charge e from the photodiode PD to the floating diffusion FD. - Transfer.

[0027] The floating diffusion FD is provided on the surface 111a side of the semiconductor substrate 111 and is made of, for example, an N-type impurity diffusion layer. The floating diffusion FD is configured to receive the charge e transferred from the transfer transistor Tr. - Hold.

[0028] The structure of the transfer transistor Tr will be described in more detail. The semiconductor substrate 111 is provided with a hole H1 that opens on the surface 111a side and is adjacent to the photodiode PD. The gate electrode GE is disposed in the hole H1 via the first gate insulating film 11 and has a first gate electrode VG that is extended in the vertical direction (i.e., the thickness direction of the semiconductor substrate 111) and a second gate electrode TG that is provided on the second gate insulating film 12 and connected to the first gate electrode VG. The first gate electrode VG and the second gate electrode TG are made of, for example, a polysilicon film doped with impurities. Alternatively, the first gate electrode VG and the second gate electrode TG may be made of a metal or the like. The first gate electrode VG and the second gate electrode TG are integrally formed.

[0029] The gate insulating film 1 includes a first gate insulating film 11 provided between the inner wall of the hole H1 and the first gate electrode VG, and a second gate insulating film 12 provided on the surface 111a side of the semiconductor substrate 111 and in contact with the first gate insulating film 11. The second gate insulating film 12 is located between the surface 111a of the semiconductor substrate 111 and the second gate electrode TG. The first gate insulating film 11 and the second gate insulating film 12 are, for example, silicon oxide films formed by thermally oxidizing the semiconductor substrate 111. The first gate insulating film 11 and the second gate insulating film 12 are integrally formed.

[0030] The charge e generated by photoelectric conversion in the photodiode PD - is transferred vertically (for example, in the thickness direction of the semiconductor substrate 111) along the first gate electrode VG of the transfer transistor Tr, and then transferred horizontally (for example, in a direction horizontal to the surface 111a of the semiconductor substrate 111) along the second gate electrode TG to reach the floating diffusion FD. - When the charge e is transferred, - moves along the side surface of the first gate electrode VG so as to go around the first gate electrode VG.

[0031] Although not shown, a charge transfer channel may be provided in a region of the semiconductor substrate 111 facing the first gate electrode VG across the first gate insulating film 11. A charge transfer channel may also be provided in a region of the semiconductor substrate 111 facing the second gate electrode TG across the second gate insulating film 12. The charge transfer channel is formed of, for example, a P-type impurity diffusion layer. By providing a charge transfer channel in the above region, it is possible to adjust the characteristics of the transfer transistor (for example, threshold voltage, off-state breakdown voltage, etc.) to desired values.

[0032] (Crystal orientation) The semiconductor substrate 111 shown in Figures 2 to 4 is, for example, a silicon substrate. The surface 111a of the semiconductor substrate 111 is, for example, a crystal plane of the (100) plane or a plane equivalent to the (100) plane. Planes equivalent to the (100) plane include the (010), (001), (-100), (0-10), and (00-1) planes. In this specification, for convenience of explanation, a plane equivalent to the (100) plane is simply referred to as the (100) plane.

[0033] The normal direction of the crystal plane is the crystal orientation. The crystal orientation of the (100) plane is <100> In this specification, for the sake of convenience, not only the crystal orientation of the (100) plane but also the crystal orientation of a plane equivalent to the (100) plane will be referred to simply as <100> It's called direction.

[0034] Crystal orientation <110> The direction is <100> In this specification, for convenience of explanation, the crystal orientation <110> Not just the direction, <110> The crystal orientation, which is equivalent to the direction, is also simply <110> It's called direction.

[0035] (Example of the configuration of the first gate electrode) 5 is a cross-sectional view showing a first configuration example of the first gate electrode VG and the first gate insulating film 11 according to the embodiment of the present disclosure. FIG. 5 shows a cross section of the first gate electrode VG and the first gate insulating film 11 cut in a plane (hereinafter also referred to as a horizontal plane) parallel to the surface 111a of the semiconductor substrate 111. As shown in FIG. 5, the cross section of the first gate electrode VG cut in the horizontal plane (hereinafter also referred to as a VG cross section) is parallel to the crystal orientation of the semiconductor substrate 111. <100> For example, the VG cross section is <100> The first gate electrode VG has an octagonal shape that is elongated in the direction. One end of the first gate electrode VG in the long axis direction of the VG cross section is located on the photodiode PD side, and the other end of the first gate electrode VG in the long axis direction of the VG cross section is located on the floating diffusion FD side. In addition, one end of the first gate electrode VG in the long axis direction of the VG cross section and the other end of the first gate electrode VG in the long axis direction of the VG cross section are each located under the second gate electrode TG.

[0036] The outer periphery of a cross section (hereinafter, also referred to as an insulating film cross section) of the first gate insulating film 11 located around the first gate electrode VG cut by a horizontal plane is also <100> It has an octagonal shape that is elongated in both directions.

[0037] 6 is a cross-sectional view showing a second configuration example of the first gate electrode VG and the first gate insulating film 11 according to the embodiment of the present disclosure. FIG. 6 shows a cross section of the first gate electrode VG and the first gate insulating film 11 cut along a horizontal plane parallel to the surface 111a of the semiconductor substrate 111. In this embodiment, the cross section of the first gate electrode VG cut along the horizontal plane (VG cross section) is <100> In Figure 5, the VG cross section is <100> In the above embodiment, each side of the octagon elongated in the direction is a straight line, but the present embodiment is not limited to this. <110> At least a part of the side edge facing the direction may be curved so as to be concave inward in a plan view. Furthermore, the shape of the VG cross section is not limited to an octagon.

[0038] The outer periphery of a cross section (insulating film cross section) of the first gate insulating film 11 located around the first gate electrode VG cut by a horizontal plane is also <100> As shown in FIG. 6, the periphery of the cross section of the insulating film is <100> The shape may be an ellipse that is elongated in the direction.

[0039] In both the configuration example 1 shown in FIG. 5 and the configuration example 2 shown in FIG. 6, the first gate insulating film 11 is formed by thermally oxidizing the inner wall of the hole H1 (see FIG. 4) of the semiconductor substrate 111. The inner wall of the hole H1 has a first inner wall IW1 whose crystal plane is a (100) plane and a second inner wall IW2 whose crystal plane is a (110) plane. The first gate insulating film 11 has a first portion 21 located between the first inner wall IW1 and the first gate electrode VG, and a second portion 22 located between the second inner wall IW2 and the first gate electrode VG. The first portion 21 is formed by thermally oxidizing the first inner wall IW1 whose crystal plane is a (100) plane. The second portion 22 is formed by thermally oxidizing the second inner wall IW2 whose crystal plane is a (110) plane.

[0040] The second portion 22 has a larger thickness than the first portion 21. This difference in thickness is due to the difference in the crystal plane of the inner wall that serves as the base for thermal oxidation. The (110) plane is more susceptible to thermal oxidation than the (100) plane, and a thicker oxide film is more likely to be formed. For example, the thickness of the second portion 22 is 1.1 to 2.0 times the thickness of the first portion 21. In both cases of Figures 5 and 6, the second portion 22 is located at both ends in the long axis direction of the cross section (VG cross section) of the first gate electrode VG.

[0041] FIG. 7 is a graph showing a schematic diagram of a potential distribution of the semiconductor substrate 111 around the first gate electrode VG according to an embodiment of the present disclosure. In FIG. 7, Tr_on means that a voltage equal to or higher than the threshold voltage is applied to the first gate electrode VG, and the transfer transistor Tr is in an on state. Tr_off means that no voltage is applied to the first gate electrode VG, and the transfer transistor Tr is in an off state. Also, in FIG. 7, E1 indicates an end (source end) of the channel region formed along the first gate electrode VG on the photodiode PD side. In FIG. 7, E2 indicates an end (drain end) of the channel region formed along the first gate electrode VG on the floating diffusion FD side.

[0042] In the region of the semiconductor substrate 111 that contacts the second portion 22 (hereinafter also referred to as the thick film region), an inversion layer due to Tr_on is less likely to be formed and a potential barrier is more likely to be generated than in the region of the semiconductor substrate that contacts the first portion 21 (hereinafter also referred to as the thin film region). - On the other hand, the source terminal E1 and the drain terminal E2 are prone to potential gradients, and the charge e - is prone to flow.

[0043] In the embodiment of the present disclosure, the VG cross section is <100> By making the shape elongated in the direction, a thick film region can be disposed at each of the source end E1 and drain end E2 positions. This allows the transfer transistor Tr to offset and reduce the potential barrier generated in the thick film region with the potential gradient at the source end E1 and drain end E2. As a result, the transfer transistor Tr can transfer the charge e - The transfer efficiency can be improved.

[0044] In the embodiment of the present disclosure, it is preferable that the center FDC of the floating diffusion FD, the center VGC of the VG cross section obtained by cutting the first gate electrode VG on a horizontal plane, and the center PDC of the photodiode PD are aligned on a straight line or a nearly straight line when viewed from the normal direction of the surface 111a of the semiconductor substrate 111 (in a plan view). The potential energy of the photodiode PD is maximum at the center PDC of the photodiode PD, so that the charge e per unit amount of light is - This can improve the transfer efficiency.

[0045] In addition, it is preferable that the straight line connecting the above-mentioned respective center portions FDC, VGC, and PDC is parallel or substantially parallel to the long axis direction of the VG cross section. - Therefore, the transfer transistor Tr can transfer the charge e - The transfer efficiency can be further improved.

[0046] (Comparative Example) 8 is a cross-sectional view showing the configuration of a first gate electrode VG' and a first gate insulating film 11' according to a comparative example of the present disclosure. FIG. 5 shows a cross section of the first gate electrode VG' and the first gate insulating film 11 cut along a horizontal plane parallel to the surface of the semiconductor substrate 111'. As shown in FIG. 8, the cross section of the first gate electrode VG' cut along the horizontal plane has a shape close to a regular octagon with little deviation in one direction. Moreover, the outer periphery of the cross section of the first gate insulating film 11' located around the first gate electrode VG' cut along the horizontal plane has a shape close to a perfect circle.

[0047] In the comparative example shown in FIG. 8, the first gate insulating film 11' is formed by thermally oxidizing the inner wall of the hole H1' in the semiconductor substrate 111'. The inner wall of the hole H1' has a first inner wall IW1' whose crystal plane is a (100) plane and a second inner wall IW2' whose crystal plane is a (110) plane. The first gate insulating film 11' has a first portion 21' located between the first inner wall IW1' and the first gate electrode VG, and a second portion 22' located between the second inner wall IW2' and the first gate electrode VG'. The second portion 22' has a larger thickness than the first portion 21'. This difference in thickness is due to the difference in the crystal plane of the inner wall that serves as the base for thermal oxidation. The (110) plane is more easily thermally oxidized than the (100) plane, and a thicker oxide film is more easily formed.

[0048] FIG. 9 is a graph showing a schematic diagram of a potential distribution of the semiconductor substrate 111' around the first gate electrode VG according to a comparative example of the present disclosure. In FIG. 9, Tr'_on means that a voltage equal to or higher than the threshold voltage is applied to the first gate electrode VG' and the transfer transistor is in an on state. Tr'_off means that no voltage is applied to the first gate electrode VG' and the transfer transistor is in an off state. Also, in FIG. 9, E1' indicates an end (i.e., source end) of the channel region formed along the first gate electrode VG' on the photodiode PD' side. In FIG. 9, E2 indicates an end (i.e., drain end) of the channel region formed along the first gate electrode VG' on the floating diffusion FD' side.

[0049] In the semiconductor region (thick film region) in contact with the second portion 22', an inversion layer due to Tr'_on is less likely to be formed than in the semiconductor region (thin film region) in contact with the first portion 21'. As shown in FIG. 9, in the comparative example, the source end E1' and drain end E2', which are prone to have a potential gradient, and the thick film region are located at different positions. In the case of FIG. 9, the potential barrier generated in the thick film region cannot be offset by the potential gradient of the source end E1' and drain end E2', so the charge e - is difficult to flow.

[0050] (Effects of the embodiment) As described above, the imaging device 100 according to the embodiment of the present disclosure includes a semiconductor substrate 111 and a vertical transfer transistor Tr provided on the semiconductor substrate 111. The semiconductor substrate 111 is provided with a hole H1 that opens on the surface 111a side. The transfer transistor Tr has a first gate electrode VG provided in the hole H1, and a first gate insulating film 11 provided between the inner wall of the hole H1 and the first gate electrode VG. A cross section of the first gate electrode VG cut on a horizontal plane parallel to the surface 111a of the semiconductor substrate 111 shows that the crystal orientation of the semiconductor substrate 111 is <100> It has an elongated shape in the direction.

[0051] According to this, the (110) surface of the inner wall of the hole H1, on which the first gate insulating film 11 is formed as a thick film, is located near the end in the long axis direction of the VG cross section. Then, due to thermal oxidation of the (110) surface, a second portion 22, which is a thick film portion of the first gate insulating film 11, is formed near the end in the long axis direction. In the semiconductor substrate 111, regions (thick film regions) in contact with the second portion 22 are located at the source end E1 and drain end E2 of the transfer transistor Tr, respectively. As a result, the potential barrier generated in the thick film region can be offset and reduced by the respective potential gradients generated at the source end E1 and drain end E2. As a result, the charge e of the transfer transistor Tr - The transfer efficiency can be improved.

[0052] (Variation 1) 10 is a plan view showing a configuration of a pixel 102A according to a first modification of the embodiment of the present disclosure. As shown in FIG. 10, in the embodiment of the present disclosure, among both ends of the first gate electrode VG in the long axis direction of the VG cross section, the end on the photodiode PD side may protrude from under the second gate electrode TG to the photodiode PD side. In this case, the charge e - The transfer path of the transfer transistor Tr is connected directly to the thin film region of the transfer transistor Tr without going through the thick film region from the photodiode PD. The source terminal E1 of the transfer transistor Tr is arranged in the thin film region, and the thick film region on the source side (photodiode PD side) is connected to the thin film region of the transfer transistor Tr. -Even with this configuration, the transfer transistor Tr is not - The transfer efficiency can be improved.

[0053] (Variation 2) 11 is a plan view showing a configuration of a pixel 102B according to a second modification of the embodiment of the present disclosure. As shown in FIG. 11, in the embodiment of the present disclosure, among both ends of the first gate electrode VG in the long axis direction of the VG cross section, the end on the floating diffusion FD side may protrude from under the second gate electrode TG to the floating diffusion FD side. In this case, the charge e - The transfer path of the transfer transistor Tr is directly connected to the floating diffusion FD without going through the thick film region from the thin film region of the transfer transistor Tr. The drain end E2 of the transfer transistor Tr is arranged in the thin film region, and the thick film region on the drain side (floating diffusion FD side) is connected to the charge e - Even with this configuration, the transfer transistor Tr is not - The transfer efficiency can be improved.

[0054] (Variation 3) Fig. 12 is a plan view showing a configuration of a pixel 102C according to Modification 3 of the embodiment of the present disclosure. As shown in Fig. 12, in the embodiment of the present disclosure, both ends of the first gate electrode VG in the long axis direction of the VG cross section may protrude from under the second gate electrode TG. The end on the photodiode PD side of the VG cross section may protrude from under the second gate electrode TG toward the photodiode PD side, and the end on the floating diffusion FD side of the VG cross section may protrude from under the second gate electrode TG toward the floating diffusion FD side.

[0055] In this case, the charge e -The transfer path is connected directly from the photodiode PD to the thin film region of the transfer transistor Tr without passing through a thick film region, and directly from the thin film region to the floating diffusion FD without passing through a thick film region. The source terminal E1 of the transfer transistor Tr is arranged in the thin film region, and the thick film region on the source side (photodiode PD side) is connected to the charge e - The drain end E2 of the transfer transistor Tr is arranged in the thin film region, and the thick film region on the drain side (floating diffusion FD side) is - Even with this configuration, the transfer transistor Tr is not - The transfer efficiency can be improved.

[0056] (Variations 4 and 5) FIG. 13 is a plan view showing a configuration of a pixel 102D according to a fourth modification of the embodiment of the present disclosure. FIG. 14 is a plan view showing a configuration of a pixel 102E according to a fifth modification of the embodiment of the present disclosure. Note that in FIGS. 13 and 14, the second gate electrode TG is omitted. As shown in FIGS. 13 and 14, in the embodiment of the present disclosure, one pixel 102D may be provided with N (N is an integer of 2 or more) first gate electrodes VG. The N first gate electrodes VG are arranged side by side at intervals in the short axis direction of the VG cross section. The short axis direction is a direction perpendicular to the long axis direction in a plan view. FIG. 13 shows a case where N=2, and FIG. 14 shows a case where N=3. With such a configuration, the larger the number of N, the larger the charge e - Since the number of transfer paths is increased, the on-resistance of the transfer transistor Tr can be reduced.

[0057] <Other embodiments> As described above, the present disclosure has been described by the embodiments and modifications, but the descriptions and drawings forming a part of this disclosure should not be understood as limiting the present disclosure. From this disclosure, various alternative embodiments, examples, and operating techniques will be apparent to those skilled in the art. It goes without saying that the technology related to the present disclosure (the present technology) includes various embodiments and the like that are not described here.

[0058] For example, in the above embodiment, four pixels 102 are described as forming one shared pixel structure, but the present technology is not limited to this. In the present technology, the pixel 102 may not be a shared pixel structure. Specifically, one pixel 102 may be formed of one photodiode, one transfer transistor, one floating diffusion, one reset transistor, and one amplification transistor, and may further be formed by adding one selection transistor to these. Similarly, each of the pixels 102A, 102B, 102C, 102D, and 102E may not be a shared pixel structure. In this way, the present technology can perform at least one of various omissions, substitutions, and changes of components within a range that does not deviate from the gist of the above-mentioned embodiment. In addition, the effects described in this specification are merely examples and are not limited, and other effects may be present.

[0059] <Applications to electronic devices> The technology disclosed herein (the technology) can be applied to various electronic devices, such as imaging systems such as digital still cameras and digital video cameras (hereinafter collectively referred to as cameras), mobile devices such as mobile phones with imaging functions, or other devices with imaging functions.

[0060] Fig. 15 is a conceptual diagram showing an example in which the technology according to the present disclosure (the present technology) is applied to electronic device 300. As shown in Fig. 15, electronic device 300 is, for example, a camera, and has a solid-state imaging device 201, an optical lens 210, a shutter device 211, a drive circuit 212, and a signal processing circuit 213. Optical lens 210 is an example of an "optical component" of the present disclosure.

[0061] Light transmitted through the optical lens 210 is incident on the solid-state imaging device 201. For example, the optical lens 210 forms an image of image light (incident light) from a subject on the imaging surface of the solid-state imaging device 201. As a result, signal charges are accumulated in the solid-state imaging device 201 for a certain period of time. The shutter device 211 controls a light irradiation period and a light blocking period for the solid-state imaging device 201. The drive circuit 212 supplies a drive signal that controls the transfer operation of the solid-state imaging device 201 and the shutter operation of the shutter device 211. The drive signal (timing signal) supplied from the drive circuit 212 transfers signals from the solid-state imaging device 201. The signal processing circuit 213 performs various signal processing. For example, the signal processing circuit 213 processes a signal output from the solid-state imaging device 201. The video signal that has undergone the signal processing is stored in a storage medium such as a memory, or is output to a monitor.

[0062] The shutter operation in electronic device 300 may be realized by an electronic shutter (e.g., a global shutter) using solid-state imaging device 201, rather than a mechanical shutter. When the shutter operation in electronic device 300 is realized by an electronic shutter, shutter device 211 in FIG. 15 may be omitted.

[0063] In the electronic device 300, the above-mentioned imaging device 100 is applied to the solid-state imaging device 201. This makes it possible to obtain the electronic device 300 with improved performance. Note that the electronic device 300 is not limited to a camera. The electronic device 300 may be a mobile device such as a mobile phone with an imaging function, or another device with an imaging function.

[0064] <Application example to endoscopic surgery system> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0065] FIG. 16 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0066] 16 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0067] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel.

[0068] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0069] An optical system and an image sensor are provided inside the camera head 11102, and reflected light (observation light) from an observation target is collected on the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as RAW data.

[0070] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0071] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0072] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing an operation site or the like.

[0073] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 11100.

[0074] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing the field of view of the endoscope 11100 and securing the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, image, or graph.

[0075] The light source device 11203 that supplies irradiation light to the endoscope 11100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation object with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0076] The light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. The driving of the image sensor of the camera head 11102 may be controlled in synchronization with the timing of the change in the light intensity to obtain images in a time-division manner, and the images may be synthesized to generate an image with a high dynamic range that is free of so-called blackout and whiteout.

[0077] The light source device 11203 may be configured to supply light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, by utilizing the wavelength dependency of light absorption in body tissue, a narrow band light is irradiated compared to the irradiated light (i.e., white light) during normal observation, and a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast, so-called narrow band imaging is performed. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating an excitation light. In the fluorescent observation, it is possible to irradiate an excitation light to a body tissue and observe the fluorescence from the body tissue (autofluorescence observation), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0078] FIG. 17 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0079] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so as to be able to communicate with each other.

[0080] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0081] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be one (so-called single-plate type) or multiple (so-called multi-plate type). When the imaging unit 11402 is composed of a multi-plate type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. Note that when the imaging unit 11402 is composed of a multi-plate type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0082] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens.

[0083] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be appropriately adjusted.

[0084] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0085] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and focus of the captured image.

[0086] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by a user, or may be automatically set by the control unit 11413 of the CCU 11201 based on an acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0087] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0088] The communication unit 11411 is configured with a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0089] Furthermore, the communication unit 11411 transmits, to the camera head 11102, a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0090] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data sent from the camera head 11102 .

[0091] The control unit 11413 performs various controls related to imaging of the surgical site etc. by the endoscope 11100 and display of the captured image obtained by imaging the surgical site etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0092] Further, the control unit 11413 causes the display device 11202 to display the captured image showing the surgical site, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical tools such as forceps, specific living body parts, bleeding, mist when the energy treatment tool 11112 is used, etc., by detecting the shape and color of the edge of an object included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it may use the recognition result to superimpose various types of surgery support information on the image of the surgical site. By superimposing and presenting the surgery support information to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0093] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0094] Here, in the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0095] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the endoscope 11100, the imaging unit 11402 of the camera head 11102, the image processing unit 11412 of the CCU 11201, and the like, among the configurations described above. Specifically, the above-mentioned imaging device 100 can be applied to the imaging unit 10402. By applying the technology according to the present disclosure to the endoscope 11100, the imaging unit 11402 of the camera head 11102, the image processing unit 11412 of the CCU 11201, and the like, a clearer image of the surgical site can be obtained, so that the surgeon can reliably confirm the surgical site. In addition, by applying the technology according to the present disclosure to the endoscope 11100, the imaging unit 11402 of the camera head 11102, the image processing unit 11412 of the CCU 11201, and the like, an image of the surgical site can be obtained with lower latency, so that the surgeon can perform the procedure with the same sensation as when observing the surgical site by touch.

[0096] Although an endoscopic surgery system has been described here as an example, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0097] <Applications to moving objects> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, etc.

[0098] FIG. 18 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0099] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 18, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053 are illustrated.

[0100] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0101] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0102] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0103] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0104] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0105] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0106] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0107] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0108] The audio / video output unit 12052 transmits at least one output signal of audio and video to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 18, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0109] FIG. 19 is a diagram showing an example of the installation position of the imaging unit 12031.

[0110] In FIG. 19, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.

[0111] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The images of the front acquired by the imaging units 12101 and 12105 are mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0112] 19 shows an example of the imaging ranges of the imaging units 12101 to 12104. An imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and an imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0113] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0114] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0115] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0116] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0117] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 and the like in the configuration described above. Specifically, the imaging device 100 described above can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, a captured image that is easier to see can be obtained, thereby reducing driver fatigue.

[0118] The present disclosure can also be configured as follows. (1) a semiconductor substrate; a vertical transistor provided on the semiconductor substrate, The semiconductor substrate has a hole that opens to a first main surface side, The vertical transistor is A first gate electrode provided in the hole; a first gate insulating film provided between an inner wall of the hole and the first gate electrode; A cross section of the first gate electrode cut along a plane parallel to the first main surface has a crystal orientation of the semiconductor substrate. <100> An imaging device having an elongated shape in a direction. (2) The inner wall is A first inner wall having a (100) crystal face; A second inner wall having a (110) crystal face, The first gate insulating film is a first portion located between the first inner wall and the first gate electrode; a second portion located between the second inner wall and the first gate electrode, The second portion has a larger thickness than the first portion. The imaging device according to (1) above. (3) the second portion is located at an end portion of the first gate electrode in a major axis direction of the cross section; The imaging device according to (2) above. (4) The imaging device according to (2) or (3), wherein the thickness of the second portion is 1.1 times or more and 2.0 times or less than the thickness of the first portion. (5) The vertical transistor is a second gate insulating film provided on the first main surface side of the semiconductor substrate; A second gate electrode is provided on the second gate insulating film and connected to the first gate electrode. The imaging device according to any one of (1) to (4). (6) a photoelectric conversion unit provided inside the semiconductor substrate; a charge storage unit provided on the first main surface side of the semiconductor substrate and storing charges generated by the photoelectric conversion unit, one end of the first gate electrode in a longitudinal direction of the cross section is located on the photoelectric conversion portion side, and the other end of the first gate electrode in the longitudinal direction is located on the charge retention portion side, The imaging device according to any one of (1) to (5), wherein the vertical transistor transfers charges generated in the photoelectric conversion section to the charge storage section. (7) In a plan view from a normal direction of the first main surface of the semiconductor substrate, a center of the charge retention portion, a center of the cross section of the first gate electrode, and a center of the photoelectric conversion portion are aligned on a straight line or approximately on a straight line. The imaging device according to (6) above. (8) Both ends of the first gate electrode in the long axis direction of the cross section are located under the second gate electrode. The imaging device according to (5) above. (9) At least one of both ends of the first gate electrode in the long axis direction of the cross section protrudes from under the second gate electrode. The imaging device according to (5) above. (10) The vertical transistor includes a plurality of the first gate electrodes, The plurality of first gate electrodes are arranged at intervals in the minor axis direction of the cross section. The imaging device according to any one of (1) to (9). (11) The first main surface is a crystal plane that is a (100) plane or a plane equivalent to a (100) plane. The imaging device according to any one of (1) to (10) above. (12) an optical component; an imaging device into which the light transmitted through the optical component is incident; a signal processing circuit for processing a signal output from the imaging device, The imaging device includes: A semiconductor substrate; a vertical transistor provided on the semiconductor substrate, The semiconductor substrate has a hole that opens to a first main surface side, The vertical transistor is A first gate electrode provided in the hole; a first gate insulating film provided between an inner wall of the hole and the first gate electrode; A cross section cut along a plane parallel to the first main surface has a crystal orientation of the semiconductor substrate. <100> An electronic device having an elongated shape in a direction. [Explanation of symbols]

[0119] 1 Gate insulating film 11, 11' First gate insulating film 12 Second gate insulating film 21, 21' 1st part 22, 22' 2nd part 100 Imaging device 101a, 111a surface 102, 102A, 102B, 102C, 102D, 102E pixels 103 Pixel area (imaging area) 104 Vertical drive circuit 105 Column signal processing circuit 106 Horizontal drive circuit 107 Output circuit 108 Control circuit 109 Vertical signal line 110 Horizontal signal line 111, 111' Semiconductor substrate 112 Input / output terminal 120 Pixel separation section 201 Solid-state imaging device 210 Optical Lenses 211 Shutter device 212 Drive circuit 213 Signal Processing Circuit 300 Electronic equipment 10402 Imaging unit 11000 Endoscopic surgery system 11100 Endoscope 11101 Telescope tube 11102 Camera head 11110 Surgical tools 11111 Insufflation tube 11112 Energy treatment device 11120 Support arm device 11131 Surgeon (Doctor) 11131 Operator 11132 patient 11133 Patient Bed 11200 Cart 11201 Camera Control Unit (CCU) 11202 Display device 11203 Light source device 11204 Input device 11205 Treatment tool control device 11206 Insufflation device 11207 Recorder 11208 Printer 11400 Transmission cable 11401 Lens unit 11402 Imaging unit 11403 Drive unit 11404 Communications Department 11405 Camera head control unit 11411 Communications Department 11412 Image processing unit 11413 Control section 12000 Vehicle Control System 12001 Communication Networks 12010 Drive system control unit 12020 Body control unit 12030 External information detection unit 12031 Imaging unit 12040 In-vehicle information detection unit 12041 Driver status detection unit 12050 Integrated Control Unit 12051 Microcomputer 12052 Audio / Video Output Unit 12061 Audio Speaker 12062 Display section 12063 Instrument Panel 12100 Vehicles 12101 Imaging unit 12102 Imaging unit 12103 Imaging unit 12104 Imaging unit 12105 Imaging unit 12111 Image range 12112 Image range 12113 Image range 12114 Image range CCU11201 Imaging unit CCU11201 Camera Head E1, E1' source end E2, E2' Drain end FD Floating Diffusion FDC, PDC, VGC center GE gate electrode H1, H1' hole I In-vehicle network IW1, IW1' 1st inner wall IW2, IW2' 2nd inner wall PD Photodiode TG, TG' Second gate electrode Tr Transfer transistor VG, VG' First gate electrode

Claims

1. A semiconductor substrate; a vertical transistor provided on the semiconductor substrate, The semiconductor substrate has a hole that opens to a first main surface side, The vertical transistor is a first gate electrode provided in the hole; a first gate insulating film provided between an inner wall of the hole and the first gate electrode; a cross section of the first gate electrode cut along a plane parallel to the first main surface has an elongated shape in a crystal orientation <100> of the semiconductor substrate; A photoelectric conversion unit provided inside the semiconductor substrate; a charge holding unit provided on the first main surface side of the semiconductor substrate and holding charges generated by the photoelectric conversion unit, a source of the vertical transistor is the photoelectric conversion unit provided inside the semiconductor substrate, and a drain of the vertical transistor is the charge retention unit provided on the first main surface side of the semiconductor substrate, the vertical transistor transfers charges generated in the photoelectric conversion unit to the charge storage unit; The inner wall is A first inner wall having a (100) crystal face; A second inner wall having a (110) crystal face, The first gate insulating film is a first portion located between the first inner wall and the first gate electrode; a second portion located between the second inner wall and the first gate electrode; the second portion has a larger thickness than the first portion; an imaging device, wherein a source end which is an end of the channel region formed along the first gate electrode on the photoelectric conversion section side, and a drain end which is an end of the channel region formed along the first gate electrode on the charge retention section side are located in a thick film region in contact with the second portion in the semiconductor substrate.

2. The imaging device according to claim 1 , wherein the second portion is located at an end portion of the first gate electrode in a major axis direction of the cross section.

3. The imaging device according to claim 1 , wherein the thickness of the second portion is 1.1 times or more and 2.0 times or less than the thickness of the first portion.

4. The vertical transistor is a second gate insulating film provided on the first main surface side of the semiconductor substrate; The imaging device according to claim 1 , further comprising: a second gate electrode provided on the second gate insulating film and connected to the first gate electrode.

5. An imaging device as described in Claim 1, wherein one end of the cross section of the first gate electrode in the long axis direction is located on the photoelectric conversion section side, and the other end in the long axis direction is located on the charge holding section side.

6. 6. The imaging device of claim 5, wherein, in a planar view from a normal direction of the first main surface of the semiconductor substrate, a center of the charge retention portion, a center of the cross section of the first gate electrode, and a center of the photoelectric conversion portion are aligned in a straight line or approximately in a straight line.

7. The imaging device according to claim 4 , wherein both ends of the first gate electrode in the major axis direction of the cross section are located under the second gate electrode.

8. The imaging device according to claim 4 , wherein at least one of both ends of the first gate electrode in the major axis direction of the cross section protrudes from under the second gate electrode.

9. the vertical transistor has a plurality of the first gate electrodes, The imaging device according to claim 1 , wherein the first gate electrodes are arranged at intervals in a minor axis direction of the cross section.

10. The imaging device according to claim 1 , wherein the first principal surface is a crystal plane that is a (100) plane or a plane equivalent to a (100) plane.

11. Optical components; an imaging device into which the light transmitted through the optical component is incident; a signal processing circuit for processing a signal output from the imaging device, The imaging device includes: A semiconductor substrate; a vertical transistor provided on the semiconductor substrate, The semiconductor substrate has a hole that opens to a first main surface side, The vertical transistor is a first gate electrode provided in the hole; a first gate insulating film provided between an inner wall of the hole and the first gate electrode; a cross section of the first gate electrode cut along a plane parallel to the first main surface has an elongated shape in a crystal orientation <100> of the semiconductor substrate; A photoelectric conversion unit provided inside the semiconductor substrate; a charge holding unit provided on the first main surface side of the semiconductor substrate and holding charges generated by the photoelectric conversion unit, a source of the vertical transistor is the photoelectric conversion unit provided inside the semiconductor substrate, and a drain of the vertical transistor is the charge retention unit provided on the first main surface side of the semiconductor substrate, the vertical transistor transfers charges generated in the photoelectric conversion unit to the charge storage unit; The inner wall is A first inner wall having a (100) crystal face; A second inner wall having a (110) crystal face, The first gate insulating film is a first portion located between the first inner wall and the first gate electrode; a second portion located between the second inner wall and the first gate electrode; the second portion has a larger thickness than the first portion; an electronic device, wherein a source end which is an end of the channel region formed along the first gate electrode on the photoelectric conversion section side, and a drain end which is an end of the channel region formed along the first gate electrode on the charge retention section side are located in a thick film region in contact with the second portion in the semiconductor substrate.

Citation Information

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