Display device

Abstract

Provided is a display device which prevents an unintended shadow starting from a peripheral region outside a display region from being visually recognized when a display panel is viewed from an oblique direction. This display device includes: a display panel having a first light transmissive substrate and a second light transmissive substrate; a light transmissive glass base material bonded to the display panel; and a light source. The display panel has an active region in which an image can be displayed, and a peripheral region outside the active region. The light source comprises a light source disposed such that light is incident on a side surface of the first light transmissive substrate, a side surface of the second light transmissive substrate, or a side surface of the glass base material. The light source includes a light guiding body provided in a first direction along the side surface of the first light transmissive substrate, the side surface of the second light transmissive substrate, or the side surface of the glass base material, and a plurality of light emitting portions arranged so as to face the light guiding body. At least one light emitting portion is disposed in a first region that overlaps a range obtained by extending, in a second direction crossing the first direction, the peripheral region on both sides of the active region in the first direction.

Description

[Technical field]

[0001] The present disclosure relates to a display device. [Background technology]

[0002] Patent Document 1 describes a display device including a first light-transmitting substrate, a second light-transmitting substrate arranged opposite the first light-transmitting substrate, a liquid crystal layer having a polymer-dispersed liquid crystal sealed between the first light-transmitting substrate and the second light-transmitting substrate, and at least one light-emitting unit arranged opposite at least one side surface of the first light-transmitting substrate and the second light-transmitting substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-021974 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the display device described in Patent Document 1, the background on the other side of the display panel can be seen from one side of the display panel. If the peripheral area outside the display area does not transmit light, the background cannot be seen, which may cause a sense of incongruity. Therefore, it is desirable to make the background on the other side of the display panel visible from one side of the display panel in the peripheral area outside the display area. If the peripheral area outside the display area is in a see-through state, there is a possibility that an unintended shadow originating from the peripheral area outside the display area may be seen when the display panel is viewed obliquely.

[0005] An object of the present disclosure is to provide a display device that suppresses the visibility of unintended shadows originating from a peripheral area outside the display area when the display panel is viewed obliquely. [Means for solving the problem]

[0006] A display device according to one embodiment includes a first light-transmitting substrate, a second light-transmitting substrate, and a liquid crystal layer between the first light-transmitting substrate and the second light-transmitting substrate. The display panel has an active region capable of displaying an image when viewed from a direction perpendicular to the first light-transmitting substrate, and a peripheral region outside the active region. A light-transmitting glass substrate bonded to the display panel. A light source is arranged so that light enters a side surface of the first light-transmitting substrate, a side surface of the second light-transmitting substrate, or a side surface of the glass substrate. The light source includes a light guide provided in a first direction along the side surface of the first light-transmitting substrate, the side surface of the second light-transmitting substrate, or a side surface of the glass substrate, and a plurality of light-emitting units arranged to face the light guide. At least one of the light-emitting units is arranged in a first region that overlaps with a range obtained by extending the peripheral regions on both sides of the active region in the first direction in a second direction intersecting the first direction. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a perspective view illustrating an example of a display panel according to the present embodiment. [Diagram 2] FIG. 2 is a block diagram showing the display device of the first embodiment. [Diagram 3] FIG. 3 is a timing chart for explaining the timing at which the light source emits light in the field sequential method of the first embodiment. [Figure 4] FIG. 4 is an explanatory diagram showing the relationship between the voltage applied to the pixel electrode and the scattering state of the pixel. [Diagram 5] FIG. 5 is a cross-sectional view showing an example of a cross section of a display device. [Figure 6] FIG. 6 is a plan view showing the plane of the display device of FIG. [Figure 7] FIG. 7 is an enlarged cross-sectional view of the liquid crystal layer portion of FIG. [Figure 8] FIG. 8 is a cross-sectional view for explaining the non-scattering state in the liquid crystal layer. [Figure 9] FIG. 9 is a cross-sectional view for explaining a scattering state in a liquid crystal layer. [Figure 10]FIG. 10 is a plan view showing scanning lines, signal lines, and switching elements in a pixel. [Figure 11] FIG. 11 is a plan view showing a storage capacitor layer in a pixel. [Figure 12] FIG. 12 is a plan view showing the auxiliary metal layer and the opening region in a pixel. [Figure 13] FIG. 13 is a plan view showing a pixel electrode in a pixel. [Figure 14] FIG. 14 is a plan view showing a light-shielding layer in a pixel. [Figure 15] FIG. 15 is a cross-sectional view taken along line XV-XV' of FIG. [Figure 16] FIG. 16 is a cross-sectional view taken along line XVI-XVI' of FIG. [Figure 17] FIG. 17 is a cross-sectional view taken along line XVII-XVII' of FIG. [Figure 18] FIG. 18 is an explanatory diagram illustrating the relationship between a viewer viewing the background on the other surface side from one surface and the background. [Figure 19] FIG. 19 is an explanatory diagram illustrating an example in which a peripheral region is superimposed on a background. [Figure 20] FIG. 20 is a plan view for explaining a display device of a comparative example. [Figure 21] FIG. 21 is a plan view illustrating the display device of the second embodiment. [Figure 22] FIG. 22 is a plan view illustrating the display device of the third embodiment. [Figure 23] FIG. 23 is a plan view illustrating the display device of the fourth embodiment. As shown in FIG. [Figure 24] FIG. 24 is a cross-sectional view showing an example of a cross section of the display device of the fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] The form (embodiment) for carrying out the present disclosure will be described in detail with reference to the drawings. The present disclosure is not limited by the contents described in the following embodiments. The components described below include those that a person skilled in the art can easily imagine and those that are substantially the same. Furthermore, the components described below can be appropriately combined. Note that the disclosure is merely an example, and those that a person skilled in the art can easily imagine appropriate modifications while maintaining the gist of the disclosure are naturally included in the scope of the present disclosure. In addition, in order to make the explanation clearer, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment, but they are merely examples and do not limit the interpretation of the present disclosure. In addition, in this specification and each figure, elements similar to those described above with respect to the previously mentioned figures may be given the same reference numerals, and detailed explanations may be omitted as appropriate.

[0009] (Embodiment 1) Fig. 1 is a perspective view showing an example of a display panel according to the present embodiment. Fig. 2 is a block diagram showing a display device of the embodiment 1. Fig. 3 is a timing chart explaining the timing at which a light source emits light in a field sequential method.

[0010] 1, the display device 1 includes a display panel 2, a light source 3, and a drive circuit 4. Here, one direction in the plane of the display panel 2 is the PX direction, a direction perpendicular to the PX direction is the second direction PY, and a direction perpendicular to the PX-PY plane is the third direction PZ.

[0011] The display panel 2 includes an array substrate 10, a counter substrate 20, and a liquid crystal layer 50 (see FIG. 5). The array substrate 10 is a first light-transmitting substrate, and the counter substrate 20 is a second light-transmitting substrate. The counter substrate 20 faces the array substrate 10 in a direction perpendicular to the surface of the array substrate 10 (the PZ direction shown in FIG. 1). The liquid crystal layer 50 (see FIG. 5) is filled with a polymer dispersed liquid crystal LC, which will be described later, between the array substrate 10, the counter substrate 20, and a sealing portion 18.

[0012] As shown in FIG. 1, the display panel 2 has an active area AA capable of displaying an image, and a peripheral area FR outside the active area AA. In the active area AA, a plurality of pixels Pix are arranged in a matrix. In this disclosure, a row refers to a pixel row having m pixels Pix arranged in one direction. Also, a column refers to a pixel column having n pixels Pix arranged in a direction perpendicular to the direction in which the rows are arranged. The values ​​of m and n are determined according to the display resolution in the vertical direction and the display resolution in the horizontal direction. Also, a plurality of scanning lines GL are wired for each row, and a plurality of signal lines SL are wired for each column.

[0013] 2, the light source 3 includes a plurality of light-emitting units 31. The light source control unit 32 is provided on a wiring board 93. The wiring board 93 is a flexible printed circuit board or a PCB board. A light source control signal LCSA is sent to the light source control unit 32 from an image output unit 91 of an external higher-level control unit 9. The light source control signal LCSA is a signal including information on the amount of light of the light-emitting unit 31 that is set according to, for example, an input gradation value to the pixel Pix.

[0014] 1, the driving circuit 4 is fixed to the surface of the array substrate 10. As shown in Fig. 2, the driving circuit 4 includes a signal processing circuit 41, a pixel control circuit 42, a gate driving circuit 43, a source driving circuit 44, and a common potential driving circuit 45. The array substrate 10 has a larger area in the PX-PY plane than the counter substrate 20, and the driving circuit 4 is provided on the protruding portion of the array substrate 10 exposed from the counter substrate 20.

[0015] An input signal (such as an RGB signal) VS is input to the signal processing circuit 41 from an image output unit 91 of an external upper level control unit 9 via a flexible printed circuit board 92.

[0016] The signal processing circuit 41 includes an input signal analysis unit 411, a storage unit 412, and a signal adjustment unit 413. The input signal analysis unit 411 generates a second input signal VCS based on a first input signal VS input from the outside.

[0017] The second input signal VCS is a signal that determines, based on the first input signal VS, what gradation value is to be given to each pixel Pix of the display panel 2. In other words, the second input signal VCS is a signal that includes gradation information related to the gradation value of each pixel Pix.

[0018] The signal adjustment unit 413 generates a third input signal VCSA from the second input signal VCS. The signal adjustment unit 413 sends the third input signal VCSA to the pixel control circuit .

[0019] The pixel control circuit 42 generates a horizontal drive signal HDS and a vertical drive signal VDS based on the third input signal VCSA. In this embodiment, since the pixel is driven by the field sequential method, the horizontal drive signal HDS and the vertical drive signal VDS are generated for each color that the light emitting unit 31 can emit.

[0020] The gate drive circuit 43 sequentially selects the scanning lines GL of the display panel 2 within one vertical scanning period based on the horizontal drive signal HDS. The order in which the scanning lines GL are selected is arbitrary. The gate drive circuit 43 and the scanning lines GL are electrically connected to each other by second wiring GPL arranged in the peripheral region FR (see FIG. 1) outside the active region AA.

[0021] The source drive circuit 44 supplies a gray scale signal corresponding to the output gray scale value of each pixel Pix to each signal line SL of the display panel 2 within one horizontal scanning period based on the vertical drive signal VDS.

[0022] In this embodiment, the display panel 2 is an active matrix panel, which has signal (source) lines SL extending in the second direction PY and scanning (gate) lines GL extending in the first direction PX in a plan view, and switching elements Tr are provided at the intersections of the signal lines SL and the scanning lines GL.

[0023] A thin film transistor is used as the switching element Tr. A bottom gate type transistor or a top gate type transistor may be used as the thin film transistor. Although a single gate thin film transistor is illustrated as the switching element Tr, a double gate transistor may be used. One of the source electrode and the drain electrode of the switching element Tr is connected to the signal line SL, the gate electrode is connected to the scanning line GL, and the other of the source electrode and the drain electrode is connected to one end of the capacitance of the polymer dispersed liquid crystal LC described later. One end of the capacitance of the polymer dispersed liquid crystal LC is connected to the switching element Tr via the pixel electrode PE, and the other end is connected to the common potential wiring COML via the common electrode CE. In addition, a storage capacitance HC is generated between the pixel electrode PE and the storage capacitance electrode IO electrically connected to the common potential wiring COML. In addition, the common potential wiring COML is supplied from a common potential driving circuit 45.

[0024] The light-emitting unit 31 includes a first color (e.g., red) light-emitting body 33R, a second color (e.g., green) light-emitting body 33G, and a third color (e.g., blue) light-emitting body 33B. The light source control unit 32 controls the first color light-emitting body 33R, the second color light-emitting body 33G, and the third color light-emitting body 33B to emit light in a time-division manner based on a light source control signal LCSA. In this manner, the first color light-emitting body 33R, the second color light-emitting body 33G, and the third color light-emitting body 33B are driven by a field sequential method.

[0025] 3, in the first subframe (first predetermined time) RF, the first color light emitter 33R emits light in the first color light emission period RON, and the pixels Pix selected in one vertical scanning period GateScan scatter the light to display. In the entire display panel 2, if the gradation signals corresponding to the output gradation values ​​of the pixels Pix are supplied to the signal lines SL described above to the pixels Pix selected in one vertical scanning period GateScan, only the first color is lit in the first color light emission period RON.

[0026] Next, in a second subframe (second predetermined time) GF, the second color light emitter 33G emits light in a second color light emission period GON, and the pixels Pix selected within one vertical scanning period GateScan scatter the light to display. In the entire display panel 2, if the pixels Pix selected within one vertical scanning period GateScan are supplied with grayscale signals corresponding to the output grayscale values ​​of the pixels Pix to the above-mentioned signal lines SL, only the second color is lit during the second color light emission period GON.

[0027] Furthermore, in a third subframe (third predetermined time) BF, the third color light emitter 33B emits light in the third color light emission period BON, and the pixels Pix selected within one vertical scanning period GateScan scatter the light to display. In the entire display panel 2, if the pixels Pix selected within one vertical scanning period GateScan are supplied with gradation signals corresponding to the output gradation values ​​of the pixels Pix to the above-mentioned signal lines SL, then only the third color is lit during the third color light emission period BON.

[0028] The human eye has a limited temporal resolution and an afterimage occurs, so that a composite image of three colors is recognized during one frame (1F). The field sequential method does not require a color filter and reduces absorption loss in the color filter, so that a high transmittance can be achieved. In the color filter method, one pixel is created by dividing the pixel Pix into sub-pixels for the first, second, and third colors, whereas the field sequential method does not require such sub-pixel division. It is also possible to further include a fourth sub-frame and emit a fourth color different from the first, second, and third colors.

[0029] FIG. 4 is an explanatory diagram showing the relationship between a voltage applied to a pixel electrode and the scattering state of a pixel. FIG. 5 is a cross-sectional view showing an example of a cross-section of the display device of FIG. 1. FIG. 5 is a cross-sectional view showing an example of a cross-section of a display device. FIG. 6 is a plan view showing a plane of the display device of FIG. 1. FIG. 7 is an enlarged cross-sectional view of a liquid crystal layer portion of FIG. 5. FIG. 8 is a cross-sectional view for explaining a non-scattering state in the liquid crystal layer. FIG. 9 is a cross-sectional view for explaining a scattering state in the liquid crystal layer.

[0030] If a grayscale signal corresponding to the output grayscale value of each pixel Pix selected within one vertical scanning period GateScan is supplied to each of the signal lines SL described above, the voltage applied to the pixel electrode PE changes according to the grayscale signal. When the voltage applied to the pixel electrode PE changes, the voltage between the pixel electrode PE and the common electrode CE changes. Then, as shown in FIG. 4, the scattering state of the liquid crystal layer 50 for each pixel Pix is ​​controlled according to the voltage applied to the pixel electrode PE, and the scattering ratio within the pixel Pix changes.

[0031] 4, when the voltage applied to the pixel electrode PE becomes equal to or higher than the saturation voltage Vsat, the change in the scattering ratio in the pixel Pix becomes small. Therefore, the drive circuit 4 changes the voltage applied to the pixel electrode PE in accordance with the vertical drive signal VDS in a voltage range Vdr lower than the saturation voltage Vsat.

[0032] 5, the display device 1 includes a light-transmitting base material 25 and a display panel 2. A protective layer 75 is provided on one surface of the light-transmitting base material 25. A protective layer 76 is provided on one surface of the display panel 2.

[0033] The display panel 2 includes an array substrate 10, a counter substrate 20, and a liquid crystal layer 50. The counter substrate 20 faces the array substrate 10 in a direction perpendicular to the surface of the array substrate 10 (the PZ direction shown in FIG. 1). The liquid crystal layer 50 is made by sealing a polymer-dispersed liquid crystal, which will be described later, between the array substrate 10, the counter substrate 20, and a sealing portion 18.

[0034] 5 and 6, the array substrate 10 has a first main surface 10A, a second main surface 10B, a first side surface 10C, a second side surface 10D, a third side surface 10E, and a fourth side surface 10F. The first main surface 10A and the second main surface 10B are parallel planes. The first side surface 10C and the second side surface 10D are parallel planes. The third side surface 10E and the fourth side surface 10F are parallel planes.

[0035] 5 and 6, the counter substrate 20 has a first main surface 20A, a second main surface 20B, a first side surface 20C, a second side surface 20D, a third side surface 20E, and a fourth side surface 20F. The first main surface 20A and the second main surface 20B are parallel planes. The first side surface 20C and the second side surface 20D are parallel planes. The third side surface 20E and the fourth side surface 20F are parallel planes.

[0036] The base material 25 is attached to the first main surface 20A of the counter substrate 20 via an optical resin 23. The base material 25 is a protective substrate for the counter substrate 20, and is made of, for example, glass or a light-transmitting resin. When the base material 25 is made of a glass base material, it is also called a cover glass. When the base material 25 is made of a light-transmitting resin, it may be flexible. Note that the same base material as the base material 25 may be attached to the first main surface 10A of the array substrate 10 via an optical resin.

[0037] 5 and 6, the base material 25 has a first main surface 25A, a second main surface 25B, a first side surface 25C, a second side surface 25D, a third side surface 25E, and a fourth side surface 25F. The first main surface 25A and the second main surface 25B are parallel planes. The first side surface 25C and the second side surface 25D are parallel planes. The third side surface 25E and the fourth side surface 25F are parallel planes.

[0038] As shown in Fig. 5 and Fig. 6, the light source 3 faces the second side surface 20D of the counter substrate 20. The light source 3 is sometimes called a side light source. As shown in Fig. 5, the light source 3 irradiates the light source light L to the second side surface 20D of the counter substrate 20. The second side surface 20D of the counter substrate 20 facing the light source 3 serves as a light incident surface. In addition, the second side surface 25D of the base material 25 facing the light source 3 serves as a light incident surface.

[0039] The light source 3 includes a light emitting section 31 and a light guide 33L. The light emitting section 31 includes a first color (e.g., red) light emitting body 33R, a second color (e.g., green) light emitting body 33G, and a third color (e.g., blue) light emitting body 33B. The light guide 33L irradiates the light emitted by the first color light emitting body 33R, the second color light emitting body 33G, and the third color light emitting body 33B to the second side surface 20D of the counter substrate 20 and the second side surface 25D of the base material 25. The light guide 33L simultaneously receives the light of the multiple light emitting sections 31, diffuses it internally, and emits it to the display panel 2. As a result, the distribution of light per unit area irradiated to the second side surface 20D of the counter substrate 20 and the second side surface 25D of the base material 25 is uniformed.

[0040] Furthermore, the light guide 33L is a single light guide 33L integrally formed from the third side surface 20E (or the third side surface 25E) to the fourth side surface 20F (or the fourth side surface 25F). The light guide 33L may be configured by arranging a plurality of divided light guides from the third side surface 20E (or the third side surface 25E) to the fourth side surface 20F (or the fourth side surface 25F). The light guide 33L may be configured by arranging a plurality of divided light guides from the third side surface 20E (or the third side surface 25E) to the fourth side surface 20F (or the fourth side surface 25F) and connecting adjacent light guides.

[0041] The light source 3 is mounted so as to overlap the second main surface 10B of the array substrate 10, and the following description will be based on this embodiment, but the present invention is not limited to this example and may be one that irradiates the side surface of the array substrate 10.

[0042] The wiring board 93 (flexible printed circuit board or PCB board) has an integrated circuit of the light source control unit 32 mounted thereon, and the light source control unit 32 is connected to the light source 3 via the wiring board 93 (flexible printed circuit board or PCB board).

[0043] 5, the light source light L emitted from the light source 3 propagates in a direction (second direction PY) away from the second side surface 20D while being reflected by the base material 25, the first main surface 10A of the array substrate 10, the first main surface 20A of the counter substrate 20, or the base material 25. When the light source light L travels from the first main surface 10A of the array substrate 10 or the first main surface 20A of the counter substrate 20 to the outside, it travels from a medium with a large refractive index to a medium with a small refractive index. Therefore, if the angle of incidence of the light source light L on the first main surface 10A of the array substrate 10 or the first main surface 20A of the counter substrate 20 is larger than the critical angle, the light source light L is totally reflected by the first main surface 10A of the array substrate 10 or the first main surface 20A of the counter substrate 20.

[0044] 5, the light source light L propagating inside the array substrate 10 and the counter substrate 20 is scattered by pixels Pix having liquid crystal in a scattering state, and the incident angle of the scattered light becomes smaller than the critical angle, so that emitted light 68, 68A is radiated to the outside from the first main surface 20A (first main surface 25A of the base material 25) of the counter substrate 20 and the first main surface 10A of the array substrate 10, respectively. The emitted light 68, 68A radiated to the outside from the first main surface 20A of the counter substrate 20 and the first main surface 10A of the array substrate 10, respectively, is observed by an observer.

[0045] 6, the multiple light emitting sections 31 are arranged at an interval of a first pitch P1 in a second region AAA corresponding to the second direction PY of the active region AA. In the first embodiment, the multiple light emitting sections 31 are arranged at an interval of a second pitch P2 in a first region FRA corresponding to the second direction PY of the peripheral region FR. The first pitch P1 of the light emitting sections 31 and the second pitch P2 of the light emitting sections 31 are the center-to-center distance in the first direction PX of adjacent light emitting sections 31. In the first embodiment, the first pitch P1 of the light emitting sections 31 is smaller than the second pitch P2 of the light emitting sections 31.

[0046] The distance LW from the light-emitting portion 31 to the third side surface 20E (or the fourth side surface 20F) in the first direction PX is 0 mm or more and ½ the distance of the first region FRA or less. The closer the distance LW of the light-emitting portion 31 provided closest to the third side surface 20E (or the fourth side surface 20F), the closer it is to the third side surface 20E (or the fourth side surface 20F), the more preferable it is.

[0047] Hereinafter, the polymer dispersed liquid crystal in the scattering state and the polymer dispersed liquid crystal in the non-scattering state will be described with reference to FIGS.

[0048] As shown in FIG. 7, the array substrate 10 is provided with a first alignment film AL1. The counter substrate 20 is provided with a second alignment film AL2. The first alignment film AL1 and the second alignment film AL2 may be, for example, vertical alignment films, or may be alignment films that are aligned in the first direction PX in which the light emitting sections 31 are arranged. When the alignment films are aligned, for example, the alignment direction of the first alignment film AL1 may be one side of the first direction PX, and the alignment direction of the second alignment film AL2 may be aligned in the other side of the first direction PX. The alignment process is performed by a rubbing process or a photo-alignment process.

[0049] A solution containing liquid crystal and a monomer is sealed between the array substrate 10 and the counter substrate 20. Next, in a state in which the monomer and liquid crystal are aligned by the first alignment film AL1 and the second alignment film AL2, the monomer is polymerized by ultraviolet light or heat to form a bulk 51. This forms a liquid crystal layer 50 having a reverse mode polymer dispersed liquid crystal LC in which the liquid crystal is dispersed in the gaps of a network of polymers formed in a mesh shape.

[0050] Thus, the polymer dispersed liquid crystal LC has a bulk 51 formed of a polymer and a plurality of particles 52 dispersed in the bulk 51. The particles 52 are formed of a liquid crystal. The bulk 51 and the particles 52 each have optical anisotropy.

[0051] The orientation of the liquid crystal contained in the particles 52 is controlled by the voltage difference between the pixel electrode PE and the common electrode CE. The orientation of the liquid crystal changes depending on the voltage applied to the pixel electrode PE. The change in the orientation of the liquid crystal changes the degree of scattering of light passing through the pixel Pix.

[0052] 8, when no voltage is applied between the pixel electrode PE and the common electrode CE, the optical axis Ax1 of the bulk 51 and the optical axis Ax2 of the particle 52 are oriented in the same direction. The optical axis Ax2 of the particle 52 is parallel to the PZ direction of the liquid crystal layer 50. The optical axis Ax1 of the bulk 51 is parallel to the PZ direction of the liquid crystal layer 50 regardless of the presence or absence of voltage.

[0053] The ordinary light refractive indexes of the bulk 51 and the particles 52 are equal to each other. When no voltage is applied between the pixel electrode PE and the common electrode CE, the difference in refractive index between the bulk 51 and the particles 52 is zero in all directions. The liquid crystal layer 50 is in a non-scattering state in which it does not scatter the light source light L. The light source light L propagates in a direction away from the light source 3 (light-emitting section 31) while being reflected by the first main surface 10A of the array substrate 10 and the first main surface 20A of the counter substrate 20. When the liquid crystal layer 50 is in a non-scattering state in which it does not scatter the light source light L, the background on the first main surface 20A side of the counter substrate 20 is visible from the first main surface 10A of the array substrate 10, and the background on the first main surface 10A side of the array substrate 10 is visible from the first main surface 20A of the counter substrate 20.

[0054] 9, between the pixel electrode PE and the common electrode CE to which a voltage is applied, the optical axis Ax2 of the particles 52 is tilted by the electric field generated between the pixel electrode PE and the common electrode CE. Since the optical axis Ax1 of the bulk 51 does not change due to the electric field, the optical axis Ax1 of the bulk 51 and the optical axis Ax2 of the particles 52 are oriented in different directions. In the pixel Pix having the pixel electrode PE to which a voltage is applied, the light source light L is scattered. As described above, a part of the scattered light source light L is emitted to the outside from the first main surface 10A of the array substrate 10 or the first main surface 20A of the counter substrate 20, and the light is observed by the observer.

[0055] In a pixel Pix having a pixel electrode PE to which no voltage is applied, the background on the first main surface 20A side of the counter substrate 20 is visible from the first main surface 10A of the array substrate 10, and the background on the first main surface 10A side of the array substrate 10 is visible from the first main surface 20A of the counter substrate 20. When the display device 1 of this embodiment receives a first input signal VS from the image output unit 91, a voltage is applied to the pixel electrode PE of the pixel Pix where an image is displayed, and an image based on the third input signal VCSA is visible together with the background. In this way, when the polymer dispersed liquid crystal is in a scattering state, an image is displayed in the display region.

[0056] An image displayed by light emitted to the outside after scattering the light source light L in a pixel Pix having a pixel electrode PE to which a voltage is applied is displayed superimposed on the background. In other words, the display device 1 of this embodiment displays an image superimposed on the background by combining the emitted light 68 or 68A with the background.

[0057] In one vertical scanning period GateScan shown in FIG. 3, the potential of each pixel electrode PE (see FIG. 7) to which the electric potential has been written must be held in at least one of the first color light emission period RON, the second color light emission period GON, and the third color light emission period BON, which follow each vertical scanning period GateScan. If the potential of each pixel electrode PE (see FIG. 7) to which the electric potential has been written cannot be held in at least one of the first color light emission period RON, the second color light emission period GON, and the third color light emission period BON, which follow each vertical scanning period GateScan, so-called flicker is likely to occur. In other words, in order to shorten one vertical scanning period GateScan, which is the selection time of the scanning line, and to improve visibility in driving by the so-called field sequential method, there is a demand for making it easier to hold the potential of each pixel electrode PE (see FIG. 7) to which the electric potential has been written in each of the first color light emission period RON, the second color light emission period GON, and the third color light emission period BON.

[0058] FIG. 10 is a plan view showing a scanning line, a signal line, and a switching element in a pixel. FIG. 11 is a plan view showing a storage capacitance layer in a pixel. FIG. 12 is a plan view showing an auxiliary metal layer and an opening region in a pixel. FIG. 13 is a plan view showing a pixel electrode in a pixel. FIG. 14 is a plan view showing a light-shielding layer in a pixel. FIG. 15 is a cross-sectional view taken along line XV-XV' in FIG. 14. FIG. 16 is a cross-sectional view taken along line XVI-XVI' in FIG. 14. FIG. 17 is a cross-sectional view taken along line XVII-XVII' in FIG. 14. As shown in FIGS. 1, 2, and 10, a plurality of signal lines SL and a plurality of scanning lines GL are provided in a lattice pattern in a plan view on the array substrate 10. In other words, one surface of the array substrate 10 includes a plurality of signal lines arranged at intervals in the first direction PX and a plurality of scanning lines arranged at intervals in the second direction PY.

[0059] As shown in Fig. 10, a region surrounded by adjacent scanning lines GL and adjacent signal lines SL is a pixel Pix. The pixel Pix is ​​provided with a pixel electrode PE and a switching element Tr. In this embodiment, the switching element Tr is a bottom-gate type thin film transistor. The switching element Tr has a semiconductor layer SC that overlaps, in a plan view, with a gate electrode GE that is electrically connected to the scanning line GL.

[0060] 10, the scanning lines GL are wirings made of a metal such as molybdenum (Mo) or aluminum (Al), a laminate thereof, or an alloy thereof, while the signal lines SL are wirings made of a metal such as aluminum or an alloy thereof.

[0061] 10, the semiconductor layer SC is provided so as not to protrude from the gate electrode GE in a plan view, whereby the light source light L directed from the gate electrode GE side toward the semiconductor layer SC is reflected, making it difficult for light leakage to occur in the semiconductor layer SC.

[0062] As shown in Fig. 5, the light source light L emitted from the light source 3 is incident in the second direction PY. The incident direction is the direction from the second side surface 20D closest to the light source 3 to the first side surface 20C which is the opposing surface of the second side surface 20D. When the incident direction of the light source light L is the second direction PY, the length of the semiconductor layer SC in the first direction is smaller than the length of the semiconductor layer SC in the first direction PX. This reduces the length of the light source light L in the direction intersecting the incident direction, thereby reducing the effect of light leakage.

[0063] 10, the source electrode SE has two conductors, the same as those of the signal line SL, which are in the same layer as the signal line SL and extend from the signal line SL in a direction intersecting the signal line SL. As a result, the source electrode SE electrically connected to the signal line SL overlaps one end of the semiconductor layer SC in a plan view.

[0064] As shown in Fig. 10, in a plan view, a drain electrode DE is provided between the conductors of adjacent source electrodes SE. In a plan view, the drain electrode DE overlaps with the semiconductor layer SC. A portion that does not overlap with the source electrode SE and the drain electrode DE functions as a channel of the switching element Tr. A contact electrode DEA electrically connected to the drain electrode DE is electrically connected to the pixel electrode PE shown in Fig. 13 through a contact hole CH.

[0065] 15, the array substrate 10 has a first light-transmissive base material 19 made of, for example, glass. The first light-transmissive base material 19 may be made of a resin such as polyethylene terephthalate as long as it has light-transmissive properties.

[0066] As shown in FIG. 15, on a first light-transmissive base material 19, the scanning lines GL (see FIG. 10) and the gate electrodes GE are provided.

[0067] 15, a first insulating layer 11 is provided to cover the scanning lines GL and the gate electrodes GE. The first insulating layer 11 is made of a transparent inorganic insulating material such as silicon nitride.

[0068] A semiconductor layer SC is laminated on the first insulating layer 11. The semiconductor layer SC is formed of, for example, amorphous silicon, but may be formed of polysilicon or an oxide semiconductor. When viewed from the same cross section, the length Lsc of the semiconductor layer SC is smaller than the length Lge of the gate electrode GE overlapping the semiconductor layer SC. This allows the gate electrode GE to block the light Ld1 propagating through the first light-transmitting base material 19. As a result, the switching element Tr of the first embodiment has reduced light leakage.

[0069] A source electrode SE and a signal line SL covering a portion of the semiconductor layer SC, and a drain electrode DE covering a portion of the semiconductor layer SC are provided on the first insulating layer 11. The drain electrode DE is made of the same material as the signal line SL. A second insulating layer 12 is provided on the semiconductor layer SC, the signal line SL, and the drain electrode DE. The second insulating layer 12 is formed of a transparent inorganic insulating material such as silicon nitride, for example, similar to the first insulating layer.

[0070] A third insulating layer is formed on the second insulating layer 12 to cover a part of the second insulating layer 12. The third insulating layer 13 is formed of an organic insulating material having light transmitting properties, such as an acrylic resin. The third insulating layer 13 has a thickness larger than other insulating films formed of inorganic materials.

[0071] As shown in FIG. 15, FIG. 16, and FIG. 17, there are regions where the third insulating layer 13 is present and regions where the third insulating layer 13 is not present. As shown in FIG. 16 and FIG. 17, the region where the third insulating layer 13 is present is above the scanning line GL and above the signal line SL. The third insulating layer 13 is in a lattice shape that covers the scanning line GL and the signal line SL along the scanning line GL and the signal line SL. Also, as shown in FIG. 15, the region where the third insulating layer 13 is present is above the semiconductor layer SC, that is, above the switching element Tr. Therefore, the switching element Tr, the scanning line GL, and the signal line SL are relatively far away from the storage capacitance electrode ITO, so that they are less susceptible to the common potential from the storage capacitance electrode ITO. Furthermore, in the array substrate 10, a region surrounded by the scanning line GL and the signal line SL has a region where the third insulating layer 13 is not present, and therefore a region where the thickness of the insulating layer is smaller than the thickness of the insulating layer that overlaps the signal line SL and the scanning line GL in a plan view is formed. In the region surrounded by the scanning lines GL and the signal lines SL, the light transmittance is relatively improved compared to the regions above the scanning lines GL and above the signal lines SL, and the light transmittance is improved.

[0072] As shown in Fig. 15, a metal layer TM is provided on the third insulating layer 13. The conductive metal layer TM is a metal such as molybdenum (Mo) or aluminum (Al), a laminate of these, or wiring of an alloy of these. As shown in Fig. 12, the metal layer TM is provided in an area overlapping the signal lines SL, the scanning lines GL, and the switching elements Tr in a plan view. This makes the metal layer TM lattice-shaped, and an opening AP surrounded by the metal layer TM is formed.

[0073] As shown in FIG. 15, a storage capacitance electrode IO is provided on the third insulating layer 13 and the metal layer TM. The storage capacitance electrode IO is made of a light-transmitting conductive material such as ITO (Indium Tin Oxide). The storage capacitance electrode IO is also called a third light-transmitting electrode. As shown in FIG. 11, the storage capacitance electrode IO has an area IOX surrounded by the scanning line GL and the signal line SL where there is no light-transmitting conductive material. The storage capacitance electrode IO is provided across a plurality of pixels Pix, straddling adjacent pixels Pix. The storage capacitance electrode IO has an area where the light-transmitting conductive material is present that overlaps the scanning line GL or the signal line SL and extends to the adjacent pixel Pix.

[0074] The storage capacitance electrode IO is in a lattice shape that covers the scanning lines GL and the signal lines SL along the scanning lines GL and the signal lines SL. This reduces the storage capacitance HC between the region IOX without the translucent conductive material and the pixel electrode PE, so that the storage capacitance HC is adjusted by the size of the region IOX without the translucent conductive material.

[0075] 12, a switching element Tr is provided that is connected to a scanning line GL and a signal line SL, and at least the switching element Tr is covered with a third insulating layer 13 that is an organic insulating layer, and a metal layer TM having an area larger than that of the switching element Tr is provided above the third insulating layer 13. This makes it possible to suppress light leakage from the switching element Tr.

[0076] More specifically, the array substrate 10 includes a third insulating layer 13, which is an organic insulating layer covering at least the switching element Tr, and a metal layer TM that is provided above the third insulating layer 13 and has an area larger than that of the switching element Tr. In the region surrounded by the scanning line GL and the signal line SL, there is a region whose thickness is smaller than that of the third insulating layer 13 that overlaps the scanning line GL and the signal line SL in a plan view. Therefore, a slope is formed in which the thickness of the third insulating layer 13 changes on the side closer to the light source 3 than the switching element Tr in a plan view. As shown in FIG. 5, the light source light L irradiated from the light source 3 is incident with the second direction PY as the incident direction. As shown in FIG. 15, the above-mentioned slope includes a first slope 13F of the third insulating layer 13 on the side where the light Lu of the light source light L is incident, and a second slope 13R of the third insulating layer 13 on the opposite side to the side where the light Lu is incident. 15, the first slope 13F of the third insulating layer 13 on the side where the light Lu is incident is covered with a metal layer TMt. Here, the metal layer TMt is made of the same material as the metal layer TM and is a tapered portion formed by extending the metal layer TM.

[0077] 15, light Lu arrives in the incident direction. The light Lu is a part of the light source light L that arrives from a side closer to the light source 3 than the switching element Tr. Here, the metal layer TMt blocks the light Lu, thereby reducing light leakage.

[0078] When the second inclined surface 13R is covered with a metal layer TM and the background of the counter substrate 20 is visible from the array substrate 10, the light Ld2 seen by the viewer may be reflected by the metal layer TM covering the second inclined surface 13R, and the reflected light may be visible to the viewer. In the first embodiment, there is no metal layer TM covering the second inclined surface 13R. Therefore, in the display device of the first embodiment, the reflected light that interferes with the viewer's visibility is reduced.

[0079] The metal layer TM may be on the storage capacitance electrode IO, and may be laminated with the storage capacitance electrode IO. The metal layer TM has a smaller electrical resistance than the storage capacitance electrode IO. This suppresses the variation in the potential of the storage capacitance electrode IO depending on the position of the pixel Pix in the active area AA.

[0080] As shown in FIG. 12, in a plan view, the width of the metal layer TM overlapping the signal line SL is greater than the width of the signal line SL. This prevents light reflected at the edge of the signal line SL from being emitted from the display panel 2. Here, the width of the metal layer TM and the width of the signal line SL are lengths in a direction intersecting the direction in which the signal line SL extends. In addition, the width of the metal layer TM overlapping the scanning line GL is greater than the width of the scanning line GL. Here, the width of the metal layer TM and the width of the scanning line GL are lengths in a direction intersecting the direction in which the scanning line GL extends.

[0081] 15, a fourth insulating layer 14 is provided on the storage capacitor electrode IO and the metal layer TM. The fourth insulating layer 14 is an inorganic insulating layer formed of a transparent inorganic insulating material such as silicon nitride.

[0082] As shown in Fig. 15, a pixel electrode PE is provided on the fourth insulating layer 14. The pixel electrode PE is made of a light-transmitting conductive material such as ITO. The pixel electrode PE is electrically connected to the contact electrode DEA via a contact hole CH provided in the fourth insulating layer 14, the third insulating layer 13, and the second insulating layer 12. As shown in Fig. 13, the pixel electrode PE is partitioned for each pixel Pix. A first alignment film AL1 is provided on the pixel electrode PE.

[0083] As shown in FIG. 15, the counter substrate 20 has a second light-transmitting base material 29 made of, for example, glass. The second light-transmitting base material 29 may be a resin such as polyethylene terephthalate as long as it has light-transmitting properties. A common electrode CE is provided on the second light-transmitting base material 29. The common electrode CE is made of a light-transmitting conductive material such as ITO. A second alignment film AL2 is provided on the surface of the common electrode CE. The counter substrate 20 also has a light-shielding layer LS between the second light-transmitting base material 29 and the common electrode CE. The light-shielding layer LS is made of a black resin or metal material. A spacer PS is also formed between the array substrate 10 and the counter substrate 20, and the spacer PS is between the common electrode CE and the second alignment film AL2.

[0084] 12 and 16, in the display device of the first embodiment, a light-shielding layer GS, which is the same layer as the scanning lines GL, is provided at a position that extends along the signal lines SL and overlaps with a part of the signal lines SL. The light-shielding layer GS is made of the same material as the scanning lines GL. The light-shielding layer GS is not provided at the portion where the scanning lines GL and the signal lines SL intersect in a plan view.

[0085] As shown in Fig. 12, the light-shielding layer GS and the signal line SL are electrically connected by a contact hole CHG. This reduces the wiring resistance of the light-shielding layer GS and the signal line SL compared to the wiring resistance of only the signal line SL. As a result, the delay of the grayscale signal supplied to the signal line SL is suppressed. Note that the light-shielding layer GS and the signal line SL do not necessarily have to be connected without the contact hole CHG.

[0086] As shown in FIG. 16, the light-shielding layer GS is provided on the opposite side of the signal line SL to the metal layer TM. The width of the light-shielding layer GS is larger than the width of the signal line SL and smaller than the width of the metal layer TM. The width of the light-shielding layer GS, the width of the metal layer TM, and the width of the signal line SL are lengths in a direction intersecting the direction in which the signal line SL extends. In this way, since the light-shielding layer GS is wider than the signal line SL, it suppresses the reflected light reflected at the edge of the signal line SL from being emitted from the display panel 2. As a result, the visibility of images in the display device 1 is improved.

[0087] 14 and 15, a light-shielding layer LS is provided on the counter substrate 20. The light-shielding layer LS is provided in an area overlapping the signal lines SL, the scanning lines GL, and the switching elements Tr in a plan view.

[0088] 14, 15, 16, and 17, the light-shielding layer LS has a width greater than that of the metal layer TM. This prevents light reflected at edges of the signal lines SL, the scanning lines GL, and the metal layer TM from being emitted from the display panel 2. As a result, the visibility of images in the display device 1 is improved.

[0089] The contact holes CH and CHG are prone to diffuse reflection when struck by the light source light L. For this reason, the light shielding layer LS is provided in an area overlapping the contact holes CH and CHG in plan view.

[0090] As shown in FIG. 15, spacers SP are disposed between the array substrate 10 and the counter substrate 20 to improve the uniformity of the distance between the array substrate 10 and the counter substrate 20. As shown in FIG.

[0091] FIG. 18 is an explanatory diagram for explaining the relationship between a viewer who views the background on the other side of the display device 1 from one side and the background. FIG. 19 is an explanatory diagram for explaining an example in which a peripheral region is superimposed on a background. As shown in FIG. 18, when an observer IB views the display device 1 from one side to the other side, the background BS1 is viewed through the display device 1. As shown in FIG. 19, the observer IB can view the background BS1 through the active area AA. If the peripheral area FR outside the active area AA does not transmit light, the background BS1 may not be visible and may cause discomfort. Therefore, the peripheral area FR is also made light-transmitting so that the background BS1 on the other side of the display device 1 can be viewed from one side of the display device 1, for example, by not forming a light-shielding layer LS formed on the counter substrate 20. By making the peripheral area FR a transparent area in addition to the active area AA, the aesthetic appearance is not impaired when the background is viewed through the display device 1.

[0092] As described above, the display device 1 includes the display panel 2 and the light source 3. The display panel 2 includes the array substrate 10, the counter substrate 20, and the liquid crystal layer 50. When viewed from the third direction PZ, the display panel 2 has an active area AA and a peripheral area FR outside the active area AA. The light source 3 includes a light guide 33L provided in the first direction PX along the second side surface 20D of the counter substrate 20 and the second side surface 25D of the base material 25, and a plurality of light emitting units 31 arranged to face the light guide 33L.

[0093] FIG. 20 is a plan view for explaining a display device of a comparative example. As shown in FIG. 20, a plurality of light-emitting units 31 are arranged at a first pitch P1 in a second region AAA corresponding to the second direction PY of the active region AA. In the comparative example, a plurality of light-emitting units 31 are not arranged in a first region FRA corresponding to the second direction PY of the peripheral region FR. In the second region AAA, the light emitted by the light-emitting units 31 is irradiated onto the second side surface 20D of the counter substrate 20 and the second side surface 25D of the base material 25, but in the first region FRA, the light emitted by the light-emitting units 31 is not irradiated. For this reason, when an observer IB views the display panel 2 obliquely with respect to the normal direction of the display panel 2, there is a possibility that an unintended shadow BP originating from the first region FRA corresponding to the peripheral region FR outside the active region AA is visually recognized.

[0094] In contrast, in the display device of the first embodiment, at least one light-emitting section 31 is disposed in a first region FRA that overlaps with a range obtained by extending, in the second direction PY, the peripheral regions FR on both sides of the active region AA in the first direction PX. As a result, even when the viewer IB views the display panel 2 obliquely with respect to the normal direction of the display panel 2, light from the light-emitting section 31 enters the second side surface 20D of the counter substrate 20 and the second side surface 25D of the base material 25 from the first region FRA through the light guide 33L, making it difficult for a shadow BP to occur.

[0095] A first pitch P1 between adjacent light-emitting units 31 arranged in a second area AAA that overlaps with the range obtained by extending the active area AA in the second direction PY is smaller than a second pitch P2 between adjacent light-emitting units 31 among the plurality of light-emitting units 31 arranged in the first area FRA. This ensures an amount of light sufficient to eliminate the shadow BP, and does not consume excess power.

[0096] (Embodiment 2) 21 is a plan view for explaining a display device of embodiment 2. The same components as those explained in the above-mentioned embodiment are given the same reference numerals, and duplicate explanations will be omitted.

[0097] 21, the first pitch P1 between adjacent light-emitting units 31 arranged in the second region AAA is the same as the pitch between adjacent light-emitting units 31 among the multiple light-emitting units 31 arranged in the first region FRA. This ensures an amount of light equivalent to that in the second region AAA in the first region FRA, and ensures an amount of light at the end of the active region AA in the first direction PX.

[0098] (Embodiment 3) 22 is a plan view for explaining a display device of embodiment 3. The same components as those explained in the above-mentioned embodiment are given the same reference numerals, and duplicate explanations will be omitted.

[0099] 22, in the third embodiment, one light-emitting portion 31 is arranged in each first region FRA. A distance W1 from the light-emitting portion 31 in the first region FRA to the nearest reference position E21 in the second region AAA is greater than a distance W2 from the light-emitting portion 31 in the first region FRA to the fourth side surface 20F of the counter substrate 20 in the first direction PX.

[0100] Furthermore, a distance W3 from the light-emitting portion 31 in the first region FRA to the closest reference position E22 in the second region AAA is greater than a distance W4 from the light-emitting portion 31 in the first region FRA to the third side surface 20E in the first direction PX of the counter substrate 20. This allows the light-emitting portion 31 to suppress the shadow BP by utilizing reflection at least on the third side surface 20E or the fourth side surface 20F in the first direction PX of the counter substrate 20.

[0101] (Embodiment 4) 23 is a plan view for explaining a display device of embodiment 4. The same components as those explained in the above-mentioned embodiment are given the same reference numerals and overlapping explanations are omitted.

[0102] In the fourth embodiment, the side surface E31 and the side surface E32 of the light guide 33L in the first direction PX protrude in the first direction PX from the reference line E12 along the third side surface 20E in the first direction PX of the counter substrate 20 or the reference line E11 along the fourth side surface 20F. The light emitting portion 31 is disposed at a position facing the portion protruding in the first direction PX from the reference line E12 or the reference line E11. The light guide 33L simultaneously receives light from the multiple light emitting portions 31, diffuses the light therein, and emits the light to the display panel 2. Since there are at least two light emitting portions 31 adjacent to each other across the reference line E12 or the reference line E11, the amount of light of the light guide 33L near the reference line E12 or the reference line E11 increases. As a result, the above-mentioned shadow BP is less likely to occur.

[0103] (Embodiment 5) 24 is a cross-sectional view showing an example of a cross section of a display device of embodiment 5. The same components as those described in the above embodiment are given the same reference numerals, and duplicated description will be omitted.

[0104] 24, the display device 1 includes a light-transmitting first base material 25, a display panel 2, and a light-transmitting second base material 27. A protective layer 75 is provided on one surface of the light-transmitting first base material 25. A protective layer 76 is provided on one surface of the light-transmitting second base material 27.

[0105] The second base material 27 is attached to the second main surface 10B of the array substrate 10 via an optical resin 26. The second base material 27 is a protective substrate for the array substrate 10, and is made of, for example, glass or a light-transmitting resin. When the second base material 27 is made of a glass base material, it is also called a cover glass. When the second base material 27 is made of a light-transmitting resin, it may be flexible.

[0106] The light source 3 includes a light guide 33L provided in the first direction PX along the second side surface 25D of the first base material 25, and a plurality of light emitting units 31 arranged to face the light guide 33L. Unlike the first embodiment, in the fifth embodiment, the light guide 33L does not face the second side surface 20D of the counter substrate 20 of the light source 3, but faces only the second side surface 25D of the first base material 25. The light guide 33L uses only the second side surface 25D of the first base material 25 as a light entrance surface for light from the light source 3.

[0107] Although the preferred embodiment has been described above, the present disclosure is not limited to such an embodiment. The contents disclosed in the embodiment are merely examples, and various modifications are possible within the scope of the present disclosure. Appropriate modifications made within the scope of the present disclosure also naturally belong to the technical scope of the present disclosure.

[0108] For example, in the present disclosure, the switching element Tr has been described as being of a bottom gate type, but as described above, the switching element Tr is not limited to a bottom gate structure and may be of a top gate type. If the switching element Tr is of a top gate type, referring to the insulating film stack structure of FIG. 15, the semiconductor layer SC is disposed between the first light-transmitting base material 19 and the first insulating layer, the gate electrode GE is disposed between the first insulating layer 11 and the second insulating layer 12, and the source electrode SE and the contact electrode DEA are formed between the second insulating layer 12 and the third insulating layer 13.

[0109] Furthermore, the common potential may be a DC voltage, i.e., a constant common potential, or may be an AC voltage shared, i.e., a common potential having two limits, an upper limit and a lower limit. Whether the common potential is DC or AC, a common potential is supplied to the storage capacitance electrode IO and the common electrode CE.

[0110] In addition, with respect to the third insulating layer 13, which is a lattice-shaped organic insulating film, a structure is disclosed in which the third insulating layer 13 inside the lattice is completely removed to expose the second insulating layer 12 and the storage capacitor electrode IO underneath, but the present invention is not limited to this. For example, the third insulating layer 13 may be left partially thin inside the lattice region surrounded by the signal lines SL and the scanning lines GL by halftone exposure. As a result, the third insulating layer 13 is thinner inside the lattice region than the lattice region surrounded by the signal lines SL and the scanning lines GL. [Explanation of symbols]

[0111] 1 Display device 2 Display Panel 3 light source 31 Light emitting part 33R, 33G, 33B Illuminators 33L light guide 50 Liquid crystal layer AA active area AAA 2nd area BS1 background E31 side E32 side FR peripheral area FRA 1st area LC Polymer dispersed liquid crystal P1 First pitch P2 2nd pitch PX 1st direction PY 2nd direction PZ 3rd direction

Claims

1. a display panel including a first light-transmitting substrate, a second light-transmitting substrate, and a liquid crystal layer between the first light-transmitting substrate and the second light-transmitting substrate, the display panel having an active area capable of displaying an image when viewed in a direction perpendicular to the first light-transmitting substrate, and a peripheral area outside the active area; a light-transmitting glass substrate bonded to the display panel; a light source arranged so that light enters a side surface of the first light-transmitting substrate, a side surface of the second light-transmitting substrate, or a side surface of the glass base material; the light source includes a light guide provided in a first direction along a side surface of the first light-transmitting substrate, a side surface of the second light-transmitting substrate, or a side surface of the glass base material, and a plurality of light-emitting units arranged to face the light guide; At least one of the light emitting units is disposed in a first region overlapping a range obtained by extending the peripheral regions on both sides of the active region in the first direction in a second direction intersecting the first direction, a plurality of the light emitting units arranged in a second region overlapping a range obtained by extending the active region in the second direction; one light emitting section is arranged in each of the first regions, and a distance from the light emitting section in the first region to a nearest one of the second regions is greater than a distance from the light emitting section in the first region to a side surface of the second light transmissive substrate in the first direction; Display device.

2. 2. The display device of claim 1, wherein the light guide protrudes in the first direction beyond a side surface of the second light-transmissive substrate in the first direction, and the light-emitting portion is positioned opposite a portion that protrudes in the first direction beyond a side surface of the second light-transmissive substrate in the first direction.

3. 3. The display device according to claim 1, wherein in the peripheral regions on both sides of the active region in the first direction, a background of the second light-transmissive substrate is visible from the first light-transmissive substrate, and a background of the first light-transmissive substrate is visible from the second light-transmissive substrate.

4. 3 . The display device according to claim 1 , wherein in the active region, a background of the second light-transmissive substrate is visible from the first light-transmissive substrate, and a background of the first light-transmissive substrate is visible from the second light-transmissive substrate.

5. the liquid crystal layer is a polymer dispersed liquid crystal; the first light-transmitting substrate has a first main surface and a second main surface that is a plane parallel to the first main surface; the second light-transmitting substrate has a first main surface and a second main surface that is a plane parallel to the first main surface; 3. The display device according to claim 1, wherein when the polymer dispersed liquid crystal is in a non-scattering state, a background on the first main surface side of the second light transmissive substrate is visible from the first main surface of the first light transmissive substrate, or a background on the first main surface side of the first light transmissive substrate is visible from the first main surface of the second light transmissive substrate.

Images