Power circuit

Abstract

To provide a power supply circuit capable of suppressing variation in an output current of a first power supply circuit and stably supplying power to a drive circuit.SOLUTION: A main power supply REG1 includes an output terminal P2 to which an output voltage controlled so as to become constant is output. Local power supplies REG21A and REG22A outputs, respectively, output voltages VOUT21 and VOUT22 generated from an output voltage to loads. The local power supplies REG21A and REG22A output a drain current I3 according to an output current IOUT1 supplied to the loads. An auxiliary power supply REGBK inputs a drain current I3, outputs an output current IOUT2 according to the drain current I3, and supplies the output current to the output terminal P2 of the main power supply REG1.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power supply circuit. [Background technology]

[0002] A conventional power supply circuit has been proposed as shown in Fig. 3. The conventional power supply circuit 100 has a power supply REG1 as a first power supply circuit, and load circuits LC1-LCn as drive circuits connected to the output of the power supply REG1. The power supply REG1 is a step-down power supply circuit such as a linear regulator or SW power supply, and supplies a constant output voltage obtained by stepping down a power supply voltage VDD to the load circuits LC1-LCn described below. The load circuits LC1-LCn are connected in parallel with each other, generate a drive voltage from the output voltage supplied from the power supply REG1, and supply the drive voltage to a load (not shown).

[0003] Moreover, as a technology related to the above-mentioned power supply circuit, Patent Document 1 can be mentioned. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2010-178455 A Summary of the Invention [Problem to be solved by the invention]

[0005] The power supply REG1 generally monitors the output voltage value internally and controls the output current in response to fluctuations in the output voltage, a so-called feedback control. Since feedback control involves a time delay in its operation, it takes a certain amount of time for the output voltage to return to a normal value after a change.

[0006] In addition, a plurality of load circuits LC1 to LCn are connected to the power supply REG1. The output current of these load circuits LC1 to LCn constantly fluctuates. Therefore, in a configuration in which a plurality of load circuits LC1 to LCn are connected to one power supply REG1, it is desired that the power supply REG1 respond to the fluctuation of the output current of each of the load circuits LC1 to LCn. In a conventional power supply circuit, when the output current of the load circuits LC1 to LCn fluctuates, the output voltage and output current of the power supply REG1 fluctuate. The power supply REG1 performs feedback control so that the output voltage is constant, but as a result of the time delay of the above-mentioned feedback control, it cannot immediately return to a steady value. That is, in the conventional power supply circuit, there was a risk that the output voltage output from the power supply REG1 could not be kept constant and could fluctuate due to the fluctuation of the output current of the load circuits LC1 to LCn.

[0007] This fluctuation in the output voltage of the power supply REG1 can adversely affect the operation of the load circuits LC1 to LCn. More specifically, an increase in the output current of one of the load circuits LC1 to LCn can cause a drop in the output voltage of the power supply REG1, leading to malfunctions in the other load circuits LC1 to LCn, or the fluctuation in the output voltage of the power supply REG1 can become noise that finds its way into each of the load circuits LC1 to LCn, increasing the output noise.

[0008] The present invention has been made in consideration of the above-mentioned circumstances, and an object of the present invention is to provide a power supply circuit that can suppress fluctuations in the output current of a first power supply circuit and provide a stable power supply to a drive circuit. [Means for solving the problem]

[0009] In order to achieve the above-mentioned object, a power supply circuit according to the present invention has the following features [1] to [7]. [1] a first power supply circuit having an output terminal from which an output voltage controlled to be constant is output; a drive circuit that outputs a drive voltage generated from the output voltage to a load, the drive circuit outputs a signal corresponding to a first output current to be supplied to the load; a second power supply circuit that receives the signal, outputs a second output current corresponding to the signal, and supplies the second output current to the output terminal of the first power supply circuit; It is a power supply circuit. [2] In the power supply circuit according to [1], the second power supply circuit is composed of a first current mirror circuit that outputs the second output current obtained by mirroring an input current; The drive circuit inputs the signal to the first current mirror circuit. It is a power supply circuit. [3] In the power supply circuit according to [2], The drive circuit is provided in plurality, A plurality of the signals output from the plurality of the drive circuits are input to one of the first current mirror circuits. It is a power supply circuit. [4] In the power supply circuit according to any one of [1] to [3], the drive circuit outputs the signal corresponding to the first output current when the first output current exceeds a predetermined value. It is a power supply circuit. [5] In the power supply circuit according to [4], the drive circuit includes a first transistor connected between the output terminal of the first power supply circuit and the load, a second transistor mirror-connected to the first transistor and through which a second current flows corresponding to a first current flowing through the first transistor, a resistor to which the second current flowing through the second transistor is supplied, and a third transistor to which a voltage generated across the resistor is supplied as a bias voltage, and the third current flowing through the third transistor is output as the signal. It is a power supply circuit. [6] [5] The power supply circuit according to the present invention, a fourth transistor to which a voltage generated across the resistor is supplied as a bias voltage; and a second current mirror circuit that outputs a fifth current corresponding to a fourth current flowing through the fourth transistor, a fifth current output from the second current mirror circuit is supplied to a control terminal of the first transistor; It is a power supply circuit. [7] In the power supply circuit according to any one of [1] to [3], the drive circuit has a fifth transistor connected between the output terminal of the first power supply circuit and the load, and a sixth transistor mirror-connected to the fifth transistor and through which a seventh current flows corresponding to a sixth current flowing through the fifth transistor, and the seventh current flowing through the sixth transistor is output as the signal. It is a power supply circuit. Effect of the Invention

[0010] According to the power supply circuit of the present invention, it is possible to suppress fluctuations in the output current of the first power supply circuit and to perform a stable power supply to the drive circuit.

[0011] The present invention has been briefly described above. The details of the present invention will be further clarified by reading the following description of the preferred embodiment of the present invention (hereinafter, referred to as "embodiment") with reference to the accompanying drawings. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a circuit diagram showing a power supply circuit according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a circuit diagram showing a power supply circuit according to a second embodiment of the present invention. [Diagram 3] FIG. 3 is a configuration diagram showing an example of a conventional power supply circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Specific embodiments of the present invention will be described below with reference to the accompanying drawings.

[0014] (First Example) A power supply circuit 1A of the first embodiment will be described with reference to FIG. 1. As shown in the figure, the power supply circuit 1A includes a main power supply REG1 as a first power supply circuit, a plurality of local power supplies REG21A and REG22A as drive circuits, and an auxiliary power supply REGBK as a second power supply circuit. The main power supply REG1 of this embodiment corresponds to the power supply REG1 in the conventional circuit. Although the number of drive circuits is two in this embodiment, the number of drive circuits is not limited to two, and may be one or three or more. The main power supply REG1 is composed of a step-down power supply circuit such as a linear regulator or a switching power supply. The main power supply REG1 monitors the voltage value of the output voltage and controls the output current according to the fluctuation of the output voltage, thereby performing feedback control to keep the output voltage constant. The main power supply REG1 is connected between an input terminal P1 and an output terminal P2, and steps down the power supply voltage VDD input to the input terminal P1, and outputs an output voltage VOUT1 controlled to be constant from the output terminal P2.

[0015] The local power supplies REG21A and REG22A are each composed of a linear regulator having the same circuit configuration. The local power supplies REG21A and REG22A are connected between the input terminals P21A and P22A and the output terminals P21B and P22B, respectively. The input terminals P21A and P22A are connected to the output terminal P2 of the main power supply REG1, and are supplied with the output voltage VOUT1 output from the main power supply REG1. The output terminals P21B and P22B are each connected to a load (not shown). The local power supplies REG21A and REG22A generate output voltages VOUT21 and VOUT22 (drive voltages) from the output voltage VOUT1 supplied from the main power supply REG1, and supply them to the respective loads.

[0016] Since the local power supplies REG21A and REG22A have the same circuit configuration, the configuration of the local power supply REG21A will be described here as a representative. The local power supply REG21A includes a reference voltage source VREF1, an error amplifier AMP1, an output transistor MP1, resistors RD1 and RD2 which are voltage dividing resistors, an overcurrent protection circuit C1, and a transistor MN2.

[0017] A reference voltage VREF1 is input to the inverting input of the error amplifier AMP1, and a divided voltage obtained by dividing the output voltage VOUT21 by resistors RD1 and RD2 is input to the non-inverting input of the error amplifier AMP1. The error amplifier AMP1 outputs an output voltage according to the difference between the reference voltage VREF1 and the divided voltage of the output voltage VOUT21.

[0018] The output transistor MP1 is composed of a P-channel MOSFET. The output transistor MP1 functions as a first transistor and is connected between the output terminal P2 of the main power supply REG1 and a load. To explain in detail, the output transistor MP1 has a source connected to the input terminal P21A, a drain connected to the output terminal P21B, and a gate connected to the output of the error amplifier AMP1. The gate voltage of the output transistor MP1 is controlled by the output voltage of the error amplifier AMP1. The resistors RD1 and RD2 are connected in series between the drain of the output transistor MP1 and the ground. The connection point of the resistors RD1 and RD2 is connected to the non-inverting input of the error amplifier AMP1. In addition, the connection point of the output transistor MP1 and the resistor RD1 is connected to the output terminal P21B.

[0019] According to the above configuration, an output voltage corresponding to the difference between the reference voltage VREF1 and the divided voltage obtained by dividing the output voltage VOUT21 by resistors RD1 and RD2 is output from the error amplifier AMP1. If the output voltage VOUT21 drops, the voltage input to the non-inverting input of the error amplifier AMP1 drops, and the output voltage of the error amplifier AMP1 drops. As a result, the gate voltage of the output transistor MP1 drops and the gate-source voltage of the output transistor MP1 increases. Then, the drain current I1 of the output transistor MP1 increases, and the output voltage VOUT21 rises. In this way, the local power supply REG21A performs negative feedback operation in response to changes in the output voltage VOUT21, thereby keeping the output voltage VOUT21 constant.

[0020] The overcurrent protection circuit C1 is a circuit that prevents the output current IOUT1 from becoming an overcurrent and protects each element from an overcurrent. The overcurrent protection circuit C1 has a transistor MP2, a pull-down resistor RPD1, a transistor MN1, and transistors MP3 and MP4. The transistor MP2 is composed of a P-channel MOSFET. The transistor MP2 functions as a second transistor, and its gate and source are commonly connected to the output transistor MP1, and it is mirror-connected to the output transistor MP1. As a result, a drain current I2 (second current) corresponding to the drain current I1 (first current) of the output transistor MP1 flows through the transistor MP2. The pull-down resistor RPD1 is connected between the drain of the transistor MP2 and ground. The pull-down resistor RPD1 functions as a resistor, and is supplied with the drain current I2 of the transistor MP2.

[0021] The transistor MN1 is composed of an N-channel MOSFET. The gate of the transistor MN1 is connected to the connection point between the drain of the transistor MP2 and the pull-down resistor RPD1. The source of the transistor MN1 is connected to ground. As is clear from the above, the transistor MN1 functions as a fourth transistor, and a voltage generated by the drain current I2 flowing through the pull-down resistor RPD1 is supplied as a gate bias voltage.

[0022] The transistors MP3 and MP4 are composed of P-channel MOSFETs. The drain of the transistor MP3 is connected to the drain of the transistor MN1. The gate and drain of the transistor MP3 are connected to each other, and the source is connected to the input terminal P21A. The gate and source of the transistor MP4 are connected in common to the transistor MP3, and the drain is connected to the gate (control terminal) of the output transistor MP1. That is, the transistors MP3 and MP4 form a second current mirror circuit, and the drain current I4 (fourth current) of the transistor MN1 is folded back to the drain current I5 (fifth current) of the transistor MP4 and supplied to the gate of the output transistor MP1. As described above, the drain currents I2 to I5 are currents according to the drain current I1, and the drain current I1 is currents according to the output current IOUT1 (first output current).

[0023] The overcurrent protection circuit C1 configured as above operates as follows. If the output current IOUT1 increases, that is, if the drain current I1 of the output transistor MP1 increases, the error amplifier AMP1 applies a voltage greater than that in steady state to the gate-source voltage of the output transistor MP1. As described above, the transistor MP2 forms a current mirror circuit with the output transistor MP1, with the gate and source commonly connected. For this reason, when the drain current I1 of the output transistor MP1 is large, the drain current I2 of the transistor MP2 will also necessarily be large.

[0024] Next, the drain current I2 of transistor MP2 flows through pull-down resistor RPD1, and the gate voltage of transistor MN1 rises. When the gate voltage exceeds the threshold, the drain current I4 of transistor MN1 begins to flow. When the drain current I4 of transistor MN1 increases, the drain current I4 of transistor MP3 also increases, and the drain current I5 of transistor MP4, which forms a second current mirror circuit with transistor MP3, also increases. When the drain current I5 of transistor MP4 increases, the gate voltage of the output transistor MP1 is pulled up, so the gate-source voltage of the output transistor MP1 begins to decrease, the drain current I1 decreases, the output current IOUT1 does not become excessive, and the output overcurrent protection is activated.

[0025] The transistor MN2 is composed of an N-channel MOSFET. The transistor MN2 is provided to supply a drain current I3 (signal) corresponding to the output current IOUT1 to an auxiliary power supply REGBK, which will be described later. The transistor MN2 has a gate connected to a connection point between the transistor MP2 and the pull-down resistor RPD1, a source connected to ground, and a drain connected to the output terminal P21C. That is, the transistor MN2 functions as a third transistor, and a voltage generated by the drain current I2 flowing through the pull-down resistor RPD1 is supplied as a gate bias voltage.

[0026] Therefore, when the output current IOUT1 rises, the drain current I2 rises accordingly, and the gate voltage of transistor MN2 rises. When the output current IOUT1 exceeds a predetermined value, the gate voltage of transistor MN2 exceeds a threshold, and the drain current I3 starts to flow through transistor MN2. This drain current I3 is a current according to the drain current I2, i.e., a current according to the output current IOUT1, and is output from the output terminal P21C. In other words, the drain current I3 is a signal that is output only when the output current IOUT1 exceeds a predetermined value.

[0027] The auxiliary power supply REGBK generates an output current IOUT2 ​​(second output current) corresponding to the output current IOUT1 and supplies it to the output terminal P2 of the main power supply REG1. The auxiliary power supply REGBK has transistors MPC1 and MPC2 that form a first current mirror circuit. The transistors MPC1 and MPC2 are configured from P-channel MOSFETs. The gate and drain of the transistor MPC1 are connected to each other, and the drain is connected to the output terminal P21C of the local power supply REG21A via the input terminal P3B. The source of the transistor MPC1 is connected to the input terminal P1 via the input terminal P3A. The gate and source of the transistor MPC2 are commonly connected to the transistor MPC1, and the drain is connected to the output terminal P3C. The output terminal P3C is connected to the output terminal P2.

[0028] According to the above configuration, the drain current I3 of the transistor MN2 is input to the auxiliary power supply REGBK via the output terminal P21C and the input terminal P3B. The drain current I3 is folded back by the transistors MPC1 and MPC2, output from the output terminal P3C as the output current IOUT2, and supplied to the output terminal P2. That is, the output terminal P2 is supplied with currents from both the outputs of the main power supply REG1 and the auxiliary power supply REGBK.

[0029] Assume now that a load resistance (not shown) connected to the output terminal P21B of the local power supply REG21A has changed, and the output current IOUT1 of the local power supply REG21A has increased. As described above, the drain current I3 also increases with the increase in the output current IOUT1. Then, the output current IOUT2 ​​of the auxiliary power supply REGBK also increases with the increase in the drain current I3.

[0030] With the above operation, when the input / output currents are viewed with the output terminal P2 as the reference, the increase (consumption) of the output current IOUT1 of the local power supply REG21A and the increase (supply) of the output current IOUT2 ​​of the auxiliary power supply REGBK cancel each other out in the input / output currents at the output terminal P2. This suppresses fluctuations in the actual output current of the main power supply REG1, reduces fluctuations in the output voltage VOUT1 at the output terminal P2, and enables stable power supply to the local power supplies REG21A and REG22A.

[0031] According to the first embodiment described above, the drain currents I3 (signals) output from the multiple output terminals P21C and P22C are input to a single first current mirror circuit consisting of the transistors MPC1 and MPC2. As a result, when the output current IOUT1 of the output terminal P22B of the local power supply REG22A changes, a current corresponding to the output current IOUT1 is transmitted through the output terminal P22C and the input terminal P3B of the auxiliary power supply REGBK in the same manner as described above, and the output current IOUT2 ​​of the auxiliary power supply REGBK changes. In this way, the output current IOUT2 ​​of the auxiliary power supply REGBK changes in response to the change in the output current IOUT1 of all the local power supplies REG21A and REG22A connected to the output terminal P2. That is, the input / output currents at the output terminal P2 are offset, and the output current fluctuation of the main power supply REG1 is reduced. According to the above configuration, it is not necessary to provide a current mirror circuit for each of the multiple local power supplies REG21A and REG22A, and the configuration of the auxiliary power supply REGBK can be simplified.

[0032] Even if the currents supplied to the local power supplies REG21A and REG22A are increased to the maximum, the main power supply REG1 is compensated for by the auxiliary power supply REGBK, so that the output current of the main power supply REG1 can be adjusted to a smaller value. By changing the element sizes of the transistors MPC1 and MPC2 constituting the first current mirror circuit in the auxiliary power supply REGBK and the transistors MP2, MN1, and MN2 in the local power supply REG21A, the magnitude of the output current IOUT2 ​​of the auxiliary power supply REGBK can be changed. Therefore, the balance between the output current IOUT2 ​​compensated for by the auxiliary power supply REGBK and the output current that can be supplied by the main power supply REG1 can be optimized. However, when the output current IOUT2 ​​(supply) of the auxiliary power supply REGBK becomes a large current value compared to the sum of the output currents IOUT1 (consumption) of the local power supplies REG21A and REG22A, the voltage of the output terminal P2 of the main power supply REGBK increases, and the main power supply REG1 cannot operate as a power supply. That is, the potential difference between the output (terminal P2) and input (terminal P1) of the main power supply REG1 disappears, and the main power supply REG1 cannot perform normal regulation. Therefore, in any operating state, the output current IOUT2 ​​(supply) of the auxiliary power supply REGBK is set to be equal to or less than the sum of the output currents IOUT1 (consumption) of the local power supplies REG21A and REG22A.

[0033] As explained in the conventional circuit example, the main power supply REG1 operates to keep the output voltage VOUT1 constant by internal feedback control. Since a delay occurs in the feedback control, a delay occurs before the output voltage VOUT1 changes due to a fluctuation in the output current IOUT1 and the output voltage VOUT1 returns to its normal value (by feedback control). On the other hand, the auxiliary power supply REGBK receives a current that serves as an input signal internally, and then outputs the current by folding it back using a current mirror circuit, so that it can operate at a higher speed without the intervention of feedback control. Therefore, when the output current IOUT1 of the local power supplies REG21A and REG22A fluctuates, the auxiliary power supply REGBK responds quickly, thereby suppressing the voltage fluctuation at the output terminal P2.

[0034] Moreover, according to the first embodiment, a transistor MN2 is provided to which the voltage generated in the pull-down resistor RPD1 is supplied as a gate bias voltage, and the drain current I3 of the transistor MN2 is input to the auxiliary power supply REGBK. As a result, when the output current IOUT1 increases and exceeds a predetermined value, the gate voltage of the transistor MN2 exceeds the threshold and the drain current I3 begins to flow, so that with a simple configuration using the transistor MN2, the drain current I3 can be output only when the output current IOUT1 exceeds the predetermined value.

[0035] Furthermore, according to the above-described first embodiment, the transistor MP2 and the pull-down resistor RPD1 can be shared by the overcurrent protection circuit C1 and the circuit for outputting the drain current I3, thereby simplifying the configuration of the local power supply REG21A.

[0036] (Second Example) Next, a power supply circuit 1B of a second embodiment will be described with reference to FIG. 2. In FIG. 2, the same parts as those of the power supply circuit 1A shown in FIG. 1 are given the same reference numerals, and detailed description thereof will be omitted. As shown in the figure, the power supply circuit 1B includes a main power supply REG1, a plurality of amplifiers AMP21A and AMP22A as drive circuits, and an auxiliary power supply REGBK2 as a second power supply circuit. In this embodiment, the number of drive circuits is illustrated as two, but the number of drive circuits is not limited to two, and may be one or three or more.

[0037] The main power supply REG1 is the same as that in the first embodiment, and detailed description thereof will be omitted here. The amplifiers AMP21A and AMP22A are provided in place of the local power supplies REG21A and REG22B in the first embodiment. The amplifiers AMP21A and AMP22A are configured from amplifiers having the same circuit configuration. The amplifiers AMP21A and AMP22A are connected between the input terminals P21A and P22A and the output terminals P21B and P22B, respectively. The input terminals P21A and P22A are connected to the output terminal P2 of the main power supply REG1, and are supplied with the output voltage VOUT1 output from the main power supply REG1. The output terminals P21B and P22B are connected to loads (not shown). The amplifiers AMP21A and AMP22A generate output voltages VOUT21 and VOUT22 from the output voltage VOUT1 output from the main power supply REG1, and supply them to the respective loads.

[0038] Since the amplifiers AMP21A and AMP22A have the same circuit configuration, the configuration of the amplifier AMP21A will be described here as a representative example. The amplifier AMP21A includes an amplifier AMP2, transistors Q1 and Q2, and resistors RD1 and RD2.

[0039] The amplifier AMP2 has a non-inverting input connected to the input terminal P21D, and receives an external input voltage VIN21 as input to the non-inverting input. The amplifier AMP2 receives a divided voltage obtained by dividing the output voltage VOUT21 by resistors RD1 and RD2 as input to the inverting input. The amplifier AMP2 outputs an output voltage according to the difference between the input voltage VIN21 and the divided voltage of the output voltage VOUT21.

[0040] The output transistor Q1 is composed of an NPN bipolar transistor. The output transistor Q1 functions as a fifth transistor and is connected between the output terminal P2 of the main power supply REG1 and a load. To explain in detail, the output transistor Q1 has a collector connected to the input terminal P21A, an emitter connected to the output terminal P21B, and a base connected to the output of the amplifier AMP2. The output transistor Q1 has an emitter-follower configuration with the output of the amplifier AMP2 as its input. Therefore, the output terminal P21B outputs an output voltage VOUT21 such that the input signal VIN21 and the divided voltage of the output voltage VOUT21 are equal.

[0041] The transistor Q2 is composed of an NPN bipolar transistor. The transistor Q2 is provided to supply a collector current I7 (signal) corresponding to the output current IOUT1 to the auxiliary power supply REGBK2 described later. The transistor Q2 functions as a sixth transistor and is mirror-connected to the transistor Q1. That is, the emitter and base of the transistor Q2 are commonly connected to the transistor Q1, and a collector current I6 (sixth current) flows through the transistor Q1, that is, a collector current I7 (seventh current) corresponding to the output current IOUT1. The collector of the transistor Q2 is connected to the output terminal P21C.

[0042] The auxiliary power supply REGBK2 generates an output current IOUT2 ​​according to the output current IOUT1 and supplies it to the output terminal P2 of the main power supply REG1. The auxiliary power supply REGBK2 has transistors QC1 and QC2 that form a first current mirror circuit. The transistors QC1 and QC2 are composed of PNP-type bipolar transistors. The base and collector of the transistor QC1 are connected to each other, and the collector is connected to the output terminal P21C of the amplifier AMP21A via the input terminal P3B. The emitter of the transistor QC1 is connected to the input terminal P1 via the input terminal P3A. The base and emitter of the transistor QC2 are commonly connected to the transistor QC1, and the collector is connected to the output terminal P3C. The output terminal P3C is connected to the output terminal P2.

[0043] Next, the operation of the power supply circuit 1B of the second embodiment will be described. Inside the amplifier AMP21A, the base-emitter bias of the output transistor Q1 and the transistor Q2 is commonly applied. Therefore, the collector current I6 of the output transistor Q1, that is, the collector current I7 corresponding to the output current IOUT1 of the amplifier AMP21A, is output from the output terminal P21C. The collector current I7 output from the output terminal P21C is applied to the input terminal P3B of the auxiliary power supply REGBK2, is folded back by the current mirror circuit of the transistors QC1 and QC2 inside the auxiliary power supply REGBK2, and is output as the output current IOUT2 ​​from the output terminal P3C. Since the output terminal P3C of the auxiliary power supply REGBK2 is connected to the output terminal P2 of the main power supply REG1, the output current IOUT2 ​​corresponding to the output current IOUT1 of the amplifiers AMP21A and AMP22A input to the auxiliary power supply REGBK2 is applied to the output terminal P2 of the main power supply REG1. Since an output current is also supplied to the output terminal P2 from the main power supply REG1 that is originally connected, current is supplied to the output terminal P2 from the outputs of both the main power supply REG1 and the auxiliary power supply REGBK2.

[0044] Assume that the signal applied to the input terminal P21D of the amplifier AMP21A changes and the output current IOUT1 of the amplifier AMP21A increases. As described above, the collector current I7 increases with the increase in the output current IOUT1. The output current IOUT2 ​​of the auxiliary power supply REGBK2 also increases with the increase in the collector current I7.

[0045] With the above operation, when the input / output currents are viewed with the output terminal P2 as the reference, the increase (consumption) of the output current IOUT1 of the amplifier AMP21A and the increase (supply) of the output current IOUT2 ​​of the auxiliary power supply REGBK2 cancel each other out in the input / output currents at the output terminal P2. This suppresses fluctuations in the actual output current of the main power supply REG1, and the output voltage VOUT1 at the output terminal P2 fluctuates little, enabling stable power supply to the amplifiers AMP21A and AMP22A.

[0046] According to the second embodiment, similarly to the first embodiment, the collector currents I7 output from the output terminals P21C and P22C are input to a first current mirror circuit consisting of the transistors QC1 and QC2. As a result, when the output current IOUT1 of the amplifier AMP22A changes, a current corresponding to the output current IOUT1 is transmitted through the output terminal P22C and the input terminal P3B of the auxiliary power supply REGBK2 in the same manner as described above, and the output current IOUT2 ​​of the auxiliary power supply REGBK2 changes. In this way, the output current IOUT2 ​​of the auxiliary power supply REGBK2 changes in response to the change in the output current IOUT1 of all the amplifiers AMP21A and AMP22A connected to the output terminal P2. That is, the input / output currents at the output terminal P2 are offset, and the output current fluctuation of the main power supply REG1 is reduced. According to the above configuration, it is not necessary to provide a current mirror circuit for each of the amplifiers AMP21A and AMP22A, and the configuration of the auxiliary power supply REGBK2 can be simplified.

[0047] Also, as in the first embodiment, even if the current supplied to each amplifier AMP21A, AMP22A increases to the maximum, the output current of the main power supply REG1 is compensated for by the auxiliary power supply REGBK2, so that the main power supply REG1 may be configured to correspond to a smaller value of the output current. By changing the element sizes of the transistors QC1, QC2 constituting the first current mirror circuit in the auxiliary power supply REGBK2 and the transistor Q2 in the amplifiers AMP21A and AMP22A, the magnitude of the output current IOUT2 ​​of the auxiliary power supply REGBK2 can be changed. Therefore, the balance between the output current IOUT2 ​​compensated for by the auxiliary power supply REGBK2 and the output current that can be supplied by the main power supply REG1 can be optimized. However, as in the first embodiment, when the output current IOUT2 ​​(supply) of the auxiliary power supply REGBK2 becomes a large current value compared to the sum of the output currents IOUT1 (consumption) of the amplifiers AMP21A and AMP22A, the voltage of the output terminal P2, which is the output of the main power supply REGBK2, rises, and the main power supply REG1 cannot operate as a power supply. That is, the potential difference between the output (terminal P2) and input (terminal P1) of the main power supply REG1 disappears, and the main power supply REG1 cannot perform normal regulation. Therefore, in any operating state, the output current (supply) of the auxiliary power supply REGBK2 is set to be equal to or less than the sum of the output currents (consumption) of the amplifiers AMP21A and AMP22A.

[0048] As explained in the conventional circuit example, the main power supply REG1 operates to keep the output voltage VOUT1 constant by internal feedback control. Since a delay occurs in the feedback control, a delay occurs before the output voltage VOUT1 changes due to a fluctuation in the output current IOUT1 and the output voltage VOUT1 returns to a normal value (by feedback control). On the other hand, the auxiliary power supply REGBK2 receives a current that becomes an input signal internally, and then outputs the current by folding back the current using a current mirror circuit, so that it can operate at a higher speed without the intervention of feedback control. Therefore, when the output current IOUT1 of the amplifiers AMP21A and AMP22A fluctuates, the auxiliary power supply REGBK2 responds quickly, thereby suppressing the voltage fluctuation at the output terminal P2.

[0049] The present invention is not limited to the above-described embodiment, and can be appropriately modified, improved, etc. In addition, the material, shape, size, number, arrangement location, etc. of each component in the above-described embodiment are arbitrary as long as the present invention can be achieved, and are not limited.

[0050] In the first embodiment described above, the main power supply REG1 is connected to the local power supplies REG21A and REG22A having the same configuration, and in the second embodiment, the main power supply REG1 is connected to the amplifiers AMP21A and AMP22B having the same configuration, but this is not limited to this. The main power supply REG1 may be connected to a mixture of the local power supplies REG21A and REG22A and the amplifiers AMP21A and AMP22B. [Explanation of symbols]

[0051] 1A, 1B power supply circuit AMP1 Error amplifier AMP2 Amplifier AMP21A, AMP22A Amplifiers (Driver Circuits) I1 Drain current (first current) I2 Drain current (second current) I3 Drain current (third current, signal) I4 Drain current (fourth current) I5 Drain current (5th current) I6 Collector current (6th current) I7 Collector current (7th current, signal) IOUT1 Output current (first output current) IOUT2 ​​Output current (Second output current) MN1 transistor (fourth transistor) MN2 transistor (third transistor) MP1 Output transistor (first transistor) MP2 transistor (second transistor) MP3, MP4 transistor (second current mirror circuit) MPC1, MPC2 transistors (first current mirror circuit) P1 input terminal P2 output terminal P21A, P22A input terminals P21B, P22B output terminals Q1 Output transistor (fifth transistor) Q2 transistor (sixth transistor) QC1, QC2 transistors (first current mirror circuit) REG1 Main power supply (first power supply circuit) REG21A, REG22A Local power supply (drive circuit) REGBK, REGBK2 Auxiliary power supply (second power supply circuit) RD1, RD2 resistors RPD1 Pull-down resistor (resistor) VREF1 Reference voltage VOUT1 Output voltage VOUT21, VOUT22 Output voltage (drive voltage)

Claims

1. a first power supply circuit having an output terminal from which an output voltage controlled to be constant is output; a drive circuit that outputs a drive voltage generated from the output voltage to a load, the drive circuit outputs a signal corresponding to a first output current to be supplied to the load; a second power supply circuit that receives the signal, outputs a second output current corresponding to the signal, and supplies the second output current to the output terminal of the first power supply circuit; power circuit.

2. 2. The power supply circuit according to claim 1, the second power supply circuit is composed of a first current mirror circuit that outputs the second output current obtained by mirroring an input current; The drive circuit inputs the signal to the first current mirror circuit. power circuit.

3. 3. The power supply circuit according to claim 2, The drive circuit is provided in plurality, a plurality of the signals output from a plurality of the driving circuits are input to one of the first current mirror circuits; power circuit.

4. The power supply circuit according to any one of claims 1 to 3, the drive circuit outputs the signal corresponding to the first output current when the first output current exceeds a predetermined value. power circuit.

5. 5. The power supply circuit according to claim 4, the drive circuit includes a first transistor connected between the output terminal of the first power supply circuit and the load, a second transistor mirror-connected to the first transistor and through which a second current flows corresponding to a first current flowing through the first transistor, a resistor to which the second current flowing through the second transistor is supplied, and a third transistor to which a voltage generated across the resistor is supplied as a bias voltage, and the third current flowing through the third transistor is output as the signal. power circuit.

6. 6. The power supply circuit according to claim 5, a fourth transistor to which a voltage generated across the resistor is supplied as a bias voltage; and a second current mirror circuit that outputs a fifth current corresponding to a fourth current flowing through the fourth transistor, a fifth current output from the second current mirror circuit is supplied to a control terminal of the first transistor; power circuit.

7. The power supply circuit according to any one of claims 1 to 3, the drive circuit has a fifth transistor connected between the output terminal of the first power supply circuit and the load, and a sixth transistor mirror-connected to the fifth transistor and through which a seventh current flows corresponding to a sixth current flowing through the fifth transistor, and the seventh current flowing through the sixth transistor is output as the signal. power circuit.

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