Differential Amplifier Circuit

Abstract

To reduce an offset voltage or a drift voltage in a differential amplifier circuit while maintaining operational amplifier performance.SOLUTION: A differential amplifier circuit 100 includes an operational amplifier 22 for amplifying a voltage difference between output terminals of a first and a second input resistors 211 and 212, a feedback resistor 23 connected to the output terminal of the first input resistor 211, and a base differential amplifier circuit 20 having a first resistor element 24 connected to the output terminal of the second input resistor 212. The differential amplifier circuit 100 further includes a high accuracy operational amplifier 31 having lower offset voltage or drift voltage than that of the operational amplifier 22. The high accuracy operational amplifier 31 has an inverted input terminal (-) to which the output terminal of the first input resistor 211 is connected and an output terminal to which the output terminal of the second input resistor 212 is connected. The high accuracy operational amplifier 31 has a non-inverted input terminal (+) to which a voltage corresponding to a voltage generated at the non-inverted input terminal (+) of the operational amplifier 22, when the differential amplifier circuit has only the base differential amplifier circuit 20, is inputted as a reference signal Vb.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a differential amplifier circuit. [Background technology]

[0002] Patent Document 1 discloses a differential amplifier circuit including an operational amplifier that amplifies the potential difference between the output terminals of a pair of input resistors, a feedback resistor arranged in a path that feeds back from the output terminal of the operational amplifier to one of the input terminals, and a resistive element connected to the other input terminal of the operational amplifier. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-25254 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the above-mentioned general differential amplifier circuit, an error occurs in the output signal of the differential amplifier circuit due to the offset voltage or drift voltage of the operational amplifier. As a countermeasure, even if the operational amplifier is replaced with a high-precision operational amplifier having a smaller offset voltage or drift voltage than the operational amplifier, the offset voltage or drift voltage can be suppressed, but the performance of the differential amplifier circuit, such as the gain bandwidth product and slew rate, may be limited by replacing the operational amplifier with the high-precision operational amplifier.

[0005] The present invention has been made in view of the above-mentioned problems, and has an object to reduce the offset voltage or drift voltage in a differential amplifier circuit while maintaining the performance of an operational amplifier. [Means for solving the problem]

[0006] According to one aspect of the present invention, a differential amplifier circuit includes a basic differential amplifier circuit having first and second input resistors to which two potential signals are respectively input, an operational amplifier that amplifies the potential difference between the output terminals of the first and second input resistors, a feedback resistor connected to the output terminal of the first input resistor, and a first resistive element connected to the output terminal of the second input resistor. The differential amplifier circuit further includes a high-precision operational amplifier having an inverting input terminal connected to the output terminal of the first input resistor and an output terminal connected to the output terminal of the second input resistor, and having a smaller offset voltage or drift voltage than the operational amplifier. A potential equivalent to the potential generated at the non-inverting input terminal of the operational amplifier in a state where only the basic differential amplifier circuit is present is input to the non-inverting input terminal of the high-precision operational amplifier as a reference signal. Effect of the Invention

[0007] According to this aspect, a difference corresponding to the offset voltage or drift voltage of the op-amp is obtained at the output terminal of the high-precision op-amp by inputting a potential corresponding to the potential generated at the non-inverting input terminal of the op-amp in a state where only the basic differential amplifier circuit is present, to the non-inverting input terminal of the high-precision op-amp. Negative feedback is applied from the inverting input terminal of the op-amp to the non-inverting input terminal of the op-amp via the high-precision op-amp in accordance with this difference, so that the potential difference between the input terminals of the op-amp is reduced. Therefore, it is possible to reduce the offset voltage or drift voltage while maintaining the performance of the op-amp. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a circuit diagram showing a configuration of a differential amplifier circuit according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a circuit diagram showing a detailed configuration of a reference signal generating unit that constitutes the differential amplifier circuit in the first embodiment. [Diagram 3] FIG. 3 is a circuit diagram showing a configuration of a differential amplifier circuit according to the second embodiment. [Figure 4]FIG. 4 is a circuit diagram showing a detailed configuration of a high-frequency current supply unit and a reference signal generating unit that configure the differential amplifier circuit in the second embodiment. [Figure 5A] FIG. 5A is a diagram for explaining the operation of the differential amplifier circuit in the low frequency range in the second embodiment. [Figure 5B] FIG. 5B is a diagram for explaining the operation of the differential amplifier circuit in the high frequency range in the second embodiment. [Figure 6] FIG. 6 is a diagram showing setting conditions in a simulation analysis of the differential amplifier circuit according to the second embodiment. [Figure 7] FIG. 7 is a diagram illustrating an example of frequency characteristics regarding the offset voltage of the differential amplifier circuit according to the second embodiment. [Figure 8A] FIG. 8A is a diagram illustrating an example of frequency characteristics regarding output noise of the differential amplifier circuit according to the second embodiment. [Figure 8B] FIG. 8B is a diagram showing an example of frequency characteristics regarding output noise of only the basic differential amplifier circuit as a comparison target. [Figure 9] FIG. 9 is a diagram illustrating an example of frequency characteristics relating to the common-mode signal rejection ratio of the differential amplifier circuit according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0010] First embodiment FIG. 1 is a circuit diagram showing a configuration of a differential amplifier circuit 100 according to the first embodiment.

[0011] The differential amplifier circuit 100 is an operational amplifier circuit that amplifies the difference between two potential signals, and includes a pair of input terminals 11 and 12, a basic differential amplifier circuit 20, an offset voltage suppression circuit 30, a reference signal generation section 40, and an output terminal 50.

[0012] A first and a second potential signal V1, V2 are respectively input from the outside to a pair of input terminals 11, 12. Specifically, the first input terminal 11 is supplied with the first potential signal V1, and the second input terminal 12 is supplied with the second potential signal V2.

[0013] The basic differential amplifier circuit 20 includes a pair of input resistors 21, an operational amplifier 22, a feedback resistor 23, and a first resistive element 24.

[0014] The pair of input resistors 21 are two resistance elements to which two potential signals V1 and V2 are respectively input. The pair of input resistors 21 is composed of a first input resistor 211 and a second input resistor 212. Hereinafter, the first input resistor 211 and the second input resistor 212 will be simply referred to as the input resistor 211 and the input resistor 212.

[0015] In this embodiment, the input resistors 211 and 212 have the same resistance value R1. As an example, the resistance value R1 is set to 2 [kΩ]. An input end of the input resistor 211 is connected to the first input terminal 11, and an input end of the input resistor 212 is connected to the second input terminal 12.

[0016] The operational amplifier 22 is an amplifier that amplifies the potential difference between an output terminal which is the other end of the first input resistor 211 and an output terminal which is the other end of the second input resistor 212. The operational amplifier 22 has an inverting input terminal (-) to which a potential generated at the output terminal of the input resistor 211 is input, a non-inverting input terminal (+) to which a potential generated at the output terminal of the input resistor 212 is input, and an output terminal that outputs a differential signal based on the potential difference between the inverting input terminal (-) and the non-inverting input terminal (+).

[0017] The operational amplifier 22 in this embodiment is configured by a general operational amplifier compatible with DC or AC signals. Alternatively, the operational amplifier 22 may be configured by a high-speed operational amplifier having a gain band width product of several MHz or more. The gain band width product of the operational amplifier 22 is an index indicating the upper limit of a frequency band in which the gain fluctuation is small.

[0018] The feedback resistor 23 is a resistive element that is disposed in a current path that is fed back from the output terminal of the operational amplifier 22 to the inverting input terminal (-), and is connected to the output end of the input resistor 211. The feedback resistor 23 is connected between the output terminal and the inverting input terminal (-) of the operational amplifier 22, and the amplification factor of the basic differential amplifier circuit 20 changes by adjusting the resistance value R2 of the feedback resistor 23.

[0019] The resistance value R2 of the feedback resistor 23 may be the same as or different from the resistance value R1 of the input resistors 211 and 212. In this embodiment, the resistance value R2 of the feedback resistor 23 is set to the same value as the resistance value R1 of the input resistors 211 and 212, for example, 2 [kΩ].

[0020] The first resistive element 24 is a resistive element connected to the output terminal of the input resistor 212, and is connected to a reference potential 9 that is set to a potential that serves as a reference for the basic differential amplifier circuit 20. The amplification factor of the basic differential amplifier circuit 20 changes by adjusting the resistance value of the first resistive element 24.

[0021] The resistance value of the first resistive element 24 is set to the same value as that of the feedback resistor 23. In this embodiment, the first resistive element 24 is set to a resistance value R2 equivalent to that of the feedback resistor 23, and the reference potential 9 is set to 0 [V], which is the ground potential.

[0022] With this configuration, in the basic differential amplifier circuit 20, the operational amplifier 22 amplifies the potential difference obtained by subtracting the second potential signal V2 from the first potential signal V1 by a magnification ratio indicating the value obtained by dividing the resistance value R2 by the resistance value R1, and outputs the amplified differential signal to the output terminal 50.

[0023] Regarding the connection configuration of the basic differential amplifier circuit 20, a junction between the output end of the input resistor 211 and one end of the feedback resistor 23 is connected to the inverting input terminal (-) of the operational amplifier 22, and a junction between the output terminal of the operational amplifier 22 and the other end of the feedback resistor 23 is connected to the output terminal 50 of the differential amplifier circuit 100. In addition, a junction between the output end of the input resistor 212 and one end of the first resistive element 24 is connected to the non-inverting input terminal (+) of the operational amplifier 22, and the other end of the first resistive element 24 is connected to the reference potential 9.

[0024] Next, the configuration of the offset voltage suppression circuit 30 connected to the basic differential amplifier circuit 20 will be described.

[0025] The offset voltage suppression circuit 30 is an adjustment circuit for reducing and correcting the offset voltage or drift voltage of the operational amplifier 22 that constitutes the basic differential amplifier circuit 20. The offset voltage suppression circuit 30 in this embodiment includes a high-precision operational amplifier 31 and a second resistor element 32.

[0026] The high-precision operational amplifier 31 is an amplifier having a smaller offset voltage than the basic differential amplifier circuit 20. In this embodiment, the amplifiers having a smaller offset voltage include an amplifier having a smaller offset voltage than the operational amplifier 22 and an amplifier having a smaller drift voltage than the operational amplifier 22.

[0027] Examples of the high-precision operational amplifier 31 include a low offset amplifier, a zero drift amplifier, and a low drift amplifier. The zero drift amplifier has a general circuit configuration that employs, for example, an auto-zero system, a chopper system, or a combination of these.

[0028] The gain-bandwidth product of the high-precision operational amplifier 31 having the above-described configuration is likely to be narrower than the gain-bandwidth product of the operational amplifier 22. In other words, the operating frequency range of the high-precision operational amplifier 31 is likely to be narrower than the operating frequency range of the operational amplifier 22.

[0029] The high-precision operational amplifier 31 is disposed so that negative feedback is applied from the output end of the input resistor 212 to the output end of the input resistor 211 via the two input terminals of the operational amplifier 22. In other words, the high-precision operational amplifier 31 is disposed so that it amplifies the voltage at the output end of the input resistor 211 and applies the voltage to the output end of the input resistor 212.

[0030] As a result, the high-precision operational amplifier 31 feeds back the potential generated at the inverting input terminal (-) of the operational amplifier 22, and applies an adjustment signal to the output terminal of the second resistance element 32 to reduce the difference between the fed-back potential and the reference signal Vb.

[0031] In this embodiment, the high-precision operational amplifier 31 has a non-inverting input terminal (+) to which a reference signal Vb is input, an inverting input terminal (-) to which the potential generated at the junction of the input resistor 211 and the feedback resistor 23 is input, and an output terminal for outputting the above-mentioned adjustment signal.

[0032] A potential equivalent to the potential generated at the non-inverting input terminal (+) of the operational amplifier 31 in a state in which only the basic differential amplifier circuit 20 is present is input as a reference signal Vb to the non-inverting input terminal (+) of the high-precision operational amplifier 31. The state in which only the basic differential amplifier circuit 20 is present refers to a state (circuit configuration) in which the offset voltage suppression circuit 30 is removed from the differential amplifier circuit 100.

[0033] In this way, the reference signal Vb input to the non-inverting input terminal (+) of the high-precision operational amplifier 31 is generated based on the potential appearing at the non-inverting input terminal (+) of the operational amplifier 22 when only the basic differential amplifier circuit 20 is present.

[0034] Here, a detailed description will be given of the magnitude of the reference signal Vb required to reduce the input offset voltage of the operational amplifier 22 using the high-precision operational amplifier 31. The input offset voltage is the voltage difference between the non-inverting input terminal (+) and the inverting input terminal (-) when the output voltage of the operational amplifier 22 becomes 0V.

[0035] First, the output potential V out can be expressed by the following equation (1).

[0036]

number

[0037] Here, R1 is the resistance value of the pair of input resistors 21, and R2 is the resistance value of the feedback resistor 23 and the first resistive element 24. V1 is the potential generated at the first input terminal 11, V2 is the potential generated at the first input terminal 11, and V off is the input offset voltage of the operational amplifier 22.

[0038] At this time, the potential V - can be expressed by the following equation (2).

[0039]

number

[0040] As shown in the above equation (2), the potential V - is the input offset voltage V off In addition, the potential V of the first term appears at the non-inverting input terminal (+) of the operational amplifier 22. + Similarly, the potential fed back from the inverting input terminal (-) of the operational amplifier 22 to the inverting input terminal (-) of the high-precision operational amplifier 31 is also the input offset voltage V off The potential V that appears at the non-inverting input terminal (+) of the operational amplifier 22 + are superimposed.

[0041] Therefore, a high-precision operational amplifier 31 is used to calculate the input offset voltage V off To reduce this, the potential V that is generated at the non-inverting input terminal (+) of the operational amplifier 22 from the potential fed back to the high-precision operational amplifier 31 is+ It is preferable to remove

[0042] Therefore, in this embodiment, the potential V generated at the non-inverting input terminal (+) of the operational amplifier 22 from the feedback potential is + In order to remove this, a reference signal Vb indicating a potential value obtained by the following equation (3) is input to the non-inverting input terminal (+) of the high-precision operational amplifier 31.

[0043]

number

[0044] By setting the reference signal Vb in this manner, the input offset voltage V off It is possible to apply a potential corresponding to

[0045] The reference signal Vb is generated by using a high-precision operational amplifier 31 to obtain the input offset voltage V off Therefore, the input offset voltage V of the operational amplifier 22 should be small. off For example, the input offset voltage V of the operational amplifier 22 may be deviated from the potential value shown in the above formula (3) within a range where V is small. off is sufficiently larger than the potential value shown in the above formula (3), the reference signal Vb may be made to approach 0 [V] from the potential value shown in the above formula (3).

[0046] The second resistive element 32 is connected between the output terminal of the high-precision operational amplifier 31 and the output end of the input resistor 212. In this manner, the second resistive element 32 is disposed between the output terminal of the high-precision operational amplifier 31 and the output end of the second input resistor 212. The second resistive element 32 is used, for example, to adjust the sensitivity of the negative feedback control by the high-precision operational amplifier 31. The second resistive element 32 may also be used to suppress oscillation of the high-precision operational amplifier 31.

[0047] The resistance value R3 of the second resistive element 32 is determined so that the potential applied to the non-inverting terminal (+) of the operational amplifier 22 by the output signal of the high-precision operational amplifier 31 does not become too large compared with the potential generated at the junction of the input resistor 212 and the first resistive element 24 by the second potential signal V2.

[0048] The resistance value R3 of the second resistive element 32 may be the same as or different from the resistance value R1 of the input resistors 211 and 212 and the resistance value R2 of the feedback resistor 23 and the first resistive element 24. In this embodiment, the resistance value R3 of the second resistive element 32 is set to the same value as the resistance values ​​R1 and R2, for example, 2 [kΩ].

[0049] In this embodiment, each of the pair of input resistors 21, the feedback resistor 23, the first resistive element 24, and the second resistive element 32 is realized by one resistor, but may be realized by a plurality of resistors.

[0050] Next, the connection configuration in the offset voltage suppression circuit 30 will be described.

[0051] An inverting input terminal (-) of the high-precision operational amplifier 31 is connected to a junction between the input resistor 211 and the feedback resistor 23 and is also connected to an inverting input terminal (-) of the operational amplifier 22, and an output terminal of the high-precision operational amplifier 31 is connected to one end of the second resistive element 32. The other end of the second resistive element 32 is connected to a junction between the input resistor 212 and the first resistive element 24 and is also connected to a non-inverting input terminal (+) of the operational amplifier 22. The non-inverting input terminal (+) of the high-precision operational amplifier 31 is connected to a reference signal generating unit 40.

[0052] The reference signal generating unit 40 generates a reference signal Vb and supplies it to the non-inverting input terminal (+) of the high-precision operational amplifier 31. The reference signal generating unit 40 may be realized, for example, by an external power supply, or may be realized by a circuit that generates the reference signal Vb based on the second potential signal V2 input to the input resistor 212.

[0053] Next, the output potential V out This article explains:

[0054] First, in the differential amplifier circuit 100, the following equations (4) and (5) are derived from Kirchhoff's law. LA can be expressed as the following equation (6), and the potential V - can be expressed as the following equation (7).

[0055]

number

[0056] In the above equation (6), A is the open loop gain of the high-precision operational amplifier 31, and V L+ is the potential value generated at the non-inverting input terminal (+) of the high-precision operational amplifier 31, and V L+ is the potential value generated at the inverting input terminal (-) of the high-precision operational amplifier 31. Here, V L+ is the reference signal Vb shown in the above equation (3).

[0057] Next, the above equation (4) is applied to the inverting input terminal (-) of the operational amplifier 22 to generate a potential V - By solving the above equation (5), the following equation (8) is derived, and the above equation (5) is expressed as the potential V + By solving this, the following equation (9) is derived.

[0058]

number

[0059] Then, by substituting the above equation (7) into the left side of equation (9), the adjustment signal V LA By substituting the above equation (6) into, the following equation (10) is derived.

[0060]

number

[0061] Next, equation (10) is applied to the potential V - By solving, the following equation (11) is derived.

[0062]

number

[0063] Here, the equation obtained by substituting the above equation (8) into the right-hand side of equation (11) is the output potential V out By solving, the following equation (12) is derived.

[0064]

number

[0065] X, Y, and Z shown in formula (12) are respectively as shown in the following formula (13).

number

[0066] Here, if the open loop gain A of the high-precision operational amplifier 31 is sufficiently large, the condition of the following equation (14) is satisfied, so that the output potential V out In this case, the input offset voltage becomes negligibly small, as shown in the following equation (15): Therefore, it is possible to realize a differential amplifier circuit 100 that has no input offset voltage.

[0067]

number

number

[0068] In this manner, by adjusting the resistance value R1 of the pair of input resistors 21, the resistance value R2 of the feedback resistor 23 and the first resistive element 24, and the resistance value R3 of the second resistive element 32 so that the condition of the above equation (14) is satisfied, the offset voltage of the operational amplifier 22 can be suppressed.

[0069] Next, an example of the configuration of the reference signal generating section 40 will be described with reference to FIG.

[0070] 2 is a circuit diagram showing a detailed configuration of the reference signal generating unit 40 in this embodiment. The reference signal generating unit 40 in this embodiment is a voltage dividing circuit 40A including a fourth resistive element 41 and a fifth resistive element 42 connected in series to each other.

[0071] In the voltage divider circuit 40A, an input terminal 401 is connected to the input end of the input resistor 212, and an input terminal 402 is connected to the reference potential 9. Then, an output terminal 403 is connected to the non-inverting input terminal (+) of the high-precision operational amplifier 31.

[0072] In this embodiment, the fourth resistor element 41 is a first resistor having a resistance value R1 equivalent to the input resistor 212, and the fifth resistor element 42 is a second resistor having a resistance value R2 equivalent to the first resistor element 24. That is, the resistance values ​​of the fourth resistor element 41 and the fifth resistor element 42 are determined so that the voltage division ratio of the fifth resistor element 42 to the fourth resistor element 41 is equivalent to the voltage division ratio (R2 / R1) of the first resistor element 24 to the input resistor 212. As a result, the reference signal Vb shown in the above formula (3) is supplied to the non-inverting input terminal (+) of the high-precision operational amplifier 31.

[0073] Note that the fourth resistor element 41 and the fifth resistor element 42 are not limited to having the above-mentioned resistance value R1 and resistance value R2, respectively, as long as the potential of the non-inverting input terminal (+) of the high-precision operational amplifier 31 becomes the reference signal Vb. For example, the resistance values ​​of the fourth resistor element 41 and the fifth resistor element 42 may be different from the resistance values ​​R1, R2, respectively, as long as the voltage division ratio of the fifth resistor element 42 to the fourth resistor element 41 is equivalent to the voltage division ratio of the first resistor element 24 to the input resistor 212.

[0074] One end of the fourth resistor element 41 is connected to the input end of the input resistor 212, the other end of the fourth resistor element 41 is connected to one end of the fifth resistor element 42, and the other end of the fifth resistor element 42 is connected to the reference potential 9. Then, the non-inverting input terminal (+) of the high-precision operational amplifier 31 is connected to a node between the other end of the fourth resistor element 41 and one end of the fifth resistor element 42.

[0075] In this manner, the reference signal generating unit 40 generates the reference signal Vb by dividing the second potential signal V2 input to the input resistor 212 using the fourth resistor element 41 and the fifth resistor element 42 corresponding to the input resistor 212 and the first resistor element 24, respectively. This eliminates the need to provide an external power supply for generating the reference signal Vb in the differential amplifier circuit 100.

[0076] In addition, by using the fourth resistive element 41 and the fifth resistive element 42 corresponding to the input resistor 212 and the first resistive element 24, and the second potential signal V2, the reference signal Vb satisfying the above formula (3) is generated with high accuracy, so that the offset voltage of the operational amplifier 22 can be reliably reduced.

[0077] In addition, in formula (14), R3=0 may be used. Therefore, in this embodiment, the second resistive element 32 may not be provided. In addition, in this embodiment, it is only necessary that the high-precision operational amplifier 31 applies negative feedback between the input terminals of the operational amplifier 22. For example, a circuit element may be inserted in the negative feedback loop of the high-precision operational amplifier 31.

[0078] Next, the effects of the first embodiment will be described.

[0079] The differential amplifier circuit 100 in this embodiment includes a basic differential amplifier circuit 20 having first and second input resistors 211, 212 to which two potential signals V1, V2 are respectively input, and an operational amplifier 22 that amplifies the potential difference between the output terminals of the first and second input resistors 211, 212. The basic differential amplifier circuit 20 further includes a feedback resistor 23 connected to the output terminal of the first input resistor 211, and a first resistive element 24 connected to the output terminal of the second input resistor 212.

[0080] Furthermore, the differential amplifier circuit 100 includes a high-precision operational amplifier 31 having a smaller offset voltage or drift voltage than the operational amplifier 22, and the output terminal of the first input resistor 211 is directly or indirectly connected to the inverting input terminal (-) of the high-precision operational amplifier 31, and the output terminal of the second input resistor 212 is directly or indirectly connected to the output terminal of the high-precision operational amplifier 31.

[0081] A potential equivalent to the potential generated at the non-inverting input terminal (+) of the operational amplifier 22 in a state in which only the basic differential amplifier circuit 20 is present is input to the non-inverting input terminal (+) of the high-precision operational amplifier 31 as the reference signal Vb.

[0082] According to this configuration, the high-precision operational amplifier 31 is disposed so that negative feedback is applied from the inverting input terminal (-) of the operational amplifier 22 to the non-inverting input terminal (+) of the operational amplifier 22 via the high-precision operational amplifier 31 itself. The reference signal Vb input to the non-inverting input terminal (+) of the high-precision operational amplifier 31 is generated based on the potential appearing at the non-inverting input terminal (+) of the operational amplifier 22 in a state in which only the basic differential amplifier circuit 20 is present. Therefore, the high-precision operational amplifier 31 receives the potential V fed back from the inverting input terminal (-) of the operational amplifier 22. - By subtracting the reference signal Vb to obtain the difference, the component equivalent to the offset voltage or drift voltage of the operational amplifier 22 can be extracted.

[0083] Therefore, the high-precision operational amplifier 31 operates to provide negative feedback to the non-inverting input terminal (+) of the operational amplifier 22 via the inverting input terminal (-) of the operational amplifier 22 and the inverting input terminal (-) of the high-precision operational amplifier 31 according to the extracted difference. This reduces the potential difference between the input terminals of the operational amplifier 22, making it possible to reduce the offset voltage or drift voltage of the operational amplifier 22. Therefore, it is possible to reduce the input offset voltage or drift voltage of the operational amplifier 22 while maintaining the performance of the operational amplifier 22.

[0084] In addition, in the differential amplifier circuit 100 of this embodiment, a second resistive element 32 is disposed between the output terminal of the high-precision operational amplifier 31 and the output end of the second input resistor 212. This makes it possible to appropriately adjust the sensitivity of the negative feedback control of the high-precision operational amplifier 31. Therefore, for example, oscillation of the high-precision operational amplifier 31 can be suppressed.

[0085] In addition, the second resistor element 32 in this embodiment is connected between the output terminal of the high-precision operational amplifier 31 and the output terminal of the second input resistor 212. The high-precision operational amplifier 31 detects the potential V - The feedback potential V - and the reference signal Vb, and outputs an adjustment signal to the second resistance element 32.

[0086] Moreover, the differential amplifier circuit 100 in this embodiment includes a fourth resistor element 41 and a fifth resistor element 42. One end of the fourth resistor element 41 is connected to the input end of the input resistor 212, and the other end of the fifth resistor element 42 is connected to the non-inverting input terminal (+) of the high-precision operational amplifier 31. One end of the fifth resistor element 42 is connected to the other end of the fourth resistor element 41, and the other end of the fifth resistor element 42 is connected to the reference potential 9.

[0087] At this time, the resistance values ​​of the fourth resistor element 41 and the fifth resistor element 42 are determined so that the voltage division ratio of the fifth resistor element 42 to the fourth resistor element 41 is equivalent to the voltage division ratio of the first resistor element 24 to the input resistor 212.

[0088] According to this configuration, the reference signal Vb shown in the above formula (3) is supplied from the junction of the fourth resistor element 41 and the fifth resistor element 42 to the non-inverting input terminal (+) of the high-precision operational amplifier 31. This makes it possible to reliably extract a potential difference equivalent to the input offset voltage of the operational amplifier 22 in the high-precision operational amplifier 31. In addition, since there is no need to prepare an external power supply, the reference signal Vb can be generated with a simple configuration.

[0089] In this way, in the differential amplifier circuit 100, by arranging the fourth resistor element 41 and the fifth resistor element 42 corresponding to the input resistor 212 and the first resistor element 24, respectively, it is possible to simultaneously achieve two contradictory effects, namely, high accuracy of the reference signal Vb and simplification of the circuit configuration.

[0090] In addition, the reference signal Vb in this embodiment is determined by the above formula (3). As a result, in the high-precision operational amplifier 31, the potential V - By subtracting the reference signal Vb from the input offset voltage of the operational amplifier 22, the input offset voltage of the operational amplifier 22 can be accurately extracted and applied to the non-inverting terminal (+) of the operational amplifier 22. Therefore, the offset voltage of the operational amplifier 22 can be reduced with high precision.

[0091] Second Embodiment According to the above equations (12) to (14), the high-precision operational amplifier 31 in the first embodiment is intended to be used in a frequency range where the open-loop gain is high. However, the upper limit of the effective frequency band of the high-precision operational amplifier 31 is lower than the gain-bandwidth product of the operational amplifier 22.

[0092] As a result, when two potential signals V1, V2 having frequencies higher than the upper limit of the effective frequency band of the high-precision operational amplifier 31 are input to the differential amplifier circuit 100, the output noise contained in the output signal of the high-precision operational amplifier 31 becomes large.

[0093] Therefore, an embodiment in which a circuit configuration is added to suppress the influence of the output noise that increases in the high-precision operational amplifier 31 in a frequency band higher than the upper limit of the effective frequency band of the high-precision operational amplifier 31 will be described with reference to FIG.

[0094] In the following description, a frequency band higher than the upper limit of the effective frequency band of the high-precision operational amplifier 31 is referred to as a high-frequency region, and a frequency band lower than this high-frequency region is referred to as a low-frequency region.

[0095] FIG. 3 is a circuit diagram showing a configuration of a differential amplifier circuit 101 according to the second embodiment.

[0096] The differential amplifier circuit 101 includes a third resistive element 33 and a high-frequency current conducting unit 34 in addition to the components of the differential amplifier circuit 100 shown in FIG.

[0097] In this embodiment, the configuration of the differential amplifier circuit 101, other than the high-frequency current supply unit 34, is basically the same as that of the differential amplifier circuit 100. Therefore, in the following, the same components are denoted by the same reference numerals, and duplicated explanations will be omitted.

[0098] In this embodiment, the operational amplifier 22 is a high-speed operational amplifier that can operate in a high-frequency range. For example, the gain-bandwidth product of the high-speed operational amplifier is about 100 [MHz].

[0099] The third resistive element 33 and the high frequency current supplying section 34 have the function of supplying a part of the adjustment signal, which is the output of the high precision operational amplifier 31, to the inverting input terminal (−) of the operational amplifier 22 in the high frequency range.

[0100] In this embodiment, the third resistive element 33 is set to a resistance value equal to the resistance value R3 of the second resistive element 32 so that the adjustment signal from the high-precision operational amplifier 31 is equally distributed to both the inverting input terminal (-) and the non-inverting input terminal (+) of the operational amplifier 22.

[0101] One end of the third resistive element 33 is connected to the output end of the input resistor 211, the inverting input terminal (-) of the operational amplifier 22, and one end of the feedback resistor 23. In this embodiment, the third resistive element 33 is realized by one resistor, but it may be realized by multiple resistors. When the third resistive element 33 is realized by multiple resistors, it is preferable that the second resistive element 32 has the same configuration. This makes it possible to precisely halve the adjustment signal from the high-precision operational amplifier 31.

[0102] The high frequency current supplying unit 34 constitutes current supplying means for supplying current between the output terminal and the inverting input terminal (-) of the high precision operational amplifier 31 in response to an increase (rise) in the frequency of the first or second potential signal V1, V2. The high frequency current supplying unit 34 is constituted by, for example, an element or a switch circuit that passes a high frequency signal.

[0103] As an example, the high-frequency current supplying unit 34 includes a switch circuit that switches between a conductive state and a non-conductive state between the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31 depending on whether the frequency of the first or second potential signal V1, V2 is higher than a predetermined threshold value. Note that the predetermined threshold value is determined in advance based on the upper limit value of the gain-bandwidth product of the high-precision operational amplifier 31, and is set to, for example, 100 [Hz].

[0104] In this example, the high frequency energizer 34 receives a control signal indicating whether the frequency of the first or second potential signal V1, V2 is equal to or lower than a predetermined threshold value. This control signal may be generated by an input operation by the user, or the high frequency energizer 34 may obtain an output signal indicating the frequency of the potential signals V1, V2 from a frequency analysis sensor (not shown) and generate the control signal according to the output signal.

[0105] When the high-frequency current supplying unit 34 receives a control signal indicating that the frequency of the first or second potential signal V1, V2 is equal to or lower than a predetermined threshold, it controls the switch circuit to bring the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31 into a non-conductive state. This makes the open-loop gain of the high-precision operational amplifier 31 sufficiently large, thereby making it possible to reduce the offset voltage of the operational amplifier 22.

[0106] On the other hand, when the high-frequency current supplying unit 34 receives a control signal indicating that the frequency is higher than a predetermined threshold, it controls the switch circuit to establish a conductive state between the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31. As a result, the high-precision operational amplifier 31 functions as a voltage follower circuit operating with unity gain, and the adjustment signal output from the high-precision operational amplifier 31 is equally distributed to both the second resistance element 32 and the third resistance element 33.

[0107] Therefore, the inverting input terminal (-) and the non-inverting input terminal (+) of the operational amplifier 22 receive, as in-phase signals, signals obtained by equally dividing the adjustment signal from the high-precision operational amplifier 31. Therefore, the in-phase signals are cancelled out in the operational amplifier 22.

[0108] In this way, the noise that increases in the high-precision operational amplifier 31 due to inputting the first potential signal V1 having a frequency higher than the upper limit of the effective frequency band of the high-precision amplifier 31 to the high-precision operational amplifier 31 is removed in the operational amplifier 22.

[0109] Next, a specific configuration example of the differential amplifier circuit 101 will be described with reference to FIG.

[0110] Fig. 4 is a circuit diagram showing a detailed configuration of the differential amplifier circuit 101 in this embodiment. In Fig. 4, a capacitor 34A is shown as the high-frequency current supply unit 34, and a voltage divider circuit 40B is shown as the reference signal generating unit 40. Since the other configuration is the same as that of the differential amplifier circuit 101 shown in Fig. 3, the configurations of the capacitor 34A and the voltage divider circuit 40B will be mainly described here.

[0111] The capacitor 34A is connected between the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31. The capacitor 34A has a characteristic that as the frequency of the first potential signal V1 increases, the impedance of the capacitor 34A itself decreases, making it easier for electricity to pass through.

[0112] One end of capacitor 34A is connected to the other end of the resistance element 33 and the inverting input terminal (-) of the high-precision operational amplifier 31, and the other end of capacitor 34A is connected to one end of the second resistance element 32 and the output terminal of the high-precision operational amplifier 31.

[0113] In the present embodiment, the impedance of the capacitor 34A is high below the upper limit of the effective frequency band of the high-precision operational amplifier 31, and therefore an insulating state is established between the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31. The upper limit of the effective frequency band of the high-precision operational amplifier 31 is, for example, the frequency at which the open loop gain of the high-precision operational amplifier 31 is halved from its maximum value.

[0114] On the other hand, in the high frequency region higher than the upper limit of the effective frequency band of the high precision operational amplifier 31, the impedance of the capacitor 34A decreases, so that current flows between the output terminal and the inverting input terminal (-) of the high precision operational amplifier 31.

[0115] Therefore, the capacitance C of the capacitor 34A is determined so that the impedance of the capacitor 34A decreases as the frequency of the AC signal input to the capacitor 34A increases from near the upper limit of the effective frequency band of the high-precision operational amplifier 31. For example, the capacitance C of the capacitor 34A is set to 100 nF.

[0116] In this manner, by disposing the capacitor 34A in the feedback path connecting the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31, the feedback path can be transitioned from an insulated state to a conductive state in response to an increase in the frequency of the first potential signal V1.

[0117] Next, the voltage dividing circuit 40B that functions as the reference signal generating section 40 will be described.

[0118] 2, the voltage dividing circuit 40B includes a resistance circuit 43 interposed between the input terminal of the input resistor 211 and the reference potential 9. The resistance circuit 43 is formed of one or more resistance elements.

[0119] The resistance circuit 43 has an equal resistance value to the fourth resistance element 41 and the fifth resistance element 42 connected in series with each other. Specifically, the resistance value of the resistance circuit 43 is set to a value (R1+R2) obtained by adding the resistance value R1 of the fourth resistance element 41 and the resistance value R2 of the fifth resistance element 42.

[0120] As a result, the sum of the resistance values ​​of the resistor circuit 43, the input resistor 211, and the feedback resistor 23 is equal to the sum of the resistance values ​​of the fourth resistor element 41, the fifth resistor element 42, the input resistor 212, and the first resistor element 24. In other words, the magnitude of the load resistance connected to the first input terminal 11 is equal to the magnitude of the load resistance connected to the second input terminal 12.

[0121] Therefore, the phase of the first current signal flowing from the first input terminal 11 to the inverting input terminal (-) of the operational amplifier 22 is more likely to coincide with the phase of the second current signal flowing from the second input terminal 12 to the non-inverting input terminal (+) of the operational amplifier 22. Therefore, the signal delay of the second current signal with respect to the first current signal is smaller than that of the voltage dividing circuit 40A shown in Fig. 2, so that the output error of the operational amplifier 22 caused by the signal delay can be reduced.

[0122] The resistance circuit 43 in this embodiment is composed of a resistance element 431 and a resistance element 432 that are connected in series to each other. Specifically, one end of the resistance element 431 is connected to the input end of the input resistor 211, and the other end of the resistance element 431 is connected to one end of the resistance element 432. The other end of the resistance element 432 is connected to the reference potential 9.

[0123] The resistor element 431 has the same resistance value as the fourth resistor element 41, and is made of the same components as the fourth resistor element 41. The resistor element 432 has the same resistance value as the fifth resistor element 42, and is made of the same components as the fifth resistor element 42.

[0124] In this way, by configuring the resistance circuit 43 to be symmetrical with respect to the fourth resistance element 41 and the fifth resistance element 42 constituting the voltage-dividing circuit 40A, the change in the signal characteristics of the second current signal caused by the provision of the voltage-dividing circuit 40A can also be imparted to the first current signal. Therefore, it is possible to reduce the output error of the operational amplifier 22 caused by the provision of the voltage-dividing circuit 40A, as compared with the case where one resistance element having the same resistance value is simply provided for the fourth resistance element 41 and the fifth resistance element 42.

[0125] Next, the operation of the differential amplifier circuit 101 in this embodiment will be described with reference to FIGS. 5A and 5B.

[0126] Fig. 5A is a diagram for explaining the operation of the differential amplifier circuit 101 when the frequency of the first potential signal V1 is equal to or lower than the upper limit of the effective frequency band of the high-precision operational amplifier 31. Fig. 5B is a diagram for explaining the operation of the differential amplifier circuit 101 when the frequency of the first potential signal V1 is in the high-frequency band.

[0127] 5A, when the frequency of the first potential signal V1 is equal to or lower than the upper limit of the effective frequency band of the high-precision operational amplifier 31, the impedance of the capacitor 34A becomes large, and the open-loop gain of the high-precision operational amplifier 31 becomes sufficiently large. Therefore, the high-precision operational amplifier 31 applies negative feedback from the inverting input terminal (-) to the non-inverting input terminal (+) of the operational amplifier 22 via itself so that the input offset voltage of the operational amplifier 22 becomes small.

[0128] On the other hand, when the frequency of the first potential signal V1 is in the high frequency band, an AC signal having a frequency higher than the upper limit of the effective frequency band is input to the high precision operational amplifier 31. As a result, the noise generated by the high precision operational amplifier 31 increases compared to when an AC signal having a frequency equal to or lower than the upper limit of the effective frequency band is input to the high precision operational amplifier 31.

[0129] At this time, when the frequency of the first potential signal V1 is in the high frequency band, as shown in FIG. 5B, the impedance of the capacitor 34A becomes small, and a current flows between the output terminal and the inverting input terminal (-) of the high-precision operational amplifier 31.

[0130] Therefore, the high-precision operational amplifier 31 operates as a voltage follower circuit, and a differential amplifier circuit is formed in the downstream of the output terminal of the high-precision operational amplifier 31 by the third resistive element 33, the feedback resistor 23, the second resistive element 32, the first resistive element 24, and the operational amplifier 22.

[0131] As a result, the output signal of the high-precision operational amplifier 31 is equally distributed to a first path including the resistor element 33 and the feedback resistor 23 connected to the inverting input terminal (-) of the operational amplifier 22, and a second path including the second resistor element 32 and the first resistor element 24 connected to the non-inverting input terminal (+) of the operational amplifier 22. The two equally divided distribution signals are input to the two input terminals of the operational amplifier 22 as in-phase signals, respectively, so that noise contained in the output signal of the high-precision operational amplifier 31 is removed in the operational amplifier 22.

[0132] Therefore, even if the frequencies of the first and second potential signals V1, V2 are higher than the upper limit of the effective frequency band of the high-precision operational amplifier 31, the offset voltage or drift voltage of the operational amplifier 22 can be reduced while suppressing the increased noise generated from the high-precision operational amplifier 31.

[0133] In this embodiment, the voltage divider circuit 40B is used as the reference signal generating unit 40, but instead, the voltage divider circuit 40A shown in FIG. 2 or an external power supply may be used.

[0134] Next, the frequency characteristics of the differential amplifier circuit 101 will be described with reference to Figures 6 to 9. More specifically, the analysis results obtained by executing a simulation analysis of the differential amplifier circuit 101 will be described together with the analysis results of the circuit configuration of only the basic differential amplifier circuit 20, which is a general differential amplifier circuit omitting the offset voltage suppression circuit 30, for comparison.

[0135] FIG. 6 is a diagram showing the values ​​of the parameters of the differential amplifier circuit 101 that were set in the simulation analysis.

[0136] In the simulation analysis of the differential amplifier circuit 101, the resistance value R1 of each of the first and second input resistors 211, 212, the fourth resistor element 41, and the resistor element 431 was set to 2 [kΩ], and the resistance value R2 of each of the feedback resistor 23, the first resistor element 24, the fifth resistor element 42, and the resistor element 432 was set to 2 [kΩ]. Furthermore, the resistance value R3 of each of the second resistor element 32 and the third resistor element 33 was also set to 2 [kΩ].

[0137] Moreover, the gain bandwidth product of the operational amplifier 22 is set to 145 [MHz], and the gain bandwidth product of the high-precision operational amplifier 31 is set to 3 [MHz].

[0138] FIG. 7 is a diagram showing an analysis result regarding the offset voltage of the output of the differential amplifier circuit 101 shown in FIG.

[0139] 7, the analysis result of the differential amplifier circuit 101 is shown by a solid line, the vertical axis is the offset voltage of the output of the differential amplifier circuit 101, and the horizontal axis is time [ms]. For comparison, the analysis result of the circuit configuration of only the basic differential amplifier circuit 20 is shown by a dashed line.

[0140] As shown in FIG. 7, in a circuit configuration including only the basic differential amplifier circuit 20, regardless of an increase in the frequency of the potential signals V1 and V2, the offset voltage of the output of the operational amplifier 22 remains constant at −800 μV.

[0141] In contrast, in the differential amplifier circuit 101 equipped with the offset voltage suppression circuit 30, the input offset voltage of the low-offset-voltage high-precision operational amplifier 31 is smaller than the input offset voltage of the operational amplifier 22 and is constant at approximately 0 (zero) [μV]. Therefore, the offset voltage of the output of the operational amplifier 22 is approximately 0 [μV], similar to the high-precision operational amplifier 31.

[0142] In this way, by arranging the high-precision operational amplifier 31, to whose non-inverting input terminal (+) a reference signal Vb is input, so that negative feedback is applied from the inverting input terminal (-) of the operational amplifier 22 to the non-inverting input terminal (+), the offset voltage of the output of the operational amplifier 22 can be reduced.

[0143] Next, the frequency characteristics of the output noise of the differential amplifier circuit 101 will be described.

[0144] FIG. 8A is a diagram showing the analysis results of the frequency characteristics regarding the output noise of the differential amplifier circuit 101 shown in FIG. 6, and FIG. 8B is a diagram showing the analysis results of the frequency characteristics regarding the output noise of only the basic differential amplifier circuit 20.

[0145] The horizontal axis in Fig. 8A and Fig. 8B is a common frequency axis and indicates the frequency of the two potential signals V1 and V2. The vertical axis in Fig. 8A is the noise voltage density per Hz of the output noise of the differential amplifier circuit 101, and the vertical axis in Fig. 8B is the noise voltage density of the output noise of only the basic differential amplifier circuit 20.

[0146] 8A and 8B, in the low frequency range, the output noise of the differential amplifier circuit 101 is extremely small, about 1 / 1000th of the output noise of only the comparative basic differential amplifier circuit 20. In other words, the 1 / f noise is sufficiently reduced in the differential amplifier circuit 101.

[0147] The reason why the output noise is extremely small is that the voltage signal input to the inverting input terminal (-) of the operational amplifier 22 is negatively fed back to the non-inverting input terminal (+) of the operational amplifier 22 via the high-precision operational amplifier 31. As a result, the output noise in the low-frequency range is determined by the characteristics of the high-precision operational amplifier 31, and the noise component of the signal output from the operational amplifier 22 is reduced.

[0148] Next, the frequency characteristics of the differential amplifier circuit 101 with respect to the common-mode rejection ratio (CMRR) will be described.

[0149] Fig. 9 is a diagram showing the results of a simulation analysis of the frequency characteristics relating to the common-mode signal rejection ratio of the differential amplifier circuit 101 shown in Fig. 6. This analysis result takes into consideration the variations in the resistance elements constituting the differential amplifier circuit 101.

[0150] 9, the analysis results of the differential amplifier circuit 101 are shown by a solid line, with the vertical axis representing the common-mode signal rejection ratio of the differential amplifier circuit 101 and the horizontal axis representing the frequencies of the two potential signals V1 and V2 input to the differential amplifier circuit 101. Here, the analysis results of the circuit configuration of only the basic differential amplifier circuit 20, which is a general differential amplifier circuit for comparison, are shown by a dashed line.

[0151] As shown in FIG. 9, in the low frequency range, the common-mode rejection ratio of the differential amplifier circuit 101 is higher than that of a circuit configuration including only the basic differential amplifier circuit 20.

[0152] 8A and 8B, the reason is that the high-precision operational amplifier 31 applies negative feedback from the inverting input terminal (-) of the operational amplifier 22 to the non-inverting terminal (+) of the operational amplifier 22. Furthermore, the common-mode signal component is cancelled out in the operational amplifier 22, improving the common-mode signal rejection ratio.

[0153] On the other hand, in the high frequency range, the common-mode rejection ratio of the differential amplifier circuit 101 is maintained at a level equivalent to that of a circuit configuration including only the basic differential amplifier circuit 20 .

[0154] The reason for this is that capacitor 34A arranged in the feedback path of high-precision operational amplifier 31 becomes conductive, and an in-phase signal obtained by splitting the output signal of high-precision operational amplifier 31, which operates at unity gain, into two is input to the two input terminals of operational amplifier 22.

[0155] As a result, the common-mode signal is rejected by the differential amplifier circuit composed of the operational amplifier 22, the first to third resistor elements 24, 32, 33, and the feedback resistor 23, so that it is possible to reduce the output noise of the high-precision operational amplifier 31 that occurs when the operating frequency range is exceeded. Therefore, it is possible to prevent the common-mode signal rejection ratio of the operational amplifier 22 from decreasing significantly.

[0156] In this way, the differential amplifier circuit 101 can achieve a common-mode rejection ratio equal to or greater than that of a circuit configuration consisting only of the basic differential amplifier circuit 20, which is a general differential amplifier circuit, in the entire frequency band below the frequency band of the basic differential amplifier circuit 20 constituted by the operational amplifier 22.

[0157] Next, the effects of the second embodiment will be described.

[0158] The differential amplifier circuit 101 in this embodiment has the same effects as the differential amplifier circuit 100 in the first embodiment.

[0159] Furthermore, in this embodiment, a high-frequency current supply unit 34 is provided as current supply means for supplying current between the output terminal and the inverting input terminal (−) of the high-precision operational amplifier 31 in response to an increase in the frequency of the potential signal V1 input to the first input resistor 211.

[0160] 5B, the adjustment signal from the high-precision operational amplifier 31 is split into two, and the two split in-phase signals are input to the two input terminals of the operational amplifier 22. As a result, the two split in-phase signals are cancelled out in the operational amplifier 22, making it possible to reduce the output noise that increases in the high-precision operational amplifier 31 in the high-frequency range.

[0161] Moreover, in this embodiment, the high frequency current supply unit 34 includes a capacitor 34A connected between the output terminal and the inverting input terminal (-) of the high precision operational amplifier 31. By using the capacitor 34A, it is possible to pass an AC signal between the output terminal and the inverting input terminal of the high precision operational amplifier 31 in the high frequency range while making the high frequency current supply unit 34 a simple circuit configuration.

[0162] As a result, when the frequency of the potential signals V1 and V2 is higher than a predetermined threshold, the high-precision operational amplifier 31 operates as a voltage follower circuit with unity gain. - and the reference signal Vb, and outputs an adjustment signal indicating the difference between the first and second resistance elements 32 and 33.

[0163] Therefore, since the output signal of the high-precision operational amplifier 31 is divided into two in-phase signals and each is supplied to two input terminals of the operational amplifier 22, the increased noise contained in the output signal of the high-precision operational amplifier 31 can be reduced in the operational amplifier 22.

[0164] Moreover, the differential amplifier circuit 101 in this embodiment further includes a third resistive element 33 connected between the output terminal of the first input resistor 211 and the inverting input terminal (-) of the high-precision operational amplifier 31. The third resistive element 33 has a resistance value R3 equivalent to that of the second resistive element 32.

[0165] As a result, the output signal of the high-precision operational amplifier 31 is divided into two equal in-phase signals, which are respectively supplied to the two input terminals of the operational amplifier 22, so that the increased noise contained in the output signal of the high-precision operational amplifier 31 can be removed in the operational amplifier 22.

[0166] In this embodiment, the differential amplifier circuit 101 includes a fourth resistor element 41 having a resistance value R1 equivalent to the second input resistor 212, and a fifth resistor element 42 having a resistance value R2 equivalent to the first resistor element 24. That is, the resistance values ​​of the fourth resistor element 41 and the fifth resistor element 42 are determined so that the voltage division ratio of the fifth resistor element 42 to the fourth resistor element 41 is equivalent to the voltage division ratio of the first resistor element 24 to the input resistor 212.

[0167] One end of the fourth resistor element 41 is connected to the input end of the second input resistor 212, and the other end of the fourth resistor element 41 is connected to one end of the fifth resistor element 42, and the other end of the fifth resistor element 42 is connected to the reference potential 9. The non-inverting input terminal (+) of the high-precision operational amplifier 31 is connected between the fourth resistor element 41 and the fifth resistor element 42.

[0168] In addition, the differential amplifier circuit 101 includes a resistor circuit 43 that is interposed between the input terminal of the first input resistor 211 and the reference potential 9 and has an equal resistance value (R1+R2) to the fourth resistor element 41 and the fifth resistor element 42 that are connected in series with each other.

[0169] In this way, by disposing the resistor circuit 43 between the input terminal of the first input resistor 211 and the reference potential 9, the load resistance connected to the input terminal of the first input resistor 211 is equivalent to the load resistance connected to the input terminal of the second input resistor 212. Therefore, compared to a case in which the resistor circuit 43 is not disposed, the delay between the current signals supplied to the two input terminals of the operational amplifier 22 is smaller, so that the output error of the operational amplifier 22 caused by the delay can be reduced.

[0170] The operational amplifier 22 in this embodiment is a high-speed operational amplifier with a gain-bandwidth product of several MHz or more. This makes it possible to reduce the offset voltage or drift voltage of the high-speed operational amplifier in the differential amplifier circuit 101 while maintaining the performance of the high-speed operational amplifier.

[0171] Although the embodiments of the present invention have been described above, the above-mentioned embodiments merely show some of the application examples of the present invention, and it is not intended that the technical scope of the present invention be limited to the specific configurations of the above-mentioned embodiments.

[0172] For example, in the first embodiment, the voltage divider circuit 40A is provided as the reference signal generating unit 40 in the differential amplifier circuit 100, but instead of this, the voltage divider circuit 40B shown in Fig. 4 may be provided. In this case, as in the second embodiment, the delay between the current signals supplied to the two input terminals of the operational amplifier 22 can be suppressed.

[0173] In the second embodiment, the second resistive element 32 and the third resistive element 33 are provided in the offset voltage suppression circuit 30, but a capacitor may be connected in parallel to each of the second resistive element 32 and the third resistive element 33. [Explanation of symbols]

[0174] 20 Basic Differential Amplifier Circuit 21 A pair of input resistors 211, 212 First input resistor, second input resistor 23 Feedback resistor 24 First Resistive Element 31 High-precision operational amplifiers 32, 33 second resistive element, third resistive element 34 High frequency current carrying unit (current carrying means) 34A capacitor 41, 42 Fourth resistor element, fifth resistor element 43 Resistance circuit 100, 101 Differential amplifier circuit

Claims

1. a basic differential amplifier circuit including first and second input resistors to which two potential signals are respectively input, an operational amplifier for amplifying a potential difference between output terminals of the first and second input resistors, a feedback resistor having one end connected to the output terminal of the first input resistor and the other end connected to an output terminal of the operational amplifier, and a first resistor element having one end connected to the output terminal of the second input resistor and the other end connected to a reference potential; a high-precision operational amplifier having an inverting input terminal connected to an output terminal of the first input resistor and an output terminal connected to an output terminal of the second input resistor, the high-precision operational amplifier having an offset voltage or drift voltage smaller than that of the operational amplifier, A potential equivalent to a potential generated at the non-inverting input terminal of the operational amplifier in a state in which only the basic differential amplifier circuit is present is input to the non-inverting input terminal of the high-precision operational amplifier as a reference signal. Differential amplifier circuit.

2. 2. The differential amplifier circuit according to claim 1, a second resistor element is disposed between the output terminal of the high-precision operational amplifier and the output end of the second input resistor; Differential amplifier circuit.

3. 3. A differential amplifier circuit according to claim 2, a current supply unit that supplies a current between an output terminal and an inverting input terminal of the high-precision operational amplifier in response to an increase in a frequency of the potential signal input to the first input resistor, Differential amplifier circuit.

4. 4. A differential amplifier circuit according to claim 3, the current supplying means includes a capacitor connected between an output terminal and an inverting input terminal of the high-precision operational amplifier, Differential amplifier circuit.

5. 5. A differential amplifier circuit according to claim 3, a third resistor element connected between an output terminal of the first input resistor and an inverting input terminal of the high-precision operational amplifier; The third resistor element has a resistance value equal to that of the second resistor element. Differential amplifier circuit.

6. 6. A differential amplifier circuit according to claim 5, the high-precision operational amplifier outputs an adjustment signal to the second resistance element and the third resistance element as a voltage follower circuit when a frequency of the potential signal is higher than a predetermined threshold value; Differential amplifier circuit.

7. 7. A differential amplifier circuit according to claim 2, a fourth resistor element having one end connected to the input end of the second input resistor and the other end connected to the non-inverting input terminal of the high-precision operational amplifier; a fifth resistor element having one end connected to the other end of the fourth resistor element and the other end connected to the reference potential, resistance values ​​of the fourth resistor element and the fifth resistor element are determined such that a voltage division ratio of the fifth resistor element to the fourth resistor element is equal to a voltage division ratio of the first resistor element to the second input resistor. Differential amplifier circuit.

8. 8. A differential amplifier circuit according to claim 7, a resistor circuit interposed between the input end of the first input resistor and the reference potential, the resistor circuit having an equal resistance value to the fourth resistor element and the fifth resistor element connected in series with each other; Differential amplifier circuit.

9. 9. A differential amplifier circuit according to claim 2, The operational amplifier is a high-speed operational amplifier having a gain bandwidth product of several MHz or more. Differential amplifier circuit.

10. 10. A differential amplifier circuit according to claim 1, The reference signal is defined by the following equation (1): Differential amplifier circuit. [0010] however, Vb is the reference signal, V2 is the potential signal input to the second input resistor, R1 is the resistance of the second input resistor, R2 is the resistance value of the first resistive element.

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