Solid-state imaging device and electronic device

Abstract

A solid-state imaging device according to an embodiment is provided with: a photoelectric conversion region which is provided in an element region defined by a trench in a semiconductor substrate; a first semiconductor region which surrounds the photoelectric conversion region; a first contact which is in contact with the first semiconductor region at the bottom of the trench; a first electrode which is in contact with the first contact in a first trench; a second semiconductor region which is provided in a region adjoining the first semiconductor region and which has a first conductivity type that is the same as that of the first semiconductor region; a third semiconductor region which adjoins the second semiconductor region, which is provided between the second semiconductor region and a first surface, and which has a second conductivity type that is opposite to the first conductivity type; a second contact which is provided on the first surface so as to adjoin the third semiconductor region; and a second electrode which is in contact with the second contact. A second surface at which the first contact and the first electrode are in contact is inclined with respect to the first surface.

Description

[Technical field]

[0001] The present disclosure relates to a solid-state imaging device and an electronic device. [Background technology]

[0002] In recent years, single photon avalanche diodes (SPADs) have been developed that amplify the charge generated by photoelectric conversion through avalanche multiplication (also called avalanche amplification) and output it as an electrical signal. Avalanche amplification is a phenomenon in which electrons accelerated by an electric field in the impurity diffusion region of a PN junction collide with lattice atoms and break their bonds, and the newly generated electrons then collide with other lattice atoms and break the bonds, repeatedly multiplying the current.

[0003] Such SPADs can be used in distance measuring devices that measure the distance to an object based on the time it takes for light emitted from a light-emitting element to be reflected by the object and return, and in solid-state imaging devices that convert the amount of incident light into an electrical signal.

[0004] In order to discharge the large current generated by avalanche amplification from within the SPAD pixel, it is desirable to form a contact that has low resistance and ohmic contact. A commonly known method for forming a contact that has low resistance and ohmic contact with an impurity diffusion region formed in a semiconductor substrate is to form a high-concentration impurity region at the contact portion. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2015-41746 A Summary of the Invention [Problem to be solved by the invention]

[0006] To obtain an electric field strength strong enough to generate avalanche amplification, a high voltage must be applied in the reverse bias direction to the PN junction, but if the distance from the PN junction region to the contact is short, a strong electric field is formed between them, causing a tunnel effect. When this tunnel effect occurs, the electron-hole pairs generated by photoelectric conversion are immediately recombined by the tunnel current, creating the problem that avalanche amplification cannot occur.

[0007] One way to avoid the occurrence of the tunnel effect is to place contacts on the outermost periphery of the impurity diffusion region and increase the distance from the PN junction region to the contacts. However, in this case, it is difficult to increase the contact area between the contact and the electrode. This results in a voltage drop caused by high contact resistance, which reduces sensitivity (Photon Detection Efficiency: PDE). If the voltage value is increased to suppress the PDE drop, power consumption will increase.

[0008] In view of this, the present disclosure proposes a solid-state imaging device and electronic device capable of improving the PDE by suppressing the increase in resistance of the contacts. [Means for solving the problem]

[0009] In order to solve the above problems, a solid-state imaging device according to one embodiment of the present disclosure includes a semiconductor substrate including a first trench provided in a first surface and a second trench provided along a bottom portion of the first trench, and a photoelectric conversion element provided in the semiconductor substrate, the photoelectric conversion element being provided in an element region defined by the first trench and the second trench in the semiconductor substrate, the photoelectric conversion element including a photoelectric conversion region that performs photoelectric conversion of incident light to generate charges, a first semiconductor region surrounding the photoelectric conversion region in the element region, a first contact in contact with the first semiconductor region at a bottom portion of the first trench, and a second contact provided in the first trench. a first electrode in contact with the first contact within the element region, a second semiconductor region provided in a region in contact with the first semiconductor region within the element region, the second semiconductor region having the same first conductivity type as the first semiconductor region, a third semiconductor region provided between the second semiconductor region and the first surface in a region in contact with the second semiconductor region within the element region, the third semiconductor region having a second conductivity type opposite to the first conductivity type, a second contact provided on the first surface so as to be in contact with the third semiconductor region, and a second electrode in contact with the second contact, wherein the second surface where the first contact and the first electrode are inclined with respect to the first surface. [Brief description of the drawings]

[0010] [Figure 1] 1 is a block diagram showing a schematic configuration example of an electronic device equipped with a solid-state imaging device according to a first embodiment. [Diagram 2] 1 is a block diagram showing a schematic configuration example of an image sensor according to a first embodiment. [Diagram 3] 1 is a circuit diagram showing a schematic configuration example of a SPAD pixel according to a first embodiment. [Figure 4] FIG. 2 is a diagram showing an example of a layout of color filters according to the first embodiment. [Diagram 5] 2 is a diagram illustrating an example of a layered structure of the image sensor according to the first embodiment. [Figure 6] 3 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to a light incident surface of the SPAD pixel according to the first embodiment. FIG. [Figure 7]7 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane in FIG. 6. [Figure 8] 1A to 1C are process cross-sectional views (part 1) illustrating a method for manufacturing the solid-state imaging device according to the first embodiment. [Figure 9] 5A to 5C are process cross-sectional views (part 2) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment. [Figure 10] 5A to 5C are process cross-sectional views (part 3) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment. [Figure 11] 4A to 4C are process cross-sectional views showing the method for manufacturing the solid-state imaging device according to the first embodiment (part 4). [Figure 12] 5A to 5C are process cross-sectional views showing the method for manufacturing the solid-state imaging device according to the first embodiment (part 5). [Figure 13] 6 is a process cross-sectional view showing the method for manufacturing the solid-state imaging device according to the first embodiment (part 6). FIG. [Figure 14] 7 is a process cross-sectional view (part 7) illustrating the method for manufacturing the solid-state imaging device according to the first embodiment. FIG. [Figure 15] 8 is a process cross-sectional view showing the method for manufacturing the solid-state imaging device according to the first embodiment (part 8). FIG. [Figure 16] 9 is a process cross-sectional view showing the manufacturing method of the solid-state imaging device according to the first embodiment (part 9). FIG. [Figure 17] 10 is a process cross-sectional view showing the method for manufacturing the solid-state imaging device according to the first embodiment; FIG. [Figure 18] 11 is a process cross-sectional view showing the method for manufacturing the solid-state imaging device according to the first embodiment; FIG. [Figure 19] 12 is a process cross-sectional view showing the method for manufacturing the solid-state imaging device according to the first embodiment; FIG. [Figure 20] 13 is a process cross-sectional view showing the method for manufacturing the solid-state imaging device according to the first embodiment; FIG. [Figure 21] 4 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to a light incident surface of a SPAD pixel according to a first modified example of the first embodiment. FIG. [Figure 22]11 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a plane parallel to a light incident surface of a SPAD pixel according to a second modified example of the first embodiment. FIG. [Diagram 23] 11 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to a light incident surface of a SPAD pixel according to a third modified example of the first embodiment. FIG. [Figure 24] 13 is a vertical sectional view showing an example of the sectional structure of a SPAD pixel according to a fourth modified example of the first embodiment, taken along a plane perpendicular to the light incident plane. FIG. [Diagram 25] FIG. 3 is a diagram showing an example of a connection wiring to an anode according to the first embodiment. [Figure 26] FIG. 13 is a diagram showing an example of a connection wiring to an anode according to a fifth modified example of the first embodiment. [Figure 27] FIG. 13 is a diagram showing another example of a connection wiring to an anode according to the fifth modified example of the first embodiment. [Figure 28] FIG. 13 is a diagram showing yet another example of the connection wiring to the anode according to the fifth modified example of the first embodiment. [Figure 29] 11 is a vertical cross-sectional view showing an example of the cross-sectional structure of a SPAD pixel according to a second embodiment, taken along a plane perpendicular to the light incident plane. FIG. [Diagram 30] 11 is a vertical cross-sectional view showing an example of the cross-sectional structure of a SPAD pixel according to a third embodiment, taken along a plane perpendicular to the light incident surface. FIG. [Diagram 31] 13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a SPAD pixel according to a fourth embodiment, taken along a plane perpendicular to the light incident plane. FIG. [Diagram 32] 13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a SPAD pixel according to a fifth embodiment, taken along a plane perpendicular to a light incident surface. FIG. [Diagram 33] FIG. 13 is a plan view showing an example of a planar layout of a SPAF pixel according to a sixth embodiment. [Diagram 34] 13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to a light incident surface of a SPAD pixel according to a sixth embodiment. FIG. [Diagram 35] 13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a SPAD pixel according to a seventh embodiment, taken along a plane perpendicular to the light incident plane. FIG. [Diagram 36]13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to a light incident surface of a SPAD pixel according to an eighth embodiment. FIG. [Figure 37] 13 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to a light incident surface of a SPAD pixel according to a ninth embodiment. FIG. [Figure 38] 38 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane in FIG. 37. [Figure 39] 13A to 13C are process cross-sectional views showing a method for manufacturing a solid-state imaging device according to a ninth embodiment. [Diagram 40] 23 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a plane parallel to the light incident surface of a SPAD pixel according to a first modified example of the ninth embodiment. FIG. [Diagram 41] 23 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a plane parallel to the light incident surface of a SPAD pixel according to a second modified example of the ninth embodiment. FIG. [Diagram 42] 23 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a surface parallel to the light incident surface of a SPAD pixel according to a third modified example of the ninth embodiment. FIG. [Diagram 43] 1A to 1C are diagrams illustrating configurations of an imaging device and an electronic device that use a solid-state imaging element to which the present technology is applied. [Diagram 44] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Diagram 45] 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG. [Figure 46] 1 is a diagram illustrating an example of a schematic configuration of an endoscopic surgery system. [Figure 47] 2 is a block diagram showing an example of a functional configuration of a camera head and a CCU. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the drawings. In the following embodiments, the same components are designated by the same reference numerals, and duplicated descriptions will be omitted.

[0012] The present disclosure will be described in the following order. 1. First embodiment 1.1 Electronic equipment 1.2 Solid-state imaging device 1.3 SPAD pixel 1.4 Example of general operation of SPAD pixel 1.5 Color filter layout example 1.6 Example of stacked structure of solid-state imaging device 1.7 Example of cross-sectional structure of a SPAD pixel 1.8 Positional relationship between the anode contact and the cathode contact and / or the N+ type semiconductor region 1.9 Manufacturing method 1.10 Actions and Effects 1.11 Variations 1.11.1 First variant 1.11.2 Second variant 1.11.3 Third variant 1.11.4 Fourth variant 1.11.5 Fifth Variation 2. Second embodiment 3. Third embodiment 4. Fourth embodiment 5. Fifth embodiment 6. Sixth embodiment 7. Seventh embodiment 8. Eighth embodiment 9. Ninth embodiment 9.1 Example of cross-sectional structure of a SPAD pixel 9.2 Actions and Effects 9.3 Variations 9.3.1 First variant 9.3.2 Second variant 9.3.3 Third variant 10. Application examples to electronic devices 11. Mobile application examples 12. Application example to endoscopic surgery system 13. Notes

[0013] 1. First embodiment First, a solid-state imaging device and an electronic device according to a first embodiment will be described in detail with reference to the drawings.

[0014] 1.1 Electronic equipment Fig. 1 is a block diagram showing a schematic configuration example of an electronic device equipped with a solid-state imaging device according to the first embodiment. As shown in Fig. 1, the electronic device 1 includes, for example, an imaging lens 30, a solid-state imaging device 10, a storage unit 40, and a processor 50.

[0015] The imaging lens 30 is an example of an optical system that collects incident light and forms an image on the light receiving surface of the solid-state imaging device 10. The light receiving surface may be a surface on which photoelectric conversion elements in the solid-state imaging device 10 are arranged. The solid-state imaging device 10 performs photoelectric conversion on the incident light to generate image data. The solid-state imaging device 10 also performs predetermined signal processing, such as noise removal and white balance adjustment, on the generated image data.

[0016] The storage unit 40 is configured with, for example, a flash memory, a dynamic random access memory (DRAM), a static random access memory (SRAM), or the like, and records image data input from the solid-state imaging device 10, and the like.

[0017] The processor 50 is configured using, for example, a CPU (Central Processing Unit) etc., and may include an application processor that executes an operating system, various application software etc., a GPU (Graphics Processing Unit), a baseband processor etc. The processor 50 executes various processes as necessary on image data input from the solid-state imaging device 10, image data read from the storage unit 40 etc., displays the data to the user, transmits the data to the outside via a predetermined network, etc.

[0018] 1.2 Solid-state imaging device 2 is a block diagram showing a schematic configuration example of a CMOS (Complementary Metal-Oxide-Semiconductor) type solid-state imaging device (hereinafter, simply referred to as an image sensor) according to the first embodiment. Here, the CMOS type image sensor is an image sensor created by applying or partially using a CMOS process. Note that in this embodiment, a so-called back-illuminated image sensor 10 in which the surface opposite to the element formation surface in the semiconductor substrate is the light incidence surface is shown as an example, but the image sensor is not limited to the back-illuminated type, and it is also possible to use a so-called front-illuminated type in which the element formation surface is the light incidence surface.

[0019] As shown in FIG. 2, the image sensor 10 includes a SPAD array unit 11, a timing control circuit 15, a drive circuit 12, and an output circuit 13.

[0020] The SPAD array section 11 includes a plurality of SPAD pixels 20 arranged in a matrix. A pixel drive line LD (vertical direction in the drawing) is connected to each column of the plurality of SPAD pixels 20, and an output signal line LS (horizontal direction in the drawing) is connected to each row of the SPAD pixels 20. One end of the pixel drive line LD is connected to an output terminal of a drive circuit 12 corresponding to each column, and one end of the output signal line LS is connected to an input terminal of an output circuit 13 corresponding to each row.

[0021] The drive circuit 12 includes a shift register, an address decoder, etc., and drives each SPAD pixel 20 of the SPAD array section 11, either all pixels at the same time or column by column. Therefore, the drive circuit 12 includes at least a circuit that applies a quench voltage V_QCH (described later) to each SPAD pixel 20 in a selected column in the SPAD array section 11, and a circuit that applies a selection control voltage V_SEL (described later) to each SPAD pixel 20 in the selected column. The drive circuit 12 applies the selection control voltage V_SEL to a pixel drive line LD corresponding to a column to be read out, thereby selecting a SPAD pixel 20 to be used for detecting the incidence of photons column by column.

[0022] A signal (called a detection signal) V_OUT output from each SPAD pixel 20 in a column selected and scanned by the drive circuit 12 is input to the output circuit 13 through each output signal line LS. The output circuit 13 outputs the detection signal V_OUT input from each SPAD pixel 20 as a pixel signal to an external storage unit 40 or a processor 50.

[0023] The timing control circuit 15 includes a timing generator that generates various timing signals, and controls the drive circuit 12 and the output circuit 13 based on the various timing signals generated by the timing generator.

[0024] 1.3 SPAD pixel Fig. 3 is a circuit diagram showing a schematic configuration example of a SPAD pixel according to the first embodiment. As shown in Fig. 3, a SPAD pixel 20 includes a photodiode 21 as a light receiving element, and a readout circuit 22 that detects that a photon is incident on the photodiode 21. When a photon is incident on the photodiode 21 while a reverse bias voltage V_SPAD equal to or greater than a breakdown voltage is applied between the anode and cathode of the photodiode 21, the photodiode 21 generates an avalanche current.

[0025] The readout circuit 22 includes a quench resistor 23, a digital converter 25, an inverter 26, a buffer 27, and a selection transistor 24. The quench resistor 23 is configured, for example, by an N-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor, hereinafter referred to as an NMOS transistor), the drain of which is connected to the anode of the photodiode 21, and the source of which is grounded via the selection transistor 24. In addition, a quench voltage V_QCH that is set in advance to cause the NMOS transistor to function as a quench resistor is applied to the gate of the NMOS transistor that configures the quench resistor 23 from the drive circuit 12 via the pixel drive line LD.

[0026] In this embodiment, the photodiode 21 is a SPAD. The SPAD is an avalanche photodiode that operates in Geiger mode when a reverse bias voltage equal to or greater than the breakdown voltage is applied between the anode and cathode of the SPAD, and is capable of detecting the incidence of a single photon.

[0027] The digital converter 25 includes a resistor 251 and an NMOS transistor 252. The drain of the NMOS transistor 252 is connected to a power supply voltage VDD via the resistor 251, and the source of the NMOS transistor 252 is grounded. In addition, the voltage of a connection point N1 between the anode of the photodiode 21 and the quench resistor 23 is applied to the gate of the NMOS transistor 252.

[0028] The inverter 26 includes a P-type MOSFET (hereinafter referred to as a PMOS transistor) 261 and an NMOS transistor 262. The drain of the PMOS transistor 261 is connected to a power supply voltage VDD, and the source of the PMOS transistor 261 is connected to the drain of the NMOS transistor 262. The drain of the NMOS transistor 262 is connected to the source of the PMOS transistor 261, and the source of the NMOS transistor 262 is grounded. The voltage of the connection point N2 between the resistor 251 and the drain of the NMOS transistor 252 is applied to the gate of the PMOS transistor 261 and the gate of the NMOS transistor 262, respectively. The output of the inverter 26 is input to the buffer 27.

[0029] The buffer 27 is a circuit for impedance conversion. When the output signal from the inverter 26 is input, the buffer 27 performs impedance conversion on the input output signal and outputs it as a detection signal V_OUT.

[0030] The selection transistor 24 is, for example, an NMOS transistor, and its drain is connected to the source of the NMOS transistor that constitutes the quench resistor 23, and its source is grounded. The selection transistor 24 is connected to the drive circuit 12, and when a selection control voltage V_SEL from the drive circuit 12 is applied to the gate of the selection transistor 24 via the pixel drive line LD, the selection transistor 24 changes from an off state to an on state.

[0031] 1.4 Example of general operation of SPAD pixel 3 operates, for example, as follows. That is, first, during a period in which the selection control voltage V_SEL is applied from the drive circuit 12 to the selection transistor 24 and the selection transistor 24 is in an on state, a reverse bias voltage V_SPAD equal to or greater than the breakdown voltage is applied to the photodiode 21. This allows the photodiode 21 to operate.

[0032] On the other hand, during the period when the selection control voltage V_SEL is not applied from the drive circuit 12 to the selection transistor 24 and the selection transistor 24 is in the off state, the reverse bias voltage V_SPAD is not applied to the photodiode 21, and therefore the operation of the photodiode 21 is prohibited.

[0033] When a photon is incident on the photodiode 21 while the selection transistor 24 is in an on state, an avalanche current is generated in the photodiode 21. As a result, an avalanche current flows through the quench resistor 23, and the voltage of the connection point N1 rises. When the voltage of the connection point N1 becomes higher than the on voltage of the NMOS transistor 252, the NMOS transistor 252 turns on, and the voltage of the connection point N2 changes from the power supply voltage VDD to 0 V. When the voltage of the connection point N2 changes from the power supply voltage VDD to 0 V, the PMOS transistor 261 changes from the off state to the on state, and the NMOS transistor 262 changes from the on state to the off state, and the voltage of the connection point N3 changes from 0 V to the power supply voltage VDD. As a result, a high-level detection signal V_OUT is output from the buffer 27.

[0034] Thereafter, when the voltage at the connection point N1 continues to rise, the voltage applied between the anode and cathode of the photodiode 21 becomes smaller than the breakdown voltage, which stops the avalanche current and decreases the voltage at the connection point N1. When the voltage at the connection point N1 becomes lower than the on-voltage of the NMOS transistor 252, the NMOS transistor 252 turns off, and the output of the detection signal V_OUT from the buffer 27 stops (low level).

[0035] In this way, the readout circuit 22 outputs a high-level detection signal V_OUT during the period from when a photon is incident on the photodiode 21, generating an avalanche current that turns the NMOS transistor 252 on, to when the avalanche current stops and the NMOS transistor 252 turns off. The output detection signal V_OUT is input to the output circuit 13.

[0036] 1.5 Color filter layout example As described above, a color filter that selectively transmits light of a specific wavelength is disposed for the photodiode 21 of each SPAD pixel 20. Fig. 4 is a diagram showing an example of the layout of the color filters according to the first embodiment.

[0037] As shown in FIG. 4, a color filter array 60 has a configuration in which patterns 61, which are units of repetition in a color filter arrangement (hereinafter referred to as unit patterns), are arranged in a two-dimensional lattice shape.

[0038] Each unit pattern 61 has a so-called Bayer array configuration consisting of a total of four color filters, for example, a color filter 115R that selectively transmits light of the red (R) wavelength component, two color filters 115G that selectively transmit light of the green (G) wavelength component, and a color filter 115B that selectively transmits light of the blue (B) wavelength component.

[0039] In the present disclosure, the color filter array 60 is not limited to the Bayer array. For example, various color filter arrays can be adopted, such as an X-Trans (registered trademark) type color filter array with a unit pattern of 3×3 pixels, a quad Bayer array with 4×4 pixels, and a white RGB type color filter array with 4×4 pixels including a color filter (hereinafter also referred to as clear or white) having broad light transmission characteristics in the visible light range in addition to the color filters of the three primary colors of RGB.

[0040] 1.6 Example of stacked structure of solid-state imaging device Fig. 5 is a diagram showing an example of a stacked structure of the image sensor according to the first embodiment. As shown in Fig. 5, the image sensor 10 has a structure in which a light receiving chip 71 and a circuit chip 72 are stacked vertically. The light receiving chip 71 is, for example, a semiconductor chip including a SPAD array unit 11 in which photodiodes 21 are arranged, and the circuit chip 72 is, for example, a semiconductor chip in which the readout circuits 22 shown in Fig. 3 are arranged. Note that peripheral circuits such as a timing control circuit 15, a drive circuit 12, and an output circuit 13 may be arranged on the circuit chip 72.

[0041] The light receiving chip 71 and the circuit chip 72 can be bonded to each other by, for example, flattening the bonding surfaces of the respective chips and bonding them together by electronic force, which is called direct bonding. However, the present invention is not limited to this, and it is also possible to use, for example, so-called Cu-Cu bonding, which is bonding copper (Cu) electrode pads formed on the bonding surfaces of the respective chips, or bump bonding.

[0042] The light-receiving chip 71 and the circuit chip 72 are electrically connected via a connection portion such as a TSV (Through-Silicon Via) that penetrates the semiconductor substrate. For the connection using the TSV, for example, a so-called twin TSV method in which two TSVs, a TSV provided in the light-receiving chip 71 and a TSV provided from the light-receiving chip 71 to the circuit chip 72, are connected on the outer surface of the chips, or a so-called shared TSV method in which the two are connected by a TSV that penetrates from the light-receiving chip 71 to the circuit chip 72, can be adopted.

[0043] However, when Cu-Cu bonding or bump bonding is used to bond the light-receiving chip 71 and the circuit chip 72, they are electrically connected via the Cu-Cu bonding portion or the bump bonding portion.

[0044] 1.7 Example of cross-sectional structure of a SPAD pixel Fig. 6 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident plane of the SPAD pixel according to the first embodiment. Fig. 7 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane in Fig. 6. Note that Fig. 6 focuses on the cross-sectional structure of the photodiode 21.

[0045] 6, the photodiode 21 of the SPAD pixel 20 is provided, for example, in a semiconductor substrate 101 constituting a light receiving chip 71. The semiconductor substrate 101 is partitioned into a plurality of element regions by element isolation sections 110 having a lattice shape as viewed from the light incident surface (see, for example, FIG. 7). The photodiode 21 is provided in each element region partitioned by the element isolation sections 110. Note that the element isolation sections 110 may include an anode electrode 122 and an insulating film 109 in a first trench, which will be described later.

[0046] Each photodiode 21 includes a photoelectric conversion region 102, a P-type semiconductor region 104, an N- type semiconductor region 103, a P+ type semiconductor region 105, an N+ type semiconductor region 106, a cathode contact 107, and an anode contact 108.

[0047] The photoelectric conversion region 102 is, for example, an N-type well region or a region containing a low concentration of donors, and performs photoelectric conversion on incident light to generate electron-hole pairs (hereinafter referred to as charges).

[0048] 6 and 7, the P-type semiconductor region 104 is provided in a region surrounding the photoelectric conversion region 102. When a reverse bias voltage V_SPAD is applied to an anode contact 108 (described later), the P-type semiconductor region 104 forms an electric field for guiding charges generated in the photoelectric conversion region 102 to the N-type semiconductor region 103.

[0049] The N-type semiconductor region 103 is, for example, a region containing a higher concentration of donors than the photoelectric conversion region 102. As shown in Figures 6 and 7, this N-type semiconductor region 103 is disposed in the center of the photoelectric conversion region 102, and takes in charges generated in the photoelectric conversion region 102 and guides them to the P+ type semiconductor region 105. Note that the N-type semiconductor region 103 is not an essential component and may be omitted.

[0050] The P+ type semiconductor region 105 is, for example, a region containing a higher concentration of acceptors than the P type semiconductor region 104, and a part of the region is in contact with the P type semiconductor region 104. The N+ type semiconductor region 106 is, for example, a region containing a higher concentration of donors than the N- type semiconductor region 103, and is in contact with the P+ type semiconductor region 105.

[0051] The P+ type semiconductor region 105 and the N+ type semiconductor region 106 form a PN junction and function as an amplification region that accelerates the flowing charge and generates an avalanche current.

[0052] The cathode contact 107 is, for example, a region that contains a higher concentration of donors than the N+ type semiconductor region 106, and is provided in a region that contacts the N+ type semiconductor region 106.

[0053] The anode contact 108 is, for example, a region containing a higher concentration of acceptors than the P+ type semiconductor region 105. The anode contact 108 is provided in a region that contacts the outer periphery of the P type semiconductor region 104. The width of the anode contact 108 may be, for example, about 40 nm (nanometers). In this way, by bringing the anode contact 108 into contact with the entire outer periphery of the P type semiconductor region 104, it is possible to form a uniform electric field in the photoelectric conversion region 102.

[0054] 6 and 7, the anode contact 108 is provided on the bottom surface of a trench (hereinafter referred to as a first trench) provided in a lattice shape along the element isolation portion 110 on the front surface (lower surface in the drawings) side of the semiconductor substrate 101. Due to this structure, the formation position of the anode contact 108 is shifted in the height direction with respect to the formation positions of the cathode contact 107 and the N+ type semiconductor region 106, as will be described later.

[0055] The front surface (the lower surface in the drawing) of the semiconductor substrate 101 is covered with an insulating film 109. The film thickness (thickness in the substrate width direction) of the insulating film 109 in the first trench depends on the voltage value of the reverse bias voltage V_SPAD applied between the anode and the cathode, but may be, for example, about 150 nm.

[0056] The insulating film 109 has openings that expose the cathode contact 107 and the anode contact 108 on the surface of the semiconductor substrate 101, and a cathode electrode 121 in contact with the cathode contact 107 and an anode electrode 122 in contact with the anode contact 108 are provided in each opening.

[0057] The element isolation portions 110 that separate the photodiodes 21 are provided in trenches (hereinafter referred to as second trenches) that penetrate the semiconductor substrate 101 from the front surface to the back surface. The second trench is connected to the first trench on the front surface side of the semiconductor substrate 101. The inner diameter of the second trench is narrower than the inner diameter of the first trench, and an anode contact 108 is formed in a step portion formed thereby.

[0058] Each element isolation portion 110 includes an insulating film 112 that covers the inner side surface of the second trench, and a light-shielding film 111 that fills the second trench. The thickness of the insulating film 112 (thickness in the substrate width direction) depends on the voltage value of the reverse bias voltage V_SPAD applied between the anode and the cathode, but may be, for example, about 10 nm to 20 nm. The thickness of the light-shielding film 111 (thickness in the substrate width direction) depends on the material used for the light-shielding film 111, etc., but may be, for example, about 150 nm.

[0059] Here, by using a conductive material having light-shielding properties for the light-shielding film 111 and the anode electrode 122, it becomes possible to form the light-shielding film 111 and the anode electrode 122 in the same process. Furthermore, by using the same conductive material for the light-shielding film 111 and the anode electrode 122 for the cathode electrode 121, it becomes possible to form the light-shielding film 111, the anode electrode 122, and the cathode electrode 121 in the same process.

[0060] For example, tungsten (W) can be used as the conductive material having such light-shielding properties. However, the conductive material is not limited to tungsten (W) and may be variously changed to aluminum (Al), an aluminum alloy, copper (Cu), or the like, as long as the conductive material has the property of reflecting or absorbing visible light or light required for each element.

[0061] However, the material for the light-shielding film 111 in the second trench is not limited to a conductive material, and it is also possible to use, for example, a high refractive index material having a refractive index higher than that of the semiconductor substrate 101, or a low refractive index material having a refractive index lower than that of the semiconductor substrate 101.

[0062] Furthermore, since the material used for the cathode electrode 121 is not required to have a light-shielding property, a conductive material such as copper (Cu) may be used instead of a conductive material having a light-shielding property.

[0063] In this embodiment, a so-called FFTI (Front Full Trench Isolation) type element isolation portion 110 in which the second trench penetrates the semiconductor substrate 101 from the front surface side is exemplified; however, the present invention is not limited to this, and it is also possible to adopt an FTI (Full Trench Isolation) type element isolation portion in which the second trench penetrates the semiconductor substrate 101 from the back surface and / or the front surface side, or a DTI (Deep Trench Isolation) type or RDTI (Reverse Deep Trench Isolation) type element isolation portion in which the second trench is formed on the front surface or from the back surface to the middle of the semiconductor substrate 101.

[0064] When the second trench is of an FTI type that penetrates the semiconductor substrate 101 from the back surface side, the material of the light-shielding film 111 may be filled into the second trench from the back surface side of the semiconductor substrate 101.

[0065] The upper portions of the cathode electrode 121 and the anode electrode 122 protrude above the surface (the lower surface in the drawing) of the insulating film 109. On the surface (the lower surface in the drawing) of the insulating film 109, for example, a wiring layer 120 is provided.

[0066] The wiring layer 120 includes an interlayer insulating film 123 and wiring 124 provided in the interlayer insulating film 123. The wiring 124 is in contact with, for example, a cathode electrode 121 protruding from the surface (lower surface in the drawing) of the insulating film 109. Although omitted in FIG. 6, the wiring layer 120 is also provided with wiring in contact with an anode electrode 122.

[0067] A connection pad 125 made of, for example, copper (Cu) is exposed on the surface (lower surface in the drawing) of the wiring layer 120. This connection pad 125 may be a part of the wiring 124. In that case, the wiring 124 is also made of copper (Cu).

[0068] A wiring layer 130 in the circuit chip 72 is bonded to the surface of the wiring layer 120. The wiring layer 130 includes an interlayer insulating film 131 and wiring 132 provided in the interlayer insulating film 131. The wiring 132 is electrically connected to circuit elements 142 such as the readout circuit 22 formed on the semiconductor substrate 141. Therefore, the cathode electrode 121 of the semiconductor substrate 101 is connected to the readout circuit 22 shown in FIG. 3 via the wiring 124, the connection pads 125 and 135, and the wiring 132.

[0069] Furthermore, a connection pad 135 made of, for example, copper (Cu) is exposed on a surface (upper surface in the drawing) of the wiring layer 130. By bonding (Cu-Cu bonding) this connection pad 135 to a connection pad 125 exposed on the surface of the wiring layer 120 of the photosensor chip 71, the photosensor chip 71 and the circuit chip 72 are electrically and mechanically connected to each other.

[0070] This connection pad 135 may be a part of the wiring 132. In that case, the wiring 132 is also made of copper (Cu).

[0071] Moreover, a pinning layer 113 and a planarization film 114 are provided on the back surface (upper surface in the drawing) of the semiconductor substrate 101. Furthermore, on the planarization film 114, a color filter 115 and an on-chip lens 116 are provided for each SPAD pixel 20.

[0072] The pinning layer 113 is a fixed charge film made of, for example, a hafnium oxide (HfO2) film or an aluminum oxide (Al2O3) film containing a predetermined concentration of acceptors. The planarization film 114 is an insulating film made of an insulating material such as silicon oxide (SiO2) or silicon nitride (SiN), and is a film for planarizing the surface on which the upper layer color filter 115 and on-chip lens 116 are formed.

[0073] In the above-described structure, when a reverse bias voltage V_SPAD equal to or greater than the breakdown voltage is applied between the cathode contact 107 and the anode contact 108, an electric field is formed that guides the charges generated in the photoelectric conversion region 102 to the N- type semiconductor region 103 due to the potential difference between the P-type semiconductor region 104 and the N+ type semiconductor region 106. In addition, a strong electric field is formed in the PN junction region between the P+ type semiconductor region 105 and the N+ type semiconductor region 106, accelerating the charges that have entered and generating an avalanche current. This allows the photodiode 21 to operate as an avalanche photodiode.

[0074] 1.8 Positional relationship between the anode contact and the cathode contact and / or the N+ type semiconductor region Next, the positional relationship between the anode contact 108 and the cathode contact 107 and / or the N+ type semiconductor region 106 in this embodiment will be described.

[0075] As described above, in this embodiment, the anode contact 108 is disposed at the bottom of the first trench formed on the surface side of the semiconductor substrate 101. As a result, in this embodiment, the anode contact 108 is disposed at a position deeper from the surface (the lower surface in the drawing) of the semiconductor substrate 101 than the cathode contact 107 and the N+ type semiconductor region 106. That is, in this embodiment, when the surface (the lower surface in the drawing) of the semiconductor substrate 101 is used as a reference, the formation position of the anode contact 108 is shifted in the height direction with respect to the formation positions of the cathode contact 107 and the N+ type semiconductor region 106.

[0076] In other words, the height of the anode contact 108 from the surface of the semiconductor substrate 101 is different from the height of the N+ type semiconductor region 106 from the surface of the semiconductor substrate 101. In a specific example, the height of the anode contact 108 from the surface of the semiconductor substrate 101 is higher than the height of the N+ type semiconductor region 106 from the surface of the semiconductor substrate 101.

[0077] In this way, by not shifting the formation position of the anode contact 108 from the formation positions of the cathode contact 107 and the N+ type semiconductor region 106 in the vertical direction, it is possible to increase the distance from the anode contact 108 to the cathode contact 107 and / or the N+ type semiconductor region 106 without increasing the size of the SPAD pixel 20 in the lateral direction (direction parallel to the incident surface).

[0078] This makes it possible to suppress the occurrence of the tunnel effect without increasing the pixel size, and therefore makes it possible to generate avalanche amplification stably while suppressing a decrease in resolution.

[0079] 1.9 Manufacturing method Next, a method for manufacturing the image sensor 10 according to this embodiment will be described in detail with reference to the drawings. In the following description, attention will be focused on a method for manufacturing the photosensor chip 71.

[0080] 8 to 20 are process cross-sectional views showing a method for manufacturing the solid-state imaging device according to the first embodiment.

[0081] 8, in this manufacturing method, donors and acceptors are ion-implanted appropriately into predetermined regions of a semiconductor substrate 101 containing a low overall concentration of donors, thereby forming a part (P-type semiconductor region 104a) of a P-type semiconductor region 104 that defines a photoelectric conversion region 102, an N-type semiconductor region 103, a P+ type semiconductor region 105, and an N+ type semiconductor region 106. Note that the ion implantation may be performed, for example, from the surface (upper surface in the drawing) of the semiconductor substrate 101. After the ion implantation, annealing may be performed once or multiple times to recover from damage caused during the ion implantation and to improve the profile of the implanted dopant.

[0082] 9, a mask M1 having lattice-shaped openings A1 is formed on the surface of the semiconductor substrate 101, and the semiconductor substrate 101 is engraved from above the mask M1 by anisotropic dry etching such as RIE (Reactive Ion Etching) to form lattice-shaped first trenches T1 along the boundaries between adjacent SPAD pixels 20. The depth of the first trenches T1 may be such that the bottom surface of the first trenches T1 is located at a level deeper than the lower surface of the P+ type semiconductor region 105 and reaches the P type semiconductor region 104a.

[0083] In addition, the deeper the first trench T1 is from the surface of the semiconductor substrate 101, the more preferable it is to ensure the distance from the anode contact 108 to the N+ type semiconductor region 106 and the cathode contact 107. However, if the first trench T1 is made too deep, the process accuracy may deteriorate and the yield may decrease. Therefore, the depth of the first trench T1 should be set deep within a range that ensures more than necessary process accuracy.

[0084] 10, after removing the mask M1, an insulating film 109A is formed to cover the surface of the semiconductor substrate 101 and the inner surface of the first trench T1 by using a film forming technique such as sputtering or a CVD (Chemical Vapor Deposition) method. The insulating film 109A can be made of an insulating material such as silicon oxide (SiO2), silicon nitride (SiN), silicon carbide (SiC), or aluminum oxide (Al2O3). The insulating film 109A can have a single-layer structure or a multilayer structure. As described above, a high reverse bias voltage V_SPAD is applied to the anode electrode 122, and therefore the insulating film 109A is required to have a high withstand voltage. In view of this, it is preferable to use an insulating material having a high withstand voltage, such as silicon oxide (SiO2), as the material of the insulating film 109A.

[0085] 11, the bottom surface of the trench T11 formed by the surface of the insulating film 109A in the first trench T1 is engraved in the substrate thickness direction to form a second trench T2 extending from the surface side of the semiconductor substrate 101 to the vicinity of the back surface. For example, anisotropic dry etching that can obtain a sufficiently high selectivity with respect to the semiconductor substrate 101 can be used to form the second trench T2. This makes it possible to etch a lattice-shaped region in the semiconductor substrate 101 where the element isolation portion 110 is to be formed, using the insulating film 109A formed on the inner side surface of the first trench T1 and the upper surface of the semiconductor substrate 101 as a mask.

[0086] 12, the insulating film 109A in the first trench T1 is thinned by isotropic etching such as wet etching, thereby exposing the outer periphery of the P-type semiconductor region 104a at the bottom of the first trench T1. At that time, the insulating film 109A on the surface of the semiconductor substrate 101 may be thinned.

[0087] Next, as shown in FIG. 13, a mask M2 having an opening A2 above the N+ type semiconductor region 106 is formed on the insulating film 109A, and the insulating film 109A is etched from above this mask M2 by anisotropic dry etching, for example RIE, to form an opening A3 that exposes a portion of the upper surface of the semiconductor substrate 101.

[0088] 14, after removing the mask M2, an insulating film 109B is isotropically formed by using a film forming technique such as a CVD method to cover the insulating film 109A, the inner side and bottom surface of the opening A3, and the inner surfaces of the first trench T1 and the second trench T2. In the following description, the insulating films 109A and 109B are collectively referred to as the insulating film 109. The trench formed by the surface of the insulating film 109B in the opening A3 is referred to as trench T4, and the trench formed by the surface of the insulating film 109B in the trench T3 is referred to as trench T5.

[0089] The insulating film 109B may be omitted. In the case where the insulating film 109B is omitted, the anode electrode 122 and the P-type semiconductor region 104a can be brought into contact with each other not only in the anode contact 108 but also in the second trench T2, which will be described in detail later in the first modified example, thereby making it possible to realize a low-resistance contact.

[0090] On the other hand, when the insulating film 109B is formed, it is possible to reduce damage to the semiconductor substrate 101 caused by ion implantation during contact formation, which will be described later.

[0091] 15, a mask M3 is formed to cover the trench T4 located above the N+ type semiconductor region 106, and acceptors are ion-implanted at a high concentration from above the mask M3 and the insulating film 109. At this time, the mask M3 and the insulating film 109 function as a mask, so that an anode contact 108 containing a high concentration of acceptors is formed at the bottom of the trench T5, which is a region where the insulating film 109 is thin, in other words, on the upper outer periphery of the P type semiconductor region 104 (see, for example, FIG. 7).

[0092] 16, after removing the mask M3, for example, a mask M4 is formed to cover the trenches T5 formed in a lattice shape, and donor ions are implanted at a high concentration from above the mask M4 and the insulating film 109. At this time, the mask M4 and the insulating film 109 function as a mask, so that a cathode contact 107 containing a high concentration of donor is formed in the bottom of the trench T4, which is an area where the insulating film 109 is thin, in other words, in a part of the semiconductor substrate 101 located above the N+ type semiconductor region 106.

[0093] The method for forming the anode contact 108 and the cathode contact 107 is not limited to ion implantation, and various other methods such as solid phase diffusion and plasma doping can be used.

[0094] Next, as shown in FIG. 17, after removing the mask M4, the surface of the insulating film 109 is etched back, for example, to remove the insulating film 109 at the bottom of the trench T4 to expose the cathode contact 107, and the insulating film 109 at the bottom of the trench T5 to expose the anode contact 108.

[0095] In this case, the details of which will be described later in the second modified example, a mask having a predetermined opening pattern may be formed using photolithography or the like, thereby limiting the area in which the insulating film 109 is removed to expose the anode contact 108.

[0096] When the insulating film 109 is etched back over the entire surface, it is possible to secure the contact area between the anode contact 108 and the anode electrode 122, thereby forming a low-resistance contact. In addition, it is possible to bring the anode contact 108 and the anode electrode 122 into contact so as to surround the outer periphery of the P-type semiconductor region 104a, thereby forming a uniform electric field in the photoelectric conversion region 102.

[0097] On the other hand, when the area from which the insulating film 109 is removed is limited, it becomes possible to control the contact area between the anode contact 108 and the anode electrode 122, thereby making it possible to control, for example, the distribution of the electric field formed in the photoelectric conversion region 102.

[0098] In this embodiment, the insulating film 109 remaining in the second trench T2 after the insulating film 109 is thinned is used as the insulating film 112 of the element isolation portion 110.

[0099] Next, for example, a titanium (Ti) / titanium nitride (TiN) film is formed on the exposed surfaces of the cathode contact 107 and the anode contact 108, and annealing is performed in this state at about 500° C. to 800° C. As a result, silicon (Si) and titanium (Ti) react with each other on the exposed surfaces of the cathode contact 107 and the anode contact 108, forming a titanium silicide layer.

[0100] In this way, by silicidating the surfaces (contact surfaces) of the cathode contact 107 and the anode contact 108, the contact between the cathode contact 107 and the cathode electrode 121 and the contact between the anode contact 108 and the anode electrode 122 can be made ohmic contact, making it possible to reduce the resistance of these connections. This makes it possible to reduce the contact area between the anode contact 108 and the anode electrode 122, making it possible to reduce the pixel size and increase the resolution.

[0101] Note that a Co / TiN film may be used instead of the Ti / TiN film. Even in this case, a cobalt silicide layer is formed on the surface (contact surface) of each of the cathode contact 107 and the anode contact 108, so that it is possible to make ohmic contact between the cathode contact 107 and the cathode electrode 121, and between the anode contact 108 and the anode electrode 122.

[0102] Alternatively, various silicides such as nickel silicide may be used instead of titanium silicide or cobalt silicide to make ohmic contact between the cathode contact 107 and the cathode electrode 121, and between the anode contact 108 and the anode electrode 122.

[0103] Next, as shown in FIG. 18, for example, by using a lift-off method or the like, a light-shielding film 111 is formed in the first trench T1, a cathode electrode 121 in contact with the cathode contact 107 is formed in the trench T4, and an anode electrode 122 in contact with the anode contact 108 is formed in the second trench T2.

[0104] As described above, the materials for the light-shielding film 111, the cathode electrode 121, and the anode electrode 122 can be various conductive materials that have the property of reflecting or absorbing visible light or light required for each element, such as tungsten (W) as well as aluminum (Al), aluminum alloys, and copper (Cu).

[0105] When the same material is used for the light-shielding film 111, the cathode electrode 121, and the anode electrode 122, it is possible to form these at the same time. On the other hand, when different materials are used for the light-shielding film 111, the cathode electrode 121, and the anode electrode 122, the light-shielding film 111 is formed first, and then the cathode electrode 121 and the anode electrode 122 are formed by using a lift-off method or the like.

[0106] Next, on the insulating film 109 on which the cathode electrode 121 and the anode electrode 122 are formed, a wiring layer 120 including a wiring 124 connected to the cathode electrode 121, a wiring 126 connected to the anode electrode 122, and an interlayer insulating film 123 is formed. In addition, connection pads 125 and 127 made of copper (Cu) are formed to be exposed on the surface of the interlayer insulating film 123.

[0107] 19, the semiconductor substrate 101 is thinned from the rear surface to penetrate the second trench T2 so that the light shielding film 111 in the second trench T2 reaches the rear surface of the semiconductor substrate 101. For example, chemical mechanical polishing (CMP) may be used to thin the semiconductor substrate 101.

[0108] Next, acceptor ions are implanted into the entire back surface of the semiconductor substrate 101. This completes a P-type semiconductor region 104 surrounding the photoelectric conversion region 102, as shown in FIG.

[0109] Thereafter, a pinning layer 113, a planarizing film 114, a color filter 115, and an on-chip lens 116 are sequentially formed on the rear surface of the semiconductor substrate 101, thereby forming a light receiving chip 71 in the image sensor 10. Then, a separately prepared circuit chip 72 and the light receiving chip 71 are bonded together to produce an image sensor 10 having a cross-sectional structure as exemplified in FIG.

[0110] 1.10 Actions and Effects As described above, in this embodiment, the position of the anode contact 108 and the position of the cathode contact 107 and / or the N+ type semiconductor region 106 are shifted in the height direction. As a result, according to this embodiment, it is possible to increase the distance from the anode contact 108 to the cathode contact 107 and / or the N+ type semiconductor region 106 without increasing the size of the SPAD pixel 20 in the lateral direction (direction parallel to the incident surface). As a result, it is possible to suppress the occurrence of the tunnel effect without increasing the pixel size, and therefore it is possible to stably generate avalanche amplification while suppressing a decrease in resolution.

[0111] 1.11 Variations Next, modified examples of the SPAD pixel 20 according to the first embodiment will be described with reference to some specific examples.

[0112] 1.11.1 First variant FIG. 21 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of a SPAD pixel according to a first modified example.

[0113] As shown in Figure 21, in the SPAD pixel 20a of the first modified example, in a structure similar to the cross-sectional structure described in the first embodiment using Figure 6 etc., the insulating film 112 (corresponding to the insulating film 109B) in the second trench (corresponding to the second trench T2) is omitted.

[0114] In this manner, by omitting the insulating film 112 in the element isolation portion 110, as mentioned in the first embodiment, it becomes possible to bring the anode electrode 122 into contact with the P-type semiconductor region 104 not only at the anode contact 108 but also within the second trench, thereby making it possible to realize a low-resistance contact.

[0115] 1.11.2 Second variant 22 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a surface parallel to the light incident surface of a SPAD pixel according to a second modified example, which corresponds to the surface in FIG.

[0116] 22, in a SPAD pixel 20b according to the second modification, in a structure similar to the cross-sectional structure described in the first embodiment using FIG. 7 etc., the formation region of the anode contact 108A is restricted to be in contact with the P-type semiconductor region 104 at a part of the periphery of the P-type semiconductor region 104. In a specific example, the formation region of the anode contact 108A is restricted to the four corners of a rectangular region partitioned by the element isolation portion 110.

[0117] In this manner, by limiting the formation area of ​​the anode contact 108A, as mentioned in the first embodiment, it is possible to control the contact portion between the anode contact 108 and the anode electrode 122, thereby making it possible to control the distribution of the electric field formed in the photoelectric conversion region 102, etc.

[0118] 1.11.3 Third variant FIG. 23 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of a SPAD pixel according to a third modified example.

[0119] As shown in Figure 23, in a SPAD pixel 20c according to the third modified example, in a structure similar to the cross-sectional structure described in the first embodiment using Figure 6 etc., the P+ type semiconductor region 105A and the N+ type semiconductor region 106A extend until they contact the insulating film 109 formed in the first trench.

[0120] In this way, by expanding the P+ type semiconductor region 105A and the N+ type semiconductor region 106A to the entire region sandwiched by the first trench, it is possible to expand the region in which avalanche amplification occurs, thereby improving the quantum efficiency.

[0121] In addition, by expanding the P+ type semiconductor region 105A to the entire region sandwiched between the first trenches, it is possible to prevent charges generated near the anode contact 108 from flowing directly into the N+ type semiconductor region 106A or the cathode contact 107, thereby reducing charges that do not contribute to avalanche amplification and improving quantum efficiency.

[0122] 1.11.4 Fourth variant FIG. 24 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of a SPAD pixel according to a fourth modified example.

[0123] As shown in Figure 24, in a SPAD pixel 20d relating to the fourth modified example, in a structure similar to the cross-sectional structure described in the first embodiment using Figure 6 etc., the diameter of the first trench is expanded so that the insulating film 109D in the first trench is expanded to at least contact the P+ type semiconductor region 105A.

[0124] In this way, by expanding the diameter of the first trench and bringing the insulating film 109D into contact with the P+ type semiconductor region 105A, it is possible to prevent charges generated near the anode contact 108 from flowing directly into the N+ type semiconductor region 106A or the cathode contact 107, thereby reducing charges that do not contribute to avalanche amplification and improving quantum efficiency.

[0125] 1.11.5 Fifth Variation In the fifth modification, some examples of the connection wiring to the anode in the above-mentioned embodiment and its modifications will be given. Note that, in the following description, for simplicity, the first embodiment will be used as a base.

[0126] Fig. 25 is a diagram showing an example of a connection wiring to an anode according to the first embodiment. As shown in Fig. 25, in the first embodiment, the wiring 152 for applying a reverse bias voltage V_SPAD is connected to the anode electrode 122 of each SPAD pixel 20 in a one-to-one relationship.

[0127] 7, the anode electrode 122 is continuous between the multiple SPAD pixels 20. For example, all the SPAD pixels 20 arranged in the SPAD array section 11 are electrically connected to each other.

[0128] Therefore, it is not essential to provide a configuration in which the wiring 152 is provided one-to-one with the anode electrode 122 of each SPAD pixel 20 .

[0129] For example, it is possible to thin out the arrangement of the wiring 152, for example, by providing wiring 152 for every second SPAD pixel 20 as illustrated in FIG. 26, or by providing wiring 152 for every third SPAD pixel 20 as illustrated in FIG. 27.

[0130] Alternatively, as illustrated in FIG. 28, it is also possible to provide wiring 152 for at least one of the SPAD pixels 20Z located on the outermost periphery of the SPAD array section 11, and not provide wiring 152 for the other SPAD pixels 20 and 20Z.

[0131] In this way, by thinning out the wiring 152, it is possible to simplify the wiring pattern, which makes it possible to simplify the manufacturing process and reduce manufacturing costs.

[0132] In the above-described embodiment and its modified examples, the cathode is N-type and the anode is P-type, but the present invention is not limited to such a combination, and various modifications are possible, such as using a P-type cathode and an N-type anode.

[0133] 2. Second embodiment Next, a solid-state imaging device and an electronic device according to a second embodiment will be described in detail with reference to the drawings.

[0134] The SPAD pixels 20, 20a, 20b, 20c, and 20d according to the above-described first embodiment and its modified examples are not limited to the electronic device 1 as an imaging device that acquires image data such as a color image, but can also be used in an electronic device as, for example, a distance measuring device that measures the distance to an object.

[0135] Fig. 29 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of a SPAD pixel according to the second embodiment. As shown in Fig. 29, a SPAD pixel 220 has a structure similar to the cross-sectional structure described in the first embodiment using Fig. 6 etc., except that the color filter 115 is omitted.

[0136] In this way, even when the SPAD pixel 220 is used in an electronic device as a distance measuring device, similarly to the first embodiment, by shifting the position of the anode contact 108 and the position of the cathode contact 107 and / or the N+ type semiconductor region 106 in the height direction, it is possible to increase the distance from the anode contact 108 to the cathode contact 107 and / or the N+ type semiconductor region 106 without increasing the size of the SPAD pixel 220 in the lateral direction (direction parallel to the incident surface). As a result, it is possible to suppress the occurrence of the tunnel effect without increasing the pixel size, and therefore it is possible to stably generate avalanche amplification while suppressing a decrease in resolution.

[0137] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0138] 3. Third embodiment Next, a solid-state imaging device and an electronic device according to a third embodiment will be described in detail with reference to the drawings.

[0139] In the above-described embodiment and its modified example, an FFTI type element isolation portion 110 in which the second trench penetrates the semiconductor substrate 101 from the front side to the back side has been exemplified, but as described above, the element isolation portion 110 is not limited to the FFTI type.

[0140] Fig. 30 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of a SPAD pixel according to the third embodiment. As shown in Fig. 30, a SPAD pixel 320 has a structure similar to the cross-sectional structure described in the first embodiment using Fig. 6 etc., in which the FFTI type element isolation unit 110 is replaced with a DTI type element isolation unit 310.

[0141] The DTI type element isolation portion 310 is provided with an insulating film 312 that covers the inner side and bottom surface of a second trench formed in a second trench from the front surface side (the bottom surface side in the drawing) of the semiconductor substrate 101 so as not to reach the back surface, and a light-shielding film 311 that fills the second trench whose inner surface is covered with the insulating film 312.

[0142] Such an element isolation portion 310 can be realized, for example, by forming the second trench shallow or by using a thick semiconductor substrate 101.

[0143] As described above, according to this embodiment, the DTI type element isolation portion 310 is used, which is formed from the front surface side of the semiconductor substrate 101. This makes it possible to facilitate the process of thinning the semiconductor substrate 101 from the rear surface side.

[0144] Furthermore, by using the DTI type element isolation portion 310 formed from the front surface side of the semiconductor substrate 101, the P-type semiconductor region 104 is not isolated for each SPAD pixel 320 on the rear surface side of the semiconductor substrate 101. This suppresses the variation in the electric field applied to each SPAD pixel 320 due to the variation in contact resistance between the P-type semiconductor region 104 and the anode contact 108, and the electric field is leveled for each SPAD pixel 320, thereby improving the yield of the image sensor 10.

[0145] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0146] 4. Fourth embodiment Next, a solid-state imaging device and an electronic device according to a fourth embodiment will be described in detail with reference to the drawings.

[0147] Fig. 31 is a vertical cross-sectional view showing an example of the cross-sectional structure perpendicular to the light incident surface of a SPAD pixel according to the fourth embodiment. As shown in Fig. 31, a SPAD pixel 420 has a structure in which an anode contact 408 is provided at the bottom of a second trench in the same configuration as the SPAD pixel 320 described in the third embodiment with reference to Fig. 30.

[0148] According to this structure, the light-shielding film 311, which is electrically continuous with the anode electrode 122, is electrically connected to the P-type semiconductor region 104 on the back surface side of the semiconductor substrate 101 via the anode contact 408 at the bottom of the second trench. This makes it possible to further reduce the contact resistance between the P-type semiconductor region 104 and the anode contact 108 and also to suppress the variation in the contact resistance, thereby making it possible to further suppress the variation in the way the electric field is applied to each SPAD pixel 320. As a result, the electric field for each SPAD pixel 320 is further leveled, making it possible to further improve the yield of the image sensor 10.

[0149] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0150] 5. Fifth embodiment Next, a solid-state imaging device and an electronic device according to a fifth embodiment will be described in detail with reference to the drawings.

[0151] In the above-described third and fourth embodiments, a DTI type element isolation unit 310 provided in a second trench formed from the front surface side of the semiconductor substrate 101 is illustrated. In contrast, in the fifth embodiment, a RDTI type element isolation unit provided in a second trench formed from the rear surface side of the semiconductor substrate 101 is illustrated.

[0152] Fig. 32 is a vertical cross-sectional view showing an example of the cross-sectional structure perpendicular to the light incident surface of a SPAD pixel according to the fifth embodiment. As shown in Fig. 32, a SPAD pixel 520 has a structure similar to the cross-sectional structure described in the third embodiment with reference to Fig. 30, in which the FFTI type element isolation section 110 is replaced with a RDTI type element isolation section 510 and the anode contact 108 is replaced with an anode contact 508.

[0153] The RDTI type element isolation portion 510 is provided with an insulating film 512 that covers the inner side and bottom surfaces of a second trench formed in a second trench from the back surface side (top surface side in the drawing) of the semiconductor substrate 101 so as not to reach the surface, and a light-shielding film 511 that fills the second trench whose inner surface is covered with the insulating film 512.

[0154] With such a structure, the anode electrode 122 and the element isolation portion 520 are separated, so that it is possible to form the anode contact 508 on the entire back surface of the anode electrode 122. This makes it possible to further reduce the contact resistance between the P-type semiconductor region 104 and the anode contact 108, thereby realizing a SPAD pixel 520 with better characteristics.

[0155] Furthermore, since the second trench can be formed from the back surface side of the semiconductor substrate 101, the process of forming the element isolation portion 520 can be simplified, for example, compared to the case of forming the DTI type element isolation portion 310 according to the third or fourth embodiment.

[0156] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0157] 6. Sixth embodiment Next, a solid-state imaging device and an electronic device according to a sixth embodiment will be described in detail with reference to the drawings.

[0158] In the above-described embodiment and its modified example, for example, a case where one photodiode 21 is provided for one color filter 115R, 115G, or 115B constituting the Bayer array color filter array 60 has been illustrated. However, when photon counting is performed using an avalanche photodiode, even if multiple photons are incident on one photodiode 21 during one avalanche amplification, the incidence of the photons is counted as one. Therefore, in order to count the number of incident photons more accurately, it is preferable to reduce the area occupied by one photodiode. In addition, when the illuminance is high, it is possible to expand the dynamic range of each SPAD pixel 20 by reducing the area occupied by one photodiode.

[0159] 33, in the sixth embodiment, each of the SPAD pixels 20R, 20G, and 20B (hereinafter, when the SPAD pixels 20R, 20G, and 20B are not distinguished from one another, the reference number is 20) is divided into a plurality (four, in this example, 2×2 pixels) of SPAD pixels 620R, 620G, or 620B (hereinafter, when the SPAD pixels 620R, 620G, and 620B are not distinguished from one another, the reference number is 620). Alternatively, a single color filter 115R, 115G, or 115B is shared by a plurality of SPAD pixels 620, 620G, or 620B.

[0160] In this way, by dividing one SPAD pixel 20 into multiple SPAD pixels 620, it is possible to reduce the area of ​​each SPAD pixel 620, and therefore it is possible to count the number of incident photons more accurately. In addition, since the area occupied by one photodiode is reduced, it is also possible to expand the dynamic range of each SPAD pixel 20.

[0161] 34, it is not necessary to provide the element isolation section 110 between the SPAD pixels 620 obtained by dividing one SPAD pixel 20. In that case, instead of the element isolation section 110, the P-type semiconductor region 104 may be disposed between the SPAD pixels 620. This allows the pixel pitch to be reduced compared to the case where the element isolation section 110 is provided, and therefore the image sensor 10 can be made even smaller.

[0162] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0163] 7. Seventh embodiment Next, a solid-state imaging device and an electronic device according to a seventh embodiment will be described in detail with reference to the drawings.

[0164] In the sixth embodiment described above, a case where the P-type semiconductor region 104 is disposed between a plurality of SPAD pixels 620 divided from one SPAD pixel 20 has been illustrated, but the present invention is not limited to such a structure.

[0165] For example, as shown in FIG. 35, a trench may be provided in adjacent SPAD pixels 620, and the trench may be filled with an insulating film 710.

[0166] With such a structure, it is possible to suppress optical crosstalk between adjacent SPAD pixels 620, and therefore it is possible to count the number of incident photons more accurately.

[0167] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0168] 8. Eighth embodiment Next, a solid-state imaging device and an electronic device according to an eighth embodiment will be described in detail with reference to the drawings.

[0169] The element isolation portions 110 and 510 in the above-described embodiment and its modified examples are not limited to the semiconductor substrate 101, and may extend through to above the color filter 115, for example, as shown in FIG.

[0170] In this manner, by adopting a structure in which the element isolation portion 110 penetrates the color filter 115 and protrudes upward, crosstalk between adjacent SPAD pixels 20 can be reduced.

[0171] The other configurations, operations, and effects may be similar to those of the above-described embodiment or its modified examples, so detailed description will be omitted here.

[0172] 9. Ninth embodiment Next, a solid-state imaging device and an electronic device according to a ninth embodiment will be described in detail with reference to the drawings.

[0173] In the above-described embodiment and its modified examples, for example, the anode contact 108 is provided at the step between the first trench T1 and the second trench T2. In the ninth embodiment, a configuration for increasing the contact area between the anode contact and the anode electrode in such a structure will be described.

[0174] 9.1 Example of cross-sectional structure of a SPAD pixel Fig. 37 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident plane of a SPAD pixel according to the ninth embodiment, and Fig. 38 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane in Fig. 37.

[0175] 37 and 38, for the convenience of the following explanation, the boundary between the photoelectric conversion region 102 and the P-type semiconductor region 104 is slightly different from that in the previous drawings. For example, the upper surface of the photoelectric conversion region 102, that is, the surface facing the front surface (the lower surface in the drawings) of the semiconductor substrate 101, is drawn at the same height as the bottom of the first trench. In addition, the side surface of the P-type semiconductor region 104 is drawn further inward than the inner end of the anode contact 908.

[0176] 37, the lower end of the anode electrode 922 included in the SPAD pixel 920 according to the ninth embodiment is not horizontal but inclined with respect to the surface of the semiconductor substrate 101. More specifically, the lower end of the anode electrode 922 is inclined in the depth direction of the semiconductor substrate 101, that is, toward the second trench, from the end of the anode electrode 922 in the width direction toward the center where the light-shielding film 111 in the second trench is connected. For this reason, the distance from the center of the anode electrode 922 in the width direction to the surface of the semiconductor substrate 101 is longer than the distance from the end of the anode electrode 922 in the width direction to the surface of the semiconductor substrate 101.

[0177] Furthermore, the anode contact 908 provided at the step between the first trench and the second trench comes into contact with the inclined lower end of the anode electrode 922. That is, the anode contact 908 and the anode electrode 922 have an inclined contact surface. This makes the contact area between the anode contact 908 and the anode electrode 922 larger than when the contact surface between the anode contact 108 and the anode electrode 122 is horizontal to the surface of the semiconductor substrate 101, as in the SPAD pixel 20 of the first embodiment, for example.

[0178] To obtain such a structure, for example, the following manufacturing method can be adopted.

[0179] Fig. 39 is a process cross-sectional view showing a method for manufacturing a solid-state imaging device according to the ninth embodiment. As shown in Fig. 39, in the ninth embodiment, at a manufacturing stage similar to the cross-sectional structure described in the first embodiment with reference to Fig. 17, a connection portion T5s at the bottom of the trench T5 with the second trench T2 has a structure having an inclination.

[0180] 39 shows a state in which acceptors are ion-implanted at a high concentration into the bottom of trench T5 from above insulating film 109, and then the surface of insulating film 109 is etched back entirely to remove insulating film 109 at the bottom of trench T5. At this time, by performing the etch-back of insulating film 109 for a longer period than in the first embodiment, the connection portion with second trench T2 that protrudes at an angle close to a right angle can be rounded off, a portion of the bottom of trench T5 can be tilted, and the anode contact 908 can be exposed.

[0181] Thereafter, by filling the trench T5 with a conductive material, an anode electrode 922 that contacts the anode contact 908 at an inclined surface can be formed in the first trench T1 whose side surfaces are covered with the insulating film 109.

[0182] 9.2 Actions and Effects As described above, in this embodiment, the surface where the anode contact 908 and the anode electrode 922 contact each other is inclined with respect to the surface of the semiconductor substrate 101. As a result, according to this embodiment, the contact area between the anode contact 908 and the anode electrode 922 can be increased, thereby reducing the contact resistance.

[0183] When light is irradiated onto the photodiode, a large current flows between the anode contact and the anode electrode. At this time, if the contact resistance of the anode contact is high, a voltage drop occurs.

[0184] In this embodiment, such a voltage drop can be suppressed, and the PDE can be improved. In addition, since there is no need to increase the voltage value to compensate for the dropped voltage, it is possible to reduce the power consumption of the solid-state imaging device. It is expected that the effect of reducing the contact resistance will be further enhanced as the miniaturization of photodiodes progresses.

[0185] 9.3 Variations Next, modified examples of the SPAD pixel 920 according to the ninth embodiment will be described with reference to some specific examples.

[0186] In the SPAD pixel according to the modified example, the first trench and the second trench extend so as to surround the element region while taking a circuitous path. That is, in this example in which the photodiodes 21 are arranged in a grid shape, the length of one side of the first trench and the second trench is longer than the pitch of the photodiodes 21.

[0187] In this way, the first trench and the second trench surrounding the element region have redundancy in the extension direction, so that the contact area between the anode contact and the anode electrode can be increased.

[0188] 9.3.1 First variant Fig. 40 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a surface parallel to the light incident surface of a SPAD pixel according to a first modification of the ninth embodiment. Note that Fig. 40 is a surface corresponding to Fig. 38.

[0189] 40, the SPAD pixel 920a according to the first modification includes a first trench T1a having a zigzag shape in the extension direction of each side in a cross-sectional structure similar to that described in the ninth embodiment with reference to FIG. 38, etc. A second trench provided along the bottom of the first trench T1a also has a zigzag shape in the extension direction of each side.

[0190] The anode electrode 922a provided in the first trench T1a has a zigzag shape in the extension direction of each side along the first trench T1a, and the light-shielding film provided in the second trench also has a zigzag shape in the extension direction of each side.

[0191] The anode contact 908a has a zigzag shape in the extension direction of each side along the anode electrode 922a, and contacts the anode electrode 922a. This makes the extension distance per side of the first trench T1a longer than when one side of the first trench is straight, as in the SPAD pixel 920 of the ninth embodiment, and increases the contact area between the anode contact 908a and the anode electrode 922a.

[0192] 9.3.2 Second variant Fig. 41 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a surface parallel to the light incident surface of a SPAD pixel according to a second modification of the ninth embodiment. Note that Fig. 41 shows a surface corresponding to Fig. 38.

[0193] 41, a SPAD pixel 920b according to the second modification includes a first trench T1b having a crank shape in the extension direction of each side in a cross-sectional structure similar to that described in the ninth embodiment using FIG. 38, etc. A second trench provided along the bottom of the first trench T1b also has a crank shape in the extension direction of each side.

[0194] The anode electrode 922b provided in the first trench T1b has a crank shape in the extension direction of each side along the first trench T1b, and the light-shielding film provided in the second trench also has a crank shape in the extension direction of each side.

[0195] The anode contact 908b has a crank shape in the extension direction of each side along the anode electrode 922b, and contacts the anode electrode 922b. This makes the extension distance per side of the first trench T1b longer than when one side of the first trench is straight, as in the SPAD pixel 920 of the ninth embodiment, and increases the contact area between the anode contact 908b and the anode electrode 922b.

[0196] 9.3.3 Third variant Fig. 42 is a horizontal cross-sectional view showing an example of the cross-sectional structure of a surface parallel to the light incident surface of a SPAD pixel according to a third modified example of the ninth embodiment. Note that Fig. 42 is a surface corresponding to Fig. 38.

[0197] 42, a SPAD pixel 920c according to the third modification has a cross-sectional structure similar to that described in the ninth embodiment with reference to FIG. 38 and the like, and includes a first trench T1a, an anode electrode 922a, and an anode contact 908a, each of which is zigzag in the direction of extension of each side, similar to the first modification. The second trench and the light-shielding film also have a zigzag shape in the direction of extension of each side, similar to the first modification.

[0198] The P-type semiconductor region 904c has a zigzag shape in the extension direction of each side along the anode contact 908a, and is in contact with the anode contact 908a. This makes it possible to increase the effective area of ​​the photoelectric conversion region 102, which is a region sensitive to light, compared to a case in which one side of the P-type semiconductor region is linear, such as in the SPAD pixel 920a according to the first modified example.

[0199] As described above, in the first to third modified examples, at least the anode contact and the anode electrode have a zigzag or crank shape in the extension direction of each side. However, as long as the distance between the anode contact and the anode electrode is increased to increase the contact area therebetween, the anode contact and the anode electrode may have other shapes, such as a meandering or wave shape.

[0200] In the above, the configurations of the first to third modified examples are applied to the configuration of the ninth embodiment, that is, the configuration in which the anode contact 908 and the anode electrode 922 contact each other at an inclined surface, but the present invention is not limited to this. The configurations of the first to third modified examples may be applied to a configuration in which the contact surface between the anode contact 108 and the anode electrode 122 is horizontal, for example, as in the configuration of the first embodiment.

[0201] Also, for example, in the configuration of the first modified example of the first embodiment, the insulating film 112 is not formed in the second trench, and the anode contact 108 is also in contact with the light-shielding film 111 formed of, for example, a conductive material. If the configurations of the first to third modified examples are applied to such a configuration, the contact area between the anode contact and the anode electrode is added to the contact area between the anode contact and the light-shielding film, and the contact resistance can be further reduced. In this case, if the contact surface between the anode contact and the anode electrode is horizontal, the contact area between the anode contact and the anode electrode is small, but the contact area between the anode contact and the light-shielding film is large. Therefore, in order to increase the contact area between the anode contact and the anode electrode and the light-shielding film, it is only necessary to appropriately select either a configuration in which the contact surface between the anode contact and the anode electrode is horizontal or a configuration in which the contact surface is inclined.

[0202] 10. Application examples to electronic devices The above-described solid-state imaging element can be applied to various electronic devices, such as imaging devices such as digital still cameras and digital video cameras, mobile phones with imaging functions, and other devices with imaging functions.

[0203] FIG. 43 is a block diagram showing an example configuration of an imaging device as an electronic device to which the present technology is applied.

[0204] An imaging device 8201 shown in FIG. 43 comprises an optical system 8202, a shutter device 8203, a solid-state imaging element 8204, a drive circuit 8205, a signal processing circuit 8206, a monitor 8207, and a memory 8208, and is capable of capturing still and moving images.

[0205] The optical system 8202 is configured to have one or more lenses, and guides light from a subject (incident light) to a solid-state image sensor 8204 , forming an image on the light receiving surface of the solid-state image sensor 8204 .

[0206] The shutter device 8203 is disposed between the optical system 8202 and the solid-state image sensor 8204 , and controls the light irradiation period and light blocking period for the solid-state image sensor 8204 under the control of the drive circuit 1005 .

[0207] The solid-state imaging element 8204 is configured by a package including the above-mentioned solid-state imaging element. The solid-state imaging element 8204 accumulates signal charges for a certain period of time in response to light imaged on the light receiving surface via the optical system 8202 and the shutter device 8203. The signal charges accumulated in the solid-state imaging element 8204 are transferred in accordance with a drive signal (timing signal) supplied from a drive circuit 8205.

[0208] The drive circuit 8205 outputs drive signals that control the transfer operation of the solid-state image sensor 8204 and the shutter operation of the shutter device 8203 to drive the solid-state image sensor 8204 and the shutter device 8203 .

[0209] The signal processing circuit 8206 performs various signal processing on the signal charges output from the solid-state imaging element 8204. An image (image data) obtained by performing the signal processing by the signal processing circuit 8206 is supplied to a monitor 8207 and displayed, or supplied to a memory 8208 and stored (recorded).

[0210] In the imaging device 8201 configured in this manner, by applying the solid-state imaging element 1 instead of the solid-state imaging element 8204 described above, it becomes possible to realize imaging with low noise in all pixels.

[0211] 11. Mobile application examples The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, a construction machine, an agricultural machine (tractor), etc.

[0212] Fig. 44 is a block diagram showing a schematic configuration example of a vehicle control system 7000 which is an example of a mobile object control system to which the technology according to the present disclosure can be applied. The vehicle control system 7000 includes a plurality of electronic control units connected via a communication network 7010. In the example shown in Fig. 44, the vehicle control system 7000 includes a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an outside-vehicle information detection unit 7400, an inside-vehicle information detection unit 7500, and an integrated control unit 7600. The communication network 7010 connecting these multiple control units may be an in-vehicle communication network conforming to any standard such as CAN (Controller Area Network), LIN (Local Interconnect Network), LAN (Local Area Network), or FlexRay (registered trademark).

[0213] Each control unit includes a microcomputer that performs arithmetic processing according to various programs, a storage unit that stores the programs executed by the microcomputer or parameters used in various calculations, and a drive circuit that drives various control target devices. Each control unit includes a network I / F for communicating with other control units via a communication network 7010, and a communication I / F for communicating with devices or sensors inside and outside the vehicle by wired communication or wireless communication. In FIG. 44, a microcomputer 7610, a general-purpose communication I / F 7620, a dedicated communication I / F 7630, a positioning unit 7640, a beacon receiving unit 7650, an in-vehicle device I / F 7660, an audio / video output unit 7670, an in-vehicle network I / F 7680, and a storage unit 7690 are illustrated as functional configurations of the integrated control unit 7600. Other control units also include a microcomputer, a communication I / F, a storage unit, and the like.

[0214] The drivetrain control unit 7100 controls the operation of devices related to the drivetrain of the vehicle according to various programs. For example, the drivetrain control unit 7100 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle. The drivetrain control unit 7100 may also function as a control device such as an ABS (Antilock Brake System) or an ESC (Electronic Stability Control).

[0215] A vehicle state detection unit 7110 is connected to the drive system control unit 7100. The vehicle state detection unit 7110 includes at least one of a gyro sensor that detects the angular velocity of the axial rotational motion of the vehicle body, an acceleration sensor that detects the acceleration of the vehicle, or a sensor for detecting the amount of operation of an accelerator pedal, the amount of operation of a brake pedal, the steering angle of a steering wheel, the engine rotation speed, or the rotation speed of wheels, for example. The drive system control unit 7100 performs arithmetic processing using signals input from the vehicle state detection unit 7110, and controls the internal combustion engine, the drive motor, the electric power steering device, the brake device, etc.

[0216] The body system control unit 7200 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 7200 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 7200. The body system control unit 7200 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0217] The battery control unit 7300 controls the secondary battery 7310, which is a power supply source for the drive motor, according to various programs. For example, information such as battery temperature, battery output voltage, or remaining capacity of the battery is input to the battery control unit 7300 from a battery device equipped with the secondary battery 7310. The battery control unit 7300 performs calculation processing using these signals, and controls the temperature regulation of the secondary battery 7310 or controls a cooling device or the like equipped in the battery device.

[0218] The outside-vehicle information detection unit 7400 detects information outside the vehicle equipped with the vehicle control system 7000. For example, at least one of an imaging unit 7410 and an outside-vehicle information detection unit 7420 is connected to the outside-vehicle information detection unit 7400. The imaging unit 7410 includes at least one of a ToF (Time Of Flight) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. The outside-vehicle information detection unit 7420 includes at least one of an environmental sensor for detecting the current weather or climate, or a surrounding information detection sensor for detecting other vehicles, obstacles, pedestrians, and the like around the vehicle equipped with the vehicle control system 7000.

[0219] The environmental sensor may be, for example, at least one of a raindrop sensor that detects rain, a fog sensor that detects fog, a sunshine sensor that detects the degree of sunshine, and a snow sensor that detects snowfall. The surrounding information detection sensor may be at least one of an ultrasonic sensor, a radar device, and a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device. The imaging unit 7410 and the outside vehicle information detection unit 7420 may be provided as independent sensors or devices, or may be provided as a device in which multiple sensors or devices are integrated.

[0220] Here, FIG. 45 shows an example of the installation positions of the imaging unit 7410 and the vehicle exterior information detection unit 7420. The imaging units 7910, 7912, 7914, 7916, and 7918 are provided, for example, at least one of the front nose, side mirrors, rear bumper, back door, and upper part of the windshield in the vehicle interior of the vehicle 7900. The imaging unit 7910 provided on the front nose and the imaging unit 7918 provided on the upper part of the windshield in the vehicle interior mainly acquire images of the front of the vehicle 7900. The imaging units 7912 and 7914 provided on the side mirrors mainly acquire images of the sides of the vehicle 7900. The imaging unit 7916 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 7900. The imaging unit 7918 provided on the upper part of the windshield in the vehicle interior is mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0221] 45 shows an example of the imaging ranges of the imaging units 7910, 7912, 7914, and 7916. Imaging range a indicates the imaging range of the imaging unit 7910 provided on the front nose, imaging ranges b and c indicate the imaging ranges of the imaging units 7912 and 7914 provided on the side mirrors, and imaging range d indicates the imaging range of the imaging unit 7916 provided on the rear bumper or back door. For example, image data captured by the imaging units 7910, 7912, 7914, and 7916 are superimposed to obtain an overhead image of the vehicle 7900 viewed from above.

[0222] The outside information detection units 7920, 7922, 7924, 7926, 7928, and 7930 provided on the front, rear, sides, and corners of the vehicle 7900 and on the upper part of the windshield inside the vehicle cabin may be, for example, ultrasonic sensors or radar devices. The outside information detection units 7920, 7926, and 7930 provided on the front nose, rear bumper, back door, and on the upper part of the windshield inside the vehicle cabin of the vehicle 7900 may be, for example, LIDAR devices. These outside information detection units 7920 to 7930 are mainly used to detect preceding vehicles, pedestrians, obstacles, and the like.

[0223] Returning to FIG. 44, the description will be continued. The outside-vehicle information detection unit 7400 causes the imaging unit 7410 to capture an image outside the vehicle, and receives the captured image data. The outside-vehicle information detection unit 7400 also receives detection information from the outside-vehicle information detection unit 7420 connected thereto. When the outside-vehicle information detection unit 7420 is an ultrasonic sensor, a radar device, or a LIDAR device, the outside-vehicle information detection unit 7400 transmits ultrasonic waves or electromagnetic waves, and receives information on the received reflected waves. The outside-vehicle information detection unit 7400 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, or characters on the road surface, based on the received information. The outside-vehicle information detection unit 7400 may perform environment recognition processing for recognizing rainfall, fog, road surface conditions, and the like, based on the received information. The outside-vehicle information detection unit 7400 may calculate the distance to an object outside the vehicle based on the received information.

[0224] Furthermore, the outside vehicle information detection unit 7400 may perform image recognition processing or distance detection processing to recognize people, cars, obstacles, signs, or characters on the road surface, based on the received image data. The outside vehicle information detection unit 7400 may perform processing such as distortion correction or position adjustment on the received image data, and may generate an overhead image or a panoramic image by synthesizing image data captured by different imaging units 7410. The outside vehicle information detection unit 7400 may perform viewpoint conversion processing using image data captured by different imaging units 7410.

[0225] The in-vehicle information detection unit 7500 detects information inside the vehicle. For example, a driver state detection unit 7510 that detects the state of the driver is connected to the in-vehicle information detection unit 7500. The driver state detection unit 7510 may include a camera that captures an image of the driver, a biosensor that detects the bioinformation of the driver, or a microphone that collects sound in the vehicle cabin. The biosensor is provided, for example, on the seat or steering wheel, and detects the bioinformation of a passenger sitting in the seat or a driver gripping the steering wheel. The in-vehicle information detection unit 7500 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 7510, or may determine whether the driver is dozing. The in-vehicle information detection unit 7500 may perform processing such as noise canceling processing on the collected sound signal.

[0226] The integrated control unit 7600 controls the overall operation of the vehicle control system 7000 according to various programs. The input unit 7800 is connected to the integrated control unit 7600. The input unit 7800 is realized by a device that can be operated by an occupant to input, such as a touch panel, a button, a microphone, a switch, or a lever. Data obtained by voice recognition of a voice input by a microphone may be input to the integrated control unit 7600. The input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an externally connected device such as a mobile phone or a PDA (Personal Digital Assistant) that supports the operation of the vehicle control system 7000. The input unit 7800 may be, for example, a camera, in which case the occupant can input information by gestures. Alternatively, data obtained by detecting the movement of a wearable device worn by the occupant may be input. Furthermore, the input unit 7800 may include, for example, an input control circuit that generates an input signal based on information input by the occupant using the above-mentioned input unit 7800 and outputs the input signal to the integrated control unit 7600. A passenger or the like operates the input unit 7800 to input various data to the vehicle control system 7000 and to instruct processing operations.

[0227] The storage unit 7690 may include a ROM (Read Only Memory) that stores various programs executed by the microcomputer, and a RAM (Random Access Memory) that stores various parameters, calculation results, sensor values, etc. The storage unit 7690 may be realized by a magnetic storage device such as an HDD (Hard Disc Drive), a semiconductor storage device, an optical storage device, or a magneto-optical storage device, etc.

[0228] The general-purpose communication I / F 7620 is a general-purpose communication I / F that mediates communication between various devices present in the external environment 7750. The general-purpose communication I / F 7620 may implement a cellular communication protocol such as GSM (registered trademark), WiMAX (registered trademark), LTE (registered trademark) (Long Term Evolution) or LTE-Advanced (LTE-A), or other wireless communication protocols such as wireless LAN (also called Wi-Fi (registered trademark)) and Bluetooth (registered trademark). The general-purpose communication I / F 7620 may connect to a device (e.g., an application server or a control server) present on an external network (e.g., the Internet, a cloud network, or a carrier-specific network) via, for example, a base station or an access point. The general-purpose communication I / F 7620 may also connect to a terminal (e.g., a driver's, pedestrian's, or store's terminal, or a Machine Type Communication (MTC) terminal) present in the vicinity of the vehicle using, for example, a Peer To Peer (P2P) technology.

[0229] The dedicated communication I / F 7630 is a communication I / F that supports a communication protocol designed for use in a vehicle. The dedicated communication I / F 7630 may implement a standard protocol such as WAVE (Wireless Access in Vehicle Environment), which is a combination of a lower layer IEEE802.11p and a higher layer IEEE1609, DSRC (Dedicated Short Range Communications), or a cellular communication protocol. The dedicated communication I / F 7630 typically performs V2X communication, which is a concept including one or more of vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.

[0230] The positioning unit 7640 performs positioning by receiving, for example, a GNSS signal from a Global Navigation Satellite System (GNSS) satellite (for example, a GPS signal from a Global Positioning System (GPS) satellite) and generates position information including the latitude, longitude, and altitude of the vehicle. The positioning unit 7640 may identify the current position by exchanging signals with a wireless access point, or may obtain position information from a terminal such as a mobile phone, PHS, or smartphone having a positioning function.

[0231] The beacon receiving unit 7650 receives, for example, radio waves or electromagnetic waves transmitted from radio stations or the like installed on the road, and acquires information such as the current location, congestion, road closure, required time, etc. The function of the beacon receiving unit 7650 may be included in the dedicated communication I / F 7630 described above.

[0232] The in-vehicle device I / F 7660 is a communication interface that mediates a connection between the microcomputer 7610 and various in-vehicle devices 7760 present in the vehicle. The in-vehicle device I / F 7660 may establish a wireless connection using a wireless communication protocol such as wireless LAN, Bluetooth (registered trademark), NFC (Near Field Communication), or WUSB (Wireless USB). In addition, the in-vehicle device I / F 7660 may establish a wired connection such as a Universal Serial Bus (USB), a High-Definition Multimedia Interface (HDMI (registered trademark), or a Mobile High-definition Link (MHL)) via a connection terminal (and a cable, if necessary) not shown. The in-vehicle device 7760 may include, for example, at least one of a mobile device or a wearable device owned by a passenger, or an information device carried into or attached to the vehicle. The in-vehicle device 7760 may also include a navigation device that searches for a route to an arbitrary destination. The in-vehicle device I / F 7660 exchanges control signals or data signals with these in-vehicle devices 7760.

[0233] The in-vehicle network I / F 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010. The in-vehicle network I / F 7680 transmits and receives signals in accordance with a predetermined protocol supported by the communication network 7010.

[0234] The microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 according to various programs based on information acquired through at least one of the general-purpose communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I / F 7660, and the in-vehicle network I / F 7680. For example, the microcomputer 7610 may calculate a control target value of a driving force generating device, a steering mechanism, or a braking device based on the acquired information inside and outside the vehicle, and output a control command to the drive system control unit 7100. For example, the microcomputer 7610 may perform cooperative control for the purpose of realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc. In addition, the microcomputer 7610 may perform cooperative control for the purpose of autonomous driving, in which the vehicle travels autonomously without relying on driver operation, by controlling a driving force generating device, a steering mechanism, a braking device, etc. based on information acquired about the vehicle's surroundings.

[0235] The microcomputer 7610 may generate three-dimensional distance information between the vehicle and objects such as surrounding structures and people, and create local map information including peripheral information of the current position of the vehicle, based on information acquired via at least one of the general-purpose communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I / F 7660, and the in-vehicle network I / F 7680. The microcomputer 7610 may also predict dangers such as vehicle collisions, the approach of pedestrians, or entry into a closed road, based on the acquired information, and generate a warning signal. The warning signal may be, for example, a signal for generating a warning sound or turning on a warning lamp.

[0236] The audio / image output unit 7670 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of FIG. 44, an audio speaker 7710, a display unit 7720, and an instrument panel 7730 are illustrated as output devices. The display unit 7720 may include at least one of an on-board display and a head-up display, for example. The display unit 7720 may have an AR (Augmented Reality) display function. The output device may be other devices such as headphones, a wearable device such as a glasses-type display worn by the passenger, a projector, or a lamp, other than these devices. When the output device is a display device, the display device visually displays the results obtained by various processes performed by the microcomputer 7610 or information received from other control units in various formats such as text, image, table, graph, etc. When the output device is an audio output device, the audio output device converts an audio signal consisting of reproduced audio data or acoustic data into an analog signal and audibly outputs it.

[0237] In the example shown in FIG. 44, at least two control units connected via the communication network 7010 may be integrated into one control unit. Alternatively, each control unit may be composed of multiple control units. Furthermore, the vehicle control system 7000 may include another control unit not shown. In the above description, some or all of the functions performed by any control unit may be provided by another control unit. In other words, as long as information is transmitted and received via the communication network 7010, a predetermined arithmetic processing may be performed by any control unit. Similarly, a sensor or device connected to any control unit may be connected to another control unit, and multiple control units may transmit and receive detection information to each other via the communication network 7010.

[0238] A computer program for implementing each function of the electronic device 1 according to the present embodiment described with reference to FIG. 1 can be implemented in any control unit or the like. A computer-readable recording medium in which such a computer program is stored can also be provided. The recording medium is, for example, a magnetic disk, an optical disk, a magneto-optical disk, a flash memory, or the like. The computer program may also be distributed, for example, via a network, without using a recording medium.

[0239] In the vehicle control system 7000 described above, the electronic device 1 according to the present embodiment described with reference to Fig. 1 can be applied to the integrated control unit 7600 of the application example shown in Fig. 44. For example, the storage unit 40 and the processor 50 of the electronic device 1 correspond to the microcomputer 7610, the storage unit 7690, and the in-vehicle network I / F 7680 of the integrated control unit 7600. However, without being limited thereto, the vehicle control system 7000 may correspond to the host 80 in Fig. 1.

[0240] At least some of the components of the electronic device 1 according to the present embodiment described with reference to Fig. 1 may be realized in a module (for example, an integrated circuit module configured on a single die) for the integrated control unit 7600 shown in Fig. 44. Alternatively, the electronic device 1 according to the present embodiment described with reference to Fig. 1 may be realized by a plurality of control units of the vehicle control system 7000 shown in Fig. 44.

[0241] 12. Application example to endoscopic surgery system In addition, the technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0242] FIG. 46 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0243] 46 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0244] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel.

[0245] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0246] An optical system and an image sensor are provided inside the camera head 11102, and reflected light (observation light) from an observation target is collected on the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as RAW data.

[0247] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0248] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0249] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing an operation site or the like.

[0250] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 11100.

[0251] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing the field of view of the endoscope 11100 and securing the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, image, or graph.

[0252] The light source device 11203 that supplies irradiation light to the endoscope 11100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation object with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0253] The light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. The driving of the image sensor of the camera head 11102 may be controlled in synchronization with the timing of the change in the light intensity to obtain images in a time-division manner, and the images may be synthesized to generate an image with a high dynamic range that is free of so-called blackout and whiteout.

[0254] The light source device 11203 may be configured to supply light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, by utilizing the wavelength dependency of light absorption in body tissue, a narrow band light is irradiated compared to the irradiated light (i.e., white light) during normal observation, and a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast, so-called narrow band imaging is performed. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating an excitation light. In the fluorescent observation, it is possible to irradiate an excitation light to a body tissue and observe the fluorescence from the body tissue (autofluorescence observation), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0255] FIG. 47 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0256] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so as to be able to communicate with each other.

[0257] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0258] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be one (so-called single-plate type) or multiple (so-called multi-plate type). When the imaging unit 11402 is composed of a multi-plate type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. Note that when the imaging unit 11402 is composed of a multi-plate type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0259] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens.

[0260] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be appropriately adjusted.

[0261] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0262] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and focus of the captured image.

[0263] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by a user, or may be automatically set by the control unit 11413 of the CCU 11201 based on an acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0264] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0265] The communication unit 11411 is configured with a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0266] Furthermore, the communication unit 11411 transmits, to the camera head 11102, a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0267] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data sent from the camera head 11102 .

[0268] The control unit 11413 performs various controls related to imaging of the surgical site etc. by the endoscope 11100 and display of the captured image obtained by imaging the surgical site etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0269] Further, the control unit 11413 causes the display device 11202 to display the captured image showing the surgical site, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical tools such as forceps, specific living body parts, bleeding, mist when the energy treatment tool 11112 is used, etc., by detecting the shape and color of the edge of an object included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it may use the recognition result to superimpose various types of surgery support information on the image of the surgical site. By superimposing and presenting the surgery support information to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0270] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0271] Here, in the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0272] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the endoscope 11100 and the imaging unit 11402 of the camera head 11102 among the above-described configurations. By applying the technology according to the present disclosure to the imaging unit 11402, etc., it is possible to acquire high-luminance image data while suppressing a decrease in resolution.

[0273] Although an endoscopic surgery system has been described here as an example, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0274] Although the embodiments of the present disclosure have been described above, the technical scope of the present disclosure is not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present disclosure. In addition, components of different embodiments and modifications may be appropriately combined.

[0275] Furthermore, the effects of each embodiment described in this specification are merely examples and are not limiting, and other effects may also be provided.

[0276] 13. Notes The present technology can also be configured as follows. (1) A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that converts incident light into an electric charge; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in the element region in contact with the first semiconductor region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in a region in contact with the second semiconductor region within the element region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; a second surface where the first contact and the first electrode are in contact is inclined with respect to the first surface; Solid-state imaging device. (2) The second surface is inclined toward the second trench from the end portion of the first electrode in the width direction toward the center portion. The solid-state imaging device according to (1) above. (3) the first trench and the second trench extend so as to surround the element region while taking a circuitous path; The solid-state imaging device according to (1) or (2). (4) a distance of the first contact from the first surface is greater than a distance of the third semiconductor region from the first surface; The solid-state imaging device according to any one of (1) to (3). (5) the first contact is in contact with the first semiconductor region so as to surround an outer periphery of the first semiconductor region; The solid-state imaging device according to any one of (1) to (4). (6) Further comprising a light-shielding film provided inside the second trench. The solid-state imaging device according to any one of (1) to (5). (7) The light-shielding film is made of the same material as the first electrode. The solid-state imaging device according to (6) above. (8) further comprising an insulating film provided between the light shielding film and the first semiconductor region; The solid-state imaging device according to (6) or (7). (9) A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that converts incident light into an electric charge; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in the element region in contact with the first semiconductor region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in a region in contact with the second semiconductor region within the element region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; the first trench and the second trench extend so as to surround the element region while taking a circuitous path; Solid-state imaging device. (10) The first trench and the second trench have at least one of a zigzag shape, a crank shape, and a serpentine shape in the extension direction. The solid-state imaging device according to (9) above. (11) the first electrode extends so as to surround the element region while taking a circuitous path along the first trench; The solid-state imaging device according to (9) or (10) above. (12) the first contact extends along a tortuous path along the first electrode, surrounding an outer periphery of the first semiconductor region, and contacts the first electrode; The solid-state imaging device according to (11) above. (13) the first semiconductor region extends so as to surround the photoelectric conversion region while taking a circuitous path along the first contact and is in contact with the first contact; The solid-state imaging device according to (12) above. (14) The photoelectric conversion element is a plurality of The plurality of photoelectric conversion elements are arranged in a grid pattern, the pitch of the plurality of photoelectric conversion elements is equal in a first direction and in a second direction perpendicular to the first direction; a length of one side of the first trench and the second trench surrounding the element region is longer than a pitch of the plurality of photoelectric conversion elements; The solid-state imaging device according to any one of (9) to (13) above. (15) Further comprising a light-shielding film provided inside the second trench. The solid-state imaging device according to any one of (9) to (14) above. (16) The light-shielding film is made of the same material as the first electrode. The solid-state imaging device according to (15) above. (17) The light-shielding film is in contact with the first semiconductor region. The solid-state imaging device according to (15) or (16). (18) further comprising an insulating film provided between the light shielding film and the first semiconductor region; The solid-state imaging device according to (15) or (16). (19) A solid-state imaging device; an optical system that forms an image of incident light on a light receiving surface of the solid-state imaging device; A processor for controlling the solid-state imaging device, The solid-state imaging device includes: A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that converts incident light into an electric charge; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in the element region in contact with the first semiconductor region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in a region in contact with the second semiconductor region within the element region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; a second surface where the first contact and the first electrode are in contact is inclined with respect to the first surface; electronic equipment. (20) A solid-state imaging device; an optical system that forms an image of incident light on a light receiving surface of the solid-state imaging device; A processor for controlling the solid-state imaging device, The solid-state imaging device includes: A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that converts incident light into an electric charge; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in the element region in contact with the first semiconductor region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in a region in contact with the second semiconductor region within the element region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; the first trench and the second trench extend so as to surround the element region while taking a circuitous path; electronic equipment. [Explanation of symbols]

[0277] 1 Electronic equipment 10 Solid-state imaging device 11 SPAD array section 12 Drive circuit 13 Output circuit 15 Timing control circuit 20, 20a, 20b, 20c, 20d, 220, 20B, 20G, 20R, 620B, 620G, 620R, 920, 920a, 920b, 920c SPAD pixels 21 Photodiode 22 Readout circuit 23 Quench Resistance 24 Select transistor 25 Digital Converter 251 Resistance 26 Inverter 27 Buffer 30 Imaging lens 40 Storage section 50 processors 60 Color Filter Array 61 Unit Pattern 71 Photodetector chip 72 Circuit Chip 101, 141 Semiconductor substrate 102 Photoelectric conversion area 103 N-type semiconductor region 104, 104a, 904c P-type semiconductor region 105, 105A P+ type semiconductor area 106, 106A N+ type semiconductor region 107 Cathode Contact 108, 108A, 408, 508, 908, 908a, 908b Anode Contact 109, 109A, 109B, 109D Insulating film 110, 310, 510 Element isolation section 111, 311, 511 Light-shielding film 112, 312, 512, 710 Insulating film 113 Pinning Layer 114 Planarization film 115, 115R, 115G, 115B Color Filters 116 On-chip lens 120, 130 wiring layers 121 Cathode Electrode 122, 922, 922a, 922b Anode electrode 123, 131 Interlayer insulating film 124, 132 Wiring 125, 135 connection pad 142 Circuit Elements 252, 262 NMOS transistors 261 PMOS transistor A1, A2, A3 opening LD pixel drive line LS output signal line M1, M2, M3, M4 Masks T1, T1a, T1b First trench T2 Second Trench T3, T4, T5, T11 Trench

Claims

1. A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that performs photoelectric conversion of incident light to generate charges; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in a region in contact with the first semiconductor region within the element region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in the element region and in contact with the second semiconductor region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; a second surface where the first contact and the first electrode are in contact is inclined with respect to the first surface; Solid-state imaging device.

2. The second surface is inclined toward the second trench from the end portion of the first electrode in the width direction toward the center portion. The solid-state imaging device according to claim 1 .

3. the first trench and the second trench extend so as to surround the element region while taking a circuitous path; The solid-state imaging device according to claim 1 .

4. a distance of the first contact from the first surface is longer than a distance of the third semiconductor region from the first surface; The solid-state imaging device according to claim 1 .

5. the first contact is in contact with the first semiconductor region so as to surround an outer periphery of the first semiconductor region; The solid-state imaging device according to claim 1 .

6. Further comprising a light-shielding film provided inside the second trench. The solid-state imaging device according to claim 1 .

7. The light-shielding film is made of the same material as the first electrode.

7. The solid-state imaging device according to claim 6.

8. further comprising an insulating film provided between the light shielding film and the first semiconductor region; 7. The solid-state imaging device according to claim 6.

9. A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that performs photoelectric conversion of incident light to generate charges; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in a region in contact with the first semiconductor region within the element region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in the element region and in contact with the second semiconductor region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; the first trench and the second trench extend so as to surround the element region while taking a circuitous path; Solid-state imaging device.

10. The first trench and the second trench have at least one of a zigzag shape, a crank shape, and a serpentine shape in the extension direction. The solid-state imaging device according to claim 9 .

11. the first electrode extends so as to surround the element region while taking a circuitous path along the first trench; The solid-state imaging device according to claim 9 .

12. the first contact extends along a tortuous path along the first electrode, surrounding an outer periphery of the first semiconductor region, and contacts the first electrode; The solid-state imaging device according to claim 11.

13. the first semiconductor region extends so as to surround the photoelectric conversion region while taking a circuitous path along the first contact, and is in contact with the first contact; The solid-state imaging device according to claim 12.

14. The photoelectric conversion element is a plurality of The plurality of photoelectric conversion elements are arranged in a grid pattern, the pitch of the plurality of photoelectric conversion elements is equal in a first direction and in a second direction perpendicular to the first direction; a length of one side of the first trench and the second trench surrounding the element region is longer than a pitch of the plurality of photoelectric conversion elements; The solid-state imaging device according to claim 9 .

15. Further comprising a light-shielding film provided inside the second trench. The solid-state imaging device according to claim 9 .

16. The light-shielding film is made of the same material as the first electrode. The solid-state imaging device according to claim 15.

17. The light-shielding film is in contact with the first semiconductor region. The solid-state imaging device according to claim 15.

18. further comprising an insulating film provided between the light shielding film and the first semiconductor region; The solid-state imaging device according to claim 15.

19. A solid-state imaging device; an optical system that forms an image of incident light on a light receiving surface of the solid-state imaging device; A processor for controlling the solid-state imaging device, The solid-state imaging device includes: A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that performs photoelectric conversion of incident light to generate charges; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in a region in contact with the first semiconductor region within the element region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in the element region and in contact with the second semiconductor region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; a second surface where the first contact and the first electrode are in contact is inclined with respect to the first surface; electronic equipment.

20. A solid-state imaging device; an optical system that forms an image of incident light on a light receiving surface of the solid-state imaging device; A processor for controlling the solid-state imaging device, The solid-state imaging device includes: A semiconductor substrate including a first trench provided on a first surface and a second trench provided along a bottom portion of the first trench; A photoelectric conversion element provided on the semiconductor substrate, The photoelectric conversion element is a photoelectric conversion region that is provided in an element region defined by the first trench and the second trench in the semiconductor substrate and that performs photoelectric conversion of incident light to generate charges; a first semiconductor region surrounding the photoelectric conversion region within the element region; a first contact contacting the first semiconductor region at a bottom of the first trench; a first electrode in contact with the first contact within the first trench; a second semiconductor region provided in a region in contact with the first semiconductor region within the element region and having the same first conductivity type as the first semiconductor region; a third semiconductor region provided between the second semiconductor region and the first surface in the element region and in contact with the second semiconductor region, the third semiconductor region having a second conductivity type opposite to the first conductivity type; a second contact provided on the first surface so as to contact the third semiconductor region; a second electrode in contact with the second contact; the first trench and the second trench extend so as to surround the element region while taking a circuitous path; electronic equipment.

Images