Semiconductor device and its manufacturing method

Abstract

To provide a semiconductor device that suppresses a short between leads.SOLUTION: A metal burrs 3 generated between the leads 2 due to singulation by dicing are cut by providing a resin recess 4 on the surface of a sealing resin 1 between adjacent leads 2 such that the sealing resin 1 is recessed, and electrical short between the leads 2a and 2b or between the leads 2b and 2c is suppressed.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] One type of semiconductor package is the dual flat nonleaded (DFN) package. DFN packages are generally manufactured by dividing a resin-encapsulated lead frame into individual pieces using a dicing blade, with the leads exposed from the sides of the encapsulating resin, and the lead end faces are flush with the encapsulating resin.

[0003] FIG. 21 shows the side of a typical DFN package after it has been singulated, and because DFN packages are singulated using a dicing blade as described above, metal burrs 3 form on the lead end faces on the side of the package. When metal burrs 3 form, the effective lead distance D2 becomes shorter than the designed lead distance D1. When the effective lead distance D2 becomes shorter, it can lead to short circuits between the leads, particularly in product operation tests under high humidity conditions, making it impossible to obtain the desired electrical characteristics. To solve this problem, semiconductor devices have been proposed in which the lead tips are made thinner (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2020-77694 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, narrowing the lead tips reduces the solder joint area for the semiconductor device when mounted on a board, which reduces mounting reliability. The present invention has been made in view of the above problems, and has an object to provide a semiconductor device that suppresses inter-lead short circuits without impairing mounting reliability. [Means for solving the problem]

[0006] The semiconductor device of the present invention comprises a semiconductor element, a plurality of leads spaced apart around the semiconductor element and electrically connected to the semiconductor element, and a sealing resin that seals the semiconductor element and the plurality of leads, and is characterized in that a resin recess is provided between the plurality of adjacent leads exposed on one side of the sealing resin.

[0007] a step of electrically connecting the semiconductor element to the leads constituting the multi-sided leadframe; a step of sealing the semiconductor element and the leads with a sealing resin; and a step of forming an individual semiconductor element and the leads electrically connected to the semiconductor element; and a step of sealing the semiconductor element and the leads with a sealing resin. The method of the present invention is a method of manufacturing a semiconductor device comprising: a semiconductor element; a plurality of leads spaced apart around the semiconductor element and electrically connected to the semiconductor element; and a sealing resin that seals the semiconductor element and the leads, wherein a resin recess is provided between the plurality of leads exposed on one side of the sealing resin and adjacent to each other, the method comprising the steps of: preparing a multi-sided leadframe in which a plurality of unit lead frames each consisting of a die pad and the plurality of leads spaced apart around the die pad are arranged in a lattice pattern; placing the semiconductor element on the multi-sided leadframe;

[0008] a step of electrically connecting the semiconductor element to the plurality of leads constituting the multi-sided leadframe; a step of sealing the semiconductor element and the plurality of leads with a sealing resin to form a sealing body; and a step of dividing the sealing body into individual pieces by blade dicing, and removing the sealing resin between the plurality of leads.

[0009] a step of electrically connecting the semiconductor element to the plurality of leads; a step of preparing a multi-sided leadframe in which a plurality of unit lead frames, each unit lead frame consisting of a die pad and the plurality of leads spaced apart around the die pad, are arranged in a lattice pattern; a step of placing the semiconductor element on the multi-sided leadframe; a step of electrically connecting the semiconductor element to the plurality of leads; a step of preparing a mold for sealing the multi-sided leadframe, the mold having a mold protrusion for forming the resin recess; a step of using the mold to seal the multi-sided leadframe on which the semiconductor element is mounted with sealing resin to form a sealed body; and a step of singulating the sealed body. Effect of the Invention

[0010] By using the above-mentioned means, it is possible to provide a semiconductor device that suppresses short circuits between leads. [Brief description of the drawings]

[0011] [Figure 1] 1 is a structural diagram of a semiconductor device according to a first embodiment of the present invention. [Diagram 2] FIG. 5 is a structural diagram of a semiconductor device according to a second embodiment of the present invention. [Diagram 3] FIG. 11 is a structural diagram of a semiconductor device according to a third embodiment of the present invention. [Figure 4] FIG. 13 is a structural diagram of a semiconductor device according to a fourth embodiment of the present invention. [Diagram 5] FIG. 13 is a structural diagram of a semiconductor device according to a fifth embodiment of the present invention. [Figure 6] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 7] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 8] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 9] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 10] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 11] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 12] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention. [Figure 13] 11A to 11C are diagrams illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention. [Figure 14] 11A to 11C are diagrams illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention. [Figure 15]11A to 11C are diagrams illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention. [Figure 16] 11A to 11C are diagrams illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention. [Figure 17] 13A to 13C are diagrams illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. [Figure 18] 13A to 13C are diagrams illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. [Figure 19] 13A to 13C are diagrams illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. [Figure 20] 13A to 13C are diagrams illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. [Figure 21] FIG. 1 illustrates a conventional semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, an embodiment of a semiconductor device according to the present invention will be described with reference to the drawings.

[0013] FIG. 1 is a structural diagram of a semiconductor device according to a first embodiment of the present invention. FIG. 1(a) is a back view of the semiconductor device. A die pad 5, which is a semiconductor element mounting portion, is disposed in the center of the semiconductor device 21, and hanging leads 9 are provided on the left and right short sides of the die pad 5. Although not shown, a semiconductor element 6 is mounted on the front surface opposite to the back surface of the die pad 5. In addition, a plurality of leads 2 of a certain width are disposed around the die pad 5 at a distance from the die pad 5, and the leads 2 and the semiconductor element 6 are electrically connected. The die pad 5, the leads 2, and the semiconductor element 6 are sealed with a sealing resin 1, and the semiconductor device 21 has a rectangular outer shape. A resin recess 4 is provided in the sealing resin 1 between adjacent leads 2. Specifically, the resin recess 4 is provided only between the three leads 2, and the resin recess 4 is provided only between the lead 2a and the lead 2b and between the lead 2b and the lead 2c. The side surface of the sealing resin 1 and the end surface of the lead 2 are formed flush with each other, but in the portion of the resin recess 4 located between adjacent leads 2, the surface of the sealing resin 1 is recessed to form a concave shape.

[0014] FIG. 1(b) is a cross-sectional view taken along line AA in FIG. 1(a). The lead 2 is not present in the AA cross-section, but its position is indicated by a broken line. The back surface of the die pad 5 is exposed on the bottom surface of the semiconductor device 21, and a semiconductor element 6 is placed on the surface of the die pad 5. The lead 2, which is spaced apart from the die pad 5 and has a certain width, is located on the bottom surface and side surface of the semiconductor device 21. The die pad 5, the semiconductor element 6, and the lead 2 are encapsulated in a rectangular shape by the encapsulation resin 1. The resin recess 4 is located at the corner formed by the bottom surface and side surface of the semiconductor device 21, and the cross-sectional shape in the depth direction is a shape in which a part of a quarter circle is removed, and the hypotenuse of a right-angled triangle is an arc shape that is convex outward. This is because the resin recess 4 is formed by a dicing blade when the semiconductor device is divided into individual pieces, and the details will be made clear in the explanation of the manufacturing process described later.

[0015] The resin recess height H2 of the resin recess 4 must be higher than the lead height H1. If the lead height H1 were higher than the resin recess height H2, there would be no resin recess 4 above the leads 2, and there would be a possibility of a short circuit between the leads due to metal burrs 3. On the other hand, there are no particular restrictions on the resin recess depth L2. Although the lead depth L1 is longer than the resin recess depth L2, the resin recess depth L2 may be longer than the lead depth L1, and can be freely selected taking into account the diameter of the dicing blade used to form the resin recess and the size of the semiconductor device itself.

[0016] Resin recesses 4 do not necessarily have to be present between all adjacent leads, and if a sufficient distance between the leads can be maintained even with metal burrs 3 taken into consideration, resin recesses are not essential, and resin recesses may be provided only between necessary leads. For example, if the potential difference between adjacent leads is large or short circuits between the leads are not permitted, resin recesses 4 are provided, and if short circuits between the leads are permitted due to product characteristics or if the design has a sufficient distance between the leads, a structure without providing resin recesses 4 can be used to save the effort of providing resin recesses. Also, the number of resin recesses 4 provided between adjacent leads does not have to be one, and multiple resin recesses 4 may exist. The more the number of resin recesses increases, the more effectively the creepage distance between the leads can be increased.

[0017] 1(c) is a side view of the semiconductor device of the present invention from the surface where the leads are exposed. The leads 2 are exposed from the sealing resin 1, and the exposed surfaces of the leads 2 and the surface of the sealing resin 1 are flush with each other. A resin recess 4 is formed in the sealing resin 1 that exists between the multiple leads 2 that are installed at a distance. A metal burr 3 extends in a certain direction from the lead 2. The metal burr 3 is not intentionally placed, but is generated as the metal of the lead 2 extends due to the rotation of a dicing blade when the semiconductor device is divided into individual pieces in a package dicing process, and the metal burr 3 is generated on the sealing resin 1. The metal burr 3 is divided by the resin recess 4 provided between adjacent leads 2.

[0018] If the resin recess 4 does not exist, the substantial distance between adjacent leads is shortened by the length of the metal burr 3. If the substantial distance between the leads (corresponding to "D2" in FIG. 21) is shortened, when the voltage difference between the adjacent leads 2 is large or when the product is operated under high humidity, an unintended short circuit between the leads may occur. The metal burr 3 does not always exist at a constant length, and its length may change due to manufacturing variations, etc. However, by providing the resin recess 4, the metal burr 3 is not only divided, but also a certain creepage distance or more can be secured, so that a short circuit between the leads can be prevented. In addition, the lead 2 has a constant width without becoming narrow at the tip, and has a sufficient mounting area, so that mounting reliability is not impaired. In order to secure a certain creepage distance or more, the resin recess 4 needs to have a predetermined depth length.

[0019] In the above embodiment, a DFN package having six leads has been described as an example, but modifications can be freely made within the scope of the invention. For example, the embodiments of the present invention can be applied to a package with a die padless structure such as a COL (Chip on Lead) type that does not have a die pad, a flip chip structure package in which the leads and the semiconductor element are electrically connected using gold stud bumps without using thin metal wires, an MCP (Multi Chip Package) equipped with multiple semiconductor elements, a 2-in-1 type package equipped with passive components in addition to semiconductor elements, a package that also uses a wettable flank structure to increase the mounting reliability of the semiconductor device and the visibility of the solder fillet when mounted on a board, and the like.

[0020] FIG. 2 is a structural diagram of a semiconductor device according to a second embodiment of the present invention. The difference from the semiconductor device 21 in FIG. 1 is that the shape of the resin recess 4 provided between adjacent leads 2 is different. As shown in the rear view of FIG. 2(a), leads 2 of a certain width separated from the die pad 5 are arranged on both side surfaces of the semiconductor device 22, and the resin recess 4 is provided only between three leads 2. The resin recess 4 is provided over the entire region from the right end of the lead 2a to the left end of the lead 2b, and similarly, from the right end of the lead 2b to the left end of the lead 2c. In other words, one resin recess 4 is provided over the lead 2a and the lead 2b in contact with the lead 2a and the lead 2b, and the other resin recess 4 is provided over the lead 2b and the lead 2c in contact with the lead 2b and the lead 2c.

[0021] Fig. 2(b) is a cross-sectional view taken along line BB in Fig. 2(a). Resin recess 4 is located at the corner between the bottom and side surfaces of semiconductor device 22, and its cross-sectional shape in the depth direction is rectangular. Resin recess height H2 must be set higher than lead height H1. On the other hand, resin recess depth L2 must be set to a predetermined value in order to ensure a certain level of creepage distance, and resin recess depth L2 is preferably at least half of lead depth L1.

[0022] 2(c) is a side view of the semiconductor device of the present invention from the exposed surface of the leads. The leads 2 are exposed from the sealing resin 1, and the exposed surface of the leads 2 and the surface of the sealing resin 1 are flush with each other. The resin recess 4 is provided over the entire area from the right end of the lead 2a to the left end of the lead 2b, and similarly, from the right end of the lead 2b to the left end of the lead 2c. Furthermore, the height of the resin recess 4 is set higher than the height of the leads 2, so that no metal burr 3 is observed between the leads 2a and 2b, and between the leads 2b and 2c. There is no resin recess 4 at the right end of the lead 2c, so that there is a metal burr 3, but there is no other lead to the right of the lead 2c, so there is no possibility of a short circuit between the leads due to the metal burr 3. As described above, in the semiconductor device 22 of this example, there are no metal burrs 3 between adjacent leads 2, and short circuits between the leads can be suppressed. In addition, the leads 2 have a certain width and a sufficient mounting area, so mounting reliability is not impaired.

[0023] 3 is a structural diagram of a semiconductor device according to a third embodiment of the present invention. The difference from the semiconductor device 22 in FIG. 2 is the arrangement area of ​​the resin recess 4 provided between adjacent leads 2. In the rear view of FIG. 3(a), the resin recess 4 is provided over the entire area from the right end of the lead 2a to the left end of the lead 2b, and similarly, from the right end of the lead 2b to the left end of the lead 2c, and further over the entire area from the left side surface of the sealing resin 1 to the lead 2a, and over the entire area from the right side surface of the sealing resin 1 to the lead 2c. That is, the resin recess 4 is provided in the entire area of ​​the surface on the long side of the semiconductor device 23 where the sealing resin 1 is exposed.

[0024] 3(b) is a side view of the semiconductor device of the present invention from the exposed surface of the leads. The leads 2 are exposed from the sealing resin 1, and the exposed surface of the leads 2 is flush with the surface of the sealing resin 1. The resin recess 4 is provided not only in the entire area between the leads 2a and 2b and between the leads 2b and 2c, but also in the entire area from the leads 2a and 2c to the side of the sealing resin 1. Furthermore, the height of the resin recess 4 is set higher than the height of the leads 2, so that no metal burrs 3 are present not only between the leads 2a and 2b and between the leads 2b and 2c, but also at the right end of the lead 2c and the left end of the lead 2a.

[0025] Fig. 4 is a structural diagram of a semiconductor device according to a fourth embodiment of the present invention. In the rear view of Fig. 4(a), the resin recess 4 is provided over the entire region from the right end of the lead 2a to the left end of the lead 2b, and similarly, from the right end of the lead 2b to the left end of the lead 2c, and further over the entire region from the left side surface of the sealing resin 1 to the lead 2a, and over the entire region from the right side surface of the sealing resin 1 to the lead 2c. That is, the resin recess 4 is provided over the entire region of the surface on the long side of the semiconductor device 24 where the sealing resin 1 is exposed.

[0026] Fig. 4(b) is a side view of the surface of the semiconductor device where the leads are exposed. The difference from the semiconductor device 23 shown in Fig. 3 is that overhanging regions 41 are provided on the left and right upper ends of the resin recess 4. By providing the overhanging regions 41, the occurrence of metal burrs on the leads can be suppressed extremely efficiently.

[0027] Fig. 5 is a structural diagram of a semiconductor device according to a fifth embodiment of the present invention. The difference from the semiconductor device 22 in Fig. 2 is the arrangement area of ​​the resin recess 4 provided between adjacent leads 2. In the rear view of Fig. 5(a), the resin recess 4 is provided between the leads 2a and 2b, as well as between the leads 2b and 2c, and further between the left side surface of the sealing resin 1 and the lead 2a, and between the right side surface of the sealing resin 1 and the lead 2c.

[0028] Fig. 5(b) is a cross-sectional view taken along line TT in Fig. 5(a). A resin recess 4 is provided at the end of a side surface of the semiconductor device 25, and its cross-sectional shape in the depth direction is rectangular. The resin recess height H2 extends from the bottom surface to the upper surface of the sealing resin 1, and is higher than the lead height H1. On the other hand, the resin recess depth length L2 needs to be a predetermined resin recess depth length L2 in order to ensure a certain creepage distance or more, and it is preferable that the resin recess depth length L2 is at least half the lead depth length L1.

[0029] FIG. 5(c) is a side view of the semiconductor device of the present invention from the surface where the leads are exposed. The leads 2 are exposed from the sealing resin 1, and the exposed surface of the leads 2 and the surface of the sealing resin 1 are flush with each other. Resin recesses 4 are provided between the leads 2a and 2b, between the leads 2b and 2c, and also between the left side surface of the sealing resin 1 and the lead 2a, and between the right side surface of the sealing resin 1 and the lead 2c. Metal burrs 3 extend from the leads 2 in a certain direction, but the metal burrs 3 are divided by the resin recesses 4 provided between the adjacent leads 2. Therefore, in the semiconductor device 25 of this example, short circuits between the adjacent leads 2 can be suppressed. In addition, the leads 2 have a certain width and a sufficient mounting area, so that mounting reliability is not impaired.

[0030] In this example, the resin recess 4 is provided between the left side surface of the sealing resin 1 and the lead 2a, and also between the right side surface of the sealing resin 1 and the lead 2c, but the resin recess 4 may be provided only between the leads 2a and 2b and only between the leads 2b and 2c.

[0031] 6 is a diagram showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention. First, a multi-sided lead frame 7 made of a copper alloy or an iron-nickel alloy as shown in FIG. 6(a) is prepared. The multi-sided lead frame 7 has a horizontal (x-direction) frame 7x and a vertical (y-direction) frame 7y. A die pad 5 serving as a semiconductor element mounting portion is connected to the frame 7y via a suspension lead 9 provided on the side of the die pad 5, and leads 2 of a constant width arranged at a distance from the die pad 5 in the vertical direction are connected to the frame 7x. A unit lead frame 17, which is the minimum area surrounded by the frame frames 7x and 7y, includes one die pad 5 and six leads 2.

[0032] Adjacent unit lead frames 17 are not arranged closely packed, but have space portions 8a in the horizontal direction and space portions 8b in the vertical direction. The multi-sided lead frame 7 has two rows of unit lead frames arranged in an upper and lower row, and the leads 2 spaced apart below the die pad 5 of the upper unit lead frame 17a are connected to the first frame 7x, and the leads 2 spaced apart above the die pad 5 of the lower unit lead frame 17b are connected to the second frame 7x, and the first frame 7x and the second frame 7x are arranged in parallel with the space portion 8b sandwiched between them. The leads 2 of the upper unit lead frame 17a and the leads 2 of the lower unit lead frame 17b are arranged in parallel with the frame 7x sandwiched between them. The lower unit lead frame 17b is arranged shifted in the row (horizontal) direction with respect to the upper unit lead frame 17a. A semiconductor element (not shown) is mounted on the surface opposite to the back surface of the die pad 5, and the semiconductor element and the leads 2 are electrically connected. A multi-sided lead frame 7 including a die pad 5, a semiconductor element, and leads 2 is encapsulated in a sealing resin 1. Fig. 6(a) is a back view showing a sealing body 18 in which the multi-sided lead frame 7 is encapsulated in a sealing resin 1.

[0033] 6(b) is a diagram showing an intermediate process of dividing the resin-sealed multi-sided lead frame 7 into individual pieces. The multi-sided lead frame 7 is diced from the back side along a horizontal frame border 7x (not shown) to form a cut portion 10a. This separates the leads 2 from the multi-sided lead frame 7. A full cut method is used for dicing here. Although not shown, the sealing resin 1 and the leads 2 exposed at the cut portion 10a at this time are formed flush with each other, and metal burrs (not shown) are attached to the surface of the sealing resin 1 exposed by dicing.

[0034] 7 is a diagram showing a process of dividing the multi-sided lead frame 7 into individual pieces, following FIG. 6(b). The multi-sided lead frame 7 is diced from the back side along a vertical frame frame 7y (not shown) to form a cut portion 10b. The upper and lower two-tier unit lead frames 17a and 17b are arranged such that the lower tier unit lead frame 17b is shifted in the row (horizontal) direction relative to the upper tier unit lead frame 17a. For example, the lower tier unit lead frame 17b is diced along the frame frame 7y to form the cut portion 10b, and at the same time, the sealing resin 1 between the adjacent leads 2 of the upper tier unit lead frame 17a is cut to form a cut portion 10c in this region. This cut portion 10c corresponds to the resin recess 4.

[0035] As explained in Fig. 6(b), when horizontal cutting is only performed, metal burrs are attached to the surface of the sealing resin 1 between the leads 2, but as shown in Fig. 7, when vertical cutting is performed and resin recesses 4 are formed, the metal burrs are separated. This makes it possible to prevent short circuits between the leads. Through the above steps, unit lead frames 17 are cut out and the singulation is completed. In the above, we have explained the procedure of cutting in the horizontal direction (x direction) followed by cutting in the vertical direction (y direction). However, it is also possible to switch the horizontal and vertical directions and perform cutting in the vertical direction first, then the horizontal direction.

[0036] Fig. 8 is a diagram for explaining the process of forming the cut portions in more detail, and illustrates the state in which cut portions 10b and 10c are formed in the CC cross section of Fig. 7 (the state from Fig. 6(b) to Fig. 7). The back sides of the semiconductor devices 13, 14 and the multi-sided lead frame 7 face upward, and the front sides of the semiconductor devices 13, 14 are adhered and fixed to the dicing tape 12, and are being blade diced by the dicing blade 11. Although the leads 2 are not present in the CC cross section of Fig. 7, their positions are indicated by dashed lines to aid in understanding the up-down orientation of the semiconductor device.

[0037] The dicing blade 11 advances in the direction of the leftward arrow shown in the figure, cutting along the frame 7y (not shown) of the semiconductor device 13 to form cut portion 10b, and finally forms cut portion 10c (resin recess 4) between the leads of the semiconductor device 14. When dividing by the blade dicing method, the cutting is performed by rotating the circular dicing blade 11 at high speed, so that the cut portion 10c has a cross-sectional shape in which a part of a quarter circle has been removed, and the hypotenuse of the right triangle has an outwardly convex arc shape.

[0038] The reason why the front side of the semiconductor devices 13 and 14 are adhered to the dicing tape 12 and cutting is performed from the back side is because the dicing blade 11 is circular. If the back side of the semiconductor device was fixed so as to be adhered to the dicing tape 12, the cutting portion 10c would have to be formed on the side of the back side of the semiconductor device 14 and the resin recess 4 would have to be formed on the lower end side of the dicing blade 11, and the dicing blade 11 would have to cut deep inside the semiconductor device 14. Since there are structures such as semiconductor elements and thin metal wires inside the semiconductor device, in order to prevent these structures from being destroyed by the dicing blade 11, the size of the semiconductor device itself needs to be sufficiently large and the internal structure needs to be small, so that the entire semiconductor device becomes unnecessarily large. As in this example, by dicing the front side of the semiconductor device so as to be fixed to the dicing tape 12, it is possible to prevent the semiconductor device from becoming unnecessarily large. The shape of the cut of the cutting portion 10c can be freely changed by changing the thickness of the semiconductor device 14, the aperture of the dicing blade 11, the amount of cut of the dicing blade 11, the width of the space portion 8b, and the like.

[0039] 9 shows a modified example of the manufacturing method of the semiconductor device according to the first embodiment of the present invention. In this example, the number of resin recesses is reduced while the space between the semiconductor devices is partially reduced, thereby increasing the number of semiconductor devices that can be obtained from one multi-sided lead frame, and a manufacturing method with higher productivity will be described.

[0040] FIG. 9(a) is a rear view of a sealing body 18 in which a multi-sided lead frame 7 is collectively sealed with a sealing resin 1. The difference from FIG. 6(a) is that the distance between the leads 2a and 2b is sufficiently wide to maintain sufficient insulation even when metal burrs generated during singulation are taken into consideration, and the distance between the leads 2b and 2c is relatively narrow to a distance at which insulation may not be maintained due to metal burrs generated during singulation. The multi-sided lead frame 7 does not have a space between adjacent unit lead frames 17 in the horizontal direction. In addition, spaces 8b and 8c are provided between the upper unit lead frame 17a and the lower unit lead frame 17b, and the lower unit lead frame 17b is arranged shifted in the row (horizontal) direction with respect to the upper unit lead frame 17a. As described above, the elimination of the horizontal space increases the number of semiconductor devices that can be installed in the multi-sided lead frame 7, resulting in high productivity.

[0041] FIG. 9(b) is a diagram showing a process of dividing the multi-sided lead frame 7 into individual pieces, following FIG. 9(a). After the multi-sided lead frame 7 is diced from the rear side along the horizontal frame 7x (not shown) to form the cut portion 10a, the multi-sided lead frame 7 is diced from the rear side along the vertical frame 7y (not shown) to form the cut portion 10b. The lower unit lead frame 17b is arranged shifted in the row (horizontal) direction relative to the upper unit lead frame 17a. For example, the lower unit lead frame 17b is diced along the frame 7y to form the cut portion 10b, and at the same time, the sealing resin 1 between the adjacent leads 2 of the upper unit lead frame 17a is cut to form the cut portion 10c (resin recess 4) in this region. The difference from FIG. 7 is the position where the cut portion 10c (resin recess 4) is provided. 7, cut portions 10c (resin recesses 4) are formed both between leads 2a and 2b and between leads 2b and 2c, but in this example, cut portions 10c (resin recesses 4) are formed only between leads 2b and 2c. This is because the distance between leads 2a and 2b is sufficiently wide to ensure sufficient insulation even when metal burrs that occur during singulation are taken into account, and the distance between leads 2b and 2c is relatively narrow to ensure that insulation may not be maintained due to metal burrs that occur during singulation.

[0042] Fig. 10 is a modified example showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention. Fig. 10(a) is a back view of a sealing body 18 in which a multi-sided lead frame 7 is collectively sealed with a sealing resin 1. The difference from Fig. 6(a) is that a space 8a is provided between adjacent unit lead frames 17 in the horizontal direction, and no space is provided between unit lead frames 17a, 17b in upper and lower rows in the vertical direction. As described above, by eliminating the vertical space, the number of semiconductor devices that can be installed in a multi-sided lead frame 7 increases, resulting in high productivity.

[0043] FIG. 10(b) is a diagram showing a process of dividing the multi-sided lead frame 7 into individual pieces, following FIG. 10(a). After the multi-sided lead frame 7 is diced from the rear side along the horizontal frame 7x (not shown) to form the cut portion 10a, the multi-sided lead frame 7 is diced from the rear side along the vertical frame 7y (not shown) to form the cut portion 10b. The upper and lower two-tier unit lead frames 17a and 17b are arranged such that the lower tier unit lead frame 17b is shifted in the row (horizontal) direction relative to the upper tier unit lead frame 17a. For example, the lower tier unit lead frame 17b is diced along the frame 7y to form the cut portion 10b, and at the same time, the sealing resin 1 between the adjacent leads 2 of the upper tier unit lead frame 17a is cut to form the cut portion 10c (resin recess 4) in this region. As in FIG. 7, the cut portion 10c (resin recess 4) is formed both between the leads 2a and 2b and between the leads 2b and 2c. Since there is no space between the unit lead frames in the vertical direction of the multi-sided lead frame 7 in this example, it is better to use a step-cut dicing method rather than a full-cut method. That is, the semiconductor device is diced by half-cutting from the back side and dicing the remainder from the front side. The details of this method are explained next.

[0044] Fig. 11 is a cross-sectional view taken along line EE in Fig. 10(b), illustrating the formation of cut portions 10b and 10c. The rear sides of semiconductor devices 13 and 14 and multi-sided lead frame 7 face upward, and the front sides of semiconductor devices 13 and 14 are adhered and fixed to dicing tape 12, and are then singulated by dicing blade 11. Although leads 2 are not present in the EE cross-section in Fig. 10, their positions are indicated by dashed lines to aid in understanding the up-down orientation of the semiconductor device.

[0045] The dicing blade 11 advances in the direction of the leftward arrow shown in the drawing, cutting along the frame 7y (not shown) of the semiconductor device 13 to form a cut portion 10b, and finally forms a cut portion 10c (resin recess 4) between the leads of the semiconductor device 14. At this time, unlike the step cut method, the side surface on the semiconductor device 13 side is not completely cut off, but only the upper portion is half-cut to leave an uncut portion 15 when dicing.

[0046] When dicing is performed by the full-cut method, in order to completely separate the semiconductor device 13, the dicing blade 11 must continue cutting toward the semiconductor device 14 while slightly cutting the dicing tape 12 until the semiconductor device 13 is separated, and the resin recess 4a formed on the back side of the semiconductor device 14 becomes larger than necessary. In the manufacturing method shown in FIG. 8, a space portion 8b is provided between the semiconductor device 13 and the semiconductor device 14, so that the resin recess 4 formed in the semiconductor device 14 does not become too large even when cutting is performed by the full-cut method. However, since there is no space portion between the upper unit lead frame 17a and the lower unit lead frame 17b in the multi-sided lead frame 7 of this example, the horizontal cutting width of the resin recess 4a becomes too large when the full-cut method is used. Since an unnecessarily large resin recess 4a may cause a deterioration in quality or malfunction of the semiconductor device 14, it is desirable that the resin recess 4a be the minimum size necessary to prevent short circuits between the leads, and for this purpose, it is necessary to perform dicing by making the cutting depth of the dicing blade 11 shallow so as to form an uncut portion 15 on the semiconductor device 13 side.

[0047] Next, as shown in Fig. 11(b), the back side of the semiconductor device 13, 14 is fixed to a dicing tape 12, and dicing is performed from the front side of the semiconductor device 13, 14. As a result, the uncut portion 15 that remains uncut in Fig. 11(a) is cut, and the semiconductor device 13 can be completely divided into individual pieces. However, when dicing is performed from the front side to cut the uncut portion 15, a resin recess 4b is formed secondarily on the front side of the semiconductor device 14, so it is necessary to design the semiconductor device 14 and the resin recess 4b with care so that the semiconductor element, thin metal wire, and other structures present inside the semiconductor device 14 are not destroyed by the generation of the resin recess 4b.

[0048] Figure 12 shows a modified example of the method for manufacturing a semiconductor device according to the first embodiment of the present invention. Figure 12(a) is a back view of a sealing body 18 in which a multi-sided lead frame 7 is collectively sealed with sealing resin 1. The difference from Figure 6(a) is that a four-lead type unit lead frame 17 is used, the space between adjacent unit lead frames 17 is eliminated, and unit lead frames 17a, 17b are closely packed. Eliminating the space increases the number of semiconductor devices that can be installed in the multi-sided lead frame 7, resulting in high productivity.

[0049] FIG. 12(b) is a diagram showing a process of dividing the multi-sided lead frame 7 into individual pieces, following FIG. 12(a). After the multi-sided lead frame 7 is diced from the rear side along the horizontal frame 7x (not shown) to form the cut portion 10a, the multi-sided lead frame 7 is diced from the rear side along the vertical frame 7y (not shown) to form the cut portion 10b. The upper and lower two-tier unit lead frames 17a and 17b are arranged such that the lower tier unit lead frame 17b is shifted in the row (horizontal) direction relative to the upper tier unit lead frame 17a. For example, the lower tier unit lead frame 17b is diced along the frame 7y to form the cut portion 10b, and at the same time, the sealing resin 1 between the adjacent leads 2 of the upper tier unit lead frame 17a is cut to form the cut portion 10c (resin recess 4) in this region. As in FIG. 7, the cut portion 10c (resin recess 4) is formed both between the leads 2a and 2b and between the leads 2b and 2c. Since no space is provided between the unit lead frames in the vertical direction of the multi-sided lead frame 7 in this example, dicing is performed using the step cut method shown in Fig. 11 instead of the full cut method. That is, dicing is performed by cutting half from the back side of the semiconductor device and dicing the remainder from the front side. As described above, by using the four-lead type, a semiconductor device with little waste and high productivity can be obtained.

[0050] 13 is a diagram showing a manufacturing process of a semiconductor device according to a third embodiment of the present invention. First, as shown in FIG. 13(a), a multi-sided lead frame 7 is prepared. The multi-sided lead frame 7 is a unit lead frame 17 consisting of a rectangular die pad 5 and a plurality of leads 2 spaced apart from the die pad 5, and the unit lead frames 17 are arranged in a lattice pattern. The unit lead frame 17 shown surrounded by a dashed line is surrounded by frames 7x and 7y, the leads 2 are connected to the frame 7x, and the die pad 5 is connected to the frame 7y via a suspension lead 9. The multi-sided lead frame 7 is mainly made of a copper material or a copper alloy material.

[0051] A semiconductor element (not shown) is mounted on the surface opposite the back surface of die pad 5, and the semiconductor element and leads 2 are electrically connected. A multi-sided lead frame 7 including die pad 5 and leads 2, and the semiconductor element mounted on die pad 5 are collectively sealed with sealing resin 1. At this time, the back surface of die pad 5 and the back surface of leads 2 are exposed from sealing resin 1. Furthermore, after sealing, a plating layer for mounting is formed on the back surface of die pad 5 and the back surface of leads 2. FIG. 13(a) is a back view of a sealed body 18 in which multi-sided lead frame 7 is collectively sealed with sealing resin 1.

[0052] Fig. 13(b) is a cross-sectional view taken along the line FF shown in Fig. 13(a) At this stage, the leads 2 of the adjacent unit lead frames 17 are connected via the frame 7x.

[0053] Fig. 13(c) is a cross-sectional view taken along line GG in Fig. 13(a), which shows no leads, but shows the semiconductor element 6 and frame 7x on the die pad 5, and the sealing resin 1 that covers them.

[0054] FIG. 14 is a diagram showing a manufacturing process of a semiconductor device according to a third embodiment of the present invention, following FIG. 13. As shown in the back view of FIG. 14(a), a laser 16 is irradiated along the frame 7x to remove the sealing resin 1 between the leads 2. Here, a laser 16 capable of selectively removing the sealing resin 1 is used. The laser 16 is irradiated while scanning along the frame 7x, for example, from left to right, and it is preferable to scan one frame 7x twice, at its upper end side and its lower end side. When scanning the upper end side, the laser 16 is irradiated and scanned with a beam diameter (incident processing diameter) that spans the upper end of the frame 7x and a part of the sealing resin 1 above it in a plan view. Similarly, when scanning the lower end side, the sealing resin 1 is removed by scanning the laser 16 with a beam diameter that spans the lower end of the frame 7x and a part of the sealing resin 1 below it. Alternatively, a method of simultaneously removing the sealing resin 1 at the upper and lower parts of the frame 7x by one scan instead of two scans may be used. In the case of one scan, a beam diameter larger than that in the case of two scans is used. That is, the beam diameter needs to be set so as to be capable of irradiating the frame 7x, a part of the sealing resin 1 on its upper end side, and a part of the sealing resin 1 on its lower end side.

[0055] Fig. 14(b) is a cross-sectional view taken along line KK in Fig. 14(a) The laser 16 irradiated from the rear surface of the lead 2 is blocked by the lead 2 and is not irradiated to the sealing resin 1.

[0056] FIG. 14(c) is a cross-sectional view taken along the line MM shown in FIG. 14(a). There are no leads in this cross-section, and the laser 16 is irradiated onto the frame 7x and the sealing resin 1 covering them. The processing depth of the irradiated laser 16 (corresponding to H2 in FIG. 3(b)) is set to be greater than the height of the frame 7x (corresponding to H1 in FIG. 3(b)). At this time, the focal depth may be changed as necessary, and scanning with different focal depths may be performed multiple times. When irradiating the laser 16, the laser is made to enter vertically from the back surface of the sealing body 18, forming a rectangular resin recess 4 as shown in FIG. 3(b), and the laser is made to enter obliquely from the back surface of the sealing body 18, forming a resin recess 4 having a shape with an eaves region 41 as shown in FIG. 4(b).

[0057] If any remaining sealing resin remains after irradiation with the laser 16, it is preferable to remove the remaining resin. Methods for removing the remaining resin include a dry blasting method in which an abrasive is sprayed onto the sealing resin 1, a wet blasting method, and a water jet method. In order to remove the remaining resin while suppressing damage to the sealing body 18, the wet blasting method and the water jet method are preferable.

[0058] Fig. 15 is a diagram showing a manufacturing process of a semiconductor device according to a third embodiment of the present invention, following Fig. 14. As shown in the rear view of Fig. 15(a), individual pieces are formed using a dicing blade 11. The dicing blade 11 is used to cut the sealing body 18 along the frame 7x. The cutting direction by the dicing blade 11 is both the horizontal direction (x direction) and the vertical direction (y direction) of the sealing body 18.

[0059] Fig. 15(b) is a cross-sectional view taken along line NN shown in Fig. 15(a). Cutting is performed using a dicing blade 11 along the frame 7x between the leads 2. By making the width of the dicing blade 11 larger than the width of the frame 7x, the frame 7x can be completely removed, and the cut surface of the lead 2 is formed by dicing.

[0060] 15(c) is a cross-sectional view taken along the line PP shown in FIG. 15(a). Cutting is performed using a dicing blade 11 along the frame 7x between the resin recesses 4. Dicing is performed by aiming at the center of the frame 7x to completely remove the frame 7x, and dicing is performed so as to leave the adjacent resin recesses 4.

[0061] Fig. 16 is a diagram showing a manufacturing process of a semiconductor device according to a third embodiment of the present invention, following Fig. 15. Fig. 16(a) is a back view of the semiconductor device separated by dicing. By dicing, the frame 7x and the frame 7y are removed, resulting in individual semiconductor devices 23.

[0062] Fig. 16(b) is a cross-sectional view taken along line RR in Fig. 16(a). The side surface of the lead 2 is exposed from the sealing resin 1 and is flush with the side surface of the sealing resin 1.

[0063] Fig. 16(c) is a cross-sectional view taken along line SS shown in Fig. 16(a). There are no leads 2, and a resin recess 4 is formed in the lower part of the side of the sealing resin 1. Since the resin recess 4 is recessed deeper than the side of the sealing resin 1, no metal burrs adhere to the resin recess 4.

[0064] In conventional semiconductor devices, dicing would cause metal burrs 3 to form between adjacent leads 2 as shown in Fig. 21, but in the semiconductor device according to the embodiment of the present invention, the recessed resin 4 is present, so metal burrs do not extend from the leads 2 and adhere to the surface of the resin burr 4. This allows the semiconductor device 23 to be a semiconductor device that suppresses short circuits between the leads. Furthermore, in the semiconductor device 21 of this example, the tips of the leads do not become thin, and there is no risk of impairing mounting reliability.

[0065] 17 is a diagram showing a manufacturing process of a semiconductor device according to a fifth embodiment of the present invention. First, as shown in FIG. 17(a), a multi-sided lead frame 7 is prepared. The multi-sided lead frame 7 is a unit lead frame 17 consisting of a rectangular die pad 5 and a plurality of leads 2 spaced apart from the die pad 5, and the unit lead frames 17 are arranged in a lattice pattern. The unit lead frame 17 shown surrounded by a dashed line is surrounded by frames 7x and 7y, the leads 2 are connected to the frame 7x, and the die pad 5 is connected to the frame 7y via a suspension lead 9. The multi-sided lead frame 7 is mainly made of a copper material or a copper alloy material.

[0066] A semiconductor element (not shown) is mounted on the surface opposite the back surface of die pad 5, and the semiconductor element is electrically connected to leads 2. A multi-sided lead frame 7 including die pad 5 and leads 2, and the semiconductor element mounted on die pad 5 are collectively sealed with sealing resin 1. At this time, the back surface of die pad 5 and the back surface of leads 2 are exposed from sealing resin 1. Furthermore, after sealing, a plating layer for mounting is formed on the back surface of die pad 5 and the back surface of leads 2.

[0067] 17(a) is a back view of a sealing body 18 in which a multi-sided lead frame 7 is collectively sealed with sealing resin 1, which differs from the sealing body 18 shown in Fig. 13(a) in that a resin recess 4 is provided by removing a part of the surface of the sealing resin 1 between adjacent leads 2. Here, the resin recess 4 is provided not only between adjacent leads 2, but also in the surface of the sealing resin 1 between the frame 7y and the lead 2.

[0068] Fig. 17(b) is a cross-sectional view taken along line UU shown in Fig. 17(a) At this stage, the leads 2 of the vertically adjacent unit lead frames 17 are connected via the frame 7x.

[0069] Fig. 17(c) is a cross-sectional view taken along line VV in Fig. 17(a). This cross-section does not show the leads, but shows the semiconductor element 6 on the die pad 5, the frame 7x, the resin recess 4 provided on the side of the frame 7x, and the sealing resin 1 that covers them. The resin recess 4 is provided from the bottom surface to the top surface of the sealing body 18.

[0070] Using Figure 18, the molding of the sealing body 18 with the resin recess 4 shown in Figure 17 will be described. Figure 18(a) is a diagram showing the sealing body 18 in the middle of being molded along the line U-U in Figure 17(a). A mold 19 for sealing the multi-sided lead frame 7 on which the semiconductor element 6 is mounted is prepared. The mold 19 is composed of an upper mold 19a and a lower mold 19b, with a cavity 30 therebetween. The figure shows that the sealing resin 1 is poured into the cavity 30 from the left side of the figure, and the semiconductor element 6, die pad 5, leads 2, etc. are sealed with the sealing resin 1.

[0071] Fig. 18(b) is a diagram showing the sealing body 16 in the middle of being molded along the line VV in Fig. 17(a). As shown in the figure, a mold protrusion 20 is provided so as to protrude from the upper mold 19a toward the cavity 30. The mold protrusion 20 protrudes downward from the lower surface of the upper mold 19a, with its side surface contacting the side surface of the frame 7x, and further, the tip of the mold protrusion 20 contacts the upper surface of the lower mold 19b.

[0072] Conversely, the mold 19 may have a structure in which the mold protrusion 20 protrudes upward from the upper surface of the lower mold 19b, its side surface contacts the side surface of the frame 7x, and the tip of the mold protrusion 20 contacts the lower surface of the upper mold 19a. When the mold protrusion 20 protrudes upward from the upper surface of the lower mold 19b, the tip of the mold protrusion 20 does not need to contact the lower surface of the upper mold 19a, and it is sufficient that the upper surface height of the mold protrusion 20 is set higher than the upper surface height of the frame 7x. The resin recess 4 formed in the sealing body 18 shown in FIG. 17 is formed opposite to the above-mentioned mold protrusion 20.

[0073] Fig. 19 is a diagram showing a manufacturing process of a semiconductor device according to a fifth embodiment of the present invention, subsequent to Fig. 18. As shown in the rear view of Fig. 19(a), individualization is performed using a dicing blade 11. That is, the sealing body 18 is cut along the frame 7x using the dicing blade 11 to be individualized. The cutting direction by the dicing blade 11 is both the horizontal direction (x direction) and the vertical direction (y direction) of the sealing body 18.

[0074] In the shape shown in the figure, resin recesses 4 are provided not only between adjacent leads 2, but also between the left side surface of the sealing resin 1 and the lead 2a, and between the right side surface of the sealing resin 1 and the lead 2c. In other words, resin recesses 4 are also provided in the portions that will become corners of the semiconductor device to be formed later. Generally, cracks and chips are likely to occur in semiconductor devices at the portions where dicing in the horizontal direction (x direction) and vertical direction (y direction) intersect, but in the case of this shape, the intersecting portions are resin recesses 4, which has the secondary effect of preventing cracks and chips in the semiconductor device.

[0075] Fig. 19(b) is a cross-sectional view taken along the line WW shown in Fig. 19(a). The sealing body 18 is cut using a dicing blade 11 along the frame 7x between the leads 2. By making the width of the dicing blade 11 larger than the width of the frame 7x, the frame 7x can be completely removed, and the cut surface of the lead 2 is formed by dicing.

[0076] 19(c) is a cross-sectional view taken along line ZZ shown in FIG. 19(a). The sealing body 18 is cut using a dicing blade 11 along the frame 7x between the resin recesses 4. Dicing is performed by aiming at the center of the frame 7x to completely remove the frame 7x, and dicing is performed so as to leave the adjacent resin recesses 4.

[0077] Fig. 20 is a diagram showing a manufacturing process of the semiconductor device according to the fifth embodiment of the present invention, following Fig. 19. Fig. 20(a) is a back view of the semiconductor device separated by dicing. By dicing, the frame 7x and the frame 7y are removed, and individual semiconductor devices 25 are obtained.

[0078] Fig. 20(b) is a cross-sectional view taken along the line AA-AA shown in Fig. 20(a). The side surface of the lead 2 is exposed from the sealing resin 1 and is flush with the side surface of the sealing resin 1.

[0079] Fig. 20(c) is a cross-sectional view taken along the line BB-BB shown in Fig. 20(a). There are no leads 2, and a resin recess 4 is formed on the side surface of the sealing resin 1. Since the resin recess 4 is recessed deeper than the side surface of the sealing resin 1, no metal burrs adhere to the resin recess 4.

[0080] In conventional semiconductor devices, dicing would cause metal burrs 3 to be generated between adjacent leads 2 as shown in Fig. 21, but when the manufacturing method for a semiconductor device 25 according to an embodiment of the present invention is used, as shown in Fig. 5, the presence of a recessed resin 4 prevents metal burrs from extending from the leads 2 and adhering to the surface of the resin burr 4. This makes it possible to provide a semiconductor device 25 that suppresses short circuits between the leads. In addition, in the semiconductor device 25 of this example, the tips of the leads do not become thin, and there is no risk of impairing mounting reliability. [Explanation of symbols]

[0081] 1 Sealing resin 2, 2a, 2b, 2c Lead 3 Metal burrs 4, 4a, 4b Resin recess 5 Die pad 6. Semiconductor elements 7 Multi-sided lead frame 7x, 7y frame border 8a, 8b, 8c Space section 9 Suspension Lead 10a, 10b, 10c cutting part 11 Dicing blade 12 Dicing tape 13, 14, 21, 22, 23, 24 Semiconductor device 15 Remaining part 16. Laser 17, 17a, 17b Unit lead frame 18 Sealing body 19 Mold 19a Upper mold 19b Lower mold 20 Mold protrusion 30 Cavity 41 Eaves area H1 Lead height H2 Resin recess height L1 Lead depth L2 Resin recess depth D1 Design lead distance D2 Effective lead distance

Claims

1. A semiconductor element; a plurality of leads spaced apart around the semiconductor element and electrically connected to the semiconductor element; a sealing resin that seals the semiconductor element and the plurality of leads, a resin recess is provided between the adjacent leads and exposed on one side surface of the sealing resin; The semiconductor device is characterized in that a cross section of the resin recess in a depth direction has a shape of a right triangle with an arc-shaped hypotenuse.

2. 2 . The semiconductor device according to claim 1 , wherein the height of the resin recess on the one side surface is greater than the height of the leads.

3. 3. The semiconductor device according to claim 1, wherein the resin recess is provided on the one side surface so as to contact a plurality of the leads.

4. 4. The semiconductor device according to claim 1, wherein the resin recess is provided in the entire surface of the sealing resin facing the one side surface.

5. A semiconductor element; a plurality of leads spaced apart around the semiconductor element and electrically connected to the semiconductor element; a sealing resin that seals the semiconductor element and the plurality of leads, A method for manufacturing a semiconductor device, comprising the steps of: providing a resin recess between the plurality of leads adjacent to each other and exposed on one side surface of the sealing resin; preparing a multi-sided lead frame in which a plurality of unit lead frames each including a die pad and the plurality of leads spaced apart around the periphery of the die pad are arranged, the plurality of leads of an upper unit lead frame and the plurality of leads of a lower unit lead frame are arranged parallel to each other, and the lower unit lead frame is offset from the upper unit lead frame; placing the semiconductor element on the multi-sided lead frame; electrically connecting the semiconductor element to the plurality of leads; a step of sealing the semiconductor element and the plurality of leads with the sealing resin to form a sealed body; a step of dividing the sealing body into individual pieces by blade dicing and removing the sealing resin between the plurality of leads; 13. A method for manufacturing a semiconductor device comprising:

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