AC chopper circuit control device
Patent Information
- Application Number
- JP2020022929
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-02-14
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2040-02-14
AI Technical Summary
【0023】 (1)請求項1~4に記載の発明によれば、半導体スイッチング素子のオン、オフの切り替えタイミングを自動的に調整して異常電流の発生を抑制することができる。また、無効電力を零とすることができ、力率の向上、入力電流の振幅減少、損失低減が可能となる。 (2)請求項3に記載の発明によれば、例えば通常運転時の位相指令値には、試運転時に記憶しておいた固定の位相指令値を用いることができるので、装置の安定性が向上し、運転開始直後から電流の異常波形を抑制することができる。
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Abstract
Description
[Technical field]
[0001] The present invention relates to a control device for an AC chopper circuit, and more particularly to a technique for suppressing current distortion in an AC chopper circuit in which, for example, one leg of a single-phase inverter is replaced with a diode. [Background technology]
[0002] The main circuit configuration of a typical AC chopper circuit is shown in Fig. 1. In Fig. 1, one end of a single-phase AC power source 11 is connected to a common connection point of a pair of semiconductor switching elements Sa and Sb connected in series as upper and lower arms via reactors 12a and 12b that form an LC filter. The semiconductor switching elements Sa and Sb are composed of, for example, MOSFETs or IGBTs as shown in the figure.
[0003] The other end of the AC power supply 11 is connected to a common connection point of a pair of diodes 13a and 13b connected in series.
[0004] Reference numeral 14 denotes a capacitor on the DC output side of the AC chopper circuit, and this capacitor 14, a series circuit of diodes 13a and 13b, and a series circuit of semiconductor switching elements Sa and Sb (hereinafter, this may be referred to as a leg) are connected in parallel.
[0005] A capacitor 15 that constitutes an LC filter is connected between the common connection point of the reactors 12a, 12b and the other end of the AC power supply 11.
[0006] A potential transformer 16 is connected across the AC power supply 11, and a detected AC power supply voltage value V1 is obtained on the secondary side of the potential transformer 16.
[0007] Resistors 17 and 18, which act as a semiconductor switching element voltage detection circuit, are connected in series between both ends (drain-source) of the semiconductor switching element Sb of the lower arm. A voltage divided by these resistors 17 and 18 is output as a semiconductor switching element voltage detection value Vds.
[0008] In the figure, Iout denotes the output current of the AC power source 11, Ichp denotes the input current (chopper input current) of the AC chopper circuit, and Vdc denotes the DC voltage across the capacitor 14.
[0009] In the above configuration, active power can be made to flow in only one direction from the AC power supply 11 side to Vdc by controlling the semiconductor switching elements Sa, Sb to be turned on and off by a control device (not shown).
[0010] Incidentally, Patent Document 1 discloses a technique for controlling a general-purpose inverter so that the output voltage matches a target voltage, with good responsiveness even when the input voltage changes suddenly. [Prior art documents] [Patent documents]
[0011] [Patent Document 1] Japanese Patent Application Publication No. 10-337032 Summary of the Invention [Problem to be solved by the invention]
[0012] An AC chopper including the AC chopper circuit of FIG. 1 needs to appropriately switch a semiconductor switching element that performs switching in accordance with the polarity of the AC power supply voltage V1.
[0013] Figure 4 shows the simulation waveforms when the switching timing is off. Figure 4(a) shows the case where the switching timing is 0.01rad = 0.57deg too early, Figure 4(b) shows the optimal case, and Figure 4(c) shows the case where it is too late.
[0014] The upper part of Figure 4 shows the waveform of the input current Ichp, and the lower part shows the waveform of the output current Iout of the AC power supply. In the upper parts of Figures 4(a) and (c), a whisker-like abnormal current flows momentarily near the zero crossing. From the moment this abnormal current occurs, oscillations due to LC resonance are superimposed, and although they are attenuated to some extent over the half cycle of the fundamental wave, the oscillations expand when the next abnormal current occurs. This phenomenon becomes noticeable in the following cases.
[0015] (1) There is a large difference in timing between the switching elements of the semiconductor switching devices. (2) Synchronous rectification is used (3) The filter L (reactors 12a and 12b in FIG. 1) is small. (4) Input current is small (5) A capacitor (capacitor 15 in FIG. 1) is connected to the AC side of the device as a filter.
[0016] The filter capacitor can be removed, but the switching ripple will flow to the AC power supply. Also, if a power factor adjustment capacitor is connected to the system, it will induce resonance. The superposition of such vibrations on the current will cause the LC to heat up and burn, generate noise, and cause malfunctions of surrounding devices.
[0017] Patent Document 1 aims to reduce the deviation in current when the AC power supply voltage changes suddenly, and therefore cannot deal with the above phenomenon.
[0018] The present invention is devised to solve the above-mentioned problems, and an object of the present invention is to provide a control device for an AC chopper circuit that can prevent oscillations from being superimposed on an input current due to the above-mentioned deviation in switching timing in an AC chopper circuit. [Means for solving the problem]
[0019] The control device for an AC chopper circuit according to claim 1 for solving the above problem comprises: A control device for an AC chopper circuit in which a capacitor, a set of semiconductor switching elements connected in series as upper and lower arms, and a set of diodes connected in series are connected in parallel, and a single-phase AC power source is connected between a common connection point between the set of semiconductor switching elements and a common connection point between the set of diodes, The output voltage command value V is set so that the input current detection value of the AC chopper circuit is equal to the input current command value. * a current control block that outputs a phase command value calculation block that calculates a reactive power component of an input current of the AC chopper circuit based on a phase signal output from a PLL block, and outputs a phase command value that makes the reactive power of the input current of the AC chopper circuit zero; an AC power supply voltage detection value obtained by detecting the voltage of the single-phase AC power supply, or a semiconductor switching element voltage detection value obtained by detecting the voltage across both ends of a semiconductor switching element connected to a lower arm among the set of semiconductor switching elements, or the output voltage command value V * The voltage phase is calculated from the output voltage command value from one calculation cycle before, which is obtained by temporarily storing the value obtained by multiplying the reference sine wave by The phase command value output from the phase command value calculation block; and Based on the above, the voltage of the single-phase AC power supply is synchronized. The above Calculate the phase signal The above A PLL block; The PLL block calculates The above A reference sine wave is obtained by multiplying a cosine value corresponding to a phase signal by the reciprocal of a DC voltage detection value obtained by detecting the voltage across the capacitor, and a switching duty ratio of the set of semiconductor switching elements is calculated from the reference sine wave. The output voltage command value V * and calculating an output voltage command for a set of semiconductor switching elements by superimposing the above. the phase signal an output voltage command value calculation block that selects an output voltage command for the set of semiconductor switching elements in accordance with the polarity of a cosine value corresponding to a PWM modulation block that generates gate signals for the set of semiconductor switching elements by adding a dead time to a difference between an output voltage command selected by the output voltage command value calculation block and a carrier signal; The present invention is characterized by comprising:
[0020] The control device for an AC chopper circuit according to claim 2 includes the steps of: The phase command value calculation block teeth, A sine value table that receives the phase signal θ calculated by the PLL block and outputs a sine wave sinθ that is 90 degrees out of phase with the AC power supply voltage; a multiplier that multiplies the input current of the AC chopper circuit by the sine wave sin θ; a low-pass filter for extracting a DC component from the output of the multiplier; a PI amplifier that amplifies the output of the low-pass filter by proportional integral calculation; The output of the PI amplifier is output as a phase command value.
[0021] The control device for an AC chopper circuit according to claim 3 includes the steps of: The phase command value calculation block teeth, A sine value table that receives the phase signal θ calculated by the PLL block and outputs a sine wave sinθ that is 90 degrees out of phase with the AC power supply voltage; a multiplier that multiplies the input current of the AC chopper circuit by the sine wave sin θ; a low-pass filter for extracting a DC component from the output of the multiplier; a PI amplifier that amplifies an output of the low-pass filter by a proportional integral operation; and a means for switching between storing the output of the PI amplifier as a phase command value during a test run and outputting the stored phase command value as a fixed phase command value during normal operation.
[0022] The control device for an AC chopper circuit according to claim 4 includes the steps of: The phase command value calculation block teeth, A value proportional to the product of the input current amplitude command value of the AC chopper circuit and the AC side inductance value is added to the phase command value to correct the phase command value. Effect of the Invention
[0023] (1) According to the invention described in claims 1 to 4, the on / off switching timing of the semiconductor switching elements can be automatically adjusted to suppress the occurrence of abnormal current. In addition, the reactive power can be made zero, which enables the improvement of the power factor, the reduction of the amplitude of the input current, and the reduction of losses. (2) According to the invention described in claim 3, for example, a fixed phase command value stored during trial operation can be used as the phase command value during normal operation. This improves the stability of the device and makes it possible to suppress abnormal current waveforms immediately after the start of operation.
[0024] Also, for example, even if normal operation is performed using a fixed phase command value stored during a test run, if the input current amplitude command value drops, the feedback loop of the phase command value calculation block can be temporarily enabled to switch and readjust the phase command value, thereby making it possible to follow aging of the detector, etc. (3) According to the invention as recited in claim 4, abnormal current waveforms can always be suppressed even if the input current amplitude changes. [Brief description of the drawings]
[0025] [Figure 1] This is a diagram showing the main circuit configuration of a typical AC chopper circuit. [Diagram 2] FIG. 2 is a control block diagram of an AC chopper according to an embodiment of the present invention. [Diagram 3] FIG. 3 is a block diagram of the main part of FIG. 2. [Figure 4] FIG. 4 is an explanatory diagram showing the influence on a current waveform due to a shift in switching timing of a switching element. [Diagram 5] FIG. 2 is a block diagram showing a phase command value calculation according to the first embodiment of the present invention. [Figure 6] FIG. 11 is a block diagram showing a phase command value calculation according to a second embodiment of the present invention. [Figure 7] FIG. 11 is a block diagram showing a phase command value calculation according to a third embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0026] Hereinafter, an embodiment of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiment. Fig. 2 shows a control block according to an embodiment of the present invention applied to the AC chopper circuit of Fig. 1.
[0027] In FIG. 2, 21 denotes an LPF (low pass filter) that receives as input the input current detection value Ichp of the input current of the AC chopper circuit in FIG. 1 detected by a current transformer (not shown) and removes noise, switching ripple, and the like from Ichp.
[0028] 22 is a cosine value (cosθ) corresponding to a phase θ synchronized with the voltage of the single-phase AC power supply 11 calculated by a PLL block 50 described later, and a set input current amplitude command value Ichp * Here, the cosine value (cos θ) is found by referring to a cosine value table 31 prepared in advance.
[0029] 23 is the instantaneous current amplitude command value Ichp * This is a subtractor that subtracts the output of the LPF 21 from cos θ (input current command value).
[0030] Reference numeral 24 denotes a P amplifier (current control amplifier) that receives the output of the subtractor 23, multiplies it with a gain, and outputs a proportional value. Note that the P amplifier 24 may also use a resonant amplifier whose gain becomes infinite for the fundamental wave frequency.
[0031] The LPF 21, the multiplier 22, the subtractor 23 and the P amplifier 24 are configured to multiply the input current detection value Ichp by the instantaneous current amplitude command value Ichp * cosθ (input current command value) and output voltage command V * The output voltage command value V * is being sought.
[0032] Reference numeral 32 denotes a multiplier which multiplies 1 / Vdc, which is obtained by a divider 33 from the reciprocal of a DC voltage detection value Vdc obtained by detecting the voltage across the capacitor 14 in FIG. 1, by the cos θ to obtain a reference sine wave cos θ / Vdc.
[0033] 34 is the output voltage command value V * and the reference sine wave cos θ / Vdc, which is the output of multiplier 32.
[0034] 35 temporarily stores the output of the multiplier 34 and outputs the output voltage command value V * This is the buffer that outputs
[0035] The PLL block 50 has a phase command value calculation block (to be described later) that configures a feedback loop so that the reactive power of the input current of the AC chopper circuit becomes zero, and outputs the semiconductor switching element voltage detection value Vds, the AC power supply voltage detection value V1, or the output voltage command value V from one calculation cycle ago. * ' is input, and a phase signal θ synchronized with the voltage of the AC power supply 11 in FIG. 1 is calculated and output.
[0036] 61 is the output voltage command value V * A multiplier 62 doubles the reference sine wave cos θ / Vdc output from the multiplier 32.
[0037] Reference numeral 63 denotes an adder that adds 2 to the output 2cosθ / Vdc of the multiplier 62, and reference numeral 64 denotes a subtractor that subtracts 2 from the output 2cosθ / Vdc of the multiplier 62.
[0038] Reference numeral 65 denotes a multiplier which multiplies the output of the adder 63 by a correction coefficient α for correcting the duty ratio, and reference numeral 66 denotes a multiplier which multiplies the output of the subtractor 64 by a correction coefficient α for correcting the duty ratio.
[0039] The correction coefficient α is a fixed correction coefficient that is set, or is, for example, a correction coefficient that is calculated based on the instantaneous current amplitude command value Ichp *The absolute value of cosθ is smaller than half the peak-to-peak value Irpl / 2 of the ripple current, and the input current amplitude command value Ichp * is equal to or smaller than the threshold Ith, the correction coefficient is 0 to 1, and is 1 otherwise.
[0040] When the correction coefficient α is not used, the multipliers 65 and 66 are omitted.
[0041] Reference numeral 67 denotes a subtractor that subtracts 1 from the output of the multiplier 65 or the output of the adder 63, and reference numeral 68 denotes an adder that adds 1 to the output of the multiplier 66 or the output of the subtractor 64. The subtractor 67 and the adder 68 each output the switching duty ratios (duty ratios calculated from the reference sine wave cosθ / Vdc) of the semiconductor switching elements Sa and Sb in FIG.
[0042] 69 subtracts the output of the multiplier 61 from the output of the subtracter 67 (to obtain the output voltage command value V * (superimposing twice the component) Output voltage command α(2cosθ / Vdc+2)-1-2V * It is a subtractor that outputs
[0043] 70 subtracts the output of the multiplier 61 from the output of the adder 68 (to obtain the output voltage command value V * (superimposing twice the component) Output voltage command α(2cosθ / Vdc-2)+1-2V * It is a subtractor that outputs
[0044] 71 is the output voltage command α(2cosθ / Vdc+2)-1-2V output from the subtractor 69 if the cosθ is negative. * If it is positive, the output voltage command α(2cosθ / Vdc-2)+1-2V is output from the subtractor 70. * This is a switch to select.
[0045] The multipliers 32, 34, 61, 62, 65, and 66, the buffer 35, the adders 63 and 68, the subtractors 64, 67, 69, and 70, and the switch 71 constitute an output voltage command value calculation block.
[0046] Reference numeral 72 denotes a carrier generating unit that outputs a carrier triangular wave that changes between −1 and 1, and this carrier triangular wave is subtracted in a subtractor 73 from the output voltage command selected by the switch 71 .
[0047] Reference numeral 74 denotes a comparator that detects whether the subtraction output of the subtractor 73 is positive. Reference numeral 75 denotes a dead time adding unit that adds a dead time to the output of the comparator 74. The dead time adding unit 75 outputs gate signals for the semiconductor switching elements Sa and Sb in FIG.
[0048] The carrier generating section 72, the subtractor 73, the comparator 74 and the dead time adding section 75 constitute a PWM modulation block.
[0049] The control block in Figure 2 assumes the application of synchronous rectification. If the semiconductor switching elements Sa and Sb in Figure 1 are MOSFETs, when the MOSFET is turned on while current is flowing through the anti-parallel diode, the current will flow through the MOSFET. In this case, the MOSFET itself has better characteristics than the MOSFET's parasitic anti-parallel diode, so conduction loss can be reduced. When the input current detection value Ichp>0, normally only the lower arm semiconductor switching element Sb needs to be switched on, but when Sb is OFF, synchronous rectification is performed by turning on the upper arm semiconductor switching element Sa.
[0050] When the AC power supply voltage detection value V1 ≈ 0, if V1 > 0 then Ichp > 0 and diode 13b on the lower arm side of the diode series circuit becomes conductive, so in order to bring the chopper output voltage to near 0, the output voltage command value compared with the carrier triangular wave is set to near -1 to lengthen the ON time of semiconductor switching element Sb. Similarly, if V1 < 0, the output voltage command value is set to near 1 to lengthen the ON time of semiconductor switching element Sa. This operation is performed in the output voltage command value calculation block in Figure 2.
[0051] In the PWM modulation block in FIG. 2, the output voltage command value is compared with the carrier triangular wave, a dead time is added, and the resulting gate command is input to the corresponding semiconductor switching element in FIG.
[0052] The details of the PLL block 50 are configured as shown in Fig. 3. The PLL block 50 in Fig. 3 is configured to receive the AC power supply voltage detection value V1 detected by the instrument transformer 16 in Fig. 1, the semiconductor switching element voltage detection value Vds detected by the voltage division of the resistors 17 and 18 in Fig. 1, and the output voltage command value V from the buffer 35 in Fig. 2 one calculation cycle before. * ´ is entered.
[0053] Reference numeral 51 denotes a multiplier that multiplies the semiconductor switching element voltage detection value Vds by a set gain G (for example, G=2).
[0054] 52 is the output of the multiplier 51, which is 2Vds, if the AC chopper circuit is stopped, and is the output of the buffer 35 in FIG. 2, which is the output voltage command value V * ' is a switch that selects and outputs each of them.
[0055] A switch 53 selects and outputs either the AC power supply voltage detection value V1 or the output of the switch 52.
[0056] A multiplier 54 obtains the product of the output of the switch 53 and a sine wave sin θ that is delayed by 90 degrees with respect to the AC power supply voltage and is output from a sine value table 59 described later.
[0057] Reference numeral 55 denotes an LPF that extracts a DC component from the output of the multiplier 54 .
[0058] Reference numeral 56 denotes a subtractor that obtains the deviation between the output of the LPF 55 and a phase command value calculated by a phase command value calculation block that configures a feedback loop so that the reactive power of the input current of an AC chopper circuit described later becomes zero.
[0059] Reference numeral 57 denotes a PI amplifier which receives the output of the subtractor 56, multiplies the gain, adds a proportional value and an integrated value, and outputs the sum. The output of the PI amplifier 57 corresponds to the angular frequency ω of the AC power supply voltage.
[0060] Reference numeral 58 denotes an integrator that obtains a phase signal θ by integrating the angular frequency ω that is the output of the PI amplifier 57. The phase signal θ output from the integrator 58 is input to the cosine value table 31 in Fig. 2 and also to a sine value table 59. In the sine value table 59, a sine value corresponding to the phase θ prepared in the table is referenced, and a sine wave sin θ that is delayed by 90 deg with respect to the AC power supply voltage is generated.
[0061] When the switch 53 selects the output of the switch 52, the semiconductor switching element voltage detection value Vds is selected when the device is stopped, and the output voltage command value V from one calculation cycle ago is selected when the device is operating. * ' is input, and the product of this with a sine wave sin θ (output of sine value table 59) shifted by 90 degrees is calculated in multiplier 54. If the input is shifted by exactly 90 degrees with respect to sin θ, the DC component extracted by LPF 55 from the output of multiplier 54 is zero.
[0062] However, if the input lags θ and the phase shift with sinθ is less than 90deg, the input contains an in-phase component with sinθ, so the DC component becomes positive. Similarly, if the input leads θ, the output of LPF 55 becomes negative. The deviation between the output of LPF 55 and the phase command value is amplified by PI amplifier 57, and if the input lags, the angular frequency ω, which is the output of PI amplifier 57, decreases and the phase θ also lags to synchronize with the input signal.
[0063] During operation of the device, if the output phase θ of the PLL block 50 deviates significantly from the AC power supply phase, an abnormal current would normally flow. However, the output voltage command value V is set so that the abnormal current is suppressed by the control of the current control block, that is, the power supply voltage phase and the device output voltage phase are aligned. *The result is input to the PLL block 50 via the buffer 35, whereby the phase signal θ can be synchronized with the AC power supply phase.
[0064] When the device is stopped, the semiconductor switching element voltage detection value Vds is used as an input signal to the PLL block 50. A multiplier 51 that multiplies the gain G by G=2 is added to the semiconductor switching element voltage detection value Vds, and when the AC power supply voltage is positive, the current passes through the voltage dividing resistor (resistors 17, 18) and the lower arm of the diode (diode 13b) in Figure 1, and Vds becomes a value proportional to the AC power supply voltage. When the AC power supply voltage is negative, there is no path for the current to flow, and the semiconductor switching element voltage detection value Vds is zero.
[0065] Therefore, the semiconductor switching element voltage detection value Vds has a half-wave rectified waveform, and the output of the LPF 55 is halved. On the other hand, the output voltage command value V * Since the waveform of ' is sinusoidal, a difference of two times occurs in the output of the LPF 54. To eliminate this difference, Vds is doubled in advance in the multiplier 51 and then input to the PLL block (50).
[0066] The phase command value input to the subtractor 56 in FIG. 3 is calculated by a phase command value calculation block according to the following first to third embodiments. EXAMPLES
[0067] FIG. 5 shows a phase command value calculation block of the first embodiment. Reference numeral 101 denotes a sine value table which receives the phase signal θ calculated by the PLL block 50 as an input and outputs a sine wave sin θ that is shifted in phase by 90 degrees with respect to the AC power supply voltage.
[0068] A sine wave sin θ output from a sine value table 101 is multiplied by a multiplier 102 to obtain a product of the input current detection value Ichp of the AC chopper circuit.
[0069] Reference numeral 103 denotes an LPF (low pass filter) that extracts a DC component from the output of the multiplier 102 .
[0070] Reference numeral 104 denotes a PI amplifier that amplifies the output of the LPF 103 by proportional-integral calculation, and the output thereof is input to the subtractor 56 of the PLL block in FIG. 3 as a phase command value.
[0071] The abnormal waveform in FIG. 4 occurs near the zero crossing of Ichp, and therefore has a reactive power component. Moreover, (a) and (c) in FIG. 4 occur in opposite directions. In the first embodiment, this abnormal waveform is detected as reactive power. In the block in FIG. 5, Ichp and sinθ are multiplied by a multiplier 102, and a value corresponding to the reactive power component can be detected by extracting the DC component by an LPF 103. This is input to a PI amplifier 104 to form a feedback loop, and the phase command value is automatically adjusted to an appropriate value by the PI amplifier 104 so that the reactive power component, which is the input to the PI amplifier 104, becomes zero. This makes it possible to suppress the abnormal waveform.
[0072] According to the first embodiment, the timing (phase signal θ) for switching the semiconductor switching elements (Sa, Sb) that perform switching can be automatically adjusted to suppress abnormal waveforms, and the outflow of harmonics to the AC power supply (11) can be suppressed. Even when synchronous rectification is applied, abnormal waveforms do not occur, and the effect of improving efficiency, which is an advantage of synchronous rectification, can be obtained. In addition, since reactive power becomes zero, this leads to a slight improvement in the power factor, a reduction in the amplitude of the input current, and a reduction in losses. EXAMPLES
[0073] The PI amplifier 104 of the first embodiment needs to have a response speed slower than that of the PLL (PLL block 50) to improve stability. Therefore, for a while after starting operation, oscillations are superimposed on the current as shown in Figs. 4(a) and (c). It is sufficient to set the phase command value to an appropriate fixed value, but how to obtain it is an issue. An appropriate phase command value depends on the detection delay of the input current detection value Ichp and the AC power supply voltage detection value V1. Considering that the characteristics of the detector and input circuit differ from device to device, it becomes necessary to adjust the phase command value for each device.
[0074] Therefore, in the second embodiment, a trial run is first performed using the same phase command value calculation block as in the first embodiment, and an appropriate phase command value is obtained by feedback and stored. In the actual operation, the stored value is input to the PLL block in FIG. 3 as a fixed phase command value.
[0075] Fig. 6 shows a phase command value calculation block of the embodiment 2. The difference between Fig. 6 and Fig. 5 is that a switch 105 (switching means) is provided on the output side of the PI amplifier 104, and for example, during a test run, the switch 105 is connected to the PI amplifier 104 side to obtain an appropriate phase command value by feedback, and this is stored, for example, in a memory not shown, and during normal operation, the switch 105 is connected to the side of the stored value to output it as a fixed phase command value, and the other parts are configured in the same way as Fig. 5.
[0076] The above operation makes it possible to automatically adjust the phase command value. During normal operation, one feedback loop is eliminated, which is expected to improve stability, and a normal current waveform like that shown in Figure 4(b) can be obtained immediately after starting operation.
[0077] The test run must be performed under conditions where abnormal waveforms are likely to occur, and the input current amplitude command value Ichp * When the phase command value becomes 10% or less, the switch 105 is temporarily connected to the PI amplifier 104 side to activate the feedback loop, and the phase command value is readjusted to follow the aging change.
[0078] According to the second embodiment, the timing (phase signal θ) for switching the semiconductor switching elements (Sa, Sb) is set to an appropriate fixed value, improving the stability of the device and suppressing abnormal waveforms and harmonic outflow immediately after the start of operation. The adjustment of the fixed value is performed automatically, simplifying the adjustment work.
[0079] Even during normal operation, the input current amplitude command value Ichp * By temporarily activating the feedback loop using the PI amplifier 104 when the load is small, it is possible to follow the deterioration of the device over time. EXAMPLES
[0080] In FIG. 1, the switching of the semiconductor switching elements (Sa, Sb) that perform switching requires the use of the phase of the AC terminal voltage of the leg that performs switching. * There is no problem when V′ is used (switch 53 in FIG. 3 is switched to switch 52), but when V1 is used (switch 53 in FIG. 3 is switched to V1), a difference occurs between the phase of the AC terminal voltage and the phase of V1.
[0081] This difference is determined by the product of the inductance from the V1 detection point (the point where the potential transformer 16 is connected) to the AC terminal of the leg performing switching (the common connection point of the semiconductor switching elements Sa and Sb) and the amplitude of the input current.
[0082] Therefore, in the third embodiment, the input current amplitude command value Ichp * The phase difference is calculated from the inductance and the phase command value is corrected using this. This makes it possible to constantly suppress abnormal current waveforms even if the current amplitude changes.
[0083] FIG. 7 shows a phase command value calculation block of the third embodiment. The difference between FIG. 7 and FIG. 6 is that the set input current amplitude command value Ichp * 6. The difference is that a multiplier 106 is provided which multiplies the inductance value from the V1 detection point in FIG. 1 to the common connection point of the semiconductor switching elements Sa and Sb by a set gain G, and an adder 107 is provided which adds the output of the multiplier 106 to the output of the switch 105. The other parts are configured in the same way as in FIG. 6.
[0084] 1 and the phase of the common connection point voltage of the semiconductor switching elements Sa and Sb is output from the multiplier 106, and a phase command value corrected for the phase difference is output from the adder 107. This makes it possible to suppress abnormal waveforms even when the current amplitude changes. [Explanation of symbols]
[0085] 11…AC power supply 12a, 12b...Reactor 13a, 13b...Diode 14,15…Capacitor 16...Instrument transformer 17, 18…Resistance 21,55,103…LPF 22, 32, 34, 51, 54, 61, 62, 65, 66, 102, 106… multipliers 23,56,64,67,69,70,73…Subtractor 24…P amplifier 31...Cosine value table 33...Divider 35…Buffer 50…PLL block 52, 53, 71, 105…Switch 57,104…PI amplifier 58...Integrator 59,101...Sine value table 63,68,107…Adder
Claims
1. A control device for an AC chopper circuit in which a capacitor, a set of semiconductor switching elements connected in series as upper and lower arms, and a set of diodes connected in series are connected in parallel, and a single-phase AC power source is connected between a common connection point between the set of semiconductor switching elements and a common connection point between the set of diodes, The output voltage command value V is set so that the input current detection value obtained by detecting the input current of the AC chopper circuit becomes equal to the input current command value. * a current control block that outputs a phase command value calculation block that calculates a reactive power component of an input current of the AC chopper circuit based on a phase signal output from a PLL block, and outputs a phase command value that makes the reactive power of the input current of the AC chopper circuit zero; an AC power supply voltage detection value obtained by detecting the voltage of the single-phase AC power supply, or a semiconductor switching element voltage detection value obtained by detecting the voltage across both ends of a semiconductor switching element connected to a lower arm among the set of semiconductor switching elements, or the output voltage command value V * the PLL block that calculates the phase signal synchronized with the voltage of the single-phase AC power supply, based on a voltage phase calculated from an output voltage command value from one calculation cycle before, which is obtained by temporarily storing a value obtained by multiplying a reference sine wave by a reference sine wave, and on the phase command value output from the phase command value calculation block; A reference sine wave is obtained by multiplying a cosine value corresponding to the phase signal calculated by the PLL block by the reciprocal of a DC voltage detection value obtained by detecting the voltage across the capacitor, and a duty ratio of the switching of the set of semiconductor switching elements is calculated from the reference sine wave. The duty ratio is multiplied by an output voltage command value V * an output voltage command value calculation block that calculates an output voltage command for a set of semiconductor switching elements by superimposing the phase signals and selects an output voltage command for the set of semiconductor switching elements in accordance with the polarity of the cosine value corresponding to the phase signal; a PWM modulation block that generates gate signals for the set of semiconductor switching elements by adding a dead time to a difference between an output voltage command selected by the output voltage command value calculation block and a carrier signal; A control device for an AC chopper circuit comprising:
2. The phase command value calculation block a sine value table that receives the phase signal θ calculated by the PLL block and outputs a sine wave sin θ that is shifted in phase by 90 degrees with respect to the AC power supply voltage; a multiplier that multiplies the input current of the AC chopper circuit by the sine wave sin θ; a low-pass filter for extracting a DC component from the output of the multiplier; a PI amplifier that amplifies the output of the low-pass filter by a proportional integral operation; 2. The control device for an AC chopper circuit according to claim 1, wherein the output of the PI amplifier is output as a phase command value.
3. The phase command value calculation block a sine value table that receives the phase signal θ calculated by the PLL block and outputs a sine wave sin θ that is shifted in phase by 90 degrees with respect to the AC power supply voltage; a multiplier that multiplies the input current of the AC chopper circuit by the sine wave sin θ; a low-pass filter for extracting a DC component from the output of the multiplier; a PI amplifier that amplifies an output of the low-pass filter by a proportional integral operation; and a means for switching between storing an output of the PI amplifier as a phase command value during a test run and outputting the stored phase command value as a fixed phase command value during a normal run.
4. The phase command value calculation block 4. The control device for an AC chopper circuit according to claim 2 or 3, wherein a value proportional to a product of an input current amplitude command value and an AC side inductance value of the AC chopper circuit is added to the phase command value to correct the phase command value.
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