Feature Recognition by Vibration Neural Networks

Abstract

An electronic circuit for enabling efficient use of an oscillatory neural network for feature recognition includes a network of coupled voltage-controlled oscillators, each of the voltage-controlled oscillators adapted to receive an edge input signal phase-shifted by a fraction of a period length of the voltage-controlled oscillator in accordance with the signal strength of an analog input signal assigned to a respective one of the voltage-controlled oscillators, and an active output circuit, the active output circuit including input terminals connected to selected ones of the voltage-controlled oscillators, a summing unit for summing the input signals present at the input terminals, and a nonlinear amplifier having an input line connected to an output line of the summing unit, thereby enabling efficient use of the oscillatory neural network.

Description

[Technical field]

[0001] The present invention relates generally to neural networks and neural network devices, and more particularly to electronic circuits that enable oscillating neural networks to be used efficiently for feature recognition. [Background technology]

[0002] In the field of corporate IT (information technology), the constant growth of data is one of the continuing trends. To produce meaningful results, corporate IT departments strive to utilize this data more intensively by continuously performing better analytics on available and newly collected data. However, traditional data analysis techniques may no longer be sufficient to analyze the vast amount of unstructured (or semi-structured) data. With the proliferation of ultra-fast networks, increasing number of networks and the proliferation of Internet-connected devices, the data generated worldwide is growing exponentially and needs to be processed in a fast, efficient and "smart" way. Summary of the Invention

[0003] According to some embodiments, an electronic circuit can be provided for enabling efficient use of an oscillatory neural network for feature recognition. The electronic circuit includes a network of coupled voltage-controlled oscillators, each of which is adapted to receive an edge input signal that is phase-shifted by a fraction of a period length of the voltage-controlled oscillator according to a signal strength of an analog input signal assigned to a respective one of the voltage-controlled oscillators, and an active output circuit. The active output circuit includes input terminals connected to selected ones of the voltage-controlled oscillators, a summing unit for summing the input signals present at the input terminals, and a nonlinear amplifier having an input line connected to an output line of the summing unit. This enables efficient use of the oscillatory neural network.

[0004] According to a particular embodiment, a neural network device can be provided that includes a plurality of the above-described electronic circuits.

[0005] The proposed electronic circuit for enabling efficient use of vibration neural networks for feature recognition may provide multiple advantages, technical effects, contributions or improvements or combinations thereof.

[0006] One of the beneficial features of the proposed approach, which is typically implemented using digital neural networks in the past, is that multiple feature extraction functions can be implemented within the same filter unit of an analog oscillatory neural network. The layers of the proposed neural network can be cascaded in a straightforward manner to apply multiple filters in a hierarchical structure. However, even in such a design, each layer can recognize multiple features in one step.

[0007] Using a fairly simple oscillatory neural network, the active output circuit can efficiently use the results of the oscillatory neural network. The active output circuit is adapted with a very limited amount of analog electronic components to determine a predefined pattern in a given input matrix. Furthermore, the active output circuit is comparatively lightweight as a component.

[0008] Thus, the proposed concept supports the industrial strategy of using analog AI (Artificial Intelligence) cores, which allows for very fast pattern recognition of any kind. Furthermore, analog circuits can allow for very low power consumption compared to traditional alternative digital operation hardware accelerators. Encoding information (e.g., color channel information of a digital image) into the phase of the signal allows for operation at very low voltages.

[0009] Furthermore, the proposed embodiments may also allow the use of resistive memory that can be used as synaptic weights.Furthermore, oscillatory neural networks can be easily trained offline using the Hebbian learning algorithm.

[0010] Furthermore, the active output circuit can function as a majority gate, which outputs a signal of the same phase when the majority of the input signals have a different phase.

[0011] According to one embodiment, the electronic circuit may further include a plurality of active output circuits. The input terminals of each of the plurality of active output circuits may be connected to a group of transducers. Each group may represent a different predefined pattern of the received input signal. Thus, if the same elements of the matrix input signal are always fed to the same transducers, each combination of transducers (i.e., each group of transducers) can represent a specific pattern.

[0012] According to another embodiment of the electronic circuit, selected transducers, when activated with a phase shift, represent a predetermined pattern of the received input signal. In a 3x3 input matrix, many different patterns can be recognized in this way (e.g., descending diagonal lines, horizontal center lines, ascending contours, etc.). line , vertical centerline or L-shaped patterns or combinations thereof, or single dot patterns). Using an oscillatory neural network, different patterns can be identified with pattern-specific active output circuits. Note that the patterns mentioned here are merely exemplary, and other patterns can be identified (e.g., corner or edge patterns).

[0013] According to one embodiment, the electronic circuit may be adapted to process the signal of one color channel. Thus, by implementing as many electronic circuits as there are color channels and operating them in parallel, it may be possible to process the information of all color channels together. This may also be independent of the color model used and the number of parallel color channels.

[0014] According to one embodiment, the electronic circuit may represent a number of electronic circuits connected in series. Each of the electronic circuits represents a given filter. Thus, the output of one of the electronic circuits may be used as an input to the next layer represented by the next electronic circuit. Thus, cascaded filters may be implemented in deeper neural networks. As a result, deep neural networks may not be limited to areas limited to traditional artificial neural networks.

[0015] According to a preferred embodiment of the electronic circuit of the present invention, each of the input terminals of the summing part of the active output circuit may be connected to the input of the linear amplifier via a different resistor, so that the input terminals may, for example, all have the same resistance value so that the input signals (which also mirror each other in phase) are simply added.

[0016] According to one embodiment of the electronic circuit, the nonlinear amplifier may be a differential operational amplifier (i.e., a voltage feedback OpAmp). The nonlinear amplifier may have a semiconductor diode in its feedback loop and a forward direction. This second component of the active output circuit may be interpreted as representing the sigmoid function or ReLU function of a conventional neural network core.

[0017] According to one embodiment of the electronic circuit, each of the oscillators in the network may be connected to each of the other oscillators via a resistor / capacitor coupling circuit. A fully connected network may thus be realized. However, as an alternative, the network may not be fully connected. The proposed concept can also function with more limited connectivity between the different oscillators.

[0018] According to another embodiment of the electronic circuit, the portion of the period (in particular the time-shifted signals for the "0" and "1" input signals) may be half the period of the oscillation frequency of the oscillators. It can then be assumed that all oscillators essentially oscillate at the same frequency. It has been proven that a portion of the period is used that is at least greater than 120° when compared to the period of each of the oscillators. Advantageously, this portion may be 180°. Using this phase shift (or time shift) between the "0" and "1" signals provides the best possible effect in performing the detection of the specific pattern very reliably.

[0019] According to one embodiment of the electronic circuit, the active output circuitry may be integrated into a semiconductor unit. Furthermore, multiple active output circuits may be integrated into one semiconductor device. For example, all active output circuits required for all possible patterns of a given input matrix may be integrated into one semiconductor device. Furthermore, the oscillatory neural network may also be integrated within the same semiconductor device. In a further improved embodiment, the complete electronics required for all color channels (i.e., multiple ONNs and associated active output circuits) may be integrated into a single integrated unit (i.e., a single dedicated semiconductor die) as a high-performance analog neural network chip.

[0020] According to an embodiment of the electronic circuit, the phase shift of the output of the nonlinear amplifier of the active output circuit may be aligned with the majority of the received bit input signals. That is, if many "0"s are received, the phase at the output of the electronic circuit may match the phase of the received "0". Also, if many "1"s are received, the phase at the output of the electronic circuit may match the phase of the received "1". Thus, synchronization between different stages of subsequent layers can be easily achieved. For example, in the example of a 3x3 matrix, if five sub-squares are black (e.g., corresponding to a logical "1"), the phase of the output signal of the proposed electronic circuit may be aligned with the phase of a "1". And vice versa.

[0021] According to an embodiment, the edge input signal may change from logic "0" to logic "1" depending on a shift time derived from the signal strength of the analog input signal. Thus, if a quasi-analog grayscale value is measured, said quasi-analog value may not be directly used as an input value to the respective transducer, but may first be passed to a time-shift unit (or a phase-shift unit). The time-shift unit is adapted to generate a time-shift for the digital output signal of said unit, where the time-shift value corresponds to the quasi-analog grayscale. As a result, according to a particular embodiment, the edge input signal may change from logic "0" to logic "1" depending on a shift time derived from the signal strength of the analog input signal.

[0022] According to one embodiment, each of the oscillators may oscillate at the same frequency, which allows the dependencies between multiple oscillators and the network components implementing the feedback loop to become a controllable mathematical problem for simulation (and production), rather than an unmanageable and complex set of dependencies that may be difficult to train as an oscillatory neural network.

[0023] The above summary is not intended to describe each illustrated embodiment or every implementation of the present disclosure.

[0024] The drawings contained herein are incorporated in and form a part of this specification. These drawings illustrate embodiments of the present disclosure and, together with the description, explain the principles of the present disclosure. The drawings are merely illustrative of some embodiments and are not intended to limit the disclosure.

[0025] It should be noted that each embodiment is described with reference to a different subject matter. In particular, some embodiments are described with reference to method type claims, whereas other embodiments are described with reference to apparatus type claims. However, as a person skilled in the art will understand from the above and following description, unless otherwise stated, any combination of features belonging to one type of subject matter, as well as any combination between features relating to different subject matters, in particular any combination between features of a method type claim and a feature of an apparatus type claim, is considered within the scope of the disclosure of this specification.

[0026] The above defined aspects and further aspects of the present embodiments will be apparent from and elucidated with reference to the examples of embodiments described hereinafter, which should not be construed as limiting. [Brief description of the drawings]

[0027] [Figure 1] FIG. 2 is a block diagram illustrating one embodiment of an electronic circuit for enabling the efficient use of oscillatory neural networks for feature recognition. [Diagram 2] FIG. 2 shows the technical context in which the proposed system of electronic circuits according to FIG. 1 can be used. [Figure 3a] FIG. 1 is a diagram showing an example of a digital pattern. [Figure 3b] FIG. 1 shows an example of a more complex digital pattern. [Figure 4] FIG. 1 is an electrical wiring diagram of an embodiment having a 3×3 network of coupled voltage-controlled oscillators. [Diagram 5] FIG. 2 illustrates one embodiment of an active output circuit. [Figure 6] FIG. 2 shows a time-dependent output signal of an electronic circuit together with a reference signal for one sample, which is a descending diagonal line. [Figure 7] FIG. 1 shows an input image from the MNIST database and the resulting edge detection image. [Figure 8]FIG. 2 illustrates a computing system that utilizes the electronic circuit of FIG. 1 or related devices as a co-processor for processing image data for two or more color channels. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Scientific and enterprise IT departments are increasingly using artificial intelligence (AI) techniques to better understand and derive value from large amounts of data. However, traditional von Neumann computing architectures may no longer be sufficient to cope with the ever-growing volumes of data, data movement, and associated computing requirements.

[0029] In particular, AI methods and techniques may require many mathematical operations on input data, e.g., in the form of matrix-matrix multiplications often used in image recognition / classification, autonomous navigation, audio analysis in the frequency domain, etc. Such data, along with inputs in the form of voice data, other sound data, and text documents or mixed text and images, are increasingly included in the incoming data streams in traditional and cloud data centers. This results in the constant need to process exponentially growing amounts of data, and the increased processing speeds consume more power.

[0030] However, using AI systems in the form of traditional neural networks is not always sufficient either, since classical neural systems based on digital data processing with the simulation of weight values ​​in digital form are better treated as analog values, and may still require a very large amount of computing power. This is mainly due to the large amount of matrix / vector multiplications, which may require a very large amount of power. This can be problematic in Internet of Things (IoT) environments, where pre-processing of input data (e.g. images from a camera) may be performed instead of first transferring the data to a central place and processing the measurement data there.

[0031] It may therefore be desirable to implement a low power, high speed data processing device that requires much less power consumption than conventional computing architectures, for example, that can act as a co-processor to a conventional computing system.

[0032] Some approaches have tried to use electronic analog techniques to better address the power aspects. For this purpose, oscillatory neural networks (ONNs) have been used as artificial neural networks using a network of coupled oscillators. This allows the oscillators to correspond to the neurons (inspired by biological brain models) of the neural network, and the synaptic weights between pairs of new neurons, i.e. oscillators, can be emulated by the form and strength of the coupling between the oscillators. Such networks can be trained to perform correlation tasks such as image classification and / or speech recognition by processing training samples with the network and adapting the matrix of network weights so that the network "learns" or acquires the specific correlations to be detected. Few hardware implementations have been proposed for ONNs. These networks usually rely on mathematical pre-training of the weight matrix (e.g., by Hebbian learning algorithms).

[0033] Some proposed techniques still lack efficient use of oscillatory neural networks and connections between different layers of the neural network. Therefore, there is a need for better output signal processing of the core oscillatory neural network.

[0034] In the context of this specification, the following conventions, terms or expressions, or combinations thereof, may be used.

[0035] The term "electronic circuit" may refer to a circuit that includes electronic and / or electrical components or devices that are selectively electrically connected such that an electrical potential can propagate along the wires used and / or such that an electrical current can flow through the wires from at least one of the electronic and electrical components to another one. Electronic components may include active semiconductor devices such as transistors and diodes. Electrical component parts may include electrical wires and passive components such as resistors and capacitors.

[0036] The term "oscillating neural network" (ONN) can refer to oscillators that are selectively interconnected (directly or indirectly). An ONN can be an all-to-all connected network or a selectively connected network. Thus, the oscillators can be considered as coupled. Such oscillatory neural networks can be considered as artificial neural networks. The oscillators can correspond to the neurons (modeled after the biological brain) of the artificial neural network, and the synaptic weights between pairs of new neurons, i.e. oscillators, can be emulated by the form and strength of the coupling components between the oscillators. Such networks can be trained to perform correlation tasks such as pattern recognition, image classification, or speech recognition, or a combination thereof, by processing training samples with the network and adapting the matrix of network weights (i.e. coupling elements) so that the network learns to determine certain correlations in the inference phase. A Hebbian learning algorithm can be used as a training method to adjust the coupling factors between the oscillators.

[0037] The term "feature recognition" can refer to a type of pattern recognition. It may relate, for example, to tasks known from image recognition. However, the principles can also be successfully applied to speech recognition and other kinds of digitally available signal patterns. Features and images to be recognized may include horizontal lines, vertical lines, ascending lines, descending lines, corners, etc. Typically, a fragment of a larger image, consisting of a small number of pixels, is used as input for a feature recognition system.

[0038] The term "coupled voltage-controlled oscillators" can refer to electronic oscillators whose phase can be controlled and shifted by an input voltage. Furthermore, multiple oscillators can be coupled such that the outputs of each of the oscillators affect each other. There can be a fully connected network that connects each oscillator to each of the oscillators in the network, or a selectively connected network. An example of a coupling component between the oscillators can be an RC (resistor / capacitor) filter. However, other types of coupling components can also be used, for example active coupling elements including semiconductor components.

[0039] The term "edge input signal" can refer to the edges of an input signal received by an oscillator. Some edges of the input signal may be time shifted, i.e., even if the individual bits originate from the same source (e.g., a sliding window on a digital image), they may not arrive at the same time. This means, for example, that a signal corresponding to a weak grey value may arrive at a selected oscillator earlier than an edge associated with a strong grey value. This effect can also be described as being out of phase with respect to the period length of the swinging oscillators.

[0040] The term "active output circuit" can refer to an electronic circuit (particularly a part of the complete electronic circuit of the present proposal) adapted to interpret the combination of the output signals of multiple transducers. The active output circuit is basically adapted to determine a correlation signal that can be compared with a reference signal in order to identify or recognize a predefined pattern such as a horizontal line, a vertical line, an ascending line, a descending line, etc.

[0041] The term "adder portion" may refer to a subcomponent of an active output circuit that includes a linear amplifier to which a resistor is connected such that the linear amplifier is adapted to add time-dependent voltage signals received at the input side of the resistor.

[0042] The term "non-linear amplifier" can refer to an amplifier whose output curve does not depend linearly on the input signal, but which can generate a proportionally larger open signal compared to the input signal after a threshold has been exceeded. Such behavior is sometimes compared to that of a sigmoid function or to that of a ReLU unit in a traditional neural network.

[0043] The term "color channel" can refer to a layer of pixel information in a color digital image. In the context of this specification, none of the known color models are preferred. The RGB (Red / Green / Blue) color model and the CYMK (Cyan / Magenta / Yellow / Black) model may be used. Each pixel of a color channel can be represented by one or more bits for the respective grayscale in that selected color channel.

[0044] The drawings are described in detail below. All indications in the drawings are schematic. First, a block diagram of an embodiment of an electronic circuit for efficiently using an oscillatory neural network for feature recognition according to the present invention is shown. The electronic circuit includes an electronic circuit for efficiently using an oscillatory neural network for feature recognition.

[0045] 1 is a block diagram of an embodiment of an electronic circuit 100 for enabling efficient use of oscillatory neural networks for feature recognition. The electronic circuit includes a network 102 of coupled voltage-controlled oscillators. Each of the oscillators is adapted to receive an edge input signal 104 (e.g., a matrix or vector), which is phase shifted by a fraction of the period length of the voltage-controlled oscillator (e.g., 180°) according to the signal strength of an analog input signal assigned to the respective oscillator. For example, the time shift may be in the range of 750 ns.

[0046] This edge input signal 104 is also represented by a 0 / 1 edge signal shown above the edge input signal 104. The horizontal double arrow represents a shift in time of when the edge appears depending, for example, on the measured or received grayscale value (e.g., the analog value of a pixel in a convolutional window sliding over a larger digital image).

[0047] The electronic circuit 100 includes at least one active output circuit 114. The active output circuit 114 includes input terminals 106 connected to selected oscillators, a summing unit 108 for summing the input signals present at the input terminals 106, and a non-linear amplifier 110 whose input line is connected to the output line of the summing unit. This effectively uses an oscillatory neural network. The time-dependent signal at the output terminal 112 can be compared to known reference patterns to identify predefined recognition features.

[0048] FIG. 2 shows the technical background or concept of an Oscillatory Neural Network (ONN) 200 that can be used with the proposed system of electronic circuitry according to FIG. 1. A convolutional neural network can use multiple filters to detect features and images (e.g., edge detection, color blotch detection, etc.). Typically, a different filter is used for each feature, often using digital logic circuits. Furthermore, filters may be applied sequentially, which may require multiple computing cores. In contrast, the electronic circuitry of the present embodiment can perform multi-feature detection simultaneously as a single unit. The concept is based on a time-encoded analog input signal such that an output classification signal can be obtained from the phase signal.

[0049] Typically, convolutional (neural) networks use small filters that slide across an input layer. The input layer can be exemplified by a digital image. Common filter sizes are 3x3x3, 4x4x3, ..., 7x7x3, where the last number indicates the number of color channels (e.g., RGB). However, other color models can also be used. For example, if the CMYK color model is used, the last number may preferably be 4.

[0050] A matrix 202 consisting of 32x32x3 pixel information (the last number indicates the number of color channels) can represent a digital image (or a subset of a digital image). A subset 204 of the three-dimensional matrix 202 can be represented by the matrix shown in the lower left part of FIG. 2. Here, each of the 7x7 matrices 206 can represent one of the (e.g., three) color channels. In the convolution operation, a 3x3 window 208 moves over each of the 7x7 matrices 206. This results in two matrices after the filters W0 and W1 are applied, as shown in the second column at the bottom of FIG. 2. Note that the details of the matrices are not important. The general principles of convolutional networks are known and are used as an explanatory background for further explanation.

[0051] Further, box 210 may represent a neural network including, for example, five filters 212 that are applied in sequence.

[0052] Using the exemplary 3x3 matrix (as described above), different patterns can be recognized depending on the digital grayscale values ​​in the matrix cells. An example of a recognizable pattern 302 is shown in Fig. 3a. A further set of patterns 304 for a 3x3 matrix is ​​shown in Fig. 3b. However, in the remainder of this specification, the patterns according to Fig. 3a can be kept in mind. Note that while the pixels of the original 3x3 matrix consist of grayscale values, the recognized patterns are black and white (for edge detection), i.e. "1" and "0".

[0053] For ease of understanding, each white sub-square can represent a logic "0" and each black sub-square can represent a logic "1". Thus, for example, four different basic patterns can be represented: a falling diagonal line ("fall"), a horizontal line ("hor"), an ascending diagonal line ("rise"), and a vertical line ("vert"). The proposed electronic circuit is capable of distinguishing between these four basic patterns. In order to classify the other exemplary patterns according to FIG. 3b during the inference stage of the oscillatory neural network, the input terminals of the active output circuit need to be wired to the outputs of the other respective oscillators. Thus, the nine sub-squares of the exemplary filter window are associated with nine oscillators. The numbering of the sub-squares can be (abbreviated) top left = 1, top middle = 2, top right = 3, ..., bottom right = 9. This numbering of the sub-squares can be used as an index of the oscillators.

[0054] FIG. 4 is an electrical wiring diagram 400 of one embodiment of a 3×3 network of coupled voltage-controlled oscillators, i.e., the core of an oscillatory neural network. The top of FIG. 4 shows delay-encoded edge input signals 402 (edges) between the input wires of oscillators X1, ..., X9 and ground. Note that only one of the edge input signals is labeled with a reference number. The input edge signals are represented by circles containing a "-" and a "+" sign. The "-" terminal of the bit-oriented input voltage is connected to ground (represented by a triangle). The input edge voltages V1, ..., V9 are fed to oscillators X1, ..., X9. The output signals of oscillators X1, ..., X9 are denoted as V01, ..., VO9. These represent the connection points with the electrical circuits shown in the following figures. Their phase shift is 0° or 180° (i.e., the maximum shift value). This shift can therefore be interpreted as "0" and "1", corresponding to black or white squares in the 3 × 3 matrix after passing through the ONN.

[0055] The lower part of the oscillators X1, ..., X9 in Figure 4 shows the network between the oscillators. In this example of nine oscillators, the cross-connection Xcij where i and j indicate the associated oscillators. Thus, as an example, Xc12 indicates the coupling element between oscillators X1 and X2. As another example, a coupling element or circuit located in the middle of the cross-connect network is denoted as Xc48, which indicates the coupling circuit between oscillators X4 and X8. Thus, each oscillator is connected to its respective coupling circuit Xc ij The network shown is therefore a fully connected network. However, in other implementations, ij It is not necessary to implement all of the connections (ie, it may be a partially connected network).

[0056] In addition, the cross-connect Xc ij are labeled "Rci Rco". This indicates that RC coupling elements are used in the proposed embodiment. However, other types of coupling circuits or coupling elements (including active elements made of semiconductor devices) can also be used. Furthermore, a smaller or larger number of oscillators may be used. For example, especially in convolution of neural networks, it is useful to have as many oscillators as there are matrix elements in the convolution matrix. That is, it is useful to have 9 oscillators for a 3x3 matrix with 9 matrix elements and 16 oscillators for a 4x4 matrix with 16 matrix elements.

[0057] With respect to the ONN 200 in FIG. 2, the connections between the sliding 3×3 window (see FIG. 2) and the nine transducers X1 to X9 are described. The “quasi-analog” input signals from the pixels of the sliding 3×3 window for one of the color channels are fed as time-shifted edge signals to the input lines Vin of the nine transducers X1, X2, ..., X9. Thus, the pixel values ​​of the image are coded as a time delay Δt of the measured (grayscale) voltage values ​​and passed to V1 to V9.

[0058] Thus, for white sub-squares, Δt=0ns, and for black sub-squares, for example Δt=750ns. The bit edge input signals are therefore phase shifted by a fraction of the period length, and the useful value may be half the period of the oscillator's frequency (e.g. 180° or π). The outputs V01, ..., V09 of oscillators X1 to X9 are therefore separated by a phase φ with respect to the reference, where φ=0 for white and φ=π for black. It should be mentioned that the oscillators require several cycles (e.g. 5) until the output values ​​of the oscillators together with the (feedback) network form an energetic minimum at the output terminals V01, ..., V09 of oscillators X1, ..., X9, and the phase of these signals is 0 or 180°. This is the result of the training of the ONN 200 and the respective trained synaptic weights in the coupling components (i.e. RC circuits).

[0059] Note that for completeness, the RC coupling elements are trained, for example using Hebbian learning, to represent the weights (i.e., synaptic weights) between oscillators that represent cores or nodes (or neurons).

[0060] As a next step, we need to determine the pattern that corresponds to the input value of the oscillator based on the output value and phase of the oscillator. For this purpose, an active output circuit is useful. This is explained using the following diagram.

[0061] As shown in Fig. 5, the active output circuit 502 includes input terminals V01, V05, and V09, a summing unit 504, and a non-linear amplifier 506. Furthermore, Fig. 5 shows similarities to the active output circuit 502 with reference numerals 508, 510, and 512, which essentially differ only in the reference designations of the input terminals, i.e., the input signals received. In the case of the active output circuit 508, the input terminals are V 04 , V05, and V06, and in the case of the active output circuit 510, the input terminals are V03, V05, and V07, and the active output circuit 512In this case, the input terminals are V02, V05, and V08. The remaining components are functionally identical to the active output circuit 502.

[0062] The input terminals V01, V05, V09 of the active output circuit are connected to the output terminals V01, V05, V09 of the oscillators X1, X5, X9 of the oscillatory neural network according to Fig. 4. Thus, the output values ​​and phases of the oscillators can be used to determine one of the patterns "fall", "hor", "rise" or "vert" according to Fig. 2. Here, the conversion from greyscale to black and white has already been performed.

[0063] To this end, the input terminals V01, V05, V09 of the active output circuit 502 are connected to the input lines of a linear amplifier U1 via resistors R1, R2, R3, all of which have equal resistance (e.g. 100 kOhm). For example, the linear amplifier U1 may be conventionally equipped with a feedback resistor of 1000 kOhm. The constructed unit represents a summing unit 504. The output of the summing unit 504 (denoted test11) is fed to the input of a non-linear amplifier 506. The non-linear amplifier 506 is realized by an amplifier U2 and a diode D2 in the feedback line of the amplifier U2. The feedback line is also connected to ground via R5. Industry standard differential amplifiers can be used as amplifiers U1, U2.

[0064] Essentially, the nonlinear amplifier 506 represents the sigmoid or ReLU function of a conventional neural network. The output test12 of the nonlinear amplifier 506 is the output of the proposed electronic circuit 100. Note that the line test13, the oscillator X10, the resistor R12 and the line / connection test14 represent the components of the next subsequent layer of the neural network, i.e., the next filter.

[0065] As a result, the synchronous outputs of the transducers X1, X5, and X9 are detected at the input terminals V01, V05, and V09 of the active output circuit 502, making it possible to identify the descending line "fall" in the corresponding 3×3 matrix.

[0066] Similar or equivalent operations are applied to active output circuits 508, 510, 512 for the horizontal line "hor", the rising line "rise" and the vertical line "vert", respectively.

[0067] If more patterns (eg, those in FIG. 3b) are detectable, each of the correlated oscillators must be used as an input to each active output unit.

[0068] 6 is a signal timing diagram 600 showing the output of an active output circuit (e.g., active output circuit 502 shown in FIG. 5) along with a reference signal for one sample (here a descending diagonal line). The dashed line represents the reference signal with corresponding peaks expected for the descending diagonal line in a 3×3 matrix input (e.g., a sliding window). The solid line represents the actual measurable output signal of the electronic circuit. As can be seen, each peak has the same phase. Thus, the descending diagonal line is identified.

[0069] For other patterns, a comparable correlation can be observed between the measurable signal and the signal generated by the proposed electronic circuit.

[0070] As a proof of concept, Fig. 7 shows an input image 702 (left side) in greyscale from the known MNIST (Modified National [US] Institute of Standards and Technology) database and the result of black and white edge detection image 704 obtained using the proposed electronic circuit with a limited set of four simple patterns according to Fig. 3a. The results were surprisingly good and convincing.

[0071] Figure 8 illustrates a computing system 800 that uses at least one of the proposed electronic circuits or related devices according to Figure 1 as a co-processing unit for processing image data for two or more color channels, although embodiments of the present invention may be practiced in conjunction with virtually any type of computer, regardless of the platform being suitable for storing and / or executing program code.

[0072] The computing system 800 is merely one example of a suitable computer system, and is not intended to suggest any limitation on the scope of use or functionality of the embodiments described herein, regardless of whether the computer system 800 can implement and / or perform any of the functions set forth herein. Within the computer system 800 are components. These components are operable with many other general purpose or special purpose computing system environments or configurations. Examples of well-known computing systems, environments, or configurations, or combinations thereof, that may be suitable for use with the computer system / server 800 include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable appliances, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of these systems or devices. The computer system / server 800 can be described in the general context of computer system-executable instructions, such as program modules, executed by the computer system 800. Generally, program modules may include routines, programs, objects, components, logic, data structures, etc. that perform particular tasks or implement particular data types. The computer system / server 800 may be implemented in a distributed cloud computing environment where tasks are performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules may be stored in both local and remote computer system storage media, including memory storage devices.

[0073] As shown in the figure, computer system / server 800 is depicted as a general-purpose computing device. Components of computer system / server 800 may include one or more processors or processing units 802, a system memory 804, and a bus 806 that connects various system components including the system memory 804 to the processing unit 802. Bus 806 represents any one or more of several types of bus structures including a memory bus or memory controller, a peripheral bus, an accelerated graphics port (AGP), and a processor or local bus using any of a variety of bus architectures. By way of non-limiting example, such architectures include an Industry Standard Architecture (ISA) bus, a MicroChannel Architecture (MCA) bus, an Enhanced ISA (EISA) bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus. Computer system / server 800 typically includes a variety of computer system readable media. Such media can be any available media that is accessible by computer system / server 800 and includes both volatile and non-volatile media, removable and non-removable media.

[0074] The system memory 804 may include a computer system readable medium as a volatile memory (such as RAM 808 and / or cache memory 810). The computer system / server 800 may further include other removable / non-removable volatile / non-volatile computer system readable media. As an example only, the storage system 812 may be provided for reading and writing to a non-removable non-volatile magnetic medium (not shown, commonly referred to as a "hard drive"). Although not shown, a magnetic disk drive for reading and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk") and an optical disk drive for reading and writing to a removable non-volatile optical disk (such as a CD-ROM, DVD-ROM or other optical media) may be provided. In these examples, each may be connected to the bus 806 by one or more data media interfaces. As further shown and described below, the memory 804 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of an embodiment of the present invention.

[0075] As one non-limiting example, a program / utility having a set (at least one) of program modules 816 can be stored in memory 804, as can an operating system, one or more application programs, other program modules, and program data. Each of the operating system, one or more application programs, other program modules, and program data, or some combination thereof, can include an implementation of a network environment. The program modules 816 generally implement the functions and / or methods of embodiments of the invention described herein.

[0076] The computer system / server 800 may also communicate with one or more external devices 818, such as a keyboard, a pointing device, a display 820, one or more devices that allow a user to interact with the computer system / server 800, or any device that allows the computer system / server 800 to communicate with one or more other computing devices (e.g., a network card, a modem, etc.), or a combination thereof. Such communication may occur via an input / output (I / O) interface 814. The computer system / server 800 may also communicate with one or more networks (e.g., a local area network (LAN), a general wide area network (WAN), or a public network (e.g., the Internet), or a combination thereof) via a network adapter 822. As shown, the network adapter 822 may communicate with other components of the computer system / server 800 via a bus 806. It is noted that other hardware and / or software components, not shown, may be used with the computer system / server 800. Examples of these include, but are not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archive storage systems.

[0077] Furthermore, the electronic circuit 100 (e.g., having a respective bus interface) can be attached to a bus 806. A set of drivers and programming libraries facilitates successful integration of the proposed electronic circuit and / or respective devices into a conventional computing system.

[0078] Although various embodiments have been described by way of example, they are not intended to be exhaustive or limited to these embodiments. As will be apparent to those skilled in the art, many modifications and variations are possible without departing from the scope and spirit of the described embodiments. The terms used in this specification are selected to best explain the principles of the embodiments, their practical applications, or technical improvements to the technology recognized in the market, or to allow other skilled in the art to understand the embodiments disclosed herein.

[0079] The present embodiments may be embodied as a system, method, or computer program product, or a combination thereof. The computer program product may include a computer readable storage medium having stored thereon computer readable program instructions for causing a processor to perform aspects of the present invention.

[0080] The medium may be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system for a propagation medium. Examples of computer-readable media include semiconductor or solid-state memory, magnetic tape, removable computer diskettes, random access memory (RAM), read-only memory (ROM), rigid magnetic disks, and optical disks. Current examples of optical disks include compact disk-read-only memory (CD-ROM), compact disk-read / write (CD-R / W), DVD, and Blu-ray disk.

[0081] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. The computer-readable storage medium may be, for example, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or a suitable combination thereof. More specific examples of computer-readable storage media include portable computer diskettes, hard disks, RAM, ROM, EPROM (or flash memory), SRAM, CD-ROM, DVD, memory sticks, floppy disks, punch cards or mechanically encoded devices with instructions recorded on ridges in grooves, and the like, and suitable combinations thereof. As used herein, a computer-readable storage medium should not be construed as a transitory signal per se, such as an electric wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a wave guide or other transmission medium (e.g., a light pulse passing through a fiber optic cable), or an electric signal transmitted through a wire.

[0082] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing device / processing device. Alternatively, they can be downloaded to an external computer or external storage device via a network (e.g., the Internet, a LAN, a WAN, or a wireless network, or a combination thereof). The network can comprise copper transmission cables, optical transmission fiber, wireless transmission, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing device / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing device / processing device.

[0083] The computer readable program instructions for carrying out the operations of the present invention may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including object oriented programming languages ​​such as Smalltalk and C++, and conventional procedural programming languages ​​such as the "C" programming language and similar programming languages. The computer readable program instructions may be executed entirely on the user's computer as a stand-alone software package, or partially on the user's computer, or partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a LAN or WAN, or may be connected to an external computer (e.g., via the Internet using an Internet Service Provider). In some embodiments, electronic circuitry, including, for example, programmable logic circuitry, field programmable gate arrays (FPGAs), programmable logic arrays (PLAs), can execute computer readable program instructions by utilizing state information of the computer readable program instructions to customize the electronic circuitry for carrying out aspects of the present invention.

[0084] Aspects of the present invention are described herein with reference to flowchart and / or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. Each block of the flowchart and / or block diagrams, and combinations of blocks in the flowchart and / or block diagrams, can be implemented by computer readable program instructions.

[0085] These computer-readable program instructions can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, whereby these instructions, executed via the processor of such computer or other programmable data processing apparatus, create means for performing the functions / operations specified in one or more blocks in the flowcharts and / or block diagrams. These computer-readable program instructions can further be stored on a computer-readable storage medium capable of instructing a computer, programmable data processing apparatus, or other device, or combination thereof, to function in a particular manner. The computer-readable storage medium having instructions stored thereon thereby constitutes an article of manufacture including instructions for performing the functions / operations specified in one or more blocks in the flowcharts and / or block diagrams.

[0086] Also, computer-readable program instructions may be loaded into a computer, other programmable apparatus, or other device and a sequence of operational steps executed on the computer, other programmable apparatus, or other device to generate a computer-implemented process, whereby the instructions executing on the computer, other programmable apparatus, or other device perform the functions / operations identified in one or more blocks in the flowcharts and / or block diagrams.

[0087] The flowcharts and / or block diagrams in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, including one or more executable instructions for performing a specific logical function. In some other implementations, the functions shown in the blocks may be executed in a different order than the order shown in the figures. For example, two blocks shown in succession may actually be executed substantially simultaneously, or the blocks may be executed in reverse order depending on the functions involved. It should be noted that each block in the block diagrams and / or flowcharts, and combinations of multiple blocks in the block diagrams and / or flowcharts, may be executed by a dedicated hardware-based system that performs a specific function or operates or executes a combination of dedicated hardware and computer instructions.

[0088] The terms used herein are intended to describe particular embodiments only and are not intended to limit the various embodiments. In this specification, the singular forms "a", "an" and "the" are intended to include the plural unless the context clearly indicates otherwise. Furthermore, in this specification, the terms "comprises" and / or "comprising" specify the presence of the stated features, integers, steps, operations, elements, or components or combinations thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof or combinations thereof.

[0089] The corresponding structures, materials, acts, and equivalents of all means-plus-function or step-plus-function elements in the following claims are intended to include any structures, materials, or acts for performing the functions in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or to limit the invention to the disclosed form. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the invention. The present embodiment has been chosen and described in order to best explain the principles and practical applications of the invention and to enable others skilled in the art to understand the invention in various embodiments with various modifications suitable for the particular use contemplated.

[0090] Although various embodiments have been described by way of example, they are not intended to be exhaustive or limited to these embodiments. As will be apparent to those skilled in the art, many modifications and variations are possible without departing from the scope and spirit of the described embodiments. The terms used in this specification are selected to best explain the principles of the embodiments, their practical applications, or technical improvements to the technology recognized in the market, or to allow other skilled in the art to understand the embodiments disclosed herein.

Claims

1. 1. An electronic circuit for utilizing a vibration neural network for feature recognition, comprising: a network of coupled voltage-controlled oscillators, each of the voltage-controlled oscillators adapted to receive an edge input signal that is phase shifted by a fraction of a period length of the voltage-controlled oscillator according to a signal strength of an analog input signal assigned to a respective one of the voltage-controlled oscillators; 1. An active output circuit, comprising: an input terminal connected to a selected one of the voltage controlled oscillators; an adder for adding input signals present at said input terminals; an active output circuit including a nonlinear amplifier having an input line connected to an output line of the adder; 2. An electronic circuit comprising:

2. 10. The electronic circuit of claim 1, further comprising a plurality of active output circuits, the input terminal of each of the plurality of active output circuits being connected to a group of the voltage controlled oscillators, each group representing a different predetermined pattern of the received input signal.

3. The electronic circuit of claim 2 , wherein selected voltage-controlled oscillators, when activated with a phase shift, represent a predetermined pattern of the received input signal.

4. The electronic circuit according to any one of claims 1 to 3, wherein the electronic circuit is adapted to process signals of one colour channel.

5. 5. The electronic circuit according to claim 1, wherein the electronic circuit represents a plurality of electronic circuits connected in series, each of the electronic circuits representing a given filter.

6. 6. The electronic circuit according to claim 1, wherein each of the input terminals is connected to an input of a linear amplifier via a respective resistor.

7. The electronic circuit according to any one of claims 1 to 6, wherein the non-linear amplifier is a differential amplifier having a diode in its feedback loop.

8. The electronic circuit of any preceding claim, wherein each of the voltage-controlled oscillators in the network is connected to each other by a resistor / capacitor coupling circuit.

9. The electronic circuit according to any one of claims 1 to 8, wherein the portion of the period is half the period of the oscillation frequency of the voltage-controlled oscillator.

10. 10. The electronic circuit of claim 9, wherein the portion of the period is greater than 120 degrees.

11. The electronic circuit of claim 10 , wherein the portion of the period is 180 degrees.

12. The electronic circuit of claim 1 , wherein the active output circuit is integrated into a semiconductor unit.

13. The electronic circuit of claim 1 , wherein the electronic circuit is integrated into one semiconductor unit.

14. 2. The electronic circuit of claim 1, wherein a phase shift of the output of the nonlinear amplifier of the active output circuit matches a majority of a received bit input signal to the active output circuit.

15. 2. The electronic circuit of claim 1, wherein the edge input signal changes from a logic "0" to a logic "1" depending on a shift time derived from the signal strength of the analog input signal.

16. The electronic circuit of claim 1 , wherein each of the voltage-controlled oscillators oscillates at the same frequency.

17. A neural network device, comprising: a plurality of electronic circuits, each of the electronic circuits comprising: a network of coupled voltage-controlled oscillators, each of the voltage-controlled oscillators adapted to receive an edge input signal that is phase shifted by a fraction of a period length of the voltage-controlled oscillator according to a signal strength of an analog input signal assigned to a respective one of the voltage-controlled oscillators; 1. An active output circuit, comprising: an input terminal connected to a selected one of the voltage controlled oscillators; an adder for adding input signals present at said input terminals; an active output circuit including a nonlinear amplifier having an input line connected to an output line of the adder; A neural network device comprising:

18. 20. The neural network device of claim 17, further comprising a plurality of active output circuits, the input terminal of each of the plurality of active output circuits being connected to a group of the voltage-controlled oscillators, each group representing a different predetermined pattern of the received input signal.

19. 20. The neural network device of claim 18, wherein the selected voltage-controlled oscillators, when activated with a phase shift, represent a predetermined pattern of the received input signal.

20. 20. The neural network device of claim 18, wherein the electronic circuitry is adapted to process signals of one color channel.

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