Method for providing a semiconductor device having a silicon filled gap - Patents.com

Abstract

To provide, generally, a method for manufacturing semiconductor devices, and more specifically, provide amorphous silicon filled gaps.SOLUTION: A method for filling a gap comprises providing a deposition chamber with a semiconductor substrate having a gap, where a bottom of the gap includes a crystalline semiconducting material and where a side wall of the gap includes an amorphous material; and depositing a silicon precursor in the gap.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates generally to methods of manufacturing semiconductor devices, and more particularly, to providing gaps filled with amorphous silicon. [Background technology]

[0002] Semiconductor devices typically include gaps that are filled with silicon, which may form components of various electronic devices. Filling involves depositing a layer of silicon on the sides and bottom of the gap, which fills into the gap from the sides and bottom as it grows.

[0003] However, the growth of the layer may not be perfectly uniform and voids such as seams may form inside the filled gap. In some cases, these voids may be caused by the deposition process, where silicon may deposit at a faster growth rate at the top of the gap than at the bottom, thereby closing the top of the gap first and leaving a void inside the gap, or nucleation at the bottom or side of the gap may be incomplete resulting in a void at the bottom or side of the gap.

[0004] Therefore, there is a need for improved processes for forming silicon filled gaps. Summary of the Invention [Means for solving the problem]

[0005] In one embodiment, a method for filling a gap is provided. The method includes providing a semiconductor substrate having a gap in a deposition chamber, where a bottom of the gap comprises a crystalline semiconductor material and a sidewall of the gap comprises an amorphous material. A silicon precursor is deposited in the gap to cause epitaxial growth of the crystalline semiconductor material on the bottom of the gap. An etchant is then provided in the gap to etch the amorphous deposited layer of silicon precursor on the sidewall of the gap.

[0006] In one embodiment, a semiconductor device is provided. The semiconductor has a gap filled according to the method described above. The silicon filled gap can provide electrical contact between two layers. [Brief description of the drawings]

[0007] [Figure 1] Figures 1a to 1h show a series of schematic diagrams of a cross-section of a gap filled with silicon according to a preferred embodiment of the method according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Fig. 1a shows a schematic cross-section of a substrate 1 having a gap 2. A bottom 3 of the gap 2 comprises a crystalline semiconductor material, such as for example crystalline silicon, silicon-germanium or germanium. A depth D of the gap 2 may for example be substantially 200 nm or more or less, and the gap 2 may have a width W of for example substantially 14 nm or more or less. A sidewall 4 of the gap 2 may comprise an amorphous material. Such an amorphous material may comprise silicon oxide and / or silicon nitride. In this embodiment, the sidewall 4 may comprise an outer fill layer 4a, for example of silicon oxide, and an inner spacer layer 4b, for example of silicon nitride.

[0009] Contact of silicon with air may cause an oxide layer to form on top of the crystalline semiconductor material, and a step of etching the top oxide layer from the crystalline semiconductor material on the bottom 3 of the gap 2 may optionally be performed before starting the deposition of the silicon precursor as shown in Figure 1b. This may be done by known methods, for example by HF dip etching.

[0010] Then, for example, Silcore® (Si 3 H 8 ), silane (SiH 4 ) or disilane (Si 2 H 6 A silicon precursor such as silane may be deposited in the gap 2 to cause epitaxial growth of a crystalline semiconductor material on the bottom 3 of the gap 2. Optionally, one or more hydrogen groups in the silane may be replaced with a halogen. Deposition of the silicon precursor has been shown to result in faster nucleation on crystalline structures than on amorphous structures. As a result, deposition of the silicon precursor results in epitaxial growth 5 of a crystalline semiconductor material on the bottom 3 of the gap as shown in FIG. 1c, while the amorphous material on the sidewalls temporarily prevents nucleation on the sidewalls 4, in other words nucleation on the amorphous material on the sidewalls 4 may be slower than on the bottom of the gap 2.

[0011] Despite the slower nucleation on the sidewalls 4 of the gap 2 than on the bottom 3 of the gap 2, a silicon film 6 may also be simultaneously formed on the sidewalls 4 as shown in FIG. 1d, which may be an amorphous silicon film since it is growing on an amorphous material. After this amorphous silicon film 6 is formed on the sidewalls 4, and before this amorphous silicon film 6 can close the gap 2, an etching step may be performed, in particular an etching step using, for example, chlorine Cl. 2 A gas phase etching step is performed, which involves providing an etchant, such as hydrogen chloride HCl, into the gap 2 to etch the silicon precursor, in particular the amorphous deposit layer of the amorphous film 6, on the sidewalls 4 of the gap 2.

[0012] Again, the morphological difference between the bottom 3 of the gap 2, which comprises crystalline semiconductor material on which the epitaxial growth of the silicon deposition layer occurred, and the sidewalls 4, which comprise amorphous material covered by the amorphous silicon film 6, results in a difference in etch rate, which may be at least 5 times, preferably 10 times or more, faster than the etch rate of the crystalline epi. As a result, it is possible to etch away the silicon film 6 without significantly etching the crystalline epi and without damaging the sidewalls 4 of the gap 2, as shown in FIG. 1e.

[0013] By alternating between depositing a silicon precursor and providing an etchant in the gap, as shown in Figures 1f and 1g, respectively, the gap may be filled with silicon, particularly epi-silicon, from the bottom 3 of the gap 2 to the top 7 of the gap, or at least to a desired fill height, without creating significant voids in the filled gap 2.

[0014] In an embodiment, providing the silicon precursor in the gap may also include depositing, preferably co-flowing or alternatively alternating, a dopant in the gap 2. The dopant may be, for example, a p-doped dopant and may include, for example, phosphine, arsine, or boron trichloride at a concentration of 1E21.

[0015] In some embodiments, the silicon precursor deposition and etching may be performed at a temperature ranging from 350°C to 550°C.

[0016] In some embodiments, the gap filled according to the above-described methods may be a contact plug, where the filled gap provides electrical contact between two layers of, for example, a semiconductor device, such as a memory device.

[0017] It will be understood by those skilled in the art that various omissions, additions and modifications may be made to the processes and structures described above without departing from the scope of the present invention. Various combinations or subcombinations of the specific features and aspects of the embodiments may be made and still be intended to be within the scope of this description. Various features and aspects of the disclosed embodiments may be combined in any order or substituted for one another. All such modifications and variations are intended to be within the scope of the present invention, as defined by the appended claims. [Explanation of symbols]

[0018] 2. Gap 3 bottom 4 side wall 4a external packed layer 4b Inner spacer layer 6 Silicone membrane

Claims

1. 1. A method for filling a gap, comprising: providing a semiconductor substrate having a gap in a deposition chamber, a bottom of the gap comprising a crystalline semiconductor material and a sidewall of the gap comprising an amorphous material; depositing a silicon precursor into the gap to cause epitaxial growth of the crystalline semiconductor material on the bottom of the gap; providing an etchant in the gap to etch the amorphous deposited layer of the silicon precursor on the sidewalls of the gap; The method, wherein providing a silicon precursor in the gap comprises depositing a dopant in the gap in co-flow with the silicon precursor.

2. 10. The method of claim 1, wherein the steps of depositing the silicon precursor and providing the etchant are alternately repeated.

3. 2. The method of claim 1 , wherein an etch rate of the etchant into the amorphous deposition layer of the silicon precursor on the sidewalls of the gap is at least five times faster than an etch rate of the etchant into the crystalline semiconductor material on the bottom of the gap.

4. The method of claim 1 , wherein the crystalline semiconductor material comprises silicon, silicon-germanium, or germanium.

5. The method of claim 1 , wherein the amorphous material comprises silicon oxide and / or silicon nitride.

6. The method of claim 1 , wherein the silicon precursor comprises silane, disilane, or trisilane.

7. The method of claim 1 , wherein the etchant comprises chlorine or hydrogen chloride.

8. The method of claim 1 , wherein providing the etchant in the gap is performed by vapor phase etching.

9. 10. The method of claim 1, comprising etching a top oxide layer from the crystalline semiconductor material on the bottom of the gap prior to initiating deposition of the silicon precursor.

10. The method of claim 1 , wherein the dopant comprises phosphine, arsine, or boron trichloride.

11. 10. The method of claim 1, wherein the silicon precursor depositing and etching steps occur at a temperature range of 350° C. to 550° C.

12. The method of claim 1 , wherein the deposition chamber is a process chamber of a batch furnace.

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