Light receiving element, distance measuring module, and electronic device

Abstract

The present technology relates to a light receiving element, a ranging module, and an electronic device that can reduce incident light leakage to adjacent pixels. The light receiving element includes a semiconductor layer on which a photodiode that photoelectrically converts infrared light is formed in units of pixels, and a wiring layer on which a transfer transistor that reads out charges generated by the photodiode is formed, wherein an inter-pixel light shielding part that blocks the infrared light is formed at a pixel boundary part of the wiring layer. For example, the present technology can be applied to a ranging module that measures the distance to a subject.

Description

[Technical field]

[0001] The present technology relates to a light receiving element, a distance measuring module, and an electronic device, and more particularly to a light receiving element, a distance measuring module, and an electronic device that are capable of reducing leakage of incident light into adjacent pixels. [Background technology]

[0002] Conventionally, distance measurement systems using the indirect ToF (Time of Flight) method are known. In such distance measurement systems, a sensor is essential that can quickly distribute the signal charge obtained by receiving the light reflected from the target object when active light is irradiated using an LED (Light Emitting Diode) or laser at a certain phase to different regions.

[0003] In response to this, a technique has been proposed that enables high-speed modulation of a wide range of areas within a substrate by, for example, applying a voltage directly to the substrate of a sensor to generate a current within the substrate (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2011-86904 A Summary of the Invention [Problem to be solved by the invention]

[0005] Near-infrared light with a wavelength of around 940 nm is often used as the light source for the light receiving element used in the indirect ToF method. Near-infrared light has a low absorption coefficient for the silicon semiconductor layer and low quantum efficiency, so a structure that increases quantum efficiency by extending the optical path length is conceivable, but there is a concern that the incident light may leak into adjacent pixels.

[0006] The present technology has been made in consideration of such circumstances, and is intended to reduce leakage of incident light into adjacent pixels. [Means for solving the problem]

[0007] The light receiving element according to the first aspect of the present technology includes: a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; Equipped with An inter-pixel light shielding portion for shielding the infrared light is formed at the pixel boundary portion of the wiring layer.

[0008] A ranging module according to a second aspect of the present technology includes: A predetermined light emitting source; Photodetector and Equipped with The light receiving element is a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; Equipped with An inter-pixel light shielding portion for shielding the infrared light is formed at the pixel boundary portion of the wiring layer.

[0009] An electronic device according to a third aspect of the present technology includes: A predetermined light emitting source; Photodetector and Equipped with The light receiving element is a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; Equipped with An inter-pixel light shielding portion that blocks the infrared light is formed at the pixel boundary portion of the wiring layer. Distance Measurement Module Equipped with.

[0010] In the first to third aspects of the present technology, a light receiving element is provided with a semiconductor layer in which photodiodes that photoelectrically convert infrared light are formed in pixel units, and a wiring layer in which transfer transistors that read out charges generated in the photodiodes are formed, and an inter-pixel light shielding portion that shields the infrared light is formed at the pixel boundary portion of the wiring layer.

[0011] The light receiving element, the distance measuring module, and the electronic device may be independent devices, or may be modules incorporated into another device. [Brief description of the drawings]

[0012] [Figure 1] 1 is a block diagram showing a schematic configuration example of a light receiving element to which the present technology is applied. [Diagram 2] FIG. 2 is a cross-sectional view showing a first configuration example of a pixel. [Diagram 3] 11A and 11B are diagrams illustrating the effect of an inter-pixel light shielding portion. [Figure 4] FIG. 11 is a cross-sectional view showing a modified example of the first configuration example of the pixel. [Diagram 5] 3 is a diagram illustrating an example of a circuit configuration of the pixel in FIG. 2. [Figure 6] 5 is a plan view showing an example of the arrangement of the pixel circuits in FIG. 4. [Figure 7] 13A and 13B are plan views showing other examples of formation of inter-pixel light shielding portions. [Figure 8] 13A and 13B are plan views showing other examples of formation of inter-pixel light shielding portions. [Figure 9] 3 is a diagram illustrating another example of the circuit configuration of the pixel in FIG. 2. [Figure 10] 10 is a plan view showing an example of the arrangement of the pixel circuits in FIG. [Figure 11] FIG. 11 is a cross-sectional view showing a second configuration example of a pixel. [Figure 12] 11A to 11C are cross-sectional views showing other examples of the shape of the moth-eye structure. [Figure 13] FIG. 11 is a cross-sectional view showing a third configuration example of a pixel. [Figure 14] 14 is a diagram for explaining the effect of the reflective film in FIG. 13. FIG. [Figure 15] FIG. 11 is a cross-sectional view showing a first modified example of the third configuration example of the pixel. [Figure 16] 16 is a diagram illustrating the effect of the reflective film in FIG. 15. FIG. [Figure 17] FIG. 11 is a cross-sectional view showing a second modified example of the third configuration example of the pixel. [Figure 18] FIG. 11 is a cross-sectional view showing a fourth configuration example of a pixel. [Figure 19] FIG. 11 is a cross-sectional view showing a fifth configuration example of a pixel. [Figure 20] FIG. 13 is a cross-sectional view showing a sixth configuration example of a pixel. [Figure 21] FIG. 13 is a cross-sectional view showing a seventh configuration example of a pixel. [Figure 22] FIG. 13 is a cross-sectional view showing a modification of the seventh configuration example of the pixel. [Diagram 23] FIG. 13 is a cross-sectional view showing an eighth configuration example of a pixel. [Figure 24] FIG. 13 is a cross-sectional view showing a modified example of the eighth configuration example of the pixel. [Diagram 25] FIG. 13 is a cross-sectional view showing a ninth configuration example of a pixel. [Figure 26] 1 is a diagram showing an example of a circuit configuration of a pixel when a light receiving element is configured as an IR imaging sensor. [Figure 27] FIG. 2 is a cross-sectional view of a pixel when the light receiving element is configured as an IR imaging sensor. [Figure 28] 1 is a diagram showing an example of a pixel arrangement when a light receiving element is configured as an RGBIR imaging sensor. [Figure 29] 1 is a block diagram showing an example configuration of a distance measuring module to which the present technology is applied. FIG. [Diagram 30] FIG. 1 is a block diagram showing an example configuration of a smartphone as an electronic device to which the present technology is applied. [Diagram 31] 1 is a block diagram showing an example of a schematic configuration of a vehicle control system; [Diagram 32] 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, modes for carrying out the present technology (hereinafter, referred to as embodiments) will be described in the following order. 1. Example of photodetector configuration 2. Cross-sectional view of a first configuration example of a pixel 3. Modification of the First Configuration Example 4. Example of pixel circuit configuration 5. Plan view of pixel 6.Other examples of pixel circuit configurations 7. Top view of pixel 8. Cross-sectional view of a second configuration example of a pixel 9. Cross-sectional view of a third configuration example of a pixel 10. Modification of the third configuration example 11. Cross-sectional view of a fourth configuration example of a pixel 12. Cross-sectional view of a fifth configuration example of a pixel 13. Cross-sectional view of a sixth configuration example of a pixel 14. Cross-sectional view of a seventh configuration example of a pixel 15. Cross-sectional view of an eighth configuration example of a pixel 16. Cross-sectional view of a ninth configuration example of a pixel 17. Example of IR imaging sensor configuration 18. Example of RGBIR imaging sensor configuration 19. Example of distance measurement module configuration 20. Examples of electronic device configurations 21. Mobile application examples

[0014] In the drawings referred to in the following description, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc. may differ from the actual ones. Furthermore, there may be cases where the dimensional relationships and ratios differ between the drawings.

[0015] In addition, the definitions of directions such as up and down in the following description are merely for the convenience of explanation and do not limit the technical ideas of the present disclosure. For example, if an object is rotated 90 degrees and observed, up and down are converted to left and right and read, and if it is rotated 180 degrees and observed, up and down are read inverted.

[0016] <1. Example of light receiving element configuration> FIG. 1 is a block diagram showing a schematic configuration example of a light receiving element to which the present technology is applied.

[0017] The light receiving element 1 shown in FIG. 1 is a ToF sensor that outputs distance measurement information by an indirect ToF method.

[0018] The light receiving element 1 receives light (reflected light) that is irradiated from a specific light source and reflected by an object, and outputs a depth image that stores distance information to the object as a depth value. The irradiated light irradiated from the light source is, for example, infrared light with a wavelength in the range of 780 nm to 1000 nm, and is a pulsed light that is repeatedly turned on and off at a specific period.

[0019] The light receiving element 1 has a pixel array section 21 formed on a semiconductor substrate (not shown), and a peripheral circuit section integrated on the same semiconductor substrate as the pixel array section 21. The peripheral circuit section is composed of, for example, a vertical drive section 22, a column processing section 23, a horizontal drive section 24, and a system control section 25.

[0020] The light receiving element 1 is further provided with a signal processing unit 26 and a data storage unit 27. The signal processing unit 26 and the data storage unit 27 may be mounted on the same board as the light receiving element 1, or may be disposed on a board in a module separate from the light receiving element 1.

[0021] The pixel array section 21 has a configuration in which pixels 10, which generate charges according to the amount of light received and output signals according to the charges, are arranged two-dimensionally in a matrix in the row and column directions. That is, the pixel array section 21 has a plurality of pixels 10 that perform photoelectric conversion of incident light and output signals according to the resulting charges. Here, the row direction refers to the horizontal arrangement direction of the pixels 10, and the column direction refers to the vertical arrangement direction of the pixels 10. The row direction is the horizontal direction in the figure, and the column direction is the vertical direction in the figure. Details of the pixels 10 will be described later with reference to FIG. 2 and subsequent figures.

[0022] In the pixel array unit 21, a pixel drive line 28 is wired in the row direction for each pixel row in the matrix-like pixel arrangement, and two vertical signal lines 29 are wired in the column direction for each pixel column. The pixel drive line 28 transmits a drive signal for driving the pixels 10 when reading out a signal. Note that, although FIG. 1 shows the pixel drive line 28 as a single line, the number of lines is not limited to one. One end of the pixel drive line 28 is connected to an output terminal of the vertical drive unit 22 corresponding to each row.

[0023] The vertical driving unit 22 is composed of a shift register, an address decoder, etc., and drives each pixel 10 of the pixel array unit 21 simultaneously for all pixels or in row units, etc. In other words, the vertical driving unit 22, together with a system control unit 25 that controls the vertical driving unit 22, constitutes a driving unit that controls the operation of each pixel 10 of the pixel array unit 21.

[0024] The detection signals output from each pixel 10 in the pixel row in response to drive control by the vertical drive unit 22 are input to the column processing unit 23 through vertical signal lines 29. The column processing unit 23 performs predetermined signal processing on the detection signals output from each pixel 10 through the vertical signal lines 29, and temporarily holds the detection signals after signal processing. Specifically, the column processing unit 23 performs noise removal processing, AD (Analog to Digital) conversion processing, and the like as the signal processing.

[0025] The horizontal driving unit 24 is composed of a shift register, an address decoder, etc., and sequentially selects unit circuits corresponding to pixel columns in the column processing unit 23. By selective scanning by this horizontal driving unit 24, detection signals that have been signal-processed for each unit circuit in the column processing unit 23 are sequentially output to the signal processing unit 26.

[0026] The system control unit 25 is composed of a timing generator that generates various timing signals, and controls the driving of the vertical driving unit 22, the column processing unit 23, and the horizontal driving unit 24, etc. based on the various timing signals generated by the timing generator.

[0027] The signal processing unit 26 has at least a calculation processing function, and performs various signal processing such as calculation processing based on the detection signal output from the column processing unit 23. The data storage unit 27 temporarily stores data necessary for the signal processing in the signal processing unit 26.

[0028] The light receiving element 1 configured as above outputs a depth image in which distance information to an object is stored in pixel values ​​as depth values.

[0029] <2. Cross-sectional view of a first configuration example of a pixel> FIG. 2 is a cross-sectional view showing a first configuration example of the pixel 10 arranged in the pixel array section 21. As shown in FIG.

[0030] The light receiving element 1 includes a semiconductor substrate 41 and a multi-layer wiring layer 42 formed on the front surface side (the lower side in the figure) of the semiconductor substrate 41.

[0031] The semiconductor substrate 41 is made of, for example, silicon (Si) and is formed to have a thickness of, for example, about several μm. In the semiconductor substrate 41, for example, a P-type (first conductivity type) semiconductor region 51 has an N-type (second conductivity type) semiconductor region 52 formed in a pixel unit, thereby forming a photodiode PD in a pixel unit. The P-type semiconductor regions 51 provided on both the front and back surfaces of the semiconductor substrate 41 also serve as hole charge accumulation regions for suppressing dark current.

[0032] 2 is the back surface of the semiconductor substrate 41, which is the light incident surface onto which light is incident. An anti-reflection film 43 is formed on the upper surface of the back surface side of the semiconductor substrate 41.

[0033] The anti-reflection film 43 has a laminated structure in which, for example, a fixed charge film and an oxide film are laminated, and for example, a high dielectric constant (High-k) insulating thin film by the ALD (Atomic Layer Deposition) method can be used. Specifically, hafnium oxide (HfO2), aluminum oxide (Al2O3), titanium oxide (TiO2), STO (Strontium Titan Oxide), etc. can be used. In the example of FIG. 2, the anti-reflection film 43 is configured by laminating a hafnium oxide film 53, an aluminum oxide film 54, and a silicon oxide film 55.

[0034] An inter-pixel light shielding film 45 that prevents incident light from being incident on an adjacent pixel is formed on the upper surface of the anti-reflection film 43 at a boundary 44 (hereinafter also referred to as a pixel boundary 44) between adjacent pixels 10 of the semiconductor substrate 41. The material of the inter-pixel light shielding film 45 may be any material that blocks light, and may be, for example, a metal material such as tungsten (W), aluminum (Al), or copper (Cu).

[0035] A planarization film 46 is formed on the upper surface of the anti-reflection film 43 and the upper surface of the inter-pixel light-shielding film 45, and is made of an insulating film such as silicon oxide (SiO2), silicon nitride (SiN), silicon oxynitride (SiON), or an organic material such as resin.

[0036] An on-chip lens 47 is formed for each pixel on the upper surface of the planarization film 46. The on-chip lens 47 is made of a resin material such as a styrene resin, an acrylic resin, a styrene-acrylic copolymer resin, or a siloxane resin. The light collected by the on-chip lens 47 is efficiently incident on the photodiode PD.

[0037] Furthermore, in the pixel boundary portion 44 on the back surface side of the semiconductor substrate 41, an inter-pixel separation portion 61 is formed extending from the back surface side (the on-chip lens 47 side) of the semiconductor substrate 41 to a predetermined depth in the substrate depth direction, separating adjacent pixels. The outer periphery, including the bottom surface and sidewalls, of the inter-pixel separation portion 61 is covered with a hafnium oxide film 53 which is a part of the anti-reflection film 43. The inter-pixel separation portion 61 prevents incident light from penetrating into an adjacent pixel 10, confining it within the pixel itself, and prevents incident light from leaking in from an adjacent pixel 10.

[0038] 2, the silicon oxide film 55, which is the material of the uppermost layer of the antireflection film 43, is embedded in a trench (groove) dug from the back surface side to simultaneously form the silicon oxide film 55 and the inter-pixel isolation portion 61, so that the silicon oxide film 55, which is a part of the laminated film as the antireflection film 43, and the inter-pixel isolation portion 61 are made of the same material, but they do not necessarily have to be the same. The material embedded in the trench (groove) dug from the back surface side as the inter-pixel isolation portion 61 may be, for example, a metal material such as tungsten (W), aluminum (Al), titanium (Ti), titanium nitride (TiN), etc.

[0039] Meanwhile, on the front surface side of the semiconductor substrate 41 on which the multilayer wiring layer 42 is formed, two transfer transistors TRG1 and TRG2 are formed for one photodiode PD formed in each pixel 10. Also, on the front surface side of the semiconductor substrate 41, floating diffusion regions FD1 and FD2 are formed of a high-concentration N-type semiconductor region (N-type diffusion region) as charge accumulation sections that temporarily hold the charge transferred from the photodiode PD.

[0040] The multi-layer wiring layer 42 is composed of a plurality of metal films M and an interlayer insulating film 62 therebetween. In Fig. 2, an example is shown in which the multi-layer wiring layer 42 is composed of three layers, a first metal film M1 to a third metal film M3.

[0041] Of the multiple metal films M of the multilayer wiring layer 42, the first metal film M1 closest to the semiconductor substrate 41 has a region located below the formation region of the photodiode PD, in other words, a region that at least partially overlaps with the formation region of the photodiode PD in a plan view, on which a reflective film (reflective member) 63 is formed. The reflective film 63 is formed of the same material as the other metal wirings 67 of the first metal film M1, such as a metal film of copper (Cu), aluminum (Al), tungsten (W), titanium (Ti), titanium nitride (TiN), or the like.

[0042] The reflective film 63 has a function of reflecting infrared light that enters the semiconductor substrate 41 from the light incident surface via the on-chip lens 47 and passes through the semiconductor substrate 41 without being photoelectrically converted within the semiconductor substrate 41, thereby allowing the infrared light to enter the semiconductor substrate 41 again. This reflecting function increases the amount of infrared light that is photoelectrically converted within the semiconductor substrate 41, and improves the quantum efficiency (QE), that is, the sensitivity of the pixel 10 to infrared light.

[0043] In addition, the reflective film 63 blocks infrared light that enters the semiconductor substrate 41 from the light incident surface via the on-chip lens 47 and passes through the semiconductor substrate 41 without being photoelectrically converted in the semiconductor substrate 41 with the first metal film M1 closest to the semiconductor substrate 41, and prevents the infrared light from passing through the second metal film M2 and the third metal film M3 below. Therefore, it can be said that the reflective film 63 also functions as a light-shielding film. This light-shielding function can prevent infrared light that passes through the semiconductor substrate 41 without being photoelectrically converted in the semiconductor substrate 41 from being scattered by the metal film M below the first metal film M1 and entering a nearby pixel. This can prevent the light from being erroneously detected by a nearby pixel.

[0044] Furthermore, an inter-pixel light shielding portion 65 is formed in the pixel boundary portion 44 of the multilayer wiring layer 42 to prevent incident light reflected by the reflective film 63 from being incident on the photodiode PD of the adjacent pixel 10. The material of the inter-pixel light shielding portion 65 may be, for example, the same material as the metal wiring 67 of the first metal film M1 including the reflective film 63. Alternatively, for example, if the metal wiring 67 is copper, the material of the inter-pixel light shielding portion 65 may be tungsten, or the inter-pixel light shielding portion 65 may be formed of an infrared absorbing film using an organic material, or a different material from the metal wiring 67 of the first metal film M1.

[0045] In order to achieve the purpose of the inter-pixel light shielding portion 65, the inter-pixel light shielding portion 65 is formed above the reflective film 63 of the first metal film M1 (closer to the semiconductor substrate 41). For example, the inter-pixel light shielding portion 65 is formed in the same layer position (position in the depth direction) as the gate contact 66 that connects the gate of the transfer transistor TRG1 or TRG2 made of polysilicon or the like to the metal wiring 67 of the first metal film M1, or on the semiconductor substrate 41 side. When the inter-pixel light shielding portion 65 is formed in the same layer position as the gate contact 66, the inter-pixel light shielding portion 65 and the gate contact 66 can be formed simultaneously, so that the steps can be shared and the number of steps can be reduced.

[0046] Of the metal wirings 67 of the first metal film M1, the metal wirings electrically connected to the gates of the transfer transistors TRG1 or TRG2 via the gate contacts 66 are referred to as contact wirings 67.

[0047] Among the multiple metal films M of the multilayer wiring layer 42, a predetermined metal film M, for example, the second metal film M2, is patterned into, for example, a comb-tooth shape to form a wiring capacitance 64. The reflective film 63 and the wiring capacitance 64 may be formed in the same layer (metal film M), but when they are formed in different layers, the wiring capacitance 64 is formed in a layer farther from the semiconductor substrate 41 than the reflective film 63. In other words, the reflective film 63 is formed closer to the semiconductor substrate 41 than the wiring capacitance 64.

[0048] As described above, the light receiving element 1 has a back-illuminated structure in which the semiconductor substrate 41, which is a semiconductor layer, is disposed between the on-chip lens 47 and the multilayer wiring layer 42, and incident light is made incident on the photodiode PD from the back side on which the on-chip lens 47 is formed.

[0049] In addition, the pixel 10 has two transfer transistors TRG1 and TRG2 for the photodiode PD provided in each pixel, and is configured to be able to distribute the charges (electrons) generated by photoelectric conversion in the photodiode PD to the floating diffusion region FD1 or FD2.

[0050] The reflected light received by the light receiving element 1 is infrared light with a wavelength of about 780 nm to 1000 nm, and is little absorbed by silicon, which is the semiconductor substrate 41, and has a low quantum efficiency. Therefore, the pixel 10 according to the first configuration example is configured to form an inter-pixel separation portion 61 at the pixel boundary portion 44 to prevent the incident light from penetrating into the adjacent pixel 10, confine the incident light within the pixel itself, and prevent the incident light from leaking in from the adjacent pixel 10. In addition, a reflective film 63 is provided on the metal film M below the formation region of the photodiode PD, so that infrared light that has passed through the semiconductor substrate 41 without being photoelectrically converted in the semiconductor substrate 41 is reflected by the reflective film 63 and made to enter the semiconductor substrate 41 again.

[0051] On the other hand, by providing the reflective film 63 on the first metal film M1 below the formation region of the photodiode PD, there is a concern that the incident light reflected by the reflective film 63 may penetrate into an adjacent pixel, for example, as shown by the arrow in Fig. 3. Therefore, by forming an inter-pixel light shielding portion 65 at the pixel boundary portion 44 of the multilayer wiring layer 42, the incident light is prevented from leaking into an adjacent pixel due to wraparound from the multilayer wiring layer 42.

[0052] With the above configuration, the amount of infrared light that is photoelectrically converted within the semiconductor substrate 41 can be increased, and the quantum efficiency (QE), that is, the sensitivity of the pixel 10 to infrared light can be improved.

[0053] <3. Modification of the First Configuration Example> FIG. 4 is a cross-sectional view showing a modification of the pixel 10 according to the first configuration example shown in FIG.

[0054] In FIG. 4, parts corresponding to those in the first configuration example shown in FIG. 2 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0055] The modified example in FIG. 4 is different from the first configuration example in FIG. 2 in that the inter-pixel isolation portion 61, which is a DTI (Deep Trench Isolation) formed by digging into the back side (the on-chip lens 47 side) of the semiconductor substrate 41, is replaced with an inter-pixel isolation portion 71 that penetrates the semiconductor substrate 41, but has other points in common.

[0056] The inter-pixel isolation portion 71 is formed by forming a trench from the back side (on-chip lens 47 side) or the front side of the semiconductor substrate 41 until it penetrates to the substrate surface on the opposite side, and embedding a silicon oxide film 55, which is the material of the uppermost layer of the anti-reflection film 43, inside the trench. The material embedded in the trench as the inter-pixel isolation portion 71 may be an insulating film such as the silicon oxide film 55, or a metal material such as tungsten (W), aluminum (Al), titanium (Ti), titanium nitride (TiN), etc.

[0057] By forming such inter-pixel isolation parts 71, adjacent pixels can be completely electrically isolated from each other. This prevents incident light from penetrating into the adjacent pixel 10, confining it within the pixel itself, and prevents the incident light from leaking in from the adjacent pixel 10. In addition, by forming inter-pixel light shielding parts 65 at pixel boundary parts 44 of the multilayer wiring layer 42, the incident light is prevented from leaking into adjacent pixels due to wraparound from the multilayer wiring layer 42.

[0058] Therefore, also in the modification of the first configuration example, the amount of infrared light that is photoelectrically converted in the semiconductor substrate 41 can be increased, and the quantum efficiency, that is, the sensitivity of the pixel 10 to infrared light can be improved.

[0059] <4. Example of pixel circuit configuration> FIG. 5 shows a circuit configuration of the pixels 10 arranged two-dimensionally in the pixel array section 21. As shown in FIG.

[0060] The pixel 10 includes a photodiode PD as a photoelectric conversion element. The pixel 10 also includes two of each of a transfer transistor TRG, a floating diffusion region FD, an additional capacitance FDL, a switching transistor FDG, an amplification transistor AMP, a reset transistor RST, and a selection transistor SEL. The pixel 10 also includes a charge discharging transistor OFG.

[0061] Here, when distinguishing between the transfer transistor TRG, floating diffusion region FD, additional capacitance FDL, switching transistor FDG, amplification transistor AMP, reset transistor RST, and selection transistor SEL, of which two are provided in each pixel 10, they will be referred to as transfer transistors TRG1 and TRG2, floating diffusion regions FD1 and FD2, additional capacitances FDL1 and FDL2, switching transistors FDG1 and FDG2, amplification transistors AMP1 and AMP2, reset transistors RST1 and RST2, and selection transistors SEL1 and SEL2, as shown in Figure 5.

[0062] The transfer transistor TRG, the switching transistor FDG, the amplification transistor AMP, the selection transistor SEL, the reset transistor RST, and the charge discharging transistor OFG are configured, for example, by N-type MOS transistors.

[0063] The transfer transistor TRG1 becomes conductive in response to a transfer drive signal TRG1g supplied to its gate electrode becoming active, thereby transferring the charge stored in the photodiode PD to the floating diffusion region FD1. The transfer transistor TRG2 becomes conductive in response to a transfer drive signal TRG2g supplied to its gate electrode becoming active, thereby transferring the charge stored in the photodiode PD to the floating diffusion region FD2.

[0064] The floating diffusion regions FD1 and FD2 are charge storage portions that temporarily store the charges transferred from the photodiode PD.

[0065] The switching transistor FDG1 becomes conductive in response to an active state of an FD drive signal FDG1g supplied to the gate electrode, thereby connecting the additional capacitance FDL1 to the floating diffusion region FD1. The switching transistor FDG2 becomes conductive in response to an active state of an FD drive signal FDG2g supplied to the gate electrode, thereby connecting the additional capacitance FDL2 to the floating diffusion region FD2. The additional capacitances FDL1 and FDL2 are formed by the wiring capacitance 64 in FIG. 2.

[0066] The reset transistor RST1 becomes conductive in response to the reset drive signal RSTg supplied to its gate electrode becoming active, thereby resetting the potential of the floating diffusion region FD1. The reset transistor RST2 becomes conductive in response to the reset drive signal RSTg supplied to its gate electrode becoming active, thereby resetting the potential of the floating diffusion region FD2. When the reset transistors RST1 and RST2 are activated, the switching transistors FDG1 and FDG2 are also simultaneously activated, and the additional capacitances FDL1 and FDL2 are also reset.

[0067] For example, when the illuminance is high and the amount of incident light is large, the vertical drive unit 22 activates the switching transistors FDG1 and FDG2 to connect the floating diffusion region FD1 to the additional capacitance FDL1 and also connects the floating diffusion region FD2 to the additional capacitance FDL2. This allows more charges to be stored when the illuminance is high.

[0068] On the other hand, when the amount of incident light is low and the illuminance is low, the vertical drive unit 22 makes the switching transistors FDG1 and FDG2 inactive and disconnects the additional capacitances FDL1 and FDL2 from the floating diffusion regions FD1 and FD2, respectively, thereby increasing the conversion efficiency.

[0069] When a discharge drive signal OFG1g supplied to the gate electrode becomes active, the charge discharge transistor OFG becomes conductive in response to this, thereby discharging the charge accumulated in the photodiode PD.

[0070] The amplifier transistor AMP1 has a source electrode connected to the vertical signal line 29A via the selection transistor SEL1, and is connected to a constant current source (not shown) to form a source follower circuit. The amplifier transistor AMP2 has a source electrode connected to the vertical signal line 29B via the selection transistor SEL2, and is connected to a constant current source (not shown) to form a source follower circuit.

[0071] The selection transistor SEL1 is connected between the source electrode of the amplification transistor AMP1 and the vertical signal line 29A. When a selection signal SEL1g supplied to the gate electrode of the selection transistor SEL1 becomes active, the selection transistor SEL1 becomes conductive in response to the selection signal SEL1g becoming active, and outputs the detection signal VSL1 output from the amplification transistor AMP1 to the vertical signal line 29A.

[0072] The selection transistor SEL2 is connected between the source electrode of the amplification transistor AMP2 and the vertical signal line 29B. When a selection signal SEL2g supplied to the gate electrode of the selection transistor SEL2 becomes active, the selection transistor SEL2 becomes conductive in response to this, and outputs the detection signal VSL2 output from the amplification transistor AMP2 to the vertical signal line 29B.

[0073] The transfer transistors TRG1 and TRG2, the switching transistors FDG1 and FDG2, the amplification transistors AMP1 and AMP2, the selection transistors SEL1 and SEL2, and the charge discharging transistor OFG of the pixel 10 are controlled by a vertical drive section 22.

[0074] In the pixel circuit of FIG. 5, the additional capacitances FDL1 and FDL2 and the switching transistors FDG1 and FDG2 that control the connection therebetween may be omitted. However, by providing the additional capacitance FDL and using it according to the amount of incident light, a high dynamic range can be ensured.

[0075] The operation of pixel 10 will now be briefly described.

[0076] First, before starting light reception, a reset operation is performed on all pixels to reset the charges in the pixels 10. That is, the charge drain transistor OFG, the reset transistors RST1 and RST2, and the switching transistors FDG1 and FDG2 are turned on, and the charges stored in the photodiode PD, the floating diffusion regions FD1 and FD2, and the additional capacitances FDL1 and FDL2 are drained.

[0077] After the accumulated charges are discharged, all pixels start receiving light.

[0078] During the light receiving period, the transfer transistors TRG1 and TRG2 are alternately driven. That is, during the first period, the transfer transistor TRG1 is controlled to be on and the transfer transistor TRG2 is controlled to be off. During this first period, the charge generated in the photodiode PD is transferred to the floating diffusion region FD1. During the second period following the first period, the transfer transistor TRG1 is controlled to be off and the transfer transistor TRG2 is controlled to be on. During this second period, the charge generated in the photodiode PD is transferred to the floating diffusion region FD2. As a result, the charge generated in the photodiode PD is divided and accumulated in the floating diffusion regions FD1 and FD2.

[0079] Here, the transfer transistor TRG and the floating diffusion region FD where the charge (electrons) obtained by photoelectric conversion is read out are also referred to as an active tap. Conversely, the transfer transistor TRG and the floating diffusion region FD where the charge obtained by photoelectric conversion is not read out are also referred to as an inactive tap.

[0080] Then, when the light receiving period ends, each pixel 10 of the pixel array unit 21 is selected line-sequentially. In the selected pixel 10, the selection transistors SEL1 and SEL2 are turned on. As a result, the charge accumulated in the floating diffusion region FD1 is output as a detection signal VSL1 to the column processing unit 23 via the vertical signal line 29A. The charge accumulated in the floating diffusion region FD2 is output as a detection signal VSL2 to the column processing unit 23 via the vertical signal line 29B.

[0081] This completes one light receiving operation, and the next light receiving operation is then executed, starting with a reset operation.

[0082] The reflected light received by pixel 10 is delayed from the timing of irradiation by the light source according to the distance to the object. The distribution ratio of the charges accumulated in the two floating diffusion regions FD1 and FD2 changes depending on the delay time according to the distance to the object, so the distance to the object can be calculated from the distribution ratio of the charges accumulated in the two floating diffusion regions FD1 and FD2.

[0083] <5. Plan view of pixel> FIG. 6 is a plan view showing an example of the arrangement of the pixel circuits shown in FIG.

[0084] 6 corresponds to the row direction (horizontal direction) in FIG. 1, and the vertical direction corresponds to the column direction (vertical direction) in FIG.

[0085] As shown in FIG. 6, in the central region of a rectangular pixel 10, a photodiode PD is formed of an N-type semiconductor region 52.

[0086] Outside the photodiode PD, along a specific one of the four sides of the rectangular pixel 10, the transfer transistor TRG1, the switching transistor FDG1, the reset transistor RST1, the amplification transistor AMP1, and the selection transistor SEL1 are arranged in a linear array, and along the other one of the four sides of the rectangular pixel 10, the transfer transistor TRG2, the switching transistor FDG2, the reset transistor RST2, the amplification transistor AMP2, and the selection transistor SEL2 are arranged in a linear array.

[0087] Furthermore, a charge discharging transistor OFG is disposed on a side other than the two sides of the pixel 10 on which the transfer transistor TRG, the switching transistor FDG, the reset transistor RST, the amplifying transistor AMP, and the selection transistor SEL are formed.

[0088] The inter-pixel light shielding portion 65 is formed, for example, by arranging light shielding members having the same size and planar shape as the gate contacts 66 at predetermined intervals on the boundary line of each pixel 10. In the example of Fig. 6, the planar shape of one light shielding member constituting the inter-pixel light shielding portion 65 is rectangular, but it may also be rectangular with rounded corners, elliptical, or circular.

[0089] 7 and 8 are diagrams showing other examples of the formation of the inter-pixel light shielding portion 65. In FIG.

[0090] As shown in Figure 7, the inter-pixel light-shielding portion 65 may be configured in such a way that a linear light-shielding member having a planar shape that is long in the direction of the boundary line of the pixel 10 and short in the direction adjacent to other pixels 10 is arranged at a predetermined interval on the boundary line of the pixel 10.

[0091] Alternatively, the inter-pixel light shielding portion 65 may be configured by arranging a light shielding member on the boundary line of the pixel 10 so as to surround the entire periphery of the pixel 10, as shown in FIG.

[0092] <6. Other examples of pixel circuit configurations> FIG. 9 shows another example of the circuit configuration of the pixel 10. In FIG.

[0093] In FIG. 9, parts corresponding to those in FIG. 5 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0094] The pixel 10 includes a photodiode PD as a photoelectric conversion element, and further includes two first transfer transistors TRGa, two second transfer transistors TRGb, a memory MEM, a floating diffusion region FD, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL.

[0095] Here, when distinguishing between the first transfer transistor TRGa, the second transfer transistor TRGb, the memory MEM, the floating diffusion region FD, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL, of which two are provided in each pixel 10, they will be referred to as the first transfer transistors TRGa1 and TRGa2, the second transfer transistors TRGb1 and TRGb2, the transfer transistors TRG1 and TRG2, the memories MEM1 and MEM2, the floating diffusion regions FD1 and FD2, the amplification transistors AMP1 and AMP2, and the selection transistors SEL1 and SEL2, as shown in FIG. 9.

[0096] 5 and 9, the transfer transistor TRG is changed to two types of first and second transfer transistors TRGa and TRGb, a memory MEM is added, and the additional capacitance FDL and the switching transistor FDG are omitted.

[0097] The first transfer transistor TRGa, the second transfer transistor TRGb, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL are configured, for example, with N-type MOS transistors.

[0098] In the pixel circuit shown in Figure 5, the charge generated in the photodiode PD is transferred to and stored in floating diffusion regions FD1 and FD2, but in the pixel circuit of Figure 9, the charge is transferred to and stored in memories MEM1 and MEM2 provided as charge storage units.

[0099] That is, when the first transfer drive signal TRGa1g supplied to the gate electrode becomes active, the first transfer transistor TRGa1 becomes conductive in response to this, thereby transferring the charge accumulated in the photodiode PD to the memory MEM1. When the first transfer drive signal TRGa2g supplied to the gate electrode becomes active, the first transfer transistor TRGa2 becomes conductive in response to this, thereby transferring the charge accumulated in the photodiode PD to the memory MEM2.

[0100] In addition, the second transfer transistor TRGb1 becomes conductive in response to the second transfer drive signal TRGb1g supplied to its gate electrode becoming active, thereby transferring the charges stored in the memory MEM1 to the floating diffusion region FD1. The second transfer transistor TRGb2 becomes conductive in response to the second transfer drive signal TRGb2g supplied to its gate electrode becoming active, thereby transferring the charges stored in the memory MEM2 to the floating diffusion region FD2.

[0101] The reset transistor RST1 becomes conductive in response to a reset drive signal RST1g supplied to its gate electrode becoming active, thereby resetting the potential of the floating diffusion region FD1. The reset transistor RST2 becomes conductive in response to a reset drive signal RST2g supplied to its gate electrode becoming active, thereby resetting the potential of the floating diffusion region FD2. When the reset transistors RST1 and RST2 are activated, the second transfer transistors TRGb1 and TRGb2 are also simultaneously activated, and the memories MEM1 and MEM2 are also reset.

[0102] 5, the charge generated in the photodiode PD is divided and stored in the memories MEM1 and MEM2. Then, at the timing of reading, the charges held in the memories MEM1 and MEM2 are transferred to the floating diffusion regions FD1 and FD2, respectively, and output from the pixel 10.

[0103] <7. Plan view of pixel> FIG. 10 is a plan view showing an example of the arrangement of the pixel circuits shown in FIG.

[0104] 10 corresponds to the row direction (horizontal direction) in FIG. 1, and the vertical direction corresponds to the column direction (vertical direction) in FIG.

[0105] As shown in FIG. 10, in the central region of a rectangular pixel 10, a photodiode PD is formed of an N-type semiconductor region 52.

[0106] Outside the photodiode PD, a first transfer transistor TRGa1, a second transfer transistor TRGb1, a reset transistor RST1, an amplification transistor AMP1, and a selection transistor SEL1 are linearly arranged along a predetermined one of the four sides of the rectangular pixel 10, and a first transfer transistor TRGa2, a second transfer transistor TRGb2, a reset transistor RST2, an amplification transistor AMP2, and a selection transistor SEL2 are linearly arranged along the other one of the four sides of the rectangular pixel 10. The memories MEM1 and MEM2 are formed, for example, by a buried N-type diffusion region.

[0107] The inter-pixel light shielding portion 65 has a configuration in which light shielding members having the same planar shape as the gate contacts 66 are arranged at equal intervals as shown in FIG. 6, but may have the configurations shown in FIG. 7 or FIG. 8 or other configurations.

[0108] It should be noted that the arrangement of the pixel circuits is not limited to the example shown in FIG. 6 or FIG. 10, and other arrangements are also possible.

[0109] <8. Cross-sectional view of the second configuration example of the pixel> FIG. 11 is a cross-sectional view showing a second configuration example of the pixel 10. As shown in FIG.

[0110] In FIG. 11, parts corresponding to those in the first configuration example shown in FIG. 2 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0111] 11, a moth-eye structure 111 having fine projections and recesses formed periodically is formed above a formation region of a photodiode PD on the rear surface of a semiconductor substrate 41. Corresponding to the moth-eye structure 111 of the semiconductor substrate 41, an anti-reflection film 43 formed on the upper surface thereof is also formed with a moth-eye structure.

[0112] The moth-eye structure 111 of the semiconductor substrate 41 is configured such that, for example, a plurality of quadrangular pyramidal regions having approximately the same shape and size are arranged regularly (in a lattice pattern).

[0113] The moth-eye structure 111 is formed, for example, in an inverted pyramid structure in which a plurality of quadrangular pyramid-shaped regions having an apex on the photodiode PD side are regularly arranged.

[0114] Alternatively, the moth-eye structure 111 may have a regular pyramid structure in which a plurality of quadrangular pyramid regions having an apex on the on-chip lens 47 side are arranged in a regular pattern. The size and arrangement of the plurality of quadrangular pyramids may be random, without being arranged in a regular pattern. Furthermore, each concave or convex portion of each quadrangular pyramid of the moth-eye structure 111 may have a certain degree of curvature and a rounded shape. The moth-eye structure 111 may have a structure in which a concave-convex structure is repeated periodically or randomly, and the shape of the concave or convex portions is arbitrary.

[0115] FIG. 12 is a cross-sectional view showing another example of the shape of the moth-eye structure 111. In FIG.

[0116] 12, the shape of the moth-eye structure 111 has a surface parallel to the semiconductor substrate 41, and has an uneven structure in which recesses dug in a certain amount in the substrate depth direction are arranged at a certain period. Note that, in FIG. 12, the anti-reflection film 43 is composed of two layers, a hafnium oxide film 53 and a silicon oxide film 55, but it may be three layers or a single layer as in the other configuration examples.

[0117] As shown in Figures 11 and 12, by forming a moth-eye structure 111 as a diffraction structure that diffracts incident light on the light incident surface of a semiconductor substrate 41, it is possible to mitigate the sudden change in refractive index at the substrate interface and reduce the effects of reflected light.

[0118] The other configurations of the second configuration example are similar to those of the first configuration example.

[0119] 11 and 12, inter-pixel light shielding portions 65 are formed at pixel boundaries 44 of multi-layer wiring layer 42 to prevent incident light from leaking into adjacent pixels due to wraparound from multi-layer wiring layer 42.

[0120] Therefore, also in the second configuration example, the amount of infrared light that is photoelectrically converted in the semiconductor substrate 41 can be increased, and the quantum efficiency, that is, the sensitivity of the pixel 10 to infrared light can be improved.

[0121] <9. Cross-sectional view of the third configuration example of the pixel> FIG. 13 is a cross-sectional view showing a third configuration example of the pixel 10. As shown in FIG.

[0122] In the above-mentioned first and second configuration examples, configurations are described that prevent incident light from leaking into adjacent pixels due to leakage from the multilayer wiring layer 42. In the third configuration example, a configuration is described that prevents incident light from leaking into adjacent pixels due to leakage from the on-chip lens 47 side.

[0123] In FIG. 13, parts corresponding to those in the first configuration example shown in FIG. 2 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0124] 13, the reflective film 63 formed in the same layer as the first metal film M1 below the formation region of the photodiode PD in Fig. 2 is changed to a reflective film 141. In addition, the inter-pixel light shielding portion 65 formed in the pixel boundary portion 44 of the multilayer wiring layer 42 in Fig. 2 is omitted.

[0125] The reflective film 141 in the third configuration example is formed of a material different from that of the reflective film 63 in the first configuration example. Specifically, in the first configuration example, the reflective film 141 is formed of the same material (e.g., copper, aluminum, etc.) as the metal wiring 67 electrically connected to the gate of the transfer transistor TRG1 or TRG2, but in the third configuration example, the reflective film 141 is formed of a material different from that of the metal wiring 67. For example, when the metal wiring 67 is formed of copper, the reflective film 141 is formed of aluminum, tungsten (W), platinum (Pt), nickel (Ni), etc.

[0126] The material forming the reflective film 141 can be determined, for example, according to the thickness of the semiconductor substrate 41. For example, when the semiconductor substrate 41 is thick (for example, 6 μm or more), aluminum can be used as the material of the reflective film 141. Also, when the semiconductor substrate 41 is thin (for example, less than 6 μm), tungsten, platinum, nickel, or the like can be used as the material of the reflective film 141.

[0127] In other words, for example, when the semiconductor substrate 41 is thick (for example, 6 μm or more), a material having a relatively high reflectance (for example, a material having a reflectance of more than 70%) can be used for the material of the reflective film 141. Also, for example, when the semiconductor substrate 41 is thin (for example, less than 6 μm), a material having a relatively low reflectance (for example, a material having a reflectance of 30 to 70%) can be used for the material of the reflective film 141.

[0128] A material having a lower reflectance (refractive index) at least in the range of infrared wavelengths than the material of the first metal film M1 and the other metal wirings 67 is used for the material forming the reflective film 141. Examples of such materials include metals such as Al, Ni, Cr, Fe, Pt, Rh, and Sn, and alloys thereof, and metal compounds such as Ta2O5, Al2O3, and Si3N4.

[0129] The other configurations of the third configuration example are similar to those of the first configuration example.

[0130] The reflected light received by the light receiving element 1 is infrared light with a wavelength of about 780 nm to 1000 nm, and is little absorbed by silicon, which is the semiconductor substrate 41, resulting in low quantum efficiency. Therefore, the light incident on the semiconductor substrate 41 passes through the semiconductor substrate 41 and is reflected by the reflective film 141 back to the semiconductor substrate 41. At this time, if the reflectance of the reflective film 141 is as high as approaching 100%, the light reflected by the reflective film 141 may pass further through the light incident surface of the semiconductor substrate 41, be reflected by the on-chip lens 47, and leak into the adjacent pixel 10, as indicated by the solid arrow in FIG. 14, which may cause flare.

[0131] According to the third configuration example, the material forming the reflective film 141 is formed from a material having a lower reflectance than the material of the other metal wirings 67 of the first metal film M1, and by making the reflectance lower than that of the other metal wirings 67 according to the thickness of the semiconductor substrate 41, it is possible to adjust so that all the light reflected by the reflective film 141 is absorbed within the semiconductor substrate 41, as indicated by the dashed arrow in Fig. 14. This makes it possible to prevent the light reflected by the reflective film 141 from penetrating further through the light incident surface of the semiconductor substrate 41, thereby making it possible to prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side.

[0132] With the above configuration, the amount of infrared light that is photoelectrically converted within the semiconductor substrate 41 is increased, improving the quantum efficiency, i.e., the sensitivity of the pixel 10 to infrared light, while suppressing flare caused by reflected light penetrating the semiconductor substrate 41.

[0133] <10. Modification of the third configuration example> <First Modification> FIG. 15 is a cross-sectional view showing a first modification of the pixel 10 according to the third configuration example shown in FIG.

[0134] In FIG. 15, parts corresponding to those in the third configuration example shown in FIG. 13 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0135] In the first modified example in FIG. 15, the position of the reflective film 141 in the substrate depth direction is different from that in the third configuration example shown in FIG. 13, but other points are common to the third configuration example shown in FIG.

[0136] Specifically, in the third configuration example shown in Fig. 13, the reflective film 141 is formed at the same position (same layer) as the first metal film M1 in the substrate depth direction, but in the first modified example in Fig. 15, the reflective film 141 is formed at a different position (different layer) from the first metal film M1. Specifically, the reflective film 141 is formed on the photodiode PD side (semiconductor substrate 41 side) of the first metal film M1 in the substrate depth direction.

[0137] If the reflective film 141 is formed in the same layer as the first metal film M1, the reflective film 141 must be positioned to avoid the metal wiring 67 of the first metal film M1, as shown in A of Figure 16, and therefore the area of ​​the reflective film 141 in a planar view becomes smaller.

[0138] In contrast, when the reflective film 141 is formed in a layer different from the first metal film M1, as shown in B of Fig. 16, the metal wiring 67 of the first metal film M1 and the reflective film 141 do not interfere with each other in a plan view, so that the reflective film 141 can be disposed in a large area overlapping the photodiode PD. This makes it possible to more fully achieve the purpose of the reflective film 63. That is, more of the infrared light that has passed through the semiconductor substrate 41 without being photoelectrically converted in the semiconductor substrate 41 can be reflected by the reflective film 63 and made to enter the semiconductor substrate 41.

[0139] With the above configuration, the amount of infrared light that is photoelectrically converted within the semiconductor substrate 41 is increased, improving the quantum efficiency, i.e., the sensitivity of the pixel 10 to infrared light, while suppressing flare caused by reflected light penetrating the semiconductor substrate 41.

[0140] <Second Modification> FIG. 17 is a cross-sectional view showing a second modification of the pixel 10 according to the third configuration example shown in FIG.

[0141] In FIG. 17, parts corresponding to those in the third configuration example shown in FIG. 13 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0142] In the second modified example in FIG. 17, the reflective film 141 in the third configuration example shown in FIG. 13 is replaced with a reflective film 141P, and the other configuration is common to the third configuration example shown in FIG.

[0143] The reflective film 141P is different from the reflective film 141 shown in FIG. 13 in terms of its position in the substrate depth direction, and is also made of a different material.

[0144] Specifically, the reflective film 141P is formed at the same substrate depth position as the gates of the transfer transistors TRG1 and TRG2 and made of the same material (e.g., polysilicon) as the gates of the transfer transistors TRG1 and TRG2. By forming the reflective film 141P at the same substrate depth position as the gates of the transfer transistors TRG1 and TRG2 and made of the same material, the reflective film 141P can be formed simultaneously with the gates of the transfer transistors TRG1 and TRG2, so that the process can be shared and the number of processes can be reduced. The reflective film 141P may be formed of polysilicon and a salicide film.

[0145] As shown in the first variant of Figure 15 and the second variant of Figure 17, by positioning the reflective film 141 or 141P in the substrate depth direction on the photodiode PD side of the first metal film M1, it is possible to prevent incident light from leaking into adjacent pixels due to leakage from the multilayer wiring layer 42.

[0146] <11. Cross-sectional view of the fourth configuration example of the pixel> FIG. 18 is a cross-sectional view showing a fourth configuration example of the pixel 10. As shown in FIG.

[0147] In FIG. 18, parts corresponding to those in the third configuration example shown in FIG. 13 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0148] 18, a moth-eye structure 161 having fine projections and recesses formed periodically is further formed on the connection surface between the semiconductor substrate 41 and the multilayer wiring layer 42 below the formation region of the photodiode PD. The moth-eye structure 161 may have an inverted pyramid structure or a normal pyramid structure, similar to the moth-eye structure 111 described in FIG. 11. Alternatively, the moth-eye structure 161 may have a projection-recess structure in which parallel recesses are arranged at a constant interval on the semiconductor substrate 41, as shown in FIG.

[0149] The other configurations of the fourth configuration example are similar to those of the third configuration example shown in FIG.

[0150] By forming the moth-eye structure 161 at the interface between the semiconductor substrate 41 and the multilayer wiring layer 42 below the formation region of the photodiode PD, light that penetrates the photodiode PD is diffused by the moth-eye structure 111 and reaches the reflective film 141. Since reflection of infrared light by the reflective film 141 is suppressed, it is possible to suppress the light reflected by the reflective film 141 from further penetrating the light incident surface of the semiconductor substrate 41. As a result, it is possible to prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side.

[0151] <12. Cross-sectional view of the fifth configuration example of the pixel> FIG. 19 is a cross-sectional view showing a fifth configuration example of the pixel 10. As shown in FIG.

[0152] In FIG. 19, parts corresponding to those in the third configuration example shown in FIG. 13 are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0153] In the fifth configuration example of Fig. 19, the reflective film 141 of the third configuration example shown in Fig. 13 is replaced with a reflective film 141M. The other configurations of Fig. 19 are the same as those of the third configuration example shown in Fig. 13.

[0154] The reflective film 141M differs from the reflective film 141 in that the surface shape on the semiconductor substrate 41 side has a moth-eye structure in which minute concaves and convexes are periodically formed. By forming the surface shape of the reflective film 141M on the semiconductor substrate 41 side to have a moth-eye structure, light that penetrates the photodiode PD is diffused by the reflective film 141M and reflected to the semiconductor substrate 41, as in the fourth configuration example of FIG. 18. This suppresses reflection of infrared light by the reflective film 141M, and therefore it is possible to suppress the light reflected by the reflective film 141M from further penetrating the light incident surface of the semiconductor substrate 41. As a result, it is possible to prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side.

[0155] <13. Cross-sectional view of the sixth configuration example of the pixel> FIG. 20 is a cross-sectional view showing a sixth configuration example of the pixel 10. As shown in FIG.

[0156] In FIG. 20, the parts corresponding to those in the first to fifth configuration examples described above are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0157] The pixel 10 according to the fifth configuration example of Figure 20 has a moth-eye structure 111 on the back surface of the semiconductor substrate 41, above the formation region of the photodiode PD, and has a moth-eye structure 161 on the front surface of the semiconductor substrate 41, below the formation region of the photodiode PD.

[0158] In addition, the pixel 10 relating to the sixth configuration example of Figure 20 has a reflective film 141 formed of a material having a lower reflectivity than the material of the other metal wiring 67 of the first metal film M1 in the layer of the first metal film M1 below the formation region of the photodiode PD.

[0159] In other words, the pixel 10 according to the sixth configuration example in FIG. 20 has a structure in which a moth-eye structure 111 is added to the back surface side of the semiconductor substrate 41 of the fourth configuration example shown in FIG.

[0160] 20, the shape of the fine uneven structure of the motheye structure 111 on the back surface side (upper side in the figure) of the semiconductor substrate 41 may be the same as or different from the shape of the fine uneven structure of the motheye structure 161 on the front surface side (lower side in the figure) of the semiconductor substrate 41. Furthermore, the period of the uneven structure of the motheye structure 111 and the period of the uneven structure of the motheye structure 161 may be the same as or different from each other.

[0161] For example, when the period of the uneven structure of the motheye structure 111 is formed longer than the period of the uneven structure of the motheye structure 161, light with a wavelength close to infrared is diffused by the motheye structure 111, light with a wavelength close to ultraviolet is diffused by the motheye structure 161, and light with a wavelength close to infrared is not diffused by the motheye structure 161. When the thickness of the semiconductor substrate 41 is large and there is no need to relatively suppress the reflection of infrared light, the period of the uneven structure of the motheye structure 111 is formed longer than the period of the uneven structure of the motheye structure 161. On the other hand, when the thickness of the semiconductor substrate 41 is small and there is a need to suppress the reflection of infrared light on the reflective film 141, the period of the uneven structure of the motheye structure 161 is formed longer than the period of the uneven structure of the motheye structure 111.

[0162] 20 , the reflective film 141 having a lower reflectance than the other metal wirings 67 can prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side. In addition, the moth-eye structures 111 and 161 can prevent the light reflected by the reflective film 141 from penetrating further beyond the light incident surface of the semiconductor substrate 41.

[0163] <14. Cross-sectional view of the seventh configuration example of the pixel> FIG. 21 is a cross-sectional view showing the seventh configuration example of the pixel 10. As shown in FIG.

[0164] In FIG. 21, the parts corresponding to those in the first to sixth configuration examples described above are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0165] The pixel 10 according to the sixth configuration example in FIG. 21 has a moth-eye structure 111 on the back surface of the semiconductor substrate 41.

[0166] In addition, the pixel 10 relating to the sixth configuration example of Figure 20 has a reflective film 141 formed of a material having a lower reflectivity than the material of the other metal wiring 67 of the first metal film M1 in the layer of the first metal film M1 below the formation region of the photodiode PD.

[0167] In addition, a plurality of dummy contacts 181 are formed on the surface of the reflective film 141 facing the semiconductor substrate 41. The dummy contacts 181 are contact wirings that are formed in the same process and with the same material as the gate contact 66 connected to the gate of the transfer transistor TRG1 or TRG2, but are not connected to the gate of the pixel transistor. By forming the plurality of dummy contacts 181 on the surface of the reflective film 141 facing the semiconductor substrate 41, a fine uneven structure is formed, and therefore the same effect as the reflective film 141M of the fifth configuration example shown in FIG.

[0168] That is, the light that passes through the photodiode PD is diffused by the multiple dummy contacts 181 formed on the surface of the reflective film 141M facing the semiconductor substrate 41, and is reflected to the semiconductor substrate 41. This makes it possible to prevent the light reflected by the reflective film 141 from passing further through the light incident surface of the semiconductor substrate 41. As a result, it is possible to prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side.

[0169] 21 , the reflective film 141 having a lower reflectance than the other metal wirings 67 can prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side. In addition, the moth-eye structure 111 can prevent the light reflected by the reflective film 141 from penetrating further beyond the light incident surface of the semiconductor substrate 41.

[0170] <Modification of the Seventh Configuration Example> The planar shape and size of the dummy contacts 181, the number of dummy contacts arranged on the plane of the reflective film 141, and the like are not particularly limited and can be determined arbitrarily. The size and shape of the dummy contacts 181 may be the same as or different from the size and shape of the gate contact 66 connected to the gate of the transfer transistor TRG1 or TRG2.

[0171] For example, as shown in FIG. 22, the dummy contact 181 may be formed with a planar size larger than that of the gate contact 66, and may be formed slightly above the reflective film 141 (toward the photodiode PD) without being connected to the reflective film 141, with the interlayer insulating film 62 sandwiched therebetween.

[0172] <15. Cross-sectional view of the eighth configuration example of the pixel> FIG. 23 is a cross-sectional view showing an eighth configuration example of the pixel 10. As shown in FIG.

[0173] In FIG. 23, the parts corresponding to those in the first to seventh configuration examples described above are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0174] In the above-mentioned first to seventh configuration examples and their modified examples, various configurations have been described that prevent the incident light from leaking into adjacent pixels due to wraparound from the multilayer wiring layer 42, and that prevent the incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side. By appropriately combining these various configurations, a configuration can be adopted that prevents the incident light from leaking into adjacent pixels due to wraparound from the multilayer wiring layer 42 and wraparound from the on-chip lens 47 side.

[0175] For example, the pixel 10 as the eighth configuration example shown in FIG. 23 has characteristic configurations of both the first configuration example shown in FIG. 2 and the third configuration example shown in FIG.

[0176] That is, the pixel 10 in FIG. 23 has a reflective film 141 formed of a material having a lower reflectivity than the material of the other metal wiring 67 of the first metal film M1 in the layer of the first metal film M1 below the formation region of the photodiode PD.

[0177] 23 has an inter-pixel light shielding portion 65 at the pixel boundary portion 44 of the multilayer wiring layer 42 to prevent incident light reflected by the reflective film 141 from being incident on the photodiode PD of the adjacent pixel 10.

[0178] Other configurations of the eighth configuration example in FIG. 23 are the same as, for example, the first configuration example shown in FIG.

[0179] In the pixel 10 of FIG. 23 having the above configuration, the inter-pixel light shielding portion 65 disposed at the pixel boundary portion 44 of the multilayer wiring layer 42 prevents incident light from leaking into an adjacent pixel due to wraparound from the multilayer wiring layer 42.

[0180] Furthermore, the reflective film 141 disposed below the region of the multi-wiring layer 42 where the photodiode PD is formed can prevent incident light from leaking into adjacent pixels due to wraparound from the on-chip lens 47 side.

[0181] 24 has a structure in which a moth-eye structure 111 is further added to the rear surface of the semiconductor substrate 41, in addition to the inter-pixel light shielding portion 65 and the reflective film 141 of FIG. 23. The moth-eye structure 111 can further suppress reflection at the substrate interface.

[0182] In addition, although not shown in the figures, by appropriately combining various configurations (the first and second configuration examples described above) for preventing incident light from leaking into adjacent pixels due to leakage from the multilayer wiring layer 42 and various configurations (the third to seventh configuration examples described above) for preventing incident light from leaking into adjacent pixels due to leakage from the on-chip lens 47 side, it is possible to simultaneously prevent incident light from leaking into adjacent pixels due to leakage from the multilayer wiring layer 42 and prevent incident light from leaking into adjacent pixels due to leakage from the on-chip lens 47 side.

[0183] <16. Cross-sectional view of the ninth configuration example of the pixel> FIG. 25 is a cross-sectional view showing a ninth configuration example of the pixel 10. As shown in FIG.

[0184] In FIG. 25, the parts corresponding to the first to eighth configuration examples described above are given the same reference numerals, and the description of those parts will be omitted as appropriate.

[0185] In the first to eighth configuration examples described above, the light receiving element 1 is constructed using only one semiconductor substrate, i.e., the semiconductor substrate 41. However, in the ninth configuration example of FIG. 25, the light receiving element 1 is constructed using two semiconductor substrates, namely the semiconductor substrate 41 and the semiconductor substrate 301.

[0186] The pixel 10 according to the ninth configuration example in Fig. 25 has a configuration obtained by changing the eighth configuration example in Fig. 23 using one semiconductor substrate 41 to a configuration using two semiconductor substrates 41 and a semiconductor substrate 301. In the following description, for ease of understanding, the semiconductor substrate 41 and the semiconductor substrate 301 are also referred to as a first substrate 41 and a second substrate 301, respectively.

[0187] 25, an inter-pixel light-shielding film 45, a planarization film 46, and an on-chip lens 47 are formed on the light incident surface side of the first substrate 41, similarly to the first configuration example of Fig. 2. An inter-pixel isolation portion 61 is also formed in a pixel boundary portion 44 on the back surface side of the first substrate 41, similarly to the first configuration example of Fig. 2.

[0188] Also, the first substrate 41 has a photodiode PD, which is a photoelectric conversion unit, formed on a pixel basis, and two transfer transistors TRG1 and TRG2 and floating diffusion regions FD1 and FD2, which serve as charge storage units, formed on the front surface side of the first substrate 41.

[0189] On the other hand, a difference from the first configuration example in FIG. 2 is that insulating layer 313 of wiring layer 311 on the front surface side of first substrate 41 is bonded to insulating layer 312 of second substrate 301.

[0190] The wiring layer 311 of the first substrate 41 includes at least one metal film M, and a reflective film 141 is formed in a region located below the formation region of the photodiode PD using the metal film M. In addition, an inter-pixel light shielding portion 65 is formed in the pixel boundary portion 44 of the wiring layer 311.

[0191] Pixel transistors Tr1 and Tr2 are formed on the interface opposite to the insulating layer 312 side, which is the bonding surface side of the second substrate 301. The pixel transistors Tr1 and Tr2 are, for example, an amplification transistor AMP and a selection transistor SEL.

[0192] That is, in the first to eighth configuration examples which are constructed using only one semiconductor substrate 41 (first substrate 41), all pixel transistors, namely, the transfer transistor TRG, the switching transistor FDG, the amplification transistor AMP, and the selection transistor SEL, are formed on the semiconductor substrate 41, whereas in the light receiving element 1 of the ninth configuration example which is constructed using a stacked structure of two semiconductor substrates, the pixel transistors other than the transfer transistor TRG, i.e., the switching transistor FDG, the amplification transistor AMP, and the selection transistor SEL, are formed on the second substrate 301.

[0193] A multilayer wiring layer 321 having at least two metal films M is formed on the side of the second substrate 301 opposite to the first substrate 41 side. The multilayer wiring layer 321 includes a first metal film M11, a second metal film M12, and an interlayer insulating film 333.

[0194] A transfer drive signal TRG1g that controls the transfer transistor TRG1 is supplied from a first metal film M11 of the second substrate 301 to a gate electrode of the transfer transistor TRG1 of the first substrate 41 by a TSV (Through Silicon Via) 331-1 that penetrates the second substrate 301. A transfer drive signal TRG2g that controls the transfer transistor TRG2 is supplied from a first metal film M11 of the second substrate 301 to a gate electrode of the transfer transistor TRG2 of the first substrate 41 by a TSV 331-2 that penetrates the second substrate 301.

[0195] Similarly, the charge accumulated in the floating diffusion region FD1 is transferred from the first substrate 41 side to the first metal film M11 of the second substrate 301 by a TSV 332-1 penetrating the second substrate 301. The charge accumulated in the floating diffusion region FD2 is also transferred from the first substrate 41 side to the first metal film M11 of the second substrate 301 by a TSV 332-2 penetrating the second substrate 301.

[0196] The wiring capacitance 64 is formed in a region (not shown) of the first metal film M11 or the second metal film M12. The metal film M in which the wiring capacitance 64 is formed is formed with a high wiring density in order to form capacitance, while the metal film M connected to the gate electrodes of the transfer transistor TRG, the switching transistor FDG, and the like is formed with a low wiring density in order to reduce induced current. The wiring layer (metal film M) connected to the gate electrode may be configured to be different for each pixel transistor.

[0197] As described above, the pixel 10 according to the ninth configuration example can be configured by stacking two semiconductor substrates, the first substrate 41 and the second substrate 301, and pixel transistors other than the transfer transistor TRG are formed on the second substrate 301, which is different from the first substrate 41 having the photoelectric conversion unit. In addition, the vertical drive unit 22 that controls the driving of the pixel 10, the pixel drive line 28, the vertical signal line 29 that transmits the detection signal, and the like are also formed on the second substrate 301. This allows the pixels to be miniaturized, and increases the degree of freedom in BEOL (Back End Of Line) design.

[0198] Also in the ninth configuration example, the reflective film 141 is formed in a region of the wiring layer 311 located below the formation region of the photodiode PD, and the inter-pixel light shielding portion 65 is formed in the pixel boundary portion 44 of the wiring layer 311. This makes it possible to simultaneously prevent the incident light from leaking into an adjacent pixel due to wraparound from the multilayer wiring layer 42 and the incident light from leaking into an adjacent pixel due to wraparound from the on-chip lens 47 side.

[0199] The ninth configuration example in Figure 25 is a configuration in which the eighth configuration example in Figure 23 is changed to a stacked structure in which two semiconductor substrates are stacked, but it is also possible to change the first to seventh configuration examples described above to a stacked structure in which two semiconductor substrates are stacked.

[0200] <17. Example of IR imaging sensor configuration> The pixel structure having at least one of the inter-pixel light shielding portion 65 and the reflective film 141 described above can be applied not only to a light receiving element that outputs distance measurement information using the indirect ToF method, but also to an IR imaging sensor that receives infrared light and generates an IR image.

[0201] FIG. 26 shows a circuit configuration of a pixel 10 when the light receiving element 1 is configured as an IR imaging sensor that generates and outputs an IR image.

[0202] When the light receiving element 1 is a ToF sensor, the charge generated in the photodiode PD is distributed and stored in two floating diffusion regions FD1 and FD2, so that the pixel 10 has two each of the transfer transistor TRG, floating diffusion region FD, additional capacitance FDL, switching transistor FDG, amplification transistor AMP, reset transistor RST, and selection transistor SEL.

[0203] When the light receiving element 1 is an IR imaging sensor, only one charge storage section for temporarily storing the charge generated in the photodiode PD is required, and therefore there is also one each of the transfer transistor TRG, floating diffusion region FD, additional capacitance FDL, switching transistor FDG, amplification transistor AMP, reset transistor RST, and selection transistor SEL.

[0204] In other words, when the light receiving element 1 is an IR imaging sensor, the pixel 10 has a configuration equivalent to that shown in Fig. 4 except that the transfer transistor TRG2, the switching transistor FDG2, the reset transistor RST2, the amplifying transistor AMP2, and the selection transistor SEL2 are omitted, as shown in Fig. 26. The floating diffusion region FD2 and the vertical signal line 29B are also omitted.

[0205] FIG. 27 is a cross-sectional view of a pixel 10 when the light receiving element 1 is configured as an IR imaging sensor.

[0206] FIG. 27 is a cross-sectional view showing a case where the eighth configuration example shown in FIG. 23 is applied to an IR imaging sensor.

[0207] The difference between the case where the light receiving element 1 is configured as an IR imaging sensor and the case where it is configured as a ToF sensor is the presence or absence of a floating diffusion region FD2 formed on the front surface side of the semiconductor substrate 41 and a pixel transistor, as described in Fig. 26. Therefore, the configuration of the multilayer wiring layer 42 on the front surface side of the semiconductor substrate 41 is different from that in Fig. 23. Specifically, compared to Fig. 23, the floating diffusion region FD2 and the transfer transistor TRG2 are omitted in the pixel 10 in Fig. 27.

[0208] 27, as a configuration common to Fig. 23, a reflective film 141 is formed in the layer of the first metal film M1 of the multilayer wiring layer 42 below the formation region of the photodiode PD, using a material having a lower reflectance than the material of the other metal wiring 67 of the first metal film M1. Also, an inter-pixel light shielding portion 65 is formed in the pixel boundary portion 44 of the multilayer wiring layer 42.

[0209] FIG. 27 shows a cross-sectional configuration when the eighth configuration example shown in FIG. 23 is applied to an IR imaging sensor. Similarly, the first to seventh configuration examples described above can also be applied to an IR imaging sensor by omitting the floating diffusion region FD2 formed on the front surface side of the semiconductor substrate 41 and the corresponding pixel transistor.

[0210] Even when the light receiving element 1 is configured as an IR imaging sensor, the provision of the inter-pixel light shielding portion 65 at the pixel boundary portion 44 of the multilayer wiring layer 42 can prevent the incident light from leaking into an adjacent pixel due to wraparound from the multilayer wiring layer 42. Furthermore, the provision of the reflective film 141 can prevent the incident light from leaking into an adjacent pixel due to wraparound from the on-chip lens 47 side.

[0211] Therefore, even when the light receiving element 1 is configured as an IR imaging sensor, the amount of infrared light that is photoelectrically converted within the semiconductor substrate 41 can be increased, and the quantum efficiency, that is, the sensitivity to infrared light can be improved.

[0212] <18. Example of RGBIR imaging sensor configuration> The pixel structure having at least one of the inter-pixel light shielding portion 65 and the reflective film 141 described above can be applied not only to a light receiving element that receives only infrared light, but also to an RGBIR imaging sensor that receives infrared light and RGB light.

[0213] FIG. 28 shows an example of a pixel arrangement when the light receiving element 1 is configured as an RGBIR imaging sensor that receives infrared light and RGB light.

[0214] When the light receiving element 1 is configured as an RGBIR imaging sensor, as shown in A of Figure 28, the four 2x2 pixels are assigned an R pixel that receives R (red) light, a B pixel that receives B (blue) light, a G pixel that receives G (green) light, and an IR pixel that receives IR (infrared) light.

[0215] The reflective film 63 or 141, which reflects infrared light that has passed through the semiconductor substrate 41 without being photoelectrically converted within the semiconductor substrate 41 and allows it to enter the semiconductor substrate 41 again, may be disposed on all of the R pixels, B pixels, G pixels and IR pixels, or may be disposed on only some of the pixels for the purpose of adjusting the amount of light received (light receiving sensitivity), etc.

[0216] For example, as shown in B of FIG. 28, among the R pixel, B pixel, G pixel, and IR pixel, the IR pixel and the R pixel may be provided with a reflective film 63 or 141, and the B pixel and the G pixel may not be provided with a reflective film 63 or 141.

[0217] <19. Example of distance measurement module configuration> FIG. 29 is a block diagram showing an example of the configuration of a distance measuring module that outputs distance measurement information using the above-mentioned light receiving element 1.

[0218] The distance measurement module 500 includes a light emitting unit 511 , a light emitting control unit 512 , and a light receiving unit 513 .

[0219] The light emitting unit 511 has a light source that emits light of a predetermined wavelength, and emits irradiation light whose brightness periodically changes to irradiate an object. For example, the light emitting unit 511 has a light emitting diode that emits infrared light with a wavelength in the range of 780 nm to 1000 nm as a light source, and generates the irradiation light in synchronization with a light emission control signal CLKp of a rectangular wave supplied from the light emission control unit 512.

[0220] Note that the light emission control signal CLKp is not limited to a square wave as long as it is a periodic signal. For example, the light emission control signal CLKp may be a sine wave.

[0221] The light emission control unit 512 supplies a light emission control signal CLKp to the light emission unit 511 and the light receiving unit 513 to control the timing of irradiation of the irradiation light. The frequency of this light emission control signal CLKp is, for example, 20 megahertz (MHz). Note that the frequency of the light emission control signal CLKp is not limited to 20 MHz, and may be 5 MHz, 100 MHz, or the like.

[0222] The light receiving unit 513 receives light reflected from an object, calculates distance information for each pixel based on the light receiving result, and generates and outputs a depth image in which the depth value corresponding to the distance to the object (subject) is stored as a pixel value.

[0223] The light receiving unit 513 uses a light receiving element 1 having a pixel structure according to any one of the first to eighth configuration examples described above. For example, the light receiving element 1 serving as the light receiving unit 513 calculates distance information for each pixel from a detection signal corresponding to the charge distributed to the floating diffusion region FD1 or FD2 of each pixel 10 of the pixel array unit 21 based on the light emission control signal CLKp.

[0224] As described above, the light receiving element 1 having any of the pixel structures of the first to eighth configuration examples described above can be incorporated as the light receiving unit 513 of the distance measuring module 500 that obtains and outputs distance information to a subject by the indirect ToF method. This can improve the distance measuring characteristics of the distance measuring module 500.

[0225] <20. Examples of electronic device configurations> In addition to being applicable to the distance measurement module as described above, the light receiving element 1 can also be applied to various electronic devices such as imaging devices such as digital still cameras and digital video cameras with distance measurement functions, and smartphones with distance measurement functions.

[0226] FIG. 30 is a block diagram showing a configuration example of a smartphone as an electronic device to which the present technology is applied.

[0227] 30, the smartphone 601 includes a distance measuring module 602, an imaging device 603, a display 604, a speaker 605, a microphone 606, a communication module 607, a sensor unit 608, a touch panel 609, and a control unit 610, which are connected via a bus 611. In addition, the control unit 610 has functions as an application processing unit 621 and an operation system processing unit 622 by the CPU executing a program.

[0228] 29 is applied to the distance measurement module 602. For example, the distance measurement module 602 is disposed on the front surface of a smartphone 601, and by performing distance measurement on the user of the smartphone 601, the distance measurement module 602 can output depth values ​​of the surface shapes of the user's face, hands, fingers, and the like as distance measurement results.

[0229] The imaging device 603 is disposed on the front side of the smartphone 601, and captures an image of the user of the smartphone 601 as a subject, thereby obtaining an image of the user. Although not shown, the imaging device 603 may also be disposed on the back side of the smartphone 601.

[0230] The display 604 displays an operation screen for performing processing by the application processing unit 621 and the operation system processing unit 622, images captured by the imaging device 603, etc. The speaker 605 and the microphone 606 output the voice of the other party and pick up the voice of the user, for example, when making a call using the smartphone 601.

[0231] The communication module 607 performs network communication via a communication network such as the Internet, a public telephone line network, a wide area communication network for wireless mobile devices such as a so-called 4G line or 5G line, a Wide Area Network (WAN) or a Local Area Network (LAN), and short-range wireless communication such as Bluetooth (registered trademark) or NFC (Near Field Communication). The sensor unit 608 senses speed, acceleration, proximity, etc., and the touch panel 609 acquires a touch operation by a user on an operation screen displayed on the display 604.

[0232] The application processing unit 621 performs processing for providing various services by the smartphone 601. For example, the application processing unit 621 can perform processing for creating a computer-graphics-based face that virtually reproduces the user's facial expression based on the depth value supplied from the distance measurement module 602, and displaying the face on the display 604. In addition, the application processing unit 621 can perform processing for creating, for example, three-dimensional shape data of any stereoscopic object based on the depth value supplied from the distance measurement module 602.

[0233] The operation system processing unit 622 performs processing for realizing basic functions and operations of the smartphone 601. For example, the operation system processing unit 622 can perform processing for authenticating the face of the user and unlocking the smartphone 601 based on the depth value supplied from the distance measurement module 602. In addition, the operation system processing unit 622 can perform processing for recognizing, for example, a gesture of the user based on the depth value supplied from the distance measurement module 602 and inputting various operations according to the gesture.

[0234] In the smartphone 601 configured in this manner, by applying the above-mentioned ranging module 500 as the ranging module 602, it is possible to perform processes such as measuring and displaying the distance to a specified object, and creating and displaying three-dimensional shape data of the specified object.

[0235] <21. Application examples for mobile devices> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, etc.

[0236] FIG. 31 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0237] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 31, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053 are illustrated.

[0238] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0239] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0240] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0241] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0242] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0243] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0244] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0245] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0246] The audio / video output unit 12052 transmits at least one output signal of audio and video to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 31, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0247] FIG. 32 is a diagram showing an example of the installation position of the imaging unit 12031.

[0248] In FIG. 32, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.

[0249] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The images of the front acquired by the imaging units 12101 and 12105 are mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0250] 32 shows an example of the imaging ranges of the imaging units 12101 to 12104. An imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and an imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0251] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0252] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0253] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0254] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0255] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the vehicle outside information detection unit 12030 and the imaging unit 12031 among the above-described configurations. Specifically, the light receiving element 1 or the distance measuring module 500 can be applied to the distance detection processing block of the vehicle outside information detection unit 12030 and the imaging unit 12031. By applying the technology according to the present disclosure to the vehicle outside information detection unit 12030 and the imaging unit 12031, it is possible to measure the distance to an object such as a person, a car, an obstacle, a sign, or a character on a road surface with high accuracy, and it is possible to reduce the driver's fatigue and increase the safety of the driver and the vehicle using the obtained distance information.

[0256] The embodiments of the present technology are not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present technology.

[0257] Furthermore, in the above-described light receiving element 1, an example has been described in which electrons are used as signal carriers, but holes generated by photoelectric conversion may also be used as signal carriers.

[0258] For example, in the pixel 10 of the light receiving element 1 described above, it is possible to adopt a configuration in which all or part of each of the configuration examples are combined in any manner.

[0259] It should be noted that the effects described in this specification are merely examples and are not limiting, and there may be effects other than those described in this specification.

[0260] The present technology can have the following configurations. (1) a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; Equipped with An inter-pixel light shielding portion that blocks the infrared light is formed at the pixel boundary portion of the wiring layer. Photodetector. (2) The wiring layer includes one or more metal films, The inter-pixel light shielding portion is formed on the semiconductor layer side of the metal film that is closest to the semiconductor layer. The light receiving element according to (1) above. (3) The inter-pixel light shielding portion is formed in the same layer position as a gate contact that connects the gate of the transfer transistor and the metal film that is closest to the semiconductor layer. The light receiving element according to (2) above. (4) The inter-pixel light shielding portion is formed simultaneously with the gate contact. The light receiving element according to (3) above. (5) the wiring layer has a reflective film arranged so as to at least partially overlap the photodiode in a plan view; The inter-pixel light shielding portion is formed of the same material as the reflective film. The light receiving element according to any one of (1) to (4). (6) the wiring layer has a reflective film arranged so as to at least partially overlap the photodiode in a plan view; The inter-pixel light shielding portion is formed of a material different from that of the reflective film. The light receiving element according to any one of (1) to (4). (7) The inter-pixel light shielding portion is configured by arranging light shielding members at predetermined intervals on the boundary line of the pixels in a plan view. The light receiving element according to any one of (1) to (6). (8) The inter-pixel light shielding portion is configured by arranging linear light shielding members, which are long in the direction of the boundary line of the pixels in a plan view, at predetermined intervals on the boundary line. The light receiving element according to any one of (1) to (6). (9) The inter-pixel light shielding portion is configured by arranging a light shielding member on the boundary line of the pixel so as to surround the entire periphery of the pixel in a plan view. The light receiving element according to any one of (1) to (6). (10) On the back surface side of the semiconductor layer opposite to the surface on which the wiring layer is formed, an on-chip lens is formed for each pixel. The light receiving element according to any one of (1) to (9). (11) A moth-eye structure is formed on the back surface side of the semiconductor layer. The light receiving element according to (10) above. (12) Two transfer transistors, a first transfer transistor and a second transfer transistor, are formed in the semiconductor layer; the first transfer transistor transfers the charge generated in the photodiode to a first charge accumulation unit; The second transfer transistor transfers the charge generated in the photodiode to a second charge storage section. The light receiving element according to any one of (1) to (11). (13) The semiconductor layer further includes an inter-pixel isolation portion that is carved into the semiconductor layer at least partially in a depth direction in the pixel boundary portion. The light receiving element according to any one of (1) to (12). (14) A predetermined light emitting source; Photodetector and Equipped with The light receiving element is a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; Equipped with An inter-pixel light shielding portion that blocks the infrared light is formed at the pixel boundary portion of the wiring layer. Ranging module. (15) A predetermined light emitting source; Photodetector and Equipped with The light receiving element is a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; Equipped with An inter-pixel light shielding portion that blocks the infrared light is formed at the pixel boundary portion of the wiring layer. Distance Measurement Module An electronic device comprising: [Explanation of symbols]

[0261] 1 light receiving element, 10 pixel, 21 pixel array section, M1 first metal film, M2 second metal film, M3 third metal film, PD photodiode, 41 semiconductor substrate, 42 multilayer wiring layer, 44 boundary section (pixel boundary section), 45 inter-pixel light shielding film, 47 on-chip lens, 61 inter-pixel isolation section, 62 interlayer insulating film, 63 reflective film, 65 inter-pixel light shielding section, 66 gate contact, 67 metal wiring, 71 inter-pixel isolation section, 111 moth-eye structure section, 141 (141P, 141M) reflective film, 161 moth-eye structure section, 181 dummy contact, 500 ranging module, 511 light emitting section, 513 light receiving section, 601 smartphone

Claims

1. a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; an on-chip lens formed in pixel units on a back surface side of the semiconductor layer opposite to the surface on which the wiring layer is formed; Equipped with The wiring layer is One or more layers of metal film; an inter-pixel light shielding portion provided at a pixel boundary portion for shielding the infrared light; a reflective film arranged so as to overlap at least a portion of the photodiode in a plan view; having The reflective film is formed of a material having a reflectance at the infrared light lower than that of the metal film that is the layer closest to the semiconductor layer. Photodetector.

2. The inter-pixel light shielding portion is formed on the semiconductor layer side of the metal film of the layer closest to the semiconductor layer. The light receiving element according to claim 1 .

3. The inter-pixel light shielding portion is formed in the same layer position as a gate contact that connects the gate of the transfer transistor and the metal film in the layer closest to the semiconductor layer. The light receiving element according to claim 2 .

4. The inter-pixel light shielding portion is provided so as not to be connected to the semiconductor layer and the metal film of the layer closest to the semiconductor layer. The light receiving element according to claim 1 .

5. The inter-pixel light shielding portion is formed of the same material as the reflective film. The light receiving element according to claim 1 .

6. The inter-pixel light shielding portion is formed of a material different from that of the reflective film. The light receiving element according to claim 1 .

7. The inter-pixel light shielding portion is configured by arranging a plurality of light shielding members on the boundary line of the pixels in a plan view. The light receiving element according to claim 1 .

8. The inter-pixel light shielding portion is configured by arranging a plurality of linear light shielding members on the boundary line of the pixels, the linear light shielding members being long in the direction of the boundary line of the pixels in a plan view. The light receiving element according to claim 1 .

9. The inter-pixel light shielding portion is configured by arranging a light shielding member on the boundary line of the pixel so as to surround the entire periphery of the pixel in a plan view. The light receiving element according to claim 1 .

10. A moth-eye structure is formed on a connection surface between the semiconductor layer and the wiring layer. The light receiving element according to claim 1 .

11. A moth-eye structure is formed on the light incident surface of the semiconductor layer. The light receiving element according to claim 1 .

12. In the wiring layer, two transfer transistors, a first transfer transistor and a second transfer transistor, are formed for each pixel; the first transfer transistor transfers the charge generated in the photodiode to a first charge accumulation unit; The second transfer transistor transfers the charge generated in the photodiode to a second charge accumulation unit. The light receiving element according to claim 1 .

13. The semiconductor layer further includes an inter-pixel isolation portion that is carved into the semiconductor layer at least partially in a depth direction in the pixel boundary portion. The light receiving element according to claim 1 .

14. A predetermined light emitting source; Photodetector and Equipped with The light receiving element is a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; an on-chip lens formed in pixel units on a back surface side of the semiconductor layer opposite to the surface on which the wiring layer is formed; Equipped with The wiring layer is One or more layers of metal film; an inter-pixel light shielding portion provided at a pixel boundary portion for shielding the infrared light; a reflective film arranged so as to overlap at least a portion of the photodiode in a plan view; having The reflective film is formed of a material having a reflectance at the infrared light lower than that of the metal film that is the layer closest to the semiconductor layer. Ranging module.

15. A predetermined light emitting source; Photodetector and Equipped with The light receiving element is a semiconductor layer in which photodiodes for photoelectric conversion of infrared light are formed in pixel units; a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed; an on-chip lens formed in pixel units on a back surface side of the semiconductor layer opposite to the surface on which the wiring layer is formed; Equipped with The wiring layer is One or more layers of metal film; an inter-pixel light shielding portion provided at a pixel boundary portion for shielding the infrared light; a reflective film arranged so as to overlap at least a portion of the photodiode in a plan view; having The reflective film is formed of a material having a reflectance at the infrared light lower than that of the metal film that is the layer closest to the semiconductor layer. Distance Measuring Module An electronic device comprising:

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