Method for encoding video, electronic device, storage medium and computer program product

Abstract

A method for determining codewords for pixels in a transform skip mode coded block based on pixel remainders is provided. [Solution] The method includes: determining a pixel residual, a code of the residual, and an initial level value based on the pixel residual; determining a first codeword for a pixel in a transform skip mode coded block based on the pixel residual according to a predefined mapping relationship generated using a certain Rice parameter; fixing the value of the certain Rice parameter to a value based on the transform skip mode and determining a second codeword according to the code of the residual; determining a first set of codewords according to the initial level value; encoding the first codeword, the second codeword, and the first set of codewords into video data corresponding to the transform skip mode coded block; and inserting the video data into a bitstream.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Patent Application No. 62 / 905,342, filed Sep. 24, 2019, and entitled “Residual and Coefficients Coding for Video Coding,” which is incorporated herein by reference in its entirety. [Technical field]

[0002] This application relates generally to video data encoding and compression, and more specifically to methods and systems for improved residual and coefficient coding for video encoding. [Background technology]

[0003] Digital video is supported by a variety of electronic devices, such as digital televisions, laptop or desktop personal computers, tablet computers, digital cameras, digital recording devices, digital media players, video game consoles, smartphones, video teleconferencing devices, video streaming devices, etc. These electronic devices transmit, receive, encode, decode, and / or store digital video data by implementing video compression / decompression standards defined by MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 Part 10, Advanced Video Coding (AVC), High Efficiency Video Coding (HEVC), and Versatile Video Coding (VVC) standards. Video compression generally involves reducing or removing inherent redundancy in video data by performing spatial domain (intra-frame) prediction and / or temporal domain (inter-frame) prediction. For block-based video coding, a video frame is divided into one or more slices, each slice having multiple video blocks, which may also be referred to as coding tree units (CTUs). Each CTU may contain one coding unit (CU) or is recursively divided into smaller CUs until a predefined minimum CU size is reached. Each CU (also called leaf CU) contains one or more transform units (TUs), and each CU further contains one or more prediction units (PUs). Each CU may be coded based on an intra, inter or IBC mode. Video blocks in an intra-coded (I) slice of a video frame are encoded using spatial domain prediction with respect to reference samples in neighboring blocks in the same video frame. Video blocks in an inter-coded (P or B) slice of a video frame can use spatial domain prediction with respect to reference samples in neighboring blocks in the same video frame or temporal domain prediction with respect to reference samples in other previous and / or future reference video frames.

[0004] A prediction block of a current video block to be coded is generated by spatial or temporal domain prediction of a previously encoded reference block (e.g., a neighboring block). The process of finding the reference block may be completed by a block matching algorithm. Residual data indicating pixel differences between the current block to be coded and the prediction block is referred to as a residual block or a prediction error. Inter-coded blocks are encoded based on a motion vector that points to a reference block in a reference frame forming the prediction block and the residual block. The process of determining the motion vector is commonly referred to as motion estimation. Intra-coded blocks are encoded based on an intra prediction mode and the residual block. For further compression, the residual block may be transformed from the pixel domain to a transform domain (e.g., frequency domain) to generate residual transform coefficients, and then the residual transform coefficients may be quantized. The quantized transform coefficients, which are initially arranged in a two-dimensional array, may be scanned to generate a one-dimensional vector of transform coefficients, which are then entropy encoded into a video bitstream to achieve further compression.

[0005] The encoded video bitstream is then stored in a computer-readable storage medium (e.g., flash memory) so that it can be accessed by other electronic devices with digital video capabilities, or directly transmitted to the electronic devices by wire or wirelessly. The electronic devices then perform video decompression (which is the reverse process of video compression) by, for example, obtaining syntax elements from the encoded video bitstream by parsing the bitstream, and reconstructing the digital video data from the encoded video bitstream to its original format based at least in part on the syntax elements obtained from the bitstream, and displaying the reconstructed digital video data on the display of the electronic devices.

[0006] As digital video quality progresses from high definition to 4Kx2K to 8Kx4K, the amount of video data to be encoded / decoded increases exponentially. How to encode / decode the video data more efficiently while maintaining the image quality of the decoded video data is an ongoing challenge. Summary of the Invention [Problem to be solved by the invention]

[0007] Embodiments have been described herein that relate to encoding and decoding video data, and more specifically, to systems and methods for video encoding and decoding using palette mode. [Means for solving the problem]

[0008] According to a first aspect of the present application, a method for encoding video data includes: determining a residual for a pixel; determining a residual for the pixel, a sign of the residual, and an initial level value based on the residual; determining a first codeword for a pixel in a transform skip mode coded block based on the residual for the pixel according to a predefined mapping relationship, the first codeword being generated using a constant Rice parameter, the value of the constant Rice parameter being fixed to a value based on a transform skip mode; determining a second codeword for a pixel in the transform skip mode coded block according to a sign of the residual; determining a first set of codewords for a pixel in the transform skip mode coded block according to the initial level value; encoding the first codeword, the second codeword, and the first set of codewords into video data corresponding to the transform skip mode coded block; and inserting the video data corresponding to the transform skip mode coded block into a bitstream.

[0009] According to a second aspect of the present application, an electronic device includes one or more processing units, a memory coupled to the one or more processing units, and a number of programs stored in the memory, the programs, when executed by the one or more processing units, causing the electronic device to perform the method for decoding video data as described above.

[0010] According to a third aspect of the present application, a non-transitory computer readable storage medium stores a number of programs for execution by an electronic device having one or more processing units, the programs, when executed by the one or more processing units, causing the electronic device to perform the method for decoding video data as described above.

[0011] According to a fourth aspect of the present application, a computer program stored on a non-transitory computer-readable storage medium and executed by an electronic device having one or more processing units, when executed by the one or more processing units, causes the electronic device to perform the method of decoding video data as described above. [Brief description of the drawings]

[0012] The drawings are included to provide a further understanding of the embodiments, and are incorporated in and constitute a part of this specification, the drawings illustrating the described embodiments and together with the description serving to interpret basic principles. Like drawing symbols indicate corresponding parts. [Figure 1] FIG. 1 is a block diagram illustrating an example video encoding and decoding system in accordance with some embodiments of this disclosure. [Diagram 2] FIG. 2 is a block diagram illustrating an example video encoder according to some embodiments of this disclosure. [Diagram 3] FIG. 3 is a block diagram illustrating an example video decoder according to some embodiments of this disclosure. [Figure 4A]FIG. 4A is a block diagram illustrating how a frame is recursively divided into multiple video blocks of different sizes and shapes in accordance with some embodiments of this disclosure. [Figure 4B] FIG. 4B is a block diagram illustrating how a frame is recursively divided into multiple video blocks of different sizes and shapes in accordance with some embodiments of this disclosure. [Figure 4C] FIG. 4C is a block diagram illustrating how a frame is recursively divided into multiple video blocks of different sizes and shapes in accordance with some embodiments of this disclosure. [Figure 4D] FIG. 4D is a block diagram illustrating how a frame is recursively divided into multiple video blocks of different sizes and shapes in accordance with some embodiments of this disclosure. [Figure 4E] FIG. 4E is a block diagram illustrating how a frame is recursively divided into multiple video blocks of different sizes and shapes in accordance with some embodiments of this disclosure. [Figure 5A] FIG. 5A is a block diagram illustrating an example of transform high efficiency coding using context coding and bypass coding in accordance with some embodiments of the present disclosure. [Figure 5B] FIG. 5B is a block diagram illustrating an example of transform high efficiency coding using context coding and bypass coding in accordance with some embodiments of the present disclosure. [Figure 6] FIG. 6 is a block diagram illustrating an example process for dependent scalar quantization according to some embodiments of the present disclosure. [Figure 7] FIG. 7 is a block diagram illustrating an example state machine for switching between two different scalar quantizers in accordance with some embodiments of the present disclosure. [Figure 8] FIG. 8 is a flowchart illustrating an example process by which a video decoder performs residual coding on a transform skip mode coded block in accordance with some embodiments of this disclosure. [Figure 9]FIG. 9 is a block diagram illustrating an example context-adaptive binary arithmetic coding (CABAC) engine in accordance with some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the drawings. In the following detailed description, numerous non-limiting specific details are set forth in order to provide an understanding of the subject matter herein. However, it will be apparent to one skilled in the art that various alternatives can be used without departing from the scope of the claims, and that the subject matter can be practiced in the absence of these specific details. For example, it will be apparent to one skilled in the art that the subject matter herein can be implemented in various types of electronic devices having digital video capabilities.

[0014] Figure 1 is a block diagram illustrating an example system 10 for simultaneously encoding and decoding video blocks in accordance with some embodiments of the present disclosure. As shown in Figure 1, system 10 includes a source device 12 that generates and encodes video data that is subsequently decoded by a destination device 14. Source device 12 and destination device 14 may include any one of several types of electronic devices, including desktop or laptop computers, tablet computers, smartphones, set-top boxes, digital televisions, cameras, displays, digital media players, video game consoles, video streaming devices, etc. In some embodiments, source device 12 and destination device 14 are equipped with wireless communication capabilities.

[0015] In some embodiments, the destination device 14 can receive the encoded video data to be decoded via a link 16. The link 16 can include any type of communication medium or equipment capable of moving the encoded video data from the source device 12 to the destination device 14. In one example, the link 16 can include a communication medium, which allows the source device 12 to transmit the encoded video data directly to the destination device 14 in real time. The encoded video data can be modulated based on a communication standard, such as a wireless communication protocol, and transmitted to the destination device 14. The communication medium can include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network (e.g., a local area network, a wide area network, or a global network, such as the Internet). The communication medium can include routers, switches, base stations, or any other equipment useful for facilitating communication from the source device 12 to the destination device 14.

[0016] In some other embodiments, the encoded video data can be transmitted from the output interface 22 to the storage device 32. The destination device 14 can then access the encoded video data in the storage device 32 via the input interface 28. The storage device 32 can include any one of a variety of distributed or locally accessed data storage media, such as a hard disk drive, a Blu-ray disc, a DVD, a CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing the encoded video data. In a further example, the storage device 32 can correspond to a file server or other temporary storage device capable of storing the encoded video data generated by the source device 12. The destination device 14 can access the video data stored in the storage device 32 by streaming or downloading. The file server can be any type of computer capable of storing the encoded video data and transmitting the encoded video data to the destination device 14. Exemplary file servers include a web server (e.g., used for websites), an FTP server, a network attached storage (NAS) device, or a local disk drive. The destination device 14 can access the encoded video data over any standard data connection, including a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., DSL, cable modem, etc.), or a combination of both, suitable for accessing the encoded video data stored on a file server. The transmission of the encoded video data from the storage device 32 may be a streaming transmission, a download transmission, or a combination of both.

[0017] 1, source device 12 includes a video source 18, a video encoder 20, and an output interface 22. Video source 18 may include sources such as a video capture device (e.g., a video camera), a video file containing previously captured video, a video supply interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as the source video, or a combination of these sources. As an example, if video source 18 is a video camera in a security surveillance system, source device 12 and destination device 14 may form a camera phone or a video phone. However, the embodiments described herein are applicable to video encoding in general, and may be applicable to wireless and / or wired applications.

[0018] The captured, pre-captured, or computer-generated video may be encoded by video encoder 20. The encoded video data may be transmitted directly to destination device 14 via output interface 22 of source device 12. The encoded video data may (or alternatively) be stored in storage device 32 for subsequent access by destination device 14 or other devices or for use in decoding and / or playback. Output interface 22 may further include a modem and / or a transmission device.

[0019] Destination device 14 includes an input interface 28, a video decoder 30, and a display device 34. Input interface 28 may include a receiver and / or modem to receive encoded video data over link 16. The encoded video data transmitted over link 16 or provided in storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included in the encoded video data transmitted over a communications medium, stored on a storage medium, or stored on a file server.

[0020] In some embodiments, destination device 14 may include a display device 34, which may be an integrated display device or an external display device configured to communicate with destination device 14. Display device 34 displays the decoded video data to a user and may include any one of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or other types of display devices.

[0021] Video encoder 20 and video decoder 30 may operate based on proprietary or industry standards (e.g., VVC, HEVC, MPEG-4 Part 10, Advanced Video Coding (AVC), or extensions of such standards). As will be appreciated, the present application is not limited to a particular video encoding / decoding standard and may apply to other video encoding / decoding standards. As will be generally understood, video encoder 20 of source device 12 may be configured to encode video data based on any one of these current or future standards. Similarly, as will be generally understood, video decoder 30 of destination device 14 may be configured to decode video data based on any one of these current or future standards.

[0022] Both the video encoder 20 and the video decoder 30 can be implemented as any one of several types of suitable encoder circuit systems, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When implemented partially in software, the electronic device can store instructions of the software on a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the video encoding / decoding operations disclosed in this disclosure. Each of the video encoder 20 and the video decoder 30 can be included in one or more encoders or decoders, or any one of the encoders or decoders can be integrated as part of a composite encoder / decoder (CODEC) in a corresponding device.

[0023] 2 is a block diagram illustrating an example video encoder 20 according to some embodiments described herein. Video encoder 20 can perform intra- and inter-predictive coding of video blocks within video frames. Intra-predictive coding relies on spatial domain prediction to reduce or remove spatial domain redundancy in video data within a given video frame or picture. Inter-predictive coding relies on temporal domain prediction to reduce or remove temporal domain redundancy in video data within adjacent video frames or pictures of a video sequence.

[0024] As shown in FIG. 2, the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoding picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy encoding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a partition unit 45, an intra prediction processing unit 46, and an intra block copy (BC) unit 48. In some embodiments, the video encoder 20 further includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for reconstructing video blocks. A deblocking filter (not shown) may be located between the adder 62 and the DPB 64 to filter block boundaries and remove blocky artifacts from the reconstructed video. In addition to the deblocking filter, a loop filter (not shown) may be further used to filter the output of the adder 62. Video encoder 20 may take the form of a fixed or programmable hardware unit, or may be divided into one or more of the fixed or programmable hardware units shown.

[0025] Video data memory 40 may store video data encoded by components of video encoder 20. The video data in video data memory 40 may be obtained, for example, from video source 18. DPB 64 is a buffer that stores reference video data used in encoding video data by video encoder 20 (e.g., in intra- or inter-predictive coding modes). Video data memory 40 and DPB 64 may be formed by any one of several types of memory devices. In each example, video data memory 40 may be located on-chip with other components of video encoder 20 or off-chip relative to those components.

[0026] As shown in FIG. 2, after receiving the video data, partition unit 45 in prediction processing unit 41 divides the video data into video blocks. The division may further include dividing the video frame into slices, tiles, or other larger coding units (CUs) based on a predefined division structure, such as a quadtree structure, associated with the video data. The video frame may be divided into a number of video blocks (also referred to as a group of video blocks of a tile). Prediction processing unit 41 may select one of a number of possible predictive coding modes, such as one of a number of intra-predictive coding modes or one of a number of inter-predictive coding modes, for the current video block based on the error result (e.g., the code rate and the distortion level). Prediction processing unit 41 may provide the obtained intra- or inter-predictive coding block to adder 50 to generate a residual block, and to adder 62 to reconstruct the block to be encoded and subsequently use it as part of the reference frame. Prediction processing unit 41 further provides syntax elements, such as motion vectors, intra-mode indicators, partition information, and other such syntax information, to entropy encoding unit 56.

[0027] To select an appropriate intra-prediction coding mode for a current video block, intra-prediction processing unit 46 within prediction processing unit 41 may perform intra-prediction coding of the current video block relative to one or more neighboring blocks located in the same frame as the current block to be coded to provide a spatial domain prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 perform inter-prediction coding of the current video block relative to one or more predictive blocks in one or more reference frames to provide a temporal domain prediction. Video encoder 20 may perform multiple rounds of encoding to select an appropriate coding mode for each block of video data, for example.

[0028] In some embodiments, motion estimation unit 42 determines the inter-prediction mode of the current video frame by generating a motion vector, which indicates the displacement of a prediction unit (PU) of a video block in a current video frame relative to a predictive block in a reference video frame based on a predetermined pattern in a video frame sequence. Motion estimation performed by motion estimation unit 42 is a process of generating a motion vector, which estimates the motion of a video block. For example, the motion vector may indicate the displacement of a PU of a video block in a current video frame or picture relative to a predictive block (or other coding unit) in a reference frame relative to a current block (or other coding unit) to be coded in the current frame. The predetermined pattern may designate a video frame in the sequence as a P frame or a B frame. Intra BC unit 48 may determine vectors (e.g., block vectors) for intra BC coding in a manner similar to the manner in which motion estimation unit 42 determines motion vectors for inter prediction, or may utilize motion estimation unit 42 to determine block vectors.

[0029] The prediction block is a block of the reference frame that is assumed to closely match the PU of the video block to be coded with pixel differences, which may be determined by sum of absolute differences (SAD), sum of squared differences (SSD), or other difference measures. In some embodiments, video encoder 20 may calculate values ​​for sub-integer pixel locations of the reference frame that are stored in DPB 64. For example, video encoder 20 may interpolate values ​​for quarter pixel locations, eighth pixel locations, or other fractional pixel locations of the reference frame. Thus, motion estimation unit 42 may perform motion searches for full pixel locations and fractional pixel locations and output motion vectors with fractional pixel accuracy.

[0030] Motion estimation unit 42 calculates a motion vector of a PU of a video block in an inter-predictive coded frame by comparing the position of the PU with the position of a predictive block of a reference frame selected from a first reference frame list (List 0) or a second reference frame list (List 1), which respectively identify one or more reference frames in DPB 64. Motion estimation unit 42 sends the calculated motion vector to motion compensation unit 44 and then to entropy encoding unit 56.

[0031] The motion compensation performed by motion compensation unit 44 may involve retrieving or generating a predictive block based on the motion vector determined by motion estimation unit 42. After receiving the motion vector of the PU of the current video block, motion compensation unit 44 may locate the predictive block pointed to by the motion vector in one of the reference frame lists, retrieve the predictive block from DPB 64, and forward the predictive block to summer 50. Summer 50 then forms a residual video block of pixel difference values ​​by subtracting pixel values ​​of the predictive block provided by motion compensation unit 44 from pixel values ​​of the current video block being encoded. The pixel difference values ​​forming the residual video block may include luma, chroma difference components, or both. Motion compensation unit 44 may further generate syntax elements associated with the video blocks of the video frame for use by video decoder 30 in decoding the video blocks of the video frame. The syntax elements may include, for example, syntax elements defining a motion vector for identifying the predictive block, any identifier indicating a prediction mode, or any other syntax information described herein. Motion estimation unit 42 and motion compensation unit 44 may be highly integrated, but for conceptual purposes are described independently.

[0032] In some embodiments, the intra BC unit 48 may generate a vector to retrieve a prediction block in a manner similar to that described above with reference to the motion estimation unit 42 and the motion compensation unit 44, except that the prediction block and the current block being encoded are located in the same frame, and the vector is referred to as a block vector rather than a motion vector. Specifically, the intra BC unit 48 may determine an intra prediction mode for encoding the current block. In some examples, the intra BC unit 48 may encode the current block using various intra prediction modes, testing their performance, for example, by rate-distortion analysis in independent iterative encoding periods. The intra BC unit 48 then selects a suitable intra prediction mode from the various tested intra prediction modes using the intra mode indicator, and correspondingly generates an intra mode indicator. For example, the intra BC unit 48 may use the rate-distortion analysis for the various tested intra prediction modes to calculate a rate-distortion value, and selects an intra prediction mode having optimal rate-distortion characteristics from the tested modes as the suitable intra prediction mode for use. A rate-distortion analysis typically determines the amount of distortion (or error) between an encoded block and an original unencoded block that is encoded to generate a coded block, and then determines the bitrate (i.e., number of bits) for generating the coded block. Intra BC unit 48 calculates ratios based on the distortions and rates of the various encoded blocks to determine which intra prediction mode represents the optimal rate-distortion value for the block.

[0033] In other examples, intra BC unit 48 may use, in whole or in part, motion estimation unit 42 and motion compensation unit 44 to perform such functions for intra BC prediction according to embodiments described herein. In either case, for intra block copying, the predictive block may be a block that is deemed to closely match the block to be encoded in terms of pixel differences, which may be determined by sum of absolute differences (SAD), sum of squared differences (SSD), or other difference measures, and identification of the predictive block may include calculation of values ​​at sub-integer pixel positions.

[0034] Regardless of whether the predictive block is from the same frame via intra prediction or a different frame via inter prediction, video encoder 20 may form pixel differences by subtracting pixel values ​​of the predictive block from pixel values ​​of the current video block being encoded to form a residual video block. The pixel differences that form the residual video block may include both luma and chroma component differences.

[0035] Intra-prediction processing unit 46 may perform intra prediction on the current video block, as an alternative to inter prediction performed by motion estimation unit 42 and motion compensation unit 44 or intra block copy prediction performed by intra BC unit 48, as described above. In particular, intra-prediction processing unit 46 may determine an intra-prediction mode for encoding the current block. To this end, intra-prediction processing unit 46 may encode the current block using various intra-prediction modes, e.g., during an independent iterative encoding period, intra-prediction processing unit 46 (or, in some instances, a mode selection unit) may select and use an appropriate intra-prediction mode from the tested intra-prediction modes. Intra-prediction processing unit 46 may provide information indicative of the selected intra-prediction mode for the block to entropy encoding unit 56. Entropy encoding unit 56 may encode the information indicative of the selected intra-prediction mode in the bitstream.

[0036] After prediction processing unit 41 determines a predictive block for the current video block, via inter-prediction or intra-prediction, adder 50 forms a residual video block by subtracting the predictive block from the current video block. The residual video data in the residual block may be provided to transform processing unit 52 in one or more transform units (TUs), which convert the residual video data into residual transform coefficients using a transform such as a discrete cosine transform (DCT) or a conceptually similar transform.

[0037] The transform processing unit 52 may send the obtained transform coefficients to a quantization unit 54. The quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process may further reduce the bit depth associated with some or all of the coefficients. The degree of quantization may be modified by adjusting a quantization parameter. In some examples, the quantization unit 54 may then perform a scan on a matrix containing the quantized transform coefficients. Alternatively, the entropy encoding unit 56 may perform the scan.

[0038] After quantization, entropy encoding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context-adaptive variable length coding (CAVLC), context-adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioned entropy (PIPE) coding, or other entropy coding method or technique. The encoded bitstream may then be transmitted to video decoder 30 or may be stored in storage 32 and subsequently transmitted to or retrieved by video decoder 30. Entropy encoding unit 56 may also perform entropy encoding on motion vectors and other syntax elements of the current video frame being encoded.

[0039] Inverse quantization unit 58 and inverse transform processing unit 60 reconstruct residual video blocks in the pixel fields by inverse quantization and inverse transformation, respectively, to generate reference blocks for predicting other video blocks. As mentioned above, motion compensation unit 44 may generate motion-compensated prediction blocks based on one or more reference blocks of frames stored in DPB 64. Motion compensation unit 44 may further apply one or more interpolation filters to the prediction blocks to calculate sub-integer pixel values ​​for motion estimation.

[0040] Summer 62 adds the reconstructed residual block and the motion compensated prediction block produced by motion compensation unit 44 to generate a reference block that is stored in DPB 64. The reference block may then be used as a prediction block by intra BC unit 48, motion estimation unit 42, and motion compensation unit 44 to perform inter prediction on other video blocks in subsequent video frames.

[0041] 3 is a block diagram illustrating an example video decoder 30 according to some embodiments of the present application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-prediction processing unit 84, and an intra-BC unit 85. The video decoder 30 may perform a decoding process that is generally the reverse of the encoding process described above for the video encoder 20 in FIG. 2. For example, the motion compensation unit 82 may generate prediction data based on a motion vector received from the entropy decoding unit 80, while the intra-prediction unit 84 may generate prediction data based on an intra-prediction mode indicator received from the entropy decoding unit 80.

[0042] In some examples, units of the video decoder 30 may be assigned the task of performing embodiments of the present disclosure. Also, in some examples, embodiments of the present disclosure may be divided among one or more units of the video decoder 30. For example, the intra BC unit 85 may perform embodiments of the present disclosure independently or in combination with other units of the video decoder 30 (e.g., the motion compensation unit 82, the intra prediction processing unit 84, and the entropy decoding unit 80). In some examples, the video decoder 30 may not include the intra BC unit 85, and the functionality of the intra BC unit 85 may be performed by other components of the prediction processing unit 81 (e.g., the motion compensation unit 82).

[0043] The video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of the video decoder 30. The video data stored in the video data memory 79 may be obtained from, for example, the storage device 32, a local video source (e.g., a camera), via a wired or wireless network, or by accessing a physical data storage medium (e.g., a flash memory drive or a hard disk). The video data memory 79 may include a coding picture buffer (CPB) that stores encoded video data from the encoded video bitstream. A decoding picture buffer (DPB) 92 of the video decoder 30 stores reference video data for use by the video decoder 30 in decoding the video data (e.g., based on an intra- or inter-prediction coding mode). The video data memory 79 and the DPB 92 may be formed by any one of several types of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of storage devices. For purposes of illustration, video data memory 79 and DPB 92 are depicted in FIG. 3 as two separate components of video decoder 30. However, it will be apparent to one skilled in the art that video data memory 79 and DPB 92 may be provided by the same memory device or separate memory devices. In some examples, video data memory 79 may be located on-chip with other components of video decoder 30 or off-chip relative to those components.

[0044] During the decoding process, video decoder 30 receives an encoded video bitstream, which indicates video blocks of encoded video frames and associated syntax elements. Video decoder 30 may receive the syntax elements at the video frame level and / or the video block level. Entropy decoding unit 80 of video decoder 30 performs entropy decoding on the bitstream to generate quantized coefficients, motion vectors, or intra-prediction mode indicators, and other syntax elements. Entropy decoding unit 80 then forwards the motion vectors and other syntax elements to prediction processing unit 81.

[0045] If a video frame is encoded as an intra-prediction coded (I) frame or is used for intra-coded predictive blocks in other types of frames, intra-prediction processing unit 84 of prediction processing unit 81 can generate predictive data for video blocks of the current video frame based on the intra-prediction mode transmitted by signaling and reference data from previously decoded blocks of the current frame.

[0046] If the video frame is encoded as an inter-predictive (i.e., B or P) frame, motion compensation unit 82 of prediction processing unit 81 generates one or more prediction blocks for the video blocks of the current video frame based on the motion vectors and other syntax elements received from entropy decoding unit 80. Each of the prediction blocks may be generated based on a reference frame in one of the reference frame lists. Video decoder 30 may construct the reference frame lists, List 0 and List 1, based on the reference frames stored in DPB 92 using a default construction technique.

[0047] In some examples, when encoding a video block based on the intra BC modes described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block of the current video block based on the block vectors and other syntax elements received from entropy decoding unit 80. The prediction block may be located within the same reconstruction region of the picture as the current video block as defined by video encoder 20.

[0048] Motion compensation unit 82 and / or intra BC unit 85 determine prediction information for video blocks of a current video frame by analyzing the motion vectors and other syntax elements, and then use the prediction information to generate predictive blocks for the current video block being decoded. For example, motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra or inter prediction) for encoding video blocks of a video frame, an inter prediction frame type (e.g., B or P), construction information for one or more reference frame lists for the frame, a motion vector for each inter predictive encoded video block of the frame, an inter prediction state for each inter predictive encoded video block of the frame, and other information for decoding video blocks in the current video frame.

[0049] Similarly, intra BC unit 85 may use some of the received syntax elements (e.g., identifiers) to determine that the current video block is predicted using an intra BC mode, which construction information of the video blocks of the frame are located within the reconstruction domain and should be stored in DPB 92, block vectors of each intra BC predicted video block of the frame, intra BC prediction states of each intra BC predicted video block of the frame, and other information for decoding video blocks in the current video frame.

[0050] Motion compensation unit 82 may further perform interpolation using an interpolation filter, such as that used by video encoder 20 during encoding of the video block, to calculate interpolated values ​​for the sub-integer pixels of the reference block. In this case, motion compensation unit 82 may determine the interpolation filter used by video encoder 20 based on the received syntax element, and use the interpolation filter to generate the predictive block.

[0051] Inverse quantization unit 86 inverse quantizes the quantized transform coefficients provided in the bitstream and entropy decoded by entropy decoding unit 80 using the same quantization parameters calculated by video encoder 20 for each video block in a video frame to determine the degree of quantization. Inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients to reconstruct residual blocks in the pixel field.

[0052] After motion compensation unit 82 or intra BC unit 85 generates a prediction block for the current video block based on the vectors and other syntax elements, summer 90 reconstructs a decoded video block of the current video block by summing the residual block from inverse transform processing unit 88 with the corresponding prediction block generated by motion compensation unit 82 and intra BC unit 85. A loop filter (not shown) may be located between summer 90 and DPB 92 to further process the decoded video block. The decoded video blocks in a frame are provided for storage in DPB 92, which stores reference frames used for subsequent motion compensation of the next video block. DPB 92 or a memory device separate from DPB 92 may store the decoded video for subsequent display on a display device (e.g., display device 34 in FIG. 1).

[0053] In a typical video coding process, a video sequence generally includes a set of regular frames or pictures. Each frame may include three sample arrays, denoted as SL, SCb, and SCr. SL is a two-dimensional array of luma samples. SCb is a two-dimensional array of Cb chroma samples. SCr is a two-dimensional array of Cr chroma samples. In another example, a frame may be monochromatic and thus includes only one two-dimensional luma sample array.

[0054] As shown in FIG. 4A, video encoder 20 (or, more specifically, partition unit 45) first divides a frame into a set of coding tree units (CTUs) to generate an encoded representation of the frame. A video frame may include an integer number of CTUs, which are arranged consecutively according to a raster scan order from left to right and top to bottom. Each CTU is the largest logical coding unit, and the width and height of the CTU are signaled by video encoder 20 in a sequence parameter set, which causes all CTUs in a video sequence to have the same dimensions, i.e., 128×128, 64×64, 32×32, and 16×16. However, as noted, the present application is not limited to any particular dimensions. As shown in FIG. 4B, each CTU may include one coding tree block (CTB) of luma samples, two corresponding coding tree blocks of chroma samples, and syntax elements for encoding the samples of the coding tree blocks. The syntax elements describe the attributes of different types of encoded pixel block units and how to reconstruct the video sequence at video decoder 30, including inter or intra prediction, intra prediction mode, motion vectors, and other parameters. For a monochrome picture or a picture with three independent color planes, a CTU may include a single coding tree block and syntax elements for encoding samples of the coding tree block. The coding tree block may be an NxN block of samples.

[0055] To achieve better performance, video encoder 20 may recursively perform tree partitioning, such as binary tree partitioning, ternary tree partitioning, quad tree partitioning, or a combination of both, on the coding tree block of the CTU, and partition the CTU into smaller coding units (CUs). As shown in FIG. 4C, first, 64x64 CTU 400 is partitioned into four smaller CUs, each of which has a block size of 32x32. Among the four smaller CUs, CU 410 and CU 420 are each partitioned into four 16x16 CUs based on the block size. Each of two 16x16 CUs 430 and 440 is further partitioned into four 8x8 CUs based on the block size. FIG. 4D shows a quad tree data structure, which shows the final result of the partitioning process of CTU 400 shown in FIG. 4C, and each leaf node of the quad tree corresponds to one CU in a corresponding size range from 32x32 to 8x8. As the CTU shown in FIG. 4B, each CU may include a coding block (CB) of luma samples, two corresponding coding blocks of chroma samples of a frame having the same dimensions, and syntax elements for coding the samples of the coding block. In a monochrome picture or a picture with three independent color planes, the CU may include a single coding block and syntax structures for coding the samples of the coding block. It is noted that the quadtree partitioning shown in FIG. 4C and FIG. 4D is for illustration only, and one CTU can be divided into CUs to accommodate different local characteristics by quadtree / ternary / binary tree partitioning. In a multi-type tree structure, one CTU is divided based on a quadtree structure, and the leaf CUs of each quadtree may be further divided based on binary and ternary tree structures. As shown in FIG. 4E, there are five partition types, namely, quadtree partitioning, horizontal binary partitioning, vertical binary partitioning, horizontal ternary partitioning, and vertical ternary partitioning.

[0056] In some embodiments, video encoder 20 may further divide the coding block of a CU into one or more MxN prediction blocks (PBs). A prediction block is a rectangular (square or non-square) sample block, in which the same inter or intra prediction is applied. A prediction unit (PU) of a CU may include a prediction block of luma samples, two corresponding prediction blocks of chroma samples, and syntax elements for predicting the prediction block. In a monochrome picture or a picture with three independent color planes, a PU may include a single prediction block and syntax structures for predicting the prediction block. Video encoder 20 may generate predicted luma, Cb, and Cr blocks for the luma, Cb, and Cr prediction blocks of each PU of a CU.

[0057] Video encoder 20 may generate a predictive block of a PU by intra prediction or inter prediction. When video encoder 20 generates a predictive block of a PU by intra prediction, video encoder 20 may generate a predictive block of the PU based on decoded samples of a frame associated with the PU. When video encoder 20 generates a predictive block of a PU by inter prediction, video encoder 20 may generate a predictive block of the PU based on decoded samples of one or more frames other than the frame associated with the PU.

[0058] After video encoder 20 generates the predicted luma, Cb, and Cr blocks for one or more PUs of a CU, video encoder 20 may generate a luma residual block for the CU by subtracting the predicted luma block of the CU from its original luma coding block, such that each sample in the luma residual block of the CU indicates a difference between a luma sample in one of the predicted luma blocks of the CU and a corresponding sample in the original luma coding block of the CU. Similarly, video encoder 20 may generate a Cb residual block and a Cr residual block for the CU, such that each sample in the Cb residual block of the CU indicates a difference between a Cb sample in one of the predicted Cb blocks of the CU and a corresponding sample in the original Cb coding block of the CU, and each sample in the Cr residual block of the CU may indicate a difference between a Cr sample in one of the predicted Cr blocks of the CU and a corresponding sample in the original Cr coding block of the CU.

[0059] Also, as shown in FIG. 4C, video encoder 20 may decompose the luma, Cb, and Cr residual blocks of a CU into one or more luma, Cb, and Cr transform blocks by quadtree partitioning. A transform block is a rectangular (square or non-square) block of samples to which the same transform is applied. A transform unit (TU) of a CU may include a transform block of luma samples, two corresponding transform blocks of chroma samples, and syntax elements for transforming the transform block samples. Thus, each TU of a CU may be associated with a luma transform block, a Cb transform block, and a Cr transform block. In some examples, the luma transform block associated with a TU may be a sub-block of the luma residual block of the CU. The Cb transform block may be a sub-block of the Cb residual block of the CU. The Cr transform block may be a sub-block of the Cr residual block of the CU. In a monochrome picture or a picture with three independent color planes, a TU may include a single transform block and a syntax structure of samples for transforming the transform block.

[0060] Video encoder 20 may apply one or more transforms to a luma transform block of the TU to generate a luma coefficient block for the TU. The coefficient block may be a two-dimensional array of transform coefficients. The transform coefficients may be scalars. Video encoder 20 may apply one or more transforms to a Cb transform block of the TU to generate a Cb coefficient block for the TU. Video encoder 20 may apply one or more transforms to a Cr transform block of the TU to generate a Cr coefficient block for the TU.

[0061] After generating a coefficient block (e.g., a luma coefficient block, a Cb coefficient block, or a Cr coefficient block), the video encoder 20 may quantize the coefficient block. Quantization generally refers to a process of quantizing transform coefficients to potentially reduce the amount of data to represent the transform coefficients, thereby providing further compression. After the video encoder 20 quantizes the coefficient block, the video encoder 20 may perform entropy encoding on the syntax elements representing the quantized transform coefficients. For example, the video encoder 20 may perform context-adaptive binary arithmetic coding (CABAC) on the syntax elements representing the quantized transform coefficients. Finally, the video encoder 20 may output a bitstream including a bit sequence that forms a representation of the encoded frame and associated data, which may be stored in a storage device 32 or transmitted to a destination device 14.

[0062] After receiving the bitstream generated by video encoder 20, video decoder 30 may parse the bitstream to obtain syntax elements from the bitstream. Video decoder 30 may reconstruct frames of video data based at least in part on the syntax elements obtained from the bitstream. The reconstruction process of the video data is generally the reverse of the encoding process performed by video encoder 20. For example, video decoder 30 may perform an inverse transform on coefficient blocks associated with a TU of a current CU, thereby reconstructing residual blocks associated with a TU of the current CU. Video decoder 30 may further reconstruct coding blocks of a current CU by adding samples of predictive blocks of PUs of the current CU and corresponding samples of transform blocks of TUs of the current CU. After reconstructing coding blocks for each CU of a frame, video decoder 30 may reconstruct the frame.

[0063] As mentioned above, video coding mainly uses two types of modes to achieve video compression: intra prediction and inter prediction. Palette-based coding is another coding scheme adopted by many video coding standards. In palette-based coding, which may be particularly suitable for coding screen-generated content, a video codec (e.g., video encoder 20 or video decoder 30) forms a palette table of colors, which represents a given block of video data. The palette table contains the most dominant (e.g., frequently used) pixel values ​​in a given block. Pixel values ​​that are not frequently displayed in a given block of video data are either not included in the palette table or are included in the palette table and are called escape colors.

[0064] Each entry in the palette table contains an index of the corresponding pixel value in the palette table. The palette index for the samples in the block can be encoded to indicate which entry in the palette table is used to predict or reconstruct which sample. The palette mode starts with the first block of a picture, slice, tile, or other such grouping of video blocks generating a palette predictor. As will be understood below, the palette predictor used for subsequent video blocks is generally generated by updating the previously used palette predictor. For the purposes of explanation, it is assumed that the palette predictor is defined at the picture level. That is, a picture may contain multiple coding blocks, each of which has its own palette table, but the entire picture has only one palette predictor.

[0065] To reduce the bits required to transmit palette entries by signaling in the video bitstream, the video decoder can utilize a palette predictor to determine new palette entries for reconstructing video blocks in a palette table. For example, the palette predictor may include palette entries from a previously used palette table, or may even initialize the palette predictor using a recently used palette table by including all entries of the most recently used palette table. In some embodiments, the palette predictor may include less than all entries of the most recently used palette table, and then combine some entries from other previously used palette tables. The palette predictor may have the same dimensions as the palette tables for encoding different blocks, or may be larger than the palette tables for encoding different blocks, or may be smaller than the palette tables for encoding different blocks. In one example, the palette predictor is implemented as a first-in-first-out (FIFO) table containing 64 palette entries.

[0066] To generate a palette table for the video data block based on the palette predictor, the video decoder may receive a one-bit identifier for each entry of the palette predictor from the encoded video bitstream. The one-bit identifier may have a first value (e.g., a binary 1) indicating that an associated entry of the palette predictor is included in the palette table, or a second value (e.g., a binary 0) indicating that an associated entry of the palette predictor is not included in the palette table. If the dimensions of the palette predictor are larger than the palette table used for the video data block, the video decoder may stop receiving more identifiers when a maximum dimension of the palette table is reached.

[0067] In some embodiments, some entries in the palette table may be directly signaled in the encoded video bitstream rather than being determined using a palette predictor. For such entries, the video decoder may receive three separate m-bit values ​​from the encoded video bitstream, which indicate the pixel values ​​of the luma and two chroma components associated with the entry, where m indicates the bit depth of the video data. Compared to the multiple m-bit values ​​required to directly signal the palette entries, those palette entries derived from the palette predictor require only a one-bit identifier. Thus, by signaling some or all palette entries using the palette predictor, the number of bits required to signal a new palette table entry may be significantly reduced, thereby improving the overall coding efficiency of encoding in palette mode.

[0068] In many cases, the palette predictor for a block is determined based on a palette table for coding one or more previously encoded blocks. However, when coding the first coding tree unit in a picture, slice, or tile, the palette table of the previously encoded block may be unavailable. Thus, it is not possible to generate the palette predictor using the entries of the previously used palette table. In such cases, a sequence of palette predictor initialization values ​​may be signaled in a sequence parameter set (SPS) and / or a picture parameter set (PPS), which are values ​​for generating the palette predictor when the previously used palette table is unavailable. The SPS generally refers to a syntax structure of syntax elements applied to a sequence of video pictures that are encoded consecutively (referred to as a coded video sequence (CVS)), and is determined by the contents of syntax elements found in a PPS pointed to by syntax elements found in each slice segment header. The PPS generally refers to a syntax structure of syntax elements applied to one or more individual pictures in a CVS, and is determined by syntax elements found in each slice segment header. Thus, an SPS is generally considered to be a higher level syntax structure than a PPS, which means that the syntax elements contained in an SPS generally change less frequently and apply to a larger portion of the video data than the syntax elements contained in a PPS.

[0069] 5A-5B are block diagrams illustrating examples of transform coefficient coding using context coding and bypass coding in accordance with some embodiments of the present disclosure.

[0070] The coding of transform coefficients in VVC is similar to that in HEVC because they both use non-overlapping coefficient groups (also called CGs or sub-blocks). However, there are some differences between the two schemes. In HEVC, the size of each CG of a coefficient is fixed to 4x4. In VVC Draft6, the CG size becomes dependent on the TB size. Therefore, various CG sizes (1x16, 2x8, 8x2, 2x4, 4x2, and 16x1) can be used in VVC. The CGs in a coding block and the transform coefficients in a CG are encoded according to a predefined scan order.

[0071] In order to limit the maximum number of context coding bins (CCBs) for each pixel, the area of ​​the TB and the type of video components (i.e., luma and chroma) are used to derive the maximum number of context coding bins (CCBs) for the TB. In some embodiments, the maximum number of context coding bins is equal to TB_zosize*1.75, where TB_zosize indicates the number of samples in the TB after zero resetting the coefficients. Note that coded_sub_block_flag is an identifier indicating whether the CG contains a non-zero coefficient, and the identifier is not taken into account when counting the CCBs.

[0072] A coefficient zero reset is an operation that is performed on a transform block to forcibly set coefficients located within a particular region of the transform block as zero. For example, currently in VVC, a 64x64TB has an associated zero reset operation. As a result, all transform coefficients located outside the top-left 32x32 region of the 64x64TB are forced to zero. In fact, currently in VVC, for any transform block whose size along a dimension exceeds 32, a coefficient zero reset operation is performed along that dimension to forcibly set coefficients located outside the top-left 32x32 region to zero.

[0073] In encoding transform coefficients in VVC, the variable remBinsPassl is first set as the maximum number of allowed context coding bins (MCCBs). During the encoding process, each time a context encoded binary bit is transmitted by signaling, the variables are decremented by 1. If remBinsPass1 is 4 or more, coefficients are transmitted by signaling using syntax elements including sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag, all of which use context encoded binary bits in the first iteration. The remaining level information of the coefficients is encoded using Golomb-Rice code and bypass encoded binary bits in the second iteration using the abs_remainder syntax element. If remBinsPass1 is less than 4 when encoding the first iteration, the current coefficient is not encoded in the first iteration, but is directly encoded using Golomb-Rice code and bypass encoded binary bits in the second iteration using the dec_abs_level syntax element. After all the above levels are encoded, all sign flags with sig_coeff_flag equal to 1 are finally encoded to bypass binary bits. This process is illustrated in FIG. 5A. remBinsPass1 is reset for each TB. The conversion from using context encoded binary bits for sig_coeff_flag, abs_level_gt1_flag, par_level_flag, and abs_level_gt3_flag to using bypass encoded binary bits for the remaining coefficients occurs at most once per TB. For a coefficient sub-block, if remBinsPass1 is less than 4 before encoding its first coefficient, the entire coefficient sub-block is encoded using bypass encoded binary bits.

[0074] Unlike HEVC, in which a single residual coding scheme is designed and used to code both the transform coefficients and the transform skip coefficients, in VVC, two independent residual coding schemes are used for the transform coefficients and the transform skip coefficients (i.e., the residual), respectively.

[0075] For example, it can be seen that the statistical properties of the residual in transform skip mode are different from those of the transform coefficients, and there is no energy compaction around the low frequency components. The coding of the residual is modified to take into account the different signal properties of the (spatial domain) transform skip residual, (1) Signaling without final x / y position, (2) a coded_sub_block_flag encoded for each subblock other than the DC subblock if all previous identifiers are equal to 0; (3) Performing context modeling using two adjacent coefficients sig_coeff_flag; (4) Use a context model with only one par_level_flag. (5) an additional 5, 7, 9 or more identifiers; (6) Derive modified Rice parameters for residual binarization, and (7) the context modeling of the sign flag is determined based on the left and upper adjacent coefficient values, and the sign flag is analyzed after sig_coeff_flag to keep all the context encoded binary bits together; As shown in FIG. 5B, the syntax elements sig_coeff_flag, coeff_sign_flag, abs_level_gt1_flag, and par_level_flag are encoded in an interleaved manner from one residual sample to the other in the first iteration, followed by abs_level_gtX_flag bitplanes in the second iteration and abs_remainder coding in the third iteration.

[0076] Iteration 1 sig_coeff_flag, coeff_sign_flag, abs_level_gt1_flag, par_level_flag.

[0077] Repeat 2 abs_level_gt3_flag, abs_level_gt5_flag, abs_level_gt7_flag, abs_level_gt9_flag.

[0078] Repeat 3 abs_remainder.

[0079] FIG. 6 is a block diagram illustrating an example process for dependent scalar quantization according to some embodiments of the present disclosure.

[0080] In the current VVC, the maximum QP value is extended from 51 to 63, and the signaling of the initial QP changes accordingly. When a non-zero value of slice_qp_delta is encoded, the initial value of SliceQpY may be modified at the slice sublayer. For transform skip blocks, the minimum allowed QP is limited to 4, because when QP is equal to 1, the quantization step size becomes 1.

[0081] Also, a new concept called "dependent scalar quantization" is utilized to adapt the scalar quantization used in HEVC. Dependent scalar quantization refers to a method in which a set of allowable reconstructed values ​​for a transform coefficient is determined by the value of the transform coefficient level preceding the current transform coefficient level according to the reconstruction order. Compared with the normal independent scalar quantization used in HEVC, the allowable reconstructed vectors are compressed more compactly in the N-dimensional vector space (N denotes the number of transform coefficients in a transform block). That is, for a given average number of allowable reconstructed vectors per unit volume per N dimension, the average distortion between the input vector and the closest reconstructed vector is reduced. The dependent scalar quantization method is realized by (a) defining two scalar quantizers with different reconstruction levels, and (b) defining a process of switching between the two scalar quantizers.

[0082] The two scalar quantizers used (denoted Q0 and Q1) are shown in Figure 6. The position of the available reconstruction levels is specified solely by the quantization step size Δ. The scalar quantizer used (Q0 or Q1) is not explicitly signaled in the bitstream. On the contrary, the quantizer for the current transform coefficient is determined by the parity of the transform coefficient level located before the current transform coefficient according to the coding or reconstruction order.

[0083] FIG. 7 is a block diagram illustrating an example state machine for switching between two different scalar quantizers in accordance with some embodiments of the present disclosure.

[0084] As shown in FIG. 7, the switching between the two scalar quantizers (Q0 and Q1) is realized by a state machine with four quantizer states (QState). QState may take four different values, namely 0, 1, 2, and 3. It is uniquely determined by the oddness of the transform coefficient level that is located before the current transform coefficient according to the encoding / reconstruction order. When the inverse quantization of a transform block begins, the state is set equal to 0. The transform coefficients are reconstructed according to the scan order (i.e., the same order as when entropy decoding is performed on them). After reconstructing the current transform coefficient, the state is updated and is shown in FIG. 7, where k denotes the value of the transform coefficient level.

[0085] Signaling is further supported to transmit default and user-defined scaling matrices. The DEFAULT mode scaling matrices are all flat and have elements equal to 16 for all TB dimensions. Currently, IBC and intra coding modes share the same scaling matrices. Thus, for USER_DEFINED matrices, the numbers of MatrixType and MatrixType_DC are: MatrixType: 30 = 2 (2 for intra & IBC / inter) x 3 (Y / Cb / Cr components) x 5 (square TB dimensions: for luminance 4x4 to 64x64, for chromaticity 2x2 to 32x32) MatrixType_DC: Updated to 14 = 2 (2 for intra & IBC / inter x 1 for Y component) x 3 (TB size: 16 x 16, 32 x 32, 64 x 64) + 4 (2 for intra & IBC / inter x 2 for Cb / Cr components) x 2 (TB size: 16 x 16, 32 x 32).

[0086] The DC value is encoded independently and used for 16x16, 32x32 and 64x64 scaling matrices. For TBs with dimensions smaller than 8x8, all elements in one scaling matrix are signaled. If the TB has dimensions equal to or larger than 8x8, only 64 elements in one 8x8 scaling matrix are signaled as the base scaling matrix. To obtain matrices with dimensions larger than 8x8, the 8x8 base scaling matrix is ​​upsampled (by element-wise copying) to the corresponding square dimensions (i.e., 16x16, 32x32, 64x64). When applying the zero reset of the 64-point transformed high-frequency coefficients, the corresponding high-frequency of the scaling matrix is ​​also zero reset. That is, if the width or height of the TB is equal to or larger than 32, only the left half or upper half of the coefficients are preserved, and the remaining coefficients are assigned to zero. Also, the number of elements signaled for the 64x64 scaling matrix is ​​reduced from 8x8 to three 4x4 sub-matrices by not using the bottom right 4x4 elements.

[0087] The selection of the probability model for a syntax element related to the absolute value of a transform coefficient level is determined by the value of the absolute level or some reconstructed absolute level in a local neighbourhood.

[0088] The selected probability model is determined by the sum of the absolute levels (or a part of the reconstructed absolute levels) in the local neighborhood and the number of absolute levels in the local neighborhood that are greater than 0 (given by the number of sig_coeff_flags equal to 1). numSig, which is the number of non-zero levels in the local neighborhood; sumAbs1, which is the sum of a portion of the absolute levels (absLevel1) reconstructed after the first iteration in the local neighborhood; sumAbs, which is the sum of the reconstructed absolute levels in local neighbourhoods; · The diagonal position (d), which is the sum of the abscissa and ordinate of the current scan position within the transformation block.

[0089] Based on the values ​​of numSig, sumAbs1 and d, select a probability model for encoding sig_coeff_flag, abs_level_gt1_flag, par_level_flag and abs_level_gt3_flag. Based on the values ​​of sumAbs and numSig, select Rice parameters for binarizing abs_remainder and dec_abs_level.

[0090] Currently in VVC, a reduced 32-point MTS (also called RMTS32) is used to reduce the computational complexity of 32-point DST-7 / DCT-8 based on skipping high-frequency coefficients, and it varies according to the coding of coefficients including all types of zero resets (i.e., RMTS32 and the current zero reset for high-frequency components in DCT2). Specifically, the binarization coding at the last non-zero coefficient position is coded based on the reduced TU size, and the selection of the context model to be encoded for the last non-zero coefficient position is determined by the original TU size. Also, 60 context models are used to code the sig_coeff_flag of the transform coefficient. The selection of the context model index is based on the sum of the maximum of the five previously partially reconstructed absolute levels and the dependent quantization state QState, called locSumAbsPass1, If cIdx is equal to 0, ctxInc is ctxInc=12*Max(0,QState-1)+Min((locSumAbsPass1+1)>>1,3)+(d<2?8:(d<5?4:0)), Otherwise (if cIdx is greater than 0), ctxInc is This is derived as ctxInc = 36 + 8 * Max(0,QState-1) + Min((locSumAbsPass1+1)>>1,3) + (d<2?4:0).

[0091] FIG. 8 is a flowchart illustrating an example process by which a video decoder performs residual coding on a transform skip mode coded block in accordance with some embodiments of this disclosure.

[0092] In some embodiments, when coding the residual, a unified (same) Rice parameter (ricePar) is derived and used to send the syntax elements abs_remainder and dec_abs_level by signaling. The only difference is that baseLevel is set as 4 and 0 for coding abs_remainder and dec_abs_level, respectively. The determination of the Rice parameter is not only based on the sum of the absolute levels of the five adjacent transform coefficients in the local template, but also based on the corresponding base level; RicePara = RiceParTable[max(min(31,sumAbs-5*baseLevel),0)].

[0093] That is, the binary codewords of the syntax elements abs_remainder and dec_abs_level are adaptively determined based on the level information of the neighboring coefficients. Since this codeword determination is performed for each sample, additional logic is required to handle the adaptation of this codeword to encode the coefficients. Similarly, when encoding the residual block, the binary codeword of the syntax element abs_remainder is adaptively determined based on the level information of the neighboring coefficients.

[0094] Also, when coding syntax elements related to residual coding or transform coefficient coding, the selected probability model is determined by the level information of adjacent levels, and therefore the context selection needs to be handled by additional logic and additional context models.

[0095] In some embodiments, the video codec performs residual encoding using a fixed binary codeword for the value of the syntax element abs_remainder. (1) The process of determining the codeword for abs_remainder is similar to that used in VVC using a fixed rice parameter (e.g., 1, 2, or 3); (2) Fixed-length binarization, (3) Truncated Rice Binarization, (4) Truncated Binary (TB) binarization process; (5) k-th order Exp-Golomb thresholding process (EGk), (6) Finite k-order Exp-Golomb thresholding, (7) Fixed-length binarization, the method of which can be used to form the binary codeword (detailed process can be found in the VVC draft specification), including, but not limited to:

[0096] When decoding a transform skip mode coded block using a constant Rice parameter, a video decoder first receives video data corresponding to the transform skip mode coded block from a bitstream (810), assuming that the block was encoded using transform skip mode and that the video decoder does not perform an inverse transform during the decoding process.

[0097] Next, the video decoder decodes from the received video data the first codeword (e.g., abs_reaminder), the second codeword (e.g., sign_coeff_flag), and the first set of codewords for pixels in the transform skip mode coded block (820).

[0098] The decoder derives (830) an initial level value (eg, dec_abs_level) from the first set of codewords.

[0099] The video decoder then converts (840) the first codeword into pixel residuals based on a predefined mapping relationship generated using a constant Rice parameter. For example, the Rice parameter may have a constant value of 1, 2, or 3. In some embodiments, the Rice parameter is set as 1.

[0100] In some embodiments, the generation of the predefined mapping relationship between the specific remainder value abs_remainder and the corresponding codeword may include: 1) Determining a constant binarization parameter cMax based on a constant Rice parameter cMax=6< <cRiceParamであるステップ、 2) Derive the prefix value prefixVal of the corresponding codeword by invoking a truncated Rice binarization process; Step where prefixVal = Min(cMax, abs_remainder), 3) If the prefix binary bit string is equal to a bit string of length 6 with all bits equal to 1, then the suffix value suffixVal of the derived corresponding codeword is The step where suffixVal=abs_remainder-cMax is involved.

[0101] As mentioned above, the suffix value of the corresponding codeword for a particular remainder value is selectable because it exists only if the prefix value of the codeword satisfies certain conditions. In some embodiments, the predefined mapping relationship is constructed in the memory of the video encoder / decoder in the form of a lookup table, so that the video encoder can quickly find a codeword that includes a prefix value and a selectable suffix value for a given remainder value from the lookup table. Similarly, the video decoder can quickly find the remainder of the corresponding codeword from the lookup table.

[0102] Next, the video decoder converts (850) the second codeword into a sign value (eg, positive or negative) of the remainder (obtained from the first codeword).

[0103] The video decoder then derives (860) a quantized residual for the pixel from the remainder, the code value, and the initial level value.

[0104] In some embodiments, the video codec performs coefficient encoding using fixed codewords for the syntax elements abs_remainder and dec_abs_level. The binary codewords can be formed using, but are not limited to, the following methods:

[0105] (1) The process of determining the codewords for abs_remainder and dec_abs_level is similar to that used in VVC using fixed Rice parameters (e.g., 1, 2, or 3). The baseLevels for abs_remainder and dec_abs_level currently used in VVC may still be different (e.g., baseLevels are set as 4 and 0 for coding abs_remainder and dec_abs_level, respectively), (2) The process of determining the codewords for abs_remainder and dec_abs_level is the same as that used in VVC, using fixed Rice parameters (e.g., 1, 2, or 3). The baseLevels for abs_remainder and dec_abs_level are also unified (e.g., both use 0, or both use 4). (3) Fixed-length binarization, (4) Truncated Rice binarization, (5) Truncated Binary (TB) binarization process, (6) k-th order Exp-Golomb thresholding process (EGk), (7) Finite k-order Exp-Golomb thresholding, (8) Fixed-length binarization.

[0106] In some embodiments, the video codec may use a single context to encode syntax elements related to residual coding or coefficient coding (e.g., abs_level_gtx_flag) and eliminate context selection based on adjacent decoding level information.

[0107] FIG. 9 is a block diagram illustrating an example context-adaptive binary arithmetic coding (CABAC) engine in accordance with some embodiments of the present disclosure.

[0108] Context-adaptive binary arithmetic coding (CABAC) is an entropy coding format used in many video coding standards (e.g., H.264 / MPEG-4 AVC, High Efficiency Video Coding (HEVC) and VVC). CABAC is based on arithmetic coding and has some changes to meet the needs of video coding standards. For example, CABAC codes binary symbols, which maintains low complexity and allows probability modeling for the more frequently used bits of any symbol. Adaptively selecting a probability model based on the local context allows better modeling of probabilities, since coding modes are generally well correlated in parts. Finally, CABAC uses a multiplication-free range partitioning by using probability ranges and probability states of quantization.

[0109] CABAC has multiple probability models for different contexts. It first converts all non-binary symbols to binary. Then, for each binary bit (also called "bit"), the codec chooses which probability model to use, then optimizes the probability estimate using information from neighboring elements. Finally, it applies arithmetic coding to compress the data.

[0110] Context modeling provides an estimate of the conditional probability of the coded symbols. With the aid of an appropriate context model, it is possible to exploit the inter-symbol redundancy given by switching between different probability models based on the coded symbols in the neighbourhood of the current symbol being encoded. The coding of a data symbol involves the following steps:

[0111] Threshold CABAC uses binary arithmetic coding, which means that it only encodes binary decisions (1 or 0). Before arithmetic coding, non-binary valued symbols (e.g., transform coefficients or motion vectors) are "binarized" or converted into a binary code. The process is similar to the process of converting data symbols into variable length codes, but the binary codes are further encoded before being transmitted (performed by an arithmetic codec). Each step is repeated for each binary bit (or "bit") of the binary symbol.

[0112] Context Model Selection A "context model" is a probability model of one or more binary bits for a binarized symbol. The model can be selected by choosing an available model based on the statistics of recently encoded data symbols. A context model stores the probability that each binary bit is a "1" or a "0".

[0113] Arithmetic Encoding An arithmetic encoder encodes each binary bit based on a selected probability model, where each binary bit has only two subranges (corresponding to "0" and "1").

[0114] Probability Update Update the selected context model based on the actual encoding value (eg, if the binary bit value is "1", increase the "1" frequency count).

[0115] By decomposing each non-binary syntax element value into a sequence of binary bits, the further processing of each binary bit value in CABAC is determined by an associated coding mode decision, and the associated coding mode may be selected as normal mode or bypass mode. The latter is selected as the one used for binary bits, assuming that the binary bits are uniformly distributed, and thus simply avoiding the entire normal binary arithmetic encoding (and decoding) process for the binary bits. In normal coding mode, each binary bit value is encoded using a normal binary arithmetic coding engine, and the associated probability model is determined by a fixed selection based on the type of syntax element and the binary bit position or binary bit index (binIdx) in the binary representation of the syntax element, or is adaptively selected from two or more probability models based on the associated side information (e.g., spatial domain neighborhood, component, depth or dimension of CU / PU / TU, or position within the TU). The selection of the probability model is called context modeling. As an important design decision, the latter is generally applied only to the most commonly observed binary bits, while other binary bits that are not commonly observed are processed using a coordinated, generally zero-order probability model. In this manner, CABAC realizes selective adaptive probability modeling at the sub-symbol level, thus providing a highly efficient tool to exploit inter-symbol redundancy with significantly reduced overall modeling or training costs. Note that for both fixed and adaptive scenarios, in principle, switching from one probability model to the other may occur between any two consecutive normally coded binary bits. In general, the design of the context model in CABAC reflects a balance between avoiding unnecessary modeling cost overhead and exploiting statistical dependence to a large extent.

[0116] The parameters of the probability model in CABAC are adaptive, which means that the adaptation of the model probability to the statistical changes of the binary bit source is performed in both the encoder and the decoder in a backward adaptive and synchronous manner per binary bit, and this process is called probability estimation. For this purpose, each probability model in CABAC may select one of 126 different states, and the associated model probability value p ranges in the interval [0:01875;0:98125]. The two parameters of each probability model are stored in the context memory as a 7-bit entry, i.e., 6 bits for each of the 63 probability states of the model probability pLPS indicating the most unlikely symbol (LPS), and 1 bit for the value of nMPS, i.e. the most likely symbol (MPS).

[0117] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted by a computer-readable medium as one or more instructions or code for execution by a hardware-based processing unit. A computer-readable medium may include a computer-readable storage medium, which corresponds to a tangible medium, such as a data storage medium, or a communication medium, which includes any medium on which a computer program may be readily transmitted from one place to another, such as based on a communication protocol. In this manner, a computer-readable medium may generally correspond to (1) a non-transitory tangible computer-readable storage medium, or (2) a communication medium, such as a signal or carrier. A data storage medium may be any available medium that can be accessed by one or more computers, or one or more processors, to retrieve instructions, code, and / or data structures to implement the embodiments described herein. A computer program product may include a computer-readable medium.

[0118] The terms used in the description of the embodiments herein are merely intended to describe the particular embodiment and are not intended to limit the scope of the claims. Unless otherwise clearly indicated in the context above and below, the singular forms "a kind," "one," and "the" used in the description of the embodiments and the appended claims are intended to include the plural forms. It is further understood that the term "and / or" used herein refers to any and all possible combinations of one or more associated listed items, and includes any and all possible combinations of one or more associated listed items. It is further understood that the terms "comprise" and / or "include" as used herein specify the presence of the features, elements, and / or components, but do not exclude the presence or addition of one or more other features, elements, components, and / or groups thereof.

[0119] It is further understood that the terms "first", "second", etc. may be used herein to describe various elements, but these elements are not limited by these terms. These terms are used only to distinguish one type of element from another type of element. For example, a first electrode may be referred to as a second electrode, and similarly, a second electrode may be referred to as a first electrode, without departing from the scope of the embodiments. A first electrode and a second electrode are both electrodes, but are not the same electrode.

[0120] The description in this application is for illustration and description, and is not intended to be exhaustive or to limit the invention in the form disclosed. Many modifications, changes, and alternative embodiments will be apparent to those skilled in the art upon guidance in the above description and the associated drawings. The selection and description of the examples are intended to best interpret the principles and practical applications of the invention, and to enable those skilled in the art to understand the various embodiments of the invention, and to best utilize the basic principles and various modifications, for example, to apply to the specific applications expected. Therefore, it is to be understood that the scope of the claims is not limited to the specific examples of the disclosed embodiments, and modifications and other embodiments are intended to be included within the scope of the appended claims.

Claims

1. 1. A method for encoding video data, comprising the steps of: determining a quantization residual for a pixel; determining a remainder, a sign for the remainder, and an initial level value for the pixel based on the quantized residual; Transforming the pixel remainder into a first codeword of a pixel in a transform skip mode coding block according to a predefined mapping relationship generated using a Rice parameter, the Rice parameter being set to 1 in response to a transform skip mode; determining a second codeword for pixels in the transform skip mode coded block in response to a code for the remainder; determining a first set of codewords for pixels in the transform skip mode coded block in response to the initial level values; encoding the first codeword, the second codeword, and the first set of codewords into video data corresponding to the transform skip mode coded block; and inserting the video data corresponding to the transform skip mode coded block into a bitstream. A method for encoding video data.

2. The predefined mapping relationship is: Calculating a constant binarization parameter using the Rice parameters; and determining, for one candidate remainder value, a prefix value of a codeword and selectable suffix values ​​of a corresponding codeword using the constant binarization parameter.

3. 3. The method of claim 2, wherein the codeword prefix values ​​are determined using a truncated Rice binarization process.

4. The method of claim 1 , wherein the initial level value is used to derive a quantized residual for the pixel based on the pixel's position within the transform skip mode coded block.

5. 2. The method of claim 1, wherein the first codeword is a fixed binary codeword of the pixel remainder having a predefined value.

6. 2. The method of claim 1, wherein the first codeword corresponds to a syntax element abs_reminder and the second codeword corresponds to a syntax element sign_coefficient_flag.

7. The method of claim 1 , wherein a single context model is used to decode the first codeword, the second codeword, and the first set of codewords.

8. 1. An electronic device comprising: one or more processing units; a memory coupled to the one or more processing units; A plurality of programs stored in the memory; Including, The program, when executed by the one or more processing units, causes the electronic device to perform one of the methods according to any one of claims 1 to 7.

9. A non-transitory computer-readable storage medium, comprising: storing a plurality of programs to be executed by an electronic device having one or more processing units; A non-transitory computer readable storage medium, the plurality of programs, when executed by the one or more processing units, causing the electronic device to perform one of the methods of any one of claims 1 to 7.

10. A computer program stored on a non-transitory computer readable storage medium and executed by an electronic device having one or more processing units, the computer program, when executed by said one or more processing units, causing said electronic device to perform one of the methods according to any one of claims 1 to 7.

11. A non-transitory computer-readable storage medium storing a plurality of programs executed by an electronic device having one or more processing units, comprising: A non-transitory computer-readable storage medium storing a bitstream generated by one of the methods recited in any one of claims 1 to 7, the plurality of programs, when executed by the one or more processing units, causing the electronic device to perform one of the methods recited in any one of claims 1 to 7.

Images