Semiconductor Device

Abstract

To provide a semiconductor device in which the off voltage resistance and on resistance can be set independently.SOLUTION: In a semiconductor device, a buffer layer 2 made of non-doped gallium nitride, a p-type semiconductor layer 3 made of aluminum gallium nitride, a non-doped semiconductor layer 4 made of aluminum gallium nitride, and an upper semiconductor layer 5 made of non-doped gallium nitride are stacked on a substrate 1 made of sapphire. At an interface between the non-doped semiconductor layer 4 and the upper semiconductor layer 5, a two-dimensional electron gas layer is formed. A gate electrode G is in ohmic contact with the p-type semiconductor layer 3, and a source electrode S and a drain electrode D are in ohmic contact with the upper semiconductor layer 5. Even if the non-doped semiconductor layer 4 is increased in thickness in order to increase the off voltage resistance of this semiconductor device, the on resistance of the semiconductor device is not affected.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device, and more particularly to a heterojunction type semiconductor device. [Background technology]

[0002] FIG. 3 shows a cross-sectional view of a conventional semiconductor device in which semiconductor layers with different bandgaps are heterojunctioned. The semiconductor device shown in FIG. 3 has a structure in which a buffer layer 11 made of gallium nitride (GaN), a channel layer 12 made of gallium nitride, and a Schottky layer 13 made of non-doped aluminum gallium nitride (AlGaN) are sequentially stacked on a substrate 10 made of sapphire. In a semiconductor device having such a structure, a channel made of a two-dimensional electron gas layer with extremely high electron mobility is formed immediately below the heterojunction interface made of the channel layer 12 and the Schottky layer 13. In the semiconductor device shown in FIG. 3, the carriers (two-dimensional electron gas) flowing between the source electrode S and the drain electrode D are controlled by controlling the voltage applied to the gate electrode G that is Schottky-junctioned with the Schottky layer 13.

[0003] Incidentally, it is known that the Schottky characteristics of the gate electrode G formed in contact with the nitride semiconductor layer (Schottky layer 13 made of aluminum gallium nitride in the example shown in FIG. 3) generates a high gate leakage current, which is about two orders of magnitude larger than that of a HEMT formed of gallium arsenide (GaAs). This leakage current triggers impact ionization, lowering the off-state breakdown voltage (the drain breakdown voltage when the transistor is in the off state), which is an important parameter of the nitride semiconductor device as a high-output element, and the high breakdown voltage performance of the wide-gap material could not be fully utilized.

[0004] In order to solve such problems, a back-gate type semiconductor device has been proposed (for example, Patent Document 1). FIG. 4 is a cross-sectional view of a back-gate type semiconductor device. The semiconductor device shown in FIG. 4 has a structure in which a buffer layer 21 made of aluminum nitride (AlN), a p-type semiconductor layer 22 made of p-type gallium nitride, and an n-type semiconductor layer 23 made of n-type aluminum gallium nitride are sequentially stacked on a substrate 20 made of sapphire. In a semiconductor device having such a structure, a channel made of a two-dimensional electron gas layer is formed immediately below a heterojunction interface made of the p-type semiconductor layer 22 and the n-type semiconductor layer 23. In a semiconductor device having such a structure, a voltage applied to a gate electrode G in ohmic contact with the p-type semiconductor layer 22 is controlled to control carriers flowing between a source electrode S and a drain electrode D in ohmic contact with the n-type semiconductor layer 23.

[0005] Furthermore, the gate electrode G is in ohmic contact with the p-type semiconductor layer 22, thereby reducing gate leakage current. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2006-210725 A Summary of the Invention [Problem to be solved by the invention]

[0007] In the conventional semiconductor devices, the impurity concentration of the n-type semiconductor layer 23 is high to obtain a desired two-dimensional electron gas concentration. Increasing the impurity concentration of the n-type semiconductor layer 23 leads to a decrease in the off-state breakdown voltage. Therefore, if the impurity concentration of the n-type semiconductor layer 23 is decreased to increase the off-state breakdown voltage, the two-dimensional electron gas concentration decreases and the on-state resistance increases. In this way, in conventional semiconductor devices, the off-state breakdown voltage and the on-state resistance are in a trade-off relationship, and it is difficult to achieve both at the same time. In view of the above situation, the present invention has an object to provide a semiconductor device that allows the off-state breakdown voltage and the on-state resistance to be appropriately set. [Means for solving the problem]

[0008] In order to achieve the above object, the invention of claim 1 of the present application is characterized in that a p-type first semiconductor layer made of a first semiconductor is stacked on a substrate, a non-doped second semiconductor layer made of the first semiconductor on the first semiconductor layer, and a third semiconductor layer made of a second semiconductor having a band gap smaller than the band gap of the first semiconductor on the second semiconductor layer, a gate electrode is in ohmic contact with the first semiconductor layer, a source electrode and a drain electrode are in ohmic contact with the third semiconductor layer, respectively, and a two-dimensional electron gas layer serving as a channel is formed at the interface between the second semiconductor layer and the third semiconductor layer.

[0009] The invention according to claim 2 of the present application is characterized in that, in the semiconductor device according to claim 1, the second semiconductor layer is composed of an undoped semiconductor layer made of a third semiconductor having a band gap smaller than that of the first semiconductor and larger than that of the second semiconductor, instead of an undoped semiconductor layer made of the first semiconductor.

[0010] The invention according to claim 3 of the present application is characterized in that, in the semiconductor device according to claim 1 or claim 2, the first semiconductor layer, the second semiconductor layer and the third semiconductor layer are made of III-V compound semiconductors. Effect of the Invention

[0011] In the semiconductor device of the present invention, the thickness of the second semiconductor layer, which determines the off-state breakdown voltage, and the impurity concentration and thickness of the third semiconductor layer, which determine the on-state resistance, can be set independently, thereby achieving both an improvement in the off-state breakdown voltage and a reduction in the on-state resistance. [Brief description of the drawings]

[0012] [Figure 1] 1 is an explanatory diagram of a semiconductor device according to an embodiment of the present invention; [Diagram 2] 1 is an explanatory diagram of a semiconductor device according to an embodiment of the present invention; [Diagram 3] FIG. 1 is an explanatory diagram of a conventional heterojunction semiconductor device. [Figure 4] FIG. 1 is an explanatory diagram of a conventional back-gate type semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The semiconductor device of the present invention is a semiconductor device that can achieve both an improvement in off-state breakdown voltage and a reduction in on-state resistance.

[0014] Fig. 1 is a cross-sectional view of the semiconductor device of this embodiment. As shown in Fig. 1, a buffer layer 2 is laminated on a substrate 1, a p-type semiconductor layer 3 (corresponding to a first semiconductor layer) is laminated on the buffer layer 2, a non-doped semiconductor layer 4 (corresponding to a second semiconductor layer) is laminated on the p-type semiconductor layer 3, and a surface semiconductor layer 5 (corresponding to a third semiconductor layer) is laminated on the non-doped semiconductor layer 4 in this order.

[0015] Here, the p-type semiconductor layer 3 and the non-doped semiconductor layer 4 may be composed of the same semiconductor, or a semiconductor may be selected such that the band gap of the non-doped semiconductor layer 4 is smaller than the band gap of the p-type semiconductor layer 3. The combination of materials is such that the band gap of the non-doped semiconductor layer 4 is larger than the band gap of the upper semiconductor layer 5. By selecting materials that satisfy these conditions, a two-dimensional electron gas layer can be formed directly below the heterojunction consisting of the non-doped semiconductor layer 4 and the upper semiconductor layer 5.

[0016] In addition, the type, impurity concentration, thickness, and the like of the semiconductor constituting the upper semiconductor layer 5 can be appropriately set so long as a two-dimensional electron gas layer can be formed directly below the heterojunction consisting of the non-doped semiconductor layer 4 and the upper semiconductor layer 5. In addition, the upper semiconductor layer 5 is not limited to a single semiconductor layer, and may include at least a semiconductor layer having a band gap larger than that of the non-doped semiconductor layer 4.

[0017] The gate electrode G is formed so as to be in ohmic contact with the p-type semiconductor layer 3, and the source electrode S and the drain electrode D are formed so as to be in ohmic contact with the upper semiconductor layer 5. By forming the gate electrode G from a metal that forms ohmic contact in this manner, it is possible to significantly reduce the gate leakage current. Gate leakage current is a major issue in semiconductor devices made of III-V compound semiconductors, and it is highly effective to employ the present invention in semiconductor devices in which the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer are made of III-V compound semiconductors.

[0018] Next, the upper semiconductor layer 5 will be described. By appropriately selecting this upper semiconductor layer 5, it is possible to form either a normally-on type or a normally-off type semiconductor device. For example, by forming the upper semiconductor layer 5 from a non-doped semiconductor layer, it is possible to form a normally-off type semiconductor device. In this case, by applying a predetermined control voltage to the gate electrode G, a two-dimensional electron gas layer serving as carriers is formed directly under the heterojunction consisting of the non-doped semiconductor layer 4 and the upper semiconductor layer 5, and the current flowing between the source electrode S and the drain electrode D can be controlled.

[0019] Moreover, by forming the upper semiconductor layer 5 from an n-type semiconductor, a normally-on type semiconductor device can be formed. In this case, when no control voltage is applied to the gate electrode G, a dimensional electron gas layer serving as carriers is formed immediately below the heterojunction consisting of the non-doped semiconductor layer 4 and the upper semiconductor layer 5, and the current flowing between the source electrode S and the drain electrode D can be controlled.

[0020] In both the case of a normally-off type semiconductor device and a normally-on type semiconductor device, the on-resistance of the semiconductor device is a predetermined value when there is no change in the thickness or impurity concentration of the upper semiconductor layer 5, or in the dimension between the source electrode S and the drain electrode D. Here, even if the thickness of the non-doped semiconductor layer 4 changes, there is no effect on the on-resistance of the semiconductor device.

[0021] On the other hand, the off-state breakdown voltage is determined by the thickness of the non-doped semiconductor layer 4, and in order to increase the off-state breakdown voltage, the thickness of the non-doped semiconductor layer 4 should be increased. As described above, changing the thickness of the non-doped semiconductor layer 4 does not affect the formation of the above-mentioned carriers. In other words, even if the thickness of the non-doped semiconductor layer 4 is increased in order to increase the off-state breakdown voltage, the on-resistance of the semiconductor device does not change.

[0022] As described above, the semiconductor device of the present invention can achieve both an improvement in off-state breakdown voltage and a reduction in on-state resistance. EXAMPLES

[0023] Next, an embodiment of the present invention will be described. A semiconductor device having the same structure as the semiconductor device shown in Fig. 1 will be described. A buffer layer 2 made of undoped gallium nitride is laminated on a substrate 1 made of sapphire, a p-type semiconductor layer 3 made of p-type aluminum gallium nitride is laminated on the buffer layer 2, an undoped semiconductor layer 4 made of undoped aluminum gallium nitride is laminated on the p-type semiconductor layer 3, and a surface semiconductor layer made of undoped gallium nitride is laminated on the undoped semiconductor layer 4 in this order.

[0024] Here, the p-type semiconductor layer 3 and the non-doped semiconductor layer 4 are made of the same semiconductor material, so the band gaps of the p-type semiconductor layer 3 and the non-doped semiconductor layer 4 are equal. In this case, the p-type semiconductor layer 3 and the non-doped semiconductor layer 4 are made of aluminum gallium nitride, so the band gap can be changed by changing the aluminum composition ratio. The aluminum composition ratio may be set so that the band gap on the surface side (upper semiconductor layer 5 side) of the non-doped semiconductor layer 4 becomes smaller. Even when the aluminum composition is changed, the band gap will not be smaller than that of the gallium nitride that constitutes the surface semiconductor layer 5.

[0025] The gate electrode G, the source electrode S and the drain electrode D are each formed of a metal with which an ohmic contact is formed.

[0026] Figure 2 shows a band diagram of the semiconductor device with the above structure. The example shown in Figure 2 is a normally-off type semiconductor device, and by controlling the control voltage applied to the gate electrode G, a two-dimensional electron gas layer is formed at the interface between the non-doped semiconductor layer 4 (i-AlGaN) and the surface semiconductor layer 5 (i-GaN), and the current flowing between the source electrode S and the drain electrode D can be controlled. EXAMPLES

[0027] As a modification of the first embodiment described above, the surface semiconductor layer 5 can be made of n-type gallium nitride. In this case, a two-dimensional electron gas layer is formed at the interface between the non-doped semiconductor layer 4 (i-AlGaN) and the surface semiconductor layer 5 (n-GaN), and carriers are generated. Since this two-dimensional electron gas is formed below the Fermi level, a normally-on type semiconductor device can be obtained. [Explanation of symbols]

[0028] 1, 10, 20: substrate, 2, 11, 21: buffer layer, 3: p-type semiconductor layer, 4: non-doped semiconductor layer, 5: upper semiconductor layer, 12: channel layer, 13: Schottky layer, 22: p-type semiconductor layer, 23: n-type semiconductor layer

Claims

1. A p-type first semiconductor layer made of a first semiconductor is laminated on a substrate, a non-doped second semiconductor layer made of the first semiconductor is laminated on the first semiconductor layer, and a third semiconductor layer made of a second semiconductor having a band gap smaller than the band gap of the first semiconductor is laminated on the second semiconductor layer, a gate electrode is in ohmic contact with the first semiconductor layer, and a source electrode and a drain electrode are in ohmic contact with the third semiconductor layer, A semiconductor device, comprising: a two-dimensional electron gas layer serving as a channel at an interface between the second semiconductor layer and the third semiconductor layer.

2. 2. The semiconductor device according to claim 1, a second semiconductor layer, instead of the first semiconductor layer, comprising an undoped semiconductor layer made of a third semiconductor having a band gap smaller than the band gap of the first semiconductor and larger than the band gap of the second semiconductor.

3. 3. The semiconductor device according to claim 1, The semiconductor device according to claim 1, wherein the first semiconductor layer, the second semiconductor layer and the third semiconductor layer are made of a III-V compound semiconductor.

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