Information processing device, system, parameter optimization method, and program thereof

Abstract

An information processing device that makes it easy to set more optimized parameters is provided. [Solution] The server includes a first control means, which performs processing for initial setting of parameter values ​​related to PCIe, which is a bandwidth expansion bus, performs various tests with the set parameter values, performs processing for setting different parameter values ​​and performs the various tests after the various tests with the initially set parameter values, changes the setting of the parameter values ​​and performs the various tests, and repeats this process for all different parameter values, notifies a service processor of the results of the various tests with each set parameter value, and, upon receiving a parameter value setting instruction from the service processor, stores the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters.

Description

[Technical field]

[0001] The present disclosure relates to an information processing device, a system, a parameter optimization method, and a program therefor. [Background technology]

[0002] The performance requirements for I / O (Input / Output) are improving year by year, and the processor that processes I / O and the various devices connected via PCIe are becoming more powerful and complex with the formulation of new generations. Here, PCIe (Peripheral Component Interconnect Express) is a wideband expansion bus for connecting peripheral devices such as graphics cards, capture cards, and wireless cards, and is a serial interface that enables high-speed data transfer. Normally, connections are made between processors and various PCIe devices using link training, and in the PCIe 3.0 generation and later, using parameters that are automatically adjusted by link equalization. Here, link training and link equalization are processes that automatically adjust the transmitting and receiving parts to enable stable data transmission and reception in a communication-enabled state.

[0003] As regards determining optimal parameter values ​​for a PCIe device, Cited Document 1 discloses a technique for determining optimal parameter values ​​for a PCIe device based on the number of bit errors. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 7231589 Summary of the Invention [Problem to be solved by the invention]

[0005] In the technology described in Patent Document 1, the optimum parameter value of the PCIe device is determined only by the number of bit errors. Therefore, aspects such as performance and heat dissipation are not taken into consideration, and there are cases where the optimum link state cannot be reached. Also, as mentioned above, automatic parameter adjustment by link equalization is performed from PCIe generation 3.0 onwards, but as the generation increases, the number of link equalization phases increases, it takes time to adjust the optimum link state, and parameter adjustment is not easy, so there are cases where the problem occurs that the device operates in a state where the optimum parameter adjustment has not been reached.

[0006] An object of the present disclosure is to provide an information processing device, a system, a parameter optimization method, and a program therefor that solve the above-mentioned problems. [Means for solving the problem]

[0007] An information processing device according to one embodiment of the present disclosure includes a first control means that performs processing for initial setting of parameter values ​​related to PCIe, which is a high-bandwidth expansion bus, performs various tests with the set parameter values, and after the various tests with the initially set parameter values, performs processing for setting different parameter values ​​and performs the various tests, and repeats the process of changing the parameter value settings and performing the various tests for all different parameter values, notifies a service processor of the results of the various tests with each set parameter value, and, upon receiving a parameter value setting instruction from the service processor, stores the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters.

[0008] A parameter optimization method according to one embodiment of the present disclosure is executed by a computer to perform processing for initial setting of parameter values ​​related to PCIe, which is a high-bandwidth expansion bus, perform various tests with the set parameter values, and after the various tests with the initially set parameter values, perform processing for setting different parameter values ​​and perform the various tests, change the parameter value settings and perform the various tests, and repeat the above for all different parameter values, notify a service processor of the results of the various tests with each set parameter value, and, upon receiving a parameter value setting instruction from the service processor, store the received optimal parameters in a non-volatile memory and perform processing for setting the optimal parameters.

[0009] A program for parameter optimization according to one embodiment of the present disclosure causes a computer to perform processing for initial setting of parameter values ​​related to PCIe, which is a high-bandwidth expansion bus, perform various tests with the set parameter values, and after the various tests with the initially set parameter values, perform processing for setting different parameter values ​​and perform the various tests, and repeat the process of changing the parameter value settings and performing the various tests for all different parameter values, notify a service processor of the results of the various tests with each set parameter value, and, upon receiving a parameter value setting instruction from the service processor, store the received optimal parameters in a non-volatile memory and perform processing for setting the optimal parameters. Effect of the Invention

[0010] According to the above aspect, it becomes easier to set more optimized parameters. [Brief description of the drawings]

[0011] [Figure 1] FIG. 2 is a diagram illustrating a configuration of a server that hosts a PCIe device according to the present disclosure. [Diagram 2]FIG. 1 is a diagram illustrating an example of a system configuration for parameter optimization. [Diagram 3] FIG. 3 is a diagram illustrating the functions of the server and the service processor illustrated in FIG. 2. [Figure 4] 3 is a diagram illustrating the operation of a server and a service processor in the system illustrated in FIG. 2. [Diagram 5] FIG. 2 is a diagram illustrating an example of a configuration of a server according to an embodiment of the present disclosure. [Figure 6] 2 is a block diagram showing an example of a hardware configuration of a server illustrated in FIG. 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Each embodiment will be described below with reference to the drawings. In all drawings, the same or corresponding components are denoted by the same reference numerals, and common descriptions will be omitted. FIG. 1 is a diagram showing the configuration of a server hosting a PCIe device in an embodiment of the present disclosure. The server (1) includes a CPU (Central Processing Unit) (11), a PCIe Switch (12), one or more PCIe Slots (13), and a non-volatile memory (14). The CPU (11) is a general-purpose processor that executes various processes in the server (1). The PCIe Switch (12) is a switching device that conforms to the PCIe standard and transmits data from the CPU (11) to the PCIe device. The PCIe Slot (13) is a slot for connecting a peripheral device that can be connected via PCIe. The non-volatile memory (14) is a memory for holding parameter values ​​and the like, which will be described later. The server (1) of the present disclosure is a type of information processing device, includes a PCIe Switch (12) and a PCIe Slot (13), and will be described as an example of a device that can use a PCIe device. The PCIe device is inserted into a PCIe slot (13) for use.

[0013] FIG. 2 is a diagram showing an example of a system configuration for parameter optimization. The system shown in FIG. 2 is configured with multiple servers (1) and a service processor (2) used to optimize parameters for those servers. The system provides an environment for determining optimal parameter values ​​related to PCIe to the multiple servers (1) that serve as hosts for PCIe devices. More specifically, the service processor (2) functions as a device that performs processing on the servers (1) to optimize parameter values ​​during shipping inspection and on-site inspection of the servers (1). The service processor (2) also has remote management functions such as logging and power control, and a function for managing multiple devices.

[0014] 3 is a diagram showing the functions of the server (1) and the service processor (2) shown in FIG. 2. The server (1) includes a CPU (11), a PCIe switch (12), and a PCIe slot (13), and includes control units (11a, 12a, 13a) that control the CPU (11), the PCIe switch (12), and the PCIe slot (13). The server (1) also includes a non-volatile memory (14). A storage unit of the non-volatile memory (14) holds parameter values ​​related to PCIe for the CPU (11), the PCIe switch (12), and the PCIe device. The control units (11a, 12a) are realized by software for controlling the CPU (11) and the PCIe switch (12), respectively. The control unit (13a) is realized by software for controlling the PCIe device inserted into the PCIe slot (13).

[0015] The control unit (11a) of the CPU (11) includes a data receiving unit and a data transmitting unit for communication with the service processor (2), and a data receiving unit and a data transmitting unit for communication with the PCIe switch (12).

[0016] The data receiving unit for communication with the service processor (2) in the control unit (11a) of the CPU (11) includes an OS control unit and a parameter adjustment unit, and the data sending unit for communication with the service processor (2) includes a result notification unit. The OS control unit controls the test OS provided in the server (1) under instructions from the service processor (2). The parameter adjustment unit performs processing to set optimal parameter values ​​sent from the service processor (2). The result notification unit notifies the service processor (2) of the results of various tests for each parameter value made up of multiple sets. The control unit (11a) of the CPU (11) is realized as part of the functions of the test OS.

[0017] A data transmission unit for communication with the PCIe switch (12) in the control unit (11a) of the CPU (11) includes a PCIe generation confirmation instruction unit, a parameter designation unit, and a test instruction unit, and a data reception unit for communication with the PCIe switch (12) includes a PCIe generation reception unit, a performance measurement unit, a sensor confirmation unit, a bit error link state measurement unit, and a judgment unit. Here, the PCIe generation confirmation instruction unit issues an instruction to confirm the generation of the PCIe switch (12) and the PCIe device. The parameter designation unit sets parameter values ​​for testing in the server (1) and designates parameter values ​​to be set in the PCIe switch (12) and the PCIe device. The test designation unit issues an instruction to execute a predetermined test with the parameter values ​​set for the PCIe switch (12) and the PCIe device. The PCIe generation reception unit receives information regarding the generations of the PCIe switch (12) and the PCIe device. The performance measurement unit obtains information on performance measurement related to the transfer speed between devices from the test results using the parameter values ​​set on the CPU (11) side and the notification of the test results using the set parameter values ​​received from the PCIe switch (12). The sensor confirmation unit confirms test results related to the temperature and voltage of the PCIe switch (12) and PCIe devices from the test results using the parameter values ​​set on the CPU (11) side and the notification of the test results using the set parameter values ​​received from the PCIe switch (12). The bit error link status measurement unit confirms the bit error rate in data transmission and reception with the PCIe device and the link status of the PCIe device from the test results using the parameter values ​​set on the CPU (11) and the notification of the test results using the set parameter values ​​received from the PCIe switch (12). The determination unit determines the status using the set parameter values ​​based on the measurement results of the performance measurement unit, the sensor confirmation unit, and the bit error link status measurement unit, i.e., the transfer speed between devices, the temperature and voltage, the bit error rate, and the link status of the PCIe device.

[0018] Furthermore, the control unit (11a) of the CPU (11) includes a test execution unit that causes various tests to be performed using parameter values ​​set on the CPU (11) side, and instructs the PCIe switch (12) and PCIe devices to perform various tests using parameter values ​​set on the PCIe device side.

[0019] The control unit (12a) of the PCIe Switch (12) includes a data receiving unit and a data transmitting unit for communication with the CPU (11) side, and a data transmitting unit and a data receiving unit for communication with the PCIe Slot (13) side.

[0020] A PCIe generation detection unit included in a data receiving unit for communication with the CPU (11) in the control unit (12a) of the PCIe switch (12) detects the generation of the PCIe switch (12). A PCIe generation transmission unit in a data transmitting unit for communication with the CPU (11) transmits information on the generation detected by the PCIe switch (12) and information on the generation of the PCIe device to the CPU (11). Other functions are substantially the same as the communication functions provided in the control unit (11a) of the CPU (11), except for the communication destination.

[0021] The control unit (13a) of the PCIe slot (13) includes a data receiving unit and a data transmitting unit for communicating with the PCIe switch (12). The data receiving unit includes a PCIe generation detection unit, a parameter adjustment unit, and a test implementation unit. These functions receive instructions from the PCIe switch (12) and cause the PCIe device connected to the PCIe slot (13) to perform generation detection, parameter adjustment, and testing. The PCIe generation transmission unit and result notification unit of the data transmission unit notify the PCIe switch (12) of the generation information and test results obtained from the PCIe device connected to the PCIe slot (13).

[0022] The control unit (2a) of the service processor (2) has a data transmission unit and a data reception unit that communicate with the server (1). The data transmission unit has an OS control unit and a parameter designation unit. The OS control unit issues an instruction to start up the test OS provided in the server (1). The parameter designation unit notifies the control unit (11a) of the server (1) of optimal parameter values ​​determined based on the results of various tests at the server (1) with various parameter values. The data reception unit has a result confirmation unit. The data confirmation unit receives the results of various tests at the various parameter values ​​set in the CPU (11), PCIe switch (12), and PCIe device, and determines optimal parameter values ​​for the server (1).

[0023] FIG. 4 is a diagram showing the operation of the server (1) and the service processor (2) in the system shown in FIG. 2. The operation of the server (1) and the service processor (2) will be described below with reference to the diagram. In this disclosure, a test OS for performing various tests and changing parameter values ​​is prepared in the storage unit of the server (1) in order to set optimal parameter values. In recent years, device drivers for controlling devices are often built into the OS. Therefore, in consideration of accessing a connected PCIe device to obtain optimal parameter values, the test OS is provided with a function for identifying PCIe devices and adjusting parameters.

[0024] In the following description of the operations, "the xx of the CPU (11)" means "the xx of the function included in the control unit (11a) for the CPU (11)." Similarly, "the xx of the PCIe Switch (12)" and "the xx of the PCIe Slot (13)" mean "the xx of the function included in the control unit (12a) for the PCIe Switch (12)" and "the xx of the function included in the control unit (13a) for the PCIe Slot (13)," respectively. Furthermore, "the xx of the service processor (2)" means "the xx of the function included in the control unit (2a) for the service processor (2)."

[0025] The OS control unit of the service processor (2) instructs the server (1) to start the test OS (S11). The server (1) starts the test OS in response to the instruction from the service processor (2) (S21). When the test OS is started in the CPU (11) of the server (1), the PCIe generation confirmation instruction unit of the CPU (11) performs PCIe generation confirmation for the PCIe device connected via the PCIe switch (12) and the PCIe slot (13) (S22). When the generation confirmation is completed, the PCIe generation receiving unit of the CPU (11) identifies the number of link equalization phases and adjustable parameters. As a result of this identification, the parameter adjustment unit, test execution unit, parameter designation unit, and test instruction unit of the CPU (11) work together to set parameter values ​​to be changed so that multiple tests are performed while changing parameters in the link equalization phase for each generation of the PCIe device.

[0026] The parameter designation unit of the CPU (11) instructs the CPU (11), PCIe switch (12), and PCIe slot (13) to set and change the initial parameter value (S23, S24, S31, S32, S41). At this time, the parameter designation unit of the CPU (11) not only adjusts the PCIe parameter value on the CPU (11) side, but also instructs the PCIe switch (12) and the PCIe devices connected to the PCIe slot (13) to change the parameter values. Each PCIe device that receives the instruction from the parameter adjustment unit of the PCIe slot (13) changes its own parameter value.

[0027] When the parameter values ​​for the tests are set, the test instruction unit of the CPU (11) instructs the test execution unit of the PCIe switch (12) to execute various tests (S26). This test instruction is also sent from the test instruction unit of the CPU (11) to the test execution unit of the PCIe switch (12) and the test execution unit of the PCIe slot (13), and the PCIe device is also instructed to execute a test via these (S26, S34), and various tests are executed by the CPU (11), the PCIe switch (12), and the PCIe device (S25, S33, S42). Specific test contents include a test of repeatedly resetting the PCIe device to check the link state and bit error rate, a test of measuring the transmission speed between PCIe devices, and a temperature and voltage test by reading from a sensor.

[0028] After all tests are completed, the result notification units of the PCIe Switch (12) and PCIe Slot (13) collect data on the test results for the set parameters, and the discrimination units of the CPU (11) and PCIe Slot (13) check the link status and bit error rate, measure the transmission speed, and discriminate data based on the results of the temperature and voltage tests. Furthermore, the result notification unit of the CPU (11) notifies the service processor (2) of these results (S27).

[0029] Thereafter, the CPU (11) sets the next parameter value, and repeats the process of conducting the test and reporting the results until all parameter value changes and various tests for those parameter values ​​are completed (S23 to S27, S31 to S34, S41 to S42).

[0030] When various tests for all parameter values ​​are completed, the result confirmation unit of the service processor (2) determines the optimal parameter values ​​(S12, S13). At this time, a threshold value for each parameter is established for each PCIe device, and only when all parameters exceed the threshold value, the parameter is considered as a candidate for the optimal value. When the optimal value is determined, the parameter designation unit of the service processor (2) instructs the parameter adjustment unit of the server (1) to set the parameter value (S14). Upon receiving the parameter value setting instruction, the server (1) stores the parameter value in a storage unit on the non-volatile memory (14) (S29). Similarly, the CPU (11) also instructs the PCIe switch (12) and the PCIe device to set optimal parameter values ​​(S29, S36), and the parameters of the various devices are stored in the storage units of the non-volatile memory of the PCIe switch (12) and the PCIe device (S35, S43).

[0031] Thereafter, the service processor (2) instructs the server (1) to start up the normal OS (S15). In addition, the server (1) that has received the instruction starts up the normal OS (S30). After the normal OS starts up, the parameter values ​​held in the CPU (11), PCIe switch (12), and PCIe device non-volatile memory are read when the server (1) starts up, so that the server (1) can automatically start up with optimal values.

[0032] In the present disclosure, the server (1) stores two data patterns of parameter values ​​that can be activated, i.e., a data pattern of parameter values ​​before adjustment and a data pattern of parameter values ​​being adjusted, in the storage unit of the nonvolatile memory (14), and the data pattern that the server (1) activates is switched in response to an instruction from the service processor (2). This makes it possible to immediately switch to a data pattern of parameter values ​​that can be activated, and to restore the server (1), even if the server (1) cannot be activated due to a change in the parameter value settings.

[0033] As described above, by conducting tests that consider not only the number of bit errors but also performance and heat dissipation from multiple test results, it is possible to perform optimal parameter adjustments and avoid operation in a state that does not reach the optimal link state. In addition, because the optimal parameter values ​​can be determined in advance, link equalization is not required when the server (1) system is started, and the time required to adjust the optimal link state is eliminated.

[0034] In addition, a test OS is prepared, and the parameter values ​​of various PCIe devices are changed according to each generation while tests are performed to search for optimal values. The tests include tests that repeatedly reset the PCIe device to check the link state and bit error rate, tests that measure the transmission speed between PCIe devices, and temperature and voltage tests by reading from the sensor. The results of each parameter value are judged based on the test results, and the optimal parameters can be searched for from multiple results. In addition, the parameter values ​​can be compatible with each generation of PCIe devices because it is possible to find the optimal value for each link equalization phase.

[0035] 5 is a diagram showing a configuration example of a server (1) according to an embodiment of the present disclosure. The server (1) includes a first control means (11a). The first control means (11a) performs processing for initial setting of parameter values ​​related to PCIe, which is a bandwidth expansion bus, performs various tests with the set parameter values, performs processing for setting different parameter values ​​and performs the various tests after the various tests with the initially set parameter values, changes the setting of the parameter values ​​and performs the various tests, and repeats this process for all different parameter values, notifies a service processor of the results of the various tests with each set parameter value, and, upon receiving a parameter value setting instruction from the service processor, stores the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters.

[0036] FIG. 6 is a block diagram showing an example of a hardware configuration of the server (1) illustrated in FIG. 1. Here, the server (1) is configured to include a CPU (11), a PCIe switch (12), a PCIe slot (13), a non-volatile memory (14), a recording device (15), a RAM (Random Access Memory) (16), and the like. The non-volatile memory (14) and the recording device (15) record a test OS for the server (1), a normal OS, and a program for realizing the functions of the server (1). The non-volatile memory (14) also holds parameter values ​​related to PCIe. The RAM (16) is used as a working area or the like for temporarily storing data and the like used by the CPU (10) and the like during operation. The server (1) may also include an input / output port (16) for connecting an input / output device such as a keyboard, a mouse, or a display device. The non-volatile memory (14) may be composed of an EEPROM (Electrically Erasable Programmable Read-Only Memory) or the like, and the recording device (15) may be composed of a hard disk, SSD, or the like, so that the computer program for realizing the functions of the server (1) may be updated by these devices. The hardware configuration of the service processor (2) is also almost the same as that of the server (1), so a description thereof will be omitted, but it may not include a PCIe switch (12) or a PCIe slot (13).

[0037] Although the present disclosure has been described above with reference to the embodiments, the present disclosure is not limited to the above-mentioned embodiments. Various modifications that can be understood by a person skilled in the art can be made to the configuration and details of the present disclosure within the scope of the present disclosure. Furthermore, each embodiment can be appropriately combined with other embodiments.

[0038] A part or all of the above-described embodiments may be described as, but is not limited to, the following supplementary notes.

[0039] (Appendix 1) It performs processing for initial setting of parameter values ​​related to PCIe, a high-bandwidth expansion bus, and performs various tests with the set parameter values. After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; when receiving a parameter value setting instruction from the service processor, storing the received optimal parameters in a non-volatile memory and performing a process for setting the optimal parameters; A first control means, An information processing device comprising:

[0040] (Appendix 2) The first control means holds, in the non-volatile memory, parameter values ​​before adjustment related to the PCIe, and parameter values ​​during adjustment. 2. An information processing device according to claim 1.

[0041] (Appendix 3) The first control means performs generation confirmation of PCIe devices connected to the PCIe switch and the PCIe slot, and identifies adjustable parameters. 3. The information processing device according to claim 1 or 2.

[0042] (Appendix 4) the first control means performs processing for changing the parameter values ​​by changing a PCIe parameter value on the CPU side, and issuing an instruction to change a parameter value for the PCIe switch and a parameter value for a device connected to the PCIe slot; 4. The information processing device according to claim 3.

[0043] (Appendix 5) The first control means causes the various tests to be performed, including a test of repeatedly resetting the PCIe device to check a link state or a bit error rate, a test of measuring a transmission speed between PCIe devices, and a temperature and voltage test by reading a sensor. 5. An information processing device according to any one of claims 1 to 4.

[0044] (Appendix 6) An information processing device according to any one of appendix 1 to 5; instructing the information processing device to start up a test OS including the function of the first control means; determining the optimal parameter value based on the results of the various tests for all the different parameter values ​​received from the information processing device; issuing an instruction to set the determined optimal parameter value to the information processing device; a service processor having a second control means; A system that is more structured. (Appendix 7) the second control means of the service processor determines that all parameter values ​​exceed a threshold value for each parameter value established for each PCIe device as a candidate for the optimal parameter value; 7. The system of claim 6.

[0045] (Appendix 8) the second control means of the service processor instructs the information processing device to set the optimal parameter value, and then instructs the information processing device to start a normal OS; 8. The system of claim 6 or 7.

[0046] (Appendix 11) It performs processing for initial setting of parameter values ​​related to PCIe, a high-bandwidth expansion bus, and performs various tests with the set parameter values. After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; when receiving a parameter value setting instruction from the service processor, storing the received optimal parameters in a non-volatile memory and performing a process for setting the optimal parameters; A parameter optimization method in which the above is carried out by a computer.

[0047] (Appendix 12) retaining, in the non-volatile memory, parameter values ​​before adjustment related to the PCIe and parameter values ​​during adjustment; 12. The parameter optimization method according to claim 11.

[0048] (Appendix 13) Check the generation of PCIe devices connected to PCIe switches and PCIe slots, and identify adjustable parameters. 13. The parameter optimization method according to claim 11 or 12.

[0049] (Appendix 14) performing a process for changing the parameter values ​​by changing the PCIe parameter values ​​on the CPU side, and issuing an instruction to change the parameter values ​​for the PCIe switch and the parameter values ​​for the device connected to the PCIe slot; 14. The parameter optimization method of claim 13.

[0050] (Appendix 15) The various tests include a test to repeatedly reset the PCIe device to check the link status and bit error rate, a test to measure the transmission speed between PCIe devices, and a temperature and voltage test by reading the sensor. 15. A parameter optimization method according to any one of claims 11 to 14.

[0051] (Appendix 16) For the information processing device according to any one of Supplementary Note 1 to 5, instructing the information processing device to start up a test OS; determining the optimal parameter value based on the results of the various tests for all the different parameter values ​​received from the information processing device; issuing an instruction to set the determined optimal parameter value to the information processing device; A parameter optimization method in which the above is carried out by a computer. (Appendix 17) the second control means of the service processor determines that all parameter values ​​exceed a threshold value for each parameter value established for each PCIe device as a candidate for the optimal parameter value; 17. The parameter optimization method of claim 16.

[0052] (Appendix 18) the second control means of the service processor instructs the information processing device to set the optimal parameter value, and then instructs the information processing device to start a normal OS; 18. The parameter optimization method according to claim 16 or 17.

[0053] (Appendix 21) It performs processing for initial setting of parameter values ​​related to PCIe, a high-bandwidth expansion bus, and performs various tests with the set parameter values. After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; when receiving a parameter value setting instruction from the service processor, storing the received optimal parameters in a non-volatile memory and performing a process for setting the optimal parameters; A program for parameter optimization that causes a computer to execute the following:

[0054] (Appendix 22) retaining, in the non-volatile memory, parameter values ​​before adjustment related to the PCIe and parameter values ​​during adjustment; 22. The program according to claim 21.

[0055] (Appendix 23) Check the generation of PCIe devices connected to PCIe switches and PCIe slots, and identify adjustable parameters. 23. The program according to claim 21 or 22.

[0056] (Appendix 24) performing a process for changing the parameter values ​​by changing the PCIe parameter values ​​on the CPU side, and issuing an instruction to change the parameter values ​​for the PCIe switch and the parameter values ​​for the device connected to the PCIe slot; 24. The program according to claim 23.

[0057] (Appendix 25) The various tests include a test to repeatedly reset the PCIe device to check the link status and bit error rate, a test to measure the transmission speed between PCIe devices, and a temperature and voltage test by reading the sensor. 25. The program according to any one of appendix 21 to 24.

[0058] (Appendix 26) For the information processing device according to any one of Supplementary Note 1 to 5, instructing the information processing device to start up a test OS; determining the optimal parameter value based on the results of the various tests for all the different parameter values ​​received from the information processing device; issuing an instruction to set the determined optimal parameter value to the information processing device; A program for parameter optimization that causes a computer to execute the following: (Appendix 27) the second control means of the service processor determines that all parameter values ​​exceed a threshold value for each parameter value established for each PCIe device as a candidate for the optimal parameter value; 27. The program according to claim 26.

[0059] (Appendix 28) the second control means of the service processor instructs the information processing device to set the optimal parameter value, and then instructs the information processing device to start a normal OS; 28. The program according to claim 26 or 27. [Explanation of symbols]

[0060] 1 Server 2 Service Processor 2a, 11a, 12a, 13a control section 11 CPU 12 PCIe Switch 13 PCIe Slot 14 Non-volatile memory

Claims

1. It performs processing for initial setting of parameter values ​​related to PCIe, a high-bandwidth expansion bus, and performs various tests with the set parameter values. After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; when receiving a parameter value setting instruction from the service processor, storing the received optimal parameters in a non-volatile memory and performing a process for setting the optimal parameters; A first control means, Equipped with The first control means performs generation confirmation of the PCIe device connected to the PCIe switch and the PCIe slot, and identifies adjustable parameters. Information processing device.

2. The first control means holds, in the non-volatile memory, parameter values ​​before adjustment related to the PCIe, and parameter values ​​during adjustment. The information processing device according to claim 1 .

3. the first control means performs processing for changing the parameter values ​​by changing PCIe parameter values ​​on the CPU side, and issuing an instruction to change parameter values ​​for the PCIe switch and parameter values ​​for devices connected to the PCIe slot; The information processing device according to claim 1 .

4. The first control means performs, as the various tests, a test of repeatedly resetting the PCIe device to check a link state or a bit error rate, a test of measuring a transmission speed between PCIe devices, and a temperature / voltage test by reading a sensor. The information processing device according to claim 1 .

5. A method for performing an initial setting process for parameter values ​​related to PCIe, which is a high-bandwidth expansion bus, and performing various tests using the set parameter values; After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; when receiving a parameter value setting instruction from the service processor, storing the received optimal parameters in a non-volatile memory and performing a process for setting the optimal parameters; A first control means, An information processing device comprising: instructing the information processing device to start up a test OS including the function of the first control means; determining the optimal parameter value based on the results of the various tests for all the different parameter values ​​received from the information processing device; issuing an instruction to set the determined optimal parameter value to the information processing device; a service processor having a second control means; A system that is more structured.

6. the second control means of the service processor determines that all parameter values ​​exceed a threshold value for each parameter value established for each PCIe device as a candidate for the optimal parameter value; The system of claim 5.

7. the second control means of the service processor instructs the information processing device to set the optimal parameter value, and then instructs the information processing device to start a normal OS. The system of claim 5.

8. It performs processing for initial setting of parameter values ​​related to PCIe, a high-bandwidth expansion bus, and performs various tests with the set parameter values. After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; When a parameter value setting instruction is received from the service processor, the received optimal parameters are stored in a non-volatile memory, and a process for setting the optimal parameters is performed; Check the generation of PCIe devices connected to PCIe switches and PCIe slots, and identify adjustable parameters. A parameter optimization method in which the above is carried out by a computer.

9. It performs processing for initial setting of parameter values ​​related to PCIe, a high-bandwidth expansion bus, and performs various tests with the set parameter values. After the various tests are performed with the initially set parameter values, a process for setting different parameter values ​​is performed to perform the various tests; Repeating the parameter value setting change and the various tests for all different parameter values; notifying the service processor of the results of the various tests for each of the set parameter values; When a parameter value setting instruction is received from the service processor, the received optimal parameters are stored in a non-volatile memory, and a process for setting the optimal parameters is performed; Check the generation of PCIe devices connected to PCIe switches and PCIe slots, and identify adjustable parameters. A program for parameter optimization that causes a computer to execute the following:

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