Joint Motion Vector Differential Coding

Abstract

The present disclosure relates to encoding and decoding of motion vector difference for inter-predicting video blocks. An example for decoding an inter-predicted video block of a video stream is disclosed. The method includes receiving a coded video bitstream, extracting an inter-prediction mode and a joint delta motion vector (MV) of a current block in a current frame from the coded video bitstream, extracting a flag indicating whether a first delta MV for a first reference frame and a second delta MV for a second reference frame are jointly signaled from the coded video bitstream, deriving a first delta MV and a second delta MV based on the joint delta MV in response to the flag indicating that the first delta MV and the second delta MV are jointly signaled, and decoding the current block in the current frame based on the first delta MV and the second delta MV.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application is based on and claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 245,655, filed September 17, 2021, which is incorporated by reference in its entirety. This application also is based on and claims the benefit of priority to U.S. Nonprovisional Patent Application No. 17 / 700,745, filed March 22, 2022, which is incorporated by reference in its entirety.

[0002] The present disclosure relates to video coding and / or decoding techniques, and more particularly to improved design and signaling of joint motion vector differences for coding and / or decoding. [Background technology]

[0003] The discussion of the background art provided herein is intended to generally present the context of the present disclosure, and the inventors' work is not admitted expressly or impliedly as prior art to the present disclosure to the extent that such work is described in this Background section, along with aspects of the description that may not otherwise be admitted as prior art at the time of filing of this application.

[0004] Video coding and decoding may be performed using inter-picture prediction with motion compensation. Uncompressed digital video may include a sequence of pictures, each having spatial dimensions of, for example, 1920x1080 luminance samples and associated full-sampled or sub-sampled chrominance samples. The sequence of pictures may have a fixed or variable picture rate (also called frame rate), for example, 60 pictures per second or 60 frames per second. Uncompressed video has specific bit rate requirements for streaming or data processing. For example, a video with a pixel resolution of 1920x1080, a frame rate of 60 frames / second, and 4:2:0 chroma subsampling with 8 bits per pixel per color channel requires a bandwidth close to 1.5 Gbit / s. One hour of such video requires more than 600 GByte of storage space.

[0005] One goal of video coding and decoding may be the reduction of redundancy in an uncompressed input video signal through compression. Compression may help reduce the aforementioned bandwidth and / or storage space requirements, in some cases by more than two orders of magnitude. Both lossless and lossy compression, as well as combinations thereof, may be used. Lossless compression refers to techniques where an exact copy of the original signal may be reconstructed from the compressed original signal by the decoding process. Lossy compression refers to a coding / decoding process where the original video information is not fully preserved when coding and cannot be fully restored when decoding. When using lossy compression, the reconstructed signal may not be identical to the original signal, but the distortion between the original and reconstructed signals is small enough to make the reconstructed signal useful for its intended application, even with some information loss. For video, lossy compression is widely adopted in many applications. The amount of distortion that can be tolerated depends on the application. For example, a user of a consumer video streaming application may tolerate higher distortion than a user of a movie or television broadcast application. The compression ratio achievable by a coding algorithm may be selected or adjusted to reflect different distortion tolerances. That is, in general, higher distortion tolerance allows for coding algorithms that result in higher losses and higher compression ratios.

[0006] Video encoders and decoders can utilize techniques from a number of broad categories and steps, including, for example, motion compensation, Fourier transform, quantization, and entropy coding.

[0007] Video codec techniques may include a technique known as intra-coding. In intra-coding, sample values ​​are represented without reference to samples or other data from previously reconstructed reference pictures. In some video codecs, a picture is spatially subdivided into blocks of samples. If all blocks of samples are coded in intra mode, the picture may be called an intra-picture. Intra-pictures and their derivatives, such as independent decoder refresh pictures, may be used to reset the decoder state and thus may be used as the first picture in a coded video bitstream and video session or as a still image. The samples of the block after intra prediction may then undergo a transform to the frequency domain, and the transform coefficients so generated may be quantized before entropy coding. Intra-prediction refers to a technique that minimizes sample values ​​in the pre-transform domain. In some cases, the smaller the DC value after the transform and the smaller the AC coefficients, the fewer bits are required for a given quantization step size to represent the block after entropy coding.

[0008] Conventional intra-coding, for example as known from MPEG-2 generation coding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to code / decode a block based on surrounding sample data and / or metadata that precedes the block of data being intra-coded or intra-decoded in decoding order, e.g., obtained during encoding and / or decoding of spatial neighbors. Such techniques are hereafter referred to as "intra-prediction" techniques. It should be noted that in at least some cases, intra-prediction uses reference data only from the current picture being reconstructed, and not from other reference pictures.

[0009] Intra prediction may take many different forms. If more than one of such techniques is available in a given video coding technique, the technique used may be referred to as an intra prediction mode. One or more intra prediction modes may be provided in a particular codec. In certain cases, a mode may have sub-modes and / or may be associated with various parameters, and the mode / sub-mode information and intra coding parameters of a block of video may be coded separately or collectively included in the codeword of the mode. Which codeword is used for a given mode, sub-mode, and / or parameter combination may affect the coding efficiency gains via intra prediction, and thus may also affect the entropy coding technique used to convert the codeword into a bitstream.

[0010] A mode of intra prediction was introduced in H.264, improved in H.265, and further improved in newer coding techniques such as Joint Search Model (JEM), Versatile Video Coding (VVC), and Benchmark Set (BMS). In general, in intra prediction, a predictor block may be formed using neighboring sample values ​​that become available. For example, available values ​​of a particular neighboring sample set along a certain direction and / or line may be copied to the predictor block. The reference to the direction used may be coded in the bitstream or may itself be predicted.

[0011] Referring to FIG. 1A, shown at the bottom right is a subset of nine predictor directions specified in the 33 possible intra predictor directions of H.265 (corresponding to the 33 angle modes of the 35 intra modes specified in H.265). The point where the arrows converge (101) represents the sample being predicted. The arrows represent the direction from which neighboring samples are used to predict sample 101. For example, arrow (102) indicates that sample (101) is predicted from one or more neighboring samples to the upper right, at an angle of 45 degrees from the horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more neighboring samples to the lower left of sample (101), at an angle of 22.5 degrees from the horizontal.

[0012] 1A, at the top left is depicted a square block (104) of 4×4 samples (indicated by a thick dashed line). The square block (104) contains 16 samples, each labeled with "S", its position in the Y dimension (e.g., row index), and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample (from the top) in the Y dimension and the first sample (from the left) in the X dimension. Similarly, sample S44 is the fourth sample in both the Y and X dimensions in the block (104). Since the size of the block is 4×4 samples, S44 is at the bottom right. Also shown are examples of reference samples that follow a similar numbering scheme. The reference samples are labeled with R, their Y position (e.g., row index) and X position (column index) relative to the block (104). In both H.264 and H.265, predicted samples neighboring the block being reconstructed are used.

[0013] Intra-picture prediction of block 104 may start by copying reference sample values ​​from adjacent samples according to a signaled prediction direction. For example, assume that the coded video bitstream includes signaling for this block 104 indicating the prediction direction of the arrow (102), i.e., the sample is predicted from one or more prediction samples to the upper right and at an angle of 45 degrees from the horizontal. In such a case, samples S41, S32, S23, S14 are predicted from the same reference sample R05. Then, sample S44 is predicted from reference sample R08.

[0014] In certain cases, especially when the orientation is not evenly divisible by 45 degrees, the values ​​of multiple reference samples may be combined, for example by interpolation, to calculate the reference sample.

[0015] The number of possible directions has increased as video coding technology continues to develop. In H.264 (2003), for example, nine different directions are available for intra prediction. This increases to 33 in H.265 (2013), and JEM / VVC / BMS can support up to 65 directions at the time of this disclosure. Experimental studies have been conducted to help identify the most suitable intra prediction directions, and certain techniques of entropy coding may be used to encode those most suitable directions with a small number of bits, accepting a certain bit penalty for the direction. Furthermore, the direction itself may be predicted from the neighboring directions used in the intra prediction of the decoded neighboring blocks.

[0016] FIG. 1B shows a schematic diagram (180) showing 65 intra prediction directions according to JEM to illustrate the increasing number of prediction directions in various encoding techniques that have evolved over time.

[0017] Methods for mapping bits representing intra-prediction directions in a coded video bitstream to prediction directions can vary across video coding techniques and can range, for example, from simple direct mappings of prediction directions to intra-prediction modes to complex adaptation schemes involving codewords, most-probable modes, and similar techniques. In all cases, however, there may be certain directions of intra-prediction that are statistically less likely to occur in the video content than certain other directions. Because the goal of video compression is to reduce redundancy, in a well-designed video coding technique, these less likely directions may be represented with more bits than the more likely directions.

[0018] Inter-picture prediction, or inter-prediction, may be based on motion compensation. In motion compensation, sample data from a previously reconstructed picture or part thereof (reference picture) may be used to predict a newly reconstructed picture or picture part (e.g., block) after being spatially shifted in a direction indicated by a motion vector (hereafter MV). In some cases, the reference picture may be the same as the picture currently being reconstructed. The MV may have two dimensions X and Y, or three dimensions, with the third dimension being an indication of the reference picture to be used (similar to the temporal dimension).

[0019] In some video compression techniques, a current MV applicable to a particular area of ​​sample data may be predicted from other MVs, e.g., other MVs related to other areas of sample data that are spatially adjacent to the area being reconstructed and that precede the current MV in decoding order. Doing so may significantly reduce the overall amount of data required to code the MV by relying on the removal of redundancy in correlated MVs, thereby increasing compression efficiency. MV prediction may work effectively because, for example, when coding an input video signal derived from a camera (known as natural video), areas larger than the area to which a single MV is applicable have a statistical likelihood to move in a similar direction in the video sequence, and therefore, in some cases, may be predicted using similar motion vectors derived from MVs of neighboring areas. As a result, the actual MV of a given area is similar or identical to the MV predicted from the surrounding MVs. Such MVs may further be represented with fewer bits after entropy coding than would be used if the MV was directly coded instead of predicted from the neighboring MV(s). In some cases, MV prediction may be an example of lossless compression of a signal (i.e., MV) derived from an original signal (i.e., sample stream). In other cases, the MV prediction itself may be lossy, for example due to rounding errors when computing a predictor from several surrounding MVs.

[0020] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, "High Efficiency Video Coding", December 2016). Among the many MV prediction mechanisms specified by H.265, the one described below is a technique hereafter referred to as "spatial merging".

[0021] Specifically, referring to FIG. 2, a current block (201) contains samples that are detected by the encoder during the motion search process as predictable from a spatially shifted previous block of the same size. Instead of coding its MV directly, the MV can be derived from metadata associated with one or more reference pictures, e.g., from the last reference picture (in decoding order), using the MV associated with any one of the five surrounding samples represented as A0, A1, and B0, B1, B2 (202 to 206, respectively). In H.265, MV prediction can use predictors from the same reference picture that neighboring blocks are using. Summary of the Invention [Means for solving the problem]

[0022] This disclosure describes various embodiments of methods, apparatus, and computer-readable storage media for video encoding and / or decoding.

[0023] According to one aspect, an embodiment of the present disclosure provides a method for decoding an inter-predicted video block. The method includes receiving, by a device, a coded video bitstream. The device includes a memory that stores instructions and a processor that communicates with the memory. The method also includes extracting, by the device, an inter-prediction mode and a joint delta motion vector (MV) of a current block in a current frame from the coded video bitstream, extracting, by the device, a flag indicating whether a first delta MV for a first reference frame and a second delta MV for a second reference frame are jointly signaled from the coded video bitstream, deriving, by the device, a first delta MV and a second delta MV based on the joint delta MV in response to the flag indicating that the first delta MV and the second delta MV are jointly signaled, and decoding, by the device, the current block in the current frame based on the first delta MV and the second delta MV.

[0024] According to another aspect, an embodiment of the present disclosure provides an apparatus for video encoding and / or decoding, the apparatus including a memory storing instructions and a processor in communication with the memory, the processor being configured to cause the apparatus to perform the above-mentioned method for video decoding and / or encoding when the processor executes the instructions.

[0025] Aspects of the present disclosure also provide a video encoding or decoding device or apparatus including circuitry configured to perform any of the above method embodiments.

[0026] In another aspect, an embodiment of the present disclosure provides a non-transitory computer-readable medium storing instructions that, when executed by a computer for video decoding and / or encoding, cause the computer to perform the above-described method for video decoding and / or encoding.

[0027] These and other aspects and their implementations are described in further detail in the drawings, specification, and claims.

[0028] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0029] [Figure 1A] FIG. 13 is a schematic diagram of an example subset of intra-prediction directional modes. [Figure 1B] FIG. 2 illustrates an exemplary intra-prediction direction. [Diagram 2] FIG. 2 is a schematic diagram illustrating a current block and its surrounding spatial merge candidates for motion vector prediction in one example. [Diagram 3] FIG. 3 is a schematic diagram illustrating a simplified block diagram of a communication system (300) according to an example embodiment. [Figure 4] FIG. 4 is a schematic diagram illustrating a simplified block diagram of a communication system (400) according to an example embodiment. [Diagram 5] FIG. 2 is a schematic diagram illustrating a simplified block diagram of a video decoder according to an example embodiment. [Figure 6] FIG. 1 is a schematic diagram illustrating a simplified block diagram of a video encoder according to an example embodiment. [Figure 7] FIG. 13 is a block diagram of a video encoder according to another example embodiment. [Figure 8] FIG. 13 is a block diagram of a video decoder according to another example embodiment. [Figure 9]FIG. 2 illustrates a coding block partitioning scheme according to an exemplary embodiment of the present disclosure. [Figure 10] FIG. 13 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 11] FIG. 13 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 12] FIG. 2 illustrates an exemplary division of a base block into coding blocks according to an exemplary division scheme. [Figure 13] FIG. 2 illustrates an exemplary ternary splitting scheme. [Figure 14] FIG. 2 illustrates an exemplary quad-tree / binary-tree coding block partitioning scheme. [Figure 15] 2 illustrates a scheme for splitting a coding block into multiple transform blocks and the coding order of the transform blocks according to an exemplary embodiment of the present disclosure. [Figure 16] 10A-10C are diagrams illustrating other ways of splitting a coding block into multiple transform blocks and the coding order of the transform blocks according to an exemplary embodiment of the present disclosure. [Figure 17] FIG. 13 illustrates another scheme for splitting a coding block into multiple transform blocks, according to an exemplary embodiment of the present disclosure. [Figure 18] FIG. 2 illustrates a flowchart of a method according to an embodiment of the present disclosure. [Figure 19] FIG. 1 is a schematic diagram of a computer system according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] The present invention will now be described in detail below with reference to the accompanying drawings, which form a part hereof, and which show by way of illustration specific examples of embodiments. It should be noted, however, that the present invention may be embodied in a variety of different forms, and thus the subject matter encompassed or claimed is not intended to be construed as being limited to any of the embodiments described below. It should also be noted that the present invention may be embodied as a method, device, component, or system. Thus, embodiments of the present invention may take the form of, for example, hardware, software, firmware, or any combination thereof.

[0031] Throughout this specification and the claims, terms may have subtle meanings that are suggested or implied in the context beyond the meaning explicitly stated. The phrases "in one embodiment" or "in some embodiments" used herein do not necessarily refer to the same embodiment, and the phrases "in other embodiments" or "in other embodiments" used herein do not necessarily refer to different embodiments. Similarly, the phrases "in one implementation" or "in some implementations" used herein do not necessarily refer to the same implementation, and the phrases "in other implementations" or "in other implementations" used herein do not necessarily refer to different implementations. For example, the claimed subject matter is intended to include all or part of the exemplary embodiments / implementations.

[0032] Generally, terms may be understood at least in part from their usage in context. For example, terms such as "and", "or", or "and / or" as used herein may include various meanings that may depend at least in part on the context in which such terms are used. Typically, "or" when used to relate a list such as A, B, or C is intended to mean A, B, and C, which are used here in an inclusive sense, as well as A, B, or C, which are used here in an exclusive sense. Furthermore, the terms "one or more" or "at least one" as used herein may be used to describe any feature, structure, or characteristic in a singular sense, or may be used to describe a combination of features, structures, or characteristics in a plural sense, depending at least in part on the context. Similarly, terms such as "a", "an", or "the" may also be understood to convey a singular usage or a plural usage, depending at least in part on the context. Further, it will be understood that the terms "based on" or "determined by" are not necessarily intended to convey an exclusive set of factors, but instead may permit the existence of additional factors not necessarily explicitly described, also depending at least in part on the context.

[0033] FIG. 3 shows a simplified block diagram of a communication system (300) according to one embodiment of the present disclosure. The communication system (300) includes a plurality of terminal devices that can communicate with each other, for example, via a network (350). For example, the communication system (300) includes a first pair of terminal devices (310) and (320) interconnected via the network (350). In the example of FIG. 3, the first pair of terminal devices (310) and (320) may perform unidirectional transmission of data. For example, the terminal device (310) may code video data (e.g., of a stream of video pictures captured by the terminal device (310)) for transmission to the other terminal device (320) via the network (350). The encoded video data may be transmitted in the form of one or more coded video bitstreams. The terminal device (320) may receive the coded video data from the network (350), decode the coded video data to reconstruct the video pictures, and display the video pictures according to the reconstructed video data. Unidirectional data transmission may be implemented in media serving applications and the like.

[0034] In another example, the communication system (300) includes a second pair of terminal devices (330) and (340) for bidirectional transmission of coded video data, which may be implemented, for example, during video conferencing applications. For the bidirectional transmission of data, in one example, each of the terminal devices (330) and (340) may code video data (e.g., of a stream of video pictures captured by that terminal device) for transmission to the other of the terminal devices (330) and (340) over the network (350). Each of the terminal devices (330) and (340) may also receive coded video data transmitted by the other of the terminal devices (330) and (340), decode the coded video data to reconstruct the video pictures, and display the video pictures on an accessible display device in accordance with the reconstructed video data.

[0035] In the example of FIG. 3, terminal devices (310), (320), (330), and (340) may be embodied as a server, a personal computer, and a smartphone, although the applicability of the principles underlying the present disclosure is not so limited. The embodiments of the present disclosure may be implemented in desktop computers, laptop computers, tablet computers, media players, wearable computers, dedicated video conferencing equipment, and the like. Network (350) represents any number or type of network that conveys coded video data between terminal devices (310), (320), (330), and (340), including, for example, wired (cabled) and / or wireless communication networks. Communication network (350) 9 may exchange data over circuit-switched channels, packet-switched channels, and / or other types of channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this discussion, the architecture and topology of network (350) may not be important to the operation of the present disclosure unless explicitly described herein.

[0036] 4 illustrates an arrangement of video encoders and video decoders in a video streaming environment as an example of an application of the subject matter of this disclosure. The subject matter of this disclosure may be equally applied to other video-enabled applications including, for example, video conferencing, digital television broadcasting, gaming, virtual reality, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0037] The video streaming system may include a video source (401) for creating a stream of uncompressed video pictures or images (402), such as a video capture subsystem (413) that may include a digital camera. In one example, the stream of video pictures (402) includes samples recorded by the digital camera of the video source 401. The stream of video pictures (402) is shown in bold to emphasize its high amount of data compared to the encoded video data (404) (or coded video bitstream) and may be processed by an electronic device (420) that includes a video encoder (403) coupled to the video source (401). The video encoder (403) may include hardware, software, or a combination thereof to enable or implement aspects of the subject matter of this disclosure as described in more detail below. The encoded video data (404) (or encoded video bitstream (404)), shown with thin lines to emphasize its low amount of data compared to the stream of uncompressed video pictures (402), may be stored directly on the streaming server (405) or on a downstream video device (not shown) for future use. One or more streaming client subsystems, such as the client subsystems (406) and (408) of FIG. 4, may access the streaming server (405) to obtain copies (407) and (409) of the encoded video data (404). The client subsystem (406) may include a video decoder (410), for example, in the electronic device (430). The video decoder (410) decodes the input copy of the encoded video data (407) and creates an output stream of video pictures (411) that is uncompressed and may be rendered on a display (412) (e.g., a display screen) or other rendering device (not shown). The video decoder 410 may be configured to perform some or all of the various functions described in this disclosure.In some streaming systems, the encoded video data (404), (407), and (409) (e.g., video bitstreams) may be encoded according to a particular video coding / compression standard. Examples of such standards include ITU-T Recommendation H.265. In one example, a video coding standard under development is informally known as Versatile Video Coding (VVC). The subject matter of this disclosure may be used in the context of VVC, as well as other video coding standards.

[0038] It should be noted that the electronic devices (420) and (430) may include other components (not shown). For example, the electronic device (420) may include a video decoder (not shown), and the electronic device (430) may also include a video encoder (not shown).

[0039] 5 shows a block diagram of a video decoder (510) according to any of the following embodiments of the present disclosure. The video decoder (510) may be included in an electronic device (530). The electronic device (530) may include a receiver (531) (e.g., a receiving circuit). The video decoder (510) may be used in place of the video decoder (410) of the example of FIG. 4.

[0040] The receiver (531) may receive one or more coded video sequences to be decoded by the video decoder (510). In the same or other embodiments, one coded video sequence may be decoded at a time, with the decoding of each coded video sequence being independent of the other coded video sequences. Each video sequence may be associated with multiple video frames or images. The coded video sequences may be received from a channel (501), which may be a hardware / software link to a storage device that stores the encoded video data, or a streaming source that transmits the encoded video data. The receiver (531) may receive the encoded video data along with other data, such as coded audio data and / or auxiliary data streams, which may be forwarded to respective processing circuits (not shown). The receiver (531) may separate the coded video sequences from the other data. To combat network jitter, a buffer memory (515) may be placed between the receiver (531) and the entropy decoder / parser (520) (hereafter "parser (520)"). In certain applications, the buffer memory (515) may be implemented as part of the video decoder (510). In other applications, the buffer memory (515) may be separate and external to the video decoder (510) (not shown). In still other applications, there may be a buffer memory (not shown) external to the video decoder (510), for example to combat network jitter, and there may be other additional buffer memories (515) internal to the video decoder (510), for example to handle playback timing. When the receiver (531) is receiving data from a storage / forwarding device with sufficient bandwidth and controllability, or from an isosynchronous network, the buffer memory (515) may be unnecessary or may be small.For use with best-effort packet networks such as the Internet, a buffer memory (515) of sufficient size may be required, which may be relatively large in size. Such a buffer memory may be implemented with an adaptive size and may be implemented at least in part in an operating system or similar element (not shown) external to the video decoder (510).

[0041] The video decoder (510) may include a parser (520) to recover symbols (521) from the coded video sequence. These categories of symbols include information used to manage the operation of the video decoder (510) and potentially information for controlling a rendering device such as a display (512) (e.g., a display screen) that may or may not be an integral part of the electronic device (530) but may be coupled to the electronic device (530) as shown in FIG. 5. The control information for the rendering device(s) may be in the form of a supplemental enhancement information (SEI message) or a video usability information (VUI) parameter set fragment (not shown). The parser (520) may parse / entropy decode the coded video sequence received by the parser (520). The entropy coding of the coded video sequence may be according to a video coding technique or standard and according to various principles including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The parser (520) may extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the subgroup. The subgroups may include Group of Pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser (520) may also extract information from the coded video sequence, such as transform coefficients (e.g., Fourier transform coefficients), quantization parameter values, motion vectors, etc.

[0042] The parser (520) can perform an entropy decoding / parsing operation on the video sequence received from the buffer memory (515) to produce symbols (521).

[0043] The reconstruction of the symbols (521) may involve a number of different processing or functional units, depending on the type of video picture or portion thereof being coded (inter-picture and intra-picture, inter-block and intra-block, etc.), as well as other factors. The units that are included and how they are included may be controlled by subgroup control information parsed from the coded video sequence by the parser (520). The flow of such subgroup control information between the parser (520) and the following processing or functional units is not shown for the sake of simplicity.

[0044] Besides the functional blocks already mentioned, the video decoder (510) may be conceptually subdivided into several functional units, as described below. In an actual implementation operating under commercial constraints, many of these functional units may closely interact with each other and may be, at least in part, integrated with each other. However, in order to clearly explain the various functions of the subject matter of this disclosure, a conceptual subdivision into functional units is adopted in the following disclosure.

[0045] The first unit may include a scalar / inverse transform unit (551), which may receive quantized transform coefficients as well as control information from the parser (520) including information indicating which type of inverse transform to use, block size, quantization coefficients / parameters, quantization scaling matrices, etc. The scalar / inverse transform unit (551) may output a block containing sample values ​​that may be input to an aggregator (555).

[0046] In some cases, the output samples of the scaler / inverse transform (551) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture, but may use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by an intra-picture prediction unit (552). In some cases, the intra-picture prediction unit (552) may generate a block of the same size and shape as the block being reconstructed using information of surrounding blocks that have already been reconstructed and stored in the current picture buffer (558). The current picture buffer (558) may, for example, buffer the partially reconstructed and / or fully reconstructed current picture. In some implementations, the aggregator (555) may add, on a sample-by-sample basis, the prediction information generated by the intra-prediction unit (552) to the output sample information provided by the scaler / inverse transform unit (551).

[0047] In other cases, the output samples of the scalar / inverse transform unit (551) may relate to an inter-coded, potentially motion-compensated block. In such cases, the motion compensated prediction unit (553) may access the reference picture memory (557) to fetch samples used for inter-picture prediction. After motion compensating the fetched samples according to the symbols (521) related to the block, these samples may be added to the output of the scalar / inverse transform unit (551) by the aggregator (555) to generate output sample information (the output of unit 551 may be referred to as a residual sample or residual signal). The address in the reference picture memory (557) from which the motion compensated prediction unit (553) fetches the prediction sample may be controlled by a motion vector, available to the motion compensated prediction unit (553) in the form of a symbol (521), which may have, for example, an X component, a Y component (shift), and a reference picture component (time). Motion compensation may also include interpolation of sample values ​​fetched from a reference picture memory (557) when sub-sample accurate motion vectors are used, and may be associated with a motion vector prediction mechanism, etc.

[0048] The output samples of the aggregator (555) may be subjected to various loop filtering techniques in the loop filter unit (556). Video compression techniques may include in-loop filter techniques that are controlled by parameters included in the coded video sequence (also called the coded video bitstream) and made available to the loop filter unit (556) as symbols (521) from the parser (520), but may also react to previously reconstructed and loop filtered sample values ​​as well as to meta-information obtained during decoding of previous portions (in decoding order) of the coded picture or coded video sequence. As described in more detail below, several types of loop filters may be included as part of the loop filter unit 556 in various orders.

[0049] The output of the loop filter unit (556) may be a sample stream that may be output to a rendering device (512) and may also be stored in a reference picture memory (557) for use in future inter-picture prediction.

[0050] Once a particular coded picture is fully reconstructed, it may be used as a reference picture for future inter-picture prediction. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture is identified (e.g., by the parser (520)) as a reference picture, the current picture buffer (558) may become part of the reference picture memory (557), and any unused current picture buffer may be reallocated before beginning reconstruction of the next coded picture.

[0051] The video decoder (510) may perform decoding operations according to a given video compression technique adopted in a standard such as, for example, ITU-T Rec. H.265. The coded video sequence may conform to the syntax specified by the video compression technique or standard being used, in the sense that the coded video sequence adheres to both the syntax of the video compression technique or standard and the profile documented in the video compression technique or standard. Specifically, a profile may select certain tools from among all tools available in the video compression technique or standard as tools dedicated to use only under that profile. To conform to a standard, the complexity of the coded video sequence may be within a range defined by a level of the video compression technique or standard. In some cases, the level limits the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in megasamples per second), maximum reference image size, etc. The limits set by the level may be further limited in some cases by a hypothetical reference decoder (HRD) specification and metadata for HRD buffer management signaled in the coded video sequence.

[0052] In some exemplary embodiments, the receiver (531) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence(s). The additional data may be used by the video decoder (510) to properly decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0053] 6 shows a block diagram of a video encoder (603) according to an exemplary embodiment of the present disclosure. The video encoder (603) may be included in an electronic device (620). The electronic device (620) may further include a transmitter (640) (e.g., a transmission circuit). The video encoder (603) may be used in place of the video encoder (403) of the example of FIG.

[0054] The video encoder (603) may receive video samples from a video source (601) (which is not part of the electronic device (620) in the example of FIG. 6) that may capture the video image(s) to be coded by the video encoder (603). In another example, the video source (601) may be implemented as part of the electronic device (620).

[0055] The video source (601) may provide a source video sequence to be coded by the video encoder (603) in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 YCrCb, RGB, XYZ...), and any suitable sampling structure (e.g., YCrCb 4:2:0, YCrCb 4:4:4). In a media serving system, the video source (601) may be a storage device that can store previously prepared video. In a video conferencing system, the video source (601) may be a camera that captures local image information as a video sequence. The video data may be provided as multiple individual pictures or images that give motion when viewed in sequence. The picture itself may be organized as a spatial array of pixels, each pixel may contain one or more samples, depending on the sampling structure, color space, etc. being used. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0056] According to some example embodiments, the video encoder (603) may code and compress pictures of a source video sequence into a coded video sequence (643) in real time or under any other time constraint required by the application. Enforcing an appropriate coding rate constitutes one function of the controller (650). In some embodiments, the controller (650) may be operatively coupled to and control other functional units as described below. For simplicity, couplings are not shown. Parameters set by the controller (650) may include rate control related parameters (picture skip, quantizer, lambda value of rate distortion optimization technique, etc.), picture size, Group of Pictures (GOP) layout, maximum motion vector search range, etc. The controller (650) may be configured with other appropriate functions associated with the video encoder (603) optimized for a certain system design.

[0057] In some example embodiments, the video encoder (603) may be configured to operate in a coding loop. As an oversimplified explanation, in one example, the coding loop may include a source coder (630) (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be coded and a reference picture(s)) and a (local) decoder (633) embedded in the video encoder (603). The decoder (633) reconstructs the symbols to create sample data in a similar manner as a (remote) decoder would create them, even if the embedded decoder 633 processes the video stream coded by the source coder 630 without entropy coding (since in the video compression techniques considered in the subject matter of this disclosure, any compression between the symbols and the coded video bitstream may be lossless). The reconstructed sample stream (sample data) is input to a reference picture memory (634). Since decoding of the symbol stream leads to bit-exact results regardless of the location of the decoder (local or remote), the contents in the reference picture memory (634) are also bit-exact between the local and remote encoders. In other words, the predictive part of the encoder "sees" exactly the same sample values ​​as the reference picture samples that the decoder will "see" when using prediction during decoding. This basic principle of reference picture synchrony (and the resulting drift if synchrony cannot be maintained, e.g., due to channel errors) is used to improve coding quality.

[0058] The operation of the "local" decoder (633) may be the same as the operation of a "remote" decoder, such as the video decoder (510), already described in detail above in conjunction with Figure 5. Referring also briefly to Figure 5, however, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder (645) and parser (520) may be lossless, the entropy decoding portion of the video decoder (510), including the buffer memory (515) and parser (520), may not be fully implemented in the local decoder (633) within the encoder.

[0059] At this point, it can be said that any decoder technology, except for analysis / entropy decoding, which may only exist in the decoder, may also necessarily need to exist in the corresponding encoder in substantially the same functional form. For this reason, the subject matter of this disclosure may focus on the decoder operation, which is similar to the decoding part of the encoder. Thus, the description of the encoder technology may be omitted, since it is the reverse of the decoder technology described in general. Only in certain areas or aspects, a more detailed description of the encoder is provided below.

[0060] In operation, in some example implementations, the source coder (630) may perform motion-compensated predictive coding, which predictively codes an input picture with reference to one or more previously coded pictures from a video sequence designated as "reference pictures." In this manner, the coding engine (632) codes color channel differences (or residuals) between pixel blocks of the input picture and pixel blocks of the reference picture(s) that may be selected as predictive reference(s) to the input picture. The terms "residue" and its adjective form "residual" may be used interchangeably.

[0061] The local video decoder (633) may decode the coded video data of pictures that may be designated as reference pictures based on the symbols created by the source coder (630). The operation of the coding engine (632) may advantageously be a lossy process. When the coded video data may be decoded in a video decoder (not shown in FIG. 6), the reconstructed video sequence may be a replica of the source video sequence, usually with some errors. The local video decoder (633) may replicate the decoding process that may be performed by the video decoder on the reference pictures and store the reconstructed reference pictures in a reference picture cache (634). In this way, the video encoder (603) may locally store (without transmission errors) copies of reconstructed reference pictures that have common content with reconstructed reference pictures obtained by a far-end (remote) video decoder.

[0062] The predictor (635) may perform a prediction search for the coding engine (632). That is, for a new picture to be coded, the predictor (635) may search the reference picture memory (634) for sample data (as candidate reference pixel blocks) or specific metadata such as reference picture motion vectors, block shapes, etc., that may serve as suitable prediction references for the new picture. The predictor (635) may operate on sample blocks on a pixel block by pixel block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (635), the input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory (634).

[0063] The controller (650) can manage the coding operations of the source coder (630), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0064] The output of all the aforementioned functional units may undergo entropy coding in an entropy coder (645), which converts the symbols produced by the various functional units into a coded video sequence by lossless compression of the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0065] The transmitter (640) may buffer the coded video sequence created by the entropy coder (645) and prepare it for transmission over a communication channel (660), which may be a hardware / software link to a storage device that stores the encoded video data. The transmitter (640) may merge the coded video data from the video coder (603) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0066] The controller (650) can manage the operation of the video encoder (603). During coding, the controller (650) can assign a particular coded picture type to each coded picture, which may affect the coding techniques that may be applied to the respective picture. For example, pictures may often be assigned as any of the following picture types:

[0067] An intra picture (I-picture) may be one that can be coded and decoded without using other pictures in a sequence as a source of prediction. Some video codecs allow different types of intra pictures, including, for example, independent decoder refresh ("IDR") pictures. Those skilled in the art are aware of these variations of I-pictures and their respective uses and characteristics.

[0068] A predictive picture (P picture) may be a picture that can be coded and decoded using intra- or inter-prediction, which uses at most one motion vector and reference index to predict sample values ​​for each block.

[0069] A bidirectionally predicted picture (B-picture) may be a picture that can be coded and decoded using intra- or inter-prediction that uses up to two motion vectors and reference indices to predict the sample values ​​of each block. Similarly, a multi-predicted picture may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0070] A source picture may generally be spatially subdivided into multiple sample coding blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and coded block by block. Blocks may be predictively coded with reference to other (already coded) blocks as determined by the coding assignment applied to the block's respective picture. For example, blocks of an I picture may be non-predictively coded or predictively coded with reference to already coded blocks of the same picture (spatial or intra prediction). Pixel blocks of a P picture may be predictively coded via spatial prediction or via temporal prediction with reference to one previously coded reference picture. Blocks of a B picture may be predictively coded by spatial prediction or by temporal prediction with reference to one or two previously coded reference pictures. Source pictures or intermediate processed pictures may be subdivided into other types of blocks for other purposes. The division of coding blocks and other types of blocks may or may not follow the same method, as described in more detail below.

[0071] The video encoder (603) may perform coding operations in accordance with a given video coding technique or standard, such as ITU-T Rec. H.265. In its operations, the video encoder (603) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.

[0072] In some example embodiments, the transmitter (640) may transmit additional data along with the encoded video. The source coder (630) may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures or slices, SEI messages, VUI parameter set fragments, etc.

[0073] Video may be captured in time sequence as multiple source pictures (video pictures). Intra-picture prediction (often abbreviated as intra prediction) exploits spatial correlation in a given picture, while inter-picture prediction exploits temporal or other correlation between pictures. For example, a particular picture being encoded / decoded, called the current picture, may be divided into blocks. If a block in the current picture resembles a reference block in a previously coded yet buffered reference picture in the video, it may be coded by a vector, called a motion vector. A motion vector points to a reference block in a reference picture, and may have a third dimension that identifies the reference picture if multiple reference pictures are used.

[0074] In some exemplary embodiments, bi-prediction techniques may be used for inter-picture prediction. According to such bi-prediction techniques, two reference pictures, such as a first reference picture and a second reference picture, are used, both of which advance the current picture in the video in decoding order (but may be in the past or future, respectively, in display order). A block in the current picture may be coded by a first motion vector pointing to a first reference block in the first reference picture and a second motion vector pointing to a second reference block in the second reference picture. A block may be jointly predicted by a combination of the first reference block and the second reference block.

[0075] Additionally, merge mode techniques may be used to improve coding efficiency in inter-picture prediction.

[0076] According to some exemplary embodiments of the present disclosure, predictions such as inter-picture prediction and intra-picture prediction are performed on a block-by-block basis. For example, a picture in a sequence of video pictures is divided into coding tree units (CTUs) for compression, and the CTUs in a picture may have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. In general, a CTU may include three parallel coding tree blocks (CTBs), namely, one luma CTB and two chroma CTBs. Each CTU may be recursively quad-tree partitioned into one or more coding units (CUs). For example, a CTU of 64×64 pixels may be partitioned into one CU of 64×64 pixels, or four CUs of 32×32 pixels. Each of one or more of the 32×32 blocks may be further partitioned into four CUs of 16×16 pixels. In some exemplary embodiments, each CU may be analyzed during encoding to determine its prediction type among various prediction types, such as inter prediction type and intra prediction type. A CU may be divided into one or more prediction units (PUs) according to temporal and / or spatial predictability. In general, each PU includes one luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed on a prediction block basis. The division of a CU into PUs (or PBs of different color channels) may be performed in various spatial patterns. A luma PB or a chroma PB may include a matrix of sample values ​​(e.g., luma values), such as, for example, 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, etc.

[0077] 7 shows a diagram of a video encoder (703) according to another exemplary embodiment of this disclosure. The video encoder (703) is configured to receive a processed block (e.g., a predictive block) of sample values ​​in a current video picture in a sequence of video pictures and to encode the processed block into a coded picture that is part of a coded video sequence. The exemplary video encoder (703) may be used in place of the example video encoder (403) of FIG. 4.

[0078] For example, the video encoder (703) receives a matrix of sample values ​​for a processing block, such as a prediction block of 8x8 samples. The video encoder (703) then determines, for example using rate distortion optimization (RDO), whether the processing block is best coded using intra-mode, inter-mode, or bi-predictive mode. If it is determined that the processing block is coded in intra-mode, the video encoder (703) may encode the processing block into a coded picture using intra-prediction techniques, and if it is determined that the processing block is coded in inter-mode or bi-predictive mode, the video encoder (703) may encode the processing block into a coded picture using inter-prediction techniques or bi-prediction techniques, respectively. In some exemplary embodiments, a merge mode may be used as a sub-mode of inter-picture prediction, in which motion vectors are derived from one or more motion vector predictors without the benefit of coded motion vector components outside the predictors. In some other exemplary embodiments, there may be motion vector components applicable to the current block. Accordingly, the video encoder (703) may include components not explicitly shown in FIG. 7, such as a mode decision module, to determine the prediction mode of a processing block.

[0079] In the example of FIG. 7, the video encoder (703) includes an inter-encoder (730), an intra-encoder (722), a residual calculator (723), a switch (726), a residual encoder (724), a general-purpose controller (721), and an entropy encoder (725), coupled to each other as shown in the exemplary configuration of FIG.

[0080] The inter-encoder (730) is configured to receive samples of a current block (e.g., a processing block), compare the block to one or more reference blocks in a reference picture (e.g., blocks in previous and subsequent pictures in display order), generate inter-prediction information (e.g., a description of redundancy information, motion vectors, merge mode information according to an inter-encoding technique), and calculate an inter-prediction result (e.g., a predicted block) based on the inter-prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture that has been decoded based on the encoded video information using a decoding unit 633 incorporated in the example encoder 620 of FIG. 6 (shown as residual decoder 728 of FIG. 7, as described in more detail below).

[0081] The intra encoder (722) is configured to receive samples of a current block (e.g., a processing block), compare the block to already coded blocks in the same picture, generate transformed quantized coefficients, and possibly also generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). The intra encoder (722) may calculate intra prediction results (e.g., predicted blocks) based on the intra prediction information and reference blocks in the same picture.

[0082] The generic controller (721) may be configured to determine generic control data and control other components of the video encoder (703) based on the generic control data. In one example, the generic controller (721) determines a prediction mode of a block and provides a control signal to the switch (726) based on the prediction mode. For example, if the prediction mode is an intra mode, the generic controller (721) controls the switch (726) to select an intra mode result for use by the residual calculator (723) and controls the entropy encoder (725) to select intra prediction information and include the intra prediction information in the bitstream, and if the prediction mode of the block is an inter mode, the generic controller (721) controls the switch (726) to select an inter prediction result for use by the residual calculator (723) and controls the entropy encoder (725) to select inter prediction information and include the inter prediction information in the bitstream.

[0083] The residual calculator (723) may be configured to calculate a difference (residual data) between a received block and a prediction result for a block selected from the intra-encoder (722) or the inter-encoder (730). The residual encoder (724) may be configured to encode the residual data to generate transform coefficients. For example, the residual encoder (724) may be configured to transform the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various exemplary embodiments, the video encoder (703) also includes a residual decoder (728). The residual decoder (728) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data may be used by the intra-encoder (722) and the inter-encoder (730) as appropriate. For example, the inter-encoder (730) may generate decoded blocks based on the decoded residual data and the inter-prediction information, and the intra-encoder (722) may generate decoded blocks based on the decoded residual data and the intra-prediction information. The decoded blocks may be appropriately processed to generate decoded pictures, which may be buffered in a memory circuit (not shown) and used as reference pictures.

[0084] The entropy encoder (725) may be configured to format a bitstream to include the encoded block and perform entropy coding. The entropy encoder (725) may be configured to include various information in the bitstream. For example, the entropy encoder (725) may be configured to include general control data, selected prediction information (e.g., intra-prediction information or inter-prediction information), residual information, and other suitable information in the bitstream. Residual information may not be present when coding a block in a merged sub-mode of either an inter mode or a bi-prediction mode.

[0085] 8 shows a diagram of an example video decoder (810) according to another embodiment of the present disclosure. The video decoder (810) is configured to receive coded pictures that are part of a coded video sequence and decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (810) may be used in place of the example video decoder (410) of FIG. 4.

[0086] In the example of FIG. 8, the video decoder (810) includes an entropy decoder (871), an inter-decoder (880), a residual decoder (873), a reconstruction module (874), and an intra-decoder (872), all coupled together as shown in the exemplary configuration of FIG. 8.

[0087] The entropy decoder (871) may be configured to reconstruct from the coded picture certain symbols that represent the syntax elements of which the coded picture is composed. Such symbols may include, for example, prediction information (e.g., intra-mode, inter-mode, bi-predictive mode, merged submode, or another submode) that may identify the mode in which the block is coded, certain samples or metadata used for prediction by the intra-decoder (872) or inter-decoder (880), residual information, for example in the form of quantized transform coefficients, etc. In one example, if the prediction mode is an inter-mode or bi-predictive mode, the inter-prediction information is provided to the inter-decoder (880), and if the prediction type is an intra-prediction type, the intra-prediction information is provided to the intra-decoder (872). The residual information may undergo inverse quantization and is provided to the residual decoder (873).

[0088] The inter decoder (880) may be configured to receive the inter prediction information and generate inter prediction results based on the inter prediction information.

[0089] The intra decoder (872) may be configured to receive intra prediction information and to generate a prediction result based on the intra prediction information.

[0090] The residual decoder (873) may be configured to perform inverse quantization to extract inverse quantized transform coefficients, and process the inverse quantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (873) may also utilize certain control information (to include quantization parameters (QP)), which may be provided by the entropy decoder (871) (datapath not shown as this may be only a small amount of control information).

[0091] The reconstruction module (874) may be configured to combine, in the spatial domain, the residual as output by the residual decoder (873) and the prediction result (possibly as output by an inter-prediction module or an intra-prediction module) to form a reconstructed block that forms part of a reconstructed picture as part of the reconstructed video. It should be noted that other suitable operations, such as deblocking operations, may be performed to improve visual quality.

[0092] It should be noted that the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using any suitable technology. In some exemplary embodiments, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more integrated circuits. In other embodiments, the video encoders (403), (603), and (603) and the video decoders (410), (510), and (810) may be implemented using one or more processors executing software instructions.

[0093] Turning to block partitioning for coding and decoding, a general partitioning may start from a base block and may follow a predefined set of rules, a particular pattern, a partitioning tree, or any partitioning structure or scheme. The partitioning may be hierarchical and recursive. A final set of partitions or coding blocks may be obtained after partitioning or dividing the base block according to any of the above partitioning procedures or other procedures. Each of these partitions may be at one of various partitioning levels in the partition hierarchy and may be of various shapes. Each partition may be referred to as a coding block (CB). In the various exemplary partitioning implementations above, each resulting CB may be of any of the allowed sizes and partitioning levels. Such a partition is referred to as a coding block because it may form a unit for which some basic coding / decoding decisions may be made and coding / decoding parameters may be optimized, determined, and signaled in the encoded video bitstream. The highest or deepest level in the final partition represents the depth of the coding block partitioning of the tree. The coding block may be a luma coding block or a chroma coding block. The CB tree structure for each color may be referred to as a coding block tree (CBT).

[0094] The coding blocks of all color channels may be collectively referred to as a coding unit (CU). The hierarchical structure of all color channels may be collectively referred to as a coding tree unit (CTU). The partitioning pattern or structure of various color channels within a CTU may or may not be the same.

[0095] The coding partition tree schemes used for the luma channel and the chroma channel may not be the same. In other words, the luma channel and the chroma channel may have separate coding tree structures. Furthermore, whether the luma channel and the chroma channel use the same coding partition tree structure or different coding partition tree structures, and the actual coding partition tree structure to be used may depend on whether the slice being coded is a P slice, a B slice, or an I slice. For example, for an I slice, the chroma channel and the luma channel may have separate coding partition tree structures or coding partition tree structure modes, while for a P slice or a B slice, the luma channel and the chroma channel may share the same coding partition tree scheme. When separate coding partition tree structures or modes are applied, the luma channel can be partitioned into CB by one coding partition tree structure, and the chroma channel can be partitioned into chroma CB by another coding partition tree structure.

[0096] In some example implementations, a predefined partitioning pattern may be applied to the base block. As shown in FIG. 9, an example four-way partition tree may start at a first predefined level (e.g., 64×64 block level or other size as a basic block size), and the base block may be hierarchically partitioned down to a predefined lowest level (e.g., 4×4 level). For example, the base block may follow four predefined partitioning options or patterns shown at 902, 904, 906, and 908, and the partitions represented by R may be recursively partitioned in that the same partitioning options shown in FIG. 9 may be repeated at lower scales down to the lowest level (e.g., 4×4 level). In some implementations, additional restrictions may be applied to the partitioning scheme of FIG. 9. In the implementation of FIG. 9, rectangular partitions (e.g., 1:2 / 2:1 rectangular partitions) can be but cannot be recursive, while square partitions can be recursive. Subsequent partitioning of FIG. 9 by recursion, if necessary, generates a final set of coding blocks. A coding tree depth may be further defined to indicate the division depth from the root node or root block. For example, the coding tree depth of the root node or root block of a 64×64 block may be set to 0, and the coding tree depth increases by 1 after the root block is further divided one time following FIG. 9. The maximum or deepest level from the 64×64 base block to the 4×4 minimum partition is 4 (starting from level 0) in the above scheme. Such a division scheme may be applied to one or more of the color channels. Each color channel may be divided independently according to the scheme of FIG. 9 (e.g., the division pattern or option of the predetermined pattern may be determined independently for each of the color channels at each hierarchical level). Alternatively, two or more color channels may share the same hierarchical pattern tree of FIG. 9 (e.g., the same division pattern or option of the predetermined pattern may be selected for two or more color channels at each hierarchical level).

[0097] FIG. 10 illustrates another exemplary predefined partitioning pattern that allows forming a partitioning tree by recursive partitioning. As illustrated in FIG. 10, an exemplary 10-way partitioning structure or pattern may be predefined. A root block may start from a predefined level (e.g., from a base block at a 128×128 level, or a 64×64 level). The exemplary partitioning structure of FIG. 10 includes various 2:1 / 1:2 and 4:1 / 1:4 rectangular partitions. A partition type having three subpartitions, shown at 1002, 1004, 1006, and 1008 in the second column of FIG. 10, may be referred to as a “T-shaped” partition. The “T-shaped” partitions 1002, 1004, 1006, and 1008 may be referred to as a left T-shaped, an upper T-shaped, a right T-shaped, and a lower T-shaped. In some exemplary implementations, none of the rectangular partitions of FIG. 10 may be further subdivided. A coding tree depth may be further defined to indicate a partitioning depth from a root node or root block. For example, the coding tree depth of the root node or root block of a 128×128 block may be set to 0, and after the root block is further divided one time following FIG. 10, the coding tree depth increases by 1. In some implementations, only the all-square partitions of 1010 may allow recursive division to the next level of the division tree following the pattern of FIG. 10. In other words, recursive division is not possible for the square partitions of T-shaped patterns 1002, 1004, 1006, and 1008. If necessary, the division procedure following FIG. 10 by recursion generates a final set of coding blocks. Such a scheme may be applied to one or more of the color channels. In some implementations, more flexibility may be added to the use of partitions less than 8×8 levels. For example, in some cases, 2×2 chroma inter prediction may be used.

[0098] In some other example implementations for coding block partitioning, a quadtree structure may be used to partition a base block or an intermediate block into quadtree partitions. Such quadtree partitioning may be applied hierarchically and recursively to any square partition. Whether a base block or an intermediate block or partition is further quadtree partitioned may be adapted to various local characteristics of the base block or intermediate block / partition. The quadtree partitioning at the picture boundary may be further adapted. An implicit quadtree partitioning may be performed at the picture boundary such that the block continues to be quadtree partitioned until its size fits into the picture boundary.

[0099] In some other example implementations, a hierarchical binary division from the base block may be used. For such a scheme, the base block or mid-level block may be divided into two partitions. The binary division may be either horizontal or vertical. For example, a horizontal binary division may divide the base block or mid-block into equal left and right partitions. Similarly, a vertical binary division may divide the base block or mid-block into equal top and bottom partitions. Such binary division may be hierarchical and recursive. It may be determined at each of the base block or mid-block whether the binary division scheme should continue and, if so, whether a horizontal or vertical binary division should be used. In some implementations, further division may stop at a predetermined minimum partition size (in one or both dimensions). Alternatively, further division may stop when a predetermined division level or depth from the base block is reached. In some implementations, the aspect ratio of the partitions may be limited. For example, the aspect ratio of the partitions may not be smaller than 1:4 (or larger than 4:1). Therefore, a vertical strip partition having a vertical to horizontal aspect ratio of 4:1 can only be further bifurcated vertically into an upper partition and a lower partition, each having a vertical to horizontal aspect ratio of 2:1.

[0100] In yet some other examples, a ternary partitioning scheme may be used to partition the base block or any intermediate blocks, as shown in FIG. 13. The ternary pattern may be implemented vertically, as shown at 1302 in FIG. 13, or horizontally, as shown at 1304 in FIG. 13. The example partitioning ratio in FIG. 13 is shown as 1:2:1 either vertically or horizontally, but other ratios may be predefined. In some implementations, two or more different ratios may be predefined. Such a ternary partitioning scheme may be used to complement a quadtree or binary tree partitioning structure, where such a ternary tree partitioning may capture an object located at a block center in one contiguous partition, whereas quadtrees and binary trees always partition along the block center, thus partitioning the object into separate partitions. Furthermore, the width and height of the proposed ternary tree partitioning are always powers of two, so no additional transformations are required.

[0101] The above partitioning schemes may be combined in any manner at different partitioning levels. As an example, the above-mentioned quadtree and binary tree partitioning schemes may be combined to partition a base block into a quadtree binary tree (QTBT) structure. In such a scheme, the base block or intermediate blocks / partitions may be either quadtree partitioned or binary tree partitioned, subject to a set of predefined conditions, if specified. A specific example is shown in FIG. 14. In the example of FIG. 14, the base block is first quadtree partitioned into four partitions, as shown by 1402, 1404, 1406, and 1408. Each of the resulting partitions is then either quadtree partitioned into four further partitions (such as 1408) or binary partitioned into two further partitions at the next level (e.g., either horizontally or vertically, e.g., 1402 or 1406, both symmetric), or not partitioned (such as 1404). Binary or quadtree partitioning may be recursively enabled for square partitions, as shown by the overall example partition pattern in 1410 and the corresponding tree structure / representation in 1420, where solid lines represent quadtree partitioning and dashed lines represent binary tree partitioning. A flag may be used for each binary partition node (non-leaf binary partition) to indicate whether the binary partitioning is horizontal or vertical. For example, as shown in 1420, a flag "0" may represent a horizontal binary partitioning and a flag "1" may represent a vertical binary partitioning, consistent with the partitioning structure in 1410. For quadtree partitioning partitions, there is no need to indicate the partitioning type, since a quadtree partitioning always splits a block both horizontally and vertically to generate four sub-blocks of equal size. In some implementations, a flag "1" may represent a horizontal binary partitioning and a flag "0" may represent a vertical binary partitioning.

[0102] In some example implementations of QTBT, the quadtree and binary splitting rule sets may be represented by the following predefined parameters and corresponding functions associated therewith: -CTU size: Root node size of the quadtree (size of the base block) -MinQTSize: The minimum allowable quadtree leaf node size. -MaxBTSize: Maximum allowable binary tree root node size -MaxBTDepth: Maximum allowed binary tree depth -MinBTSize: The minimum allowable binary tree leaf node size In some exemplary implementations of the QTBT partitioning structure, the CTU size may be set as 128×128 luma samples with two corresponding 64×64 blocks of chroma samples (if exemplary chroma subsampling is considered and used), MinQTSize may be set as 16×16, MaxBTSize may be set as 64×64, MinBTSize (for both width and height) may be set as 4×4, and MaxBTDepth may be set as 4. A quadtree partition may be first applied to the CTU to generate a quadtree leaf node. A quadtree leaf node may have a size from its minimum allowed size of 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If a node is 128×128, it will not be split first by the bi-tree because its size exceeds MaxBTSize (i.e., 64×64). Otherwise, nodes that do not exceed MaxBTSize may be split by bitree. In the example of FIG. 14, the base block is 128×128. A basic block can only be quadtree split according to a predefined set of rules. The base block has a split depth of 0. Each of the resulting four partitions is 64×64, not exceeding MaxBTSize, and may be further quadtree or bitree split at level 1. The process continues. Once the bitree depth reaches MaxBTDepth (i.e., 4), no further splits may be considered. If the width of a bitree node is equal to MinBTSize (i.e., 4), no further horizontal splits may be considered. Similarly, if the height of a bitree node is equal to MinBTSize, no further vertical splits may be considered.

[0103] In some example implementations, the above QTBT scheme may be configured to support flexibility for luma and chroma to have the same or separate QTBT structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same QTBT structure. However, for I slices, the luma CTB can be divided into CBs by a QTBT structure, and the chroma CTB can be divided into chroma CBs by another QTBT structure. This means that CUs can be used to refer to different color channels in an I slice, for example, an I slice can consist of a coding block of a luma component or a coding block of two chroma components, and a CU in a P or B slice can consist of coding blocks of all three color components.

[0104] In some other implementations, the QTBT scheme may be complemented with the ternary scheme described above. Such implementations may be referred to as multi-type tree (MTT) structures. For example, in addition to the binary split of the nodes, one of the ternary partition patterns of FIG. 13 may be selected. In some implementations, only square nodes may be subject to ternary split. An additional flag may be used to indicate whether the ternary split is horizontal or vertical.

[0105] The design of two-level or multi-level trees, such as the QTBT implementation and the QTBT implementation complemented by ternary splitting, may be primarily motivated by reduced complexity. In theory, the complexity of traversing a tree is T D where T represents the number of split types and D is the depth of the tree. Tradeoffs can be made by using multiple types (T) while reducing the depth (D).

[0106] In some implementations, the CB may be further divided. For example, the CB may be further divided into multiple prediction blocks (PBs) for the purpose of intra-frame or inter-frame prediction during the coding and decoding process. In other words, the CB may be further divided into different sub-partitions, where individual prediction decisions / configurations may be made. In parallel, the CB may be further divided into multiple transform blocks (TBs) for the purpose of describing the level at which the transformation or inverse transformation of the video data is performed. The division scheme of the CB into PBs and TBs may be the same or different. For example, each division scheme may be performed using a unique procedure based on, for example, various characteristics of the video data. The division scheme of the PBs and TBs may be independent in some exemplary implementations. The division schemes and boundaries of the PBs and TBs may be correlated in some other exemplary implementations. In some implementations, for example, the TBs may be divided after the PB division, and in particular, each PB may be determined following the division of the coding block, and then further divided into one or more TBs. For example, in some implementations, the PB may be divided into one, two, four, or other number of TBs.

[0107] In some implementations, luma and chroma channels may be processed differently to split base blocks into coding blocks and further into predictive and / or transform blocks. For example, some implementations may allow splitting of coding blocks into predictive and / or transform blocks for a luma channel, but not for a chroma channel(s). In such implementations, transform and / or prediction of luma blocks may thus be performed only at the coding block level. In another example, the minimum transform block size of the luma channel and the chroma channel(s) may be different, e.g., a coding block of a luma channel may be allowed to be split into smaller transform and / or predictive blocks than a chroma channel. In yet another example, the maximum depth of splitting of coding blocks into transform and / or predictive blocks may be different between the luma and chroma channels, e.g., a coding block of a luma channel may be allowed to be split into deeper transform and / or predictive blocks than a chroma channel(s). As a specific example, a luma coding block may be divided into transform blocks of multiple sizes that can be represented by a recursive partitioning down by up to two levels, and transform block shapes such as square, 2:1 / 1:2, 4:1 / 1:4, etc., and transform block sizes from 4×4 to 64×64 may be allowed. However, for chroma blocks, only the largest possible transform block designated for the luma block may be allowed.

[0108] In some example implementations for partitioning a coding block into PBs, the depth, shape, and / or other characteristics of the PB partition may depend on whether the PB is intra-coded or inter-coded.

[0109] The division of the coding block (or prediction block) into transform blocks may be performed in various exemplary manners, including but not limited to quadtree division and predetermined pattern division, recursively or non-recursively, further considering the transform blocks at the boundaries of the coding block or prediction block. In general, the resulting transform blocks may be at different division levels, may not be the same size, and may not be square in shape (e.g., they may be rectangular with some allowed size and aspect ratio). Further examples are described in more detail below in connection with Figures 15, 16 and 17.

[0110] However, in some other implementations, the CB obtained through any of the above partitioning schemes may be used as a basic or minimum coding block for prediction and / or transformation. In other words, no further partitioning is performed to perform inter prediction / intra prediction and / or transformation. For example, the CB obtained from the above QTBT scheme may be used as a unit for performing prediction as is. Specifically, such a QTBT structure eliminates the concept of multiple partition types, i.e., eliminates the separation of CU, PU and TU, and supports higher flexibility of CU / CB partition shapes as described above. In such a QTBT block structure, the CU / CB can be either square or rectangular in shape. The leaf nodes of such a QTBT are used as units for prediction and transformation processing without further partitioning. This means that the CU, PU, ​​and TU have the same block size in such a QTBT coding block structure.

[0111] The various CB division schemes described above, as well as further division of the CB into PB and / or TB (including no PB / TB division), may be combined in any manner. The following specific implementations are provided as non-limiting examples.

[0112] Specific exemplary implementations of the division of coding blocks and transform blocks are described below. In such exemplary implementations, a base block may be divided into coding blocks using a recursive quadtree division or the above-mentioned predetermined division patterns (such as those in Figures 9 and 10). At each level, whether to continue further quadtree division of a particular partition may be determined by local video data characteristics. The resulting CBs may be at various quadtree division levels with various sizes. The decision of whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction may be made at the CB level (or at the CU level in case of three color channels). Each CB may be further divided into one, two, four, or other number of PBs according to a predetermined PB division type. Within one PB, the same prediction process may be applied, and related information may be sent to the decoder on a PB basis. After obtaining the residual block by applying a prediction process based on the PB division type, the CB may be divided into TBs according to another quadtree structure similar to the coding tree of the CB. In this particular implementation, the CB or TB may not be limited to a square shape. Furthermore, in this particular example, the PB may be square or rectangular in shape for inter prediction, and only square in intra prediction. A coding block may be divided into, for example, four square-shaped TBs. Each TB may be further divided recursively (using quadtree partitioning) into smaller TBs called residual quadtrees (RQTs).

[0113] Other exemplary implementations for splitting a base block into CB, PB, and / or TB are further described below. For example, instead of using multiple partition unit types as shown in FIG. 9 or FIG. 10, a quadtree with nested multi-type trees using a binary and ternary split segmentation structure (e.g., QTBT as described above or QTBT with ternary split) may be used. Separation of CB, PB, and TB (i.e., splitting CB into PB and / or TB, and splitting PB into TB) may be abandoned except when necessary for CBs with a size too large for the maximum transform length, which may require further splitting. This exemplary splitting scheme may be designed to support higher flexibility of CB splitting shape, so that both prediction and transformation can be performed at the CB level without further splitting. In such a coding tree structure, the CB may have either a square or rectangular shape. Specifically, a coding tree block (CTB) may first be split by a quadtree structure. Then, the leaf nodes of the quadtree may be further split by a nested multi-type tree structure. An example of a nested multi-type tree structure using a binary or ternary split is shown in FIG. 11. Specifically, the exemplary multi-type tree structure in FIG. 11 includes four split types: vertical binary split (SPLIT_BT_VER) (1102), horizontal binary split (SPLIT_BT_HOR) (1104), vertical ternary split (SPLIT_TT_VER) (1106), and horizontal ternary split (SPLIT_TT_HOR) (1108). The CB then corresponds to a leaf of the multi-type tree. In this exemplary implementation, as long as the CB is not too large for the maximum transform length, this segmentation is used for both prediction and transform processing without further splitting. This means that in most cases, the CB, PB, and TB have the same block size in a quad-tree with a nested multi-type tree coding block structure. An exception occurs when the maximum supported transform length is smaller than the width or height of the color components of the CB. In some implementations, in addition to a binary or ternary split, the nested pattern of FIG. 11 can further include a quadtree split.

[0114] One specific example of a quadtree with nested multi-type tree coding block structure of block partitions (including quadtree, binary, and ternary split options) for one base block is shown in FIG. 12. More specifically, FIG. 12 shows that a base block 1200 is quadtree split into four square partitions 1202, 1204, 1206, and 1208. A decision to further use the multi-type tree structure and quadtree of FIG. 11 for splitting is made for each of the quadtree split partitions. In the example of FIG. 12, partition 1204 is not split any further. Partition 1202 and partition 1208 each adopt other quadtree splitting. For partition 1202, the second level quadtree split upper left, upper right, lower left, and lower right partitions adopt third level splitting of quadtree, horizontal binary split 1104 of FIG. 11, non-split, and horizontal ternary split 1108 of FIG. 11, respectively. Partition 1208 adopts another quadtree division, and the second level quadtree divided top-left, top-right, bottom-left, and bottom-right partitions adopt the third level division of vertical ternary division 1106, undivided, undivided, and horizontal binary division 1104 of FIG. 11, respectively. Two of the subpartitions of the top-left partition of the third level of 1208 are further divided according to horizontal binary division 1104 and horizontal ternary division 1108 of FIG. 11, respectively. Partition 1206 adopts the second level division pattern following vertical binary division 1102 of FIG. 11, resulting in two partitions that are further divided at the third level according to horizontal ternary division 1108 and vertical binary division 1102 of FIG. 11. A fourth level division is further applied to one of them according to horizontal binary division 1104 of FIG. 11.

[0115] In the above specific example, the maximum luma transform size may be 64 x 64, and the maximum supported chroma transform size may also be different from the luma, e.g., 32 x 32. Although the above example CB of Figure 12 is generally not further divided into smaller PBs and / or TBs, when the width or height of a luma coding block or chroma coding block is larger than the maximum transform width or height, the luma coding block or chroma coding block may be automatically divided in the horizontal and / or vertical directions to meet the transform size limitation in that direction.

[0116] In the specific example for splitting the base blocks into CBs above, as mentioned above, the coding tree scheme may support the ability for luma and chroma to have separate block tree structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same coding tree structure. For I slices, for example, luma and chroma may have separate coding block tree structures. When separate block tree structures are applied, the luma CTB may be split into luma CBs by one coding tree structure, and the chroma CTB is split into chroma CBs by another coding tree structure. This means that a CU in an I slice can consist of a coding block of a luma component or a coding block of two chroma components, and a CU in a P slice or B slice always consists of coding blocks of all three color components unless the video is monochrome.

[0117] When a coding block is further divided into multiple transform blocks, the transform blocks therein may be ordered in the bitstream according to various orders or scanning schemes. Exemplary implementations for dividing a coding block or a predictive block into transform blocks and the coding order of the transform blocks are described in further detail below. In some exemplary implementations, as described above, the transform division may support transform blocks of multiple shapes, e.g., 1:1 (square), 1:2 / 2:1, and 1:4 / 4:1, with transform block sizes ranging from, e.g., 4×4 to 64×64. In some implementations, when a coding block is 64×64 or smaller, the transform block division may be applied only to the luma component, such that for chroma blocks, the transform block size is the same as the coding block size. Otherwise, if the width or height of the coding block is greater than 64, then both the luma coding block and the chroma coding block may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32) transform blocks, respectively.

[0118] In some example implementations of transform block partitioning, for both intra-coded and inter-coded blocks, a coding block may be further partitioned into multiple transform blocks with a partition depth up to a predetermined number of levels (e.g., two levels). The partition depth and size of the transform block may be related. For some example implementations, the mapping from the transform size of the current depth to the transform size of the next depth is shown below in Table 1.

[0119] [Table 1]

[0120] Based on the example mapping of Table 1, for a 1:1 square block, the next level transform split may create four 1:1 square sub-transform blocks. The transform split may stop at, for example, 4×4. Thus, a transform size of the current depth of 4×4 corresponds to the same size of 4×4 of the next depth. In the example of Table 1, for a 1:2 / 2:1 non-square block, the next level transform split may create two 1:1 square sub-transform blocks, and for a 1:4 / 4:1 non-square block, the next level transform split may create two 1:2 / 2:1 sub-transform blocks.

[0121] In some example implementations, further restrictions may be applied on transform block partitioning for the luma components of intra-coded blocks. For example, for each level of transform partitioning, all sub-transform blocks may be restricted to have equal size. For example, for a 32×16 coding block, level 1 transform partitioning creates two 16×16 sub-transform blocks, and level 2 transform partitioning creates eight 8×8 sub-transform blocks. In other words, to keep the transform units equal in size, a second level partitioning must be applied to all first level sub-blocks. An example of transform block partitioning for an intra-coded square block according to Table 1 is shown in FIG. 15 with the coding order indicated by the arrows. Specifically, 1502 shows a square coding block. The first level partitioning according to Table 1 into four equal-sized transform blocks is shown in 1504 with the coding order indicated by the arrows. The second level partitioning of all first level equal-sized blocks according to Table 1 into 16 equal-sized transform blocks is shown in 1506 with the coding order indicated by the arrows.

[0122] In some example implementations, the above restrictions on intra-coding may not apply to the luma components of an inter-coded block. For example, after the first level of transform partitioning, any one of the sub-transform blocks may be further partitioned independently at another level. Thus, the resulting transform blocks may or may not be of the same size. An example partitioning of an inter-coded block into transform blocks with coding order is shown in FIG. 16. In the example of FIG. 16, an inter-coded block 1602 is partitioned into transform blocks at two levels according to Table 1. At the first level, the inter-coded block is partitioned into four transform blocks of equal size. Then, only one of the four transform blocks (but not all of them) is further partitioned into four sub-transform blocks, resulting in a total of seven transform blocks with two different sizes, as shown at 1604. An example coding order of these seven transform blocks is indicated by an arrow at 1604 in FIG. 16.

[0123] In some example implementations, for the chroma component(s), some additional restrictions on the transform blocks may be applied. For example, for the chroma component(s), the transform block size may be as large as the coding block size, but cannot be smaller than a certain size, e.g., 8×8.

[0124] In some other example implementations, for coding blocks with width (W) or height (H) greater than 64, both luma and chroma coding blocks may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32) transform units, respectively, where in this disclosure, “min(a,b)” may return the smaller value between a and b.

[0125] Figure 17 further illustrates another alternative exemplary scheme for splitting a coding block or a predictive block into transform blocks. As shown in Figure 17, instead of using recursive transform partitioning, a set of predetermined partition types may be applied to a coding block according to the transform type of the coding block. In the particular example shown in Figure 17, one of six exemplary partition types may be applied to split the coding block into various numbers of transform blocks. The scheme for generating such transform block partitions may be applied to either a coding block or a predictive block.

[0126] More specifically, the partitioning scheme of FIG. 17 provides up to six exemplary partition types for any given transform type (transform type refers to the type of primary transform, such as, for example, ADST, etc.). In this scheme, every coding or predictive block may be assigned a transform type, for example, based on a rate-distortion cost. In one example, the transform partition type assigned to a coding or predictive block may be determined based on the transform type of the coding or predictive block. As shown by the six transform partition types illustrated in FIG. 17, a particular transform partition type may correspond to the partition size and pattern of the transform block. The correspondence between various transform types and various transform partition types may be predefined. An example is shown below with capitalized labels indicating transform partition types that may be assigned to a coding or predictive block based on a rate-distortion cost.

[0127] ·PARTITION_NONE: Allocate the transformation size equal to the block size.

[0128] ·PARTITION_SPLIT: Allocates a transformation size of 1 / 2 the block size in width and 1 / 2 the block size in height.

[0129] ·PARTITION_HORZ: Allocates a transformation size with width equal to the block size and height equal to 1 / 2 the block size.

[0130] ·PARTITION_VERT: Allocates a transformation size with a width half the block size and a height equal to the block size.

[0131] ·PARTITION_HORZ4: Allocates a transformation size with width equal to the block size and height equal to 1 / 4 of the block size.

[0132] ·PARTITION_VERT4: Allocates a transformation size with a width of 1 / 4 of the block size and a height equal to the block size.

[0133] In the above example, the transform partition types shown in Figure 17 all include uniform transform sizes for the partitioned transform blocks. This is not a limitation but merely an example. In some other implementations, mixed transform block sizes may be used for the partitioned transform blocks in a particular partition type (or pattern).

[0134] The PBs (or CBs, also called PBs if not further divided into predictive blocks) resulting from any of the above partitioning schemes can become individual blocks for coding via either intra-prediction or inter-prediction. For inter-prediction of the current PB, a residual between the current block and the predictive block can be generated, coded, and included in the coded bitstream.

[0135] Inter prediction may be performed, for example, in single reference mode or mixed reference mode. In some implementations, a skip flag may be included in the bitstream of the current block first (or at a higher level) to indicate whether the current block is inter-coded and not skipped. If the current block is inter-coded, another flag may be further included in the bitstream to signal whether a single reference mode or a mixed reference mode is used for the current block. In the case of a single reference mode, one reference block may be used to generate a prediction block of the current block. In the case of a mixed reference mode, two or more reference blocks may be used to generate a prediction block, for example, by weighted averaging. A mixed reference mode may be referred to as a multiple reference mode, a two-reference mode, or a multiple reference mode. The one or more reference blocks may be identified using one or more reference frame indices and further using one or more corresponding motion vectors indicating a shift between the one or more reference blocks and the current block, for example, in positions in horizontal and vertical pixels. For example, the inter-predicted block of the current block may be generated from a single reference block identified by one motion vector in a reference frame as the predictive block in a single reference mode, but for a mixed reference mode, the predictive block may be generated by a weighted average of two reference blocks in two reference frames indicated by two motion vectors. The motion vectors may be coded and included in the bitstream in various ways.

[0136] In some implementations, the encoding or decoding system may maintain a decoded picture buffer (DPB). Some images / pictures may be maintained in the DPB waiting to be displayed (in the decoding system), and some images / pictures in the DPB may be used as reference frames to enable inter prediction. In some implementations, reference frames in the DPB may be tagged as either short-term or long-term references for the current image being encoded or decoded. For example, short-term reference frames may include frames used for inter prediction of blocks in the current frame or the nearest predetermined number (e.g., two) subsequent video frames to the current frame, in decoding order. Long-term reference frames may include frames in the DPB that can be used to predict image blocks in frames beyond a predetermined number of frames from the current frame in decoding order. Information regarding such tags for short-term and long-term reference frames may be referred to as a reference picture set (RPS) and may be added to the header of each frame in the encoded bitstream. Each frame in the encoded video stream can be identified by a Picture Order Counter (POC), which is numbered according to the playback sequence, either in an absolute manner or relative to a group of pictures starting, for example, with an I-frame.

[0137] In some example implementations, one or more reference picture lists including identification of short-term and long-term reference frames for inter prediction may be formed based on information in the RPS. For example, a single picture reference list may be formed for unidirectional inter prediction, denoted as L0 reference (or reference list 0), and two picture reference lists may be formed for bidirectional inter prediction, denoted as L0 (or reference list 0) and L1 (or reference list 1) for each of the two prediction directions. The reference frames included in the L0 list and the L1 list may be ordered in various predetermined manners. The length of the L0 list and the L1 list may be signaled in the video bitstream. The unidirectional inter prediction may be either a single reference mode or a mixed reference mode, when multiple references for generating a prediction block by weighted averaging in the mixed prediction mode are on the same side of the block to be predicted. The bidirectional inter prediction may be only a mixed mode, in that the bidirectional inter prediction includes at least two reference blocks.

[0138] In some implementations, a merge mode (MM) for inter prediction may be implemented. In general, for a merge mode, one or more of the motion vectors in single reference prediction or mixed reference prediction of the current PB may be derived from other motion vectors, rather than being calculated and signaled independently. For example, in an encoding system, a current motion vector of a current PB may be reduced to a difference between the current motion vector and one or more other already encoded motion vectors (referred to as reference motion vectors). Such a difference of the motion vector, rather than the entire current motion vector, may be encoded and included in the bitstream and linked to the reference motion vector. Correspondingly, in a decoding system, a motion vector corresponding to the current PB may be derived based on the difference of the decoded motion vector and the decoded reference motion vector linked therewith. As a specific form of the general merge mode (MM) inter prediction, such inter prediction based on the difference of the motion vector may be referred to as a merge mode by motion vector difference (MMVD). Thus, the general MM or the MMVD in particular may be implemented to exploit the correlation between the motion vectors associated with different PBs to improve coding efficiency. For example, adjacent PBs may have similar motion vectors. In another example, the motion vectors may be correlated temporally (between frames) for similarly positioned / located blocks in space.

[0139] In some example implementations, an MM flag may be included in the bitstream during the encoding process to indicate whether the current PB is in merge mode. Additionally or alternatively, an MMVD flag may be included and signaled in the bitstream during the encoding process to indicate whether the current PB is in MMVD mode. MM and / or MMVD flags or indicators may be provided at the PB level, CB level, CU level, CTB level, CTU level, slice level, picture level, etc. In a particular example, both an MM flag and an MMVD flag may be included for the current CU, and the MMVD flag may be signaled immediately after the skip flag and the MM flag to specify whether the MMVD mode is used for the current CU.

[0140] In some example implementations of MMVD, a list of merge candidates for motion vector prediction may be formed for a predicted block. The list of merge candidates may include a predetermined number (e.g., two) of MV predictor candidate blocks whose motion vectors may be used to predict the current motion vector. The MVD candidate blocks may include blocks selected from adjacent blocks and / or temporal blocks in the same frame (e.g., blocks that are co-located in the ongoing or subsequent frames of the current frame). These options represent blocks that are in a spatial or temporal position relative to the current block that are likely to have a similar or identical motion vector as the current block. The size of the list of MV predictor candidates may be predetermined. For example, the list may include two candidates. To be on the list of merge candidates, a candidate block must, for example, have the same reference frame (or frames) as the current block, must exist (e.g., if the current block is near an edge of a frame, a bounds check must be performed), must already be encoded during the encoding process, and / or must already be decoded during the decoding process. In some implementations, the list of merge candidates may be filled first with spatially adjacent blocks (scanned in a certain predefined order) if available and satisfy the above conditions, and then with temporal blocks if space is still available in the list. The adjacent candidate blocks may be selected, for example, from the blocks to the left and above the current block. The list of merge MV predictor candidates may be signaled in the bitstream.

[0141] In some implementations, the actual merge candidate that is used as the reference motion vector for predicting the motion vector of the current block may be signaled. When the merge candidate list includes two candidates, a one-bit flag called a merge candidate flag may be used to indicate the selection of the reference merge candidate. For the current block being predicted in the combined mode, each of the multiple motion vectors predicted using the MV predictor may be associated with a reference motion vector from the merge candidate list.

[0142] In some example implementations of MMVD, after a merge candidate is selected and used as a base motion vector predictor for a predicted motion vector, a motion vector difference (MVD or delta MV representing the difference between the motion vector to be predicted and the reference candidate motion vector) may be calculated in the encoding system. Such an MVD may include information representing the magnitude and direction of the MV difference, which may be signaled in the bitstream. The magnitude and direction of the motion difference may be signaled in various ways.

[0143] In some exemplary implementations of the MMVD, a distance index may be used to specify motion vector difference magnitude information and indicate one of a set of predefined offsets representing a predefined motion vector difference from a starting point (reference motion vector). Then, the MV offset according to the signaled index may be added to either the horizontal or vertical component of the starting (reference) motion vector. Which of the horizontal or vertical components of the reference motion vector should be offset is determined by the exemplary direction information of the MVD. An exemplary predefined relationship between the distance index and the predefined offset is specified in Table 2.

[0144] [Table 2]

[0145] In some exemplary implementations of MMVD, a direction index may be further signaled and used to represent the direction of the MVD relative to the reference motion vector. In some implementations, the direction may be limited to either the horizontal or vertical direction. An exemplary 2-bit direction index is shown in Table 3. In the example of Table 3, the interpretation of the MVD may change according to the information of the start / reference MV. For example, if the start / reference MV corresponds to a single-prediction block or a bi-prediction block where both reference frame lists point to the same side of the current picture (i.e., the POCs of the two reference pictures are both greater than or both less than the POC of the current picture), the code in Table 3 may specify the sign (direction) of the MV offset added to the start / reference MV. When the start / reference MV corresponds to a bi-predictive block with two reference pictures on different sides of the current picture (i.e., the POC of one reference picture is larger than that of the current picture and the POC of the other reference picture is smaller than that of the current picture) and the difference between the reference POC in picture reference list 0 and the current frame is larger than the difference between the reference POC in picture reference list 1 and the current frame, the codes in Table 3 may specify the sign of the MV offset added to the reference MV corresponding to the reference picture in picture reference list 0, and the sign of the offset of the MV corresponding to the reference picture in picture reference list 1 may have the opposite value (opposite sign of the offset). Otherwise, when the difference between the reference POC in picture reference list 1 and the current frame is larger than the difference between the reference POC in picture reference list 0 and the current frame, the codes in Table 3 may specify that the sign of the MV offset added to the reference MV associated with picture reference list 1 and the sign of the offset to the reference MV associated with picture reference list 0 have the opposite value.

[0146] [Table 3]

[0147] In some example implementations, the MVD may be scaled according to the difference in POC in each direction. If the difference in POC in both lists is the same, no scaling is required. Otherwise, if the difference in POC in reference list 0 is larger than that of reference list 1, the MVD of reference list 1 is scaled. If the POC difference of reference list 1 is larger than list 0, the MVD of list 0 may be scaled as well. If the starting MV is uni-predicted, the MVD is available or added to the reference MV.

[0148] In some example implementations of MVD coding and signaling for bidirectional composite prediction, in addition to or instead of coding and signaling two MVDs separately, symmetric MVD coding may be implemented such that only one MVD needs to be signaled and the other MVD can be derived from the signaled MVD. In such implementations, motion information including reference picture indexes for both list 0 and list 1 is signaled. However, for example, only the MVD associated with reference list 0 is signaled, and the MVD associated with reference list 1 is not signaled and is derived. Specifically, at the slice level, a flag called "mvd_l1_0_flag" may be included in the bitstream to indicate whether reference list 1 is not signaled in the bitstream. If this flag is 1, indicating that reference list 1 is equal to 0 (and thus not signaled), a bidirectional prediction flag called "BiDirPredFlag" may be set to 0, which means there is no bidirectional prediction. Otherwise, if mvd_l1_0_flag is 0, BiDirPredFlag may be set to 1 if the closest reference picture in list 0 and the closest reference picture in list 1 form a forward and backward pair of reference pictures or a backward and forward pair of reference pictures, and both reference pictures in list 0 and list 1 are short-term reference pictures. Otherwise, BiDirPredFlag is set to 0. BiDirPredFlag of 1 indicates that a symmetric mode flag is additionally signaled in the bitstream. A decoder can extract the symmetric mode flag from the bitstream if BiDirPredFlag is 1. The symmetric mode flag is signaled, for example, at the CU level (if necessary) to indicate whether a symmetric MVD coding mode is used for the corresponding CU.When the symmetric mode flag is 1, it indicates the use of a symmetric MVD coding mode, indicating that only the reference picture indexes of both list 0 and list 1 (called "mvp_l0_flag" and "mvp_l1_flag") are signaled by the MVD associated with list 0 (called "MVD0"), and the other motion vector difference "MVD1" should be derived rather than signaled. For example, MVD1 may be derived as -MVD0. Thus, in the exemplary symmetric MVD mode, only one MVD is signaled. In some other exemplary implementations for MV prediction, a harmonic scheme may be used to implement a general merged mode MMVD, as well as some other types of MV prediction, for both single reference mode MV prediction and mixed reference mode MV prediction. Various syntax elements may be used to signal how the MV of the current block is predicted.

[0149] For example, for a single reference mode, the following MV prediction modes may be signaled:

[0150] NEARMV-Use one of the motion vector predictors (MVPs) in the list indicated by the DRL (Dynamic Reference List) index directly without MVD.

[0151] Use one of the motion vector predictors (MVPs) in the list informed by the NEWMV-DRL index as a reference and apply a delta to the MVP (eg, use MVD).

[0152] GLOBALMV - Use motion vectors based on frame-level global motion parameters.

[0153] Similarly, for a mixed reference inter prediction mode that uses two reference frames corresponding to the two MVs to be predicted, the following MV prediction modes may be signaled:

[0154] NEAR_NEARMV - For each of the two MVs to be predicted, use one of the motion vector predictors (MVPs) in the list signaled by the DRL index without the MVD.

[0155] NEAR_NEWMV - to predict the first of two motion vectors, one of the motion vector predictors (MVP) in the list signaled by the DRL index is used as a reference MV with the MVD, and to predict the second of two motion vectors, one of the motion vector predictors (MVP) in the list signaled by the DRL index is used as a reference MV together with the additionally signaled delta MV (MVD).

[0156] NEW_NEARMV - Use one of the motion vector predictors (MVP) in the list signaled by the DRL index as a reference MV with MVD to predict the second of two motion vectors, and use one of the motion vector predictors (MVP) in the list signaled by the DRL index as a reference MV with an additionally signaled delta MV (MVD) to predict the first of two motion vectors.

[0157] One of the motion vector predictors (MVPs) in the list signaled by the NEW_NEWMV-DRL index is used as a reference MV, which is used together with the additionally signaled delta MV to predict for each of the two MVs.

[0158] GLOBAL_GLOBALMV - Use MV from each reference based on frame-level global motion parameters.

[0159] Thus, the term "NEAR" above refers to MV prediction using a reference MV without MVD as a general merge mode, whereas the term "NEW" refers to MV prediction using a reference MV and including offsetting it with the signaled MVD as in the MMVD mode. In the case of mixed inter prediction, both the reference-based motion vector and the above motion vector delta may generally be different or independent between the two references, even though they may be correlated and such correlation may be exploited to reduce the amount of information required to signal the two motion vector deltas. In such a situation, joint signaling of the two MVDs may be implemented and indicated in the bitstream.

[0160] The dynamic reference list (DRL) described above may be used to hold a set of indexed motion vectors that are dynamically maintained and considered as candidate motion vector predictors.

[0161] In some example implementations, an optical flow-based approach may be used to refine motion vectors (MVs) per subblock for composite prediction. In particular, optical flow equations may be applied to formulate a least squares problem, from which fine motions may be derived from gradients of composite inter prediction samples. With these fine motions, the MVs per subblock can be refined within the prediction block, which may improve inter prediction quality. Some coding features may be an extension of the concept of bidirectional optical flow (BDOF), since they support MV refinement when two reference blocks have any temporal distance to the current block.

[0162] In some implementations, four additional inter-composite modes may be added: NEAR_NEARMV_OPTFLOW, NEAR_NEWMV_OPTFLOW, NEW_NEARMV_OPTFLOW, and / or NEW_NEWMV_OPTFLOW.

[0163] These modes can be called optical flow modes, and the reference MV type can be defined similarly to the conventional composite modes (e.g., NEAR_NEWMV_OPTFLOW, which has the same reference MV type as NEAR_NEWMV). Composite prediction may be performed based on the refined MV for each subblock instead of the original MV.

[0164] The various embodiments and / or implementations described in this disclosure may be used separately or combined in any order. Furthermore, some, all, or any partial or total combination of these embodiments and / or implementations may be embodied as part of an encoder and / or decoder and may be implemented in hardware and / or software. For example, they may be hard-coded in dedicated processing circuitry (e.g., one or more integrated circuits). In another example, they may be implemented by one or more processors executing a program stored on a non-transitory computer-readable medium.

[0165] There may be some problems / challenges associated with some implementations of the signaling methods for motion vector differences, such as how delta MV is signaled in NEW_NEARMV mode, NEAR_NEWMV mode, or NEW_NEWMV mode. One of the problems / challenges may be that the correlation of the difference in motion vectors in the two reference lists is not utilized, thus reducing the coding / decoding efficiency and performance.

[0166] This disclosure describes various embodiments for signaling motion vector difference (MVD or delta MV) for inter-predictive mode coding and / or decoding, addressing at least one of the problems / challenges mentioned above, and achieving efficient software / hardware implementation for improved inter-predictive mode coding / decoding.

[0167] In various embodiments, and referring to FIG. 18, a method 1800 decodes an inter-predicted video block. Method 1800 may include some or all of the following steps: step 1810, i.e., receiving a coded video bitstream by a device comprising a memory for storing instructions and a processor in communication with the memory; step 1820, i.e., extracting, by the device, an inter prediction mode and a joint delta motion vector (MV) of a current block in the current frame from the coded video bitstream; step 1830, i.e., extracting, by the device, a flag indicating whether a first delta MV for a first reference frame and a second delta MV for a second reference frame are signaled together; step 1840, i.e., in response to the flag indicating that the first delta MV and the second delta MV are signaled together, deriving, by the device, a first delta MV and a second delta MV based on the joint delta MV; and / or step 1850, i.e., decoding, by the device, the current block in the current frame based on the first delta MV and the second delta MV.

[0168] In some implementations, the joint delta MV may be represented as joint_delta_mv, which may be an element indicating the joint delta MV. In some implementations, a flag indicating whether the first delta MV for the first reference frame and the second delta MV for the second reference frame are signaled together may be represented as joint_mvd_flag. In some implementations, the first reference frame may be a frame in a reference list (reference list 0) and / or the second reference frame may be a frame in another reference list (reference list 1).

[0169] In some implementations, step 1830 may include extracting, by the device, a flag (joint_mvd_flag) from the coded video bitstream indicating whether a first delta MV for a first reference frame in reference list 0 and a second delta MV for a second reference frame in reference list 1 are signaled together.

[0170] In various embodiments of the present disclosure, the size of a block (such as, but not limited to, a coding block, a prediction block, or a transformation block) may refer to the width or height of the block. The width or height of the block may be an integer in pixels. In various embodiments of the present disclosure, the size of a block may refer to the area size of the block. The area size of the block may be an integer calculated by multiplying the width of the block by the height of the block in pixels. In some various embodiments of the present disclosure, the size of a block may refer to the maximum value of the width or height of the block, the minimum value of the width or height of the block, or the aspect ratio of the block. The aspect ratio of the block may be calculated as the width of the block divided by the height, or the height of the block divided by the width.

[0171] Here, in some embodiments of the present disclosure, a "first" reference frame can refer not only to "one" reference frame but also to the "first" reference frame among multiple reference frames (e.g., the one having the smallest index or appearing earliest in a sequence), and a "second" reference frame can refer not only to "the other" reference frame but also to the "second" reference frame among multiple reference frames (e.g., the one having the second smallest index or appearing second earliest in a sequence).

[0172] Here, in various embodiments of the present disclosure, "XYZ is signaled" can refer to XYZ being encoded into a coded bitstream during the encoding process, and / or after the coded bitstream is transmitted from one device to another, "XYZ is signaled" can refer to XYZ being decoded / extracted from the coded bitstream during the decoding process.

[0173] Here, in various embodiments of the present disclosure, the direction of a reference frame may be determined by whether the reference frame is before the current frame in display order or after the current frame in display order. In some implementations of the mixed reference mode, when the picture order count (POC) of both reference frames for one motion vector pair is greater or smaller than the POC of the current frame, the directions of the two reference frames are the same. Otherwise, when the POC of one reference frame is greater than the POC of the current frame and the POC of the other reference frame is smaller than the POC of the current frame, the directions of the two reference frames are different.

[0174] Here, in various embodiments of this disclosure, a "block" may refer to a predictive block, a coding block, a transform block, or a coding unit (CU).

[0175] Referring to step 1810, the device may be the electronic device (530) of Figure 5 or the video decoder (810) of Figure 8. In some implementations, the device may be a decoder (633) within the encoder (620) of Figure 6. In some implementations, the device may be a portion of the electronic device (530) of Figure 5, a portion of the video decoder (810) of Figure 8, or a portion of the decoder (633) within the encoder (620) of Figure 6. The coded video bitstream may be a coded video sequence of Figure 8, or intermediate coded data of Figure 6 or Figure 7.

[0176] Referring to step 1820, the device may extract an inter prediction mode and a joint delta motion vector (MV) of a current block in a current frame from a coded video bitstream. The current block may be in a mixed reference mode. The inter prediction mode may include one of a NEAR_NEAR mode, a NEW_NEARMV mode, a NEAR_NEWMV mode, or a NEW_NEWMV mode. The joint delta MV may be referred to as an MV difference (MVD).

[0177] Referring to step 1830, the device may extract from the coded video bitstream a flag indicating whether a first delta MV for a first reference frame and a second delta MV for a second reference frame are signaled together.

[0178] In some implementations of some inter-prediction modes, the flag is encoded in the coded video bitstream, and the device can extract the flag from the coded video bitstream.

[0179] In some implementations of a particular inter-prediction mode, the flag is not encoded in the coded video bitstream, and the device may derive the flag according to the particular inter-prediction model based on a default value. For example, the inter-prediction mode of the current block is NEAR_NEARMV, and step 1830 may include determining the flag as a default value. In some implementations, the default value is 0, indicating that the first delta MV for the first reference frame and the second delta MV for the second reference frame are not signaled together.

[0180] In some implementations of the mixed reference mode, a flag, which may be named joint_mvd_flag, may be sent to the device to indicate whether the delta MVs of the first reference list (Reference List 0) and the second reference list (Reference List 1) are signaled together.

[0181] In some other implementations, depending on the value of a flag (joint_mvd_flag) indicating that the delta MVs of reference list 0 and reference list 1 are signaled together, only one joint delta MV, which may be named joint_delta_mv, is signaled and sent to the decoder, and the delta MVs of reference list 0 and reference list 1 may be derived from the joint delta MV (joint_delta_mV). Depending on the value of a flag (joint_mvd_flag) indicating that the delta MVs of reference list 0 and reference list 1 are not signaled together, zero or one or two delta MVs may be signaled separately for reference list 0 and / or reference list 1 based on the inter prediction mode.

[0182] In some implementations, a value of 0 of the flag may indicate that the delta MVs of reference list 0 and reference list 1 are signaled together and only one joint delta MV is signaled and transmitted, and a value of 1 of the flag may indicate that the delta MVs of reference list 0 and reference list 1 are not signaled together and zero (or one or two) joint delta MVs may be signaled and transmitted. Conversely, in some other implementations, a value of 1 of the flag may indicate that the delta MVs of reference list 0 and reference list 1 are signaled together and only one joint delta MV is signaled and transmitted, and a value of 0 of the flag may indicate that the delta MVs of reference list 0 and reference list 1 are not signaled together and zero (or one or two) joint delta MVs may be signaled and transmitted.

[0183] Referring to step 1840, in response to the flag indicating that the first delta MV and the second delta MV are signaled together, the device may derive the first delta MV and the second delta MV based on the joint delta MV.

[0184] In some implementations, if the inter prediction mode of the current block is NEW_NEWMV and a flag (e.g., joint_mvd_flag) indicates that the delta MVs of reference list 0 and reference list 1 are signaled together, the delta MVs of reference list 0 and / or reference list 1 may be derived from joint_delta_mv based on the POC distances of the first and second reference frames relative to the current frame and the orientations of the two reference frames.

[0185] In some other implementations, the inter prediction mode of the current block is NEW_NEWMV, and step 1840 may include determining a first delta MV as a joint delta MV, and determining a second delta MV by scaling the joint delta MV according to at least one of the following: a first picture order count (POC) distance between the first reference frame and the current frame, a second POC distance between the second reference frame and the current frame, or a directional relationship of the first reference frame and the second reference frame with respect to the current frame.

[0186] In some other implementations, the inter prediction mode of the current block is NEW_NEWMV, and step 1840 may include determining a second delta MV as a joint delta MV, and determining the first delta MV by scaling the joint delta MV according to at least one of the following: a first picture order count (POC) distance between the first reference frame and the current frame, a second POC distance between the second reference frame and the current frame, or a directional relationship of the first reference frame and the second reference frame with respect to the current frame.

[0187] In some embodiments, the delta MV in reference list 0 (or list 1) may always be set equal to joint_delta_mv, and the delta MV in reference list 1 (or list 0) may be scaled from joint_delta_mv according to the POC distance of the reference frame to the current frame and / or the orientation of the two reference frames.

[0188] In some other implementations, the inter prediction mode of the current block is NEW_NEWMV, and step 1840 may include determining a first delta MV as a joint delta MV in response to a first absolute POC distance between the first reference frame and the current frame being greater than a second absolute POC distance between the second reference frame and the current frame, and determining a second delta MV by scaling the joint delta MV according to at least one of the following: the first POC distance between the first reference frame and the current frame, the second POC distance between the second reference frame and the current frame, or a directional relationship of the first reference frame and the second reference frame relative to the current frame.

[0189] In some other implementations, the inter prediction mode of the current block is NEW_NEWMV, and step 1840 may include determining a second delta MV as a joint delta MV in response to a first absolute POC distance between the first reference frame and the current frame being smaller than a second absolute POC distance between the second reference frame and the current frame, and determining the first delta MV by scaling the joint delta MV according to at least one of the following: the first POC distance between the first reference frame and the current frame, the second POC distance between the second reference frame and the current frame, or a directional relationship of the first reference frame and the second reference frame relative to the current frame.

[0190] In some embodiments, if the absolute POC distance between reference list 0 (or list 1) and the current frame is greater than the absolute POC distance between reference list 1 (or list 0) and the current frame, the delta MV in reference list 0 (or list 1) with the greater absolute POC distance may be set equal to joint_delta_mv. The delta MV in reference list 1 (or list 0), the other one with the smaller absolute POC distance, may be scaled from joint_delta_mv according to the POC distance of the reference frame to the current frame and / or the orientation of the two reference frames.

[0191] In some other implementations, the inter prediction mode of the current block is NEW_NEWMV, and step 1840 may include determining a first delta MV as a joint delta MV in response to a first absolute POC distance between the first reference frame and the current frame being equal to a second absolute POC distance between the second reference frame and the current frame, determining a second delta MV as a joint delta MV in response to a directional relationship of the first reference frame and the second reference frame relative to the current frame being the same, and determining the second delta MV as the joint delta MV multiplied by -1 in response to a directional relationship of the first reference frame and the second reference frame relative to the current frame being opposite.

[0192] In some embodiments, if the absolute POC distance between reference list 1 and the current frame is the same as the absolute POC distance between reference list 0 and the current frame, the delta MV in reference list 0 may be set equal to joint_delta_mv. If the orientations of the two reference frames are the same, the delta MV in reference list 1 may be set equal to joint_delta_mv. On the other hand, if the orientations of the two reference frames are different, the delta MV in reference list 1 is set to joint_delta_mv multiplied by -1.

[0193] In various embodiments / implementations of the present disclosure, scaling the joint delta MV to obtain the second delta MV according to at least one of the first POC distance between the first reference frame and the current frame, the second POC distance between the second reference frame and the current frame, or the orientation relationship of the first reference frame and the second reference frame with respect to the current frame can include a linear scaling method, i.e., the absolute value of the scaled delta MV can be proportional to the ratio of the second POC distance divided by the first POC distance, and the sign of the scaled delta MV can be determined according to the orientation relationship. For example, if the first POC distance is 4, the second POC distance is 8, and the orientation relationship is the same direction in the first reference frame and the second reference frame with respect to the current frame, the second delta MV is obtained by scaling / multiplying the joint delta MV by 2 (=8 / 4), and the second delta MV has the same sign as the joint delta MV because the orientation relationship is the same direction. In another example, if the first POC distance is 3, the second POC distance is -9, and the directional relationship is in the opposite direction for the first and second reference frames with respect to the current frame, the second delta MV is obtained by scaling / multiplying the joint delta MV by -3 times (=-9 / 3), and the second delta MV has the opposite sign as the joint delta MV because the directional relationship is in the opposite direction.

[0194] In some other implementations, the inter prediction mode of the current block is NEW_NEARMV, and the second delta MV may be slightly adjusted by a predetermined weight. Step 1840 may include determining the first delta MV as a joint delta MV, and determining the second delta MV by scaling the joint delta MV according to at least one of the following: a first POC distance between the first reference frame and the current frame, a second POC distance between the second reference frame and the current frame, a directional relationship of the first reference frame and the second reference frame to the current frame, or a predetermined weighting factor.

[0195] In some other implementations, the inter prediction mode of the current block is NEAR_NEWMV, and the first delta MV may be slightly adjusted by a predetermined weight. Step 1840 may include determining the second delta MV as a joint delta MV, and determining the first delta MV by scaling the joint delta MV according to at least one of the following: a first POC distance between the first reference frame and the current frame, a second POC distance between the second reference frame and the current frame, a directional relationship of the first reference frame and the second reference frame to the current frame, or a predetermined weighting factor.

[0196] In some other implementations, the predetermined weighting factor is a fraction between −1 and 1.

[0197] In some other implementations, the predetermined weighting coefficients are signaled in a high-level syntax including at least one of a sequence parameter set (SPS), a video parameter set (VPS), a picture parameter set (PPS), a picture header, a tile header, a slice header, a frame header, a coding tree unit (CTU) header, or a superblock header.

[0198] In some embodiments, if the current block is in NEW_NEAR mode (or NEAR_NEW mode) and joint_mvd_flag indicates that delta MVs of reference list 0 and reference list 1 are signaled together, the delta MV of reference list 0 (or list 1) may be set equal to joint_delta_mv, and the delta MV of list 1 (or list 0) is scaled from joint_delta_mv based on one or more coded information including, but not limited to, the POC distance of the reference frame to the current frame, the orientation of the two reference frames, the difference between the MV predictors of the two MVs, and / or a predefined weighting factor w. In some implementations, this predefined weighting factor may be a number between -1 and 1, e.g., 1 / 2. In some other implementations, this predefined weighting factor may be signaled in a high level syntax including, but not limited to, the SPS, VPS, PPS, picture header, tile header, slice header, frame header, CTU (or superblock) header.

[0199] In various embodiments / implementations of the present disclosure, scaling the joint delta MV to obtain a weight-adjusted delta MV according to at least one of the following: a first POC distance between the first reference frame and the current frame, a second POC distance between the second reference frame and the current frame, a directional relationship of the first and second reference frames to the current frame, or a predetermined weighting factor may include a linear scaling method, i.e., the absolute value of the scaled delta MV is proportional to the ratio of the second POC distance divided by the first POC distance, and then multiplied by a predetermined weighting factor. The sign of the scaled delta MV may be determined according to the directional relationship. For example, if the first POC distance is 4, the second POC distance is 8, the directional relationship is the same direction for the first and second reference frames relative to the current frame, and the predetermined weighting factor is 1 / 2, the weight-adjusted delta MV is obtained by scaling / multiplying the joint delta MV by a total factor of 1, which is calculated by multiplying the factor 2 (=8 / 4) by the weighting factor 1 / 2, and the weight-adjusted delta MV has the same sign as the joint delta MV because the directional relationship is the same direction. In another example, if the first POC distance is 3, the second POC distance is -9, the directional relationship is the opposite direction for the first and second reference frames relative to the current frame, and the predetermined weighting factor is 1 / 2, the weight-adjusted delta MV is obtained by scaling / multiplying the joint delta MV by a total factor of -3 / 2, which is calculated by multiplying the factor -3 (=-9 / 3) by the weighting factor 1 / 2. The weight-adjusted delta MV has the opposite sign to the joint delta MV because the directional relationship is the opposite direction.

[0200] The embodiments of the present disclosure may be used separately or combined in any order. Any steps and / or operations in any embodiment of the present disclosure may be combined or arranged in any quantity or order as desired. Two or more of the steps and / or operations in any embodiment of the present disclosure may be performed in parallel. Furthermore, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. The embodiments of the present disclosure may be applied to a luma block or a chroma block.

[0201] The techniques described above may be implemented as computer software using computer readable instructions and physically stored on one or more computer readable media. For example, Figure 19 illustrates a computer system (2000) suitable for implementing certain embodiments of the disclosed subject matter.

[0202] Computer software can be coded using any suitable machine code or computer language that is capable of undergoing mechanisms such as assembly, compilation, linking, etc. to create code containing instructions that can be executed by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc. directly, or via interpretation, microcode execution, etc.

[0203] The instructions may be executed on various types of computers or components thereof including, for example, personal computers, tablet computers, servers, smart phones, gaming devices, Internet of Things devices, and the like.

[0204] 19 with respect to the computer system (2000) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure. The arrangement of components should not be interpreted as having a dependency or requirement regarding any one or combination of components illustrated in the exemplary embodiment of the computer system (2000).

[0205] The computer system (2000) may include certain human interface input devices. Such human interface input devices may respond to input by one or more human users, for example, via tactile input (e.g., keystrokes, swipes, data glove movements), audio input (e.g., voice, clapping), visual input (e.g., gestures), olfactory input (not shown). Human interface devices may also be used to capture certain media that do not necessarily involve direct conscious input by a person, such as sound (speech, music, ambient sounds, etc.), images (scanning images, photographic images captured by still image cameras, etc.), video (two-dimensional video, three-dimensional video including stereoscopic video, etc.).

[0206] The input human interface devices may include one or more (only one of each shown) of a keyboard (2001), a mouse (2002), a trackpad (2003), a touch screen (2010), a data glove (not shown), a joystick (2005), a microphone (2006), a scanner (2007), a camera (2008).

[0207] The computer system (2000) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the human user's senses, for example, by haptic output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touch screen (2010), data gloves (not shown), or joystick (2005), although there may also be haptic feedback devices that do not function as input devices), audio output devices (e.g., speakers (2009), headphones (not shown)), visual output devices (e.g., screens (2010), including CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch screen input capability, each with or without haptic feedback capability, some of which may be capable of two-dimensional visual output, or four or more dimensions of output by means of stereoscopic image output, virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown), etc.), and printers (not shown).

[0208] The computer system (2000) may also include human accessible storage devices and their associated media, such as optical media including CD / DVD ROM / RW (2020) with media (2021) such as CDs / DVDs, thumb drives (2022), removable hard drives or solid state drives (2023), legacy magnetic media such as tapes and floppy disks (not shown), dedicated ROM / ASIC / PLD based devices (not shown) such as security dongles, and the like.

[0209] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with this disclosure does not encompass transmission media, carrier waves, or other transitory signals.

[0210] The computer system (2000) may also include an interface (2054) to one or more communication networks (2055). The networks may be, for example, wireless, wired, optical. The networks may further be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include local area networks such as Ethernet, cellular networks including wireless LAN, GSM, 3G, 4G, 5G, LTE, etc., television wired or wireless wide area digital networks including cable television, satellite television and terrestrial television, vehicular and industrial including CAN bus, etc. Certain networks typically require an external network interface adapter connected to a particular general-purpose data port or peripheral bus (2049) (e.g., a USB port on the computer system (2000)), while others are generally integrated into the core of the computer system (2000) by connecting to a system bus, as described below (e.g., an Ethernet interface for a PC computer system, or a cellular network interface for a smartphone computer system). Using any of these networks, the computer system (2000) may communicate with other entities. Such communications may be one-way receive only (e.g., television broadcast), one-way transmit only (e.g., a CANbus to a particular CANbus device), or bidirectional, for example, to other computer systems using local or wide area digital networks. Specific protocols and protocol stacks may be used in each of those networks and network interfaces, as described above.

[0211] The aforementioned human interface devices, human accessible storage devices, and network interfaces may be attached to the core (2040) of the computer system (2000).

[0212] The cores (2040) may include one or more central processing units (CPUs) (2041), graphics processing units (GPUs) (2042), dedicated programmable processing units in the form of field programmable gate areas (FPGAs) (2043), hardware accelerators for specific tasks (2044), graphics adapters (2050), and the like. These devices may be connected via a system bus (2048), along with read-only memory (ROM) (2045), random access memory (2046), internal mass storage (2047), such as an internal non-user accessible hard drive, SSD, and the like. In some computer systems, the system bus (2048) may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, and the like. Peripheral devices may be attached directly to the core's system bus (2048) or via a peripheral bus (2049). In one example, a screen (2010) may be connected to the graphics adapter (2050). Peripheral bus architectures include PCI, USB, and the like.

[0213] The CPU (2041), GPU (2042), FPGA (2043), and accelerator (2044) can execute certain instructions that can be combined to constitute the aforementioned computer code. That computer code can be stored in ROM (2045) or RAM (2046). Temporary data can also be stored in RAM (2046), and persistent data can be stored, for example, in internal mass storage (2047). Rapid storage and retrieval in any of the memory devices can be made possible by the use of cache memory, which can be closely associated with one or more CPUs (2041), GPUs (2042), mass storage (2047), ROM (2045), RAM (2046), and the like.

[0214] The computer-readable medium can bear computer code for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be of the kind well known and available to those skilled in the computer software arts.

[0215] As a non-limiting example, a computer system (2000) having the architecture, and in particular a core (2040), may provide functionality as a result of a processor (or processors) (including CPUs, GPUs, FPGAs, accelerators, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media may be user-accessible mass storage as described above, as well as media associated with specific storage of the core (2040) that is non-transitory in nature, such as the core internal mass storage (2047) or ROM (2045). Software implementing various embodiments of the present disclosure may be stored in such devices and executed by the core (2040). The computer-readable media may include one or more memory devices or chips, depending on the particular needs. The software may cause the core (2040), and in particular the processors (including CPUs, GPUs, FPGAs, etc.) therein, to perform certain processes or certain portions of certain processes described herein, including defining data structures stored in RAM (2046) and modifying such data structures according to the processes defined by the software. Additionally or alternatively, the computer system may provide functionality as a result of logic hardwired or otherwise embodied in circuitry (e.g., accelerator (2044)), which may operate in place of or in conjunction with software to perform particular processes or particular portions of particular processes described herein. Where appropriate, references to software may encompass logic, and vice versa. Where appropriate, references to computer-readable media may encompass circuitry (such as an integrated circuit (IC)) that stores software for execution, circuitry that embodies logic for execution, or both. The present disclosure encompasses any suitable combination of hardware and software.

[0216] Although a particular invention has been described with reference to exemplary embodiments, this description is not intended to be limiting. Various modifications of the exemplary and additional embodiments of the invention will become apparent to those skilled in the art upon reading this description. Those skilled in the art will readily appreciate that these and other various modifications can be made to the exemplary embodiments shown and described herein without departing from the spirit and scope of the invention. Accordingly, the appended claims are intended to encompass any such modifications and alternative embodiments. Certain parts in the figures may be exaggerated and other parts may be minimized. Thus, the disclosure and drawings should be considered illustrative rather than limiting.

[0217] Below is a list of acronyms, some of which may appear in this disclosure. JEM: Joint Exploration Model VVC: Versatile Video Coding BMS: Benchmark Set MV: Motion Vector HEVC: High Efficiency Video Coding SEI: Supplemental Extended Information VUI: Video Usability Information GOP: Group of Pictures TU: conversion unit PU: Prediction Unit CTU: Coding Tree Unit CTB: coding tree block PB: Predicted block HRD: Hypothetical Reference Decoder SNR: Signal to Noise Ratio CPU: Central Processing Unit GPU: Graphics Processing Unit CRT: cathode ray tube LCD: Liquid crystal display OLED: Organic Light Emitting Diode CD:Compact Disc DVD: Digital Video Disc ROM: Read-Only Memory RAM: Random Access Memory ASIC: Application Specific Integrated Circuit PLD: Programmable Logic Device LAN: Local Area Network GSM: Global System for Mobile Communications LTE: Long Term Evolution CANBus: Controller Area Network Bus USB: Universal Serial Bus PCI: Peripheral Component Interconnect FPGA: Field Programmable Gate Area SSD: Solid State Drive IC: Integrated Circuit HDR: High Dynamic Range SDR: Standard Dynamic Range JVET: Joint Video Exploration Team MPM: Most Probable Mode WAIP: Wide-angle Intra Prediction CU: coding unit PU: Prediction Unit TU: conversion unit CTU: Coding Tree Unit PDPC: Position-dependent prediction combination ISP: Intra Subpartition SPS: Sequence Parameter Settings PPS: Picture Parameter Set APS: Adaptive Parameter Set VPS: Video Parameter Set DPS: Decoding Parameter Set ALF: Adaptive Loop Filter SAO: Sample Adaptive Offset CC-ALF: Cross-component adaptive loop filter CDEF: Constrained Directivity Enhancement Filter CCSO: Cross component sample offset LSO: Local Sample Offset LR: Loop recovery filter AV1:AOMedia Video 1 AV2:AOMedia Video 2 MVD: Motion Vector Difference CfL: Chroma from Luma SDT: Semi-disjoint tree SDP: Semi-separate split SST: Semi-separated tree SB: Super Block IBC (or IntraBC): Intrablock copy CDF: Cumulative density function SCC: Screen Content Coding GBI: Generalized Bi Prediction BCW: Bi-prediction with CU-level weights CIIP: Combined Intra-Inter Prediction POC: Picture Order Count RPS: Reference Picture Set DPB: Decoded Picture Buffer MMVD: Merge mode with motion vector difference [Explanation of symbols]

[0218] 101 Samples 102 Arrow 103 Arrow 104 Block 201 Current Block 300 Communication Systems 310 Terminal Devices 320 Terminal Devices 330 Terminal Devices 340 Terminal Devices 350 Network 400 Communication Systems 401 Video Source 402 Video picture or image stream 403 Video Encoder 404 Encoded video data 405 Streaming Server 406 Client Subsystem A copy of the 407 encoded video data 408 Client Subsystem A copy of the 409 encoded video data 410 Video Decoder 411 Video Picture Output Stream 412 Display 413 Video Capture Subsystem 420 Electronic Devices 430 Electronic Devices 501 Channel 510 Video Decoder 512 Display 515 Buffer Memory 520 Entropy Decoder / Parser 521 Symbols 530 Electronic Devices 531 Receiver 551 Scaler / Descaler Unit 552 Intra-picture prediction unit 553 Motion Compensation Prediction Unit 555 Aggregator 556 Loop Filter Unit 557 Reference Picture Memory 558 Current Picture Buffer 601 Video Sources 603 Video Encoder 620 Electronic Devices 630 Source Coder 632 Coding Engine 633 Decoder 634 Reference Picture Memory 635 Predictor 640 Transmitter 643 coded video sequence 645 Entropy Coder 650 Controller 660 Communication Channels 703 Video Encoder 721 General-purpose controller 722 Intra Encoder 723 Residual Calculator 724 Residual Encoder 725 Entropy Encoder 726 Switch 728 Residual Decoder 730 InterEncoder 810 Video Decoder 871 Entropy Decoder 872 Intra Decoder 873 Residual Decoder 874 Reconstruction Module 880 Interdecoder 902 Splitting options or patterns 904 Splitting options or patterns 906 Splitting Options or Patterns 908 Splitting options or patterns 1002 subpartitions 1004 subpartitions 1006 subpartitions 1008 subpartitions 1200 Base Block 1202 Square Partition 1204 Square Partition 1206 Square Partition 1208 Square Partition 1402 Partition 1404 Partition 1406 Partition 1408 Partition 1502 Square coding block 1504 Conversion Block 1506 Conversion Block 1602 Inter-coded Blocks 1604 Inter-coded Blocks 2000 Computer Systems 2001 Keyboard 2002 Mouse 2003 Trackpad 2005 Joystick 2006 Microphone 2007 Scanner 2008 Camera 2009 Speaker 2010 Touchscreen 2020 CD / DVD ROM / RW 2021 Media 2022 Thumb Drive 2023 Removable Hard Drive or Solid State Drive 2040 Core 2041 Central Processing Unit (CPU) 2042 Graphics Processing Unit (GPU) 2043 Field Programmable Gate Area (FPGA) 2044 Hardware Accelerator 2045 Read-Only Memory (ROM) 2046 Random Access Memory 2047 Internal Mass Storage 2048 System Bus 2049 General Purpose Data Port or Peripheral Bus 2050 Graphics Adapter 2054 Interface 2055 Communication Network

Claims

1. 1. A method for decoding an inter-predicted video block, the method comprising: receiving a coded video bitstream by a device having a memory storing instructions and a processor in communication with the memory; the device extracting from the coded video bitstream an inter prediction mode and a joint delta motion vector (MV) (joint_delta_mv) of a current block in a current frame, where the inter prediction mode of the current block is NEW_NEWMV; extracting, from the coded video bitstream, a flag (joint_mvd_flag) indicating whether a first delta MV for a first reference frame in Reference List 0 and a second delta MV for a second reference frame in Reference List 1 are signaled together; in response to the flag indicating that the first delta MV and the second delta MV are signaled together, the device deriving the first delta MV and the second delta MV based on the joint delta MV; determining the first delta MV as the joint delta MV; a first Picture Order Count (POC) distance between the first reference frame and the current frame; a second POC distance between the second reference frame and the current frame; or A directional relationship of the first reference frame and the second reference frame with respect to the current frame. determining the second delta MV by scaling the joint delta MV according to at least one of and the device decoding the current block in the current frame based on the first delta MV and the second delta MV; A method comprising:

2. 1. An apparatus for decoding an inter-predicted video block, comprising: A memory for storing instructions; a processor in communication with the memory, the processor being configured, when the processor executes the instructions, to cause the apparatus to perform the method of claim 1; An apparatus comprising:

3. A computer program product for causing a computer to carry out the method according to claim 1.

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