Method, apparatus and program for decoding video
The method addresses the challenges of video coding by adjusting the search range for intra-block copy modes in video coding, improving performance and efficiency in video encoding and decoding.
Patent Information
- Application Number
- JP2024066528
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-08-06
- Filing Date
- 2024-04-17
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2040-01-06
AI Technical Summary
Current video coding techniques face challenges in efficiently compressing video data, particularly in reducing redundancy and managing variable CTU sizes, which affects the search range for intra-block copy modes.
The proposed solution involves a method for adjusting the search range in intra-block copy mode by determining a block vector that points to a reference block within the same image, using a processing circuit to reconstruct samples based on reconstructed samples from the reference sample memory, and overriding the block vector when colocated blocks in the current CTU have been partially reconstructed.
This approach improves the performance of intra-block copying by extending the effective search range while maintaining efficient memory usage, thereby enhancing video encoding and decoding efficiency.
Smart Images

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Abstract
Description
[Technical field]
[0001] Incorporation by Reference This application claims the benefit of priority to U.S. Patent Application No. 16 / 533,719, entitled "METHOD AND APPARATUS FOR VIDEO CODING," filed August 6, 2019, and claims the benefit of priority to U.S. Provisional Application No. 62 / 792,888, entitled "SEARCH RANGE ADJUSTMENT WITH VARIABLE CTU SIZE FOR INTRA PICTURE BLOCK COMPENSATION," filed January 15, 2019. The entire disclosures of the prior applications are incorporated herein by reference in their entirety.
[0002] Technical Field This disclosure describes embodiments generally related to video coding. [Background technology]
[0003] The background discussion provided herein is intended to generally present the context of the present disclosure. Work of the presently cited inventors is not expressly or impliedly admitted as prior art to the present disclosure to the extent that such work is described in this background section, or in aspects of the description that may not otherwise qualify as prior art at the time of filing.
[0004] Video coding and decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can include a sequence of images, each having spatial dimensions of, for example, 1920x1080 luma samples and associated chrominance samples. The sequence of images can have a fixed or variable image rate (for example, 60 images / second or 60Hz). Uncompressed video requires large bit rates. For example, 1080p60 4:2:0 video (1920x1080 luma sample resolution at a frame rate of 60Hz) with 8 bits per sample requires a bandwidth approaching 1.5Gbit / s. One hour of such video requires more than 600Gbytes of storage space.
[0005] One goal of video coding and decoding is the reduction of redundancy in the input video signal through compression. Compression helps to reduce the bandwidth or storage space requirements, in some cases by more than two orders of magnitude. Both lossless and lossy compression, as well as combinations thereof, can be used. Lossless compression refers to techniques where an exact copy of the original signal can be reconstructed from the compressed original signal. When lossy compression is used, the reconstructed signal may not be identical to the original signal, but the distortion between the original and reconstructed signals is small enough to make the reconstructed signal useful for its intended use. For video, lossy compression is widely used. The amount of distortion that is tolerated depends on the application, for example, a user of a particular consumer streaming application may tolerate higher distortion than a user of a television distribution application. The achievable compression ratio can reflect that a higher tolerable / acceptable distortion can result in a higher compression ratio.
[0006] Video encoders and decoders can utilize techniques from a number of broad categories, including, for example, motion compensation, transform, quantization, and entropy coding.
[0007] Video codec techniques can include a technique known as intra-coding. In intra-coding, sample values are represented without reference to samples or other data from a previously reconstructed reference picture. In some video codecs, an image is spatially divided into blocks of samples. If all blocks of samples are coded in intra mode, the image can be an intra-image. Intra-images and their derivatives, such as independent decoder refresh images, can be used to reset the decoder state and therefore can be used as the first image in a coded video bitstream and video session or as still images. Samples of an intra-block can be subjected to a transform, and the transform coefficients can be quantized before entropy coding. Intra prediction can be a technique that minimizes sample values in the pre-transform domain. In some cases, the smaller the DC value and the smaller the AC coefficients after the transform, the fewer bits are needed for a given quantization step size to represent the block after entropy coding.
[0008] Conventional intra-coding, for example as known from MPEG-2 generation coding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to predict a block of data from surrounding, preceding sample data in decoding order and / or metadata obtained during encoding / decoding of spatially adjacent data. Such techniques are hereafter referred to as "intra-prediction" techniques. It should be noted that at least in some cases, intra-prediction uses only reference data from the current image being reconstructed, and not from a reference image.
[0009] There may be various forms of intra-prediction. If one or more of such techniques can be used in a given video coding technique, the technique in use may be coded in an intra-prediction mode. In certain cases, a mode may have sub-modes and / or parameters, which may be coded separately or may be included in a mode codeword. The codeword used for a given mode / sub-mode / parameter combination may affect the coding efficiency gain through intra-prediction, as well as the entropy coding technique used to convert the codeword into a bitstream.
[0010] Certain intra-prediction modes were introduced in H.264, improved in H.265, and further improved in newer coding techniques such as the joint exploration model (JEM), versatile video coding (VVC), and benchmark sets (BMS). A predictor block can be formed using neighboring sample values belonging to already available samples. The sample values of the neighboring samples are copied to the predictor block according to the direction. The reference to the direction in use can be coded in the bitstream or it can be predicted itself.
[0011] Referring to FIG. 1, shown at the bottom right is a subset of 9 predictor directions known from the 33 possible predictor directions of H.265 (corresponding to the 33 angle modes of the 35 intra modes). The points where the arrows converge (101) represent the samples being predicted. The arrows indicate the direction in which the samples are predicted. For example, arrow (102) indicates that sample (101) is predicted from one or more samples toward the top right at an angle of 45 degrees from the horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more samples (101) toward the bottom left of sample (101) at an angle of 22.5 degrees from the horizontal.
[0012] 1, at the top left is shown a square block (104) of 4x4 samples (indicated by a dashed bold line). The square block (104) contains 16 samples, each labeled with an "S" including its position in the Y dimension (e.g., row index) and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample (from the top) in the Y dimension and the first sample (from the left) in the X dimension. Similarly, sample S44 is the fourth sample in both the Y and X dimensions within the block (104). Since the size of the block is 4x4 samples, S44 is at the bottom right. Also shown are reference samples following a similar numbering scheme. The reference samples are labeled with R, their Y position (e.g., row index) and X position (column index) relative to the block (104). In both H.264 and H.265, the predicted samples are adjacent to the block being reconstructed, so There is no need to use negative values.
[0013] Intra-image prediction works by copying reference sample values from adjacent samples according to a signal prediction direction. For example, assume that the coded video bitstream includes a signal indicating a prediction direction that coincides with the arrow (102) for this block. That is, a sample is predicted from one or more prediction samples to the upper right and at an angle of 45 degrees from the horizontal. In that case, samples S41, S32, S23, and S14 are predicted from the same reference sample R05. Then, sample S44 is predicted from reference sample R08.
[0014] In certain cases, especially when the orientation is not evenly divisible by 45 degrees, the values of multiple reference samples may be combined, for example by interpolation, to calculate the reference sample.
[0015] With the development of video coding technology, the number of possible directions is increasing. In H.264 (2003), nine different directions could be represented. This increased to 33 in H.265 (2013), and at the time of disclosure, JEM / VVC / BMS can support up to 65 directions. Experiments have been carried out to identify the most likely directions, and certain techniques of entropy coding are used to represent those possible directions in a small number of bits, accepting certain penalties for less likely directions. Furthermore, the direction itself can sometimes be predicted from nearby directions used in neighboring, already decoded blocks.
[0016] FIG. 2 shows a schematic diagram (201) illustrating 65 intra prediction directions with JEM to illustrate the increasing number of prediction directions over time.
[0017] The mapping of intra-prediction direction bits in a coded video bitstream that represent the direction can vary from video coding technique to video coding technique, ranging, for example, from a simple direct mapping of prediction direction to complex adaptation schemes including intra-prediction modes, codenames, most likely modes, and similar techniques. However, in any given case, there may be certain directions in the video content that are statistically less likely than other directions, and since the goal of video compression is to reduce redundancy, in a well-performing video coding technique, the less likely directions will be represented by a greater number of bits than the more likely directions. Summary of the Invention
[0018] Aspects of the present disclosure provide a method and apparatus for video encoding / decoding. In some embodiments, the apparatus for video decoding includes a receiving circuit and a processing circuit. For example, the processing circuit decodes prediction information of a current block in a current coding tree unit (CTU) from a coded video bitstream. The prediction information represents an intra block copy mode. A size of the current CTU is smaller than a maximum size of a reference sample memory for storing reconstructed samples. The processing circuit determines a block vector that points to a reference block of the same image as the current block. The reference block has reconstructed samples buffered in the reference sample memory. Then, the processing circuit reconstructs at least one sample of the current block based on the reconstructed sample of the reference block read from the reference sample memory.
[0019] In some embodiments, the processing circuit determines a block vector pointing to a reference block that is in the same CTU column as the current CTU and is located within a region from the (N-1)th CTU to the left of the current CTU to an adjacent CTU to the left of the current CTU, and the maximum size of the reference sample memory is N times the size of the current CTU, where N is a positive number greater than 1.
[0020] In some embodiments, the processing circuit checks whether the top boundary of the reference block is within the same CTU column. Further, the processing circuit checks whether the bottom boundary of the reference block is within the same CTU column. Then, the processing circuit checks whether the left boundary of the reference block is to the right of the Nth CTU on the left, and checks whether the right boundary is to the left of the current CTU.
[0021] In some embodiments, the processing circuit checks whether the reference block is at least partially within an Nth CTU to the left that is in the same CTU column as the current CTU, and the maximum size of the reference sample memory is N times the size of the current CTU, where N is a positive number greater than 1.
[0022] Additionally, the processing circuitry checks whether the left boundary of the reference block is within the Nth CTU on the left. If the reference block is at least partially within the Nth CTU on the left, the processing circuitry determines whether a collocated block of the reference block is at least partially reconstructed in the current CTU. In one embodiment, the processing circuitry determines whether an upper left corner of the collocated block has been reconstructed. The processing circuitry invalidates a block vector that points to the reference block if a collocated block in the current CTU has been at least partially reconstructed.
[0023] In some embodiments, the processing circuit determines a reference block region in an N-th CTU on the left that contains the reference block, and determines whether a collocated block region of the reference block region is at least partially reconstructed in the current CTU. The processing circuit then invalidates a block vector that points to the reference block if the collocated block region in the current CTU is at least partially reconstructed.
[0024] Aspects of the present disclosure also provide a non-transitory computer-readable medium storage storing instructions that, when executed by a computer for video decoding, cause the computer to perform a method for video coding. [Brief description of the drawings]
[0025] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Figure 1] FIG. 1 is a schematic diagram of an example subset of intra-prediction modes. [Diagram 2] FIG. 2 is an explanatory diagram of an exemplary intra-prediction direction. [Diagram 3] FIG. 3 is a schematic diagram illustrating a simplified block diagram of a communication system (300) according to one embodiment. [Figure 4] FIG. 4 is a schematic diagram illustrating a simplified block diagram of a communication system (400) according to one embodiment. [Diagram 5] FIG. 5 illustrates a simplified block diagram of a decoder according to one embodiment. [Figure 6] FIG. 6 is a schematic diagram of a simplified block diagram of an encoder according to one embodiment. [Figure 7] FIG. 7 is a block diagram of an encoder according to another embodiment. [Figure 8] FIG. 8 is a block diagram of a decoder according to another embodiment. [Figure 9] FIG. 9 illustrates an example of intra block copy according to one embodiment of the present disclosure. [Figure 10A] FIG. 10A illustrates an example of a valid search range for an intra block copy mode, according to one embodiment of the present disclosure. [Figure 10B] FIG. 10B illustrates an example of a valid search range for the intra block copy mode, according to one embodiment of the present disclosure. [Figure 10C]FIG. 10C illustrates an example of a valid search range for the intra block copy mode, according to one embodiment of the present disclosure. [Figure 10D] FIG. 10D illustrates an example of a valid search range for the intra block copy mode, according to one embodiment of the present disclosure. [Figure 11] FIG. 11 illustrates an example of co-located blocks according to some embodiments of the disclosure. [Figure 12] FIG. 12 illustrates an example of co-located blocks according to some embodiments of the disclosure. [Figure 13] FIG. 13 shows a flowchart outlining an example process according to some embodiments of the present disclosure. [Figure 14] FIG. 14 is a schematic diagram of a computer system according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0026] FIG. 3 illustrates a simplified block diagram of a communication system (300) according to an embodiment of the present disclosure. The communication system (300) includes a plurality of terminal devices that can communicate with each other, for example, via a network (350). For example, the communication system (300) includes a first pair of terminal devices (310) and (320) interconnected via the network (350). In the example of FIG. 3, the first pair of terminal devices (310) and (320) perform a one-way transmission of data. For example, the terminal device (310) can code video data (e.g., a stream of video images captured by the terminal device (310)) and transmit it to another terminal device (320) via the network (350). The encoded image data can be transmitted in the form of one or more coded video bitstreams. The terminal device (320) can receive the coded video data from the network (350), decode the coded video data to reconstruct the video image, and display the video image according to the reconstructed video data. Unidirectional data transmission may be common, such as in media serving applications.
[0027] In another example, the communication system (300) includes a second pair of terminal devices (330) and (340) for bidirectional transmission of coded video data that may occur, for example, during a video conference. For bidirectional transmission of data, for example, each of the terminal devices (330) and (340) may code video data (e.g., a stream of video images captured by the terminal device) for transmission to the other of the terminal devices (330) and (340) over the network (350). Each of the terminal devices (330) and (340) may receive coded video data transmitted by the other of the terminal devices (330) and (340), decode the coded video data to reconstruct the video images, and display the video images on an accessible display device in accordance with the reconstructed video data.
[0028] In the example of FIG. 3, the terminal devices (310), (320), (330), and (340) may be depicted as a server, a personal computer, and a smartphone, although the principles of the present invention are not so limited. Embodiments of the present invention find application in laptop computers, tablet computers, media players, and / or dedicated video conferencing equipment. The network (350) represents any number of networks that convey coded video data between the terminal devices (310), (320), (330), and (340), including, for example, wireline and / or wireless communication networks. The communication network (350) may exchange data in circuit-switched and / or packet-switched channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this description, unless otherwise described below, the architecture and topology of the network (250) may not be important to the operation of the present invention.
[0029] 4 shows an arrangement of a video encoder and a video decoder in a streaming environment as an example application of the disclosed subject matter, which is equally applicable to other video-enabled applications including, for example, video conferencing, digital TV, and storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.
[0030] The streaming system may include, for example, a video source (401) that generates a stream of uncompressed video images (402), a capture subsystem (413) that may include, for example, a digital camera. In one embodiment, the stream of video images (402) includes samples captured by a digital camera. The stream of video images (402), depicted as a thick line to emphasize the high amount of data when compared to the encoded video data (404) (or coded video bitstream), may be processed by an electronic device (420) that includes a video encoder (403) coupled to the video source (401). The video encoder (403) may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video data (404) (or encoded video bitstream (404)), depicted as a thin line to emphasize the lower amount of data when compared to the stream of video images (402), may be stored on a streaming server (405) for future use. One or more streaming client subsystems, such as client subsystems (406) and (408) of FIG. 4, can access the streaming server (405) and retrieve copies (407) and (409) of the encoded video data (404). The client subsystem (406) can include a video decoder (410), for example, in an electronic device (430). The video decoder (410) decodes an input copy (407) of the encoded video data and generates an output stream (411) of video images that can be rendered on a display (412) (e.g., a display screen) or other rendering device (not shown). In some streaming systems, the encoded video data (404), (407), and (409) (e.g., a video bitstream) can be coded according to a particular video coding / compression standard. Examples of these standards include ITU-T Recommendation H.265.For example, a video coding standard under development is informally known as Universal Video Coding (VVC), and the disclosed subject matter may be used in the context of VVC.
[0031] It should be noted that the electronic devices (420) and (430) may include other components (not shown). For example, the electronic device (420) may include a video decoder (not shown), and the electronic device (430) may also include a video encoder (not shown).
[0032] 5 shows a block diagram of a video decoder (510) according to one embodiment of the present disclosure. The video decoder (510) can be included in an electronic device (530). The electronic device (530) can include a receiver (531) (e.g., a receiving circuit). The video decoder (510) can be used in place of the video decoder (410) of the example of FIG. 4.
[0033] The receiver (531) can receive one or more coded video sequences to be decoded by the video decoder (510), in the same or another embodiment, one coded video sequence at a time, where the decoding of each coded video sequence is independent of the other coded video sequences. The coded video sequences can be received from a channel (501), which can be a hardware / software link to a storage device that stores the encoded video data. The receiver (531) can receive the encoded video data together with other data, such as coded audio data and / or ancillary data streams, which can be transferred using respective entities (not shown). The receiver (531) can separate the coded video sequences from the other data. To combat network jitter, a buffer memory (515) can be coupled between the receiver (531) and the entropy decoder / parser (520) (hereinafter "parser (520)"). In certain applications, the buffer memory (515) is part of the video decoder (510). In other cases, it may be external to the video decoder (510) (not shown). In yet other cases, there may be a buffer memory (not shown) external to the video decoder (510), e.g., to combat network jitter, and there may also be another buffer memory (515) inside the video decoder (510), e.g., to handle playout timing. If the receiver (531) is receiving data from a store / forward device of sufficient bandwidth and controllability, or from an isosynchronous network, the buffer memory (515) may not be necessary or may be small.For use with best-effort packet networks such as the Internet, the buffer memory (515) may be required and may be relatively large, advantageously of adaptive size, and may be implemented at least in part in an operating system or similar element (not shown) outside the video decoder (510).
[0034] The video decoder (510) may include a parser (520) for reconstructing symbols (521) from the coded video sequence. These symbol categories include information used to manage the operation of the video decoder (510) as shown in FIG. 5, and potential information to control a rendering device such as a rendering device (512) (e.g., a display screen) that is not an integral part of the electronic device (530) but may be coupled to the electronic device (530). The control information for the rendering device(s) may be in the form of supplemental enhancement information (SEI messages) or video usability information (VUI) parameter set fragments (not shown). The parser (520) may parse / entropy decode the received coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow various principles including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The parser (520) may extract a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder from the coded video sequence based on at least one parameter corresponding to the group. The subgroups may include groups of pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser (520) may also extract information from the coded video sequence, such as transform coefficients, quantization parameter values, motion vectors, etc.
[0035] The parser (520) may perform an entropy decoding / parsing operation on the video sequence received from the buffer memory (515) to generate symbols (521).
[0036] The reconstruction of symbols (521) may include a number of different units, depending on the type of video image or portion thereof being coded (e.g., inter-picture and intra-picture, inter-block and intra-block) and other factors. Which units are included and how can be controlled by subgroup control information parsed from the coded video sequence by the parser (520). The flow of such subgroup control information between the parser (520) and the following units is not shown for clarity.
[0037] In addition to the functional blocks already mentioned, the video decoder (510) may be conceptually divided into several functional units, as described below. In a practical implementation operating under commercial constraints, many of these units will interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, a conceptual subdivision into the following functional units is appropriate:
[0038] The first unit is a scalar / inverse transform unit (551), which receives quantized transform coefficients as well as control information including the transform to be used, block size, quantization factor, quantization scaling matrix, etc. as symbol(s) (521) from the parser (520). The scalar / inverse transform unit (551) can output a block containing sample values that can be input to an aggregator (555).
[0039] In some cases, the output samples of the scaler / inverse transform (551) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed image, but may use prediction information from a previously reconstructed portion of the current image. Such prediction information may be provided by an intra-image prediction unit (552). In some cases, the intra-image prediction unit (552) generates a block of the same size and shape as the block being reconstructed using surrounding already reconstructed information fetched from a current image buffer (558). The current image buffer (558) may, for example, buffer a partially reconstructed current image and / or a fully reconstructed current image. The aggregator (555) may add, on a sample-by-sample basis, the prediction information generated by the intra-prediction unit (552) to the output sample information provided by the scaler / inverse transform unit (551).
[0040] In other cases, the output samples of the scaler / inverse transform unit (551) may relate to inter-coding and potentially to a motion compensated block. In such cases, the motion compensated prediction unit (553) may access the reference picture memory (557) to fetch samples used for prediction. After motion compensating the fetched samples according to the symbols (521) associated with the block, these samples may be added by the aggregator (555) to the output of the scaler / inverse transform unit (551) (in this case referred to as residual samples or residual signals) to generate output sample information. The addresses in the reference picture memory (557) from which the motion compensated prediction unit (553) fetches the prediction samples may be controlled by a motion vector and are available to the motion compensated prediction unit (553) in the form of symbols (521), which may have, for example, X, Y, and reference picture components. Motion compensation may also include interpolating sample values as fetched from the reference picture memory (557), motion vector prediction mechanisms, etc., if sub-sample accurate motion vectors are used.
[0041] The output samples of the aggregator (555) may be subjected to various loop filtering techniques in a loop filter unit (556). Video compression techniques may include in-loop filter technologies, controlled by parameters contained in the coded video sequence (also referred to as the coded video bitstream) and made available to the loop filter unit (556) as symbols (521) from the parser (520), but which may be responsive to meta-information obtained between the decoding of the coded image or coded video sequence and the previous portion (in decoding order), as well as to previously reconstructed and loop filtered sample values.
[0042] The output of the loop filter unit (556) can be a sample stream that can be output to a rendering device (512) or can be stored in a reference image memory (557) for use in future intra-image prediction.
[0043] Once a coded picture is fully reconstructed, it can be used as a reference picture for future predictions. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (520)), the current picture buffer (4558) can become part of the reference picture memory (557), and a new current picture buffer can be reallocated before starting the reconstruction of a subsequent coded picture.
[0044] The video decoder (510) may perform decoding operations according to a given video compression technique of a standard, such as ITU-T Rec. H.265. The coded video sequence may conform to the syntax specified by the video compression technique or standard being used, in the sense that the coded video sequence conforms to both the syntax of the video compression technique or standard and to a profile documented in the video compression technique or standard. In particular, a profile may select a particular tool from all tools available in the video compression technique or standard as the only tool that may be used under that profile. Also, a requirement for compliance may be that the complexity of the coded video sequence is within a range defined by a level of the video compression technique or standard. In some cases, the level limits the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in megasamples per second), maximum reference picture size, etc. The limits set by the level may be further limited in some cases by a Hypothetical Reference Decoder (HRD) specification and HRD buffer management metadata signaled in the coded video sequence.
[0045] In one embodiment, the receiver (531) can receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence(s). The additional data may be used by the video decoder (510) to properly decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.
[0046] FIG. 6 shows a block diagram of a video encoder (603) according to one embodiment of this disclosure. The video encoder (603) is included in an electronic device (620). The electronic device (620) includes a transmitter (640) (e.g., a transmission circuit). The video encoder (603) can be used instead of the video encoder (403) of the example of FIG.
[0047] The video encoder (603) may receive video samples from a video source (601) (which is not part of the electronic device (620) in the example of FIG. 6) that can capture the video image(s) to be coded by the video encoder (603). In another example, the video source (601) is part of the electronic device (620).
[0048] The video source (601) may provide a source video sequence to be coded by the video encoder (603) in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 Y CrCB, RGB, ...), and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media distribution system, the video source (601) may be a storage device that stores pre-prepared video. In a video conferencing system, the video source (601) may be a camera that captures local image information as a video sequence. The video data may be provided as a number of individual images that, when viewed in sequence, result in motion. The image itself may be organized as a spatial array of pixels, each of which may contain one or more samples, depending on the sampling structure, color space, etc., in use. Those skilled in the art may easily understand the relationship between pixels and samples. The following description focuses on samples.
[0049] According to one embodiment, the video encoder (603) may code and compress images of a source video sequence into a coded video sequence (643) in real-time or under any other time constraint required by an application. Achieving an appropriate coding speed is one function of the controller (650). In some embodiments, the controller (650) controls and is operatively coupled to other functional units, as described below. Couplings are not shown for clarity. Parameters set by the controller (650) may include rate control related parameters (picture skip, quantizer, lambda value for rate distortion optimization techniques, ...), picture size, picture group layout, maximum motion vector search range, etc. The controller (650) may be configured to have other appropriate functions associated with the video encoder (603) optimized for a particular system design.
[0050] In some embodiments, the video encoder (603) is configured to operate in a coding loop. As an oversimplified explanation, in one example, the coding loop can include a source coder (630) (e.g., responsible for generating symbols, such as a symbol stream, based on an input image to be coded and a reference image) and a (local) decoder (633) embedded in the video encoder (603). The decoder (633) reconstructs the symbols to create sample data in a manner similar to that which the (remote) decoder also creates (so that any compression between the symbols and the coded video bitstream is lossless in the video compression techniques contemplated in the disclosed subject matter). The reconstructed sample stream (sample data) is input to a reference image memory (634). Since the decoding of the symbol stream results in bit-exact results that are independent of the decoder location (local or remote), the contents in the reference image memory (634) are also bit-exact between the local and remote encoders. In other words, the prediction part of the encoder "sees" exactly the same sample values as the reference image samples that the decoder "sees" when using the prediction during decoding. This basic principle of reference image synchrony (and the resulting drift when synchrony cannot be maintained, e.g., due to channel errors) is used in several related technologies as well.
[0051] The operation of the "local" decoder (533) can be the same as a "remote" decoder, such as the video decoder (410), as already described in detail above in connection with Figure 5. However, with brief reference also to Figure 5, because symbols are available and the coding / decoding of symbols into a coded video sequence by the entropy coder (645) and parser (520) can be lossless, the entropy decoding portion of the video decoder (510), including the buffer memory (515), and the parser (520) may not be fully implemented in the local decoder (633).
[0052] An observation that can be made in this regard is that any decoder technique, except for parsing / entropy decoding, present in the decoder must also be present in a substantially identical functional form in the corresponding encoder. For this reason, the disclosed subject matter focuses on the decoder operation. A description of the encoder technique can be omitted, since it is the inverse of the decoder technique described in general. Only in certain areas is a more detailed explanation necessary, which is provided below.
[0053] During operation, in some examples, the source coder (630) may perform motion-compensated predictive coding, which predictively codes an input image with reference to one or more previously coded images from a video sequence designated as “reference images.” In this manner, the coding engine (632) codes differences between pixel blocks of the input image and pixel blocks of reference image(s) that may be selected as predictive reference(s) for the input image.
[0054] The local video decoder (633) may decode the coded video data of the image that may be designated as a reference image based on the symbols generated by the source coder (630). The operation of the coding engine (632) may advantageously be a lossy process. If the coded video data may be decoded in a video decoder (not shown in FIG. 6), the reconstructed video sequence may typically be a copy of the source video sequence with some errors. The local video decoder (633) repeats the decoding process performed by the video decoder on the reference image, which may result in a reconstructed reference image to be stored in the reference image cache (634). In this way, the video encoder (603) may locally store a copy of the reconstructed reference image having a common content as the reconstructed reference image that would be obtained by the far-end video decoder.
[0055] The predictor (635) may perform a predictive search for the coding engine (632). That is, for a new image to be coded, the predictor (635) may search the reference image memory (634) for certain metadata, such as reference image motion vectors, block shapes, or sample data (as candidates for reference pixel blocks), that may serve as suitable prediction references for the new image. The predictor (635) may operate on a sample block-by-sample block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (635), the input image may have prediction references drawn from multiple reference images stored in the reference image memory (634).
[0056] The controller (650) may manage the coding operations of the source coder (630), including, for example, setting the parameters and subgroup parameters used to encode the video data.
[0057] All outputs of the above mentioned functional units may undergo entropy coding in an entropy coder (645), which converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.
[0058] The transmitter (640) can buffer the coded video sequence created by the entropy coder (645) and prepare it for transmission via a communication channel (660), which can be a hardware / software link to a storage device that will store the encoded video data. The transmitter (640) can merge the coded video data from the video coder (603) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (not shown).
[0059] A controller (650) may manage the operation of the video encoder (603). During coding, the controller (650) may assign each coded picture a particular coded picture type, which may affect the coding technique that may be applied to each picture. For example, pictures are often assigned as one of the following picture types:
[0060] Intra-pictures (I-pictures) can be coded and decoded without using other pictures in a sequence as prediction sources. Some video codecs allow different types of intra-pictures, including, for example, Independent Decoder Refresh ("IDR") pictures. Those skilled in the art are aware of these variations of I-pictures and their respective uses and characteristics.
[0061] A predicted image (P-image) may be one that can be coded and decoded using inter- or intra-prediction, which uses at most one motion vector and reference index to predict the sample values of each block.
[0062] Bi-directionally predicted images (B-pictures) may be coded and decoded using inter- or intra-prediction, which uses up to two motion vectors and reference indices to predict the sample values of each block. Similarly, multiple predicted images may use more than one reference picture and associated metadata for the reconstruction of a block.
[0063] A source image is usually spatially divided into sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and coded block by block. Blocks can be predictively coded with reference to other (already coded) blocks determined by the coding assignment applied to the respective image of the block. For example, blocks of an I image can be non-predictively coded or they can be predictively coded with reference to already coded blocks of the same image (spatial prediction or inter prediction). Pixel blocks of a P image can be predictively coded via spatial or temporal prediction with reference to a previously coded reference image. The blocks of a B picture may be predictively coded via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures.
[0064] The video encoder (603) may perform coding operations in accordance with a given video coding technique or standard, such as ITU-T Rec. H.265. In its operations, the video encoder (603) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.
[0065] In one embodiment, the transmitter (640) may transmit additional data along with the encoded video. The source coder (630) may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers and other types of redundant data, such as redundant pictures and slices, SEI messages, VUI parameter set fragments, etc.
[0066] Video may be captured as multiple source images (video images) in a time sequence. Intra-image prediction (often abbreviated as inter-prediction) uses spatial correlation in a given image, while inter-image prediction uses correlation (temporal or other) between images. In one example, a particular image being coded / decoded, called the current image, is divided into blocks. If a block in the current image is similar to a reference block in a previously coded and still buffered reference image in the video, the block in the current image may be coded by a vector called a motion vector. The motion vector points to a reference block in the reference image, and may have a third dimension that identifies the reference image if multiple reference images are used.
[0067] In some embodiments, a bi-prediction technique may be used in inter-picture prediction. According to the bi-prediction technique, two reference pictures are used, such as a first reference picture and a second reference picture, both preceding in decoding order (but which may be past and future, respectively, in display order) a current picture in a video. A block in the current picture may be coded by a first motion vector pointing to a first reference block in the first reference picture and a second motion vector pointing to a second reference block in the second reference picture. A block may be predicted by a combination of the first and second reference blocks.
[0068] Furthermore, to improve coding efficiency, merge mode techniques can be used for inter-image prediction.
[0069] According to some embodiments of the present disclosure, predictions such as inter-image prediction and intra-image prediction are performed on a block-by-block basis. For example, according to the HEVC standard, images in a video image sequence are partitioned into coding tree units (CTUs) for compression, and the CTUs in an image have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. In general, a CTU includes three coding tree blocks (CTBs), one luma CTB and two chroma CTBs. Each CTU can be recursively quad-tree partitioned into one or more coding units (CUs). For example, a CTU of 64×64 pixels can be partitioned into one CU of 64×64 pixels, four CUs of 32×32 pixels, or 16 CUs of 16×16 pixels. In an example, each CU is analyzed to determine a prediction type of the CU, such as an inter prediction type or an intra prediction type. A CU is divided into one or more prediction units (PUs) depending on temporal and / or spatial predictability. In general, each PU includes a luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed in units of prediction blocks. Taking a luma prediction block as an example of a prediction block, the prediction block includes a matrix of values (e.g., luma values) for pixels, such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, etc.
[0070] 7 shows a diagram of a video encoder (703) according to another embodiment of the present disclosure. The video encoder (703) is configured to receive a processed block of sample values (e.g., a predictive block) in a current video image in a video image sequence and to encode the processed block into a coded image that is part of the coded video sequence. In one embodiment, the video encoder (703) is used in place of the example video encoder (403) of FIG. 4.
[0071] In an HEVC example, the video encoder (703) receives a matrix of sample values for a processing block, such as a predictive block of 8×8 samples. The video encoder (703) determines whether the processing block is best coded using intra mode, inter mode, or bi-directional prediction mode, for example using rate-distortion optimization. If the processing block is coded in intra mode, the video encoder (703) may use intra prediction techniques to encode the processing block into a coded image, and if the processing block is coded in inter mode or bi-directional prediction mode, the video encoder (703) may use inter prediction techniques or bi-directional prediction techniques, respectively, to code the processing block into a coded image. In certain video coding techniques, the merge mode may be an inter-image prediction sub-mode in which motion vectors are derived from one or more motion vector predictors without the benefit of a coded motion vector component outside the predictor. In certain other video coding techniques, there may be a motion vector component applicable to the current block. In one embodiment, the video encoder (703) includes other components, such as a mode decision module (not shown) for determining the mode of the processing block.
[0072] In the example of FIG. 7, the video encoder (703) includes an entropy encoder (725), an inter-encoder (730), an intra-encoder (722), a residual calculator (723), a switch (726), a residual encoder (724), and a general controller (721), coupled together as shown in FIG.
[0073] The inter-encoder (730) is configured to receive samples of a current block (e.g., a processing block), compare the block with one or more reference blocks in a reference image (e.g., blocks in preceding and subsequent images), generate inter-prediction information (e.g., a description of redundant information due to an inter-encoding technique, motion vectors, merge mode information), and calculate an inter-prediction result (e.g., a prediction block) based on the inter-prediction information using any suitable technique. In some examples, the reference image is a decoded reference image that is decoded based on the encoded video information.
[0074] The intra encoder (722) is configured to receive samples of a current block (e.g., a processing block), possibly compare the block to previously coded blocks in the same image, generate transformed and quantized coefficients, and possibly also generate intra prediction information (e.g., intra prediction direction information according to one or more intra coding techniques). In one example, the intra encoder (722) also calculates an intra prediction result (e.g., a prediction block) based on the intra prediction information and a reference block in the same image.
[0075] The generic control device (721) is configured to determine generic control data and control other components of the video encoder (703) based on the generic control data. In one embodiment, the generic controller (721) determines the mode of the block and provides a control signal to the switch (726) based on the mode. For example, if the mode is an intra mode, the generic controller (721) controls the switch (726) to select an intra mode result to be used by the residual calculator (723) and controls the entropy encoder (725) to select intra prediction information and include the intra prediction information in the bitstream, and if the mode is an inter mode, the generic controller (721) controls the switch (726) to select an inter prediction result to be used by the residual calculator (723) and controls the entropy encoder (725) to select inter prediction information and include the inter prediction information in the bitstream.
[0076] The residual calculator (723) is configured to calculate the difference (residual data) between the received block and a prediction result selected from the intra-encoder (722) or the inter-encoder (730). The residual encoder (724) operates on the residual data and is configured to encode the residual data to generate transform coefficients. In one embodiment, the residual encoder (724) is configured to convert the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients are then subjected to a quantization process to obtain quantized transform coefficients. In various embodiments, the video encoder (703) also includes a residual decoder (728). The residual decoder (728) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data can be used by the intra-encoder (722) and the inter-encoder (730) as appropriate. For example, the inter-encoder (730) can generate decoded blocks based on the decoded residual data and the inter-prediction information, and the intra-encoder (722) can generate decoded blocks based on the decoded residual data and the intra-prediction information. The decoded blocks, in some embodiments, are suitably processed to generate a decoded image, which may be buffered in a memory circuit (not shown) and used as a reference image.
[0077] The entropy encoder (725) is configured to format the bitstream to include the encoded block. The entropy encoder (725) is configured to include various information according to an appropriate standard, such as the HEVC standard. In one embodiment, the entropy encoder (725) is configured to include general control data, selected prediction information (e.g., intra prediction information or inter prediction information), residual information, and other appropriate information in the bitstream. It should be noted that when coding a block in a merged sub-mode of either the inter mode or bi-prediction mode in accordance with the disclosed subject matter, no residual information is present.
[0078] 8 shows a diagram of a video decoder (810) according to another embodiment of the present disclosure. The video decoder (810) is configured to receive coded images that are part of a coded video sequence and to decode the coded images to generate reconstructed images. In one embodiment, the video decoder (810) is used in place of the video decoder (410) of the embodiment of FIG. 3.
[0079] In the embodiment of FIG. 8, the video decoder (810) includes an intra decoder (872), an entropy decoder (871), an inter decoder (880), a residual decoder (873), and a reconstruction module (874), coupled together as shown in FIG.
[0080] The entropy decoder (871) may be configured to reconstruct from the coded picture certain symbols that represent syntax elements of which the coded picture is made up. Such symbols may include, for example, the mode in which the block is coded (e.g., intra mode, inter mode, bi-directional prediction mode, inter mode in merged or another submode, bi-directional prediction mode, etc.), prediction information (e.g., intra prediction information or inter prediction information), which may identify certain samples or metadata, such as residual information in the form of quantized transform coefficients, to be used by the intra decoder (822) or the inter decoder (880), respectively. As an example, if the prediction mode is an inter mode or bi-directional prediction mode, the inter prediction information is provided to the inter decoder (880), and if the prediction type is an intra prediction type, the intra prediction information is provided to the intra decoder (872). The residual information may undergo inverse quantization and is provided to the residual decoder (873).
[0081] The inter decoder (880) is configured to receive the inter prediction information and to generate inter prediction results based on the inter prediction information.
[0082] The intra decoder (872) is configured to receive the intra prediction information and to generate a prediction result based on the intra prediction information.
[0083] The residual decoder (873) is configured to perform inverse quantization to extract de-quantized transform coefficients and process the de-quantized transform coefficients to convert the residual from the frequency domain to the spatial domain. The residual decoder (873) may also require certain control information (including quantizer parameters (QP)), which may be provided by the entropy decoder (871) (data path not shown, since it is only low volume control information).
[0084] The reconstruction module (874) is configured to combine, in the spatial domain, the residual as output by the residual decoder (873) and the prediction result (possibly as output by an inter- or intra-prediction module) to form a reconstructed block, which may be part of the reconstructed image and thus part of the reconstructed video. It should be noted that other suitable operations, such as a deblocking operation, may be performed to improve visual quality.
[0085] It should be noted that the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using any suitable technology. In one embodiment, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more integrated circuits. In another embodiment, the video encoders (403), (603), and (603) and the video decoders (410), (510), and (810) may be implemented using one or more processors executing software instructions.
[0086] Aspects of this disclosure provide encoding / decoding techniques for intra image block compensation, particularly techniques for search range adjustment with variable CTU sizes.
[0087] Block-based compensation can be used for inter-prediction and intra-prediction. For inter-prediction, block-based compensation can also be done from a previously reconstructed area in the same picture. Block-based compensation from a reconstructed area in the same picture is called intra-picture block compensation, current picture referencing (CPR), or intra block copy (IBC). A displacement vector indicating the offset between a current block and a reference block in the same picture is called a block vector (BV for short). Unlike the motion vector in motion compensation, the block vector can be any value (either positive or negative, in either x or y direction), but the block vector has some constraints to ensure that the reference block is available and has already been reconstructed. Also, in some examples, some reference areas that are tile boundaries or wavefront ladder shape boundaries are excluded to consider parallel processing.
[0088] The coding of block vectors can be either explicit or implicit. In the explicit mode (also called Advanced Motion Vector Prediction in Inter-coding (AMVP) mode), the difference between the block vector and its predictor is signaled, while in the implicit mode, the block vector is reconstructed from a predictor (called the block vector predictor), similar to the motion vector in merge mode. The resolution of the block vector is limited to integer positions in some implementations, while other systems allow the block vector to point to fractional positions.
[0089] In some embodiments, the use of intrablock copying at the block level can be signaled using a block-level flag called the IBC flag. In an embodiment, the IBC flag is signaled if the current block is not coded in merge mode. In another example, the use of intrablock copying at the block level is signaled by a reference index approach. The current picture being decoded is then treated as a reference picture. In one embodiment, such a reference picture is placed at the last position of a list of reference pictures. This special reference picture is managed together with other temporal reference pictures in a buffer such as a decoded picture buffer (DPB).
[0090] There are also several variations of intra block copy, such as flipped intra block copy (where the reference block is flipped horizontally or vertically before being used to predict the current block) and line based intra block copy (where each compensation unit in an MxN coding block is Mx1 or 1xN lines).
[0091] 9 shows an example of intra block copy according to one embodiment of the present disclosure. A current image (900) is being decoded. The current image (900) includes a reconstructed area (910) (dotted area) and an area to be decoded (920) (white area). A current block (930) is being reconstructed by the decoder. The current block (930) can be reconstructed from a reference block (940) that is located within the reconstructed area (910). The position offset between the reference block (940) and the current block (930) is referred to as a block vector (950) (or BV (950)).
[0092] In some examples (e.g., VVC), the search range of the intra block copy mode is constrained to be within the current CTU. The memory requirement for storing the reference samples for the intra block copy mode is then 1 (largest) CTU size of samples. In one example, the (largest) CTU is 128×128 sample size. The CTU is divided into four block regions, each having a size of 64×64 samples, in some examples. Thus, in some embodiments, a total memory (e.g., a cache memory with a faster access speed than the main storage) can store samples of size 128×128, including an existing reference sample memory portion for storing reconstructed samples in the current block, such as a 64×64 region, and an additional memory portion for storing samples of the other three 64×64 sized regions. Thus, in some examples, the effective search range of the intra block copy mode is extended to a portion of the left CTU (e.g., 4 times the size of one CTU, a total of 64x64 reference sample memory) while the total memory requirement for storing reference pixels remains unchanged.
[0093] In some embodiments, an update process is performed to update the stored reference samples from the left CTU to reconstructed samples from the current CTU. Specifically, in some examples, the update process is performed on a 64x64 luma sample basis. In one embodiment, for each of four 64x64 block regions in the CTU size memory, the reference samples in the region from the left CTU can be used to predict coding blocks in the current CTU with CPR mode until any of the blocks in the same region of the current CTU are being coded or has been coded.
[0094] 10A-10D show examples of effective search ranges for intra block copy modes according to one embodiment of the present disclosure. In some examples, the encoder / decoder includes a cache memory that can store samples of one CTU, such as 128×128 samples. Furthermore, in the examples of FIGS. 10A-10D, the current block area for prediction has a size of 64×64 samples. It should be noted that the examples can be appropriately modified for current block areas of other suitable sizes.
[0095] Each of FIGS. 10A-10D shows a current CTU (1020) and a left CTU (1010). The left CTU (1010) includes four block regions (1011)-(1014), each of which has a sample size of 64×64 samples. The current CTU (1020) includes four block regions (1021)-(1024), each of which has a sample size of 64×64 samples. The current CTU (1020) is the CTU that includes the current block region (indicated by the label “Current” and a vertical stripe pattern) that is being reconstructed. The left CTU (1010) is directly adjacent to the left of the current CTU (1020). As shown in FIGS. 10A-10D, the grey blocks are block regions that have already been reconstructed, and the white blocks are block regions to be reconstructed.
[0096] In FIG. 10A, the current block region being reconstructed is block region (1021). The cache memory stores reconstructed samples in block regions (1012), (1013), and (1014), and the cache memory will be used to store the reconstructed samples of the current block region (1021). In the example of FIG. 10A, the effective search range for the current block region (1021) includes block regions (1012), (1013), and (1014) in the left CTU (1010) that have their reconstructed samples stored in the cache memory. Note that in one embodiment, the reconstructed samples of the block region (1011) are stored in main memory, which has a slower access speed than the cache memory (e.g., copied from the cache memory to main memory before reconstruction of the block region (1021)).
[0097] In FIG. 10B, the current block region being reconstructed is block region (1022). The cache memory stores reconstructed samples in block regions (1013), (1014), and (1021), and the cache memory will be used to store reconstructed samples for the current block region (1022). In the example of FIG. 10B, the effective search range for the current block region (1022) includes block regions (1013) and (1014) in the left CTU (1010) and block region (1021) in the current CTU (1010), which have reconstructed samples stored in the cache memory. Note that in one embodiment, the reconstructed samples for block region (1012) are stored in main memory, which has a slower access speed than the cache memory (e.g., copied from the cache memory to main memory before reconstruction of block region (1022)).
[0098] In FIG. 10C, the current block region being reconstructed is block region (1023). The cache memory stores reconstructed samples in block regions (1014), (1021), and (1022), and the cache memory will be used to store the reconstructed samples of the current block region (1023). In the example of FIG. 10C, the effective search range for the current block region (1023) includes block region (1014) in the left CTU (1010) and block regions (1021) and (1022) in the current CTU (1010), which have reconstructed samples stored in the cache memory. Note that in one embodiment, the reconstructed samples of block region (1013) are stored in main memory, which has a slower access speed than the cache memory (e.g., copied from the cache memory to main memory before reconstruction of block region (1023)).
[0099] In FIG. 10D, the current block region being reconstructed is block region (1024). The cache memory stores reconstructed samples in block regions (1021), (1022), and (1023), and the cache memory will be used to store the reconstructed samples of the current block region (1024). In the example of FIG. 10D, the effective search range for the current block region (1024) includes block regions (1021), (1022), and (1023) in the current CTU (1020), which have their reconstructed samples stored in the cache memory. Note that in one embodiment, the reconstructed samples of block region (1014) are stored in main memory, which has a slower access speed than the cache memory (e.g., copied from the cache memory to main memory before reconstruction of block region (1024)).
[0100] In the above example, the cache memory has a total memory space of one (maximum) CTU size. The embodiment can be appropriately adjusted for other suitable CTU sizes. Note that the cache memory is referred to as a reference sample memory in some embodiments.
[0101] The proposed methods can be used separately or in any order in combination. Furthermore, each of the methods (or embodiments), the encoder, and the decoder can be implemented by a processing circuit (e.g., one or more processors, or one or more integrated circuits). In one embodiment, the one or more processors execute a program stored in a non-transitory computer-readable medium. In the following, the term block can be interpreted as a prediction block, a coding block, or a coding unit, i.e., a CU.
[0102] Aspects of the present disclosure provide techniques for adjusting the search range when the CTU size changes, e.g., to be smaller than the maximum CTU size. In implementation, a designated memory that stores reference samples of previously coded CUs for future intra block copy reference is referred to as a reference sample memory (and in some embodiments, as a cache memory). In the present disclosure, a method is proposed to improve intra block copy performance under certain reference area restrictions. More specifically, the size of the reference sample memory for the search is limited. In the following description, the size of the reference sample memory is fixed to 128x128 luma samples (with corresponding chroma samples). In some embodiments (e.g., VVC standard), one maximum CTU size of the reference samples is considered as the designated memory size. The proposed method can be further extended to various memory size / CTU size combinations, e.g., 64x64 luma samples (plus corresponding chroma samples) for the CTU size and 128x128 luma samples (and corresponding chroma samples) for the memory size.
[0103] According to one aspect of the disclosure, collocated blocks of the present disclosure refer to a pair of blocks having the same size and shape, where one of the collocated blocks is in a previously coded CTU and the other of the collocated blocks is in a current CTU, and one block of the pair is referred to as the collocated block of the other block of the pair. Furthermore, if the memory buffer size is designed to store a maximum size CTU (e.g., 128×128), the previous CTU refers to a CTU that has one CTU-wide luma sample offset to the left of the current CTU in one embodiment. Furthermore, these two collocated blocks have the same position offset value with respect to the top-left corner of their own CTU. In other words, collocated blocks are two blocks that have the same y coordinate with respect to the top-left corner of the image, but in some embodiments, with a CTU-width difference in x coordinate from each other.
[0104] FIG. 11 illustrates an example of a collocated block according to some embodiments of the present disclosure. In the example of FIG. 11, a current CTU and a left CTU are shown during decoding. Reconstructed areas are shown in gray, and areas to be reconstructed are shown in white. FIG. 11 illustrates three examples of reference blocks in the left CTU for a current block in an intra block copy mode during decoding. The three examples are shown as reference block 1, reference block 2, and reference block 3. FIG. 11 also illustrates collocated block 1 for reference block 1, collocated block 2 for reference block 2, and collocated block 3 for reference block 3. In the example of FIG. 11, the reference sample memory size is the CTU size. The reconstructed samples of the current CTU and the left CTU are stored in the reference sample memory in a complementary manner. When the reconstructed samples of the current CTU are written to the reference sample memory, the reconstructed samples are written to the positions of the collocated samples of the left CTU. As an example, reference block 3 has not yet been reconstructed because collocated block 3 is in the current CTU, so reference block 3 can be found from the reference sample memory, which still stores samples of reference block 3 from the left CTU and can be quickly accessed to retrieve samples of reference block 3, which can be used to reconstruct the current block in intra block copy mode in one embodiment.
[0105] In another embodiment, for reference block 1, reconstruction of collocated block 1 in the current CTU is completed and thus the reference sample memory stores samples of collocated block 1, and furthermore, the samples of reference block 1 are stored in off-chip storage, e.g., having a relatively high latency compared to the reference sample memory. Thus, in one embodiment, reference block 1 is not found in the reference sample memory and reference block 1, in one embodiment, cannot be used to reconstruct the current block in intra block copy mode.
[0106] Similarly, in another embodiment, a portion of collocated block 2 has been reconstructed for reference block 2, and thus the reference sample memory is updated to store samples of collocated block 2. Thus, in one embodiment, reference block 2 cannot be a valid reference block for reconstructing the current block in intra block copy mode.
[0107] In general, in intra block copy mode, for a reference block in a previously decoded CTU, if the collocated block in the current CTU has not yet been reconstructed, a sample of the reference block is available in the reference sample memory, and the reference sample memory can be accessed to read out a sample of the reference block for use as a reference for reconstruction in intra block copy mode.
[0108] It should be noted that in the above embodiment, the upper left corner sample of the collocated block in the current CTU, also referred to as the upper left corner collocated sample of the reference block, is checked. If the collocated sample in the current CTU has not yet been reconstructed, all remaining samples of the reference block can be used as references for intra block copying.
[0109] Also, please note that in the above embodiment, the memory size of the reference sample memory is the size of one CTU, and the previously decoded CTU means the CTU adjacent to the left side of the current CTU.
[0110] According to one aspect of the disclosure, the memory size of the reference sample memory may be larger than the size of one CTU.
[0111] FIG. 12 illustrates an example of a collocated block according to some embodiments of the present disclosure. In the example of FIG. 12, the reference sample memory is configured to have a size of N times the CTU (N is an integer equal to or greater than 2), and thus the reference sample memory can store reconstructed samples from N+1 CTUs. For example, as shown in FIG. 12, there are a current CTU (1210), a farthest left CTU (1230), and an intermediate left CTU (1220) between the current CTU (1210) and the farthest left CTU (1230), etc. The number of left CTUs is equal to N-1. The reconstructed samples of the current CTU (1210) and the farthest left CTU (1230) are stored in the reference sample memory in a complementary manner. To store the reconstructed samples of the current CTU (1210) in the reference sample memory, the reconstructed samples of the current CTU (1210) are written into the collocated sample positions of the farthest left CTU (1230). The reconstructed area is shown in grey, the area to be reconstructed in white. In some embodiments, the left CTUs are numbered from the left adjacent CTU to the furthest CTU on the left. For example, the left adjacent CTU to the current CTU (1210) is the 1 CTU on the left, the furthest left CTU (1230) is the Nth CTU on the left, and the CTU to the right of the furthest left CTU is the (N-1)th CTU on the left.
[0112] Note that in the example of FIG. 12, the reference sample memory size is N times the size of the CTU, and therefore all samples of the intermediate left CTU (1220) are available during reconstruction of samples in the current CTU (1210). However, samples of the farthest left CTU (1230) are partially available in the reference sample memory, subject to similar limitations as shown in the example of FIG. 11. For example, three examples of reference blocks in the farthest left CTU (1230) of the current block in intra block copy mode during decoding are shown as reference block 1, reference block 2, and reference block 3. FIG. 12 also shows collocated block 1 relative to reference block 1, collocated block 2 relative to reference block 2, and collocated block 3 relative to reference block 3. In this case, the x-coordinate offset between pairs of collocated blocks or samples is N times the CTU width. The rest of the description of FIG. 12 is similar to that of FIG. 11 and has been described above, so will be omitted here for clarity.
[0113] It should be noted that in some embodiments, the portion of the reconstructed samples of the furthest left CTU (1230) and the portion of the reconstructed samples of the current CTU (1210) are complementary in the reference sample memory. When the samples of the current CTU (1210) are reconstructed, the reconstructed samples of the current CTU (1210) are written into the reference sample memory at the location of the reconstructed samples of the furthest left CTU (1230). The reconstructed samples of the furthest left CTU (1230) are overwritten in the reference sample memory by the reconstructed samples of the current CTU (1210).
[0114] Note that the example of Figure 12 can be used for scenarios where the reference sample memory size is equal to or larger than the CTU size. For example, if the reference sample memory size is four times the CTU size, the middle left CTU (1220) contains three CTUs, and if the reference sample memory size is 16 times the CTU size, the middle left CTU (1220) contains 15 CTUs. For example, if the reference sample memory size is equal to the CTU size, the middle left CTU (1220) does not exist.
[0115] Aspects of the present disclosure provide techniques for adjusting the search range in intra block copy mode when the current CTU size is smaller than the maximum CTU size and the reference sample memory size is equal to one maximum CTU size. The reference sample memory can then buffer multiple previously decoded CTUs. If the reference block is from a left adjacent CTU, no additional condition check is required for availability. In this case, all CTUs on the left side are available for intra block copy reference. In some embodiments, a unified condition check is used for the cases when the current CTU size is equal to the maximum CTU size and when the current CTU size is smaller than the maximum CTU size.
[0116] Various parameters are used in the following description of the embodiments.
[0117] MaxCtbLog2SizeY indicates the maximum allowed CTU size in log2 domain on one side (height or width) if the CTU is a square. For example, if the maximum allowed CTU is 128x128 luma samples high, then MaxCtbLog2SizeY is equal to 7.
[0118] CtbLog2SizeY indicates the CTU size in log2 domain on one side (height or width) if the CTU is a square.
[0119] cbHeight indicates the height of the coding block (also called the current block), and cbWidth indicates the width of the coding block. The position of the top-left corner of the coding block is indicated by (xCb, yCb), the position of the top-right corner of the coding block is indicated by (xCb+cbWidth-1, yCb), and the position of the bottom-left corner of the coding block is indicated by (xCb, yCb+cbHeight-1).
[0120] mvL0 denotes a block vector, mvL0[0] denotes the x component of the block vector mvL0 at 1 / 16pel resolution, and mvL0[1] denotes the y component of the block vector mvL0 at 1 / 16pel resolution. Therefore, the integer value of the x component is obtained by shifting mvL0[0] right by 4 bits, and the integer value of the y component is obtained by shifting mvL0[1] right by 4 bits.
[0121] According to some aspects of the present disclosure, to determine whether mvL0 is a valid block vector pointing to a reference block in an intra block copy mode and whether the reference block is completely stored in the reference sample memory, the block vector mvL0 is constrained using a two-stage constraining process. Thus, the reference sample memory can be accessed without reading the reference sample from a main memory (e.g., an off-chip memory).
[0122] In the first stage, the block vector mvL0 is checked to determine whether it is within a potential valid block vector that points to a CTU-based search range that includes any CTU that has all or part of a reconstructed sample in the reference sample memory. For example, the CTU-based search range includes the current CTU, the farthest left CTU, and any left CTU between the current CTU and the farthest left CTU. In one embodiment, the CTU size is equal to the maximum allowed CTU size, and the CTU-based search range includes the current CTU and the farthest left CTU (referred to as left CTU in FIG. 11), with no intermediate left CTU between the current CTU and the farthest left CTU.
[0123] If the block vector mvL0 is a potential valid block vector, the block vector mvL0 is further checked in a second stage to determine whether the block vector is a valid block vector. For example, in the second stage, if the block vector points to a reference block in the middle left CTU, the block vector is a valid block vector. In the second stage, if the block vector points to a reference block in the farthest left CTU, the block vector mvL0 is further checked to determine whether a collocated block of the reference block has been reconstructed.
[0124] In the first embodiment, the CTU size is equal to the maximum allowed CTU size, and therefore the reconstructed samples stored in the reference sample memory are from either the current CTU or the furthest left CTU (the left CTU in Figure 11).
[0125] In the first stage, mvL0 is checked to determine if the block vector points to a CTU-based search range that includes the current CTU and the furthest left CTU. In some examples, CTUs with the same y value form a CTU row, and CTUs with the same x value form a CTU column. In some embodiments, the constraints on the block vector mvL0 are expressed by Equations (1)-(4): (yCb+(mvL0[1]>>4))>>CtbLog2SizeY=yCb>>CtbLog2SizeY (Formula 1) (yCb+(mvL0[1]>>4)+cbHeight-1)>>CtbLog2SizeY=yCb>>CtbLog2SizeY (Formula 2) (xCb+(mvL0[0]>>4))>>CtbLog2SizeY≧(xCb>>CtbLog2SizeY)-1 (Formula 3) (xCb+(mvL0[0]>>4)+cbWidth-1)>>CtbLog2SizeY≦(xCb>>CtbLog2SizeY) (Formula 4)
[0126] If formula (1) is satisfied, the top of the reference block is in the same CTU row as the current block. If formula (2) is satisfied, the bottom of the reference block is in the same CTU row as the current block. If formula (3) is satisfied, the left side of the reference block is in the same CTU column as the current block, or in one example, in the CTU column immediately to the left of the current block. If formula (4) is satisfied, the right side of the reference block is in the same CTU column as the current block, or in one example, in the CTU column to the left of the current block. Thus, in an embodiment, if formulas 1 to 4 are satisfied, the reference block is within the CTU-based search range.
[0127] In the second stage, if the reference block is in the farthest left CTU, e.g., if equation (5) is satisfied, then the block vector mvL0 is checked to determine whether the collocated block of the reference block has been reconstructed. (xCb+(mvL[0]>>4))>>CtbLog2SizeY=(xCb>>CtbLog2SizeY)-1 (Formula 5)
[0128] In the examples, The top left corner of the current block is at (xCb,yCb), then the top left corner of the reference block is at (xCb+(mvL[0]>>4),yCb+(mvL0[1]>>4)), and the top left corner of the collocated block is at (xCb+(mvL[0]>>4)+(1<<CtbLog2SizeY),yCb+(mvL0[1]> >4). In the example, the top left corner of the collocated block is used to check a map that tracks the reconstruction process of the image. Note that if the location on the map is "false", in one example, it indicates that the collocated block has not been reconstructed, and thus the reference block is available in the reference sample memory and can be used to reconstruct the current block in the intra block copy mode. In that case, the block vector is a valid block vector. However, if the location on the map is "true", in one example, it indicates that at least a part of the collocated block has been reconstructed, and thus the samples of the collocated block are stored in the reference sample memory at the locations of the samples of the reference block, and the samples of the reference block are not available in the reference sample memory. Thus, the block vector mvL0 is not a valid block vector.
[0129] In a first embodiment, the second stage is based on collocated blocks, and the process of the first embodiment is referred to as a coding unit (CU) based update process.
[0130] In the second embodiment, the second stage is based on block regions. For example, if the CTU has 128×128 samples, the CTU can be divided into four block regions, each having 64×64 samples. Similarly, in the second embodiment, the CTU size is equal to the maximum allowed CTU size, so the reconstructed samples stored in the reference sample memory are either from the current CTU or the furthest left CTU (the left CTU in FIG. 11).
[0131] In the first stage, the block vector mvL0 is checked to determine whether it points to a CTU-based search range that includes the current CTU and the farthest left CTU, using equations (1) to (4) in a manner similar to the first embodiment.
[0132] In the second stage, when equation (5) is satisfied, for example when the reference block is in the farthest left CTU, then the block vector mvL0 is checked to determine whether a collocated block area (e.g., a 64x64 block area) for the reference block has been reconstructed.
[0133] In the examples, The top left corner of the current block is at (xCb, yCb), and the top left corner of the reference block is at (xCb+(mvL[0]>>4), yCb+(mvL0[1]>>4)). The upper left corner of the collocated block region with respect to the reference block is (((xCb+(mvL[0]>>4)+(1<<CtbLog2SizeY))> >(CtbLog2SizeY-1))<<(CtbLog2SizeY-1),((yCb+(mvL0[1]>>4))>>(CtbLog2SizeY-1))<<(CtbLog2SizeY-1)). In the example, the top left corner of the collocated block area is used to check a map that tracks the reconstruction process of the image. Note that if the location on the map is "false", in one example, it indicates that the collocated block area has not been reconstructed, and therefore a reference block is available in the reference sample memory and can be used to reconstruct the current block in intra block copy mode. In that case, the block vector is a valid block vector. However, if the location on the map is "true", it indicates that the collocated block area has been reconstructed or partially reconstructed, in which case the block vector mvL0 is not a valid block vector.
[0134] In the second embodiment, the second stage is based on the collocated blocks, and the process of the second embodiment is referred to as a block region based update process. In the second embodiment, if any sample of a 64×64 block region (a collocated block region) in the current CTU is reconstructed, the corresponding region in the reference sample memory to which the collocated sample (of the current sample) belongs is not available for intra block copy reference.
[0135] According to one aspect of the present disclosure, the change in CTU size typically occurs as the width and / or height are doubled or halved, for example, if the width and height are halved, 4 CTUs worth of samples can be stored in one maximum CTU sized reference sample memory.
[0136] In some embodiments, when the current CTU size CtbLog2SizeY of the Log2 domain is used, the number of CTUs that can store reference sample data in the reference sample memory buffer is variable depending on the relationship between MaxCtbLog2SizeY and CtbLog2SizeY.
[0137] In a third embodiment, the CTU size is CtbLog2SizeY in the Log2 domain, and therefore the reconstructed samples stored in the reference sample memory are from the current CTU, the furthest left CTU, and any one of the intermediate left CTUs located between the current CTU and the furthest left CTU.
[0138] In the first stage, block mvL0 is checked to determine whether it points to a CTU-based search range that includes the current CTU, the furthest left CTU, and the intermediate left CTU(s). In some embodiments, the constraints on block vector mvL0 are expressed by equations (6)-(9): (yCb+(mvL0[1]>>4))>>CtbLog2SizeY=yCb>>CtbLog2SizeY Formula (6) (yCb+(mvL0[1]>>4)+cbHeight-1)>>CtbLog2SizeY=yCb>>CtbLog2SizeY Formula (7) (xCb+(mvL0[0]>>4))>>CtbLog2SizeY>=(xCb>>CtbLog2SizeY)-1<<(2*(MaxCtbLog2SizeY-CtbLog2SizeY)) Equation (8) (xCb+(mvL0[0]>>4)+cbWidth-1)>>CtbLog2SizeY<=(xCb>>CtbLog2SizeY) Formula (9)
[0139] If equation (6) is satisfied, the top of the reference block is in the same CTU row as the current block. If equation (7) is satisfied, the bottom of the reference block is in the same CTU row as the current block. If equation (8) is satisfied, the left side of the reference block is in the same CTU column as the current CTU, the middle left CTU(s) and one of the farthest left CTU. If equation (9) is satisfied, the right side of the reference block is in the same CTU column as the current CTU or one of the CTUs to the left of the current CTU (e.g., the middle left CTU(s), the farthest left CTU, etc.). Thus, if equations (6)-(9) are satisfied in an embodiment, the reference block is within the CTU-based search range.
[0140] If the block vector mvL0 is a potential valid block vector, the block vector mvL0 is further checked in a second stage to determine whether the block vector is a valid block vector. For example, in the second stage, if the block vector points to a reference block in the middle left CTU, e.g., if equation (10) is not satisfied, the block vector is a valid block vector. In the second stage, if the reference block is in the farthest left CTU, e.g., if equation (10) is satisfied, the block vector mvL0 is further checked to determine whether a collocated block of the reference block has been reconstructed. (xCb+(mvL[0]>>4))>>CtbLog2SizeY=(xCb>>CtbLog2SizeY)-(1<<(2*(MaxCtbLog2SizeY-CtbLog2SizeY))) Equation (10)
[0141] In the examples, The top left corner of the current block is at (xCb,yCb), then the top left corner of the reference block is at (xCb+(mvL[0]>>4),yCb+(mvL0[1]>>4)) and the top left corner of the block collocated with the reference block is at (xCb+(mvL[0]>>4)+(1<<4^(MaxCtbLog2SizeY-CtbLog2SizeY)),yCb+(mvL0[1]>>4)). In one example, the top left corner of the collocated block is used to check a map that tracks the reconstruction process of the image. Note that if the location on the map is “false”, in one example, it indicates that the collocated block has not been reconstructed, and therefore the reference block is available in the reference sample memory and can be used to reconstruct the current block in the intra block copy mode. In that case, the block vector is a valid block vector. However, if the map location is "true," in one example indicating that at least a portion of the collocated block has been reconstructed, and thus the samples of the collocated block are stored in the reference sample memory at the locations of the samples of the reference block, and the samples of the reference block are not available in the reference sample memory, and thus the block vector mvL0 is not a valid block vector.
[0142] In a third embodiment, the second stage is based on collocated blocks, and the process of the third embodiment is referred to as a CU-based update process.
[0143] In the fourth embodiment, the second stage is based on block regions. For example, if the CTU size is CtbLog2SizeY in the Log2 domain and the block region size is CtbLog2SizeY-1 in the Log2 domain, the CTU can be divided into four block regions of the same size. Similarly, in the fourth embodiment, the reconstructed samples stored in the reference sample memory are from the current CTU, the furthest left CTU, and the left CTU midway between the current CTU and the furthest left CTU.
[0144] In the first stage, the block vector mvL0 is checked to determine whether it is a potentially valid block vector pointing to a CTU-based search range that includes the current CTU, the furthest left CTU, and (multiple) intermediate left CTUs between the current CTU and the furthest left CTU, using equations (6) to (9) in a manner similar to the third embodiment.
[0145] If the block vector mvL0 is a potential valid block vector, the block vector mvL0 is further checked in a second stage to determine whether the block vector is a valid block vector. For example, in the second stage, if the block vector points to a reference block in the middle left CTU, then if equation (10) is not satisfied, then the block vector is a valid block vector. In the second stage, if the reference block is in the farthest left CTU, then, for example, if equation (10) is satisfied, then the block vector mvL0 is checked to determine whether a collocated block with respect to the reference block is reconstructed.
[0146] In an embodiment, the top left corner of the current block is at (xCb, yCb), where the top left corner of the reference block is at (xCb+(mvL[0]>>4), yCb+(mvL0[1]>>4)) and the top left corner of the collocated block region for the reference block is at (((xCb+(mvL[0]>>4)+(1<<4^(MaxCtbLog2SizeY-CtbLog2SizeY)))>>(CtbLog2SizeY-1))<<(CtbLog2SizeY-1),((yCb+(mvL0[1]>>4))>>(CtbLog2SizeY-1))<<(CtbLog2SizeY-1)). In the example, the top left corner of the collocated block region is used to check a map that tracks the image reconstruction process. Note that if the location on the map is "false", in one example, it indicates that the collocated block area is not reconstructed, and therefore the reference block is available in the reference sample memory and can be used to reconstruct the current block in intra block copy mode. In that case, the block vector is a valid block vector. However, if the location on the map is "true", it indicates that the collocated block area is reconstructed or partially reconstructed, and in that case, the block vector mvL0h is not a valid block vector.
[0147] In the fourth embodiment, the second stage is based on the collocated blocks, and the process of the fourth embodiment is referred to as a block region based update process. In the fourth embodiment, if any samples of the collocated block region are reconstructed (with respect to the reference block) in the current CTU, the corresponding region in the reference sample memory that stores the samples of the collocated block region is not available for intra block copy reference.
[0148] According to some aspects of the present disclosure, the leftmost CTU is intentionally excluded from the search area, and then the block vector mvL0 is constrained using a one-step constraining process to determine whether mvL0 is a valid block vector that points to a reference block in intra block copy mode and whether the reference block is completely stored in the reference sample memory.
[0149] In the fifth embodiment, similar to the third embodiment, the CTU size is CtbLog2SizeY in the Log2 domain, and thus the reconstructed samples stored in the reference sample memory are from the current CTU, the furthest left CTU, and / or intermediate left CTU(s) located between the current CTU and the furthest left CTU. In the fifth embodiment, the block mvL0 is checked to determine whether the block vector mvL0 points to a search range that includes the current CTU, the furthest left CTU, and / or intermediate left CTU(s). Note that in the fifth embodiment, the left CTU is excluded from the search range. In some implementations, the constraints on the block vector mvL0 are expressed in Equations 11-14: (yCb+(mvL0[1]>>4))>>CtbLog2SizeY=yCb>>CtbLog2SizeY Formula (11) (yCb+(mvL0[1]>>4)+cbHeight-1)>>CtbLog2SizeY=yCb>>CtbLog2SizeY Formula (12) (xCb+(mvL0[0]>>4))>>CtbLog2SizeY>(xCb>>CtbLog2SizeY)-1<<(2*(MaxCtbLog2SizeY-CtbLog2SizeY)) Equation (13) (xCb+(mvL0[0]>>4)+cbWidth-1)>>CtbLog2SizeY>(xCb>>CtbLog2SizeY)-1<<(2*(MaxCtbLog2SizeY-CtbLog2SizeY)) Equation (14)
[0150] If equation (11) is satisfied, the top of the reference block is in the same CTU row as the current block. If equation (12) is satisfied, the bottom of the reference block is in the same CTU row as the current block. If equation (13) is satisfied, the left side of the reference block is in the same CTU column as the current CTU and one of the middle left CTUs. If equation (14) is satisfied, the right side of the reference block is in the same CTU column as the current CTU and one of the middle left CTUs. In that case, in the embodiment, if the expressions 11 to 14 are satisfied, the reference block is within the search range and the block vector mvL0 is a valid block vector.
[0151] FIG. 13 shows a flow chart outlining the process (1300) according to one embodiment of the present disclosure. The process (1300) can be used to reconstruct blocks coded in intra mode, thus generating a prediction block for the block being reconstructed. In various embodiments, the process (1300) is performed by processing circuitry within the terminal devices (310), (320), (330), and (340), processing circuitry performing the functions of the video encoder (403), processing circuitry performing the functions of the video decoder (410), processing circuitry performing the functions of the video decoder (510), processing circuitry performing the functions of the video encoder (603), etc. In some embodiments, the process (1300) is implemented with software instructions, and thus the processing circuitry performs the process (1300) as the processing circuitry executes the software instructions. The process starts at (S1301) and proceeds to (S1310).
[0152] At (S1310), prediction information of the current block in the current CTU is decoded from the coded video bitstream. The prediction information is representative of an intra block copy mode. The size of the current CTU is smaller than a maximum size corresponding to a storage capacity of the reference sample memory. In some embodiments, the reference sample memory has a faster access speed than a main memory for storing the samples reconstructed from the coded video bitstream. For example, the reference sample memory is an on-chip memory on the same chip as the decoder circuitry, and the main memory is an off-chip memory that is external to the chip having the decoder circuitry. It is noted that the reference sample memory may be implemented using an off-chip memory in some examples.
[0153] At (S1320), a block vector is determined. The block vector points to a reference block in the same image as the current block, the reference block having reconstructed samples buffered in the reference sample memory. In some embodiments, the search region is defined to include CTUs having reconstructed samples buffered in the reference sample memory, such as the current CTU, the middle left CTU, and the farthest left CTU. The farthest left CTU has at least one reconstructed sample overwritten with the reconstructed sample of the current CTU in the reference sample memory.
[0154] In (S1330), the current block is reconstructed based on the reconstructed samples of the reference block read from the reference sample memory. For example, the reference sample memory is accessed to read the reconstructed samples of the reference block, and then the samples of the current block are reconstructed based on the reconstructed samples read from the reference sample memory. The process then proceeds to (S1399) and ends.
[0155] The techniques described above can be implemented as computer software using computer readable instructions and can be physically stored on one or more computer readable media. For example, Figure 14 illustrates a computer system (1400) suitable for implementing certain embodiments of the disclosed subject matter.
[0156] Computer software can be coded using any suitable machine code or computer language that can be subject to assembly, compilation, linking, or similar mechanisms to produce code including instructions that can be executed directly or via implementation, microcode execution, etc., by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc.
[0157] The instructions may be executed on various types of computers or components thereof including, for example, personal computers, tablet computers, servers, smart phones, gaming devices, internet of things, etc.
[0158] The components illustrated in FIG. 18 for computer system (1400) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure. Nor should the arrangement of components be interpreted as having any dependency or requirement relating to any one or combination of components illustrated in the exemplary embodiment of computer system (1400).
[0159] The computer system (1400) may include certain human interface input devices that may be responsive to input by one or more human users, for example, via tactile input (e.g., keystrokes, swiping, data glove movements), audio input (e.g., voice, clapping), visual input (e.g., gestures), or olfactory input (not shown). Human interface devices may also be used to capture certain media that are not necessarily directly related to conscious human input, such as audio (e.g., voice, music, ambient sounds), images (e.g., scanned images, photographic images obtained from still image cameras), and video (e.g., two-dimensional video, three-dimensional video including stereoscopic images).
[0160] The input human interface devices may include one or more of a keyboard (1401), a mouse (1402), a trackpad (1403), a touch screen (1410), a data glove (not shown), a joystick (1405), a microphone (1806), a scanner (1407), and a camera (1408).
[0161] The computer system (1400) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the human user's senses, for example, through haptic output, sound, light, and smell / taste. Such human interface output devices may be haptic output devices (e.g., haptic feedback via a touch screen (1410), data gloves (not shown), or joystick (1405), but may also be haptic feedback devices that do not act as input devices), audio output devices (e.g., speakers (1409), headphones (not shown)), visual output devices (e.g., screens (1410), including CRT screens, LCD screens, plasma screens, OLED screens, each with or without haptic feedback capabilities, some of which may allow for two-dimensional visual output or three- or more-dimensional output via such means as virtual reality glasses (not shown), stereoscopic output such as holographic displays, and smoke tanks (not shown)), and A printer (not shown) may also be included.
[0162] The computer system (1400) can also include human accessible storage devices and their accessible media, such as optical media drives (1420) including CD / DVD ROM / RW with media (1421) such as CD / DVD, USB memory (1422), removable head drives or solid state drives (1423), conventional magnetic media such as tape, floppy disks (not shown), specialized ROM / ASIC / PLD based devices such as security dongles, etc.
[0163] Those skilled in the art will also understand that the term "computer-readable medium" as used in connection with the presently disclosed subject matter does not encompass transmission media, carrier waves, or other transitory signals.
[0164] The computer system (1400) may also include interfaces to one or more communication networks. The networks may be, for example, wireless, wired, optical. The networks may further be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include Ethernet, wireless LAN, cellular networks including GSM, 3G, 4G, 5G, LTE, etc., cable TV, satellite TV, and terrestrial broadcast TV, industrial and vehicular including CANBus. Certain networks generally require an external network interface adapter (e.g., a USB port on the computer system (1400)) that connects to a specific general-purpose data port or peripheral bus (1449), while other networks are generally integrated into the core of the computer system (1400) by connecting to a system bus, as described below (e.g., an Ethernet interface to a PC computer system or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (1400) may communicate with other entities. Such communications may be unidirectional, receive only (e.g., broadcast television), unidirectional transmit only (e.g., a CAN bus to a particular CAN bus device), or bidirectional, for example to other computer systems using local or wide area digital networks. Specific protocols and protocol stacks may be used in each of these networks and network interfaces, as described above.
[0165] The aforementioned human interface devices, human accessible storage devices, and network interfaces may be connected to a core (1440) of the computer system (1400).
[0166] The cores (1440) may include one or more central processing devices (CPUs) (1441), graphics processing devices (GPUs) (1442), specialized programmable processing devices in the form of field programmable gate areas (FPGAs) (1443), hardware accelerators for specific tasks (1444), etc. These devices may be connected via a system bus (1448), along with read only memory (ROM) (1445), random access memory (1446), internal mass storage devices such as internal non-user accessible hard drives, SSDs, etc. (1447). In some computer systems, the system bus (1448) is accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripheral devices may be connected directly to the core's system bus (1448) or via a peripheral bus (1449). Peripheral bus architectures include PCI, USB, etc.
[0167] The CPU (1441), GPU (1442), FPGA (1443), and accelerator (1444) may combine to execute certain instructions that may constitute the computer code described above. The computer code may be stored in a ROM (1445) or a RAM (1446). Transient data may also be stored in the RAM (1446), while permanent data may be stored, for example, in an internal mass storage device (1447). A cache memory, which may be closely associated with one or more of the CPU (1441), GPU (1442), mass storage device (1447), ROM (1445), RAM (1446), etc., may be used to enable fast storage and retrieval in any of the memory devices.
[0168] The computer-readable media can have computer code thereon for performing various computer-implemented operations. The media and computer code can be those specially designed and created for the present disclosure, or they can be of the type well known and available to those skilled in the art in the computer software art.
[0169] As an example, and not by way of limitation, a computer system having the architecture (1400), and in particular the core (1440), can provide functionality as a result of a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media may be media associated with a user-accessible mass storage device as described above, as well as a particular storage device of the core (1440) that is non-transitory in nature, such as the core-internal mass storage device (1447) or ROM (1445). Software implementing various embodiments of the present disclosure may be stored in such devices and executed by the core (1440). The computer-readable medium may include one or more memory devices or chips, depending on the particular needs. The software may cause the core (1440) and specifically the processor therein (including CPU, GPU, FPGA, etc.) to execute the particular processes or particular portions described herein, including defining data structures stored in RAM (1446) and modifying such data structures according to the process defined by the software. Additionally or alternatively, the computer system may provide functionality as a result of logic hardwired or otherwise embodied in a circuit (e.g., accelerator (1444)), which may operate in place of or in conjunction with the software to execute the particular processes or particular portions of the particular processes described herein. Reference to software includes logic, and vice versa, where appropriate. Reference to computer-readable medium may include circuitry (such as an integrated circuit (IC)) that stores software for execution, circuitry that embodies logic for execution, or both, where appropriate. The present disclosure encompasses any suitable combination of hardware and software.
[0170] Appendix A: Abbreviations JEM: Joint Exploration Model VVC: Universal Video Coding BMS: Benchmark Set MV: Motion Vector HEVC: High Efficiency Video Coding SEI: Additional reinforcement information VUI: Video Usability Information GOP: Group of Pictures TU: conversion unit PU: Prediction unit CTU: Coding Tree Unit CTB: Coding Tree Block PB: Predicted block HRD: Hypothetical Reference Decoder SNR: Signal to Noise Ratio CPU: Central Processing Unit GPU: Graphics Processing Unit CRT: cathode ray tube LCD: Liquid crystal display OLED: Organic Light Emitting Diode CD:Compact Disc DVD: Digital Video Disc ROM: Read-Only Memory RAM: Random Access Memory ASIC: Application Specific Integrated Circuit PLD: Programmable Logic Device LAN: Local Area Network GSM: Globus System for Mobile Communications LTE: Long Term Evolution CAN Bus: Controller Area Network Bus USB: Universal Serial Bus PCI: Peripheral Component Interconnect FPGA: Field Programmable Gate Area SSD: Solid State Drive IC: Integrated Circuit CU: coding unit
[0171] While this disclosure has described several exemplary embodiments, there are alterations, permutations, and various equivalents which fall within the scope of this invention. It will thus be appreciated that those skilled in the art will be able to create numerous systems and methods which, although not explicitly shown or described herein, embody the principles of the invention and are therefore within its concept and scope.
Claims
1. A processor-implemented method for decoding video in a decoder, comprising: decoding prediction information of a current block in a current coding tree unit (CTU) from a coded video bitstream, the prediction information representing an intra block copy mode, the size of the current CTU being smaller than the size of a reference sample memory for storing reconstructed samples, the size of the reference sample memory being the same number of samples as a maximum allowed CTU size; determining a block vector pointing to a reference block of the same image as the current block, the reference block having reconstructed samples buffered in the reference sample memory; reconstructing at least one sample of the current block based on the reconstructed samples of the reference block read from the reference sample memory; The method includes:
2. The method described in claim 1, wherein the size of the reference sample memory is N times the size of the current CTU, where N is an integer greater than or equal to 4.
3. A method as described in claim 1 or 2, wherein in the step of determining a block vector pointing to a reference block of the same image as the current block, the reference block is in a predetermined search range, and the predetermined search range ranges from the current block to the (N-1)th CTU to the left.
4. A method as described in claim 2 or 3, wherein N becomes 4 n times larger when the current size of the CTU becomes 1 / 2 n times larger.
5. A method described in any one of claims 2 to 4, wherein N is calculated from 4^(MaxCtbLog2SizeY - CtbLog2SizeY), where MaxCtbLog2SizeY is calculated as the logarithm to the base 2 of the maximum allowable CTU size, and CtbLog2SizeY is calculated as the logarithm to the base 2 of the current CTU size. checking whether a top boundary of the reference block is within the same CTU sequence as the current CTU; checking whether the bottom boundary of the reference block is within the same CTU column; checking whether the left boundary of the reference block is on the right side of the Nth CTU on the left; checking whether the right boundary of the reference block is to the left of the current CTU; 6. The method according to any one of claims 2 to 5.
7. The invention further includes a step of checking whether the reference block is at least partially within an Nth CTU to the left of the current CTU in the same CTU column, wherein a size of the reference sample memory is N times the size of the current CTU, where N is a positive number greater than 1. The method of claim 1.
8. The method according to claim 7, further comprising the step of checking whether a left boundary of the reference block is within the Nth CTU on the left. The method of claim 7.
9. The method of claim 8, further comprising the step of determining whether a collocated block of the reference block is at least partially reconstructed in the current CTU when the reference block is at least partially in the Nth CTU to the left. The method of claim 7.
10. The method of claim 1, further comprising the step of determining whether an upper left corner of the collocated block has been reconstructed.
10. The method of claim 9.
11. The method of claim 10, further comprising the step of invalidating the block vector pointing to the reference block if the collocated block in the current CTU is at least partially reconstructed.
10. The method of claim 9. determining a reference block region of the N-th CTU on the left side that includes the reference block; determining whether a collocated block area of the reference block area in the current CTU is at least partially reconstructed; and invalidating the block vector pointing to the reference block if the collocated block region in the current CTU is at least partially reconstructed. The method of claim 7.
13. A method according to any one of claims 1 to 12, wherein the samples stored in the reference sample memory include samples of blocks corresponding to blocks that have not yet been reconstructed in a CTU to the left of the current CTU, if there is a block in the current CTU other than the current block that has not yet been reconstructed.
14. A method according to any one of claims 1 to 13, wherein the maximum allowable CTU size is 128 x 128 = 16384 samples.
15. A method according to any one of claims 1 to 14, wherein the number of CTUs in which reference sample data can be stored in the reference sample memory is variable depending on the relationship between the maximum allowable CTU size and the size of the current CTU.
16. A method according to claim 1, comprising: a processing circuit configured to perform the method according to any one of claims 1 to 14. Video decoding device.
17. A computer program for causing a computer to carry out the method according to any one of claims 1 to 14.
Citation Information
Patent Citations
Features of intra block copy prediction mode for video and image coding and decoding
US20160241868A1
Methods of Constrained Intra Block Copy for Reducing Worst Case Bandwidth in Video Coding
US20180131963A1
Method and apparatus for video coding
WO2020113156A1