How the Energy Storage System Works

Abstract

To provide a power storage system having excellent characteristics, a highly safe power storage system, a power storage system with less deterioration, and a power storage battery having excellent characteristics.SOLUTION: A power storage system comprises: a power storage battery, a first circuit having a function of measuring impedance, and a neural network. An operation method of the power storage system comprises: a first step of stopping charging or discharging of the power storage battery; a second step of measuring an open circuit voltage of the power storage battery; a third step of measuring the impedance of the power storage battery; a fourth step of inputting the measured open circuit voltage and impedance to an input layer; a fifth step of outputting a first signal from an output layer; a sixth step of changing charging or discharging conditions of the power storage battery in response to the first signal; and a seventh step of initiating charging or discharging of the power storage battery. The first signal corresponds to an estimated value of a discharge capacity of the power storage battery.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] 1. Field of the Invention An embodiment of the present invention relates to a storage battery, a power storage system including the storage battery, a vehicle including the storage battery, and an electronic device including the storage battery.

[0002] Another embodiment of the present invention relates to a semiconductor device.

[0003] Another embodiment of the present invention relates to a neural network and a power storage system using the neural network. Another embodiment of the present invention relates to a vehicle using the neural network. Another embodiment of the present invention relates to an electronic device using the neural network.

[0004] In this specification and the like, the term "semiconductor device" refers to any device that can function by utilizing semiconductor characteristics. A display device, a light-emitting device, a memory device, an electro-optical device, a power storage device, a semiconductor circuit, and an electronic device may include a semiconductor device.

[0005] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. [Background technology]

[0006] Storage batteries are installed in various mobile devices such as electronic devices such as information terminals and vehicles. The operating conditions of these devices are diverse, and the loads on the storage batteries are also diverse. In addition, the demand for improved performance of storage batteries, such as high energy density and long life, is increasing year by year.

[0007] Patent Document 1 shows an example of using a neural network to calculate the remaining capacity of a storage battery.

[0008] In recent years, transistors using an oxide semiconductor or metal oxide in a channel formation region (oxide semiconductor transistors, hereinafter referred to as OS transistors) have attracted attention. OS transistors have an extremely small off-state current. Taking advantage of this, applications using OS transistors have been proposed. For example, Patent Document 2 discloses an example in which OS transistors are used for learning a neural network. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] U.S. Patent Publication No. 2006 / 0181245 [Patent Document 2] JP 2016-219011 A Summary of the Invention [Problem to be solved by the invention]

[0010] An object of one embodiment of the present invention is to provide a power storage system with excellent characteristics. Another object of one embodiment of the present invention is to provide a power storage system with high safety. Another object of one embodiment of the present invention is to provide a power storage system with little deterioration.

[0011] Alternatively, an object of one embodiment of the present invention is to determine a state of a storage battery. Alternatively, an object of one embodiment of the present invention is to predict performance of a storage battery. Alternatively, an object of one embodiment of the present invention is to provide a storage battery having excellent characteristics. Alternatively, an object of one embodiment of the present invention is to provide a storage battery with high safety. Alternatively, an object of one embodiment of the present invention is to provide a storage battery with little deterioration. Alternatively, an object of one embodiment of the present invention is to provide an electronic device equipped with a power storage system having excellent characteristics. Alternatively, an object of one embodiment of the present invention is to provide a vehicle equipped with a power storage system having excellent characteristics. Alternatively, an object of one embodiment of the present invention is to provide a novel semiconductor device.

[0012] The description of multiple problems does not preclude the existence of each problem. It is not necessary for one embodiment of the present invention to solve all of these problems. Problems other than those listed will become apparent from the description of the specification, drawings, claims, etc., and these problems may also be problems of one embodiment of the present invention. [Means for solving the problem]

[0013] One aspect of the present invention is a method for operating a power storage system comprising a storage battery, a first circuit, and a neural network, the first circuit having a function of measuring impedance, the neural network having an input layer, an output layer, and one or more hidden layers arranged between the input layer and the output layer, the method comprising a first step of stopping charging or discharging of the storage battery, a second step of measuring an open circuit voltage of the storage battery, a third step of measuring the impedance of the storage battery, a fourth step of inputting the measured open circuit voltage and impedance to the input layer, a fifth step of outputting a first signal from the output layer, a sixth step of changing conditions for charging or discharging the storage battery in accordance with the first signal, and a seventh step of starting charging or discharging the storage battery, wherein the first signal corresponds to an estimated value of the discharge capacity of the storage battery.

[0014] Alternatively, one embodiment of the present invention has a storage battery, a first circuit, and a neural network, the first circuit having a function of measuring impedance, and the neural network has an input layer, an output layer, and one or more hidden layers arranged between the input layer and the output layer, and includes a first step of measuring a full charge capacity of the storage battery, a second step of charging the storage battery, a third step of discharging the storage battery, a fourth step in which the second step and the third step are alternately repeated, and a fifth step of measuring a full charge capacity of the storage battery. and a second step of stopping charging during the charging process and calculating the remaining capacity, the open circuit voltage, and the impedance, wherein the capacity of the storage battery measured in the first step is C1, the capacity of the storage battery measured in the fifth step is C2, the remaining capacity, the open circuit voltage, and the impedance measured in the second step are input to a neural network, and the neural network outputs a second signal when C2 / C1 is equal to or greater than a first value, and a third signal when C2 / C1 is less than the first value.

[0015] In the above operating method, for example, C2 / C1 is equal to or greater than 0.7 and equal to or less than 0.95.

[0016] In the above operation method, for example, the neural network includes a first transistor, a capacitor, and a second transistor, one of the source and drain of the first transistor is electrically connected to one electrode of the capacitor and the gate of the second transistor, the channel formation region of the first transistor includes a metal oxide, the metal oxide includes indium and an element M, the element M is one or more selected from aluminum, gallium, tin, boron, silicon, titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten, and a potential corresponding to analog data is held in one of the source and drain of the first transistor. In the above configuration, for example, the channel region of the second transistor includes silicon.

[0017] Another embodiment of the present invention is a vehicle including a power storage system that operates according to any of the above-described operating methods. Another embodiment of the present invention is an electronic device including a power storage system that operates according to any of the above-described operating methods.

[0018] Another aspect of the present invention is an estimation method in which a computer executes a process of estimating a dischargeable capacity of a storage battery at a specified output based on an outside air temperature and an impedance of the storage battery using a neural network.

[0019] In the above estimation method, it is preferable that an upper limit value A of the discharge output of the storage battery is set.

[0020] Alternatively, one embodiment of the present invention is an electronic device that has a control circuit, a display unit, and a storage battery, where the control circuit has a neural network, and the control circuit uses the neural network to execute a process to estimate the dischargeable capacity of the storage battery at a specified output based on the outside air temperature and the impedance of the storage battery, and the display unit has a function of displaying the dischargeable capacity.

[0021] Alternatively, one aspect of the present invention is a vehicle having a navigation system and a storage battery, the navigation system having a neural network, the navigation system using the neural network to execute a process of estimating the dischargeable capacity of the storage battery at a specified output based on the outside air temperature and the impedance of the storage battery, and executes a process of estimating a travelable distance based on the dischargeable capacity, the navigation system estimating a planned travel distance to a charging spot located on a route from the current location to the destination based on destination information inputted to the navigation system, and setting an upper limit value A of the output of the storage battery so that the travelable distance is greater than the planned travel distance.

[0022] In the above configuration, it is preferable that the navigation system has a display unit, and the display unit has a function of displaying the upper limit value A.

[0023] In the above configuration, it is preferable that the navigation system has a display unit and has a function of displaying a warning on the display unit when the output of the storage battery reaches 90% of the upper limit value A or more.

[0024] Furthermore, in the above configuration, it is preferable that the navigation system has a function of estimating the maximum gradient of the road on the route from the current location to the destination based on the destination information inputted into the navigation system, setting a recommended maximum output B of the storage battery based on the maximum gradient, and displaying a warning on the display unit if the recommended maximum output B exceeds the upper limit value A. Effect of the Invention

[0025] According to one embodiment of the present invention, it is an object to provide a power storage system having excellent characteristics. According to one embodiment of the present invention, it is an object to provide a power storage system with high safety. According to one embodiment of the present invention, it is an object to provide a power storage system with little deterioration.

[0026] According to one embodiment of the present invention, the state of a storage battery can be determined. According to one embodiment of the present invention, the performance of a storage battery can be predicted. According to one embodiment of the present invention, a storage battery having excellent characteristics can be provided. According to one embodiment of the present invention, a storage battery with high safety can be provided. According to one embodiment of the present invention, a storage battery with little deterioration can be provided. According to one embodiment of the present invention, an electronic device equipped with a power storage system having excellent characteristics can be provided. According to one embodiment of the present invention, a vehicle equipped with a power storage system having excellent characteristics can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided.

[0027] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not need to have all of these effects. Note that effects other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract effects other than these from the description of the specification, drawings, claims, etc. [Brief description of the drawings]

[0028] [Figure 1] An example of a power storage system. [Diagram 2] An example of a power storage system. [Diagram 3] FIG. 4 is a flow diagram showing the operation of the power storage system. [Figure 4] FIG. 4 is a flow diagram showing the operation of the power storage system. [Diagram 5] FIG. 4 is a flow diagram showing the operation of the power storage system. [Figure 6] 1A and 1B are a flow diagram and a circuit diagram showing the operation of a power storage system. [Figure 7] FIG. 1 is a diagram showing an example of the configuration of a neural network. [Figure 8] FIG. 1 is a diagram showing an example of the configuration of a neural network. [Figure 9] FIG. 2 is a block diagram showing a configuration example of a product-sum calculation circuit. [Figure 10] FIG. 2 is a circuit diagram showing an example of a circuit configuration. [Figure 11] 4 is a timing chart showing an example of the operation of the product-sum calculation circuit. [Figure 12] A diagram showing the relationship between SOC and OCV. [Figure 13] FIG. 13 is a diagram showing an example of impedance measurement. [Figure 14] 1 is an example of the configuration of a storage battery. [Figure 15] 1 is an example of the configuration of a storage battery. [Figure 16] An example of a vehicle. [Figure 17] An example of a vehicle. [Figure 18] An example of a vehicle. [Figure 19] FIG. 4 is a flow diagram showing the operation of the navigation system. [Figure 20] FIG. 4 is a flow diagram showing the operation of the navigation system. [Figure 21] An example of electronic equipment. [Figure 22] An example of the application of a power storage system. [Figure 23] An example of electronic equipment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Hereinafter, the embodiments will be described with reference to the drawings. However, it will be easily understood by those skilled in the art that the embodiments can be implemented in many different forms, and that the forms and details can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the following embodiments.

[0030] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. Note that the drawings are schematic illustrations of ideal examples, and are not limited to the shapes or values ​​shown in the drawings.

[0031] In addition, in this specification, the following embodiments can be appropriately combined. In addition, when a plurality of configuration examples are shown in one embodiment, the configuration examples can be appropriately combined.

[0032] In this specification, the term "neural network" refers to a general model that imitates the neural circuit network of living organisms, determines weight coefficients (also called connection strength) between neurons through learning, and has problem-solving capabilities. A neural network has an input layer, a hidden layer (also called an intermediate layer), and an output layer.

[0033] Furthermore, in this specification, when discussing neural networks, determining neurons and their weighting coefficients from existing information may be referred to as "learning."

[0034] In this specification, the process of constructing a neural network using the connection weights obtained by learning and deriving a new conclusion therefrom may be referred to as "inference."

[0035] In this specification and the like, a transistor in which an oxide semiconductor or a metal oxide is used for a channel formation region is referred to as an oxide semiconductor transistor or an OS transistor.

[0036] (Embodiment 1) In this embodiment, a configuration example and an operation example of a power storage system of one embodiment of the present invention will be described.

[0037] A power storage system according to one embodiment of the present invention includes a storage battery and a control system that controls the storage battery. The control system includes a neural network.

[0038] In storage batteries, there are cases where the characteristics vary. For example, the storage battery may deteriorate due to repeated charging and discharging, and the amount of deterioration may vary from battery to battery. For ease of understanding, an increase in impedance is considered as an example of deterioration of a storage battery.

[0039] The power storage system according to one embodiment of the present invention includes a neural network. Data is provided to the neural network in advance to perform learning. Here, by learning data over time, for example, parameters of the storage battery over charge and discharge cycles, it is possible to estimate changes in the parameters over time. For example, after learning, the parameters of the storage battery are input to the neural network, and an estimated value of an increase in impedance after a certain time has passed, for example, after a certain number of charge and discharge cycles are repeated, is obtained as an output.

[0040] The power storage system of one embodiment of the present invention can predict an increase in impedance due to repeated charging and discharging. For example, by predicting an increase in impedance in a plurality of storage batteries, a storage battery with a significantly small increase in impedance can be selected and installed in a device, thereby extending the life of the storage battery in the device.

[0041] Here, the neural network has learned data over time in advance. When inferring a storage battery using a neural network, it is possible to infer the change in the parameters of the storage battery over time at a future time by simply providing the neural network with data for a certain time, or data for a certain time and its vicinity, without inputting complicated data over time.

[0042] When there are multiple batteries, they can be grouped according to the estimated impedance increase, and batteries belonging to the same group can be installed in the same device, thereby extending the life of the batteries in that device.

[0043] In addition, the charging conditions may be changed according to the estimated value of the impedance increase. Increasing the upper limit voltage of charging can increase the energy density, but it may also increase the impedance. For example, in a storage battery with a smaller estimated value of the impedance increase, the upper limit voltage of charging may be increased to increase the energy density.

[0044] Furthermore, by reducing the charging current and charging voltage of the storage battery, the decrease in the discharge capacity of the storage battery can be suppressed, thereby making it possible to extend the life of the storage battery.

[0045] A power storage system of one embodiment of the present invention includes a storage battery and a control circuit that controls the storage battery.

[0046] In the power storage system of one embodiment of the present invention, the state of the storage battery is determined. Also, in the power storage system of one embodiment of the present invention, the capacity of the storage battery is measured or estimated.

[0047] The power storage system of one embodiment of the present invention includes a neural network. The neural network preferably determines a state of a storage battery included in the power storage system. The neural network preferably receives parameters of the storage battery and outputs the state of the storage battery.

[0048] The power storage system of one embodiment of the present invention measures parameters of the storage battery, such as current, voltage, impedance, etc. The power storage system of one embodiment of the present invention measures the open circuit voltage (OCV) of the storage battery.

[0049] The OCV can be determined, for example, by stopping charging or discharging, and measuring the voltage after a certain time has passed and the battery reaction has stabilized. Since charging or discharging must be stopped and the battery waited for a certain time until the battery reaction has stabilized, it may take a long time to measure the OCV. Here, the "certain time" is, for example, 2 minutes to 5 hours, or 5 minutes to 2 hours.

[0050] Since it may take a long time to measure the OCV, as an alternative measurement, for example, the measurement may be performed by stopping charging or discharging and waiting for a shorter time (hereinafter referred to as the rest time). In this case, the neural network of one embodiment of the present invention may learn in advance the relationship between the rest time and the voltage of the storage battery to be measured. Through this learning, the OCV may be estimated from the voltage obtained after a short rest time.

[0051] Alternatively, as an alternative to measuring the OCV, for example, the charge or discharge current value may be changed and a change in voltage may be measured to estimate the OCV.

[0052] Further, the state of charge (SOC) of the storage battery may be measured or estimated by the power storage system according to one embodiment of the present invention. Here, the SOC is, for example, a value indicating the capacity of the storage battery as a percentage, with the full charge capacity (FCC) being 100%. The SOC may also be called the charging rate. The FCC is, for example, the discharge capacity of the storage battery when discharging is performed after full charging. The full charge means, for example, that charging is performed until the end of charging according to charging conditions determined for the storage battery. The FCC is a value that changes depending on the charging end voltage (upper limit charging voltage), charging end current, and the like. The value obtained by multiplying the FCC by the SOC may also be called the remaining capacity (RC) of the storage battery.

[0053] The neural network of one embodiment of the present invention preferably determines the state of the battery, for example the FCC, or preferably predicts the change in the FCC of the battery over time.

[0054] The power storage system according to one embodiment of the present invention can perform learning by providing parameters such as the OCV, SOC, impedance, and FCC of the storage battery to a neural network included in the power storage system. In this case, the parameters provided to the neural network are preferably parameters that change over time. For example, the neural network may be provided with changes in parameters that occur with repeated charging and discharging of the storage battery. Alternatively, the neural network may be provided with changes in parameters before and after the storage battery is stored. Storage of the storage battery includes storage at a specified temperature and at a specified SOC for a certain period of time.

[0055] By using a neural network included in the power storage system of one embodiment of the present invention, the SOC of the storage battery can be estimated from the OCV in some cases.

[0056] The impedance of a storage battery may change depending on the SOC. When the SOC changes, for example, the redox states of the positive and negative electrodes of the storage battery, the overvoltage state, the polarization state, etc. change. Therefore, when the SOC changes, for example, each impedance also changes. Therefore, the impedance of the entire storage battery also changes.

[0057] <Example of OCV measurement> FIG. 12 shows the results of measuring the relationship between the SOC and OCV of a lithium-ion battery.

[0058] The horizontal axis in FIG. 12 represents the SOC, and the vertical axis represents the voltage. After fully charging the lithium-ion battery, discharge is performed at 0.2C, and the battery is rested every 0.1V to measure the voltage. Let the voltage at the start of the rest be V1 and the voltage after the rest be V2. V2 was estimated as the value of the OCV. The rest time was set to 10 minutes.

[0059] The curve of Condition A shown in FIG. 12 shows the results measured before performing the charge-discharge cycle test. Also, Condition B shows the results measured after 200 charge-discharge cycles.

[0060] Compared with V1, V2, that is, the OCV, had a small difference between Condition A and Condition B even after 200 charge-discharge cycles. It can be said that the OCV has little variation with respect to factors that may cause deterioration such as charge-discharge cycles.

[0061] The deterioration state of a storage battery can be known from the impedance. For example, the deterioration of a storage battery may occur as a phenomenon of an increase in impedance. As an example, consider a case where the deterioration states are compared by comparing the impedances of a plurality of storage batteries. As described above, the impedance changes with the SOC of the storage battery.

[0062] Therefore, when the SOCs of the respective storage batteries are different, the impedance is affected by both the degradation state and the SOC, and it is necessary to separate the influence of each factor.

[0063] By using the power storage system of one embodiment of the present invention, the influence of the degradation state and the influence of the SOC can be separated. For example, the impedance at a different SOC can be estimated by using the impedance at a certain SOC by a neural network included in the power storage system of one embodiment of the present invention.

[0064] A neural network is given a huge number of parameters having complex correlations, and is then able to perform analysis and produce the desired output depending on the application.

[0065] By using the power storage system according to one embodiment of the present invention, when comparing the states of deterioration of the storage batteries using the impedance measured in each storage battery, the storage batteries can be compared without having to have the same SOC, and therefore the states of deterioration can be easily compared.

[0066] <An example of a power storage system> 1A illustrates a power storage system according to one embodiment of the present invention. The power storage system 130 includes a storage battery 135 and a control system 131. The control system 131 includes a protection circuit 137, a circuit 171, a circuit 172, a control circuit 134, and a memory 132.

[0067] The protection circuit 137 has a function of stopping the operation of the storage battery 135 when the storage battery 135 satisfies a certain specified condition. For example, when the current of the storage battery 135 exceeds a certain value, the operation is stopped. Also, for example, when the voltage of the storage battery 135 is equal to or higher than a certain value or equal to or lower than a certain value, the operation is stopped.

[0068] The protection circuit 137 preferably has a function of measuring the voltage and current of the storage battery 135. Alternatively, the protection circuit 137 may control the storage battery 135, for example, by using the current and voltage of the storage battery 135 measured by a circuit 171 described later.

[0069] The protection circuit 137 may have a path that is connected to the positive and negative electrodes of the storage battery 135 to short-circuit the two electrodes when the operation of the storage battery 135 is stopped. A resistive element or a capacitive element may be provided on the path.

[0070] The circuit 171 is electrically connected to the positive and negative electrodes of the storage battery 135. The circuit 171 has a function of measuring the current and voltage of the storage battery 135. In addition, the circuit 171 is electrically connected to the control circuit 134 and receives a signal from the control circuit 134.

[0071] The circuit 171 preferably includes a coulomb counter CC. The coulomb counter CC has a function of calculating an integrated charge amount by using time characteristics of a current of the storage battery 135. The ammeter included in the coulomb counter may also function as the ammeter included in the circuit 171.

[0072] The circuit 172 is electrically connected to the positive and negative electrodes of the storage battery 135. The circuit 172 has a function of measuring the impedance of the storage battery 135. The circuit 172 is also electrically connected to the control circuit 134 and receives a signal from the control circuit 134.

[0073] The control circuit 134 has a neural network NN. The control circuit 134 is electrically connected to the memory 132. The control circuit 134 controls the current and voltage of the storage battery using the current and voltage of the storage battery measured by the circuit 171 etc., and controls the charging and discharging conditions of the storage battery.

[0074] As shown in FIG. 1B, the power storage system 130 may include a transistor 147 and a transistor 148. The transistors 147 and 148 function as switches that cut off current, and operate the switches when the protection circuit 137 determines to shut down the storage battery 135. In the example shown in FIG. 1B, MOSFETs having parasitic diodes are shown as the transistors 147 and 148, but OS transistors may be used as the transistors 147 and 148. Details of OS transistors will be described later. The power storage system 130 may be configured without either the transistor 147 or the transistor 148.

[0075] As shown in FIG. 1B, the power storage system 130 may include a fuse 176.

[0076] As shown in FIG. 1B, the power storage system 130 may include a thermistor 174.

[0077] An example of a power storage system 130 having n storage batteries 135 is shown in Fig. 2A, where n is an integer equal to or greater than 2. In Fig. 2A, each of the multiple storage batteries 135 is referred to as a storage battery 135_k (k is an integer equal to or greater than 1 and equal to or less than n). The storage batteries 135_1 to 135_n are electrically connected in series.

[0078] In FIG. 2A, the protection circuit 137, the circuit 171, and the circuit 172 are electrically connected to both ends of the electrodes of each of the storage batteries 135_1 to 135_n.

[0079] Fig. 2(B) shows an example in which the power storage system 130 has m control systems 131, where m is an integer equal to or greater than 2. In Fig. 2(B), each of the multiple control systems 131 is referred to as a control system 131_j (j is an integer equal to or greater than 1 and equal to or less than m).

[0080] 2B, the power storage system 130 has a plurality of battery groups 136. In FIG 2B, each of the plurality of battery groups 136 is referred to as a battery group 136_j. The battery group 136 has a plurality of storage batteries electrically connected in series.

[0081] In FIG. 2(B), a plurality of battery groups 136 are electrically connected in parallel.

[0082] 2(B), a control system 131 is connected to each battery group 136. A control system 131_j is electrically connected to the battery group 136_j.

[0083] Here, when the power storage system 130 has a plurality of control systems 131, the protection circuit 137, the circuit 171, the circuit 172, the control circuit 134, and the memory 132 included in the control system 131 may be combined in the plurality of control systems 131. For example, the control circuit 134 may provide control signals to the plurality of control systems 131.

[0084] <An example of inference> An example of the operation of the power storage system 130 will be described with reference to the flow diagram shown in Fig. 3. Fig. 3 shows an example of inferring parameters of the storage battery 135 included in the power storage system 130 when learning data is provided in advance to the neural network NN included in the power storage system 130.

[0085] In step S000, the process starts (START).

[0086] In step S001, the power storage system 130 is connected to an external power source. Power is supplied from the external power source to the power storage system 130. Note that the power storage system 130 does not need to be connected to an external power source. In that case, in the power storage system 130, power may be supplied from the storage battery 135 to a circuit in the control system.

[0087] In step S002, charging is performed on the storage battery 135. Note that in step S002, the storage battery 135 may be discharged instead of being charged.

[0088] In step S003, the operation of the storage battery 135 is stopped. If charging was performed in step S002, charging is stopped, and if discharging was performed, discharging is stopped.

[0089] In step S004, the OCV of the storage battery 135 is measured.

[0090] In step S005, the impedance of the storage battery 135 is measured.

[0091] Impedance can be analyzed using the equivalent circuit shown in Fig. 6(B). The equivalent circuit shown in Fig. 6(B) includes a resistor Ro, n resistors (the h-th resistor is represented as resistor R_h, where h is an integer between 1 and n), and n capacitors (the h-th capacitor is represented as capacitor Ca_h). The resistor R_h and the capacitor Ca_h are connected in parallel, and the resistor Ro and the resistors R_1 to R_n are connected in series.

[0092] The impedance measurement results can be expressed as a Nyquist diagram and analyzed. The diameter of the arcs seen in the Nyquist diagram may correspond to each resistor shown in Figure 6(B). An example of the Nyquist diagram will be described later in Figure 13(C).

[0093] From the resistance and capacitance calculated from the analysis results using the equivalent circuit shown in FIG. 6(B), it may be possible to separate and estimate parameters corresponding to phenomena such as ion diffusion, charge transfer, electron and ion transfer, contact resistance, etc.

[0094] In Fig. 6(C), the equivalent circuit has an impedance Ws. The impedance Ws is electrically connected in series with the resistor R_n. The impedance Ws is represented by a 45° straight line in the Nyquist diagram, and is sometimes called the Warburg impedance.

[0095] The impedance is measured over a certain frequency range, for example, over a range of 10 μHz to 1 MHz, or 10 mHz to 50 kHz, at one, preferably two or more, more preferably 10 to 100 frequencies.

[0096] The power storage system of one embodiment of the present invention preferably includes an AC power supply.

[0097] Instead of impedance measurement, step response measurement may be performed, which does not require an AC power source and may allow evaluation using a simpler measurement system.

[0098] When a constant voltage based on a step function (e.g., a square wave) is applied to an element such as a storage battery for a certain period of time, the response characteristics (step response) can be evaluated by measuring the time change in the current of the storage battery during and after the period in which the constant voltage is applied. In addition, the voltage applied to the storage battery is not limited to a step function such as a square wave, and may be a triangular wave, sawtooth wave, or the like.

[0099] The transfer function can be calculated using the input voltage waveform and the output current waveform. The transfer function is expressed as a function of the complex number s. By substituting jω for the complex number s, the AC frequency characteristics can be obtained.

[0100] In step S006, the OCV measured in step S004 and the impedance measured in step S005 are input to the neural network NN.

[0101] In step S007, a first signal is output from the neural network NN in accordance with the value input in step S006. The first signal is, for example, an estimated value of an increase in impedance or an estimated value of a decrease in discharge capacity in the case where the operation of the storage battery is continued in the future, or is judgment data based on the transition of these parameters or the estimated values ​​of these parameters.

[0102] In step S008, a predetermined operation is performed in response to the first signal. As the predetermined operation, for example, the operating conditions of the storage battery 135 are determined. As the operating conditions of the storage battery 135 are determined, for example, the charging current and the charging upper limit voltage are changed. For example, the FCC of the storage battery 135 is estimated, and the charging current is reduced in accordance with the reduction in FCC. This makes it possible to suppress a reduction in the discharge capacity of the storage battery 135. Alternatively, in order to suppress a reduction in the capacity of the storage battery 135, the charging upper limit voltage is changed. This makes it possible to suppress a reduction in the discharge capacity of the storage battery 135.

[0103] Alternatively, as the predetermined operation performed in step S008, for example, classification of the storage battery 135 is performed in response to the first signal. For example, classification is performed based on an estimated value of an increase in impedance or an estimated value of a decrease in discharge capacity.

[0104] In step S099, the process ends.

[0105] <Example of learning> The flow charts shown in FIG. 4, FIG. 5, and FIG. 6(A) show an example of a case where the neural network NN of the power storage system 130 performs learning.

[0106] Steps S200 to S204, S210, and S230 will be described with reference to the flow chart shown in FIG.

[0107] In step S200, the process starts.

[0108] In step S201, the power storage system 130 is connected to an external power supply. Power is supplied from the external power supply to the power storage system 130. Note that the power storage system 130 does not necessarily have to be connected to an external power supply.

[0109] In step S202, the storage battery 135 is fully charged.

[0110] In step S203, the storage battery 135 is discharged, and the FCC of the storage battery is calculated.

[0111] In step S204, the number of charge / discharge cycles is measured for the storage battery 135. Here, the number of charge / discharge cycles is the cumulative number of cycles from step S202 to step S204.

[0112] Step S210 is a connector a that connects step S204 to step S211 in the flow diagram shown in FIG.

[0113] Step S230 is a connector c that connects step S224 to step S204 in the flow diagram shown in FIG. 6(A) to be described later.

[0114] Steps S211 to S218 will be described with reference to the flow chart shown in FIG.

[0115] In steps S211 to S216, the storage battery 135 is charged, and parameters of the storage battery 135 are measured.

[0116] In step S211, the storage battery 135 is charged. Here, charging is performed so that the SOC decreases by, for example, 5% or more and less than 40%, or 5% or more and less than 20%. For example, if the SOC before charging is 80%, charging is performed so that the SOC after charging becomes 55%, that is, the SOC decreases by 25%.

[0117] In step S212, charging of the storage battery 135 is stopped.

[0118] In step S213, the SOC of the storage battery 135 is calculated. The SOC is calculated, for example, by determining the amount of charge charged between steps S211 and S212, based on the full charge capacity of the storage battery calculated in step S203.

[0119] In step S214, the OCV of the storage battery 135 is measured.

[0120] In step S215, the impedance of the storage battery 135 is measured.

[0121] In step S216, the SOC calculated in step S213, the OCV measured in step S214, the impedance measured in step S215, and the number of charge / discharge cycles calculated in step S204 are input to a neural network NN, where the measured OCV and impedance are correlated with the SOC, and the SOC, OCV, and impedance are correlated with the number of charge / discharge cycles.

[0122] In step S217, if the SOC of the storage battery 135 is equal to or lower than A [%], the process returns to step S211, and if the SOC is greater than A [%], the process proceeds to step S218.

[0123] Step S218 is a connector b that connects step S217 to step S222 shown in FIG. 6(A).

[0124] Steps S222 to S225, step S230 and step S299 will be described with reference to FIG.

[0125] In step S222, the storage battery 135 is discharged. Here, the discharge is performed so that the SOC is equal to or greater than 0% and less than 30%, for example.

[0126] In step S223, the discharge capacity is calculated and input to the neural network NN, where the discharge capacity is correlated with the number of charge / discharge cycles calculated in step S204.

[0127] In step S224, if the number of charge / discharge cycles of the storage battery 135 is x or less, the process proceeds to step S230, and if the number of charge / discharge cycles is greater than x, the process proceeds to step S225. Since step S230 is a connector c connecting step S224 to step S204 shown in Fig. 4, if the number of charge / discharge cycles is x or less, the process proceeds sequentially from step S204 based on the flow diagram shown in Fig. 4.

[0128] In step S225, the weighting coefficients of the neural network NN are adjusted so that a desired output is obtained for the parameters input in step S216. As an example, the weighting coefficients of the neural network NN are adjusted so that the output of the neural network NN when the OCV and impedance are input to the neural network NN is a value corresponding to the deterioration rate of the discharge capacity accompanying the charge / discharge cycles. More specifically, for example, a value corresponding to the deterioration rate of the discharge capacity after a certain number of charge / discharge cycles may be output.

[0129] Alternatively, the neural network NN may output the judgment result. For example, when the deterioration rate of the discharge capacity is equal to or greater than a certain value, H1 here, the neural network NN outputs a first signal, and when the deterioration rate is smaller than H1, the neural network NN outputs a second signal different from the first signal. The first signal and the second signal are, for example, a high potential signal and a low potential signal. Here, H1 may be, for example, a value of 60% to 98%, or 70% to 95%, of the capacity or standard capacity at the start of use of the storage battery. Also, H1 may be measured, for example, after 10 or more, 50 or more, or 100 or more charge / discharge cycles.

[0130] In step S299, the process ends.

[0131] <Impedance measurement example> Figure 13 shows the results of impedance measurement of a lithium-ion battery. Impedance measurement was performed by sweeping from high to low frequencies with an amplitude of 15 mV in the range of 0.01 Hz to 200 kHz. The measurement device used was a Celltest System from Solartron Analytical. Figure 13(A) is called a gain plot, and shows frequency on the horizontal axis and impedance magnitude |Z| on the vertical axis. Figure 13(B) is called a phase plot, and shows frequency on the horizontal axis and phase "theta" on the vertical axis. Figure 13(C) is called a Nyquist plot, and shows the real part of the frequency response (Z') on the horizontal axis and the imaginary part of the frequency response (Z'') on the vertical axis.

[0132] In Fig. 13(C), the dots are measured values, and the solid line is the result of calculation (fitting) using the model in Fig. 6(C) when n = 1. The measured values ​​and the result of calculation using the model showed good correspondence.

[0133] In the fitting, a constant phase element (CPE) was used as the capacitance element Ca_1. The impedance of the CPE is Z_CPE. The impedance Z_CPE can be expressed by the following formula. p is a value between 0 and 1, and T is a constant.

[0134]

number

[0135] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes.

[0136] (Embodiment 2) In this embodiment, an example of the configuration of a neural network NN will be described.

[0137] FIG. 7 shows an example of a neural network according to an embodiment of the present invention. The neural network NN shown in FIG. 7 has an input layer IL, an output layer OL, and a hidden layer (intermediate layer) HL. The neural network NN can be configured as a neural network having a plurality of hidden layers HL, that is, a deep neural network. Note that learning in a deep neural network is sometimes called deep learning. The output layer OL, the input layer IL, and the hidden layer HL each have a plurality of neuron circuits, and the neuron circuits provided in different layers are connected to each other via synapse circuits.

[0138] The neural network NN is provided with a function for analyzing the operation and state of the storage battery through learning. When the measured parameters of the storage battery are input to the neural network NN, calculation processing is performed in each layer. The calculation processing in each layer is performed by a multiplication and accumulation operation between the output of the neuron circuit in the previous layer and a weighting coefficient. Note that the connection between layers may be a full connection in which all neuron circuits are connected to each other, or a partial connection in which some neuron circuits are connected to each other.

[0139] For example, a convolutional neural network (CNN) may be used, in which only certain units have connections between adjacent layers and which has a convolutional layer and a pooling layer. CNN is used, for example, for image processing. In the convolutional layer, for example, a multiplication and accumulation operation is performed between image data and a filter. It is preferable to place the pooling layer immediately after the convolutional layer.

[0140] The convolution layer has the function of performing convolution on image data. Convolution is performed by repeating product-sum operations between a part of the image data and the filter value of the weight filter. Image features are extracted by the convolution in the convolution layer.

[0141] A weight filter can be used for the convolution. Image data input to the convolution layer is subjected to filtering using a filter.

[0142] The convolved data is converted by an activation function and then output to the pooling layer. As the activation function, ReLU (Rectified Linear Units) or the like can be used. ReLU is a function that outputs "0" when the input value is negative, and outputs the input value as is when the input value is "0" or greater. In addition, a sigmoid function, a tanh function, or the like can also be used as the activation function.

[0143] The pooling layer has a function of performing pooling on the image data input from the convolution layer. Pooling is a process of dividing the image data into multiple regions, extracting predetermined data for each region, and arranging it in a matrix. Pooling reduces the image data while retaining the features extracted by the convolution layer. Note that maximum pooling, average pooling, Lp pooling, etc. can be used as the pooling.

[0144] CNN extracts features by the above-mentioned convolution and pooling processes. Note that CNN can be composed of multiple convolution layers and pooling layers.

[0145] It is preferable that a fully connected layer is arranged after, for example, several layers of convolutional layers and pooling layers are arranged alternately. A plurality of fully connected layers may be arranged. It is preferable that the fully connected layer has a function of determining an image using image data that has been subjected to convolution and pooling.

[0146] An example of the configuration of a neural network NN with a learning function will be described below. An example of the configuration of the neural network NN is shown in Fig. 8. The neural network NN is composed of neuron circuits NC and synapse circuits SC provided between the neuron circuits.

[0147] FIG. 8A shows an example of the configuration of the neuron circuit NC and the synapse circuit SC that make up the neural network NN. The synapse circuit SC receives input data x 1 〜x L(L is a natural number) is input. Also, the synapse circuit SC has a weighting coefficient w k (k is an integer between 1 and L) k corresponds to the strength of the connections between neuronal circuits NC.

[0148] Input data x to synapse circuit SC 1 〜x L When input, the neuron circuit NC receives the input data x k and the weighting coefficient w stored in the synapse circuit SC k The product of (x k w k ) for k = 1 to L, the sum (x 1 w 1 +x 2 w 2 +...+x L w L ), i.e., x k And w k The value obtained by multiplying and accumulating using is supplied. If this value exceeds the threshold θ of the neuron circuit NC, the neuron circuit NC outputs a high-level signal y. This phenomenon is called the firing of the neuron circuit NC.

[0149] A model of a neural network NN that uses neuron circuits NC and synapse circuits SC to configure a hierarchical perceptron is shown in Fig. 8(B). The neural network NN has an input layer IL, a hidden layer (middle layer) HL, and an output layer OL.

[0150] From the input layer IL, the input data x 1 〜x L The hidden layer HL has hidden synapse circuits HS and hidden neuron circuits HN. The output layer OL has output synapse circuits OS and output neuron circuits ON.

[0151] The hidden neuron circuit HN receives input data x k and the weight coefficient w held in the hidden synapse circuit HS kThe output neuron circuit ON is supplied with the output of the hidden neuron circuit HN and the weight coefficient w held in the output synapse circuit OS. k The output neuron circuit ON outputs the output data y 1 or y L will be output.

[0152] In this way, the neural network NN given specific input data has the function of outputting, as output data, a value according to the weighting coefficients held in the synapse circuits SC and the threshold value θ of the neuron circuit.

[0153] In addition, the neural network NN can perform supervised learning by inputting training data. Figure 8(C) shows a model of a neural network NN that performs supervised learning using the backpropagation method.

[0154] The backpropagation method uses the weight coefficient w of the synapse circuit to reduce the error between the output data of the neural network and the teacher data. k Specifically, the output data y 1 or y L and training data t 1 ~t L The error δ is determined based on O Depending on the weight coefficients w of the hidden synapse circuit HS, k In addition, the weight coefficient w of the hidden synapse circuit HS is changed. k Depending on the amount of change in k In this way, the training data t 1 ~t L Based on this, the weight coefficients of the synapse circuits SC are sequentially changed, thereby enabling the neural network NN to learn.

[0155] Although one hidden layer HL is shown in Fig. 8(B) and (C), the number of hidden layers HL can be two or more. By using a neural network having two or more hidden layers HL (deep neural network (DNN)), deep learning can be performed. This can improve the accuracy of gradation correction.

[0156] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes.

[0157] (Embodiment 3) In this embodiment, a specific example of an analog product-sum calculation circuit applicable to the neural network shown in the above embodiment will be described.

[0158] The overall calculation of the neural network as shown in Figures 7 and 8 is performed by a huge number of product-sum calculations. If these calculation processes are performed by digital circuits, a huge number of transistors will be required, which is inefficient and consumes high power. For this reason, it is preferable to perform the above-mentioned product-sum calculations by an analog product-sum circuit (hereinafter referred to as an APS (Analog Product-Sum circuit)). It is also preferable that the APS has an analog memory. By storing the weight coefficients obtained by learning in the analog memory, the APS can perform the product-sum calculations using analog data as is. As a result, the APS can efficiently build a neural network using a small number of transistors.

[0159] In this specification, analog memory refers to a storage device capable of storing analog data. Also, in this specification, analog data refers to data with a resolution of 3 bits (8 values) or more. Multi-value data may also be called analog data.

[0160] As the analog memory, a multi-level flash memory, a resistive random access memory (ReRAM), a magnetoresistive random access memory (MRAM), or a memory using an OS transistor (OS memory) can be used.

[0161] The channel formation region of the OS transistor preferably includes a metal oxide. The metal oxide included in the channel formation region preferably includes indium (In). When the metal oxide included in the channel formation region includes indium, the carrier mobility (electron mobility) of the OS transistor is increased. The metal oxide included in the channel formation region is preferably an oxide semiconductor including an element M. The element M is preferably aluminum (Al), gallium (Ga), tin (Sn), or the like. Other elements that can be used as the element M include boron (B), silicon (Si), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), yttrium (Y), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), and tungsten (W). However, the element M may include a combination of a plurality of the above elements. The element M is, for example, an element having a high bond energy with oxygen. For example, the element M is an element having a higher bond energy with oxygen than indium. In addition, the metal oxide in the channel formation region is preferably a metal oxide containing zinc (Zn). Metal oxides containing zinc may be easily crystallized.

[0162] The metal oxide of the channel formation region is not limited to a metal oxide containing indium. The metal oxide of the channel formation region may be, for example, a metal oxide containing zinc without containing indium, a metal oxide containing gallium, or a metal oxide containing tin, such as zinc tin oxide or gallium tin oxide. FIG. 9 shows a configuration example of a product-sum operation circuit. The product-sum operation circuit MAC shown in FIG. 9 is a circuit that performs a product-sum operation of first data held in a memory cell described later and input second data. The first data and the second data can be analog data or multi-valued data (discrete data).

[0163] The product-sum calculation circuit MAC has a current source circuit CS, a current mirror circuit CM, a circuit WDD, a circuit WLD, a circuit CLD, an offset circuit OFST, an activation function circuit ACTV, and a memory cell array CA.

[0164] The memory cell array CA has a memory cell AM[1], a memory cell AM[2], a memory cell AMref[1], and a memory cell AMref[2]. The memory cell AM[1] and the memory cell AM[2] have a role of storing first data, and the memory cell AMref[1] and the memory cell AMref[2] have a function of storing reference data required for performing a multiply-and-accumulate operation. Note that the reference data can be analog data or multi-valued data (discrete data) like the first data and the second data.

[0165] 9, the memory cell array CA has two memory cells arranged in a matrix in the row direction and two memory cells arranged in the column direction, but the memory cell array CA may have three or more memory cells arranged in a matrix in the row direction and three or more memory cells arranged in the column direction. Also, when multiplication is performed instead of product-sum operation, the memory cell array CA may have one memory cell arranged in a matrix in the row direction and two or more memory cells arranged in the column direction.

[0166] The memory cell AM[1], the memory cell AM[2], the memory cell AMref[1], and the memory cell AMref[2] each include a transistor Tr11, a transistor Tr12, and a capacitive element C1.

[0167] The transistor Tr11 is preferably an OS transistor.

[0168] In addition, by using an OS transistor for the transistor Tr12, the manufacturing process of the product-accumulator circuit can be shortened in some cases because the transistor Tr12 can be manufactured simultaneously with the transistor Tr11. In addition, the channel formation region of the transistor Tr12 may be made of amorphous silicon, polycrystalline silicon, or the like instead of oxide.

[0169] In each of the memory cells AM[1], AM[2], AMref[1], and AMref[2], a first terminal of the transistor Tr11 is electrically connected to a gate of the transistor Tr12. A first terminal of the transistor Tr12 is electrically connected to the wiring VR. A first terminal of the capacitance element C1 is electrically connected to the gate of the transistor Tr12.

[0170] In the memory cell AM[1], the second terminal of the transistor Tr11 is electrically connected to the wiring WD, and the gate of the transistor Tr11 is electrically connected to the wiring WL[1]. The second terminal of the transistor Tr12 is electrically connected to the wiring BL, and the second terminal of the capacitance element C1 is electrically connected to the wiring CL[1]. In FIG. 9, the connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitance element C1 in the memory cell AM[1] is referred to as a node NM[1]. In addition, the current flowing from the wiring BL to the second terminal of the transistor Tr12 is referred to as I AM[1] Let us assume that.

[0171] In the memory cell AM[2], the second terminal of the transistor Tr11 is electrically connected to the wiring WD, and the gate of the transistor Tr11 is electrically connected to the wiring WL[2]. The second terminal of the transistor Tr12 is electrically connected to the wiring BL, and the second terminal of the capacitance element C1 is electrically connected to the wiring CL[2]. In FIG. 9, in the memory cell AM[2], the connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitance element C1 is referred to as a node NM[2]. In addition, the current flowing from the wiring BL to the second terminal of the transistor Tr12 is referred to as I AM[2] Let us assume that.

[0172] In the memory cell AMref[1], the second terminal of the transistor Tr11 is electrically connected to the wiring WDref, and the gate of the transistor Tr11 is electrically connected to the wiring WL[1]. The second terminal of the transistor Tr12 is electrically connected to the wiring BLref, and the second terminal of the capacitance element C1 is electrically connected to the wiring CL[1]. In FIG. 9, in the memory cell AMref[1], the connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitance element C1 is defined as a node NMref[1]. In addition, the current flowing from the wiring BLref to the second terminal of the transistor Tr12 is defined as I AMref[1] Let us assume that.

[0173] In the memory cell AMref[2], the second terminal of the transistor Tr11 is electrically connected to the wiring WDref, and the gate of the transistor Tr11 is electrically connected to the wiring WL[2]. The second terminal of the transistor Tr12 is electrically connected to the wiring BLref, and the second terminal of the capacitance element C1 is electrically connected to the wiring CL[2]. In FIG. 9, the connection point between the first terminal of the transistor Tr11, the gate of the transistor Tr12, and the first terminal of the capacitance element C1 in the memory cell AMref[2] is referred to as a node NMref[2]. In addition, the current flowing from the wiring BLref to the second terminal of the transistor Tr12 is referred to as I AMref[2] Let us assume that.

[0174] The above-mentioned nodes NM[1], NM[2], NMref[1], and NMref[2] function as retention nodes for the respective memory cells.

[0175] The wiring VR is a wiring for passing a current between the first terminal and the second terminal of the transistor Tr12 of each of the memory cells AM[1], AM[2], AMref[1], and AMref[2]. Therefore, the wiring VR functions as a wiring for applying a predetermined potential. Note that in this embodiment, the potential applied by the wiring VR is a reference potential or a potential lower than the reference potential.

[0176] The current source circuit CS is electrically connected to the wiring BL and the wiring BLref. The current source circuit CS has a function of supplying a current to the wiring BL and the wiring BLref. The current amounts supplied to the wiring BL and the wiring BLref may be different from each other. In this configuration example, the current flowing from the current source circuit CS to the wiring BL is referred to as I C Let I be the current flowing from the current source circuit CS to the wiring BLref. Cref Let us assume that.

[0177] The current mirror circuit CM has a wiring IE and a wiring IEref. The wiring IE is electrically connected to the wiring BL, and in FIG. 9, the connection point of the wiring IE and the wiring BL is illustrated as a node NP. The wiring IEref is electrically connected to the wiring BLref, and in FIG. 9, the connection point of the wiring IEref and the wiring BLref is illustrated as a node NPref. The current mirror circuit CM has a function of discharging a current according to the potential of the node NPref from the node NPref of the wiring BLref to the wiring IEref, and discharging a current of the same amount from the node NP of the wiring BL to the wiring IE. Note that in FIG. 9, the current discharged from the node NP to the wiring IE and the current discharged from the node NPref to the wiring IEref are referred to as I CM In addition, the current flowing from the current mirror circuit CM to the memory cell array CA in the wiring BL is expressed as I BIn the wiring BLref, the current flowing from the current mirror circuit CM to the memory cell array CA is I Bref It is written as follows.

[0178] The circuit WDD is electrically connected to the wiring WD and the wiring WDref The circuit WDD has a function of transmitting data to be stored in each memory cell of the memory cell array CA.

[0179] The circuit WLD is electrically connected to the wiring WL[1] and the wiring WL[2]. The circuit WLD has a function of selecting a memory cell to which data is to be written when data is written to a memory cell included in the memory cell array CA.

[0180] The circuit CLD is electrically connected to the wirings CL[1] and CL[2]. The circuit CLD has a function of applying a potential to the second terminal of the capacitor C of each memory cell in the memory cell array CA.

[0181] The circuit OFST is electrically connected to the wiring BL and the wiring OE. The circuit OFST has a function of measuring the amount of current flowing from the wiring BL to the circuit OFST and / or the amount of change in the current flowing from the wiring BL to the circuit OFST. In addition, the circuit OFST has a function of outputting the result of the measurement to the wiring OE. Note that the circuit OFST may be configured to output the result of the measurement directly as a current to the wiring OE, or may be configured to convert the result of the measurement into a voltage and output it to the wiring OE. Note that in FIG. 9, the current flowing from the wiring BL to the circuit OFST is represented as I α He wrote:

[0182] For example, the circuit OFST may have a configuration shown in Fig. 10. In Fig. 10, the circuit OFST includes a transistor Tr21, a transistor Tr22, a transistor Tr23, a capacitance element C2, and a resistance element R.

[0183] A first terminal of the capacitance element C2 is electrically connected to the wiring BL, and a first terminal of the resistance element R is electrically connected to the wiring BL. A second terminal of the capacitance element C2 is electrically connected to a first terminal of the transistor Tr21, and the first terminal of the transistor Tr21 is electrically connected to the gate of the transistor Tr22. A first terminal of the transistor Tr22 is electrically connected to a first terminal of the transistor Tr23, and the first terminal of the transistor Tr23 is electrically connected to the wiring OE. Note that the electrical connection point between the first terminal of the capacitance element C2 and the first terminal of the resistance element R is a node Na, and the electrical connection point between the second terminal of the capacitance element C2, the first terminal of the transistor Tr21, and the gate of the transistor Tr22 is a node Nb.

[0184] A second terminal of the resistor R is electrically connected to the wiring VrefL. A second terminal of the transistor Tr21 is electrically connected to the wiring VaL, and a gate of the transistor Tr21 is electrically connected to the wiring RST. A second terminal of the transistor Tr22 is electrically connected to the wiring VDDL. A second terminal of the transistor Tr23 is electrically connected to the wiring VSSL, and a gate of the transistor Tr23 is electrically connected to the wiring VbL.

[0185] The wiring VrefL is a wiring that provides a potential Vref, the wiring VaL is a wiring that provides a potential Va, and the wiring VbL is a wiring that provides a potential Vb. The wiring VDDL is a wiring that provides a potential VDD, and the wiring VSSL is a wiring that provides a potential VSS. In particular, in the configuration example of the circuit OFST here, the potential VDD is a high-level potential, and the potential VSS is a low-level potential. The wiring RST is a wiring that provides a potential for switching the conductive state and non-conductive state of the transistor Tr21.

[0186] In the circuit OFST shown in FIG. 10, a source follower circuit is configured by the transistor Tr22, the transistor Tr23, the wiring VDDL, the wiring VSSL, and the wiring VbL.

[0187] In the circuit OFST shown in FIG. 10, a potential according to a current flowing from the wiring BL and the resistance of the resistor element R is applied to the node Na by the resistor element R and the wiring VrefL.

[0188] An operation example of the circuit OFST shown in Fig. 10 will be described. When a first current (hereinafter referred to as a first current) flows from the wiring BL, a potential according to the first current and the resistance of the resistive element R is applied to the node Na by the resistive element R and the wiring VrefL. At this time, the transistor Tr21 is set to a conductive state, and a potential Va is applied to the node Nb. After that, the transistor Tr21 is set to a non-conductive state.

[0189] Next, when a second current (hereinafter referred to as the second current) flows from the wiring BL, a potential according to the second current and the resistance of the resistive element R is applied to the node Na by the resistive element R and the wiring VrefL, in the same manner as when the first current flows. At this time, since the node Nb is in a floating state, the change in the potential of the node Na also changes the potential of the node Nb due to capacitive coupling. The change in the potential of the node Na is represented as ΔV Na When the capacitance coupling coefficient is set to 1, the potential of node Nb is Va+ΔV Na The threshold voltage of the transistor Tr22 is V th When this is done, the potential from the wiring OE is Va+ΔV Na -V th Here, the potential Va is the threshold voltage V th By doing so, the potential ΔV Na can be output.

[0190] Potential ΔV Na is determined according to the change amount from the first current to the second current, the resistance element R, and the potential Vref. Since the resistance element R and the potential Vref can be known, the potential ΔV Na From this, the amount of change in the current flowing through the wiring BL can be obtained.

[0191] The activation function circuit ACTV is electrically connected to the wiring OE and the wiring NIL. The result of the change in the current measured by the circuit OFST is input to the activation function circuit ACTV via the wiring OE. The activation function circuit ACTV is a circuit that performs a calculation on the result according to a predefined function system. As the function system, for example, a sigmoid function, a tanh function, a softmax function, a ReLU function, a threshold function, etc. can be used, and these functions are applied as activation functions in the neural network.

[0192] <Example of operation of the multiply-and-accumulate circuit> Next, an example of the operation of the product-sum calculation circuit MAC will be described.

[0193] 11 shows a timing chart of an operation example of the multiply-and-accumulate circuit MAC. The timing chart of FIG. 11 shows changes in the potentials of the wiring WL[1], the wiring WL[2], the wiring WD, the wiring WDref, the node NM[1], the node NM[2], the node NMref[1], the node NMref[2], the wiring CL[1], and the wiring CL[2] from time T01 to time T09. B -I α , and current I Bref In particular, the current I B -I α indicates the sum of currents flowing from the wiring BL to the memory cells AM[1] and AM[2] of the memory cell array CA.

[0194] <<From time T01 to time T02>> Between time T01 and time T02, a high-level potential (denoted as High in FIG. 11) is applied to the wiring WL[1], and a low-level potential (denoted as Low in FIG. 11) is applied to the wiring WL[2]. In addition, the wiring WD is V PR -V W[1] A large potential is applied, and the wiring WDref is V higher than the ground potential. PRA large potential is applied to the wiring CL[1] and the wiring CL[2]. Furthermore, a reference potential (denoted as REFP in FIG. 11) is applied to each of the wirings CL[1] and CL[2].

[0195] In addition, the potential V W[1] is a potential corresponding to one of the first data. PR is the potential corresponding to the reference data.

[0196] At this time, a high-level potential is applied to the gates of the transistors Tr11 of the memory cells AM[1] and AMref[1], the transistors Tr11 of the memory cells AM[1] and AMref[1] are turned on, and the potential of the node NM[1] is V PR -V W[1] The potential of the node NMref[1] is V PR It becomes.

[0197] The current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM[1] is I AM[1],0 Then, I AM[1],0 can be expressed by the following formula:

[0198]

number

[0199] k is a constant determined by the channel length, channel width, mobility, and capacitance of the gate insulating film of the transistor Tr12. th is the threshold voltage of transistor Tr12.

[0200] The current flowing from the wiring BLref to the first terminal via the second terminal of the transistor Tr12 of the memory cell AMref[1] is I AMref[1],0 Similarly, when AMref[1],0 can be expressed by the following formula:

[0201]

number

[0202] Since a low-level potential is applied to the gates of the transistors Tr11 in the memory cells AM[2] and AMref[2], the transistors Tr11 in the memory cells AM[2] and AMref[2] are turned off, and therefore the potentials at the nodes NM[2] and NMref[2] are not maintained.

[0203] <<From time T02 to time T03>> Between time T02 and time T03, a low-level potential is applied to the line WL[1]. At this time, a low-level potential is applied to the gates of the transistors Tr11 in the memory cells AM[1] and AMref[1], so that the transistors Tr11 in the memory cells AM[1] and AMref[1] are turned off.

[0204] In addition, a low-level potential has been applied to the wiring WL[2] since before time T02. Therefore, the transistors Tr11 of the memory cells AM[2] and AMref[2] have been in a non-conductive state since before time T02. Therefore, the potentials of the nodes NM[1], NM[2], NMref[1], and NMref[2] are held between time T02 and time T03. By applying an OS transistor to the transistor Tr11, the leakage current flowing between the first terminal and the second terminal of the transistor Tr11 can be reduced, so that the potentials of the nodes can be held for a long time. The wiring WD and the wiring WDref are applied with a ground potential, and the transistor Tr11 is in a non-conductive state, so that the potentials held at the nodes are not rewritten by the application of the potentials from the wiring WD and the wiring WDref.

[0205] <<From time T03 to time T04>> Between time T03 and time T04, a low-level potential is applied to the wiring WL[1], and a high-level potential is applied to the wiring WL[2]. In addition, the wiring WD is V PR -V W[2] A large potential is applied, and the wiring WDref is V higher than the ground potential. PR Furthermore, the reference potential is being applied to the wiring CL[1] and the wiring CL[2] continuously from before time T02.

[0206] In addition, the potential V W[2] is a potential corresponding to one of the first data.

[0207] At this time, a high-level potential is applied to the gates of the transistors Tr11 of the memory cells AM[2] and AMref[2], so that the transistors Tr11 of the memory cells AM[2] and AMref[2] are turned on, and the potential of the node NM[2] is V PR -V W[2] , the potential of node NMref[2] is V PR It becomes.

[0208] The current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM[2] is I AM[2],0 Then, I AM[2],0 can be expressed by the following formula:

[0209]

number

[0210] The current flowing from the wiring BLref to the first terminal via the second terminal of the transistor Tr12 of the memory cell AMref[2] is I AMref[2],0 Similarly, when AMref[2],0 can be expressed by the following formula:

[0211]

number

[0212] <<From time T04 to time T05>> Here, the current flowing through the wiring BL and the wiring BLref from time T04 to time T05 will be described.

[0213] A current is supplied to the wiring BLref from the current source circuit CS. In addition, a current is discharged to the wiring BLref by the current mirror circuit CM, the memory cell AMref[1], and the memory cell AMref[2]. The current supplied from the current source circuit CS to the wiring BLref is represented as I Cref The current drawn by the current mirror circuit CM is I CM,0 Then, the following equation holds according to Kirchhoff's law:

[0214]

number

[0215] The current supplied from the current source circuit CS to the wiring BL is I C,0 Let I be the current flowing from the wiring BL to the circuit OFST. α,0 Then, the following equation holds according to Kirchhoff's law:

[0216]

number

[0217] <<From time T05 to time T06>> Between time T05 and time T06, the line CL[1] is charged to a potential higher than the reference potential V X[1] At this time, a potential V X[1] is applied, the potential of the gate of the transistor Tr12 increases.

[0218] In addition, the potential V x[1]is a potential corresponding to one of the second data.

[0219] The increase in the potential of the gate of the transistor Tr12 is the potential obtained by multiplying the change in the potential of the wiring CL[1] by a capacitance coupling coefficient determined by the configuration of the memory cell. The capacitance coupling coefficient is calculated by the capacitance of the capacitance element C1, the gate capacitance of the transistor Tr2, and the parasitic capacitance. In this operation example, to avoid complexity of explanation, the increase in the potential of the wiring CL[1] and the increase in the potential of the gate of the transistor Tr12 are described as having the same value. This is equivalent to the capacitance coupling coefficient of each of the memory cell AM[1] and the memory cell AMref[1] being set to 1.

[0220] Since the capacitive coupling coefficient is set to 1, a potential V X[1] When this voltage is applied, the potentials of the nodes NM[1] and NMref[1] become V X[1] to rise.

[0221] Here, consider the current flowing from the second terminal to the first terminal of the transistor Tr12 of each of the memory cells AM[1] and AMref[1]. Let I AM[1],1 Then, I AM[1],1 can be expressed by the following formula:

[0222]

number

[0223] In other words, the potential V X[1] By applying the voltage Vcc, the current flowing from the line BL to the first terminal of the transistor Tr12 in the memory cell AM[1] via the second terminal is I AM[1],1 -I AM[1],0 (In Figure 11, ΔI AM[1] ) increases.

[0224] Similarly, the current flowing from the wiring BLref to the first terminal via the second terminal of the transistor Tr12 of the memory cell AMref[1] is I AMref[1],1 Then, I AMref[1],1 can be expressed by the following formula:

[0225]

number

[0226] In other words, the potential V X[1] By applying the voltage Vcc, the current flowing from the wiring BLref to the first terminal of the transistor Tr12 of the memory cell AMref[1] via the second terminal is I AMref[1],1 -I AMref[1],0 (In Figure 11, ΔI AMref[1] ) increases.

[0227] The current discharged by the current mirror circuit CM in the wiring BLref is I CM,1 Then, the following equation holds according to Kirchhoff's law:

[0228]

number

[0229] In the wiring BL, the current flowing from the wiring BL to the circuit OFST is I α,1 Then, the following equation holds according to Kirchhoff's law:

[0230]

number

[0231] Between time T04 and time T05, the current I flows from the wiring BL to the wiring OFST. α,0 and the current I flowing from the wiring BL to the wiring OFST between time T05 and time T06. α,1 The difference between and is ΔI α Hereafter, ΔIα is called the differential current in the multiply-accumulate circuit MAC. α can be expressed as follows using equations (E1) to (E10):

[0232]

number

[0233] <<From time T06 to time T07>> Between time T06 and time T07, the ground potential is applied to the line CL[1]. At this time, the ground potential is applied to the second terminals of the capacitive elements C1 of the memory cells AM[1] and AMref[1], so that the potentials of the nodes NM[1] and NMref[1] return to the potentials between time T04 and time T05.

[0234] <<From time T07 to time T08>> Between time T07 and time T08, the line CL[1] is charged to a potential higher than the reference potential V X[1] A higher potential is applied, and the line CL[2] is V higher than the reference potential. X[2] At this time, a high potential is applied to the second terminal of the capacitive element C1 of each of the memory cells AM[1] and AMref[1]. X[1] is applied to the second terminal of the capacitive element C1 of each of the memory cells AM[2] and AMref[2], and a potential V X[2] As a result, the potential of the gate of the transistor Tr12 in each of the memory cell AM[1], the memory cell AM[2], the memory cell AMref[1], and the memory cell AMref[2] rises.

[0235] The current flowing from the wiring BL to the first terminal through the second terminal of the transistor Tr12 of the memory cell AM[2] is I AM[2],1 Then, I AM[2],1 can be expressed by the following formula:

[0236]

number

[0237] Similarly, the current flowing from the wiring BLref to the first terminal through the second terminal of the transistor Tr12 of the memory cell AMref[2] is I AMref[2],1 Then, I AMref[2],1 can be expressed by the following formula:

[0238]

number

[0239] The current discharged by the current mirror circuit CM in the wiring BLref is I CM,2 Then, the following equation holds according to Kirchhoff's law:

[0240]

number

[0241] In the wiring BL, the current flowing from the wiring BL to the circuit OFST is I α,3 Then, the following equation holds according to Kirchhoff's law:

[0242]

number

[0243] Between time T04 and time T05, the current I flows from the wiring BL to the wiring OFST. α,0 and the current I flowing from the wiring BL to the wiring OFST between time T07 and time T08. α,3 The difference between the current and the current difference ΔI α can be expressed as follows using formulas (E1) to (E8) and (E12) to (E15).

[0244]

number

[0245] As shown in equation (E16), the differential current ΔI α is a plurality of first data, i.e., potentials V w and a plurality of second data potentials V x In other words, the differential current ΔI α By measuring this with the circuit OFST, the value of the sum of products of the first data and the second data can be obtained.

[0246] <<From time T08 to time T09>> Between time T08 and time T09, the reference potential is applied to the wiring CL[1] and the wiring CL[2]. At this time, the reference potential is applied to the second terminal of the capacitance element C1 of each of the memory cell AM[1], the memory cell AM[2], the memory cell AMref[1], and the memory cell AMref[2], so that the potentials of the nodes NM[1], NM[2], NMref[1], and NMref[2] return to the potentials between time T06 and time T07.

[0247] Between time T05 and time T06, V W[1] Between time T07 and time T08, V is applied to the wiring CL[1] and the wiring CL[2]. x[1] , V x[2] However, the potential applied to the wiring CL[1] and the wiring CL[2] may be lower than the reference potential REFP. When a potential lower than the reference potential REFP is applied to the wiring CL[1] and / or the wiring CL[2], the potential of the retention node of the memory cell connected to the wiring RW[1] and / or the wiring CL[2] can be lowered by capacitive coupling. This makes it possible to multiply the first data by the negative value of the second data in a product-sum operation. For example, between time T07 and time T08, when V x[2] Not -V x[2] When the differential current ΔI α can be expressed as the following formula:

[0248]

number

[0249] In this operation example, the memory cell array CA having memory cells arranged in a matrix of 2 rows and 2 columns is treated, but the product-sum operation can be performed in the same manner for a memory cell array with 1 row and 2 or more columns, or a memory cell array with 3 or more rows and 3 or more columns. In this case, the product-sum operation circuit supplies one of the columns with reference data (potential V PR ), it is possible to simultaneously perform the sum-of-products operation for the remaining number of columns among the multiple columns. In other words, by increasing the number of columns in the memory cell array, it is possible to provide an arithmetic circuit that realizes high-speed sum-of-products operation. Also, by increasing the number of rows, it is possible to increase the number of terms to be added in the sum-of-products operation. When the number of rows is increased, the difference current ΔI α can be expressed by the following formula:

[0250]

number

[0251] Incidentally, in the product-sum operation circuit described in this embodiment, the number of rows of the memory cells AM is the number of neurons in the previous layer. In other words, the number of rows of the memory cells AM corresponds to the number of output signals of the neurons in the previous layer that are input to the next layer. And the number of columns of the memory cells AM is the number of neurons in the next layer. In other words, the number of columns of the memory cells AM corresponds to the number of output signals of the neurons that are output from the next layer. In other words, the number of rows and columns of the memory cell array of the product-sum operation circuit are determined by the number of neurons in the previous layer and the next layer, so that the number of rows and columns of the memory cell array may be determined and designed according to the neural network to be configured.

[0252] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes.

[0253] (Embodiment 4) This embodiment describes an example of a structure that can be applied to a power storage system of one embodiment of the present invention.

[0254] [Cylindrical secondary battery] An example of a cylindrical secondary battery will be described with reference to Fig. 14(A). As shown in Fig. 14(A), a cylindrical secondary battery 400 has a positive electrode cap (battery lid) 401 on the top surface, and a battery can (external can) 402 on the side and bottom surfaces. The positive electrode cap 401 and the battery can (external can) 402 are insulated by a gasket (insulating packing) 410.

[0255] Since the positive and negative electrodes used in a cylindrical secondary battery are wound, it is preferable to form active materials on both sides of the current collector. A positive electrode terminal (positive electrode current collector lead) 403 is connected to the positive electrode 404, and a negative electrode terminal (negative electrode current collector lead) 407 is connected to the negative electrode 406. Both the positive electrode terminal 403 and the negative electrode terminal 407 can be made of a metal material such as aluminum. The negative electrode terminal 407 is welded to the bottom of the battery can 402. The positive electrode terminal 403 is welded to a conductive plate 419, and is electrically connected to the positive electrode cap 401 via an explosion-proof plate 412 and a PTC (Positive Temperature Coefficient) element 411. The PTC element 411 is a thermosensitive resistor element whose resistance increases when the temperature rises, and the increase in resistance limits the amount of current to prevent abnormal heat generation. The PTC element is made of barium titanate (BaTiO 3 )-based semiconductor ceramics, etc. can be used.

[0256] 14B illustrates an example of a power storage system 415. The power storage system 415 includes a plurality of secondary batteries 400. A positive electrode of each secondary battery is in contact with and electrically connected to a conductor 424 separated by an insulator 425. The conductor 424 is electrically connected to a control system 420 through a wiring 423. A negative electrode of each secondary battery is electrically connected to the control system 420 through a wiring 426. The control system described in the above embodiment can be used as the control system 420.

[0257] 14C shows an example of a power storage system 415. The power storage system 415 has a plurality of secondary batteries 400, and the plurality of secondary batteries 400 are sandwiched between a conductive plate 413 and a conductive plate 414. The plurality of secondary batteries 400 are electrically connected to the conductive plate 413 and the conductive plate 414 by wiring 416. The plurality of secondary batteries 400 may be connected in parallel, may be connected in series, or may be connected in parallel and then further connected in series. By configuring the power storage system 415 having a plurality of secondary batteries 400, it is possible to extract a large amount of power.

[0258] A temperature control device may be provided between the multiple secondary batteries 400. When the secondary batteries 400 are overheated, they can be cooled by the temperature control device, and when the secondary batteries 400 are too cold, they can be heated by the temperature control device. Therefore, the performance of the power storage system 415 is less susceptible to the effect of the outside air temperature.

[0259] 14C, the power storage system 415 is electrically connected to a control system 420 through a wiring 421 and a wiring 422. The control system described in any of the above embodiments can be used as the control system 420. The wiring 421 is electrically connected to positive electrodes of the secondary batteries 400 through a conductive plate 413, and the wiring 422 is electrically connected to negative electrodes of the secondary batteries 400 through a conductive plate 414.

[0260] [Secondary battery pack] Next, an example of a power storage system of one embodiment of the present invention will be described with reference to FIG.

[0261] Fig. 15(A) is a diagram showing the appearance of secondary battery pack 530. Fig. 15(B) is a diagram explaining the configuration of secondary battery pack 530. Secondary battery pack 530 has a circuit board 500 and a secondary battery 513. A label 510 is attached to secondary battery 513. Circuit board 500 is fixed by a sticker 515. Secondary battery pack 530 also has an antenna 514.

[0262] The circuit board 500 has a control system 590. The control system shown in the previous embodiment can be used as the control system 590. For example, as shown in FIG. 15(B), the control system 590 is provided on the circuit board 500. The circuit board 500 is also electrically connected to a terminal 511. The circuit board 500 is also electrically connected to an antenna 514, one 551 of a positive electrode lead and a negative electrode lead of a secondary battery 513, and the other 552 of a positive electrode lead and a negative electrode lead.

[0263] 15C, a circuit system 590a provided on a circuit board 500 and a circuit system 590b electrically connected to the circuit board 500 via a terminal 511 may be provided. For example, a part of a control system according to one embodiment of the present invention is provided in the circuit system 590a, and another part is provided in the circuit system 590b. More specifically, for example, the protection circuit 137 described in the above embodiment is provided in the circuit system 590a, and the circuit 171, the circuit 172, the control circuit 134, and the memory 132 described in the above embodiment are provided in the circuit system 590b.

[0264] The antenna 514 is not limited to a coil shape, and may be, for example, a wire shape or a plate shape. In addition, antennas such as a planar antenna, an aperture antenna, a traveling wave antenna, an EH antenna, a magnetic field antenna, and a dielectric antenna may be used. Alternatively, the antenna 914 may be a flat conductor. This flat conductor can function as one of the conductors for electric field coupling. In other words, the antenna 914 may function as one of the two conductors of a capacitor. This allows power to be exchanged not only by electromagnetic fields and magnetic fields, but also by electric fields.

[0265] The secondary battery pack 530 has a layer 516 between the antenna 514 and the secondary battery 513. The layer 516 has a function of, for example, shielding an electromagnetic field caused by the secondary battery 513. The layer 516 can be made of, for example, a magnetic material.

[0266] 15(C), the secondary battery 513 has a wound battery element 593. The battery element 593 has a negative electrode 594, a positive electrode 595, and a separator 596. The battery element 593 is formed by stacking the negative electrode 594 and the positive electrode 595 with the separator 596 sandwiched therebetween, and winding the laminated sheet.

[0267] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes.

[0268] (Embodiment 5) In this embodiment, an example in which a power storage system according to one embodiment of the present invention is mounted on a vehicle will be described. Examples of vehicles include automobiles, motorcycles, and bicycles.

[0269] By installing an electricity storage system in a vehicle, next-generation clean energy vehicles such as hybrid electric vehicles (HEVs), electric vehicles (EVs), and plug-in hybrid electric vehicles (PHEVs) can be realized.

[0270] 16A and 16B illustrate a vehicle using a power storage system according to one embodiment of the present invention. An automobile 8400 shown in FIG. 16A is an electric automobile using an electric motor as a power source for running. Alternatively, the automobile 8400 is a hybrid automobile in which an electric motor and an engine can be appropriately selected and used as a power source for running. By using one embodiment of the present invention, a vehicle with a long cruising distance can be realized. The automobile 8400 includes a power storage system. The power storage system not only drives an electric motor 8406 but also supplies power to a light-emitting device such as a headlight 8401 or a room light (not shown).

[0271] The power storage system can also supply power to display devices such as a speedometer and a tachometer included in the automobile 8400. The power storage system can also supply power to a navigation system included in the automobile 8400.

[0272] The automobile 8500 shown in FIG. 16(B) can be charged by receiving power supply from an external charging facility to a power storage system 8024 of the automobile 8500 by a plug-in method, a non-contact power supply method, or the like. FIG. 16(B) shows a state in which charging is being performed from a ground-mounted charging device 8021 to a power storage system 8024 mounted on the automobile 8500 via a cable 8022. When charging, the charging method and connector standards may be appropriately performed by a predetermined method such as CHAdeMO (registered trademark) or Combo. The charging device 8021 may be a charging station installed in a commercial facility, or may be a home power source. For example, the power storage system 8024 mounted on the automobile 8500 can be charged by an external power supply by plug-in technology. Charging can be performed by converting AC power to DC power via a conversion device such as an AC-DC converter.

[0273] Although not shown, a power receiving device may be mounted on a vehicle, and charging may be performed by supplying power contactlessly from a ground power transmitting device. In the case of this contactless power supply method, by incorporating a power transmitting device in a road or an exterior wall, charging may be performed not only while the vehicle is stopped but also while the vehicle is moving. This contactless power supply method may also be used to transmit and receive power between vehicles. Furthermore, a solar cell may be provided on the exterior of the vehicle, and the power storage system may be charged while the vehicle is stopped or moving. An electromagnetic induction method or a magnetic resonance method may be used for such contactless power supply.

[0274] 16C shows an example of a two-wheeled vehicle using the power storage system of one embodiment of the present invention. A scooter 8600 shown in FIG. 16C includes a power storage system 8602, a side mirror 8601, and a turn signal light 8603. The power storage system 8602 can supply electricity to the turn signal light 8603.

[0275] 16(C) can store the power storage system 8602 in the under-seat storage 8604. The power storage system 8602 can be stored in the under-seat storage 8604 even if the under-seat storage 8604 is small.

[0276] 17A is an example of an electric bicycle using the power storage system of one embodiment of the present invention. The power storage system of one embodiment of the present invention can be applied to an electric bicycle 8700 shown in FIG 17A. The power storage system of one embodiment of the present invention includes, for example, a plurality of storage batteries, a protection circuit, and a neural network.

[0277] The electric bicycle 8700 includes a power storage system 8702. The power storage system 8702 can supply electricity to a motor that assists a rider. The power storage system 8702 is portable and is shown in a state removed from the bicycle in FIG. 17B. The power storage system 8702 includes a plurality of built-in storage batteries 8701 of the power storage system of one embodiment of the present invention, and the remaining battery charge and the like can be displayed on a display unit 8703. The power storage system 8702 also includes a control system 8704 of one embodiment of the present invention. The control system 8704 is electrically connected to the positive and negative electrodes of the storage batteries 8701. The control system described in the above embodiment can be used as the control system 8704.

[0278] The storage battery of the power storage system mounted on the automobile 8400 shown in FIG. 16A will be described in more detail with reference to FIG. 18A. The automobile 8400 preferably has a plurality of secondary batteries. If an IC incorporating a life estimation unit is mounted as a protection circuit for the secondary batteries, neural network processing for controlling the secondary batteries can be performed. Even in the automobile 8400 using 1000 or more secondary batteries, neural network processing for controlling the secondary batteries can be efficiently performed. The secondary batteries may be a number of small cylindrical secondary batteries arranged on the floor of the automobile. A battery pack combining a plurality of laminated secondary batteries may be installed on the floor of the automobile. The automobile 8400 may have a photoelectric conversion element 8405 on the ceiling. Light irradiated to the photoelectric conversion element 8405 can be photoelectrically converted and stored in the battery pack 8402. The automobile 8400 also has a sensor 8407. The sensor 8407 has a function of measuring the temperature of the air outside the automobile 8400. In this specification and the like, the temperature of the air outside the automobile 8400 may be referred to as the outside air temperature. Also, the sensor 8407 may be referred to as the outside air temperature sensor.

[0279] The vehicles shown in FIG. 16, FIG. 17(A), and FIG. 18(A) can be equipped with a navigation system. The navigation system preferably includes the control system described in the above embodiment. FIG. 18(B) shows the interior of an automobile 8400. The navigation system includes a display unit 8411 and a microphone. The display unit 8411 preferably includes a touch sensor. A user of the navigation system can input information by inputting to the touch sensor of the display unit 8411 and by voice input to the microphone. The windshield 8404 and the side mirror 8403 may each include a display unit. The navigation system 8411 can display information on one or more of the display unit 8407, the display unit of the windshield 8404, and the display unit of the side mirror 8403.

[0280] An example of using a mobile phone 8412 as a navigation system is shown in Fig. 18C. An enlarged view of a display portion 8413 of the mobile phone 8412 is shown in Fig. 18D.

[0281] An example of the operation of a navigation system installed in a vehicle will be described with reference to FIG.

[0282] In step S300, the process starts.

[0283] In step S301, a user of the navigation system inputs destination information into the navigation system.

[0284] In step S302, the navigation system calculates the average value, integrated value, maximum value, etc. of the discharge output up to the destination. Also, the remaining capacity (RC) and impedance Z of the storage battery are acquired. Measuring the impedance Z may take time. Also, the impedance Z may be measured by electrically connecting an external measuring device. Therefore, it is preferable to use a value acquired in advance for the impedance Z. For example, of the measured impedance Z values, a value measured within one week, within one month, or within three months is used.

[0285] In step S303, the navigation system estimates the dischargeable capacity C(x) corresponding to the discharge power P(x) based on the outside air temperature To, the remaining capacity (RC) and the impedance Z. For example, the navigation system estimates the dischargeable capacity C(1) to C(n) corresponding to any discharge power P(1) to P(n) (where n is an integer of 2 or more). Here, the discharge power P is not necessarily a constant value, and its value changes along the traveled route.

[0286] In step S304, the navigation system estimates the remaining driving distance L(x) using the dischargeable capacity C(x) calculated in step S303.

[0287] In step S305, it is estimated whether it is possible to reach a charging spot after reaching the destination. Specifically, a charging spot is searched for where the length of the route from the current location is shorter than L(x) and the destination is included on the route from the current location. If a charging spot that meets the conditions (called charging spot E(a)) is found, the process proceeds to step S306, and if not, the process proceeds to step S311. Step S311 is a connector d that connects to step S312 shown in FIG. 20.

[0288] In step S306, the navigation system starts guidance to the destination, or the navigation system may start controlling the traveling of the vehicle to reach the destination.

[0289] The process ends in step S309. After the vehicle reaches the destination, it is preferable that the vehicle stops at the charging spot E(a) to charge the storage battery.

[0290] Next, an example of the operation of the navigation system installed in a vehicle will be described with reference to FIG.

[0291] Step 311 is a connector d that connects from step S305 shown in FIG. 19, and the process proceeds to step S312.

[0292] In step S312, the navigation system searches for a charging spot located on the route from the current location to the destination, and if a charging spot is found on the route, the system proceeds to step S313, and if not, the system proceeds to step S321.

[0293] In step S313, the navigation system acquires location information for each of E(y) located on the route from the current location to the destination, for example, location information for charging spots E(1) to E(m) (where m is an integer equal to or greater than 1).

[0294] In step S314, the path length L(y) from the current location to the charging spot E(y) is calculated.

[0295] In step S315, if there is a combination of E(y) and P(x) that satisfies L(y) < L(x), the process proceeds to step S316; otherwise, it proceeds to step S21.

[0296] In step S316, the navigation system displays a combination of E(y) and P(x) that satisfies L(y) < L(x). Here, the numerical value of P(x) may be displayed, or a name corresponding to P(x) may be assigned and the name may be displayed. For example, names such as "High Output Mode" with high output and "Power Saving Mode" with low output are displayed.

[0297] When proceeding to step S321, in step S321, the navigation system displays a message asking the user to change the destination on the display unit. Next, the process proceeds to step S322. Step S322 is a connector e that joins to step S301 in FIG. 19, and in step S301, the user reselects the destination.

[0298] Next, in step S317, if there are multiple combinations of E(y) and P(x), the user selects one from among the multiple combinations of E(y) and P(x) displayed on the display unit.

[0299] In step S318, the navigation system starts guidance based on the combination of E(y) and P(x) selected in step S313. Alternatively, the navigation system may start controlling the vehicle's travel to reach the destination.

[0300] In step S319, the process ends.

[0301] This embodiment can be appropriately combined with the descriptions of other embodiments.

[0302] (Embodiment 6) In this embodiment, an example in which the power storage system described in the above embodiment is mounted on an electronic device will be described.

[0303] Next, an example of a tablet terminal that can be folded in two is shown in Fig. 21(A) and Fig. 21(B). The tablet terminal 9600 shown in Fig. 21(A) and Fig. 21(B) has a housing 9630a, a housing 9630b, a movable part 9640 that connects the housings 9630a and 9630b, a display part 9631, a display mode changeover switch 9626, a power switch 9627, a power saving mode changeover switch 9625, a fastener 9629, and an operation switch 9628. By using a flexible panel for the display part 9631, a tablet terminal having a wider display part can be obtained. Fig. 21(A) shows the tablet terminal 9600 in an open state, and Fig. 21(B) shows the tablet terminal 9600 in a closed state.

[0304] The tablet terminal 9600 further includes a power storage unit 9635 inside the housing 9630a and the housing 9630b. The power storage unit 9635 passes through the movable portion 9640 and is provided across the housings 9630a and 9630b.

[0305] A part of the display portion 9631 can be a touch panel area, and data can be input by touching the displayed operation keys. Also, keyboard buttons can be displayed on the display portion 9631 by touching a position on the touch panel where a keyboard display switching button is displayed with a finger or a stylus.

[0306] Furthermore, the display mode changeover switch 9626 can change the display orientation, such as portrait or landscape, and can select black and white or color display. The power saving mode changeover switch 9625 can optimize the display brightness according to the amount of external light during use detected by an optical sensor built into the tablet terminal 9600. The tablet terminal may be equipped with not only an optical sensor, but also other detection devices such as a gyro, an acceleration sensor, or other sensors that detect tilt.

[0307] 21B shows a tablet terminal in a closed state, which includes a housing 9630, a solar cell 9633, and the power storage system of one embodiment of the present invention. The power storage system includes a control system 9634 and a power storage unit 9635. The control system 9634 includes a protection circuit 9639 and a charge / discharge control circuit 9638 including a DC-DC converter 9636. The control system 9634 can be the control system described in the above embodiment. The charge / discharge control circuit 9638 includes, for example, the control circuit 134 described in the above embodiment.

[0308] Note that the tablet terminal 9600 can be folded in half, so that the housing 9630a and the housing 9630b can be folded together when not in use. By folding, the display portion 9631 can be protected, thereby improving durability of the tablet terminal 9600.

[0309] In addition, the tablet terminals shown in Figures 21(A) and 21(B) can have a function to display various information (still images, videos, text images, etc.), a function to display a calendar, date or time on the display unit, a touch input function to perform touch input operations or edit information displayed on the display unit, and a function to control processing using various software (programs), etc.

[0310] A solar cell 9633 attached to the surface of the tablet terminal can supply power to a touch panel, a display unit, a video signal processor, or the like. Note that the solar cell 9633 can be provided on one or both sides of the housing 9630, and a configuration can be adopted in which the power storage unit 9635 can be efficiently charged.

[0311] 21C shows a block diagram of the configuration and operation of the control system 9634 shown in Fig. 21B. Fig. 21C shows a solar cell 9633, a power storage unit 9635, a DCDC converter 9636, a converter 9637, switches SW1 to SW3, and a display unit 9631. The DCDC converter 9636, the converter 9637, and the switches SW1 to SW3 correspond to the charge and discharge control circuit 9638 shown in Fig. 21B, and the charge and discharge control circuit 9638 and the protection circuit 9639 correspond to the control circuit 9634.

[0312] First, an example of operation in the case where power is generated by the solar cell 9633 using external light will be described. The power generated by the solar cell is stepped up or stepped down by a DC-DC converter 9636 to a voltage for charging the power storage unit 9635. When power from the solar cell 9633 is used for the operation of the display unit 9631, a switch SW1 is turned on, and the converter 9637 steps up or steps down the voltage to a voltage required for the display unit 9631. When no display is to be performed on the display unit 9631, SW1 is turned off and SW2 is turned on to charge the power storage unit 9635.

[0313] Note that the solar cell 9633 is shown as an example of a power generating means, but is not particularly limited thereto, and may be configured to charge the power storage unit 9635 using other power generating means such as a piezoelectric element (piezo element) or a thermoelectric conversion element (Peltier element). For example, a non-contact power transmission module that transmits and receives power wirelessly (non-contact) for charging, or a combination with other charging means may be used.

[0314] FIG. 22 illustrates an example of another electronic device. In FIG. 22, a display device 8000 is an example of an electronic device in which the power storage system of one embodiment of the present invention is implemented. Specifically, the display device 8000 corresponds to a display device for receiving TV broadcasts and includes a housing 8001, a display unit 8002, a speaker unit 8003, a secondary battery 8004, and the like. A detection system according to one embodiment of the present invention is provided inside the housing 8001. The display device 8000 can receive power from a commercial power source or can use power stored in the secondary battery 8004.

[0315] The display unit 8002 can be a liquid crystal display device, a light-emitting device having a light-emitting element such as an organic EL element in each pixel, an electrophoretic display device, a semiconductor display device such as a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), or an FED (Field Emission Display).

[0316] The voice input device 8005 also uses a secondary battery. The voice input device 8005 has the power storage system described in the above embodiment. The voice input device 8005 has a plurality of sensors including a microphone (optical sensor, temperature sensor, humidity sensor, air pressure sensor, illuminance sensor, motion sensor, and the like) in addition to wireless communication elements, and can perform power control of other devices, such as the display device 8000, or light adjustment of the lighting device 8100, in response to verbal commands from the user. The voice input device 8005 can operate peripheral devices by voice, and can serve as a substitute for a manual remote control.

[0317] In addition, the voice input device 8005 has wheels or mechanical movement means, and moves in the direction in which the user's voice can be heard, accurately picking up commands using a built-in microphone and displaying the contents on the display unit 8008, or allowing touch input operations to be performed on the display unit 8008.

[0318] The voice input device 8005 can also function as a charging dock for a mobile information terminal 8009 such as a smartphone. The mobile information terminal 8009 and the voice input device 8005 can exchange power by wire or wirelessly. The mobile information terminal 8009 does not need to be carried around indoors, and it is desirable to ensure the required capacity while avoiding deterioration due to a load on the secondary battery, so that the voice input device 8005 can perform management and maintenance of the secondary battery. In addition, since the voice input device 8005 has a speaker 8007 and a microphone, it is possible to have a hands-free conversation even when the mobile information terminal 8009 is charging. In addition, if the capacity of the secondary battery of the voice input device 8005 decreases, it is sufficient to move in the direction of the arrow and charge it wirelessly from a charging module 8010 connected to an external power source.

[0319] The voice input device 8005 may be placed on a stand. The voice input device 8005 may be provided with wheels or a mechanical moving means so that it can be moved to a desired position, or the voice input device 8005 may be fixed to a desired position, for example, on a floor, without being provided with a stand or wheels.

[0320] The display device includes all display devices for displaying information, such as display devices for receiving TV broadcasts, display devices for personal computers, display devices for advertisements, and the like.

[0321] 22, a stationary lighting device 8100 is an example of an electronic device using a secondary battery 8103 controlled by a microprocessor (including APS) that controls charging. Specifically, the lighting device 8100 has a housing 8101, a light source 8102, a secondary battery 8103, and the like. FIG. 22 illustrates a case in which the secondary battery 8103 is provided inside a ceiling 8104 on which the housing 8101 and the light source 8102 are installed, but the secondary battery 8103 may be provided inside the housing 8101. The lighting device 8100 can receive power from a commercial power source, and can also use power stored in the secondary battery 8103.

[0322] Although Figure 22 shows an example of a stationary lighting device 8100 installed on a ceiling 8104, the secondary battery 8103 can also be used in a stationary lighting device installed on something other than the ceiling 8104, such as a side wall 8105, a floor 8106, or a window 8107, or can also be used in a table-top lighting device, etc.

[0323] An artificial light source that artificially obtains light using electric power can be used as the light source 8102. Specifically, examples of the artificial light source include discharge lamps such as incandescent lamps and fluorescent lamps, and light-emitting elements such as LEDs and organic EL elements.

[0324] 22, an air conditioner having an indoor unit 8200 and an outdoor unit 8204 is an example of an electronic device using a secondary battery 8203. Specifically, the indoor unit 8200 has a housing 8201, an air outlet 8202, a secondary battery 8203, and the like. FIG. 22 illustrates an example in which the secondary battery 8203 is provided in the indoor unit 8200, but the secondary battery 8203 may be provided in the outdoor unit 8204. Alternatively, the secondary battery 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204. The air conditioner can receive power from a commercial power source, or can use power stored in the secondary battery 8203.

[0325] 22, an electric refrigerator-freezer 8300 is an example of an electronic device using a secondary battery 8304. Specifically, the electric refrigerator-freezer 8300 includes a housing 8301, a door for a refrigerator compartment 8302, a door for a freezer compartment 8303, and a secondary battery 8304. In FIG. 22, the secondary battery 8304 is provided inside the housing 8301. The electric refrigerator-freezer 8300 can receive power from a commercial power source, and can also use power stored in the secondary battery 8304.

[0326] Also, by storing power in the secondary battery during time periods when electronic devices are not used, particularly during time periods when the ratio of the amount of power actually used to the total amount of power that can be supplied by the commercial power source (called the power usage rate) is low, it is possible to prevent the power usage rate from increasing outside of the above time periods. For example, in the case of an electric refrigerator-freezer 8300, power is stored in the secondary battery 8304 during the night when the temperature is low and the refrigerator door 8302 and the freezer door 8303 are not opened or closed. Then, during the daytime when the temperature is high and the refrigerator door 8302 and the freezer door 8303 are opened and closed, the secondary battery 8304 is used as an auxiliary power source, thereby making it possible to keep the daytime power usage rate low.

[0327] In addition to the electronic devices described above, the secondary battery can be mounted on any electronic device. According to one embodiment of the present invention, the cycle characteristics of the secondary battery are improved. Therefore, by mounting a microprocessor (including an APS) that controls charging, which is one embodiment of the present invention, on the electronic device described in this embodiment, the electronic device can have a longer life. This embodiment can be implemented in appropriate combination with other embodiments.

[0328] 23A to 23E show examples of electronic devices that use the power storage system of one embodiment of the present invention. Examples of electronic devices to which the power storage system of one embodiment of the present invention is applied include television devices (also referred to as televisions or television receivers), monitors for computers, digital cameras, digital video cameras, digital photo frames, mobile phones (also referred to as mobile phones or mobile phone devices), portable game machines, personal digital assistants, audio playback devices, and large game machines such as pachinko machines.

[0329] 23A illustrates an example of a mobile phone. The mobile phone 7400 includes a display portion 7402 built into a housing 7401, an operation button 7403, an external connection port 7404, a speaker 7405, a microphone 7406, and the like. Note that the mobile phone 7400 includes a power storage system of one embodiment of the present invention. The power storage system of one embodiment of the present invention includes, for example, a storage battery 7407 and the control system described in the above embodiment. The control system preferably includes, for example, a protection circuit, a control circuit, a neural network, and the like.

[0330] FIG. 23B shows a state in which the mobile phone 7400 is bent. When the mobile phone 7400 is deformed by an external force and bent as a whole, the storage battery 7407 provided therein may also be bent. In such a case, it is preferable to use a flexible storage battery as the storage battery 7407. FIG. 23C shows a bent state of the flexible storage battery. A control system 7408 is electrically connected to the storage battery. The control system described in the above embodiment can be used as the control system 7408.

[0331] In addition, a storage battery having a flexible shape can be installed along the curved surfaces of the inner or outer walls of a house or building, or the interior or exterior of an automobile.

[0332] 23D illustrates an example of a bangle-type display device. A portable display device 7100 includes a housing 7101, a display portion 7102, an operation button 7103, and a power storage system of one embodiment of the present invention. The power storage system of one embodiment of the present invention includes, for example, a storage battery 7104 and the control system described in the above embodiment. The control system preferably includes, for example, a protection circuit, a control circuit, a neural network, and the like.

[0333] 23E shows an example of a wristwatch-type portable information terminal. A portable information terminal 7200 includes a housing 7201, a display portion 7202, a band 7203, a buckle 7204, operation buttons 7205, an input / output terminal 7206, and the like.

[0334] The portable information terminal 7200 can execute various applications such as mobile telephone, e-mail, document browsing and creation, music playback, Internet communication, and computer games.

[0335] The display surface of the display portion 7202 is curved, and display can be performed along the curved display surface. The display portion 7202 is also provided with a touch sensor, and can be operated by touching the screen with a finger, a stylus, or the like. For example, an application can be started by touching an icon 7207 displayed on the display portion 7202.

[0336] The operation button 7205 can have various functions, such as time setting, power on / off operation, wireless communication on / off operation, silent mode activation / cancellation, power saving mode activation / cancellation, etc. For example, the function of the operation button 7205 can be freely set by an operating system built into the mobile information terminal 7200.

[0337] The mobile information terminal 7200 can also perform short-distance wireless communication according to a communication standard. For example, the mobile information terminal 7200 can communicate with a wireless headset to enable hands-free calling.

[0338] The portable information terminal 7200 also includes an input / output terminal 7206, and can directly exchange data with other information terminals via a connector. Charging can also be performed via the input / output terminal 7206. Note that charging may be performed by wireless power supply without using the input / output terminal 7206.

[0339] The portable information terminal 7200 includes a power storage system according to one embodiment of the present invention. The power storage system includes a storage battery and the control system described in the above embodiment. The control system preferably includes, for example, a protection circuit, a control circuit, a neural network, and the like.

[0340] The portable information terminal 7200 preferably has a sensor. For example, it is preferable to mount a human body sensor such as a fingerprint sensor, a pulse sensor, or a body temperature sensor, a touch sensor, a pressure sensor, an acceleration sensor, or the like, as the sensor.

[0341] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes. [Explanation of symbols]

[0342] ACTV: circuit, BL: wiring, BLref: wiring, C_1: capacitance element, C_h: capacitance element, C_n: capacitance element, C1: capacitance element, C2: capacitance element, CL: convolution layer, CL[1]: wiring, CL[2]: wiring, CLD circuit, CM: current mirror circuit, CS: current source circuit, HL: hidden layer, HN: neuron circuit, HS: hidden synapse circuit, IE: wiring, IEref: wiring, IL: input layer, MAC: multiply-accumulate circuit, NC: neuron circuit, OFST: circuit, OE: wiring, OL: output layer, ON: neuron circuit, OS: synapse circuit, R_1: resistor, R_h: resistor, R_n: resistor, Ro: resistor, RST: wiring, RW: wiring, SC: synapse circuit, SW1: switch, SW2: switch, SW3: switch, Tr2: transistor transistor, Tr11: transistor, Tr12: transistor, Tr21: transistor, Tr22: transistor, Tr23: transistor, VaL: wiring, VbL: wiring, VDDL: wiring, VrefL: wiring, VSSL wiring, VR: wiring, W_1: resistor, WD: wiring, WDref: wiring, WL: wiring, WDD: circuit, WLD: circuit, 130: power storage system, 131: control system, 131_j: control system, 132: memory, 134: control circuit, 135: storage battery, 135_1: storage battery, 135_k: Storage battery, 135_n: storage battery, 136: battery group, 136_j: battery group, 137: protection circuit, 147: transistor, 148: transistor, 171: circuit, 172: circuit, 174: thermistor, 176: fuse, 400: secondary battery, 401: positive electrode cap, 402: battery can, 403: positive electrode terminal, 404: positive electrode, 406: negative electrode, 407: negative electrode terminal, 411: PTC element, 412: explosion-proof plate, 413: conductive plate, 414: conductive plate, 415: power storage system, 416: wire, 419: conductive plate, 420: control system , 421: wiring, 422: wiring, 423: wiring, 424: conductor, 425: insulator, 426: wiring, 500: circuit board, 510: label, 511: terminal, 512: semiconductor layer, 513: secondary battery, 514: antenna, 515: seal, 516: layer, 530: secondary battery pack, 551: one side, 552: other side, 590: control system, 590a: circuit system, 590b: circuit system, 593: battery element, 594: negative electrode, 595: positive electrode, 596: separator, 914: antenna, 7100: portable display device,7101: housing, 7102: display unit, 7103: operation button, 7104: storage battery, 7200: mobile information terminal, 7201: housing, 7202: display unit, 7203: band, 7204: buckle, 7205: operation button, 7206: input / output terminal, 7207: icon, 7400: mobile phone, 7401: housing, 7402: display unit, 7403: operation button, 7404: external connection port, 7405: speaker, 7406: microphone, 7407: storage battery, 7408: control system, 8000: table display device, 8001: housing, 8002: display unit, 8003: speaker unit, 8004: secondary battery, 8005: voice input device, 8006: stand, 8007: speaker, 8008: display unit, 8009: mobile information terminal, 8010: charging module, 8021: charging device, 8022: cable, 8024: power storage system, 8100: lighting device, 8101: housing, 8102: light source, 8103: secondary battery, 8104: ceiling, 8105: side wall, 8106: floor, 8107: window, 8200: indoor unit, 8 201: Housing, 8202: Air outlet, 8203: Secondary battery, 8204: Outdoor unit, 8300: Electric refrigerator-freezer, 8301: Housing, 8302: Refrigerator door, 8303: Freezer door, 8304: Secondary battery, 8400: Automobile, 8401: Headlight, 8406: Electric motor, 8500: Automobile, 8600: Scooter, 8601: Side mirror, 8602: Energy storage system, 8603: Turn signal, 8604: Under-seat storage, 8700: Electric bicycle, 8701: Energy storage battery, 8702: Energy storage system system, 8703: display unit, 8704: control system, 9600: tablet terminal, 9625: switch, 9626: switch, 9627: power switch, 9628: operation switch, 9629: fastener, 9630: housing, 9630a: housing, 9630b: housing, 9631: display unit, 9633: solar cell, 9634: control system, 9635: power storage unit, 9636: DCDC converter, 9637: converter, 9638: charge / discharge control circuit, 9639: protection circuit, 9640: moving part,

Claims

1. A first step of connecting an external power source to a storage battery; a second step of initiating charging or discharging of the storage battery; a third step of stopping charging or discharging the storage battery; a fourth step of measuring an open circuit voltage of the storage battery when the reaction of the storage battery becomes stable after the third step or when 2 minutes to 5 hours have elapsed after the third step; a fifth step of measuring the impedance of the battery; a sixth step of inputting the open circuit voltage value and the impedance into a neural network; a seventh step of outputting a first signal from the neural network; and an eighth step of changing a charging current and a charging upper limit voltage of the storage battery in response to the first signal; The impedance is measured at 2 to 100 frequencies in the range of 10 μHz to 1 MHz or 10 mHz to 50 kHz, the first signal includes determination data based on an estimated value regarding an increase in the impedance or an estimated value regarding a decrease in a discharge capacity of the storage battery; In the eighth step, a change is made to reduce the charging current in accordance with a decrease in a full charge capacity of the storage battery after estimating the full charge capacity of the storage battery. A method for operating an energy storage system.

2. A first step of connecting an external power source to a storage battery; a second step of initiating charging or discharging of the storage battery; a third step of stopping charging or discharging the storage battery; a fourth step of measuring an open circuit voltage of the storage battery when the reaction of the storage battery becomes stable after the third step or when 2 minutes to 5 hours have elapsed after the third step; a fifth step of measuring the impedance of the battery; a sixth step of inputting the open circuit voltage value and the impedance into a neural network; a seventh step of outputting a first signal from the neural network; and an eighth step of changing a charging current and a charging upper limit voltage of the storage battery in response to the first signal; The impedance is measured at 2 to 100 frequencies in the range of 10 μHz to 1 MHz or 10 mHz to 50 kHz, the first signal includes determination data based on an estimated value regarding an increase in the impedance or an estimated value regarding a decrease in a discharge capacity of the storage battery; In the eighth step, a change is included in which a full charge capacity of the storage battery is estimated and then the charging current is reduced in accordance with a decrease in the full charge capacity, The neural network has an input layer, an output layer, and a hidden layer disposed between the input layer and the output layer. A method for operating an energy storage system.

3. In claim 1 or 2, The training of the neural network includes: an eleventh step of connecting an external power source to the storage battery; a twelfth step of fully charging the storage battery; a thirteenth step of discharging the storage battery and calculating a discharge capacity of the storage battery when fully charged; A fourteenth step of measuring the number of charge / discharge cycles of the storage battery; a fifteenth step of charging the storage battery so that the charging rate of the storage battery is 5% or more and less than 40% compared to before charging; A sixteenth step of calculating a charging rate of the storage battery; a seventeenth step of measuring the open circuit voltage of the battery; an eighteenth step of measuring the impedance of the battery; a nineteenth step of inputting the number of charge / discharge cycles, the charge rate, the open circuit voltage, and the impedance into the neural network; a twentieth step of discharging the storage battery until the charging rate of the storage battery is equal to or greater than 0% and less than 30%; A twenty-first step of calculating a discharge capacity of the storage battery and inputting the discharge capacity into the neural network; and (22) adjusting weighting coefficients based on the number of charge / discharge cycles, the charge rate, the open circuit voltage, the impedance, and the discharge capacity input to the neural network. A method for operating an energy storage system.

4. In any one of claims 1 to 3, the neural network includes a first transistor, a capacitive element, and a second transistor; one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitance element; one of a source and a drain of the first transistor is electrically connected to a gate of the second transistor; a channel formation region of the first transistor includes a metal oxide; The metal oxide comprises indium and an element M, The method for operating a power storage system, wherein the element M is one or more selected from aluminum, gallium, tin, boron, silicon, titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten.

5. In claim 4, A method for operating a power storage system, wherein a channel formation region of the second transistor comprises silicon.

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