Plasma processing apparatus and power supply system

Abstract

To improve performance of a process by using a plurality of high-frequency power pulses.SOLUTION: A plasma processing apparatus has: a first RF generation unit configured to generate a first RF pulse signal having a first power level larger than zero in a first period in each cycle, having a zero power level in a second period after the first period in each cycle, having a second power level smaller than the first power level and larger than zero in a third period after the second period in each cycle, and having the zero power level in a fourth period after the third period in each cycle; a second RF generation unit configured to generate a second RF pulse signal having the zero power level in the first period, third period, and fourth period, and having a third power level larger than zero in the second period; and a third RF generation unit configured to generate a third RF pulse signal having the zero power level in the first period, second period, and fourth period, and having a fourth power level larger than zero in the third period.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present disclosure relates to a plasma processing apparatus and a power supply system. [Background technology]

[0002] For example, Patent Document 1 proposes an ICP (Inductively Coupled Plasma) device that has two high frequency power supplies and supplies dual frequency high frequency power to an antenna in the upper part of the chamber and a lower electrode (susceptor). One of the two high frequency power supplies supplies bias high frequency power with a frequency of, for example, 13 MHz to the lower electrode. An antenna is provided above the chamber, and the other high frequency power supply supplies plasma excitation high frequency power with a frequency of, for example, 27 MHz to the midpoint or vicinity of the line constituting the outer coil of the antenna. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2019-67503 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides techniques that can improve process performance using multiple radio frequency (RF) power pulse signals. [Means for solving the problem]

[0005] According to one aspect of the present disclosure, there is provided a plasma processing apparatus comprising: a chamber; a first RF generation unit coupled to the chamber and configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first period in each cycle, a zero power level during a second period after the first period in each cycle, a second power level less than the first power level and greater than zero during a third period after the second period in each cycle, and a zero power level during a fourth period after the third period in each cycle; a second RF generation unit coupled to the chamber and configured to generate a second RF pulse signal, the second RF pulse signal having zero power levels during the first period, the third period, and the fourth period, and having a third power level greater than zero during the second period; and a third RF generation unit coupled to the chamber and configured to generate a third RF pulse signal, the third RF pulse signal having zero power levels during the first period, the second period, and the fourth period, and having a fourth power level greater than zero during the third period. Effect of the Invention

[0006] According to one aspect, multiple high frequency power pulse signals can be used to improve process performance. [Brief description of the drawings]

[0007] [Figure 1] 1 is a schematic cross-sectional view illustrating an example of a plasma processing system according to an embodiment. [Diagram 2] FIG. 1 is a diagram showing an example of a plasma processing apparatus according to an embodiment. [Diagram 3] FIG. 2 is a diagram showing an example of a matching circuit for two bias RF pulse signals according to the embodiment. [Figure 4] 1A and 1B are diagrams showing examples of radicals, ions, electron temperatures, ion energies, and by-products. [Diagram 5] FIG. 4 is a diagram showing a pulse pattern of a dual-frequency high-frequency power pulse according to the embodiment. [Figure 6] FIG. 4 is a diagram showing pulse patterns of triple-frequency high-frequency power pulses according to the embodiment. [Figure 7] FIG. 4 is a diagram showing pulse patterns of triple-frequency high-frequency power pulses according to the embodiment. [Figure 8] FIG. 4 is a diagram showing pulse patterns of triple-frequency high-frequency power pulses according to the embodiment. [Figure 9] FIG. 4 is a diagram showing pulse patterns of triple-frequency high-frequency power pulses according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and duplicated descriptions may be omitted.

[0009] [Plasma processing system] First, a plasma processing system according to an embodiment will be described with reference to Fig. 1 and Fig. 2. Fig. 1 is a schematic cross-sectional view showing an example of a plasma processing system according to an embodiment. Fig. 2 is a view showing an example of a plasma processing apparatus 1 according to an embodiment.

[0010] In the embodiment, the plasma processing system includes a plasma processing apparatus 1 and a controller 2. The plasma processing apparatus 1 is configured to generate plasma from a processing gas in the chamber 10 by supplying three high frequency power pulses (three RF pulse signals) into the chamber 10. The plasma processing apparatus 1 may be configured to generate plasma from a processing gas in the chamber 10 by supplying two high frequency power pulses (two RF pulse signals) into the chamber 10. Then, the plasma processing apparatus 1 processes a substrate by exposing the substrate to the generated plasma.

[0011] The plasma processing apparatus 1 includes a chamber 10, a substrate support 11, and a plasma generation unit. The chamber 10 defines a plasma processing space 10s. The chamber 10 also has a gas inlet 10a for supplying at least one processing gas to the plasma processing space 10s and a gas outlet 10b for exhausting gas from the plasma processing space. The gas inlet 10a is connected to at least one gas supply unit 20.

[0012] The gas outlet 10b is, for example, an exhaust port provided at the bottom of the chamber 10 and is connected to an exhaust system 40. The exhaust system 40 may include a pressure valve and a vacuum pump. The vacuum pump may include a turbomolecular pump, a roughing pump, or a combination thereof.

[0013] The substrate support 11 is disposed in the plasma processing space 10s and supports the substrate W. The plasma generating unit is configured to generate plasma from at least one processing gas supplied into the plasma processing space 10s. The plasma formed in the plasma processing space 10s may be a capacitively coupled plasma (CCP) or an inductively coupled plasma (ICP).

[0014] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to execute various steps described in the present disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to execute various steps described herein. In an embodiment, as shown in FIG. 1, a part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include, for example, a computer 21. The computer 21 may include, for example, a processing unit (CPU: Central Processing Unit) 21a, a storage unit 21b, and a communication interface 21c. The processing unit 21a may be configured to perform various control operations based on a program stored in the storage unit 21b. The storage unit 21b may include a random access memory (RAM), a read only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 21c may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0015] An example of the configuration of the plasma processing apparatus 1 will be further described below by taking the inductively coupled plasma processing apparatus of Fig. 2 as an example. The plasma processing apparatus 1 includes a chamber 10. The chamber 10 includes a dielectric window 10c and a sidewall 10d. The dielectric window 10c and the sidewall 10d define a plasma processing space 10s in the chamber 10. The plasma processing apparatus 1 also includes a substrate support 11, a gas inlet 13, a gas supply unit 20, a power supply unit, and an antenna 14.

[0016] The substrate support 11 is disposed in a plasma processing space 10s in the chamber 10. The antenna 14 is disposed above the chamber 10 (dielectric window 10c).

[0017] The substrate support 11 includes a main body and an annular member (edge ​​ring) 12. The main body has a central region (substrate support surface) 11a for supporting a substrate (wafer) W, and an annular region (edge ​​ring support surface) 11b for supporting the annular member 12. The annular region 11b of the main body surrounds the central region 11a of the main body. The substrate W is disposed on the central region 11a of the main body, and the annular member 12 is disposed on the annular region 11b of the main body so as to surround the substrate W on the central region 11a of the main body. In the embodiment, the main body includes an electrostatic chuck 111 and a conductive member 112. The electrostatic chuck 111 is disposed on the conductive member 112. The conductive member 112 functions as an RF electrode, and the upper surface of the electrostatic chuck 111 functions as the substrate support surface 11a. Although not shown, in the embodiment, the substrate support 11 may include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 111 and the substrate W to a target temperature. The temperature control module may include a heater, a flow path, or a combination of these. A temperature control fluid such as a coolant or a heat transfer gas flows through the flow path. The chamber 10, the substrate support 11, and the annular member 12 are arranged so that the axis Z is aligned with each other as the central axis.

[0018] The gas inlet 13 is configured to supply at least one process gas from the gas supply 20 to the plasma processing space 10s. In an embodiment, the gas inlet 13 is disposed above the substrate support 11 and attached to a central opening formed in the dielectric window 10c.

[0019] The gas supply 20 may include at least one gas source 23 and at least one flow controller 22. In an embodiment, the gas supply 20 is configured to supply one or more process gases from respective gas sources 23 through respective flow controllers 22 to the gas inlet 13. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply 20 may include one or more flow modulation devices to modulate or pulse the flow rate of one or more process gases.

[0020] The power supply unit includes an RF power supply unit 31 coupled to the chamber 10. The RF power supply unit 31 is configured to supply three RF signals (RF power) to the conductive member 112 of the substrate support 11 or the antenna 14. This causes plasma to be generated from at least one processing gas supplied to the plasma processing space 10s. The plasma generation unit may include a gas supply unit 20 that supplies at least one processing gas into the plasma processing space 10s, and the RF power supply unit 31, and may be configured to generate plasma from the processing gas.

[0021] The antenna 14 includes one or more coils. In an embodiment, the antenna 14 may include an outer coil and an inner coil arranged coaxially. In this case, the RF power supply 31 may be connected to both the outer coil and the inner coil, or to either the outer coil or the inner coil. In the former case, the same RF generator may be connected to both the outer coil and the inner coil, or separate RF generators may be connected to the outer coil and the inner coil separately.

[0022] In the embodiment, the RF power supply unit 31 includes a source RF generating unit 31a, a first bias RF generating unit 31b, and a second bias RF generating unit 31c. The source RF generating unit 31a is coupled to the antenna 14, and the first bias RF generating unit 31b and the second bias RF generating unit 31c are coupled to the conductive member 112. The source RF generating unit 31a is connected to the antenna 14 via a first matching circuit 33, and is configured to generate a first RF pulse signal (hereinafter also referred to as HF power) for plasma generation. In the embodiment, the first RF pulse signal has a frequency in the range of 20 MHz to 60 MHz. The generated first RF pulse signal is supplied to the antenna 14. The first RF pulse signal includes a plurality of first pulse cycles, and each of the plurality of first pulse cycles includes a first period, a second period, and a third period. The first RF pulse signal has a first power level in the first period, a second power level in the second period, and a third power level in the third period. The first RF pulse signal has at least three power levels, each of which is equal to or greater than 0. Thus, the first RF pulse signal may have High / Middle / Low power levels, which are greater than 0. The first RF pulse signal may also have High / Low power levels and a zero power level (Off). The source RF generating unit 31a is an example of a first RF generating unit coupled to the first matching circuit 33 and configured to generate a first RF pulse signal including a plurality of first pulse cycles.

[0023] Moreover, the first bias RF generating unit is connected to the conductive member 112 of the substrate support part 11 via the second matching circuit 34 and the power supply line 37, and is configured to generate a second RF pulse signal (hereinafter also referred to as LF1 power). The generated second RF pulse signal is supplied to the conductive member 112 of the substrate support part 11. In the embodiment, the second RF pulse signal has a lower frequency than the first RF pulse signal. In the embodiment, the second RF pulse signal has a frequency within a range of 1 MHz to 15 MHz. The second RF pulse signal has a fourth power level in the fourth period and a fifth power level in the fifth period. The fourth period is 30 μs or less. Therefore, the second RF pulse signal may have High / Low power levels, which are greater than 0. Moreover, the second RF pulse signal may have a power level greater than 0 and a zero power level, i.e., an on / off signal. The first bias RF generator is an example of a second RF generator coupled to the second matching circuit 34 and configured to generate a second RF pulse signal including a plurality of second pulse cycles.

[0024] Moreover, the second bias RF generating unit is connected to the conductive member 112 of the substrate support part 11 via the second matching circuit 34 and the power supply line 37, and is configured to generate a third RF pulse signal (hereinafter also referred to as LF2 power). The generated third RF pulse signal is supplied to the conductive member 112 of the substrate support part 11. In the embodiment, the third RF pulse signal has a lower frequency than the second RF pulse signal. In the embodiment, the third RF pulse signal has a frequency within a range of 100 kHz to 4 MHz. The third RF pulse signal has a sixth power level in the sixth period and a seventh power level in the seventh period. The third RF pulse signal has at least two power levels, and each power level is 0 or more. Therefore, the third RF pulse signal may have High / Low power levels, which are greater than 0. Moreover, the third RF pulse signal may have a power level greater than 0 and a zero power level, i.e., an on / off signal. The second bias RF generator is an example of a third RF generator coupled to the second matching circuit 34 and configured to generate a third RF pulse signal including a plurality of third pulse cycles.

[0025] In this manner, the first RF pulse signal, the second RF pulse signal, and the third RF pulse signal are pulsed. The second RF pulse signal and the third RF pulse signal are pulsed between an on state and an off state, or between two or more different on states (High / Low). The first RF pulse signal is pulsed between two or more different on states (High / Low) and an off state, or between three or more different on states (High / Middle / Low). The first RF pulse signal may be pulsed between an on state and an off state, or between two different on states (High / Low).

[0026] The first matching circuit 33 is connected to the source RF generating unit 31a and the antenna 14, and is connected to the chamber 10 via the antenna 14. The first matching circuit 33 enables a first RF pulse signal to be supplied from the source RF generating unit 31a to the antenna 14 via the first matching circuit 33. Note that, in other plasma processing apparatuses, the first matching circuit 33 may be connected to a configuration other than the antenna 14. For example, in a capacitively coupled plasma processing apparatus including two opposing electrodes, the first matching circuit 33 may be connected to one of the two electrodes.

[0027] The second matching circuit 34 is connected to the first bias RF generation unit 31b, the second bias RF generation unit 31c, and the substrate support unit 11 (the conductive member 112). The second matching circuit 34 enables a second RF pulse signal to be supplied from the first bias RF generation unit 31b to the substrate support unit 11 via the second matching circuit 34. The second matching circuit 34 also enables a third RF pulse signal to be supplied from the second bias RF generation unit 31c to the substrate support unit 11 via the second matching circuit 34.

[0028] The control unit 2 outputs a control signal to each of the source RF generating unit 31a, the first bias RF generating unit 31b, and the second bias RF generating unit 31c to instruct the supply of each pulse signal. As a result, a first RF pulse signal, a second RF pulse signal, and a third RF pulse signal including a plurality of pulse cycles are supplied at a predetermined timing, and plasma is generated from the processing gas in the chamber 10. Then, the substrate is exposed to the generated plasma to perform substrate processing. This improves the efficiency of the process and enables high-precision substrate processing. The control timing of the control unit 2 to control the on / off state or power level of 0 or more of the first RF pulse signal, the second RF pulse signal, and the third RF pulse signal will be described later.

[0029] [An example of the internal configuration of the second matching circuit] Next, an example of the configuration of the second matching circuit 34 will be described with reference to Fig. 3. Fig. 3 is a diagram showing an example of the internal configuration of the second matching circuit 34 according to the embodiment.

[0030] The first bias RF generation unit 31b and the second bias RF generation unit 31c are connected to the substrate support unit 11 (conductive member 112) via a second matching circuit 34 and a power feed line 37. The second RF pulse signal supplied from the first bias RF generation unit 31b is also referred to as LF1 power in the following description. Moreover, the third RF pulse signal supplied from the second bias RF generation unit 31c is also referred to as LF2 power in the following description.

[0031] When the second RF pulse signal (LF1 power) supplied from the first bias RF generation unit 31b is coupled to the opposite side (the second bias RF generation unit 31c side) via the power feed line 36 in the second matching circuit 34, the supply efficiency of the LF1 power supplied to the chamber 10 decreases. Similarly, when the third RF pulse signal (LF2 power) supplied from the second bias RF generation unit 31c is coupled to the opposite side (the first bias RF generation unit 31b side) via the power feed line 36, the supply efficiency of the LF2 power supplied to the chamber 10 decreases. Then, the supply of bias power to the chamber 10 decreases, making it difficult to control ion energy, and the process performance deteriorates.

[0032] Therefore, the second matching circuit 34 according to this embodiment has a first adjustment circuit 34b1, a first separation circuit 34b2, a second adjustment circuit 34c1, and a second separation circuit 34c2. The first adjustment circuit 34b1 and the first separation circuit 34b2 are connected between the first bias RF generation unit 31b and the power feed line 37. The second adjustment circuit 34c1 and the second separation circuit 34c2 are connected between the second bias RF generation unit 31c and the power feed line 37. With this configuration, the second RF pulse signal (LF1 power) generated in the first bias RF generation unit 31b is supplied to the substrate support unit 11 (conductive member 112) while suppressing coupling to the second bias RF generation unit 31c. Also, the third RF pulse signal (LF2 power) generated in the second bias RF generation unit 31c is supplied to the substrate support unit 11 (conductive member 112) while suppressing coupling to the first bias RF generation unit 31b.

[0033] The first adjustment circuit 34b1 has a variable element and is configured to match the impedance of the load side (substrate support 11 side) of the first bias RF generation unit 31b to the output impedance of the first bias RF generation unit 31b. In one embodiment, the variable element of the first adjustment circuit 34b1 is a variable capacitor.

[0034] The second isolation circuit 34c2 is connected between the second bias RF generation unit 31c and the substrate support unit 11, and prevents coupling of the second RF pulse signal, which is the LF1 power from the first bias RF generation unit 31b.

[0035] The second adjustment circuit 34c1 has a variable element and is configured to match the impedance of the load side (substrate support 11 side) of the second bias RF generation unit 31c to the output impedance of the second bias RF generation unit 31c. In one embodiment, the variable element of the second adjustment circuit 34c1 is a variable inductor.

[0036] The first isolation circuit 34b2 is connected between the first bias RF generation unit 31b and the substrate support unit 11, and prevents coupling of the third RF pulse signal, which is the LF2 power from the second bias RF generation unit 31c.

[0037] The second isolation circuit 34c2 is an RF choke circuit including an inductor L2. The first isolation circuit 34b2 is a resonant circuit including a capacitor C1 and an inductor L1. The first isolation circuit 34b2 is composed of the capacitor C1 and the inductor L1. The second isolation circuit 34c2 is composed of the inductor L2.

[0038] The first separation circuit 34b2 sets the circuit constants C1 and L1 so that the impedance seen from the second RF pulse signal is zero or close to zero, the impedance seen from the third RF pulse signal is high, and the first bias RF generation unit 31b side is seen as a wall. As a result, the impedance seen from the third RF pulse signal in the first separation circuit 34b2 is set to Z LF2 Let the plasma load impedance be Z chamber If we write it as Z LF2 >>Z chamber holds true.

[0039] The second separation circuit 34c2 sets the circuit constant L2 so that the impedance seen from the third RF pulse signal is zero or close to zero, the impedance seen from the second RF pulse signal is high, and the second bias RF generation unit 31c side is seen as a wall. LF1 Then, Z LF1 >>Z chamber holds true.

[0040] In this way, by setting the circuit constant of the first separation circuit 34b2 as described above, the impedance Z LF2 is the plasma load impedance Z chamber This makes the first separation circuit 34b2 prevent the coupling of the third RF pulse signal from the second bias RF generation unit 31c ("LF2 Power→x" in FIG. 3). As a result, the LF2 power is supplied into the chamber 10 via the power supply line 37, and this makes it possible to suppress a decrease in the supply efficiency of the LF2 power.

[0041] Similarly, by setting the circuit constant of the second separation circuit 34c2 as described above, the impedance Z LF1 is the plasma load impedance Z chamber This makes the second separation circuit 34c2 prevent the coupling of the second RF pulse signal from the first bias RF generation unit 31b ("LF1 Power→x" in FIG. 3). As a result, the LF1 power is supplied into the chamber 10 via the power supply line 37, and this makes it possible to suppress a decrease in the supply efficiency of the LF1 power.

[0042] With this configuration, pulse signals of two bias powers (LF1 power and LF2 power) having different frequencies can be efficiently supplied to the substrate support portion 11.

[0043] [Pulse signal] For example, for a process of etching deep holes with high aspect ratios, pulsed signals of HF power, LF1 power and LF2 power can be used to achieve a normal ion incidence angle and to increase mask selectivity.

[0044] FIG. 4 is a diagram showing an example of radicals, ions, electron temperature, ion energy, and by-products. The horizontal axis of FIG. 4 indicates the elapsed time (one period) after the supply of RF power is stopped (OFF). The vertical axis of FIG. 4 indicates the radicals (Radical), ions (Ions), electron temperature (Te), ion energy (εl ), and by-products at each time.

[0045] According to this, radicals (Radicals) change slowly after the RF power is turned off, whereas ions (Ions) and plasma temperature (Te) change faster than radicals after the RF power is turned off. The pulse signals of HF power and LF power (e.g., LF1 power and LF2 power) are controlled taking into consideration the attenuation and energy changes of radicals and ions in the plasma. As an example of the pulse signal of LF power to be supplied after the HF power is turned off, it is possible to control the LF power to be turned off during the initial period when the plasma temperature (Te) is high, and to turn the LF power on after the plasma temperature (Te) has dropped. According to this, ions still remain, but the LF power can be used during the period when the plasma temperature (Te) is low, to efficiently attract the ions to the substrate.

[0046] Another example of the pulse signal of the LF power to be supplied after the HF power is turned off is ε l By using this, the LF2 power is controlled at a time when the plasma electron temperature Te hardly changes. This allows the ion energy ε l By controlling the angle of incidence of ions, the angle of incidence of ions can be controlled to be more perpendicular.

[0047] In this way, the timing of turning on and off the HF power and the LF power is precisely controlled according to the behavior of plasma parameters such as radicals, ions, plasma electron temperature, ion energy, and by-products. This makes it possible to improve the process performance. The supply timing of the high frequency power pulse signal will be described below with reference to Figs. 5 to 9. The supply timing of the high frequency power pulse signal is controlled by the control unit 2.

[0048] (2-frequency pulse signal) FIG. 5 is a diagram showing a pulse pattern of a dual-frequency high-frequency power pulse according to an embodiment. The HF power (Source Power) of the dual-frequency high-frequency power pulse shown in FIG. 5 includes a plurality of first pulse cycles. The pulse signal of the LF1 power (Bias Power) includes a plurality of second pulse cycles. The supply timing of each pulse signal will be described below. The horizontal axis of FIG. 5 indicates the time of one cycle, and the vertical axis indicates the on / off state of the HF power and the LF1 power. Each of the multiple first pulse cycles of the HF power includes a period (1) and a period (2), and each of the multiple second pulse cycles of the LF1 power includes a period (3) and a period (4). In the example of FIG. 5, in each of the multiple first pulse cycles, the first RF pulse signal of the HF power is repeated with the period (1), the period (2), and the exhaust period as one cycle. In each of the multiple second pulse cycles, the second RF pulse signal of the LF1 power is repeated with the period (4), the period (3), and the exhaust period as one cycle.

[0049] The source RF generating unit 31a is configured to generate a first RF pulse signal (HF power). In this embodiment, the first RF pulse signal has two power levels (On / Off). The first bias RF generating unit 31b is configured to generate a second RF pulse signal (LF1 power). In this embodiment, the second RF pulse signal has two power levels (On / Off).

[0050] The on state of the HF power and the on state of the LF1 power do not overlap in time. For example, the first RF pulse signal has a first power level in period (1) and a second power level in period (2), the first power level is in the on state and the second power level is in the off state. That is, the second power level is the zero power level. The second RF pulse signal has a third power level in period (3) and a fourth power level in period (4), the third power level is in the on state and the fourth power level is in the off state. That is, the fourth power level is the zero power level.

[0051] The first RF pulse signal may have a frequency of 27 MHz. The frequency of the second RF pulse signal is lower than the frequency of the first RF pulse signal. For example, the second RF pulse signal has a frequency of 13 MHz. The first power level may be High and the second power level may be Low. Also, the third power level may be High and the fourth power level may be Low.

[0052] 5, the HF power is maintained in the ON state, and the LF1 power is maintained in the OFF state in the period (4) which coincides with the period (1) in time, so that plasma containing radicals and ions is generated by the supply of the HF power from time t0 to time t1.

[0053] At time t1, the HF power transitions to the OFF state, the LF1 power transitions to the ON state, the HF power remains OFF during period (2), and the LF1 power remains ON during period (3) which coincides with period (2). During period (2), the HF power is OFF, so that the radicals, ions, and plasma temperature decay with their respective time constants, as shown in an example in FIG. 4. By supplying the LF1 power during period (3), the ion flux (amount of ions) that reaches the bottom of the recess to be etched is controlled, and etching is promoted. At time t2, the HF power remains OFF, and the LF1 power transitions to the OFF state. During the exhaust period after periods (2) and (3), the HF power and the LF1 power are OFF, so that by-products are exhausted. The exhaust period is preset to a time during which by-products do not adhere to the substrate W.

[0054] At time t3 after the exhaust period, one cycle ends and transitions to period (1) of the next cycle. Then, at time t0 of the next cycle, the HF power transitions to the ON state again, and the LF1 power maintains the OFF state in period (4). That is, the first pulse cycle of the HF power is repeated, with period (1), period (2) and the exhaust period as one cycle. Also, the second pulse cycle of the LF1 power is repeated, with period (4), period (3) and the exhaust period as one cycle. One cycle is 1 kHz to 20 kHz. The multiple pulse cycles have the same time period, and each pulse cycle has a time period of 50 μs to 1000 μs. That is, one pulse cycle is 50 μs to 1000 μs.

[0055] Period (3) does not overlap with period (1) in terms of time. In other words, the first bias RF generation unit 31b offsets the timing of the change in the power level of the second RF pulse signal with respect to the timing of the change in the power level of the first RF pulse signal, so that the on state of the HF power and the on state of the LF1 power do not overlap in terms of time.

[0056] In addition, period (3) is set to 30 μs or less. Periods (1), (2), and (4) can be set to any time and may be longer than 30 μs. That is, in this example, the LF1 power is maintained in the ON state for 30 μs or less in period (3), and is maintained in the OFF state for any time during period (4) and the exhaust period, repeating ON / OFF. In this way, by setting the supply time of the LF1 power in one cycle to 30 μs or less, ions can be controlled vertically, enabling highly anisotropic etching.

[0057] The power level of the HF power in period (1) is an example of a first power level, the power level of the HF power in period (2) is an example of a second power level, the power level of the LF1 power in period (3) is an example of a third power level, and the power level of the LF1 power in period (4) is an example of a fourth power level.

[0058] (3-frequency pulse signal) 6 to 9 are diagrams showing pulse patterns of triple-frequency high-frequency power pulses according to an embodiment. Each pulse signal of the triple-frequency high-frequency powers shown in Figs. 6 to 9, HF power (Source Power), LF1 power (Bias1 Power) and LF2 power (Bias2 Power), includes a plurality of pulse cycles. The supply timing of each pulse signal will be described below. The horizontal axis in Figs. 6 to 9 indicates the time of one cycle, and the vertical axis indicates the on / off state of the HF power, LF1 power and LF2 power. The first pulse cycle of the HF power, the second pulse cycle of the LF1 power and the third pulse cycle of the LF2 power (each pulse cycle includes an exhaust period) constitute one cycle, and control of each pulse signal of the HF power, LF1 power and LF2 power is repeated.

[0059] In the control of the triple-frequency high-frequency power pulse, the on state of the LF1 power and the on state of the LF2 power do not overlap in time, and while the LF1 power is on, the LF2 power is off, and while the LF1 power is off, the LF2 power is on. Also, the high power level of the HF power and the on state of the LF1 power do not overlap in time, and while the HF power is at the high power level, the LF1 power is off, and while the LF1 power is on, the HF power is off or at a low power level. Similarly, the high power level of the HF power and the on state of the LF2 power do not overlap in time, and while the HF power is at the high power level, the LF2 power is off, and while the LF2 power is on, the HF power is off or at a low power level.

[0060] The source RF generating unit 31a is configured to generate a first RF pulse signal (HF power), and in this embodiment, the first RF pulse signal has three power levels (High / Low / Off). These power levels can be arbitrarily set and changed according to the target process. For example, the first RF pulse signal has a frequency of 27 MHz.

[0061] The first bias RF generating unit 31b is configured to generate a second RF pulse signal (LF1 power), and in this embodiment, the second RF pulse signal has two power levels (On / Off). That is, the second RF pulse signal has two or more power levels including a zero power level. The frequency of the second RF pulse signal is lower than the frequency of the first RF pulse signal. For example, the second RF pulse signal has a frequency of 13 MHz.

[0062] The second bias RF generating unit 31c is configured to generate a third RF pulse signal (LF2 power), and in this embodiment, the third RF pulse signal has two power levels (On / Off). That is, the third RF pulse signal has two or more power levels including a zero power level. The frequency of the third RF pulse signal is lower than the frequency of the second RF pulse signal. For example, the third RF pulse signal has a frequency of 1.2 MHz.

[0063] 6 to 9, the HF power is the first RF pulse signal, the LF1 power is the second RF pulse signal, and the LF2 power is the third RF pulse signal.

[0064] In the period (1) of FIG. 6, the HF power has a high power level, and the LF1 power and the LF2 power are in an off state. That is, from time t0 to time t 11 During the time up to 1000 s, plasma containing radicals and ions is generated by supplying HF power. As a result, as shown in Fig. 6(a), the etching target film 100 is etched through the mask 101, and mainly radicals R adhere to the inner walls of the holes HL formed in the etching target film 100.

[0065] Time t after period (1) has elapsed 11When the HF power transitions to the off state, the radicals, ions, and plasma temperature decay with their respective time constants, as shown in an example in Figure 4. The timings for turning on the LF1 power and the LF2 power during the period (3) when the HF power is turned off, the period (2) when the power level is reduced, and the period when by-products are exhausted are controlled according to the decay states of these plasma parameters. At this time, the period (4) when the LF1 power is turned on does not overlap in time with the period (1) when the HF power is at the high power level. Furthermore, the period (6) when the LF2 power is turned on does not overlap in time with the periods (1) and (4).

[0066] In this embodiment, at time t 11 At time t , the HF power transitions from the high power level to the OFF state, and the LF1 power transitions to the ON state. As a result, the LF1 power is maintained in the ON state during period (4) which coincides with period (3), and as shown in FIG. 6(b), the ion flux that reaches the bottom of the etched recess can be controlled. In addition, the amount of by-products during etching can be suppressed. The LF2 power is turned on at time t 11 The LF1 power is maintained in the off state during period (7) which coincides with period (3).

[0067] Furthermore, period (4) is set to a time of 30 μs or less. Moreover, period (4) does not overlap with period (1). By supplying LF1 power for a short period of 30 μs or less in period (4), it is possible to further control the ions vertically and perform highly anisotropic etching.

[0068] Time t after periods (3) and (4) have elapsed 12 At time t, the HF power transitions to a low power level, the LF1 power transitions to an off state, and the LF2 power transitions to an on state. 13In period (2) until the HF power is turned on, the HF power is maintained at a low power level. In periods (3) and (2), the HF power may be at a low power level or may be turned off. In period (5) which coincides in time with period (2), the LF1 power is maintained in an off state, and in period (6) which coincides in time with period (2), the LF2 power is maintained in an on state. As described above, period (6) does not overlap in time with periods (1) and (4).

[0069] In this embodiment, LF2 power having a frequency lower than that of the LF1 power supplied in period (4) is supplied in period (6). The Vpp of the LF2 power is greater than the Vpp of the LF1 power. This allows the Vpp of the bias voltage to be greater in period (6) than in period (4), and the ion energy ε l By increasing the LF2 power supply, the ion incidence angle can be controlled to be more perpendicular. This makes it possible to control the ion flux that reaches the bottom of the etched recess during the period (6) when the LF2 power is being supplied. This allows the by-products B and other substances remaining in the corners of the bottom of the hole HL to be etched away, accelerating the etching process, as shown in FIG. 6(c).

[0070] In this way, in the process of etching a deep hole with a high aspect ratio, the mask selectivity can be increased and the ion incidence angle can be made vertical by using the pulse signals of the HF power, the LF1 power, and the LF2 power. This makes it possible to make the etching profile vertical and to accelerate etching. However, the process of etching a deep hole with a high aspect ratio is an example of substrate processing, and the type of process is not limited thereto.

[0071] During the exhaust period, exhaust of the by-products is controlled. That is, during the exhaust period, the HF power, the LF1 power, and the LF2 power are controlled to be in the off state. This allows the by-products B in the holes HL to be exhausted as shown in FIG. 6(d). This can promote the etching of the next cycle. The exhaust period is preset to a time during which the by-products B do not re-adhere on the substrate W.

[0072] 6, the power level of the HF power is controlled to three levels, and the power levels of the LF1 power and the LF2 power are controlled to two levels, an on / off state, but this is not limiting. For example, the power level of the HF power may be controlled to four or more levels.

[0073] time t 14 At time t0 of the next period, the HF power transitions to a high power level, and the LF1 power and the LF2 power maintain the off state. The first RF pulse signal sets the HF power to a predetermined state in the order of period (1) → period (3) → period (2) → exhaust period. The second RF pulse signal sets the LF1 power to a predetermined state in the order of period (4) → period (5) → exhaust period. The third RF pulse signal sets the LF2 power to a predetermined state in the order of period (7) → period (6) → exhaust period. Each pulse cycle is repeated, one period is 1 kHz to 20 kHz, and the period (4) is 30 μs or less. The first to third pulse cycles have the same time period, and each pulse cycle has a time period of 50 μs to 1000 μs. That is, one pulse cycle is 50 μs to 1000 μs.

[0074] The power level of the HF power in period (1) is an example of a first power level, the power level of the HF power in period (2) is an example of a second power level, and the power level of the HF power in period (3) is an example of a third power level. The power level of the LF1 power in period (4) is an example of a fourth power level, and the power level of the LF1 power in period (5) is an example of a fifth power level. The power level of the LF2 power in period (6) is an example of a sixth power level, and the power level of the LF2 power in period (7) is an example of a seventh power level.

[0075] 7 shows another example of the control of the triple-frequency high-frequency power pulse. In this example, the first pulse cycle of the HF power, the second pulse cycle of the LF1 power, and the third pulse cycle of the LF2 power are regarded as one period, and the control of the pulse signals of the HF power, the LF1 power, and the LF2 power is repeated. Each pulse cycle may include an exhaust period.

[0076] The difference between the pulse cycle pattern in FIG. 6 and the pulse cycle pattern in FIG. 7 is that in FIG. 7, the end time t 11 There is a delay time Tdelay after the time t 11 7. The difference is that there is no delay time Tdelay after the pulse cycle pattern . This difference will be described below, and the other pulse cycle patterns in Fig. 7 are the same as those in Fig. 6, so their description will be omitted.

[0077] For example, as shown in FIG. 4, if the LF1 power or the LF2 power is turned on when the plasma temperature (Te) is high, a large amount of by-products are generated, which may hinder etching. Therefore, it is considered to turn on the LF1 power or the LF2 power when the plasma temperature is not high. In other words, at time t 11 After a predetermined delay time Tdelay has elapsed from the time t 21 At this timing, the LF1 power is switched on. In other words, at the time t 11 The LF1 power transitions to the on state after a delay time Tdelay from the LF1 power transition. This makes it possible to suppress the amount of by-products during etching and promote etching.

[0078] In this embodiment, the HF power is in an off state during the delay time Tdelay. However, the power level of the HF power during the delay time Tdelay may be a low level lower than the power level of the HF power during the period (1). 21The generation of radicals and ions can be reduced during the delay time Tdelay before the timing of t 21 From time t 12 In the period (4) from the time when the LF1 power is supplied to ...

[0079] Also, at time t 12 The LF1 power transitions to the OFF state, and the LF2 power transitions to the ON state. In period (5), the LF1 power transitions to the OFF state, and in period (6) which overlaps with period (5), the LF2 power transitions to the ON state. This allows the ion incidence angle to be controlled to be more perpendicular in period (6) compared to period (4). However, if the delay time Tdelay is made too long, ions will disappear, so the delay time Tdelay is set to an appropriate value in advance.

[0080] This control mainly controls the behavior of ions by transitioning the on / off state of the LF1 power and the on / off state of the LF2 power to the on state at different time periods. The HF power has a zero power level in period (3), the LF1 power has a power level greater than 0 in period (4), and the LF2 power has a zero power level in period (7) which overlaps with period (4). The LF2 power has a power level greater than 0 in period (6), the LF1 power has a zero power level in period (5) which overlaps with period (6), and the HF power has a power level greater than 0 in period (2). In other words, the LF1 power and the LF2 power do not overlap during the times when they have power levels greater than 0.

[0081] The LF2 power has a higher mask selectivity than the LF1 power, and vertical etching is possible. In period (1) when the power level of the HF power is higher than period (2), a large amount of radicals and ions are generated, and the above effect is difficult to achieve even if the LF2 power is supplied during period (1). On the other hand, in period (2) when the power level of the HF power is lower than period (1) and in period (3) when the power level is zero power level, the generation of radicals and ions is reduced. Therefore, the above effect is easily achieved by supplying the LF1 power during period (4) overlapping with period (3) and supplying the LF2 power during period (6) overlapping with period (2). Therefore, by supplying the LF1 power or the LF2 power during these periods, the ion energy can be increased and the ion incidence angle can be made vertical. As a result, the mask selectivity is higher during periods (2) and (3) than during period (1), and vertical etching is possible.

[0082] It is possible to generate pulse signals having two power levels, an on state and an off state, for the LF1 power and the LF2 power. However, pulse signals having two or more power levels may be generated, such as an on state, an off state, and an intermediate power level for the LF1 power and the LF2 power. The LF1 power and the LF2 power may have two different on states.

[0083] 8 shows another example of the pulse pattern of the triple-frequency high-frequency power pulse. The control of the pulse signals of the HF power, LF1 power, and LF2 power is repeated, with the first pulse cycle of the HF power, the second pulse cycle of the LF1 power, and the third pulse cycle of the LF2 power being one period. Each pulse cycle may include an exhaust period.

[0084] The difference between the pulse cycle pattern in Fig. 8 and the pulse cycle pattern in Fig. 7 is that the order of the ON state of the LF1 power and the ON state of the LF2 power is reversed, and the timing of the delay time Tdelay is shifted accordingly. The delay time Tdelay is provided immediately before the LF1 power transitions to the ON state.

[0085] In this example, the LF1 power or the LF2 power is turned on to avoid a time when the plasma temperature is high. In this example, the LF2 power and the LF1 power are turned on in that order. At time t 11 At this point, i.e., the time t when the HF power transitions from the high power level to the low power level, the plasma temperature is lowered. 11 The LF2 power transitions to the ON state during the period (6) that coincides with the period (2) in time, and the LF2 power is maintained in the ON state. This makes it possible to suppress the amount of by-products during etching and to promote etching.

[0086] time t 11 From time t 12 In the present embodiment, the LF1 power is maintained in the off state during a period (5) that coincides with the period (2) until the time t 12 At time t , the HF power transitions to the off state, the LF1 power maintains the off state, and the LF2 power transitions to the off state. The HF power is maintained in the off state during the delay time Tdelay, however, the power level of the HF power during the delay time Tdelay may be a low level lower than the power level of the HF power during period (1). The power level of the HF power is further lowered to supply the LF1 power at time t 22 The generation of radicals and ions can be reduced during the delay time Tdelay before the timing of time t 12 After the delay time Tdelay has elapsed from 22 At time t 22 At this time, the HF power and the LF2 power are maintained in the off state. As a result, at the time t 22 From time t 13In the period (4) from the time when the ion flux reaches the bottom of the recess formed in the film to be etched can be controlled. In this case, the period (4) is set to 30 μs or less. Moreover, the period (4) does not overlap with the period (1) in time. The period (5) that coincides with the period (2) in time and the exhaust period can be set to any time and may be longer than 30 μs. That is, in this example, the LF1 power is maintained in the ON state for 30 μs or less in the period (4). In this way, by supplying the LF1 power for a short time of 30 μs or less in the period (4), the ions can be further controlled vertically, enabling highly anisotropic etching. However, if the delay time Tdelay is made too long, the ions will disappear, so the delay time Tdelay is set to an appropriate value in advance.

[0087] 9 shows another example of the control of the triple-frequency high-frequency power pulse. In this example, the first pulse cycle of the HF power, the second pulse cycle of the LF1 power, and the third pulse cycle of the LF2 power are regarded as one period, and the control of the pulse signals of the HF power, the LF1 power, and the LF2 power is repeated. Each pulse cycle may include an exhaust period.

[0088] The difference between the pulse cycle pattern in FIG. 9 and the pulse cycle patterns in FIG. 7 and FIG. 8 is that the delay time Tdelay is provided immediately before the LF1 power transitions to the ON state in FIG. 7 and FIG. 8, but is provided immediately before the LF2 power transitions to the ON state in FIG. 9.

[0089] In this example, during period (1), the HF power is maintained at a high power level, and the LF1 and LF2 powers are maintained in an off state. During period (3) and periods (5) and (7) which coincide in time with period (3), the HF power, LF1 power, and LF2 power are all maintained in an off state (exhaust period).

[0090] Then, at time t 21 At time t 21During period (2), the LF2 power is maintained in the OFF state. And during period (2), the HF power is maintained at the low power level. During period (4), which overlaps in time with period (2) (i.e., coincides in time with the first portion of period (2)), the LF1 power is maintained in the ON state for a period of 30 μs or less. From time t 22 At time t 22 After the delay time Tdelay has elapsed from 23 At time t 22 and time t 23 At time t 23 During a period (6) which overlaps in time with the period (2) (i.e., coincides in time with a second portion of the period (2)), the LF2 power is maintained in the on state.

[0091] In this manner, in this example, during the period (2) in which the HF power is maintained at the low power level, the LF1 power and the LF2 power are alternately turned on. Also, during the period (4), the LF1 power is supplied for a short period of 30 μs or less. This further controls the ions to be vertical, enabling highly anisotropic etching. Note that at the time t 24 From time t 25 The control of the exhaust period up to is the same as that of the other pulse cycles, and therefore a description thereof will be omitted.

[0092] As described above, according to the plasma processing apparatus and plasma processing method of this embodiment, the process performance can be improved by using a plurality of high frequency power pulse signals.

[0093] The plasma processing apparatus and the plasma processing method according to the embodiments disclosed herein should be considered as illustrative and not restrictive in all respects. The embodiments can be modified and improved in various ways without departing from the scope and spirit of the appended claims. The matters described in the above embodiments can be configured in other ways as long as they are not inconsistent, and can be combined as long as they are not inconsistent. [Explanation of symbols]

[0094] 1. Plasma processing equipment 2. Control section 10. Chamber 10s Plasma treatment space 11 Substrate support 12 Annular member 13 Gas inlet 14 Antenna 20 Gas supply section 21 Computers 21a Processing section 21b Storage section 21c Communication Interface 31 RF power supply section 31a Source RF generation section 31b First bias RF generator 34b1 1st adjustment circuit 34b2 1st separation circuit 34c1 2nd adjustment circuit 34c2 2nd separation circuit 31c Second bias RF generator 33 1st matching circuit 34 Second matching circuit 37 Power Line

Claims

1. A chamber; a first RF generator coupled to the chamber and configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first time period in each cycle, a zero power level during a second time period after the first time period in each cycle, a second power level less than the first power level and greater than zero during a third time period after the second time period in each cycle, and a zero power level during a fourth time period after the third time period in each cycle; a second RF generator coupled to the chamber and configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first time period, the third time period, and the fourth time period, and a third power level greater than zero during the second time period; a third RF generator coupled to the chamber and configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level during the first time period, the second time period, and the fourth time period, and a fourth power level greater than zero during the third time period. Plasma processing equipment.

2. A chamber; a first RF generator coupled to the chamber and configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first time period in each cycle, a zero power level during a second time period after the first time period in each cycle, a zero power level during a third time period after the second time period in each cycle, a second power level less than the first power level and greater than zero during a fourth time period after the third time period in each cycle, and a zero power level during a fifth time period after the fourth time period in each cycle; a second RF generator coupled to the chamber and configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first time period, the second time period, the fourth time period, and the fifth time period, and a third power level greater than zero during the third time period; a third RF generator coupled to the chamber and configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level during the first time period, the second time period, the third time period, and the fifth time period, and a fourth power level greater than zero during the fourth time period. Plasma processing equipment.

3. A chamber; a first RF generator coupled to the chamber and configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first time period in each cycle, a second power level less than the first power level and greater than zero during a second time period after the first time period in each cycle, a zero power level during a third time period after the second time period in each cycle, a zero power level during a fourth time period after the third time period in each cycle, and a zero power level during a fifth time period after the fourth time period in each cycle; a second RF generator coupled to the chamber and configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first time period, the second time period, the third time period, and the fifth time period, and a third power level greater than zero during the fourth time period; a third RF generator coupled to the chamber and configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level during the first time period, the third time period, the fourth time period, and the fifth time period, and a fourth power level greater than zero during the second time period. Plasma processing equipment.

4. A chamber; a first RF generator coupled to the chamber and configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first period in each cycle, a zero power level during a second period after the first period in each cycle, a second power level less than the first power level and greater than zero during a third period after the second period in each cycle, the second power level during a fourth period after the third period in each cycle, the second power level during a fifth period after the fourth period in each cycle, and a zero power level during a sixth period after the fifth period in each cycle; a second RF generator coupled to the chamber and configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first period, the second period, the fourth period, the fifth period, and the sixth period, and a third power level greater than zero during the third period; a third RF generator coupled to the chamber and configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level during the first period, the second period, the third period, the fourth period, and the sixth period, and a fourth power level greater than zero during the fifth period. Plasma processing equipment.

5. The frequency of the second RF pulse signal is lower than the frequency of the first RF pulse signal. The plasma processing apparatus according to any one of claims 1 to 4.

6. The frequency of the third RF pulse signal is lower than the frequency of the second RF pulse signal. The plasma processing apparatus according to claim 5 .

7. the first RF pulse signal has a frequency of 20 MHz to 60 MHz; the second RF pulse signal has a frequency of 1 MHz to 15 MHz; The third RF pulse signal has a frequency of 100 kHz to 4 MHz. The plasma processing apparatus according to claim 6 .

8. Each cycle has a duration of 50 μs to 1000 μs. The plasma processing apparatus according to any one of claims 1 to 4.

9. A power supply system for use in a plasma processing apparatus, comprising: a first RF generating unit configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first period in each cycle, a zero power level during a second period after the first period in each cycle, a second power level less than the first power level and greater than zero during a third period after the second period in each cycle, and a zero power level during a fourth period after the third period in each cycle; a second RF generator configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first period, the third period, and the fourth period, and a third power level greater than zero during the second period; a third RF generating unit configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level in the first time period, the second time period, and the fourth time period, and a fourth power level greater than zero in the third time period; Power supply system.

10. A power supply system for use in a plasma processing apparatus, comprising: a first RF generating unit configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first period in each cycle, a zero power level during a second period after the first period in each cycle, a zero power level during a third period after the second period in each cycle, a second power level less than the first power level and greater than zero during a fourth period after the third period in each cycle, and a zero power level during a fifth period after the fourth period in each cycle; a second RF generating unit configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first period, the second period, the fourth period, and the fifth period, and having a third power level greater than zero during the third period; a third RF generating unit configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level in the first period, the second period, the third period, and the fifth period, and a fourth power level greater than zero in the fourth period; Power supply system.

11. A power supply system for use in a plasma processing apparatus, comprising: a first RF generating unit configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first period in each cycle, a second power level less than the first power level and greater than zero during a second period after the first period in each cycle, a zero power level during a third period after the second period in each cycle, a zero power level during a fourth period after the third period in each cycle, and a zero power level during a fifth period after the fourth period in each cycle; a second RF generating unit configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level during the first period, the second period, the third period, and the fifth period, and having a third power level greater than zero during the fourth period; a third RF generating unit configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level in the first period, the third period, the fourth period, and the fifth period, and a fourth power level greater than zero in the second period; Power supply system.

12. A power supply system for use in a plasma processing apparatus, comprising: a first RF generating unit configured to generate a first RF pulse signal, the first RF pulse signal having a first power level greater than zero during a first period in each cycle, a zero power level during a second period after the first period in each cycle, a second power level less than the first power level and greater than zero during a third period after the second period in each cycle, the second power level during a fourth period after the third period in each cycle, the second power level during a fifth period after the fourth period in each cycle, and a zero power level during a sixth period after the fifth period in each cycle; a second RF generating unit configured to generate a second RF pulse signal, the second RF pulse signal having a zero power level in the first period, the second period, the fourth period, the fifth period, and the sixth period, and having a third power level greater than zero in the third period; a third RF generating unit configured to generate a third RF pulse signal, the third RF pulse signal having a zero power level in the first period, the second period, the third period, the fourth period, and the sixth period, and having a fourth power level greater than zero in the fifth period; Power supply system.

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