Filters for motion-compensated interpolation with reference downsampling.
By applying a cosine window sinc filter for motion compensation interpolation with reference downsampling, the method addresses the challenge of different resolutions in video processing, enhancing compression efficiency and video quality.
Patent Information
- Application Number
- JP2022514464
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-09-27
- Filing Date
- 2020-08-20
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2040-08-20
AI Technical Summary
Current video processing technologies face challenges in efficiently performing motion compensation interpolation with reference resampling, particularly when dealing with different resolutions between target and reference pictures, which affects compression efficiency and video quality.
The implementation of a computer-implemented method that applies a bandpass filter, specifically a cosine window sinc filter, to the reference picture for motion compensation interpolation with reference downsampling, allowing for efficient processing of blocks in the target picture even when it and the reference picture have different resolutions.
This approach enhances the efficiency of motion compensation interpolation by minimizing information loss during reference resampling, thereby improving the compression efficiency and video quality, especially in scenarios with varying picture resolutions.
Smart Images

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Abstract
Description
[Technical field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This disclosure claims the benefit of priority to U.S. Provisional Patent Application No. 62 / 904,608, filed September 23, 2019, and U.S. Provisional Patent Application No. 62 / 906,930, filed September 27, 2019, both of which are incorporated by reference in their entireties into this specification.
[0002] Technical Field This disclosure relates generally to video processing, and more particularly to filters for motion compensated interpolation with reference resampling. [Background technology]
[0003] background
[0003] A video is a set of static pictures (or "frames") that capture visual information. To reduce storage memory and transmission bandwidth, a video can be compressed before storage or transmission and decompressed before display. The compression process is usually called encoding, and the decompression process is usually called decoding. There are various video coding formats that use standardized video coding techniques, most commonly based on prediction, transformation, quantization, entropy coding, and in-loop filtering. Video coding standards, such as the High Efficiency Video Coding (HEVC / H.265) standard, the Versatile Video Coding (VVC / H.266) standard, and the AVS standard, that specify specific video coding formats, are developed by standardization organizations. As more advanced video coding techniques are adopted into video standards, the coding efficiency of the new video coding standards becomes higher. Summary of the Invention [Means for solving the problem]
[0004] Disclosure Summary
[0004] An embodiment of the present disclosure provides a computer-implemented method for performing motion compensated interpolation with reference resampling, which may include applying a band-pass filter to a reference picture and using the reference block to process a block of the target picture to perform motion compensated interpolation with reference downsampling according to the target picture and the reference picture having different resolutions to generate a reference block.
[0005]
[0005] An embodiment of the present disclosure further provides a system for performing motion compensation interpolation, which may include a memory storing a set of instructions and at least one processor, the at least one processor being configured to execute the set of instructions to cause an apparatus to perform motion compensation interpolation with reference downsampling to generate a reference block according to the target picture and the reference picture having different resolutions, apply a band-pass filter to the reference picture, and process a block of the target picture using the reference block.
[0006]
[0006] An embodiment of the present disclosure further provides a non-transitory computer-readable medium storing a set of instructions, the set of instructions being executable by at least one processor of the computer system to cause the computer system to perform a method for processing video content. The method may include, in response to the target picture and the reference picture having different resolutions, applying a band-pass filter to the reference picture to perform motion compensated interpolation with reference downsampling to generate a reference block, and processing a block of the target picture using the reference block.
[0007] BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying drawings, in which various features are not drawn to scale. [Brief description of the drawings]
[0008] [Figure 1]1 illustrates an exemplary video sequence structure consistent with embodiments of the present disclosure. [Figure 2A]
[0009] 1 shows a schematic diagram of an exemplary encoding process for a hybrid video coding system consistent with embodiments of the present disclosure. [Figure 2B]
[0010] 1 shows a schematic diagram of another exemplary encoding process of a hybrid video coding system consistent with embodiments of the present disclosure. [Figure 3A]
[0011] 1 shows a schematic diagram of an exemplary decoding process for a hybrid video coding system consistent with embodiments of the present disclosure. [Figure 3B]
[0012] 1 shows a schematic diagram of another example decoding process for a hybrid video coding system consistent with embodiments of the present disclosure. [Figure 4]
[0013] 1 is a block diagram of an exemplary device for encoding or decoding video consistent with embodiments of this disclosure. [Diagram 5]
[0014] 1 shows a schematic diagram of a reference picture and a current picture consistent with an embodiment of the present disclosure. [Figure 6]
[0015] 13 shows a table of example 6-tap DCT-based interpolation filter coefficients for a 4×4 luma block, consistent with embodiments of this disclosure. [Figure 7]
[0016] 13 shows a table of example 8-tap interpolation filter coefficients for the luma component, consistent with embodiments of this disclosure. [Figure 8]
[0017] 1 illustrates a table of example 4-tap 32-phase interpolation filter coefficients for chroma components, consistent with embodiments of the present disclosure. [Figure 9]
[0018] 1 illustrates a frequency response of an exemplary ideal low pass filter consistent with embodiments of the present disclosure. [Figure 10]
[0019] 1 illustrates a table of example 12-tap cosine windowed sinc interpolation filter coefficients for 2:1 downsampling consistent with embodiments of the present disclosure. [Figure 11]
[0020] 1 shows a table of example 12-tap cosine windowed sinc interpolation filter coefficients for 1.5:1 downsampling consistent with embodiments of the present disclosure. [Figure 12]
[0021] 1 illustrates an example luma sample interpolation filtering process for reference downsampling, consistent with embodiments of this disclosure. [Figure 13]
[0022] 1 illustrates an example chroma sample interpolation filtering process for reference downsampling consistent with embodiments of the present disclosure. [Figure 14] 1 illustrates an example luma sample interpolation filtering process for reference downsampling, consistent with embodiments of the present disclosure. [Figure 15] 1 illustrates an exemplary chroma sample interpolation filtering process for reference downsampling consistent with embodiments of the present disclosure. [Figure 16] 1 illustrates an example luma sample interpolation filtering process for reference downsampling consistent with embodiments of the present disclosure. [Figure 17] 4 illustrates an example chroma sample interpolation filtering process for reference downsampling consistent with embodiments of the present disclosure. [Figure 18] 5 illustrates an example chroma sample interpolation filtering process for reference downsampling consistent with embodiments of the present disclosure. [Figure 19] 1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 2:1, consistent with embodiments of the present disclosure. [Figure 20] 1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1, consistent with embodiments of the present disclosure. [Figure 21]1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 2:1 with 32 phases, consistent with embodiments of the present disclosure. [Figure 22] 1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1 with 32 phases, consistent with an embodiment of the present disclosure. [Diagram 23] 1 shows a table of example 6-tap filter coefficients for 4×4 luma block MC interpolation with reference downsampling ratio 2:1 having 16 phases, consistent with embodiments of the present disclosure. [Figure 24] 1 shows a table of example 6-tap filter coefficients for luma 4×4 block MC interpolation with reference downsampling ratio of 1.5:1 with 16 phases, consistent with embodiments of the present disclosure. [Diagram 25] 1 shows a table of an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 2:1, consistent with an embodiment of the present disclosure. [Figure 26] 1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1, consistent with embodiments of the present disclosure. [Figure 27] 1 shows an example 6-tap filter for MC interpolation with reference downsampling at a ratio of 2:1 with 16 phases, consistent with an embodiment of the present disclosure. [Figure 28] 1 shows an example 6-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1 with 16 phases, consistent with an embodiment of the present disclosure. [Figure 29] 1 shows an example 4-tap filter for MC interpolation with reference downsampling at a ratio of 2:1 with 32 phases, consistent with embodiments of the present disclosure. [Diagram 30]1 shows an example 4-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1 with 32 phases, consistent with an embodiment of the present disclosure. [Diagram 31] 1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 2:1, consistent with embodiments of the present disclosure. [Diagram 32] 1 shows an example 8-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1, consistent with embodiments of the present disclosure. [Diagram 33] 1 shows an example 6-tap filter for MC interpolation with reference downsampling at a ratio of 2:1 with 16 phases, consistent with an embodiment of the present disclosure. [Diagram 34] 1 shows an example 6-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1 with 16 phases, consistent with an embodiment of the present disclosure. [Diagram 35] 1 shows an example 4-tap filter for MC interpolation with reference downsampling at a ratio of 2:1 with 32 phases, consistent with embodiments of the present disclosure. [Diagram 36]
[0023] 1 illustrates an example 4-tap filter for MC interpolation with reference downsampling at a ratio of 1.5:1 with 32 phases, consistent with an embodiment of the present disclosure. [Figure 37]
[0024] 1 illustrates an example of signaling filter coefficients consistent with embodiments of the present disclosure. [Figure 38]
[0025] 1 illustrates an example syntax structure for signaling resampling ratios and corresponding filter sets, consistent with embodiments of the present disclosure. [Figure 39]
[0026] 1 is a flowchart of an exemplary method for processing video content consistent with embodiments of the present disclosure. [Diagram 40]
[0027] 1 is a flowchart of an example method for rounding filter coefficients of a cosine windowed sinc filter consistent with embodiments of this disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Detailed Description
[0028] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, in which the same numerals in different figures represent the same or similar elements unless otherwise indicated. The implementations described in the following description of the exemplary embodiments do not represent all implementations consistent with the present invention. Rather, they are merely examples of devices and methods consistent with aspects related to the present invention recited in the appended claims. Certain aspects of the present disclosure are described in more detail below. In case of conflict with terms and / or definitions incorporated by reference, the terms and definitions provided herein shall control.
[0010]
[0029] Video coding systems are often used to compress digital video signals, for example to reduce the storage space consumed or to reduce the transmission bandwidth consumption associated with such signals. With the increasing popularity of high definition (HD) video (e.g., having a resolution of 1920x1080 pixels) in various applications of video compression, such as online video streaming, video conferencing or video surveillance, there is a continuous need to develop video coding tools that can increase the efficiency of compressing video data.
[0011]
[0030] For example, video surveillance applications are more and more widely used in many application scenarios (e.g., security, traffic, environmental monitoring, etc.), and the number and resolution of surveillance devices are rapidly increasing. Many video surveillance application scenarios choose to provide users with HD video to capture more information, and HD video has more pixels per frame to capture such information. However, HD video bitstreams may have high bitrates that require high bandwidth for transmission and large space for storage. For example, a surveillance video stream with an average resolution of 1920x1080 may require as much as 4Mbps bandwidth for real-time transmission. Furthermore, video surveillance generally involves constant monitoring, which may be a big challenge for storage systems when storing video data. Therefore, the high bandwidth and large storage space demands of HD video have become the main limitations to the large-scale deployment of HD video in video surveillance.
[0012]
[0031] A video is a set of still pictures (or "frames") arranged in chronological order to store visual information. A video capture device (e.g., a camera) can be used to capture and store those pictures in chronological order, and a video playback device (e.g., a television, a computer, a smartphone, a tablet computer, a video player, or any end-user terminal with display capabilities) can be used to display such pictures in chronological order. Furthermore, in some applications, a video capture device can transmit captured videos in real time to a video playback device (e.g., a computer with a monitor) for surveillance, conferencing, live broadcast, etc.
[0013]
[0032] To reduce the storage space and transmission bandwidth required by such applications, the video may be compressed before storage and transmission, and decompressed before display. This compression and decompression may be implemented by software executed by a processor (e.g., a processor of a general-purpose computer) or dedicated hardware. A module for compression is generally called an "encoder," and a module for decompression is generally called a "decoder." The encoder and decoder may be collectively referred to as a "codec." The encoder and decoder may be implemented as various suitable hardware, software, or combinations thereof. For example, hardware implementations of the encoder and decoder may include circuitry such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, or any combination thereof. Software implementations of the encoder and decoder may include program code, computer executable instructions, firmware, or any suitable computer-implemented algorithm or process fixed in a computer-readable medium. Video compression and decompression may be implemented by various algorithms or standards, such as MPEG-1, MPEG-2, MPEG-4, H.26x series, etc. In some applications, a codec may decompress video from a first coding standard and recompress the decompressed video using a second coding standard, in which case the codec may be referred to as a "transcoder."
[0014]
[0033] A video coding process can identify and keep useful information that can be used to reconstruct a picture and ignore information that is not important for the reconstruction. If the ignored, unimportant information cannot be perfectly reconstructed, then such a coding process can be called "lossy". Otherwise, such a coding process can be called "lossless". Most coding processes are lossy, which is a tradeoff to reduce the required storage space and transmission bandwidth.
[0015]
[0034] Useful information of the picture being coded (called the "current picture") includes changes with respect to a reference picture (e.g. a previously coded and reconstructed picture). Such changes may include pixel position changes, luminance changes or color changes, of which position changes are the most important. Position changes of pixels representing an object may reflect the object's motion between the reference picture and the current picture.
[0016]
[0035] A picture that is coded without reference to another picture (i.e., such a picture is its own reference picture) is called an "I-picture". A picture that is coded using a past picture as a reference picture is called a "P-picture". A picture that is coded using both past and future pictures as reference pictures (i.e., the references are "bidirectional") is called a "B-picture".
[0017]
[0036] As mentioned above, video surveillance using HD video faces the challenge of high bandwidth and large storage demands. To address this challenge, the bit rate of the encoded video can be reduced. Among I-pictures, P-pictures, and B-pictures, I-pictures have the highest bit rate. Since the background of most surveillance videos is mostly static, one way to reduce the overall bit rate of the encoded video can be to use fewer I-pictures for video encoding.
[0018]
[0037] However, since I-pictures are generally not predominant in coded video, the improvement of using fewer I-pictures may be trivial. For example, in a typical video bitstream, the ratio of I-pictures, B-pictures, and P-pictures may be 1:20:9, and I-pictures may account for less than 10% of the total bitrate. In other words, in such an example, removing all I-pictures may only reduce the bitrate by 10%.
[0019]
[0038] 1 illustrates the structure of an example video sequence 100 consistent with embodiments of the present disclosure. Video sequence 100 may be live video or captured and archived video. Video 100 may be real video, computer-generated video (e.g., computer game video), or a combination thereof (e.g., real video with augmented reality effects). Video sequence 100 may be input from a video capture device (e.g., a camera), a video archive containing previously captured video (e.g., a video file stored in a storage device), or a video feed interface for receiving video from a video content provider (e.g., a video broadcast transceiver).
[0020]
[0039] As shown in FIG. 1, a video sequence 100 may include a series of pictures arranged in time along a timeline including pictures 102, 104, 106, and 108. Pictures 102-106 are consecutive, with more pictures between pictures 106 and 108. In FIG. 1, picture 102 is an I-picture whose reference picture is picture 102 itself. Picture 104 is a P-picture whose reference picture is picture 102, as indicated by the arrow. Picture 106 is a B-picture whose reference pictures are pictures 104 and 108, as indicated by the arrow. In some embodiments, the reference picture of a picture (e.g., picture 104) may not be immediately preceding or following that picture. For example, the reference picture of picture 104 may be a picture preceding picture 102. It should be noted that the reference pictures of pictures 102-106 are merely examples, and this disclosure does not limit the embodiments of the reference pictures to the examples shown in FIG.
[0021]
[0040] Typically, a video codec does not encode or decode an entire picture at once because such a task is computationally complex. Rather, a video codec may divide a picture into elementary segments and encode or decode a picture segment by segment. In this disclosure, such elementary segments are referred to as basic processing units ("BPUs"). For example, structure 110 in FIG. 1 illustrates an example structure of a picture (e.g., any of pictures 102-108) of video sequence 100. In structure 110, the picture is divided into 4x4 basic processing units, the boundaries of which are indicated by dashed lines. In some embodiments, the basic processing units may be referred to as "macroblocks" in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264 / AVC) and as "coding tree units" ("CTUs") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). Basic processing units can have variable sizes within a picture, such as 128x128, 64x64, 32x32, 16x16, 4x8, 16x32, or any arbitrary shape and size of pixels. The size and shape of the basic processing unit can be selected for a picture based on a balance between efficiency of coding and the level of detail one wishes to preserve within the basic processing unit.
[0022]
[0041] A basic processing unit may be a logical unit that may include various types of video data stored in a computer memory (e.g., in a video frame buffer). For example, a basic processing unit for a color picture may include a luma component (Y) representing achromatic luminance information, one or more chroma components (e.g., Cb and Cr) representing color information, and related syntax elements, and the luma and chroma components may have the same size basic processing unit. In some video coding standards (e.g., H.265 / HEVC or H.266 / VVC), the luma and chroma components may be referred to as "coding tree blocks" ("CTBs"). Any operation performed on a basic processing unit can be repeated on each of its luma and chroma components.
[0023]
[0042] Video coding has multiple operation stages, examples of which are detailed in Figures 2A-2B and 3A-3B. For each stage, the size of the basic processing unit may still be too large to process, and therefore may be further divided into segments referred to as "basic processing sub-units" in this disclosure. In some embodiments, the basic processing sub-units may be referred to as "blocks" in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264 / AVC), or as "coding units" ("CUs") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing sub-units may have the same or smaller size than the basic processing units. Similar to the basic processing units, the basic processing sub-units are also logical units that may include various types of video data (e.g., Y, Cb, Cr, and related syntax elements) stored in computer memory (e.g., in a video frame buffer). Any operation performed on a basic processing sub-unit can be repeated on each of its luma and chroma components. It should be noted that such division can be performed on further levels, depending on the processing needs. It should also be noted that different stages can use different schemes to divide the basic processing unit.
[0024]
[0043] For example, in a mode decision stage (one example of which is detailed in FIG. 2B), the encoder may decide which prediction mode (e.g., intra-picture prediction or inter-picture prediction) to use for a basic processing unit, which may be too large to make such a decision. The encoder may split the basic processing unit into multiple basic processing sub-units (e.g., CUs in H.265 / HEVC or H.266 / VVC) and decide the type of prediction for each individual basic processing sub-unit.
[0025]
[0044] In another example, in the prediction stage (one example of which is detailed in FIG. 2A), the encoder can perform prediction operations at the level of elementary processing sub-units (e.g., CUs). However, in some cases, elementary processing sub-units may still be too large to process. The encoder can further divide the elementary processing sub-units into smaller segments (e.g., called "prediction blocks" or "PBs" in H.265 / HEVC or H.266 / VVC) and perform prediction operations at that level.
[0026]
[0045] In another example, in the transform stage (one example of which is detailed in FIG. 2A), the encoder can perform a transform operation on the residual elementary processing sub-unit (e.g., CU). However, in some cases, the elementary processing sub-unit may still be too large to process. The encoder can further divide the elementary processing sub-unit into smaller segments (e.g., called "transform blocks" or "TBs" in H.265 / HEVC or H.266 / VVC) and perform the transform operation at that level. It should be noted that the division scheme for the same elementary processing sub-unit may be different between the prediction stage and the transform stage. For example, in H.265 / HEVC or H.266 / VVC, the prediction blocks and transform blocks of the same CU may have different sizes and numbers.
[0027]
[0046] In structure 110 of Figure 1, basic processing units 112 are further divided into 3x3 basic processing sub-units, the boundaries of which are shown by dotted lines. Different basic processing units of the same picture can be divided into basic processing sub-units in different ways.
[0028]
[0047] In some implementations, to provide video encoding and decoding with parallel processing and error resilience, a picture can be divided into regions for processing, so that for a region of a picture, the encoding or decoding process does not depend on information of any other region of the picture. In other words, each region of a picture can be processed independently. In this way, a codec can process different regions of a picture in parallel, thus increasing the efficiency of coding. Furthermore, if data of a region is corrupted in processing or lost in network transmission, the codec can correctly encode or decode other regions of the same picture without relying on the corrupted or lost data, thus providing error resilience. In some video coding standards, a picture can be divided into different types of regions. For example, H.265 / HEVC and H.266 / VVC provide two types of regions: "slices" and "tiles". It should also be noted that various pictures of the video sequence 100 may have different partitioning schemes for dividing the picture into regions.
[0029]
[0048] For example, in Figure 1, structure 110 is divided into three regions 114, 116, and 118, whose boundaries are shown as solid lines within structure 110. Region 114 includes four basic processing units. Regions 116 and 118 each include six basic processing units. It should be noted that the basic processing units, basic processing sub-units, and regions of structure 110 in Figure 1 are merely examples, and the present disclosure is not limited to such embodiments.
[0030]
[0049] FIG. 2A illustrates a schematic diagram of an example of an encoding process 200A consistent with embodiments of the present disclosure. For example, the encoding process 200A may be performed by an encoder. As shown in FIG. 2A, the encoder may encode a video sequence 202 into a video bitstream 228 according to the process 200A. Similar to the video sequence 100 of FIG. 1, the video sequence 202 may include a set of pictures (referred to as "original pictures") arranged in a chronological order. Similar to the structure 110 of FIG. 1, each original picture of the video sequence 202 may be divided by the encoder into basic processing units, basic processing sub-units, or regions for processing. In some embodiments, the encoder may perform the process 200A at the level of the basic processing units for each original picture of the video sequence 202. For example, the encoder may perform the process 200A in an iterative manner, and the encoder may encode a basic processing unit in one iteration of the process 200A. In some embodiments, the encoder may perform process 200A in parallel for each original picture region of video sequence 202 (eg, regions 114-118).
[0031]
[0050] In FIG. 2A , an encoder may feed a basic processing unit (referred to as an “original BPU”) of an original picture of a video sequence 202 to a prediction stage 204 to generate prediction data 206 and a predicted BPU 208. The encoder may subtract the predicted BPU 208 from the original BPU to generate a residual BPU 210. The encoder may feed the residual BPU 210 to a transform stage 212 and a quantization stage 214 to generate quantized transform coefficients 216. The encoder may feed the prediction data 206 and the quantized transform coefficients 216 to a binary coding stage 226 to generate a video bitstream 228. The components 202, 204, 206, 208, 210, 212, 214, 216, 226, and 228 may be referred to as a “forward path.” During process 200A, the encoder may feed quantized transform coefficients 216, after quantization stage 214, to an inverse quantization stage 218 and an inverse transform stage 220 to generate a reconstructed residual BPU 222. The encoder may add the reconstructed residual BPU 222 to a predicted BPU 208 to generate a prediction reference 224 that is used in the prediction stage 204 of the next iteration of process 200A. The components 218, 220, 222, and 224 of process 200A may be referred to as a "reconstruction path." The reconstruction path may be used to ensure that both the encoder and decoder use the same reference data for prediction.
[0032]
[0051] The encoder may iteratively perform process 200A to encode each original BPU of the original picture (in the forward path) and generate a predicted reference 224 for encoding the next original BPU of the original picture (in the reconstruction path). After encoding all the original BPUs of the original picture, the encoder may proceed to encode the next picture in the video sequence 202.
[0033]
[0052] Referring to process 200A, an encoder may receive a video sequence 202 generated by a video capture device (e.g., a camera). As used herein, the term "receive" may refer to any action of receiving, inputting, obtaining, retrieving, acquiring, reading, accessing, or any manner of inputting data.
[0034]
[0053] In the prediction step 204, in the current iteration, the encoder may receive the original BPU and a prediction reference 224 and perform a prediction operation to generate prediction data 206 and a predicted BPU 208. The prediction reference 224 may be generated from a reconstruction path of a previous iteration of the process 200A. The purpose of the prediction step 204 is to reduce information redundancy by extracting the prediction data 206, which may be used to reconstruct the original BPU from the prediction data 206 and the prediction reference 224 as a predicted BPU 208.
[0035]
[0054] Ideally, the predicted BPU 208 may be identical to the original BPU. However, due to non-ideal prediction and reconstruction operations, the predicted BPU 208 generally differs slightly from the original BPU. To record such differences, the encoder may generate the predicted BPU 208 and then subtract it from the original BPU to generate the residual BPU 210. For example, the encoder may subtract the values (e.g., grayscale values or RGB values) of pixels of the predicted BPU 208 from the values of corresponding pixels of the original BPU. As a result of such subtraction between the corresponding pixels of the original BPU and the predicted BPU 208, each pixel of the residual BPU 210 may have a residual value. Compared to the original BPU, the prediction data 206 and the residual BPU 210 may have fewer bits, but they can be used to reconstruct the original BPU without significant loss of quality.
[0036]
[0055] To further compress the residual BPU 210, in the transform stage 212, the encoder can reduce spatial redundancy in the residual BPU 210 by decomposing the residual BPU 210 into a set of two-dimensional "basis patterns," where each basis pattern is associated with a "transform coefficient." The basis patterns can have the same size (e.g., the size of the residual BPU 210). Each basis pattern can represent a variation frequency (e.g., luminance variation frequency) component of the residual BPU 210. None of the basis patterns can be reconstructed from any combination (e.g., a linear combination) of any other basis patterns. In other words, the decomposition can decompose the variation of the residual BPU 210 into the frequency domain. Such a decomposition is similar to a discrete Fourier transform of a function, the basis patterns are similar to basis functions (e.g., trigonometric functions) of the discrete Fourier transform, and the transform coefficients are similar to the coefficients associated with the basis functions.
[0037]
[0056] Different transform algorithms may use different basis patterns. Different transform algorithms may be used in transform stage 212, for example, discrete cosine transform, discrete sine transform, etc. The transform in transform stage 212 is reversible. That is, the encoder may reconstruct residual BPU 210 by the inverse operation of the transform (called "inverse transform"). For example, to reconstruct a pixel of residual BPU 210, the inverse transform may be to multiply the value of the corresponding pixel of the basis pattern by the associated respective coefficient and add the products to result in a weighted sum. In a video coding standard, both the encoder and the decoder may use the same transform algorithm (and thus the same basis pattern). Thus, the encoder may record only the transform coefficients from which the decoder can reconstruct residual BPU 210 without receiving the basis pattern from the encoder. Although the transform coefficients may have fewer bits compared to residual BPU 210, they may be used to reconstruct residual BPU 210 without significant loss of quality. Therefore, the residual BPU 210 is further compressed.
[0038]
[0057] The encoder can further compress the transform coefficients in the quantization stage 214. In the transform process, different basis patterns can represent different fluctuation frequencies (e.g., luminance fluctuation frequencies). Since the human eye is generally good at recognizing low-frequency fluctuations, the encoder can ignore the information of high-frequency fluctuations without causing significant quality degradation during decoding. For example, in the quantization stage 214, the encoder can generate quantized transform coefficients 216 by dividing each transform coefficient by an integer value (called a "quantization parameter") and rounding the quotient to its nearest neighbor. After such an operation, some transform coefficients of the high-frequency basis patterns can be converted to zero, and the transform coefficients of the low-frequency basis patterns can be converted to smaller integers. The encoder can ignore the zero-valued quantized transform coefficients 216, which further compresses the transform coefficients. The quantization process is also reversible, and the quantized transform coefficients 216 can be reconstructed into transform coefficients in the inverse operation of quantization (called "dequantization").
[0039]
[0058] The quantization stage 214 may be lossy because the encoder ignores the remainder of such a division in a rounding operation. Typically, the quantization stage 214 may contribute the greatest information loss in the process 200A. The greater the information loss, the fewer bits the quantized transform coefficients 216 may require. To obtain different levels of information loss, the encoder may use different values of the quantization parameter or any other parameter of the quantization process.
[0040]
[0059] In the binary coding stage 226, the encoder may use a binary coding technique, such as, for example, entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or any other lossless or lossy compression algorithm, to encode the prediction data 206 and the quantized transform coefficients 216. In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the encoder may encode other information in the binary coding stage 226, such as, for example, a prediction mode used in the prediction stage 204, parameters of the prediction operation, the type of transformation in the transformation stage 212, parameters of the quantization process (e.g., quantization parameters), encoder control parameters (e.g., bitrate control parameters), etc. The encoder may use the output data of the binary coding stage 226 to generate a video bitstream 228. In some embodiments, the video bitstream 228 may be further packetized for network transmission.
[0041]
[0060] Referring to the reconstruction path of process 200A, in an inverse quantization stage 218, the encoder may perform inverse quantization on the quantized transform coefficients 216 to generate reconstructed transform coefficients. In an inverse transform stage 220, the encoder may generate a reconstructed residual BPU 222 based on the reconstructed transform coefficients. The encoder may add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a prediction reference 224 to be used in the next iteration of process 200A.
[0042]
[0061] It should be noted that other variations of the process 200A can be used to encode the video sequence 202. In some embodiments, an encoder can perform the stages of the process 200A in a different order. In some embodiments, one or more stages of the process 200A can be combined into a single stage. In some embodiments, a single stage of the process 200A can be separated into multiple stages. For example, the transform stage 212 and the quantization stage 214 can be combined into a single stage. In some embodiments, the process 200A can include additional stages. In some embodiments, the process 200A can omit one or more stages in FIG. 2A.
[0043]
[0062] 2B shows a schematic diagram of another example encoding process 200B consistent with an embodiment of the present disclosure. Process 200B may be modified from process 200A. For example, process 200B may be used by an encoder conforming to a hybrid video coding standard (e.g., H.26x series). Compared to process 200A, the forward path of process 200B further includes a mode decision stage 230 and separates prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044. The reconstruction path of process 200B additionally includes a loop filter stage 232 and a buffer 234.
[0044]
[0063] Generally, prediction techniques can be classified into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., intra-picture prediction or "intra prediction") can use pixels of one or more neighboring BPUs already coded in the same picture to predict the current BPU. That is, the prediction reference 224 in spatial prediction can include neighboring BPUs. Spatial prediction can reduce the inherent spatial redundancy of a picture. Temporal prediction (e.g., inter-picture prediction or "inter prediction") can use regions of one or more already coded pictures to predict the current BPU. That is, the prediction reference 224 in temporal prediction can include coded pictures. Temporal prediction can reduce the inherent temporal redundancy of a picture.
[0045]
[0064] Referring to process 200B, in the forward path, the encoder performs prediction operations in a spatial prediction stage 2042 and a temporal prediction stage 2044. For example, in the spatial prediction stage 2042, the encoder may perform intra prediction. With respect to an original BPU of a picture being encoded, the prediction reference 224 may include one or more neighboring BPUs that are encoded (in the forward path) and reconstructed (in the reconstruction path) in the same picture. The encoder may generate the predicted BPU 208 by extrapolating the neighboring BPUs. Extrapolation techniques may include, for example, linear extrapolation or linear interpolation, polynomial extrapolation or polynomial interpolation, etc. In some embodiments, the encoder may perform extrapolation at a pixel level, such as by extrapolating the value of the corresponding pixel for each pixel of the predicted BPU 208. The neighboring BPUs used for extrapolation may be located relative to the original BPU from various directions, such as vertically (e.g., above the original BPU), horizontally (e.g., to the left of the original BPU), diagonally (e.g., bottom-left, bottom-right, top-left, or top-right of the original BPU), or any direction specified within the video coding standard used. In intra prediction, the prediction data 206 may include, for example, the positions (e.g., coordinates) of the neighboring BPUs used, the size of the neighboring BPUs used, parameters of the extrapolation, the orientation of the neighboring BPUs used relative to the original BPU, etc.
[0046]
[0065] In another example, in the temporal prediction stage 2044, the encoder may perform inter prediction. With respect to the original BPU of the current picture, the prediction reference 224 may include one or more pictures (called "reference pictures") that have been coded (in the forward path) and reconstructed (in the reconstruction path). In some embodiments, the reference pictures may be coded and reconstructed for each BPU. For example, the encoder may add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a reconstructed BPU. Once all the reconstructed BPUs of the same picture are generated, the encoder may generate the reconstructed picture as a reference picture. The encoder may perform an operation of "motion estimation" to look for a matching region within the range of the reference picture (called a "search window"). The position of the search window in the reference picture may be determined based on the position of the original BPU in the current picture. For example, the search window may be centered in the reference picture at a location having the same coordinates as the original BPU in the current picture and may extend over a predetermined distance. When the encoder identifies a region within the search window that is similar to the original BPU (e.g., by using a pel recursion algorithm, a block matching algorithm, etc.), the encoder can determine the region as a match region. The match region may have different (e.g., smaller, equal, larger, or differently shaped) dimensions than the original BPU. Because the reference picture and the current picture are separated in time in a timeline (e.g., as shown in FIG. 1), the match region can be considered to "move" to the position of the original BPU over time. The encoder can record the direction and distance of such movement as a "motion vector." If multiple reference pictures are used (e.g., like picture 106 in FIG. 1), the encoder can look for a match region for each reference picture and determine its associated motion vector. In some embodiments, the encoder can assign weights to the pixel values of the match region of each matching reference picture.
[0047]
[0066] Motion estimation can be used to identify various types of motion, such as, for example, translation, rotation, scaling, etc. In inter prediction, the prediction data 206 may include, for example, the location (e.g., coordinates) of the match region, a motion vector associated with the match region, a number of reference pictures, weights associated with the reference pictures, etc.
[0048]
[0067] To generate the predicted BPU 208, the encoder may perform an operation of "motion compensation." Motion compensation may be used to reconstruct the predicted BPU 208 based on the prediction data 206 (e.g., motion vectors) and the prediction reference 224. For example, the encoder may move the matching regions of the reference picture according to the motion vectors, in which the encoder may predict the original BPU of the current picture. If multiple reference pictures are used (e.g., such as picture 106 in FIG. 1), the encoder may move the matching regions of the reference pictures according to their respective motion vectors and average the pixel values of the matching regions. In some embodiments, if the encoder assigns weights to the pixel values of the matching regions of the respective matching reference pictures, the encoder may add a weighted sum of the pixel values of the moved matching regions.
[0049]
[0068] In some embodiments, inter prediction can be unidirectional or bidirectional. Unidirectional inter prediction can use one or more reference pictures in the same temporal direction relative to the current picture. For example, picture 104 in FIG. 1 is a unidirectional inter predicted picture in which the reference picture (i.e., picture 102) precedes picture 104. Bidirectional inter prediction can use one or more reference pictures in both temporal directions relative to the current picture. For example, picture 106 in FIG. 1 is a bidirectional inter predicted picture in which the reference pictures (i.e., pictures 104 and 108) are in both temporal directions relative to picture 104.
[0050]
[0069] Continuing to refer to the forward path of the process 200B, after the spatial prediction step 2042 and the temporal prediction step 2044, in a mode decision step 230, the encoder may select a prediction mode (e.g., one of intra prediction or inter prediction) for the current iteration of the process 200B. For example, the encoder may perform a rate distortion optimization technique, in which the encoder may select a prediction mode to minimize the value of a cost function depending on the bit rate of the candidate prediction mode and the distortion of the reconstructed reference picture under the candidate prediction mode. Depending on the prediction mode selected, the encoder may generate a corresponding predicted BPU 208 and predicted data 206.
[0051]
[0070] In the reconstruction path of the process 200B, if an intra prediction mode is selected in the forward path, after generating the prediction reference 224 (e.g., the current BPU being coded and reconstructed in the current picture), the encoder can feed the prediction reference 224 directly to the spatial prediction stage 2042 for later use (e.g., to extrapolate the next BPU of the current picture). If an inter prediction mode is selected in the forward path, after generating the prediction reference 224 (e.g., the current picture in which all BPUs are coded and reconstructed), the encoder can feed the prediction reference 224 to the loop filter stage 232, where the encoder can apply a loop filter to the prediction reference 224 to reduce or eliminate distortions (e.g., blocking artifacts) caused by inter prediction. The encoder can apply various loop filter techniques in the loop filter stage 232, such as, for example, deblocking, sample adaptive offset, adaptive loop filter, etc. The loop filtered reference picture may be stored in a buffer 234 (or a "decoded picture buffer") for later use (e.g., for use as an inter-predicted reference picture for future pictures of the video sequence 202). The encoder may store one or more reference pictures in the buffer 234 for use in the temporal prediction stage 2044. In some embodiments, the encoder may encode loop filter parameters (e.g., loop filter strength) in a binary coding stage 226 along with the quantized transform coefficients 216, the prediction data 206, and other information.
[0052]
[0071] FIG. 3A shows a schematic diagram of an example of a decoding process 300A consistent with an embodiment of the present disclosure. The process 300A may be a decompression process corresponding to the compression process 200A of FIG. 2A. In some embodiments, the process 300A may be similar to the reconstruction path of the process 200A. A decoder may decode the video bitstream 228 into a video stream 304 according to the process 300A. The video stream 304 may be very similar to the video sequence 202. However, due to information loss in the compression and decompression process (e.g., the quantization stage 214 of FIGS. 2A-2B), the video stream 304 is generally not identical to the video sequence 202. Similar to the processes 200A and 200B of FIGS. 2A-2B, the decoder may perform the process 300A at the level of a basic processing unit (BPU) for each picture encoded in the video bitstream 228. For example, the decoder may perform process 300A in an iterative manner, where the decoder may decode a basic processing unit in one iteration of process 300A. In some embodiments, the decoder may perform process 300A in parallel for a region (e.g., regions 114-118) of each picture encoded in video bitstream 228.
[0053]
[0072] In FIG. 3A, the decoder may feed a portion of the video bitstream 228 associated with a basic processing unit of a coded picture (referred to as a "coded BPU") to a binary decoding stage 302. In the binary decoding stage 302, the decoder may decode the portion into prediction data 206 and quantized transform coefficients 216. The decoder may feed the quantized transform coefficients 216 to an inverse quantization stage 218 and an inverse transform stage 220 to generate a reconstructed residual BPU 222. The decoder may feed the prediction data 206 to a prediction stage 204 to generate a predicted BPU 208. The decoder may add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a predicted reference 224. In some embodiments, the predicted reference 224 may be stored in a buffer (e.g., a decoded picture buffer in a computer memory). The decoder may feed the predicted reference 224 to the prediction stage 204 for performing a prediction operation in a next iteration of the process 300A.
[0054]
[0073] The decoder may iteratively perform the process 300A to decode each coded BPU of the coded picture and generate a predicted reference 224 for coding the next coded BPU of the coded picture. After decoding all coded BPUs of the coded picture, the decoder may output the picture to the video stream 304 for display and proceed to decode the next coded picture in the video bitstream 228.
[0055]
[0074] In the binary decoding stage 302, the decoder may perform an inverse operation of the binary coding technique used by the encoder (e.g., entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or any other lossless compression algorithm). In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the decoder may decode other information in the binary decoding stage 302, such as, for example, the prediction mode, parameters of the prediction operation, the type of transform, parameters of the quantization process (e.g., quantization parameters), encoder control parameters (e.g., bitrate control parameters), etc. In some embodiments, if the video bitstream 228 is transmitted in packets over the network, the decoder may depacketize the video bitstream 228 before feeding it to the binary decoding stage 302.
[0056]
[0075] 3B shows a schematic diagram of another example of a decoding process 300B consistent with an embodiment of the present disclosure. The process 300B may be modified from the process 300A. For example, the process 300B may be used by a decoder that complies with a hybrid video coding standard (e.g., H.26x series). Compared to the process 300A, the process 300B further divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044, and additionally includes a loop filter stage 232 and a buffer 234.
[0057]
[0076] In the process 300B, for a coded elementary processing unit (referred to as a "current BPU") of a coded picture being decoded (referred to as a "current picture"), the prediction data 206 decoded by the decoder in the binary decoding stage 302 may include various types of data depending on which prediction mode was used by the encoder to code the current BPU. For example, if intra prediction was used by the encoder to code the current BPU, the prediction data 206 may include a prediction mode indicator (e.g., a flag value) indicating intra prediction, parameters of the intra prediction operation, etc. The parameters of the intra prediction operation may include, for example, the location (e.g., coordinates) of one or more neighboring BPUs used as a reference, the size of the neighboring BPU, parameters of extrapolation, the direction of the neighboring BPU relative to the original BPU, etc. In another example, if inter prediction was used by the encoder to code the current BPU, the prediction data 206 may include a prediction mode indicator (e.g., a flag value) indicating inter prediction, parameters of the inter prediction operation, etc. Parameters for inter-prediction operations may include, for example, the number of reference pictures associated with the current BPU, weights respectively associated with the reference pictures, positions (e.g., coordinates) of one or more matching regions within each reference picture, one or more motion vectors respectively associated with the matching regions, etc.
[0058]
[0077] Based on the prediction mode indicator, the decoder may decide whether to perform spatial prediction (e.g., intra prediction) in the spatial prediction stage 2042 or temporal prediction (e.g., inter prediction) in the temporal prediction stage 2044. Details of performing such spatial or temporal prediction are shown in FIG. 2B and will not be repeated below. After performing such spatial or temporal prediction, the decoder may generate a predicted BPU 208. As described in FIG. 3A, the decoder may add the predicted BPU 208 and the reconstructed residual BPU 222 to generate a prediction reference 224.
[0059]
[0078] In the process 300B, the decoder can feed the predicted reference 224 to the spatial prediction stage 2042 or the temporal prediction stage 2044 for performing a prediction operation in the next iteration of the process 300B. For example, if the current BPU is decoded using intra prediction in the spatial prediction stage 2042, after generating the prediction reference 224 (e.g., the decoded current BPU), the decoder can directly feed the prediction reference 224 to the spatial prediction stage 2042 for later use (e.g., to extrapolate the next BPU of the current picture). If the current BPU is decoded using inter prediction in the temporal prediction stage 2044, after generating the prediction reference 224 (e.g., the reference picture to which all BPUs are decoded), the encoder can feed the prediction reference 224 to the loop filter stage 232 to reduce or eliminate distortion (e.g., blocking artifacts). The decoder can apply a loop filter to the prediction reference 224 in the manner described in FIG. 2B. The loop filtered reference pictures may be stored in a buffer 234 (e.g., a decoded picture buffer in a computer memory) for later use (e.g., for use as inter-prediction reference pictures for future encoded pictures of the video bitstream 228). The decoder may store one or more reference pictures in the buffer 234 for use in the temporal prediction stage 2044. In some embodiments, if the prediction mode indicator in the prediction data 206 indicates that inter prediction was used to encode the current BPU, the prediction data may further include loop filter parameters (e.g., loop filter strength).
[0060]
[0079] FIG. 4 is a block diagram of an example of a device 400 for encoding or decoding video consistent with an embodiment of the present disclosure. As shown in FIG. 4, the device 400 may include a processor 402. When the processor 402 executes instructions described herein, the device 400 may become a dedicated machine for encoding or decoding video. The processor 402 may be any type of circuitry capable of manipulating or processing information. For example, the processor 402 may include any combination of any number of central processing units ("CPUs"), graphics processing units ("GPUs"), neural processing units ("NPUs"), microcontroller units ("MCUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general purpose array logic (GALs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), systems on chips (SoCs), application specific integrated circuits (ASICs), and the like. In some embodiments, processor 402 may be a set of processors grouped together as a single logical entity. For example, as shown in FIG. 4, processor 402 may include multiple processors including processor 402a, processor 402b, and processor 402n.
[0061]
[0080] The device 400 may also include a memory 404 configured to store data (e.g., a set of instructions, computer code, intermediate data, etc.). For example, as shown in FIG. 4, the stored data may include program instructions (e.g., program instructions for implementing steps in a process 200A, 200B, 300A, or 300B) and data for processing (e.g., video sequence 202, video bitstream 228, or video stream 304). The processor 402 may access the program instructions and data for processing (e.g., via bus 410) and execute the program instructions to operate on or process the data for processing. The memory 404 may include high-speed random access storage or non-volatile storage. In some embodiments, the memory 404 may include any combination of any number of random access memories (RAMs), read-only memories (ROMs), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, and the like. Memory 404 may also be a collection of memories (not shown in FIG. 4) grouped together as a single logical entity.
[0062]
[0081] Bus 410 , such as an internal bus (eg, a CPU memory bus), an external bus (eg, a Universal Serial Bus port, a Peripheral Component Interconnect Express port), etc., may be a communication device that transfers data between components within device 400 .
[0063]
[0082] For ease of explanation and without ambiguity, the present disclosure refers to the processor 402 and other data processing circuitry collectively as the "data processing circuitry." The data processing circuitry may be implemented entirely as hardware, or as a combination of software, hardware, or firmware. In addition, the data processing circuitry may be a single, independent module, or may be fully or partially combined within any other component of the device 400.
[0064]
[0083] The device 400 may further include a network interface 406 for providing wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, a mobile communications network, etc.) In some embodiments, the network interface 406 may include any combination of any number of network interface controllers (NICs), radio frequency (RF) modules, transponders, transceivers, modems, routers, gateways, wired network adapters, wireless network adapters, Bluetooth adapters, infrared adapters, near field communication ("NFC") adapters, cellular network chips, etc.
[0065]
[0084] In some embodiments, device 400 may further optionally include a peripheral interface 408 for providing connection to one or more peripheral devices. As shown in Figure 4, the peripheral devices may include, but are not limited to, a cursor control device (e.g., a mouse, a touchpad or a touch screen), a keyboard, a display (e.g., a cathode ray tube display, a liquid crystal display or a light emitting diode display), a video input device (e.g., a camera or an input interface coupled to a video archive), and the like.
[0066]
[0085] It should be noted that a video codec (e.g., a codec performing processes 200A, 200B, 300A, or 300B) may be implemented as any combination of any software or hardware modules within device 400. For example, some or all of the stages of processes 200A, 200B, 300A, or 300B may be implemented as one or more software modules of device 400, such as program instructions loadable into memory 404. In another example, some or all of the stages of processes 200A, 200B, 300A, or 300B may be implemented as one or more hardware modules of device 400, such as dedicated data processing circuits (e.g., FPGAs, ASICs, NPUs, etc.).
[0067]
[0086] One of the key requirements of the VVC standard is to give videoconferencing applications the ability to tolerate network and device diversity, allowing them to rapidly adapt to changing network environments, including quickly lowering the coding bit rate when network conditions deteriorate and quickly increasing the video quality when network conditions improve. The expected video quality can vary from very low to very high. For adaptive streaming services offering multiple representations of the same content, each with different characteristics (e.g. spatial resolution or sample bit depth), the standard should also support fast representation switching. While switching from one representation to another (such as switching from one resolution to another), the standard should allow the use of efficient prediction structures without compromising the fast and seamless switching capability.
[0068]
[0087] The purpose of adaptive resolution change (ARC) is to allow a stream to change spatial resolution between coded pictures in the same video sequence without needing or requiring new IDR frames and without needing or requiring multiple layers as in scalable video codecs. Instead, at a switching point, a picture may change resolution and be predicted from a reference picture with the same resolution (if present) and a reference picture of a different resolution. If the reference pictures are of different resolutions, the reference pictures are resampled as shown in FIG. 5. For example, as shown in FIG. 5, the resolution of reference picture 506 is the same as that of current picture 502, but the resolutions of reference pictures 504 and 508 are different from that of current picture 502. After resampling reference pictures 504 and 508 to the resolution of current picture 502, motion compensated prediction can be made from those references. Therefore, adaptive resolution change (ARC) may also be referred to as reference picture resampling (RPR), and the two terms are used interchangeably in this disclosure.
[0069]
[0088] When the resolution of the reference frame is different from that of the current frame, one way to generate a motion-compensated prediction signal is picture-based resampling, in which the reference picture can first be resampled to the same resolution as the current picture and an existing motion compensation process involving motion vectors can be applied. The motion vectors can be scaled (if transmitted in units before resampling is applied) or unscaled (if transmitted in units after resampling is applied). In picture-based resampling, information may be lost within the reference resampling step before motion-compensated interpolation, especially with regard to downsampling of the reference picture (i.e., the resolution of the reference picture is larger than that of the current picture, since downsampling is usually achieved by low-pass filtering followed by decimation).
[0070]
[0089] Another method is block-based resampling, where resampling is done at the block level by looking at the reference pictures used by the current block, and if one or both of them have a different resolution than the current picture, the resampling is performed in combination with a motion compensated interpolation process that is more precise than pixel-by-pixel.
[0071]
[0090] In block-based resampling, combining resampling and motion compensation interpolation into one filtering operation may reduce the information loss mentioned above. Take the following case as an example: the motion vector of the current block has half-pixel accuracy in one dimension (e.g., horizontal dimension), and the width of the reference picture is twice that of the current picture. Compared with picture-level resampling, which reduces the width of the reference picture by half to match the width of the current picture and performs half-pixel motion interpolation, in this case, the block-based resampling method can directly obtain odd positions in the reference picture as reference blocks with half-pixel accuracy. In the 15th JVET conference, the block-based resampling method for ARC was adopted in VVC, in which motion compensation (MC) interpolation and reference resampling are combined and performed in one-step filter. In VVC draft 6, the existing filter for MC interpolation without reference resampling is reused for MC interpolation with reference resampling. The same filter is used for both reference upsampling and reference downsampling. The details of the filter selection are described below.
[0072]
[0091] For the luma component, if the half-pixel AMVR mode is selected and the interpolation position is half-pixel, a 6-tap filter [3,9,20,20,9,3] is used. If the motion compensated block size is 4x4, the following 6-tap filter is used as shown in Table 6 of Figure 6. Otherwise, the 8-tap filter is used as shown in Table 7 of Figure 7.
[0073]
[0092] For the chroma components, the following 4-tap filters are used, as shown in Table 8 of FIG.
[0074]
[0093] In VVC, the same filter is used for MC interpolation without reference resampling and MC interpolation with reference resampling. Although the motion compensation interpolation filter (MCIF) of VVC is designed based on DCT upsampling, it may be inappropriate to use MCIF as a one-step filter that combines reference downsampling and MC interpolation. For example, in phase 0 filtering (e.g., the motion vector to be scaled is an integer), the VVC 8-tap MCIF coefficients are [0,0,0,64,0,0,0,0], which means that the predicted samples are directly copied from the reference samples. While this may not be an issue for MC interpolation without reference downsampling or with reference upsampling, the case of reference downsampling may cause aliasing artifacts due to the lack of a low-pass filter before decimation.
[0075]
[0094] This disclosure provides a method for using a cosine windowed sinc filter for MC interpolation with reference downsampling.
[0076]
[0095] A window sinc filter is a bandpass filter that separates one frequency band from another. A window sinc filter is a lowpass filter with a frequency response that allows all frequencies below the cutoff frequency to pass with an amplitude of 1 and all frequencies above the cutoff frequency to stop with an amplitude of zero, as shown in Figure 9.
[0077]
[0096] Taking the inverse Fourier transform of the frequency response of an ideal low-pass filter gives the filter kernel, also known as the filter's impulse response. The impulse response of a low-pass filter is in the general form of a sinc function according to Equation (1) below:
number
number
[0078]
[0097] The sinc function is infinite. To create a filter kernel within a finite length, a window function is applied to truncate the filter kernel to the point L. To obtain a smooth tapered curve, a cosine window function based on the following equation (3) is used.
number
[0079]
[0098] The kernel of the cosine windowed sinc filter is the product of an ideal response function h(n) and a cosine window function w(n) based on the following equation (4):
number
[0080]
[0099] There are two parameters that are selected for the windowed sinc kernel: the cutoff frequency fc and the kernel length L. By adjusting the values of L and fc, a desired filter response can be achieved. For example, for the downsampling filter used in the Scalable HEVC Test Model (SHM), fc=0.9 and L=13.
[0081]
[0100] The filter coefficients obtained in equation (4) are real numbers. Applying the filter is equivalent to calculating a weighted average of the reference samples, with the weights being the filter coefficients. For efficient calculation in digital computers or hardware, the coefficients are normalized, multiplied by a scalar, and rounded to integers so that the sum of the coefficients is equal to 2^N (where N is an integer). The filtered sample is divided by 2^N (corresponding to a right shift of N bits). For example, in VVC draft 6, the sum of the interpolation filter coefficients is 64.
[0082]
[0101] In some embodiments, for both luma and chroma components, a downsampling filter can be used within the SHM for VVC motion compensated interpolation with reference downsampling, and an existing MCIF for motion compensated interpolation with reference upsampling can be used. While the kernel length L=13, the first coefficient is small and rounded to zero, allowing the filter length to be reduced to 12 without affecting the performance of the filter.
[0083]
[0102] As an example, filter coefficients for 2:1 downsampling and 1.5:1 downsampling are shown in Table 10 of FIG. 10 and Table 11 of FIG. 11, respectively.
[0084]
[0103] In addition to the coefficient values, there are several other differences between the SHM filter and existing MCIF designs.
[0085]
[0104] The first difference is that the SHM filter requires filtering at integer and fractional sample positions, whereas the MCIF only requires filtering at fractional sample positions. An example of a modification to the VVC Draft 6 luma sample interpolation filtering process for the reference downsampling case is given in Table 12 of the attached Figure 12.
[0086]
[0105] An example of a modification to the VVC Draft 6 chroma sample interpolation filtering process for the reference downsampling case is given in Table 13 of attached FIG.
[0087]
[0106] The second difference is that the SHM filter has a sum of 128 filter coefficients, whereas the existing MCIF has a sum of 64 filter coefficients. In VVC draft 6, the intermediate prediction signal is kept more precise (represented by a higher bit depth) than the output signal to reduce losses caused by rounding errors. The precision of the intermediate signal is called the internal precision. In some embodiments, to keep the internal precision the same as in VVC draft 6, the output of the SHM filter needs to be right-shifted by one additional bit compared to using the existing MCIF. An example of a modification to the VVC draft 6 luma sample interpolation filtering process for the reference downsampling case is shown in Table 14 of the accompanying FIG. 14.
[0088]
[0107] An example of a modification to the VVC Draft 6 chroma sample interpolation filtering process for the reference downsampling case is shown in Table 15 of accompanying FIG.
[0089]
[0108] According to some embodiments, the internal precision can be increased by 1 bit and an additional 1-bit right shift can be used to convert the internal precision to the output precision. An example of a modification to the VVC Draft 6 luma sample interpolation filtering process for the reference downsampling case is shown in Table 16 of Figure 16.
[0090]
[0109] An example of a modification to the VVC Draft 6 chroma sample interpolation filtering process for the reference downsampling case is shown in Table 17 of accompanying Figure 17.
[0091]
[0110] As a third difference, the SHM filter has 12 taps. Therefore, 11 adjacent samples (5 on the left and 6 on the right, or 5 above, or 6 below) are needed to generate an interpolated sample. Compared to MCIF, additional adjacent samples are taken. In VVC Draft 6, the chroma mv precision is 1 / 32. However, the SHM filter only has 16 phases. Therefore, the chroma mv can be rounded to 1 / 16 for reference downsampling. This rounding can be done by right-shifting the last 5 bits of the chroma mv by 1 bit. An example of a modification to the VVC Draft 6 chroma fractional sample position calculation for the reference downsampling case is shown in Table 18 of FIG. 18.
[0092]
[0111] According to some embodiments, it is proposed to use an 8-tap cosine windowed sinc filter to match existing MCIF designs in the VVC draft. The filter coefficients can be derived by setting L=9 in the cosine windowed sinc function in equation (4). To further match existing MCIF filters, the sum of the filter coefficients can be set to 64. In the disclosed embodiments, the filters for the complementary phases can be symmetric (e.g., the filter coefficients of the complementary phases are inverted) or asymmetric. Examples of filter coefficients for ratios of 2:1 and 1.5:1 are shown in Table 19 of FIG. 19 and Table 20 of FIG. 20, respectively.
[0093]
[0112] According to some embodiments, a 32-phase cosine windowed sinc filter set can be used for chroma motion compensated interpolation with reference downsampling to match the 1 / 32 sample precision of the chroma components. Example filter coefficients for ratios of 2:1 and 1.5:1 are shown in Table 21 of the accompanying Figure 21 and Table 22 of Figure 22, respectively.
[0094]
[0113] According to some embodiments, for 4x4 luma blocks, a 6-tap cosine windowed sinc filter can be used for MC interpolation with reference downsampling. Example filter coefficients for ratios of 2:1 and 1.5:1 are shown in Table 23 of the accompanying Figure 23 and Table 24 of Figure 24, respectively.
[0095]
[0114] In VVC, different interpolation filters are used in different motion compensation cases. For example, in normal motion compensation, an 8-tap DCT-based interpolation filter is used. In motion compensation for 4x4 sub-blocks, a 6-tap DCT-based interpolation filter is used. In motion compensation with 1 / 2 MVD precision and 1 / 2 MVD phase, a different 6-tap filter is used. In chroma motion compensation, a 4-tap DCT-based interpolation filter is used.
[0096]
[0115] In some embodiments, if the reference picture has a higher resolution than the picture currently being coded, the DCT-based interpolation filter may be replaced with a cosine windowed sinc filter of the same filter length. In these embodiments, for normal motion compensation, the 8-tap DCT-based interpolation filter may be replaced with an 8-tap cosine windowed sinc filter, and for 4×4 sub-block motion compensation, the 6-tap DCT-based interpolation filter may be replaced with a 6-tap cosine windowed sinc filter. For chroma motion compensation, the 4-tap DCT-based interpolation filter may be replaced with a 4-tap cosine windowed sinc filter. Furthermore, if the MVD precision is ½ and the phase is ½, a 6-tap DCT-based interpolation filter may be used for motion compensation. The selection of the filter may depend on the ratio between the resolution of the reference picture and the resolution of the current picture. Exemplary 8-tap, 6-tap, and 4-tap cosine windowed sinc filters for 2:1 and 1.5:1 downsampling ratios are shown in Tables 19-24 of Figures 19-24. The filters shown in Tables 25-30 of Figures 25-30 are symmetrical on complementary phases.
[0097]
[0116] The filter coefficients obtained in equation (4) are real numbers. After normalization and scaling, the filter coefficients can be rounded to integers. The sum of the filter coefficients, also known as the filter gain, represents the precision of the filter. In digital processing, the filter gain is usually set to 2^N. Due to rounding operations, the sum of the filter coefficients may not be equal to the filter gain (2^N). Further adjustments are made to the filter coefficients so that the sum of the filter coefficients is equal to the gain (2^N). In some embodiments, the adjustments include determining an appropriate rounding direction. The rounding direction may include rounding up or rounding down. Thus, the adjusted filter coefficients can be summed to the filter gain to minimize / maximize a cost function. In some embodiments, the cost function may be the sum of absolute differences (SAD) or the sum of squares error (SSE) between the rounded filter coefficients and the real filter coefficients before rounding. In some embodiments, the cost function may be the SAD or SSE between the frequency response of the rounded filter coefficients and the frequency response of a reference. The reference can be the real filter coefficients before rounding, or the frequency response of an ideal filter, or the frequency response of a filter with a longer length than the filter being designed. For example, when designing an 8-tap filter, the reference can be a 12-tap filter. Based on the above rounding method, another set of cosine windowed sinc filters with lengths of 8 taps, 6 taps, and 4 taps are illustrated in Tables 31-36 of Figures 31-36.
[0098]
[0117] In the application of adaptive resolution change, the downsampling process of the source picture and the upsampling process of the reconstructed picture may not be standardized, which means that the user can use any resampling filter. The filter selected by the user may not match the reference resampling filter, but the mismatch of the filters may cause poor performance. In some disclosed embodiments, the coefficients of the reference resampling filter are signaled in the bitstream. The encoder / decoder can use the user-defined filter for reference resampling. The signaling of the filter coefficients is illustrated in Tables 37 and 38 in Figures 37-38.
[0099]
[0118] The syntax structures illustrated in Tables 37 and 38 can be represented by high-level syntax such as a sequence parameter set (SPS), a picture parameter set (PPS), an adaptation parameter set (APS), and a slice header.
[0100]
[0119] The use of the user-defined RPR filters and the presence of the above exemplary syntax constructs may be controlled by flags in the high level syntax including the SPS, PPS, APS, slice headers, etc.
[0101]
[0120] Consistent with disclosed embodiments, hardware implementation may be more efficient if one or more of the signaled filters use a fixed filter length and filter norm. Thus, in some embodiments, the filter norm and / or filter taps may not be signaled, but may instead be implied (e.g., implied to be a default value defined in the standard). The filter norm, filter taps, filter precision, or maximum bit depth may be part of the encoder compatibility requirements.
[0102]
[0121] In some embodiments, the encoder may send a supplemental enhancement information (SEI) message to suggest which non-norm upsampling filter should be used at the receiving device after the picture is decoded. This SEI message is optional. However, the SEI message may allow a decoder using the proposed upsampling filter to obtain better video quality. To specify the proposed upsampling filter in such an SEI message, the filter coefficients() syntax structure in Table 31 (FIG. 31) may be used.
[0103]
[0122] FIG. 39 is a flow chart of an example method 3900 for processing video content consistent with embodiments of the present disclosure. In some embodiments, the method 3900 may be performed by a codec (e.g., an encoder using the encoding process 200A or 200B of FIGS. 2A-2B or a decoder using the decoding process 300A or 300B of FIGS. 3A-3B). For example, the codec may be implemented as one or more software or hardware components of a device (e.g., device 400) for encoding or converting a video sequence into another code. In some embodiments, the video sequence may be an uncompressed video sequence (e.g., video sequence 202) or a compressed video sequence to be decoded (e.g., video stream 304). In some embodiments, the video sequence may be a surveillance video sequence that may be captured by a surveillance device (e.g., video input device of FIG. 4) associated with a processor (e.g., processor 402) of the device. The video sequence may include multiple pictures. The device may perform the method 3900 at the picture level. For example, the device may process pictures one at a time in the method 3900. In another example, the device may process multiple pictures at a time in the method 3900. The method 3900 may include the following steps.
[0104]
[0123] In step 3902, in response to the target picture and the reference picture having different resolutions, a band-pass filter may be applied to the reference picture to perform motion compensated interpolation with reference downsampling to generate a reference block.
[0105]
[0124] The bandpass filter may be a cosine windowed sinc filter generated based on an ideal lowpass filter and a window function. For example, the kernel function f(n) of the cosine windowed sinc filter may be a product of an ideal lowpass filter h(n) and a window function w(n), which may be based on Equation (4).
[0106]
[0125] Therefore,
number
[0107]
[0126] The filter coefficients of the cosine windowed sinc filter may be rounded before application. Figure 40 is a flow chart of an example method 4000 for rounding the filter coefficients of a cosine windowed sinc filter consistent with embodiments of the present disclosure. It will be appreciated that method 4000 may be implemented independently of or as part of method 3900. Method 4000 may include the following steps:
[0108]
[0127] In step 4002, the real filter coefficients of the bandpass filter may be obtained.
[0109]
[0128] In step 4004, multiple rounding directions for the real filter coefficients may be determined respectively.
[0110]
[0129] In step 4006, multiple combinations of rounded filter coefficients may be generated by rounding the real filter coefficients according to multiple rounding directions, respectively.
[0111]
[0130] In step 4008, a combination of rounded filter coefficients that minimizes or maximizes the cost function may be selected from among the multiple combinations. In some embodiments, the cost function may be related to the rounded filter coefficients and a reference. The reference may be the real filter coefficients of the bandpass filter before rounding, the frequency response of an ideal filter, or the frequency response of a filter having a length longer than the bandpass filter. For example, if the reference may be the real filter coefficients of the bandpass filter before rounding, the cost function may be the sum of absolute differences (SAD) or the sum of squares error (SSE) between the rounded filter coefficients and the real filter coefficients before rounding. As another example, if the reference is the frequency response of an ideal filter, the cost function may be the SAD or SSE between the frequency response of the rounded filter coefficients and the frequency response of the ideal filter. As discussed above, the reference may also be the frequency response of a filter having a length longer than the bandpass filter. For example, if the bandpass filter is an 8-tap filter, the reference may be a 12-tap filter having a length longer than the 8-tap bandpass filter.
[0112]
[0131] The selected combination of rounded filter coefficients of the bandpass filter can be signaled in at least one of a sequence parameter set (SPS), a picture parameter set (PPS), an adaptation parameter set (APS), and a slice header along with syntax structures associated with the filter coefficients.
[0113]
[0132] It will be appreciated that the cosine windowed sinc filter is an 8-tap filter, a 6-tap filter, or a 4-tap filter, as shown in Tables 19-36 (FIGS. 19-36). In some embodiments, the bandpass filter may be determined to be one of an 8-tap filter, a 6-tap filter, and a 4-tap filter based on the ratio between the resolution of the reference picture and the resolution of the target picture.
[0114]
[0133] When applying a band-pass filter to a reference picture, luma or chroma samples can be obtained at fractional sample positions. Using the fractional sample positions, the filter coefficients of the obtained luma or chroma samples can be determined against a look-up table (e.g., Tables 19 to 36).
[0115]
[0134] 39, in step 3904, a block of the target picture may be processed using the reference block. For example, the block of the target picture may be coded or decoded using the reference block.
[0116]
[0135] In some embodiments, a non-transitory computer-readable storage medium is also provided that includes instructions, which may be executed by an apparatus (such as the disclosed encoder and decoder) to perform the above-described method. Typical non-transitory media include, for example, floppy disks, flexible disks, hard disks, solid state drives, magnetic tape or any other magnetic data storage medium, CD-ROMs, any other optical data storage medium, any physical medium with a pattern of holes, RAM, PROMs and EPROMs, flash EPROMs or any other flash memory, NVRAM, caches, registers, any other memory chips or cartridges, and networked versions of the same. An apparatus may include one or more processors (CPUs), input / output interfaces, network interfaces, and / or memory.
[0117]
[0136] The embodiments may be further described using the following clauses: 1. A computer-implemented method for performing motion compensated interpolation, comprising: According to the target picture and the reference picture having different resolutions, applying a band-pass filter to the reference picture to perform motion compensated interpolation with reference downsampling to generate a reference block; and Processing blocks of a target picture using reference blocks 23. A computer-implemented method comprising: 2. The method of claim 1, wherein the bandpass filter is a cosine windowed sinc filter generated based on an ideal lowpass filter and a window function. 3. The cosine windowed sinc filter uses the kernel function
number
number
number
number
[0118]
[0137] It should be noted that relative terms such as "first" and "second" herein are used merely to distinguish one entity or operation from another and do not require or imply any actual relationship or order between those entities or operations. Furthermore, the terms "comprise," "have," "contain," and "include," as well as other similar forms, are intended to be equivalent in meaning and are non-limiting in that the items following any one of these terms are not intended to be an exhaustive listing of such items or to be limited to only the items listed.
[0119]
[0138] As used herein, unless otherwise specified, the word "or" includes all possible combinations, unless impracticable. For example, if a database is stated to include A or B, the database can include A or B, or A and B, unless otherwise specified or impracticable. As a second example, if a database is stated to include A, B, or C, the database can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C, unless otherwise specified or impracticable.
[0120]
[0139] It will be understood that the above described embodiments can be implemented by hardware or software (program code), or a combination of hardware and software. If implemented by software, the software can be stored in the above computer readable medium. The software, when executed by a processor, can perform the disclosed method. The computational units and other functional units described in this disclosure can be implemented by hardware or software, or a combination of hardware and software. Those skilled in the art will also understand that multiple of the above modules / units can be combined into one module / unit, and each of the above modules / units can be further divided into multiple sub-modules / sub-units.
[0121]
[0140] In the above specification, the embodiments have been described with reference to numerous specific details that may vary from implementation to implementation. Certain adaptations and modifications to the described embodiments may be made. Other embodiments may become apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the present disclosure being indicated by the appended claims. The order of steps depicted in the figures is for illustrative purposes only and is not intended to be limited to the particular order of steps. As such, one skilled in the art can appreciate that the steps may be performed in different orders while implementing the same method.
[0122]
[0141] Although illustrative embodiments have been disclosed in the drawings and herein, many variations and modifications thereto may be made, and therefore, although specific terms have been employed, they are used in a generic and descriptive sense only and not for purposes of limitation.
Claims
1. 1. A computer-implemented method for processing video content, comprising: encoding or decoding a picture block by applying a first filter to a reference picture; said applying said first filter includes both motion compensated interpolation and downsampling of said reference picture; the first filter is a bandpass filter having integer coefficients derived from a cosine windowed sinc function; the first filter is an 8-tap filter having 16 phases, the plurality of integer coefficients including: 【Table 1】 or the first filter is a 4-tap filter having 32 phases, wherein the plurality of integer coefficients comprises: 【Table 2】
2. The method of claim 1 , wherein the sum of the integer coefficients is equal to a power of two.
3. The integer coefficients are: calculating a plurality of values based on the cosine windowed sinc function; and rounding said values to obtain a plurality of integers, respectively; The method of claim 1 , wherein the cosine windowed sinc function is derived by:
4. The rounding of the plurality of values comprises: such that the sum of the rounded integers is equal to a power of two; and The method of claim 3 , comprising minimizing or maximizing a cost function associated with the first filter.
5. The cost function is: the rounded integers; and the plurality of values; 5. The method of claim 4, wherein the sum of absolute differences (SAD) or sum of squares errors (SSE) between each of the
6. The cost function is: the rounded integer frequency response; and Frequency response of multiple reference coefficients and 5. The method of claim 4, wherein the sum of absolute differences (SAD) or sum of squares errors (SSE) between each of the
7. The plurality of reference coefficients are the plurality of values calculated based on the cosine windowed sinc function; or Coefficients of the second filter The method of claim 6, comprising:
8. The method of claim 7 , wherein the second filter has more taps than the first filter.
9. 1. A system for processing video content, comprising: a memory for storing a set of instructions; at least one processor, the at least one processor comprising: Encoding or decoding a picture block by applying a first filter to a reference picture configured to execute the set of instructions to cause the system to said applying said first filter includes both motion compensated interpolation and downsampling of said reference picture; the first filter is a bandpass filter having integer coefficients derived from a cosine windowed sinc function; the first filter is an 8-tap filter having 16 phases, the plurality of integer coefficients including: 【Table 1】 Or, the first filter is a 4-tap filter having 32 phases, where the plurality of integer coefficients includes: 【Table 2】 10. A method for storing a video bitstream, the method comprising: encoding one or more pictures of a video sequence by applying a first filter to a reference picture to encode the picture blocks to generate a bitstream; storing the bitstream in a non-transitory computer readable storage medium; Including, said applying said first filter includes both motion compensated interpolation and downsampling of said reference picture; the first filter is a bandpass filter having integer coefficients derived from a cosine windowed sinc function; the first filter is an 8-tap filter having 16 phases, the plurality of integer coefficients including: 【Table 1】 Or, the first filter is a 4-tap filter having 32 phases, where the plurality of integer coefficients includes: 【Table 2】
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