Connector with alignment mechanism

By adopting a shielded ypass connector module in electronic devices, the problem of poor signal allocation caused by motherboard interface bottlenecks when electronic devices deal with high-speed and low-speed signals is solved, and efficient signal allocation and improvement of equipment performance is achieved.

JP7654721B2Active Publication Date: 2025-04-01MOLEX INC
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
JP2023120632
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2022-07-26
Filing Date
2023-07-25
Publication Date
2025-04-01
Estimated Expiration
2043-07-25

AI Technical Summary

Technical Problem

When existing electronic devices process high-speed and low-speed signals, they are prone to poor signal allocation due to motherboard interface bottlenecks, affecting the efficiency and performance of the equipment.

Method used

An electronic device with a shielded ypass connector module is used, which uses a connector module containing multiple terminals to direct the high-speed signal to the external connection point using a high-speed cable, while the low-speed signal is processed through the motherboard, thereby achieving "hybrid" or "ypass" distribution of the signal.

Benefits of technology

In this way, electronic devices can effectively avoid the bottlenecks of motherboard interfaces, improve signal distribution efficiency and overall performance of equipment, while reducing the density of the motherboard, and support long-distance high-speed signal transmission.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007654721000001
    Figure 0007654721000001
  • Figure 0007654721000002
    Figure 0007654721000002
  • Figure 0007654721000003
    Figure 0007654721000003
Patent Text Reader

Abstract

To receive and transmit high-speed and low-speed data in a "hybrid" manner, thereby avoiding overloading or limiting by a host board.SOLUTION: An electronic device 100 includes a bypass connector module 120 configured to mate with an external plug. The bypass connector module 120 includes a module housing, a first wafer, a second wafer, a first wafer terminal set, a second wafer terminal set, and a tail alignment structure. The module housing facilitates fixing and proper arrangement inside receptacles 106, 108 and on a host board 110. In cooperation with shield assemblies 122, 124, signals transmitted through the bypass connector module 120 are protected from interference. A low-speed signal and power from the external plug are transmitted to the host board 110, and a high-speed signal from the external plug is transmitted to cables 112, 114 to avoid overloading or limiting by the host board 110.SELECTED DRAWING: Figure 4
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present disclosure relates generally to electronic devices, and more particularly, to electronic devices having a shielded bypass connector module.

[0002] A small form-factor pluggable (SFP) interface is a compact, hot-pluggable network interface connection module that can be used for a variety of purposes, including telecommunications and data communications applications. Such SFP interfaces in electronic devices of a networking hardware system are modular receptacles that are shaped and configured to accept cable plugs, such as from optical fiber or copper cables. Electronic devices can receive both high-speed and low-speed signals through the interface, and thus manufacturers strive to design devices that efficiently handle all such signals. Summary of the Invention

[0003] The present disclosure provides an electronic device having a shielded bypass connector module.

[0004] In one aspect, the disclosure provides an electronic device including a first connector module having a first longitudinal end, a second longitudinal end, a first vertical side, and a second vertical side, the first connector module configured to mate with an external plug at the first longitudinal end, the first connector module including a first set of terminals, each terminal of the first set having a first end and a second end, the first ends of the first set of terminals arranged to engage an external plug at the first longitudinal end, a first wafer supporting the first set of terminals such that a first one or more of the second ends of the first set of terminals are bent to form a first set of tails, and a second one or more of the second ends of the first set of terminals terminate within the first wafer, and a tail disposed proximate to the first wafer to receive and support the first set of tails as the first set of tails extend from the second vertical side of the first connector module. The electronic device further includes a cable arrangement extending from the second longitudinal end of the first connector module, forming a connection with a second one or more of the first set of second ends, a host substrate disposed proximate to the second vertical side of the first connector module and configured to form an electrical connection with the first set of tails, and a shield assembly surrounding at least the first longitudinal end, the second longitudinal end, and the first vertical side of the first connector module when the first tail of the first connector module is engaged with the host substrate.

[0005] The details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features and advantages will become apparent from the description, drawings, and claims. [Brief description of the drawings]

[0006] [Figure 1] 1 is a partial schematic isometric view of an electronic device having a bypass connector module in accordance with an illustrative embodiment; [Diagram 2] 2 is a partial isometric view of the electronic device of FIG. 1 in accordance with an exemplary embodiment. [Diagram 3] 2 is a further isometric view of the electronic device of FIG. 1 in accordance with an exemplary embodiment. [Figure 4]2 is a partial exploded view of a portion of the electronic device of FIG. 1 in accordance with an exemplary embodiment. [Diagram 5] 5 is a cross-sectional view of the electronic device of FIG. 4 taken along line 5-5 according to an exemplary embodiment. [Figure 6] 6 is a partial exploded view of the electronic device of FIG. 5 in accordance with an exemplary embodiment. [Figure 7] 6 is a further partial exploded view of the electronic device of FIG. 5 in accordance with an exemplary embodiment. [Figure 8] 2 is an end view of a cable that may be incorporated into the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 9] 2 is a first isometric view of a bypass connector module that may be incorporated into the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 10] 2 is a second isometric view of a bypass connector module that can be incorporated into the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 11] 2 is a third isometric view of a bypass connector module that may be incorporated into the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 12] FIG. 12 is an exploded view of the bypass connector module of FIGS. 9-11 according to an exemplary embodiment. [Figure 13] 12 is a further exploded view of the bypass connector module of FIGS. 9-11 according to an exemplary embodiment. FIG. [Figure 14] 12 is a further exploded view of the bypass connector module of FIGS. 9-11 according to an exemplary embodiment. FIG. [Figure 15] FIG. 15 is a closer side view of the bypass connector module of FIGS. 9-14 according to an exemplary embodiment. [Figure 16] FIG. 16 is an isometric view of a module housing of the bypass connector module of FIGS. 9-15 according to an exemplary embodiment. [Figure 17] 16 is a further isometric view of the module housing of the bypass connector module of FIGS. 9-15 according to an exemplary embodiment. FIG. [Figure 18]FIG. 16 is an isometric view of the top wafer of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. [Figure 19] 16 is a further isometric view of the top wafer of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 20] 16 is a further isometric view of the top wafer of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 21] FIG. 16 is an isometric view of the lower wafer of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. [Figure 22] 16 is a further isometric view of the lower wafer of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 23] 16 is an isometric view of a tail alignment structure of the bypass connector module of FIGS. 9-15 according to an exemplary embodiment. FIG. [Figure 24] FIG. 16 is a partial exploded view of a portion of the bypass connector module of FIGS. 9-15 according to an exemplary embodiment. [Diagram 25] FIG. 16 is a partial isometric view of the bypass connector module of FIGS. 9-15 with portions removed for clarity, according to an exemplary embodiment. [Figure 26] 16 is a further isometric view of at least a portion of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 27] 16 is a further isometric view of at least a portion of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 28] 16 is a further partially exploded view of at least a portion of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 29] 16 is a further partially exploded view of at least a portion of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 30] 16 is a further partially exploded view of at least a portion of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 31]16 is a cross-sectional view of the bypass connector module of FIGS. 9-15 according to an exemplary embodiment. FIG. [Diagram 32] 16 is a further isometric view of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 33] 16 is a further isometric view of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 34] 16 is a partial exploded view of at least a portion of a shield assembly of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 35] 16 is a further partially exploded view of at least a portion of the shield assembly of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Diagram 36] 16 is a further partially exploded view of at least a portion of the shield assembly of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 37] 16 is a further partially exploded view of at least a portion of the shield assembly of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 38] 16 is a further partially exploded view of at least a portion of the shield assembly of the bypass connector module of FIGS. 9-15 in accordance with an exemplary embodiment. FIG. [Figure 39] FIG. 40 is an isometric view of an upper shield cover of the shield assembly of FIGS. 34-38 according to an exemplary embodiment. [Diagram 40] FIG. 39 is an isometric view of a shield tray of the shield assembly of FIGS. 34-38 according to an exemplary embodiment. [Diagram 41] FIG. 39 is an isometric view of a receptacle bulkhead of the shield assembly of FIGS. 34-38 in accordance with an exemplary embodiment. [Diagram 42] FIG. 39 is an isometric view of a rear shield plate of the shield assembly of FIGS. 34-38 in accordance with an exemplary embodiment. [Diagram 43] FIG. 39 is an isometric view of a receptacle frame of the shield assembly of FIGS. 34-38 according to an exemplary embodiment. [Diagram 44]2 is a partial cross-sectional view of the electronic device of FIG. 1 according to an exemplary embodiment. [Diagram 45] 2A-2C are first isometric views of assembly steps of the electronic device of FIG. 1 according to an exemplary embodiment. [Diagram 46] 2 is an isometric view of a further assembly step of the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 47] 2 is a partial end view of the electronic device of FIG. 1 in accordance with an exemplary embodiment. [Figure 48] 2 is a cross-sectional view of the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 49] 2 is a first view of a terminal tail mating with a host substrate in the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 50] 2 is a second view of a terminal tail mating with a host substrate in the electronic device of FIG. 1 according to an exemplary embodiment. [Figure 51] 2 is a first view of a terminal tail mating with a host substrate in the electronic device of FIG. 1 according to an exemplary embodiment.

[0007] Like reference numbers in the various drawings indicate like elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In the following, one or more exemplary embodiments of the disclosed electronic device having a shield bypass connector module are described, as shown in the accompanying figures of the drawings briefly described above. Various modifications to the exemplary embodiments may be contemplated by those skilled in the art.

[0009] In the embodiments described herein, directional terms (e.g., top, bottom, front, anterior, side, upper, lower, distal, and rear) may be used to describe the structure and orientation of various elements, but these terms should be considered relative to one another in a particular example and should not be considered as absolute limitations. Similarly, the orientation conventions referring to longitudinal (e.g., along the axis of extension or x-axis), lateral (e.g., lateral, along the y-axis, orthogonal to the longitudinal orientation), and vertical (e.g., up and down, along the z-axis, orthogonal to the longitudinal and lateral orientations) should be considered as internal relative descriptions, not absolute orientations. Furthermore, as can be understood, some of the following description relates to signal transmission. Signals are often referred to as low speed or high speed by those skilled in the art depending on the data rate (low data rates are referred to as low speed data or signals, and high data rates are referred to as high speed data or signals), and such references should be considered within the appropriate context.

[0010] Typically, an input / output (I / O) interface of an electronic device in a networking or communication device receives data at a plug receptacle and routes such data to surface mounted terminals on a printed circuit board (or host substrate) for processing and / or transmission. As ever-increasing speeds are required, the interconnects on and within the host substrate can become a bottleneck, challenging the electronic device's ability to distribute signals effectively.

[0011] In accordance with the disclosure provided herein, an electronic device can use an array of shield bypass connector modules to receive and transfer high speed and low speed data provided in a "hybrid" manner, where a portion of the data (e.g., low speed data) is directed to a host board and another portion of the data (e.g., high speed data) is directed to another connection away from the host board, thereby avoiding overloading or throttling by the host board.

[0012] As an example, the bypass connector module may be configured as a small form-factor pluggable (SFP) connection for various applications. Such a connector module may be formed by stacked wafers supporting terminal sets, solidified by an overmolded portion, placed in a tail alignment structure, and housed within a module housing. High speed cables (typically twin-ax cables) are connected to appropriate terminals in the wafers to direct high speed signals to a selected more preferred location away from the host board (e.g., to a network connection), while other terminals in the wafer are bent approximately 90° into tails that extend from the underside of the bypass connector module through the tail alignment structure. The terminal tails are configured to mate with the host board via eye-of-the-needle (EON) connections. Thus, high speed signals may be connected to the high speed cables to avoid the host board, while low speed signals may be mounted to the host board, thereby resulting in the "hybrid" or "bypass" nature of the connector module. Such hybrid or bypass dual distribution allows for the accommodation of a variety of signals, reduces host board density, and supports remote high speed signal transmission.

[0013] The embodiments presented herein are suitable for use with high speed data signal transmission line systems that support high data rates with low loss from a chip or processor, etc. Such configurations are useful for what are considered high speed data applications in excess of 10 Gbps and above, including 112 Gbps applications.

[0014] In addition to the hybrid connector modules providing better distribution of signals, groups of connector modules may be shielded with one or more shielding assemblies that cover all six sides of the array of connector modules (e.g., the front, back, top, bottom, and each lateral side), as well as between the individual modules. Such shielding assembly elements can overlap and cooperate to improve the EMI performance of the electronic device.

[0015] Reference is now made to Figure 1, which is a partial schematic isometric view of an electronic device (or computing device) 100, e.g., a switch, router, etc. Generally, the electronic device 100 has a device housing 102 (shown diagrammatically) for at least partially housing the various components described herein. By way of introduction, reference is further made to Figures 2 and 3, which are respectively a partial, closer front isometric view and a partial, closer back isometric view of the electronic device 100, with the housing 102 removed.

[0016] 2 illustrates an example plug 104 that may form a physical and electronic connection with electronic device 100 by inserting plug 104 into one of an array of plug receptacles 106, 108, particularly those formed proximate a front surface of electronic device 100. Generally, and as described in more detail below, electronic device 100 receives and / or exchanges signals or power using signals or power provided by plug 104. Receptacles 106, 108 may form a small form-factor pluggable (SFP) interface, as introduced above.

[0017] Electronic device 100 includes a “host substrate” (or “chip”) 110, broadly referring to an internal on-board chip or chip package incorporating one or more processors or integrated circuits to facilitate the performance of various computing functions. Host substrate 110 may support an integrated circuit such as an ASIC or any other type of processor or FPGA, or may be one or more separate integrated circuits arranged together on a substrate. However, host substrate 110 may have any suitable mechanism for input and output (e.g., solder bumps, contacts, traces, etc.), and in one example, module 120 may interface with host substrate 110 with “eye of the needle” (EON) connections, with module 120 passing through vias to contacts supported within host substrate 110.

[0018] A first portion of the signal (and / or power) received at the plug receptacles 106, 108 is sent to the host board 110 for further processing, and another or second portion of the signal (and / or power) received by the plug receptacles 106, 108 is not sent to the host board 110. In particular, the second portion of the signal may be sent to any other location within the device 100, in this example, via one or more groups of cables 112, 114 to one or more external connection assemblies 116, 118. The external connection assemblies 116, 118 provide electronic connections to further devices or systems. In general, the term "external connection" refers to a connection location for the cables 112, 114, which is different from the host board 110. By way of example, the external connection assemblies 116, 118 may be a backplane device, a motherboard, a network connection, or a server connection. Generally, the first set of signals transmitted to the host substrate 110 are relatively low speed signals and the second set of signals transmitted to the external connection assemblies 116, 118 are relatively high speed signals. Although not shown, the electronic device 100 may further include any suitable devices and elements associated with a computer or communications equipment, including power elements, cooling elements, memory components, additional input and output interfaces, interconnects, etc.

[0019] With further reference to Figure 4, Figure 4 is a partial isometric view of electronic device 100, which has been partially exploded to provide an additional interior view. As shown, a bypass connector module 120 (or "first" bypass connector module) is disposed at the distal end of each of the first plug receptacles 106, e.g., six bypass connector modules 120 of the six plug receptacles 106. As described in more detail below, each bypass connector module 120 provides a "hybrid" or "bypass" connection function, where low speed signals and power from the connected plugs 104 of the respective first plug receptacle 106 are transmitted to the host board 110, and high speed signals from the plugs 104 are transmitted to one or more of the cables 112 and then to the external connection assembly 116. Although not visible in FIG. 4, a connector module (or a "second" connector module) is disposed at the distal end of each of the second plug receptacles 108 and performs a similar function, for example providing a hybrid or bypass connection function, whereby low-speed signals and power from the connected plugs 104 in each second plug receptacle 108 are transmitted to the host board 110 and high-speed signals from the plugs 104 are transmitted to one or more of the cables 114 and then to the external connection assembly 118.

[0020] The first shield assembly 122 functions to shield the bypass connector module 120 from electromagnetic interference (partially exploded in FIG. 4). Similarly, the second shield assembly 124 functions to shield the second connector module (not visible in FIG. 4). The first plug receptacle 106, the first bypass connector module 120, and the first shield assembly 122 (collectively, the "array of shielded bypass connector modules") are disposed on a first (or top) side of the host substrate 110, and the second plug receptacle 108, the connector module (not visible in FIG. 4), and the second shield assembly 124 are disposed on a second (or bottom) side of the host substrate 110. Any number of bypass connector modules 120 may be provided, as well as any number of arrays of shielded bypass connector modules. For example, other embodiments may provide only one array of shielded bypass connector modules (e.g., the second shield assembly 124 and the receptacle 108 may be omitted), or two or more such shielded arrays may be provided. Unless otherwise stated, the characteristics of an array of shield bypass connector modules described herein are applicable to any such shield bypass connector module.

[0021] 5-7, which are various partial cross-sectional and partially exploded isometric views of electronic device 100. In particular, the view of FIG. 5 shows bypass connector module 120 at the distal end of a respective plug receptacle 106, with a portion of shield assembly 122 removed for clarity. As shown, bypass connector module 120 is positioned to mate with plug 104 (not shown in FIGS. 5-7), and further forms an electronic connection with host substrate 110 below bypass connector module 120, cable 112 extending from a rear of bypass connector module 120. As introduced in FIGS. 6 and 7 and described in more detail below, during assembly, bypass connector module 120 may be connected to cable 112, inserted and secured within receptacle 106 formed at least in part by shield assembly 122, and then connected to host substrate 110, although assembly steps may vary.

[0022] Briefly, reference is made to Figure 8, which, as discussed above, is an isolated end view of one of the cables 112 commonly used to carry high speed data. In one example, the cable 112 may be a "twin-ax" cable comprising two cable wires 130a, 130b, which in some examples are surrounded by one or more shield wires 132a, 132b. Additional details regarding the cable 112 and the connections to one or more of the terminal sets 210, 230 are provided below.

[0023] The bypass connector module 120 will now be described in more detail with reference to Figures 9-32. Reference is initially made to Figures 9-14, which are various exploded isometric views of the bypass connector module 120, in accordance with an exemplary embodiment. The views of Figures 9 and 11 may be considered top isometric views of the bypass connector module 120, with the connector module 120 having portions of the shield assembly 122 (i.e., individual rear shields 280) removed for clarity, and Figure 10 may be considered a bottom isometric view. Figures 11-13 are various exploded views of the bypass connector module 120.

[0024] 14, the bypass connector module 120 may generally be considered to include a module housing 140, a first (or upper) wafer 170, a second (or lower) wafer 190, a first (or upper) wafer terminal set 210, a second (or lower) wafer terminal set 230, a tail alignment structure 250, and one or more overmolded structures 270, 272. Each bypass connector module 120 may also be considered to include or be associated with a respective rear shield 280, which may be considered part of the shield assembly 122.

[0025] As shown, the module housing 140 generally at least partially houses the wafers 170, 190, the terminal sets 210, 230, the tail alignment structure 250, and the overmolded structures 270, 272. It facilitates fixation and proper alignment within each receptacle 106 (see, e.g., FIGS. 5-7) and on the host substrate 110, and cooperates with the shield assembly 122 to ensure that signals transmitted through the bypass connector module 120 are properly protected from interference. The module housing 140, the wafers 170, 190, and the tail alignment structure 250 may be formed from any suitable material, including a thermoplastic such as liquid crystal polymer (LCP). The overmolded structures 270, 272 may be formed from any suitable material, including a thermoplastic such as polypropylene (PP).

[0026] Further information regarding module housing 140 is provided with reference to FIG. 15, which is a more detailed view of one side of module housing 140, and to FIGS. 16 and 17, which are isolated isometric views of module housing 140.

[0027] In one example, the module housing 140 may be considered to include a body 142 forming a first (or front or front) body portion 144 facing toward the front of the electronic device 100 and a second (or distal or rear) body portion 146 facing toward the interior of the electronic device 100. The front body portion 144 generally functions to house portions of the terminal sets 210, 230 to facilitate connection with the plug 104, and the distal body portion 146 generally functions to house portions of the wafers 170, 190, the terminal sets 210, 230, and the tail alignment structure 250, which facilitate connection between the terminal sets 210, 230 and the host board 110 or between the terminal sets 210, 230 and the cables 112, 114.

[0028] As shown, the front body portion 144 of the module housing body 142 can be considered to have one or more walls (or faces) 148a-d, including a top wall 148a, a bottom wall 148b, and lateral side walls 148c, 148d. The front body portion 144 forms an interior front end cavity 150 with an array of terminal channels that support terminal pairs 210, 230 such that individual terminals 212 can contact corresponding individual terminals of a plug 104 inserted into the receptacle 106 (e.g., FIG. 2). The front body portion 144 also supports a lower mating feature 152 on the bottom wall 148b that allows for placement and securing within the receptacle 106, as will be described in more detail below.

[0029] The distal body portion 146 of the module housing body 142 may be considered to include one or more walls (or faces) 154a-154e, including a top wall 154a, a bottom wall 154b, lateral side walls 154c, 154d, and a rear wall 154e. The side walls 154c, 154d support a number of mating or alignment features 156a, 156b, 158a, 158b, 160a, 160b that facilitate alignment, positioning, and / or securement of the bypass connector module 120 and / or components therein. In particular, the mating features 156a, 156b, 158a, 158b, 160a, 160b include forward slots 156a, 156b in side walls 154c, 154d, respectively, that facilitate placement of the bypass connector module 120 within the receptacle 106, rear slots 158a, 158b in each side wall 154c, 154d that facilitate alignment and placement of the tail alignment structure 250 within the module housing 140, and latches 160a, 160b that facilitate placement and securement of the wafers 170, 190 within the module housing 140. The rear wall 154e of the distal body portion 146 also includes a mating feature 162 that receives a portion of a discrete rear shield 280, as described in more detail below.

[0030] Top wafer 170 and top wafer terminal set 210 are described in more detail with reference to Figures 18-20, which are isolated views of top wafer 170 and top wafer terminal set 210. Cable 112 is included in Figure 18 and has been removed in Figures 19 and 20 for clarity.

[0031] The top wafer 170 may be considered to include a body 172, which generally defines a front (or first longitudinal) end (or face) 174a, a rear (or second longitudinal) end (or face) 174b, first and second lateral sides 174c, 174d, a top (or first vertical) face 174e, and a bottom (or second vertical) face 174f. The body 172 may also be considered to form a partially closed portion 176 that partially surrounds the terminal sets 210 and a partially open portion 178, with at least a portion of the top face 174e being open to accommodate a connection between at least a portion of the terminal sets 210 and the cables 112. Additionally, several terminal supports 180 are disposed in the partially open portion 178 to support the terminal sets 210, particularly laterally.

[0032] The top wafer 170 further includes a number of mating or alignment features 182 a - 182 h that facilitate assembly and alignment within the bypass connector module 120 . In particular, the mating features 182a-182f include a central peg 182a extending from the bottom surface 174f that is inserted into the lower wafer 190 to ensure proper alignment of the wafers 170, 190; alignment pegs 182b, 182c extending from the bottom surface 174f proximate the lateral sides 174c, 174d, respectively, that also function to ensure proper alignment of the upper wafer 170 relative to the lower wafer 190; a pair of alignment recesses 182d, 182e, 182f, 182g in each of the lateral sides 174c, 174d, respectively, that also function to ensure proper alignment of the upper wafer 170 relative to the lower wafer 190; and one or more ridges 182h extending laterally from the bottom surface 174f that function to ensure proper spacing of the upper wafer 170 relative to the lower wafer 190. As shown, the rear surface 174b of the upper wafer 170 can be shaped to accommodate alignment of the cables 112.

[0033] The top wafer terminal set 210 can have any suitable configuration and composition. In the illustrated example, the terminal set 210 is comprised of ten terminals 212a-212j (generally terminals 212). By way of example, the terminals 212a-212j can include a number of ground terminals 212a, 212d, 212g, 212j, several low speed or power terminals 212e, 212f, and several high speed terminals 212b, 212c, 212h, 212i. As illustrated and discussed in more detail below, the terminals 212d, 212g, 212e, 212f are configured to mate with the host substrate 110, and the terminals 212b, 212c, 212h, 212i are coupled to the cable 112. Briefly, as shown with exemplary reference to FIG. 19, the terminals (e.g., terminals 212d, 212g, 212e, 212f) that mate with the host substrate 110 may have a shape that facilitates a respective press-fit or EON mating with the host substrate 110 under the bypass connector module 120. In particular, each terminal 212d, 212g, 212e, 212f may have a front end portion 214 that extends from the front end 174 of the top wafer 170 into the cavity 150 of the module housing 140, a terminal "tail" (or terminal distal end portion) 216 that extends angularly at an approximately 90° bend 218 relative to the terminal front end portion 214, for mating with a corresponding terminal of the plug 104 (FIG. 2). Generally, each front end portion 214 extends from a front end that forms a connection with the plug 104 (FIG. 2), through a partially closed portion 176, and into a partially open portion 178. At bend 218, a group of terminals (e.g., terminals 212d, 212g, 212e, 212f) transition into tail 216. Tail 216 extends downwardly through tail alignment structure 250 to mate with host substrate 110, as described in more detail below. Tail 216 can form a shoulder 220, a narrowed portion 222, and a terminal pin 224 that facilitate guidance through tail alignment structure 250 and placement and mating with host substrate 110, as described in more detail below.

[0034] In this example, as shown by a comparison of Figures 18 and 19, the cables 112 may be connected to appropriate terminals 212, in this case high speed terminals 212b, 212c, 212h, 212i. Such connections may be provided within the partially open portion 176 of the top wafer 170 such that the partially open portion 176 may function as a termination tray for the cables 112. In particular, with further reference to Figure 8, the high speed terminals 212b, 212c may be connected to the high speed wires 130a, 130b of one of the cables 112, and the high speed terminals 212h, 212i may be connected to the high speed wires 130a, 130b of the other cable 112. Additionally, the ground wires 132a, 132b may be connected to pairs of ground terminals 212a, 212d, 212g, 212j, respectively.

[0035] Bottom wafer 190 and bottom wafer terminal set 230 are described in more detail with reference to Figures 21 and 22, which are isolated views of bottom wafer 190 and bottom wafer terminal arrangement 230. Note that in this example, no high speed cables (e.g., similar to cables 112) are coupled to bottom wafer terminal set 230 because bottom wafer terminal set 230 is configured to transmit low speed signals and power to host substrate 110.

[0036] The bottom wafer 190 may be considered to include a body 192, generally defining a front (or first longitudinal) end (or face) 194a, a rear (or second longitudinal) end (or face) 194b, first and second lateral sides 194c, 194d, a top (or first vertical face) 194e, and a bottom (or second vertical face) 194f. As described in more detail below, the body 192 may also be considered to form a partially closed portion 196 that partially surrounds the terminal sets 230, and a partially open portion 198 in which the terminal sets 230 are supported and bent to transition to connection with the host substrate 110. Several terminal supports 200 are disposed within the partially open portion 198 and support the terminal sets 230.

[0037] The lower wafer 190 further includes several mating or alignment features 202a-i that facilitate assembly and alignment within the bypass connector module 120. In particular, the mating features 202a-i include a central peg hole 202a formed in the top surface 194e that receives the central peg 182a of the upper wafer 170 during assembly, top surface lateral recesses 202b, 202c in the top surface 194e of each of the lateral sides 194c, 194d for receiving the lateral pegs 182b, 182c, a pair of alignment recesses 202d, 202e, 202f, 202g in each of the lateral sides 194c, 194d that also function to ensure proper alignment of the upper wafer 170 relative to the lower wafer 190, and a pair of lower pegs 202h, 202i extending from the bottom surface 194f that mate with a tail alignment structure 250, as described below.

[0038] Similar to the top wafer terminal set 210, the bottom wafer terminal set 230 may have any suitable configuration and composition. In the illustrated example, the terminal set 230 is comprised of ten terminals (or pins) 232a-232j (generally, terminals 232). Again, any suitable number and combination of terminals 232a-232j may be provided. In this example, the terminals 232a-232j of the second wafer terminal set 230 are all low speed or power terminals that mate with the host substrate 110.

[0039] 21, the terminals 232a-232j may have a shape that facilitates their respective press-fit with the host substrate 110 beneath the bypass connector module 120. In particular, each of the terminals 232a-232j may have a forward end portion 234 that extends from the forward end 194 of the bottom wafer 190 into the cavity 150 of the module housing 140 for mating with a corresponding terminal of the plug 104 (FIG. 2), and a tail (or terminal distal end portion) 236 that extends angularly at a bend 238 of approximately 90° relative to the terminal forward end portion 234. Generally, the forward end portion 234 extends from the forward end that forms the connection with the plug 104 (FIG. 2), through the partially closed portion 196 and the partially open portion 198, where the terminal (e.g., terminals 232a-232j) transitions to the tail 236. As described in more detail below, the tail 236 extends downwardly through a tail alignment structure 250 to mate with the host substrate 110. Also, as described in more detail below, the terminal tail 236 can form a shoulder 240, a narrowed portion 242, and a terminal pin 244 that facilitate guidance through the tail alignment structure 250 and placement and mating with the host substrate 110.

[0040] A more detailed description of the tail alignment structure 250 will now be provided with reference to Figures 23-27. Such views include Figure 23, which is an isolated top isometric view of the tail alignment structure 250. Figures 24 and 25 are respectively partially exploded and joined isometric views of the tail alignment structure 250 and the lower wafer 190. Figure 26 is a rear top isometric view of the tail alignment structure 250 supporting the wafers 170, 190, the terminal sets 210, 230, and the overmolded structures 270, 272. Figure 27 is a bottom front isometric view of the tail alignment structure 250 supporting the wafers 170, 190, the terminal sets 210, 230, and the overmolded structures 270, 272.

[0041] The tail alignment structure 250 is formed by a body 252 having a front (or first) longitudinal end 254a, a rear (or second) longitudinal end 254b; first and second lateral side walls 254c, 254d, an upper (or first vertical) surface 254e, and a lower (or second vertical) surface 254f. A portion of the upper surface 254e proximate the front end 254a is substantially flat to form a substantially flush engagement with the lower wafer 190. The lateral side walls 254c, 254d are more pronounced toward the rear longitudinal end 254b and, together with a wall extending from the upper surface 254e of the rear end 254b, form a cavity 256 that at least partially surrounds the tails 216, 236 of the terminal sets 210, 230. A number of tail supports 258 are formed within cavities 256 on the upper surface 254e to support the positioning of the terminals 212, 232. A tail slot 260 is formed through the upper surface 254e and the lower surface 254f to allow the terminals 212, 232 to extend through the tail alignment structure 250 and mate with the host substrate 110. Additionally, the tail alignment structure 250 can include a number of mating or alignment features 262a-j, including one or more peg slots 262a, 262b generally proximate the forward longitudinal end 254a and positioned to receive corresponding pegs 202h, 202i of the lower wafer 190, one or more lower side slots 262a-j extending from the lower vertical surface 254f that facilitate positioning and securing the tail alignment structure 250 (and the bypass connector module 120) relative to the host substrate 110. The tail alignment structure 250 (and bypass connector module 120) includes pegs 262c, 262d, a pair of side protrusions 262e, 262f extending laterally from side walls 254c, 254d to facilitate assembly within the receptacle 106, a pair of side recesses 262g, 262h in side walls 254c, 254d to facilitate alignment with the wafers 170, 190, and a pair of rear notches 262i, 262j at the corners of the intersection between the rear end 254b and the lower surface 254f.

[0042] As discussed above, the tail alignment structure 250 operates to maintain the position of the terminals 212, 232 (i.e., to maintain the true position) during assembly of the connector module 120 and upon engagement of the tails 216, 236 with the host substrate 110. Such alignment is provided even when the terminals 212, 232 extending through the tail alignment structure 250 are staggered and bent 90 degrees to allow for face-to-face engagement with the host substrate 110. In particular, the alignment, mating, and support features of the wafers 170, 190, housing 140, and the tail alignment structure 250, along with the overmolded structures 270, 272, provide the strength and stability to maintain the position of the tails 216, 236 as an EON connection.

[0043] The bypass connector module 120 may be formed and assembled in any suitable manner, examples of which are shown in Figures 28-30, which are various views of a portion of the bypass connector module 120 with parts partially separated.

[0044] In one example, the terminal sets 210, 230 are integrated with the wafers 170, 190, e.g., the wafers 170, 190 are molded onto terminal wires and appropriately refined, and the terminals 212, 232 are cut and formed to the appropriate size and shape. The cable 112 can be connected to the appropriate terminals 212, 232 at the time the wafers 170, 190 are integrated with the terminal sets 210, 230, or during assembly of the wafers 170, 190 with each other and with the tail alignment structure 250, described below.

[0045] As can be seen from these figures, the lower wafer 190 may be received within the tail alignment structure 250 such that the tail 236 of the lower wafer 190 extends through the tail alignment structure 250. The side recesses 202d, 202e and the side recesses 262g, 262h of the lower wafer 190 may be aligned to ensure proper placement of the lower wafer 190 within the tail alignment structure 250. Additionally, the lower pegs 202h, 202i of the lower wafer 190 may be received within the peg slots 262a, 262b to further ensure proper placement of the lower wafer 190 within the tail alignment structure 250.

[0046] The top wafer 170 may be placed over the bottom wafer 190. Various mating features 182a-182g of the top wafer 170 cooperate with mating features 202a-202g to ensure proper alignment and placement of the wafers 170, 190 relative to each other and to other components of the bypass connector module 120. In this example, the central peg 182a of the top wafer 170 is received by the central peg hole 202a of the bottom wafer 190. The side pegs 182b, 182c are received in the side peg slots 202b, 202c to facilitate alignment of the wafers 170, 190. Additionally, the side recesses 182d, 182e, 182f, 182g may be aligned with the side recesses 202d, 202e, 202f, 202g to ensure proper placement of the top wafer 170 over the bottom wafer 190.

[0047] Any number of suitable overmold structures 270, 272 may be formed to stabilize and secure the various components of the bypass connector module 120. The first overmold structure 270 may be formed in the partially open portion 198 of the lower wafer 190 and in the tail cavity 256 of the tail alignment structure 250. The second overmold structure 272 may be formed in the partially open portion 178 of the upper wafer 170. Typically, the overmold structures 270, 272 are formed during assembly of the connector module 120, with an overmold material poured over the wafers 170, 190 and terminal sets 210, 230 to set the various connections and provide physical strength and stability. Prior to application of the overmold structures 270, 272, an adhesive may be applied to the tail slots 260 of the tail alignment structure 250 to prevent possible leakage of the overmold material.

[0048] The resulting combination of wafers 170, 190, terminal sets 210, 230, tail alignment structure 250, and overmolded structures 270, 272 form a generally unitary structure that can be inserted into module housing 140. In particular, forward end portions 214, 234 of terminal sets 210, 230 are disposed within pin channels of forward end cavity 150 of module housing 140. In this position, as best shown in FIG. 15, latches 160a, 160b on side walls 154c, 154d of module housing 140 engage corresponding recesses 182f, 182g of top wafer 170, thereby fixing the longitudinal position of top wafer 170 (and attached components) within module housing 140. As best shown in FIG. 15, side projections 262e, 262f of tail alignment structure 250 are positioned within rear slots 158a, 158b of module housing 140.

[0049] Further detail regarding the relationship between the various components of the bypass connector module 120 is shown in the cross-sectional view of Figure 31. As shown in Figure 31, latches 160a, 160b of the module housing 140 can engage side recesses 202e, 202f of the bottom wafer 190 (and / or side recesses 182e, 182f of the top wafer 170). This latching relationship is also shown in Figure 15.

[0050] As mentioned above, and with further reference to Figures 32 and 33, an individual module rear shield 280 is attached to the rear side of the bypass connector module 120. The rear shield 280 is formed by a body 282 with an upper leg 288 and a lower leg 286. As shown, the upper leg 284 is received within the rear notch 162 of the module housing 140, and the distal end of the upper leg 284 is bent over the top wall 154a of the module housing 140. The lower leg 286 is received within rear notches 262i, 262j at the corner of the intersection between the rear end 254b and the lower surface 254f of the tail alignment structure 250. The rear shield 280 further includes two pairs of lateral legs 288a, 288b, 288c, 288d that cooperate to accommodate the passage of the cable 112. As shown, one of the cables 112 passes between legs 288a, 288b and the other cable 112 passes through legs 288c, 288d. Additionally, the modular rear shield 280 further includes a central spring element 290 in its center that functions to provide spacing from the other sides of the shield assembly 122.

[0051] Shield assembly 122 will now be described in more detail with reference to Figures 34-46. As noted, shield assembly 122 may be considered a first shield assembly 122, and properties described herein with respect to first shield assembly 122 are also applicable to second shield assembly 124.

[0052] 34-46 are partial exploded views of the shield assembly 122 with other components of the electronic device 100, while FIG. 37 is an exploded view of the shield assembly 122 removed from the host substrate 110 and showing the bypass connector module 120, and FIG. 38 is a separate exploded view of the shield assembly 122. In one example, the shield assembly 122 includes a front plate 300, an upper shield cover 310, a shield tray 320, a rear shield plate 350, a receptacle bulkhead 340, a forward receptacle frame 370, and a separate rear shield 280.

[0053] By way of introduction, as described in more detail below, the bypass connector modules 120 with their respective rear shields 280 are supported on a shield tray 320 within a receptacle 106 that may be defined by a receptacle bulkhead 340. A top shield cover 310 may partially enclose the array of bypass connector modules 120 by mating with the shield tray 320. A front receptacle frame 370 is secured to the front of the array of receptacles 106, and a rear shield plate 350 is secured to the opposite or distal end of the receptacles 106. Finally, a front plate 300 is secured to the front of the electronic device 100 with openings 302a, 302b to surround each array of receptacles 106, 108.

[0054] Briefly, further details of the upper shield cover 310 will be described with reference to an isolated view of the upper shield cover 310 in Figure 39. In this example, the upper shield cover 310 is formed by a relatively flat base plate 312 which can be considered to have a leading edge 314a, a trailing edge 314b, and side edges 314c, 314d. The upper shield cover 310 further includes side walls 316a, 316b extending from the side edges 314c, 314d of the base plate 312. The top shield cover 310 includes several mating features 318a-318l, including an array of rear tabs and slots 318a extending across the rear edge 314b of the base plate 312 that are configured to engage the rear shield plate 350, one or more rear tabs or slots 318b, 318c extending from the rear edges of the side walls 316a, 316b that are also configured to engage the rear shield plate 350, an array of side wall mounting pegs 318d, 318e extending across the bottom edges of the side walls 316a, 316b and configured to engage the host substrate 110, a sidewall front detent 318f, 318g on each sidewall 316a, 316b configured to engage with a forward receptacle frame 370; a pair of sidewall tray detents 318h, 318i on each sidewall 316a, 316b configured to engage with a shield tray 320; sidewall module protrusions 318j, 318k on each of the sidewalls 316a, 316b configured to engage with an outermost bypass connector module 120 in the receptacle 106; and an array of bulkhead slits 318l configured to engage with a receptacle bulkhead 340.

[0055] Briefly, further details of the shielding tray 320 will be described with reference to the isolated view of FIG. 40. In this example, the shielding tray 320 is formed by a relatively flat base plate 322, which can be considered to have a leading edge 324a, a trailing edge or portion 324b, and side edges 324c, 324d. The shielding tray 320 further includes side walls 326a, 326b extending from the side edges 324c, 324d of the base plate 322. The shielding tray 320 includes an array of leaf springs or flexible elements 328 adjacent the leading edge 324a of the base plate 322. During assembly, the flexible elements 328 facilitate placement and securing of the plugs 104 (FIG. 2) within the receptacles 106, and thus one flexible element 328 is provided for each receptacle 106. At the other end of the base plate 322, an array of connector module apertures 330 and connector module mating projections 332 extend across the trailing edge 324b of the base plate 322. One connector module aperture 330 and one connector module mating projection 332 are provided in each receptacle 106 upon assembly. As will be explained in more detail below, the connector module apertures 330 and connector module mating projections 332 support placement of the bypass connector module 120 within each receptacle 106. In particular, the connector module apertures 330 receive the terminal sets 210, 230 that extend from the bypass connector module 120 into the host board 110, and the connector module mating projections 332 function to position and secure the bypass connector module 120 within the receptacle 106. The shield tray 320 further includes one or more mating features 334a-334e including an array of side edge slots 334a, 334b ​​extending along side edges 324c, 324d of the base plate 312 configured to receive side wall mounting pegs 318d, 318e of the top shield cover 310, one or more side wall slots 334c, 334d in each of the side walls 326a, 326b configured to engage with side wall tray detents 318h, 318i of the top shield cover 310, and multiple rows of bulkhead slots 334e, each row extending longitudinally across the base plate 322 and configured to support a receptacle bulkhead 340 defining a receptacle 106.

[0056] The shield assembly 122 further includes a number of receptacle bulkheads 340 that separate adjacent plug receptacles 106. Thus, in this example, there are five receptacle bulkheads 340 to at least partially define six plug receptacles 106. Further details of the receptacle bulkheads 340 may be described with reference to FIG. 41, which is an isolated view of the receptacle bulkheads 340. As shown, the bulkheads 340 may be considered to include a body 342 having a forward edge 344a, a rear edge 344b, an upper edge 344c, and a lower edge 344d. The receptacle bulkhead 340 includes a number of mating features 346a-346c, including an array of mounting pegs 346a extending across a bottom edge 344d configured to pass through a bulkhead slot 334e of the shield tray 320 and into the host substrate 110, at least one rear tab 346b extending from a rear edge 344b configured to pass through a rear shield plate 350 and bend to secure the bulkhead 340 to the rear shield plate 350, and configured to engage with a receptacle frame 370; including at least one frame tab 346c extending from the top edge 344c proximate the front edge 344a, one or more module protrusions 346d, 346e extending generally laterally from each face of the body 342 proximate the rear edge 344b and configured to engage with the bypass connector module 120 on either side of the receptacle bulkhead 340, one or more top edge tabs 346f extending along the top edge 344 for engaging the upper shield cover 310, and one or more bottom edge tabs 346g for engaging the shield tray 320.

[0057] 42, which is an isolated isometric view of the rear shield plate 350. The rear shield plate 350 can be considered to include a body 352 having a top edge 354a, a bottom edge 354b, and a pair of side edges 354c, 354d. Side walls 356a, 356b extend in a forward direction from each of the side edges 354c, 354d. A series of cable apertures 358 extend from the bottom edge 354b into the interior of the body 352. Each of the cable apertures 358 is sized to accommodate a single cable 112, and the cable apertures 358 collectively cooperate with the respective rear shields 280 to provide shielding to the cables 112 and the rear of the bypass connector module 120. A row of top edge tabs 360 extend along the top edge 354a of the rear shield plate 350, and one or more side slots 362a, 362b are disposed on each side edge 354c, 354d, each configured to mate with the top shield cover 310. A series of ridges may extend along the length of the rear shield plate 350 to provide a stiffening function.

[0058] 43, which is an isolated isometric view of a receptacle frame 370, which can be considered to include a top surface 372a, a bottom surface 372b, and side walls 372c, 372d that collectively assemble the set of receptacles 106 when assembled. As shown, the receptacle frame 370 can further include top and bottom mounting slots 374a, 374b that can mate with top edge tabs 346c (FIG. 41) when assembled, and side mounting slots 374c (only one of which is visible in FIG. 43) on each side wall 372c, 372d that mate with frame detents 318f, 318g of the upper shield cover 310 to secure the receptacle frame 370 within the shield assembly 122.

[0059] An additional view of the bypass connector module 120 secured within the receptacle 106 is provided by the cross-sectional view of FIG. 44. As shown, the bypass connector module 120 is positioned at the rear of the receptacle 106, ready to receive a plug 104 (FIG. 2), and shielded by the shield assembly 122, which includes the module rear shield 280, the front plate 300, the top shield cover 310, the shield tray 320, the receptacle bulkhead 340, and the rear shield plate 350. The view of FIG. 44 further illustrates the engagement of the sidewall mating slot 156a of the module housing 140 with the module protrusion 346e of the receptacle bulkhead 340. The interaction between the sidewall mating slot 156a of the module housing 140 and the module protrusion 346e of the receptacle bulkhead 340 provides a "stop" to ensure that the module 120 is properly positioned within the receptacle 106.

[0060] Thus, the shield assembly 122 may be formed around an array of bypass connector modules 120 to protect signals within the electronic device 100. Any suitable assembly procedure may be utilized. However, in one example, first, the bypass connector modules 120 with their respective rear shields 280 are secured to the shield tray 320 (e.g., as described above with reference to FIGS. 5-7 and 40). Then, the receptacle bulkheads 340 are placed on the shield tray 320 between the bypass connector modules 120, thereby forming the receptacles 106 (e.g., as described above with reference to FIGS. 40 and 41). Additionally, the shield cover 310 may be placed over the receptacle 106 to engage with the shield tray 320 (e.g., as described above with reference to FIGS. 34-40). A rear shield plate 350 is then positioned behind the shield cover 310, at least partially surrounding the cables 112 extending from the bypass connector modules 120 (e.g., as described above with reference to Figures 36-39 and 42). Additionally, a receptacle frame 370 is positioned in front of the shield cover 310 and shield tray 320 (e.g., as described above with reference to Figures 36-41 and 43). At this point, the shield assembly 122 and array of bypass connector modules 120 can be mounted onto a host substrate 110, as described above with reference to Figures 45 and 46.

[0061] As shown, FIGS. 45 and 46 are partially exploded isometric views of the shield assembly 122 and bypass connector module 120 prior to attachment to the host substrate 110. In one example, the host substrate 110 can be considered to define an upper surface 380 and a lower surface 382. As discussed above, the first shield assembly 122 and bypass connector module 120 are disposed on the upper surface 380 of the host substrate 110, and the second shield assembly 124 and associated modules (not shown in FIGS. 45 and 46) are disposed on the lower surface 382 of the host substrate 110. When the first shield assembly 122 and bypass connector module 120 are pressed against the upper surface 380 of the host substrate 110, the top shield cover mounting pegs (e.g., peg 318d) and bulkhead pegs (e.g., peg slots 384, 386) are received in corresponding peg slots (e.g., peg slots 384, 386). Additionally, pins of the terminal array (e.g., pins of terminal sets 210, 230) are press-fit into corresponding pin contacts (e.g., pin contacts or vias 388) so that signals and / or power of terminal sets 210, 230 can be transmitted to processing functions of host board 110, while high speed signals are transmitted via cable 112 to locations other than host board 110 (e.g., external connection assemblies 116, 118). Additionally, pegs 262c, 262d on the bottom side of tail alignment structure 250 can also be received in corresponding holes in host board 110 to facilitate proper placement of module 120 relative to host board 110.

[0062] Once the first shield assembly 122 and the bypass connector module 120 have been secured to the top surface 380 of the host substrate 110, a similar operation may be performed on the bottom surface 382 of one of the host substrates 110, after which the front plate 300 may be secured to the electronic device 100.

[0063] As described above, the pins of the terminal sets 210, 230 extending from the bypass connector module 120 form an eye-of-the-needle (EON) type engagement with the pin contacts 388 of the host substrate 110. Such EON compliant pin connectors are typically used in high performance computing systems and can avoid the need for the use of high stress soldering operations involving complex solder compositions, tools, fixtures, and processes. Typically, EON engagement can be difficult due to issues with maintaining alignment of the pins and moving out of position. However, due to the various mating mechanisms described above (e.g., the wafers 170, 190 ensure proper stacking and alignment; the overmold structures 270, 272 solidify the interior of the connector module 120 and the terminal sets 210, 230; the three-dimensional support of the terminal sets 210, 230 within the tail alignment structures 250), misalignment of the tails 216, 236 engaging the host substrate 110 can be prevented or mitigated.

[0064] Further views are provided in Figures 47 and 48. As shown in the partial rear isometric view of Figure 47, the first shield assembly 122 operates to provide shielding for the bypass connector module 120 (not visible in Figure 47) while accommodating the cables 112 extending from the shield assembly 122. In particular, the individual shields 280 and the rear shield plate 350 cooperate to cover all four sides of the cables 112, thereby avoiding or reducing gaps in the shield assembly 122. The cross-sectional view of Figure 48 provides further details regarding the interaction between the array of pegs (e.g., peg 346a) from the shield assembly 122 and the peg slots (e.g., slot 384) of the host substrate 110, which function not only to secure the shield assembly 122 to the host substrate 110, but also to facilitate proper alignment of the connector module 120 relative to the host substrate 110.

[0065] Further details regarding the terminal arrangement are provided in the views of Figures 49-51. Generally, Figure 49 is a top of terminal 212 bent into tail alignment structure 250, while Figures 50 and 51 are cross-sectional orthogonal side views of the portion of terminal 212 extending from tail alignment structure 250 into host substrate 110. As introduced above, and with particular reference to Figure 50, each tail 216 of terminal 212 may include a shoulder 220, a narrowed portion 222 that extends through a tail slot 260, and a pin 224 that is received by host substrate 110. Shoulder 220 may abut a step 264 in tail slot 260 to ensure proper positioning. As best shown in FIG. 51, the terminal 212 may also have a step (or additional shoulder) 226 adjacent the terminal pin 224 that engages with the top of the host substrate 110, further providing proper positioning, including preventing potential interference between the pin 224, the tail slot 260, and the pin contact 388.

[0066] Thus, the exemplary embodiments described herein provide an electronic device having an array of shielded bypass connector modules that receive high and low speed data and transfer it appropriately to a host board or other connection in a "hybrid" manner, away from the host board as a bypass, thereby avoiding overload or being limited by the host board.

[0067] The following detailed description describes exemplary embodiments and is not intended to be limited to the combination(s) explicitly disclosed. Thus, unless otherwise specified, features disclosed herein may be combined together to form additional combinations not otherwise shown for purposes of brevity. Thus, reference to a feature or aspect is intended to describe an example feature or aspect and does not imply that all embodiments must have the described feature. Furthermore, it is noted that the description illustrates some features. Although certain features are combined together to illustrate potential system designs, those features may also be used in other combinations not explicitly described. Thus, the described combinations are not intended to be limiting unless otherwise noted.

[0068] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" may be intended to include the plural forms unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising" specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0069] As used herein, unless otherwise limited or modified, a list having elements separated by a conjunction (e.g., "and") and preceded by the phrase "one or more of" or "at least one of" indicates a configuration or arrangement that potentially includes the individual elements of the list, or any combination thereof. For example, "at least one of A, B, and C" or "one or more of A, B, and C" indicates the possibility of A only, B only, C only, or any combination of two or more of A, B, and C (e.g., A and B; B and C; A and C; or A, B, and C).

[0070] The description of the present disclosure has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosure in the disclosed form. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the present disclosure. The embodiments explicitly referred to in this specification have been selected and described in order to best explain the principles of the present disclosure and their practical application, and to enable others skilled in the art to understand the present disclosure and recognize many alternatives, modifications, and variations to the described example(s). Therefore, various embodiments and implementations other than those explicitly described are within the scope of the following claims.

Claims

1. 1. An electronic device comprising: a first connector module having a first longitudinal end, a second longitudinal end, a first vertical side, and a second vertical side, the first connector module configured to mate with an external plug at the first longitudinal end, the first connector module comprising: a first set of terminals, each terminal of the first set having a first end and a second end; a first wafer supporting the first set of terminals such that first ends of the first set of terminals are positioned at a first longitudinal end to engage an external plug, a first one or more of second ends of the first set of terminals being bent to form a first set of tails, and a second one or more of the second ends of the first set of terminals terminating within the first wafer; a first connector module including a tail alignment structure positioned proximate to the first wafer, the tail alignment structure including tail supports and tail slots for receiving and supporting the first set of tails as the first set of tails extend from a second vertical surface of the first connector module; a cable arrangement forming a connection with a second one or more of the second ends of the first set of terminals and extending from a second longitudinal end of the first connector module; a host substrate positioned proximate the second vertical surface of the first connector module and configured to form an electrical connection with the first set of tails, the first set of tails extending downwardly through the tail alignment structure to mate with the host substrate; a shield assembly that surrounds at least a first longitudinal end, a second longitudinal end, and a first vertical side of the first connector module when the first set of tails of the first connector module are engaged with a host board.

2. The electronic device of claim 1 , wherein the first connector module is a small form factor pluggable (SFP) interface.

3. The electronic device of claim 1 , wherein the first set of tails engages the host substrate as an eye-of-the-needle (EON) connection.

4. 2. The electronic device of claim 1, wherein a first one or more of the second ends of the first set of terminals are configured to transmit low speed data or power from the external plug to the host board, and a second one or more of the second ends of the first set of terminals are configured to transmit high speed data from the external plug to a cable arrangement external to the host board.

5. 2. The electronic device of claim 1, wherein the first connector module further comprises a module housing in which the first wafer and tail alignment structure are stacked such that an underside of the tail alignment structure forms a second vertical surface of the first connector module.

6. The first connector module includes: a second set of terminals disposed with the module housing, each terminal of the second set having a first end and a second end; a second wafer disposed with the module housing and supporting the second set of terminals such that first ends of the second set of terminals are positioned to engage the external plug at a first longitudinal end, at least a portion of the second ends of the second set of terminals being bent to form a second set of tails; 6. The electronic device of claim 5, wherein the second wafer is stacked with the first wafer and a tail alignment structure within the module housing, whereby the tail alignment structure further receives and supports the second set of tails as they extend from a second vertical surface of the first connector module.

7. The electronic device of claim 6 , wherein the first wafer is stacked on top of the second wafer with respect to the tail alignment structure.

8. 8. The electronic device of claim 7, wherein the first connector module further comprises one or more overmolded portions formed over the first and second wafers and the first and second sets of terminals.

9. 9. The electronic device of claim 8, wherein a first one or more of the second ends of the first set of terminals are bent 90 degrees to form a first set of tails and at least a portion of the second ends of the second set of terminals are bent 90 degrees to form a second set of tails.

10. The electronic device of claim 1 , further comprising an array of the first connector modules disposed within the shield assembly.

11. 11. The electronic device of claim 10, wherein the shield assembly comprises a shield tray between at least a portion of the array of first connector modules and the host substrate, and a shield cover covering the array of first connector modules having side walls that mate with the shield tray.

12. 12. The electronic device of claim 11, wherein the shielding assembly further comprises an individual rear shield for each of the first connector modules and a rear shield plate that shields a second longitudinal end of the first connector module while accommodating passage of the cable configuration out of the first connector module.

13. The electronic device of claim 12 , wherein the shielding assembly further comprises a plurality of shielding bulkheads, each of the shielding bulkheads being disposed between adjacent first connector modules of the array of first connector modules.

14. The electronic device of claim 13 , wherein the shielding bulkhead extends between the shielding tray and the shielding cover to define a series of plug receptacles.

15. 2. The electronic device of claim 1, wherein each tail of the first set of tails includes a shoulder that abuts a corresponding step in the tail alignment structure to position the first set of tails relative to the tail alignment structure, the tail alignment structure including first and second lateral side walls and a wall extending from a top surface of a rear end, the first and second lateral side walls and the wall extending from the top surface of a rear end forming a cavity at least partially surrounding the first set of tails, and the tail alignment structure further includes a tail support formed in the cavity to support positioning of the first set of terminals.

Citation Information

Patent Citations

  • Connector module

    JP2006228701A

  • COMPUTER DEVICE USING BYPASS ASSEMBLY

    JP2018517969A

  • Connector

    JP2019192602A

  • Shielded terminal connector

    JP2022512823A

  • Methods and devices for protecting a multi-level, multi-port connector assembly from electromagnetic interference

    WO2021067907A1