Semiconductor Manufacturing Equipment

Abstract

To provide a semiconductor manufacturing device in which dicing tape peeling at the corners of a semiconductor chip is likely to progress.SOLUTION: A semiconductor manufacturing device disclosed herein includes a pickup stage having a mechanism for lifting and lowering a square semiconductor chip, the pickup stage is provided with first push-up blocks at the four corners. The first push-up block includes a first side parallel to one side of the semiconductor chip, a second side parallel to the other side of the semiconductor chip, and an offset portion formed between the first side and the second side so as to be offset inward from the intersection of extension lines of the first side and the second side.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor manufacturing apparatus used to peel a semiconductor chip from a dicing tape. [Background technology]

[0002] Patent Document 1 discloses a technique for peeling a semiconductor chip from a dicing tape. In the dicing process, which is one of the semiconductor manufacturing processes, a dicing tape is attached to the back surface of a semiconductor substrate on which multiple semiconductor chips are collectively formed, and the semiconductor substrate is then cut. After that, the semiconductor chip is peeled off from the dicing tape and picked up. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-164951 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, with the above-mentioned method, the block pushes up the corners of the semiconductor chip, making it difficult to peel the dicing tape from the chip corners.

[0005] In order to solve the above problems, the present disclosure provides a method for peeling a dicing tape at a corner of a semiconductor chip. The purpose of the present invention is to provide a semiconductor manufacturing device that is easy to process. [Means for solving the problem]

[0006] An aspect of the present disclosure includes a pickup stage having a mechanism for raising and lowering a rectangular semiconductor chip, the pickup stage comprising: Semiconductor chip At the four corners In the corresponding position A first push-up block is provided, and the first push-up block is provided on one side of the semiconductor chip. In line with The first side and the other side of the semiconductor chip In line with It is preferable that the semiconductor manufacturing apparatus includes a second side and an offset portion formed between the first side and the second side so as to be offset inward from the intersection of the extension lines of the first side and the second side. Effect of the Invention

[0007] According to the aspects of the present disclosure, peeling of the dicing tape at the corners of the semiconductor chip is facilitated, and as a result, chip cracking and chipping of the semiconductor chip can be suppressed. [Brief description of the drawings]

[0008] [Figure 1] FIG. 2 is a plan view of a push-up block according to the first embodiment of the present disclosure. [Diagram 2] FIG. 11 is a plan view of a modified example of the push-up block according to the first embodiment of the present disclosure. [Diagram 3] 1 is a cross-sectional view of a semiconductor pickup device according to a first embodiment of the present disclosure. [Figure 4] 13 is a diagram showing a configuration of a push-up block according to a second embodiment of the present disclosure. FIG. [Diagram 5] 13 is a front view showing a modified example of a center push-up block according to the second embodiment of the present disclosure. FIG. [Figure 6] FIG. 11 is a plan view of a central push-up block according to a second embodiment of the present disclosure. [Figure 7] 13 is a plan view showing a modified example of a center push-up block according to the second embodiment of the present disclosure. FIG. [Figure 8] 13 is a plan view showing a modified example of a center push-up block according to the second embodiment of the present disclosure. FIG. [Figure 9] FIG. 11 is a front view showing a configuration of a push-up block according to a third embodiment of the present disclosure. [Figure 10] FIG. 11 is a cross-sectional view showing a configuration of a push-up block according to a third embodiment of the present disclosure. [Figure 11] 13A to 13C are diagrams illustrating the operation of a push-up block according to the third embodiment of the present disclosure. [Figure 12] FIG. 11 is a plan view of a push-up block according to a fourth embodiment of the present disclosure. [Figure 13] FIG. 13 is a front view showing the progress of peeling of a dicing tape according to a fourth embodiment of the present disclosure. [Figure 14] FIG. 13 is a plan view showing a modification of the fourth embodiment of the present disclosure. [Figure 15] FIG. 13 is a plan view showing a modification of the fourth embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] First embodiment 1 is a plan view of a push-up block according to a first embodiment of the present disclosure. For the purpose of explanation, the mounting position of the semiconductor chip 1 is shown by imaginary lines. The corner push-up block 2 is positioned so as to push up the four corners of the semiconductor chip 1, and has a first side 2a parallel to one side of the semiconductor chip 1 and a second side 2b parallel to the other side of the semiconductor chip 1. The corner push-up block 2 also has an offset portion 2c formed so as to be offset inward from the intersection of the extension lines of the first side 2a and the second side 2b.

[0010] The corner push-up block 2 pushes up the semiconductor chip 1 placed at an inner position that does not overlap with the outer edge. When considering the intersection of the extension lines of the first side 2a and the second side 2b, the offset portion 2c is formed to be concave on the inside compared to the line segment connecting the end point on the intersection side of the first side 2a and the end point on the intersection side of the second side 2b. The offset portion 2c may be formed to be convex on the outside.

[0011] Peeling of the semiconductor chip 1 starts from the corner and progresses toward the center of the semiconductor chip 1. Therefore, if the chip corner is pushed up as in the conventional configuration, the dicing tape is pressed against the chip corner by the pushing action, which causes a problem of impeding peeling of the chip corner. In the configuration of this embodiment 1, the block top surface is not in contact with the chip corner or chip side, so peeling of the semiconductor chip 1 can proceed without impeding the start of dicing tape peeling.

[0012] In addition, since a force is applied in the direction that breaks the chip corner from when the chip corner starts to peel until it finishes peeling, it is necessary to hold the position close to the semiconductor chip corner to prevent the chip from breaking. In the configuration of this embodiment 1, both sides of the chip corner are pushed up by the same corner push-up block 2, so that both sides of the chip corner can be held evenly. Therefore, the peeling of the semiconductor chip 1 can proceed without cracking or chipping the chip corner.

[0013] Furthermore, the center portions of each side of the semiconductor chip 1 peel slowly, so the force applied thereto is likely to cause chip cracking. For this reason, if the semiconductor chip 1 is a rectangle with two sides of different lengths, the top surface of the corner push-up block 2 is configured so that the side parallel to the long side of the semiconductor chip is longer. This provides sufficient support for the center portions of the long sides, which are prone to cracking, and reduces the risk of the semiconductor chip 1 cracking or chipping.

[0014] 2 is a plan view of a modified example of the push-up block according to the first embodiment of the present disclosure. The corner push-up block 3 of this modified example has a contact plane 3a that comes into contact with the semiconductor chip 1 and an inclined plane 3b that is inclined downward from a tangent to the contact plane 3a toward the center of the chip.

[0015] 3 is a cross-sectional view of the semiconductor pickup device according to the first embodiment of the present disclosure. FIG. 3 shows a state in which the corner push-up block 3 has been cut so as to pass through the contact plane 3a and the inclined plane 3b of FIG. 2. The semiconductor pickup device includes a pickup stage 100. The pickup stage 100 includes a corner push-up block 3 capable of protruding a tip portion from its upper surface. The corner push-up block 3 pushes up the dicing tape 50 from the lower surface by protruding a tip portion from the pickup stage 100. Since the semiconductor chips 1 individually separated by dicing are attached to the dicing tape 50, the semiconductor chips 1 are pushed up at this time, and peeling from the dicing tape 50 begins.

[0016] After the corner push-up block 3 is pushed up, the contact plane 3a advances the peeling of the semiconductor chip 1 without causing cracks or chipping at the chip corners, in the same manner as described above for the corner push-up block 2. In addition, because the corner push-up block 3 has an inclined plane 3b, the sheet peeling proceeds not only from the chip corners and the chip periphery, but also wraps around into the space between the inclined plane 3b and the semiconductor chip 1. As a result, the corner push-up block 3 with the inclined plane 3b can advance the sheet peeling more quickly.

[0017] The corner push-up block 3 may have an uneven shape by including a recessed portion formed by a slit on the contact plane 3a, or a protruding portion formed by a spherical or needle-shaped member. By having an uneven shape on the surface of the block, a space is created between the sheet and the semiconductor chip 1, which allows the sheet peeling to proceed more quickly.

[0018] The pickup stage 100 may have suction grooves or suction holes on the surface that contacts the chip, and the edges of the suction grooves may be finished with R-chamfering or C-chamfering. In this case, the pickup stage 100 has a mechanism for sucking the dicing tape 50, and has a function of making it easier to peel the dicing tape 50 by sucking it when pushing up the semiconductor chip 1. The suction pressure of the suction mechanism may also be changeable.

[0019] Embodiment 2 4 is a diagram showing the configuration of a push-up block according to embodiment 2 of the present disclosure. The upper figure is a plan view, and the lower figure is a perspective view. In addition to corner push-up blocks 3, embodiment 2 includes a center push-up block 4.

[0020] As the peeling of the dicing tape 50 progresses, if only the corners of the semiconductor chip 1 are pushed up as in the first embodiment, force is applied to the center of each side of the semiconductor chip 1, which may cause chip cracking and chip chipping. The center push-up block 4 pushes up the semiconductor chip 1 while the peeling of the dicing tape 50 progresses from the corners to the center of the semiconductor chip 1. This supports the vicinity of the center of each side of the semiconductor chip 1, thereby suppressing chip cracking and chip chipping.

[0021] In addition, the corner push-up block 3 and the center push-up block 4 of this embodiment 2 may have lifting mechanisms that operate separately. The action of the corner push-up block 3 pushing up the semiconductor chip 1 does not hinder the peeling of the dicing tape at the chip corners, but does hinder peeling around the supported chip corner. Therefore, the above-mentioned lifting mechanism stops the rise of the corner push-up block 3 or starts its descent when peeling of the dicing tape at the corners of the semiconductor chip 1 begins. This makes the corner push-up block 3 lower than the center push-up block 4, making it easier to peel the dicing tape at the chip corners, and the peeling of the dicing tape progresses toward the center of the semiconductor chip 1.

[0022] The pickup stage 100 has a block structure with holes. By making the mounting parts of the multiple corner push-up blocks 3 the same shape, each can be installed anywhere on the pickup stage 100, realizing cost reduction by reducing the number of different parts. Also, since the size of the block itself can be changed as long as the mounting parts are the same, it can be accommodated by simply replacing the block even if the size of the semiconductor chip 1 is different, which also contributes to cost reduction.

[0023] 5 is a front view showing a modified central push-up block according to the second embodiment of the present disclosure. This modified embodiment includes a central push-up block 5 whose upper surface is not flat but curved with the central portion being the highest. When the upper surface is flat, the force is concentrated on the outer periphery of the upper surface, but when the upper surface is curved, the force is dispersed, so that chip cracking and chipping can be suppressed. In addition, because the central portion is the highest, it is difficult to impede the peeling of the dicing tape that proceeds from the outer periphery to the center of the semiconductor chip 1.

[0024] 6 is a plan view of a central push-up block according to embodiment 2 of the present disclosure. Central push-up block 4 has an upper surface that is circular when viewed in plan.

[0025] 7 is a plan view showing a modified example of the center push-up block according to the second embodiment of the present disclosure. This modified example includes a center push-up block 6 having an upper surface that is rhomboidal when viewed in a plan view.

[0026] 8 is a plan view showing a modified example of the center push-up block according to the second embodiment of the present disclosure. This modified example includes a center push-up block 7 having a top surface that is cross-shaped when viewed in a plan view. The cross shape here refers to a shape obtained by removing from a rhombus four non-overlapping isosceles triangles that have the four sides forming the rhombus as their bases.

[0027] Since the object of the second embodiment is to distribute the force applied to the vicinity of the center of each side of the semiconductor chip 1, any shape that can support the vicinity of the center of each side is sufficient. For this reason, push-up blocks having a diamond-shaped or cross-shaped upper surface, such as the central push-up blocks 6 and 7, may be used.

[0028] Third embodiment Fig. 9 is a front view showing the configuration of a push-up block according to the third embodiment of the present disclosure, and Fig. 10 is a cross-sectional view showing the configuration of a push-up block according to the third embodiment of the present disclosure. The corner push-up block 8 of the third embodiment has an elastic mechanism such as a spring 9 therein as shown in Fig. 10.

[0029] FIG. 11 is a diagram showing the operation of the push-up block according to the third embodiment of the present disclosure. The state in which the peeling of the dicing tape 50 progresses is shown in order from the left to the right. The spring 9 in this embodiment 3 is selected to have a restoring force smaller than the restoring force of the dicing tape 50 immediately before peeling. Therefore, in the early stage of the push-up operation, as shown in the left figure, the corner push-up block 8 pushes up the semiconductor chip 1. However, in the later stage of the push-up operation, the restoring force of the dicing tape 50 exceeds the restoring force of the spring 9. Therefore, as shown in the right figure, the corner push-up block 8 sinks toward the pickup stage 100 in a manner that it is pushed back by the dicing tape 50. At this time, the semiconductor chip 1 and the dicing tape 50 are peeled off.

[0030] The above-mentioned spring action allows the corner thrust blocks 8 and the center thrust blocks 4 to operate separately even when they are driven together by a single lifting mechanism, which allows the cost of the device to be reduced.

[0031] Fourth embodiment FIG. 12 is a plan view of a push-up block according to the fourth embodiment of the present disclosure. For the purpose of explanation, the placement position of the semiconductor chip 1 is shown by an imaginary line. The fourth embodiment includes a plurality of push-up blocks arranged in a lattice pattern and having the same shaped upper surface. The blocks in contact with the sides and corners of the semiconductor chip 1 are not used, and the dicing tape 50 is peeled off only by the blocks in contact with the semiconductor chip 1 on the inside of the blocks. In FIG. 12, block 200a contacts the sides of the semiconductor chip 1, and block 200b contacts the corners of the semiconductor chip 1, so that blocks 201, 202, 203, 204, and 205 on the inside of these blocks are used.

[0032] The above-mentioned multiple push-up blocks each have a lifting mechanism that operates separately, and operate in sequence so that the inner blocks are higher. In the case of Fig. 12, first, blocks 201, 202, 203, 204, and 205 are pushed up at the same time. After a certain time, block 201 stops pushing up, and the remaining blocks 202, 203, 204, and 205 continue pushing up. After another certain time, block 202 stops pushing up, and the remaining blocks 203, 204, and 205 continue pushing up. In this way, by stopping the push-up in sequence from the block closest to the chip corner, the inner blocks become relatively higher, and the dicing tape peeling can be smoothly carried out.

[0033] In this configuration, even if the size of the semiconductor chip changes, it can be handled by simply changing the block used. In other words, one semiconductor manufacturing device can be applied to semiconductor chips 1 of various sizes, which is expected to reduce the number of parts and simplify management.

[0034] 13 is a front view showing the progress of peeling of the dicing tape according to the fourth embodiment of the present disclosure. Since this figure shows the same semiconductor manufacturing equipment as in FIG. 12, blocks 200a and 200b that are not being used for push-up are inside pickup stage 100 and cannot be seen, and only blocks 201, 202, 203, and 204 that are being used for push-up and are in the foreground are visible.

[0035] First, as shown in the left diagram, blocks 201, 202, 203, and 204 are pushed up in unison. After peeling of the edge of the semiconductor chip 1 begins, block 201, which is the outermost of the blocks being pushed up, stops rising, as shown in the middle diagram, while the other blocks 202, 203, and 204 continue to rise. After peeling progresses further, block 202, which is the outermost of the blocks being pushed up, stops rising, as shown in the right diagram, while the other blocks 203 and 204 continue to rise. By repeating this process, the center of the semiconductor chip 1 is supported, suppressing chip cracking and chipping, while allowing the dicing tape to be peeled off smoothly.

[0036] 14 and 15 are plan views showing a modification according to the fourth embodiment of the present disclosure. FIG. 14 shows a modification in which blocks other than those adjacent to the outer periphery and corners of the semiconductor chip 1 and those adjacent to the diagonal line of the semiconductor chip 1 are used. However, block 215 in contact with the center of the semiconductor chip 1 is used. This reduces the contact area between the semiconductor chip 1 and the entire block, which facilitates dicing tape peeling. Specifically, block 210 is not used, and blocks 211, 212, 213, 214, and 215 are pushed up to start peeling the dicing tape. Then, blocks 211, 212, 213, 214, and 215 stop rising in this order, and peeling proceeds.

[0037] 15 shows a modified example in which blocks adjacent to the outer periphery and corners of the semiconductor chip 1 are removed and every other block on the inside is used. This further reduces the contact area between the semiconductor chip 1 and the entire block, which facilitates dicing tape peeling. Specifically, without using block 220, blocks 221, 222, 223, and 224 are pushed up to start peeling the dicing tape. Then, blocks 221, 222, 223, and 224 stop rising in that order and peeling proceeds.

[0038] The push-up block shown in the present disclosure may be made of metal or resin. If it is made of metal, it is less likely to wear out and has a long life, which also helps prevent semiconductor chips from cracking due to changes in shape. If it is made of resin, the cost of materials is low, which allows for cost reduction. Furthermore, the semiconductor manufacturing apparatus of the present disclosure may be configured to push up multiple semiconductor chips at the same time to improve processing capacity.

[0039] The push-up block shown in the present disclosure may also have a lifting mechanism that can change the rising speed and the protrusion amount. When the adhesive strength of the dicing tape is strong, the rising speed is slowed down to reduce the risk of chip cracking and chip chipping, and the protrusion amount is increased to facilitate the peeling of the dicing tape. Conversely, when the adhesive strength is weak, the rising speed is increased to shorten the process time, and the protrusion amount is reduced to reduce the risk of chip cracking and chip chipping.

[0040] Furthermore, although the present disclosure shows a case where a substrate made of silicon is used, a wide band gap semiconductor having a larger band gap than silicon may be used, for example, silicon carbide, gallium nitride-based materials, or diamond. [Explanation of symbols]

[0041] 1 semiconductor chip, 2 first side, 2a first side, 2b second side, 2c offset portion, 100 pickup stage, 200 block, 200a block, 200b block, 201 block, 202 block, 203 block, 204 block, 205 block, 210 block, 211 block, 212 block, 213 block, 214 block, 215 block, 220 block, 221 block, 222 block, 223 block, 224 block

Claims

1. A pickup stage having a mechanism for raising and lowering a rectangular semiconductor chip is provided. the pickup stage includes first push-up blocks at positions corresponding to the four corners of the semiconductor chip; The first thrust block is a first side along one side of the semiconductor chip; a second side along the other side of the semiconductor chip; and an offset portion formed between the first side and the second side so as to be offset inward from an intersection of extension lines of the first side and the second side. Semiconductor manufacturing equipment.

2. 2. The semiconductor manufacturing apparatus according to claim 1, wherein the offset portion is concave inwardly as compared with a line segment connecting an end point of the first side on the side of the intersection and an end point of the second side on the side of the intersection.

3. 3. The semiconductor manufacturing apparatus according to claim 1, wherein the first push-up block has a surface that is inclined so that a center side of the semiconductor chip is lower.

4. 4. The semiconductor manufacturing apparatus according to claim 1, wherein the first push-up block has an upper surface with projections and recesses.

5. 5. The semiconductor manufacturing apparatus according to claim 4, wherein the uneven shape includes any one of a concave portion due to a slit, a convex portion due to a sphere, and a convex portion due to a needle-like member.

6. 6. The semiconductor manufacturing apparatus according to claim 1, wherein the pickup stage includes a second push-up block that is arranged inside the first push-up block and operates in cooperation with the first push-up block.

7. 7. The semiconductor manufacturing apparatus according to claim 6, wherein the first push-up block has an internal elasticity.

8. 8. The semiconductor manufacturing apparatus according to claim 6, wherein the upper surface of the second push-up block is shaped to support the vicinity of the center of each side of the semiconductor chip.

9. 9. The semiconductor manufacturing apparatus according to claim 6, wherein the upper surface of the second push-up block is a curved surface that is inclined so that the central portion is the highest.

10. 7. The semiconductor manufacturing apparatus according to claim 6, wherein the second push-up block is made up of a plurality of blocks, each of which operates in sequence so that the innermost block is higher.

11. The pickup stage is provided with a suction mechanism The semiconductor manufacturing apparatus according to claim 1 .

12. The semiconductor chip is formed of a wide band gap semiconductor. The semiconductor manufacturing apparatus according to claim 1 .

13. 13. The semiconductor manufacturing apparatus according to claim 12, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material or diamond.

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