Semiconductor Device

Abstract

To provide a light-emitting device capable of preventing afterimage from being displayed.SOLUTION: A plurality of pixels arranged in n rows and m columns (n and m are each an integer of 2 or more) is supplied with a first signal containing image information and a second signal for initializing the pixels. Each pixel includes a first transistor for controlling input of the first signal and a second transistor for controlling input of the second signal. The first transistor in pixels in a k-th row (k is an integer of 1 or more and n or less) and the second transistor in pixels in a (k+1)th row are turned on at the same time, so that the pixels are initialized and images are displayed effectively.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The present invention also relates to a composition of matter. One embodiment is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, a driving method thereof, or In particular, one embodiment of the present invention relates to a semiconductor device including an oxide semiconductor. The present invention relates to a display device or a light-emitting device.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. The display device, the electro-optical device, the semiconductor circuit, and the electronic device all have a semiconductor device. There are cases. [Background technology]

[0003] Light-emitting devices using light-emitting elements have high visibility and are ideal for thinning, but they also have no limitations on the viewing angle. Since there is no CRT (cathode ray tube) or LCD display, Active matrix display devices using light-emitting elements are attracting attention. The specific configurations proposed vary by manufacturer, but usually include at least a light emitting element and A transistor (switching transistor) that controls the input of image signals to pixels, A transistor (drive transistor) that controls the current value supplied to the light emitting element is provided for each pixel. It is provided in the base.

[0004] In recent years, the high mobility achieved by polysilicon and microcrystalline silicon, combined with the high mobility achieved by amorphous silicon, has been The oxide semiconductor is a new semiconductor that combines the uniform device characteristics obtained by silicon. Semiconductors are attracting attention. Oxide semiconductors are formed on substrates with low distortion points such as glass substrates. It is also possible to form a film on a large substrate such as the fifth generation (one side of which exceeds 1000 mm) or larger. It is also compatible with substrates that have traditionally been used, such as silicon and germanium. A light-emitting device in which the above-mentioned oxide semiconductor is used for a pixel transistor instead of a semiconductor having a thickness of 100 nm, It is becoming practical.

[0005] In the following Patent Document 1, a TFT containing an oxide semiconductor in the active layer is used as an organic EL element. In addition, the following Patent Document 2 describes an example in which the thin film transistor (TFT) is used to drive the thin film transistor. The active layer of the film transistor is formed of an oxide semiconductor. It is stated as follows. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2009-031750 A [Patent Document 2] JP 2011-100092 A Summary of the Invention [Problem to be solved by the invention]

[0007] By the way, a transistor including an oxide semiconductor has the characteristic of having an extremely small off-state current. By using a transistor having the above characteristics in the pixel of a light-emitting device, As long as the image information stored in the pixels can be retained and a still image can be displayed, This reduces the frequency of rewriting image information and saves power for the display device. In the light emitting device, if image information is held for a long period of time, different image information may be subsequently held. Even if you input the pixel, the image information cannot be completely rewritten, and the image information before rewriting may remain in the pixel and be displayed as an afterimage.

[0008] In light of the above technical background, one embodiment of the present invention provides a novel semiconductor device, etc. To provide a light-emitting device capable of preventing afterimages from being displayed, or The present invention aims to provide a method for driving a light emitting device capable of preventing the display of an afterimage. It shall be one.

[0009] Another embodiment of the present invention provides a light-emitting device capable of displaying image information even at a high scanning frequency. or a driving method for a light-emitting device capable of displaying image information even at a high scanning frequency. One of our goals is to provide

[0010] In addition, the description of a plurality of problems does not preclude the existence of each problem. The embodiments do not necessarily solve all of these problems. Problems other than those listed may be solved by the present specification. These problems will become apparent from the description of the present invention, drawings, claims, etc. This could be a form of challenge for the Ming. [Means for solving the problem]

[0011] One aspect of the present invention is a semiconductor device including a first transistor, a second transistor, a third transistor, and a third transistor. A fourth transistor, a fifth transistor, a sixth transistor, a first light-emitting element, and a second light-emitting element. A light emitting device having an optical element, a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring. An optical device, the gate of a first transistor being connected to a second wiring, One of the source and drain of the first transistor is connected to the fourth wiring, The other drain is connected to the gate of the third transistor, and the gate of the second transistor is The second transistor is connected to the first wiring, and one of the source and drain of the second transistor is connected to the fifth wiring. The other of the source and drain of the second transistor is connected to the gate of a third transistor. one of the source and drain of the third transistor is connected to the first terminal of the first light emitting element; The other of the source and drain of the third transistor is applied with a first potential. The second terminal of the optical element is given a second potential, and the gate of the fourth transistor is connected to the third wiring. One of the source and drain of the fourth transistor is connected to the fourth wiring. The other of the source and drain of the sixth transistor is connected to the gate of the fifth transistor. The gate of the fifth transistor is connected to the second wiring, and the source and drain of the fifth transistor are connected to the second wiring. One of the sources and drains of the fifth transistor is connected to the fifth wiring, and the other of the sources and drains of the fifth transistor is connected to the sixth wiring. the source and drain of the sixth transistor are connected to the gate of the second transistor, The other of the source and the drain of the sixth transistor is connected to the first terminal of the light emitting element. A potential is applied to the second terminal of the second light-emitting element, a second potential is applied to the second terminal of the second light-emitting element, and the fourth wiring transmits image information. A signal including the third potential is applied to the fifth wiring.

[0012] One aspect of the present invention is a semiconductor device including a first transistor, a second transistor, a third transistor, and a third transistor. A fourth transistor, a fifth transistor, a sixth transistor, a first light-emitting element, and a second light-emitting element. A light emitting device having an optical element, a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring. An optical device, the gate of a first transistor being connected to a second wiring, One of the source and drain of the first transistor is connected to the fourth wiring, The other drain is connected to the gate of the third transistor, and the gate of the second transistor is The second transistor is connected to the first wiring, and one of the source and drain of the second transistor is connected to the fifth wiring. The other of the source and drain of the second transistor is connected to the gate of a third transistor. one of the source and drain of the third transistor is connected to the first terminal of the first light emitting element; The other of the source and drain of the third transistor is applied with a first potential. The second terminal of the optical element is given a second potential, and the gate of the fourth transistor is connected to the third wiring. One of the source and drain of the fourth transistor is connected to the fourth wiring. The other of the source and drain of the sixth transistor is connected to the gate of the fifth transistor. The gate of the fifth transistor is connected to the second wiring, and the source and drain of the fifth transistor are connected to the second wiring. One of the sources and drains of the fifth transistor is connected to the fifth wiring, and the other of the sources and drains of the fifth transistor is connected to the sixth wiring. the source and drain of the sixth transistor are connected to the gate of the second transistor, The other of the source and the drain of the sixth transistor is connected to the first terminal of the light emitting element. A potential is applied to the second terminal of the second light-emitting element, a second potential is applied to the second terminal of the second light-emitting element, and the fourth wiring transmits image information. A signal including the first potential is applied to the fifth wiring, and a second potential is applied to the fifth wiring.

[0013] One aspect of the present invention is a semiconductor device including a first transistor, a second transistor, a third transistor, and a third transistor. A fourth transistor, a fifth transistor, a sixth transistor, a first capacitance element, and a second capacitance element. a first light emitting element, a second light emitting element, a first wiring, a second wiring, a third wiring, and a third wiring. A light emitting device having a first transistor and a second wiring, One of the source and drain of the first transistor is connected to the fourth wiring. The other of the source and drain of the second transistor is connected to the gate of the third transistor. The gate of the second transistor is connected to the first wiring, and one of the source and drain of the second transistor is connected to the first wiring. The other is connected to one of the source and drain of the third transistor, and the other is connected to the source and drain of the second transistor. The other of the source and drain is connected to the gate of a third transistor. One of the source and the drain is connected to the first terminal of the first light-emitting element, and the third transistor The other of the source and the drain is given a first potential, and the first terminal of the first capacitance element is connected to a third transistor. the second terminal of the first capacitance element is connected to the gate of the third transistor; and a drain of the first light-emitting element, a second terminal of the first light-emitting element is applied with a second potential, and a fourth The gate of the transistor is connected to the third wiring, and the source and drain of the fourth transistor are One of the sources and drains of the fourth transistor is connected to the fourth wiring, and the other of the sources and drains of the fourth transistor is connected to the sixth wiring. the gate of the fifth transistor is connected to the second wiring; the gate of the fifth transistor is connected to the second wiring; One of the source and drain of the fifth transistor is the source and drain of the sixth transistor. The other of the source and drain of the fifth transistor is connected to one of the source and drain of the sixth transistor. The sixth transistor is connected to the gate of the second light-emitting element. The other of the source and drain of the sixth transistor is connected to the first terminal, and a first potential is applied to the other of the source and drain of the sixth transistor. a first terminal of the second capacitance element is connected to the gate of the sixth transistor, and the second capacitance element a second terminal of the sixth transistor connected to one of the source and drain of the sixth transistor; A second potential is applied to the second terminal of the pixel, and a signal including image information is applied to the fourth wiring.

[0014] One aspect of the present invention is a semiconductor device including a first transistor, a second transistor, a third transistor, and a third transistor. A fourth transistor, a fifth transistor, a sixth transistor, a first light-emitting element, and a second light-emitting element. A light emitting device having an optical element, a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring. An optical device, the gate of a first transistor being connected to a second wiring, One of the source and drain of the first transistor is connected to the fourth wiring, The other drain is connected to the gate of the third transistor, and the gate of the second transistor is The second transistor is connected to the first wiring, and one of the source and drain of the second transistor is connected to the fifth wiring. The other of the source and drain of the second transistor is connected to the gate of a third transistor. one of the source and drain of the third transistor is connected to the first terminal of the first light emitting element; The other of the source and drain of the third transistor is applied with a first potential. The second terminal of the optical element is given a second potential, and the gate of the fourth transistor is connected to the third wiring. One of the source and drain of the fourth transistor is connected to the fourth wiring. The other of the source and drain of the sixth transistor is connected to the gate of the fifth transistor. The gate of the fifth transistor is connected to the second wiring, and the source and drain of the fifth transistor are connected to the second wiring. One of the sources and drains of the fifth transistor is connected to the fifth wiring, and the other of the sources and drains of the fifth transistor is connected to the sixth wiring. the source and drain of the sixth transistor are connected to the gate of the second transistor, The other of the source and the drain of the sixth transistor is connected to the first terminal of the light emitting element. A potential is applied to the second terminal of the second light-emitting element, a second potential is applied to the second terminal of the second light-emitting element, and the fourth wiring transmits image information. A first signal including the first wiring is applied, and the first wiring is selected rather than the first signal being applied to the fourth wiring. The first signal is provided to the fifth wiring at a timing earlier than the period during which the first signal is applied.

[0015] In the above embodiment, the first to sixth transistors each contain an oxide semiconductor in a channel formation region. It is preferred.

[0016] In the above embodiment, the oxide semiconductor is indium, zinc, M (M is Ga, Sn, Hf, A It is preferred that the alloy contains at least one of these elements, i.e., Zr or l.

[0017] One aspect of the present invention is a display device including the light-emitting device according to the above aspect, a microphone, and an operation key. It is an electronic device.

[0018] In this specification, the term "connection" means electrical connection, and the term "connection" means a state in which a current, a voltage, or a potential is This corresponds to a circuit configuration that can make the signal available for supply or transmission. In addition, a connected circuit configuration does not necessarily refer to a directly connected circuit configuration. , resistors, diodes, etc., so that a current, voltage, or potential can be supplied or transmitted. , indirectly connected through circuit elements such as transistors, inductors, and capacitance elements. Therefore, the pixel 101 may include a transistor, a die, etc., as necessary. The circuit may further include other circuit elements such as diodes, resistors, capacitors, and inductors. good.

[0019] In addition, even if components that are independent on the circuit diagram are connected, In the case where a conductive film is connected to a plurality of components, for example, when a part of the wiring also functions as an electrode, In this specification, the term "connection" refers to such a conductive A membrane that combines the functions of multiple components is also included in this category.

[0020] The source terminal of a transistor is a source region that is a part of the active layer, or a Similarly, the drain terminal of a transistor refers to the connected source electrode of the active layer. The term "drain electrode" refers to a drain region that is a part of the active layer, or a drain electrode that is connected to the active layer.

[0021] The source terminal and the drain terminal of the transistor are determined by the channel type and The name is changed depending on the potential applied to the source and drain terminals. Generally, in an n-channel transistor, the lower one of the source terminal and the drain terminal The terminal to which a potential is applied is called the source terminal, and the terminal to which a higher potential is applied is called the drain terminal. In addition, in a p-channel transistor, the lower one of the source terminal and the drain terminal The terminal to which a lower potential is applied is called the drain terminal, and the terminal to which a higher potential is applied is called the source terminal. For convenience, the source and drain terminals are referred to as fixed terminals in this specification. In some cases, the connection relationship of the transistors may be explained on the assumption that Therefore, the names of the source terminal and the drain terminal are interchangeable. Effect of the Invention

[0022] According to one embodiment of the present invention, a novel semiconductor device or the like can be provided or a semiconductor device capable of displaying an afterimage can be provided. To provide a light emitting device capable of preventing a residual image from being displayed or to prevent a residual image from being displayed. It is therefore possible to provide a method for driving a light emitting device that can achieve the above.

[0023] Alternatively, a light-emitting device capable of displaying image information even at a high scanning frequency according to one embodiment of the present invention or driving a light-emitting device capable of displaying image information even at a high scanning frequency. It is possible to provide a method.

[0024] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description, This is self-evident from the description in the drawings, claims, etc. It is possible to extract other effects from any of the descriptions. [Brief description of the drawings]

[0025] [Figure 1] 1A and 1B are diagrams showing a structure of a light-emitting device and a structure of a pixel. [Diagram 2] FIG. [Diagram 3] Circuit diagram of the pixel section. [Figure 4] 3 is a timing chart of a pixel unit. [Diagram 5] Circuit diagram of the pixel section. [Figure 6] Circuit diagram of the pixel section. [Figure 7] Circuit diagram of the pixel section. [Figure 8] Circuit diagram of the pixel section. [Figure 9] 3 is a timing chart of a pixel unit. [Figure 10] FIG. 1 illustrates a structure of a light-emitting device. [Figure 11] FIG. [Figure 12] Top view of a pixel. [Figure 13] FIG. 1 is a cross-sectional view of a transistor. [Figure 14] FIG. [Figure 15] Electronic devices illustration. [Figure 16]1A and 1B are a top view and a cross-sectional view of a transistor. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. Various changes in details can be made, as will be readily understood by those skilled in the art. The present invention is not to be construed as being limited to the description of the following embodiment.

[0027] In the embodiments described below, the same parts or parts having similar functions are referred to as the same. The same reference numerals are used in common among different drawings, and the repeated explanations are omitted.

[0028] In addition, when the same symbols are used, especially when it is necessary to distinguish among them, the symbols should be marked with " In some cases, identification symbols such as "(n)" or "(m, n)" may be added.

[0029] (Embodiment 1) FIG. 1A is a block diagram showing an example of a configuration of a light-emitting device according to one embodiment of the present invention. In the block diagram, components are classified by function and shown as independent blocks. However, in reality, it is difficult to completely separate components by function. may be involved in multiple functions.

[0030] The light-emitting device 100 shown in FIG. 1A includes a pixel portion 102 having a plurality of pixels 101 and a signal line driver 103. a source driver 124, a scanning line driver circuit (gate driver) 125, The display device includes at least a panel 103 having a display unit, a controller 104, and a power supply circuit 105. Each pixel 101 includes a light emitting element and a transistor for controlling the operation of the light emitting element. It has.

[0031] When the signal Sig0 having image information is input, the controller 104 Signal Sig0 is subjected to signal processing in accordance with the specifications and is supplied to the panel 103 as signal Sig1. The controller 104 also has a function of supplying a signal Sig2 that does not include image information. and supplying it to the panel 103.

[0032] The power supply circuit 105 supplies the panel 103, the controller 106, and the power supply Vp input to the light emitting device 100. The controller 104 has a function of generating a voltage to be supplied to various other circuits in the light emitting device 100. The power supply circuit 105 supplies a voltage VDD to the pixels 101 in the pixel section 102. Specifically, in FIG. 1A, the voltage VDD is the ground potential. The potential difference between the fixed potential Vcom and the potential Vel is supplied to each of the pixels 101. The controller 104 controls the power supply circuit 105 to supply a voltage VD It has the function of selecting whether or not to supply D.

[0033] The power supply circuit 105 has a function of controlling the supply of voltage to various circuits included in the panel 103. It may have the following structure.

[0034] The scanning line driver circuit 125 selects the pixels 101 in the pixel section 102 for each row. It has functions.

[0035] The signal line driving circuit 124 receives the signal Sig1 or the signal S ig2 to the pixels 101 in the row selected by the scanning line driving circuit 125. do.

[0036] Here, the signal Sig2 is a constant potential that does not contain image information. may be generated by the signal line driver circuit 124 or the power supply circuit 105. , the signal Sig2 may be given the potential Vcom or the potential Vel.

[0037] Next, FIG. 1B shows an example of a specific configuration of the pixel 101. 101 includes a light emitting element EL1, a transistor M1, a transistor M2, and a transistor M3 and at least

[0038] The light-emitting element EL1 includes elements whose luminance is controlled by a current or a voltage. For example, an OLED (organic light-emitting diode) or the like can be used as the light-emitting element EL1. An OLED has at least an EL layer, an anode, and a cathode. It consists of a single layer or multiple layers between the electrode and the cathode. The EL layer includes at least a light-emitting layer containing a light-emitting substance. When the potential difference between the cathode and the anode becomes equal to or greater than the threshold voltage Vthe of the light-emitting element EL1, The current that flows through the material produces electroluminescence. , luminescence (fluorescence) when returning from the singlet excited state to the ground state, and luminescence (fluorescence) when returning from the triplet excited state to the ground state This includes the emission of light (phosphorescence) upon return.

[0039] The transistor M3 is a light-emitting element having a power supply voltage corresponding to the potential difference between the potential Vcom and the potential Vel. That is, the power supply voltage is supplied to the transistor M 3 to the light emitting element EL1.

[0040] The transistor M1 is connected to the panel 103 by the signal Sig1 provided by the controller 104. The input to the gate electrode of transistor M3 is controlled by the

[0041] The transistor M2 is connected to the panel 103 by the signal Sig2 provided by the controller 104. The input to the gate electrode of transistor M3 is controlled by the

[0042] Specifically, in pixel 101, the source terminal and the drain terminal of transistor M3 are One of them is connected to the wiring ANL to which a potential Vel is applied, and the other is connected to the light-emitting element E The anode and cathode of the light-emitting element EL1 are connected to either the anode or the cathode of the light-emitting element EL2. The other of these is connected to a terminal CTL to which a potential Vcom is applied. Either the source terminal or the drain terminal of the transistor M1 is connected to the signal Sig1. The other end is connected to the gate electrode of the transistor M3. The gate electrode of the transistor M1 is connected to the on / off state of the transistor M1. A signal for selecting off is input to the source terminal of the transistor M2. Either the drain terminal or the drain terminal is connected to the wiring SL2 to which the potential of the signal Sig2 is applied. The other end is connected to the gate electrode of the transistor M3. A signal for selecting whether the transistor M2 is on or off is input to the gate electrode of the transistor M2. can be.

[0043] In one embodiment of the present invention, in a normal operation state in which an image is displayed on the pixel portion 102, A signal Sig1 having image information is applied to the wiring SL1. A signal Sig2 having no information is provided.

[0044] An example of the operation of the pixel 101 shown in FIG. 2A to 2D are schematic diagrams illustrating the operation of the pixel 101. In the pixel 101, a capacitance element C1 for holding the gate voltage of the transistor M3 is provided. The figure shows an example in which a gate electrode (G) of the transistor M3 is connected to the active layer. If the gate capacitance formed in the gate electrode or the parasitic capacitance of the gate electrode is sufficiently large, the capacitance element It is not necessary to provide C1 in the pixel 101. The transistor M1 and the transistor M2 are illustrated as switches. In FIG. 2(D), the drain terminal (D) of the transistor M3 is connected to the wiring ANL. 1 shows an example in which the source terminal (S) is connected to the light-emitting element EL1.

[0045] FIG. 2A shows a pixel 101 when a signal Sig1 having image information is input to the pixel 101. 2A shows the operation of the transistor M1. In FIG. 2A, a signal Si The potential of g1 is applied to the gate electrode of the transistor M3 from the wiring SL1. Charge is accumulated in the transistor 1 according to the above potential. Then, a voltage is applied between the terminal CTL and the wiring ANL. When the supply voltage is applied, the value of the drain current of the transistor M3 is equal to the value of the drain current of the signal Sig1. The luminance of the light-emitting element EL1 is determined according to the drain current value.

[0046] FIG. 2B is a schematic diagram showing the operation of the pixel 101 when the pixel 101 holds the signal Sig1. In FIG. 2B, when the transistor M1 is turned off, the wiring SL1 and the transistor Therefore, the stored charge in the capacitance element C1 is The charge is held, and the potential of the gate electrode of the transistor M3 is also held. When the power supply voltage is applied between L and the wiring ANL, it is determined according to the potential of the signal Sig1. The drain current value of the transistor M3 and the luminance of the light-emitting element EL1 are This remains true even after 1 is turned off.

[0047] When the off-state current of the transistor M1 is extremely small, the capacitance element C In this case, the charge stored in transistor M1 can be prevented from leaking out. After the input of the signal Sig1 to the pixel 101 is terminated by turning off the transistor M3 The potential of the gate electrode of the light emitting element EL1 is unlikely to fluctuate, and therefore the luminance of the light emitting element EL1 is prevented from changing. It can be prevented.

[0048] However, when the off-state current of the transistor M1 is extremely small, the current stored in the capacitor C1 The load is held, and then a signal Sig1 with image information different from that in Figure 2(A) is input. However, the charge held in the capacitance element C1 cannot be completely replaced, and the immediately preceding image information However, this may be displayed as an afterimage in the pixel section 102. For example, FIG. A signal Sig1 that turns off the transistor M3 and causes the light-emitting element EL1 to not emit light is applied to the pixel 101. When the signal Sig1 is input, the capacitance element C1 The charge that was retained could not be completely discharged, and transistor M3 remained on. The current continues to be supplied to the light emitting element EL1, and an afterimage is displayed in the pixel portion 102. It ends up like this.

[0049] Therefore, in one aspect of the present invention, immediately before the signal Sig1 is supplied to the pixel 101, Then, a signal Sig2 that does not have image information is input to the pixel 101, and the gate of the transistor M3 is The potential of the electrode is initialized.

[0050] FIG. 2D shows a case where a signal Sig2 that does not have image information is input to the pixel 101. 2(D) shows the operation of the transistor M2. In FIG. The potential of ig2 is applied to the gate electrode of the transistor M3 from the wiring SL2. If the transistor M3 is an n-channel type, the potential of the signal Sig2 is The voltage is set to a level equal to or lower than the threshold voltage. In the case of a channel type, the potential of the signal Sig2 is set such that the gate voltage of the transistor M3 is equal to or lower than the threshold The height shall be equal to or higher than the voltage.

[0051] Therefore, if a charge is stored in the capacitance element C1 according to the potential of the signal Sig1, When the potential of Sig2 is input to the pixel 101, the charge is discharged. The transistor M3 is turned off, and the light-emitting element EL1 does not emit light.

[0052] After that, the signal Sig1 is input to the pixel 101 again, and the light-emitting element At this time, the luminance of the pixel EL1 is determined. At this time, the pixel 101 is initialized in advance by the signal Sig2. Therefore, no residual image is displayed in the pixel portion 102.

[0053] In FIG. 1B, the transistors M1 to M3 each have a single-gate structure. As shown, these transistors have multiple gate electrodes that are electrically connected. In this way, a multi-gate structure having a plurality of channel formation regions may be used.

[0054] Next, an example of the configuration of the pixel unit 102 will be described. An example of a circuit diagram is shown.

[0055] As shown in FIG. 3, the pixel unit 102 includes a plurality of wirings GL, a plurality of wirings SL1, and a plurality of wirings SL2. The pixel section 1 includes a line SL2, an interconnect ANL, and a plurality of pixels 101. 02 has a configuration in which pixels 101 are arranged vertically in n rows and horizontally in m columns (n ​​and m are integers of 2 or more). The pixel section 102 includes the first row, the second row, the nth row, and the nth row in order from the pixel 101 at the top of FIG. Starting from the left pixel in FIG. 3, the pixels are counted as the 1st column, the 2nd column, the mth column, and so on. The GLs are given the symbols GL(0), GL(1), GL(2) through GL(n) from top to bottom. The wiring SL1 is, from the left, SL1(1), SL1(2) to SL1(m). Similarly, the wiring SL2 is designated from the left as SL2(1), SL2(2) to SL2(3). Each pixel 101 is electrically connected to a terminal CTL. are connected to the network.

[0056] In the case of the light-emitting device 100 shown in FIG. 1A, the wirings SL1 are connected to the signal line driver circuit 124. , the wirings GL are connected to the scanning line driving circuit 125, and the wirings A The terminals NL and CTL are connected to a power supply circuit 105. One of the wirings SL1, two of the wirings GL, one of the wirings SL2, and a wiring A NL. All the pixels 101 are connected to a terminal CTL.

[0057] In the pixel 101 in the kth row (k is an integer equal to or greater than 1), the gate electrode of the transistor M1 is That is, the transistor M1 is connected to the line GL(k). When the line SL1 is turned on, a signal is transmitted from the line SL1 to the pixel 101 in the kth row via the transistor M1. The signal Sig1 is input.

[0058] In the pixel 101 in the (k+1)th row, the gate electrode of the transistor M2 is That is, the transistor M2 is connected to the wiring GL(k) existing in the wiring GL( k) is selected, the k+1-th transistor is selected, and the k+1-th A signal Sig2 is input to the pixels 101 in the row, and the pixels 101 are initialized.

[0059] When a signal Sig1 having image information is input to the pixel 101, the pixel Specifically, the light emitting state of the light emitting element EL1 is determined according to the potential of the signal Sig1. When the transistor M3 is turned on, a current is supplied to the light-emitting element EL1 and the light-emitting element EL1 emits light. In addition, the transistor M3 is turned on according to the potential of the signal Sig1 or the signal Sig2. When the light emitting element EL1 is turned off, no current is supplied to the light emitting element EL1, and the light emitting element EL1 is not emitting light. It becomes a state of light.

[0060] The operation of the pixel unit 102 will be described with reference to the timing chart shown in FIG. 3. 3. A signal Sig1 is supplied to the wiring SL1 shown in FIG. FIG. 4 shows an example of a timing chart for Sig2. The figure shows a timing chart in which one frame period is divided into n+1 periods from period p0 to period pn. The timing chart shown in FIG. 4 is based on the timing chart shown in FIG. This is an example in which the transistor is an n-channel type.

[0061] The signal Sig2 is maintained at a constant potential from the period p0 through the period pn.

[0062] First, in a period p0, the line GL(0) is selected, so that a signal is applied to the pixel 101 in the first row. A signal Sig2 is input and the pixel is initialized.

[0063] Next, during a period p1, the wiring GL(0) is deselected (a low-level potential is applied). ), the line GL(1) is selected. When the line GL(1) is selected, the pixel 101 in the first row At the same time, a signal Sig2 is applied to the pixels 101 in the second row. Then, the pixel is initialized.

[0064] Next, in a period p2, the line GL(1) is deselected, and the pixel 101 in the first row The state of period p1 is maintained until a signal is input. When the wiring GL(2) is selected, A signal Sig1 is input to the pixels 101 in the second row. At the same time, a signal Sig2 is given and the pixel is initialized.

[0065] By repeating the above operation until the wiring GL(n) is selected, the initialization by the signal Sig2 is performed. The signal Sig1 is input in order from the pixel 101 in the first row to the pixel 101 in the nth row. An image can be displayed on the element 102 .

[0066] As described above, the timing at which the signal Sig2 is input to the pixel is shifted to the row one above. When the scanning frequency of the light emitting device 100 is set to a high frequency by synchronizing with the selection of the wiring GL, Even in this case, the signal Sig2 can be input to the pixel 101 without delay.

[0067] FIG. 5 shows a circuit diagram in which the wiring ANL is connected to the pixel without changing the connection relationship between the elements and the wiring in FIG. FIG. 1 is a circuit diagram of a case where the unit 102 is arranged in the horizontal direction.

[0068] In the circuit diagram of FIG. 3 or FIG. 5, the wiring SL2 is connected to the terminal CTL, for example. (See FIG. 6).

[0069] 3 or 5, for example, the wiring SL2 is not provided, and the transistor Either the source terminal or the drain terminal of M2 is connected to the terminal CTL, and the other The other terminal may be connected to the gate electrode of the transistor M3 (see FIG. 7).

[0070] 3 or 5, for example, the wiring SL2 is not provided, and the transistor Either the source terminal or the drain terminal of M2 is connected to the source of the transistor M3. and the other may be connected to the gate electrode of the transistor M3 (see FIG. 8). In this way, when the transistor M2 is turned on, the capacitance element C1 is short-circuited. The pixel 101 is then initialized.

[0071] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0072] (Embodiment 2) In this embodiment, one embodiment of the present invention will be described with reference to FIG. This is effective when the signal Sig1 is input at a high scanning frequency, for example, in double-speed driving. When the scanning frequency becomes higher, the period given to the input of the signal Sig1 becomes shorter, and In some cases, it may not be possible to write a sufficient potential to Sig1. This can solve the problem.

[0073] A timing chart showing one embodiment of the present invention is shown in FIG. The timing is earlier than the timing when the signal Sig1 is applied to the line SL1 by the period during which the line GL is selected. When the same signal as signal Sig1 is input to wiring SL2 as signal Sig2 in the timing The data of the signals Sig1 and Sig2 are divided. The periods are referred to as signals S1, S2, S3 through Sn.

[0074] In the period p0 of FIG. 9, the signal Sig2 is output as a signal with the line GL(0) selected. When S1 is applied to the wiring SL2, the signal S1 is input to the pixels 101 in the first row. The gate electrode of the transistor M3 of the pixel 101 in the first row is precharged by the signal S1. It will be in this state.

[0075] Next, during a period p1, in a state where the wiring GL(1) is selected, the signal S 1 is again input to the pixel 101 in the first row via transistor M1. That is, the signal S1 is input to the pixel 101 in the first row over two periods from period p0 to period p1. During the period p1, the transistor M3 of the pixel 101 in the second row is turned on by the signal Sig2. Precharging of the gate electrodes occurs at the same time.

[0076] For example, even if the period given to the input of signal Sig1 is halved due to double-speed drive, Since the input from signal Sig2 is supplemented, the input period of the summed signal S1 is not halved. , the signal S1 is input without any problem.

[0077] By repeating the above operation until the wiring GL(n) is selected, even in double-speed driving, the signal S1 is Data up to number Sn can be input to the pixel section 102 without any problem.

[0078] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0079] (Embodiment 3) In this embodiment, a more detailed configuration example of the light emitting device 100 shown in FIG. He explains.

[0080] FIG. 10 is a block diagram illustrating an example of a configuration of a light-emitting device according to one embodiment of the present invention. The light-emitting device 100 shown in FIG. 0 has a pixel portion having a plurality of pixels 101, similar to the case of FIG. 102, a signal line driving circuit (source driver) 124, and a scanning line driving circuit (gate driver A panel 103 having a power supply 105, a controller 104, and a power supply circuit 105. Furthermore, the light emitting device 100 shown in FIG. , an image processing circuit 122 , and an image memory 123 .

[0081] The input device 120 has a function of giving information and commands to the CPU 121 of the light emitting device 100. For example, the pixel unit 102 may be switched from an operating state to a non-operating state by the input device 120. or an instruction to transition the pixel unit 102 from a non-operating state to an operating state. The input device 120 may include a keyboard, a pointing device, a keyboard, a pointer ... A touch device, touch panel, etc. can be used.

[0082] The CPU 121 decodes the command input from the input device 120 and enables the light emitting device 100. It has the function of executing the command by comprehensively controlling the operation of various circuits.

[0083] For example, a command from the input device 120 to transition the pixel unit 102 from an operating state to a non-operating state When this signal is received, the CPU 121 determines whether the power supply voltage from the power supply circuit 105 to the pixel unit 102 is The controller 104 is commanded to stop the supply.

[0084] Alternatively, a command to transition the pixel unit 102 from a non-operating state to an operating state is received from the input device 120. When this signal is received, the CPU 121 determines whether the power supply voltage from the power supply circuit 105 to the pixel unit 102 is A command is issued to the controller 104 to resume supply.

[0085] The image memory 123 has a function of storing image data 126 input to the light emitting device 100. In FIG. 10, only one image memory 123 is provided in the light emitting device 100. Although illustrated, a plurality of image memories 123 may be provided in the light emitting device 100. For example, the pixel unit is formed by three pieces of image data 126 each corresponding to a hue such as red, blue, and green. When a full-color image is displayed on the display 102, image memory 126 corresponding to each image data is 123 may be provided respectively.

[0086] The image memory 123 is, for example, a dynamic random access memory (DRAM). Memory), SRAM (Static Random Access Memory), SRAM (Static Random Access Memory) Alternatively, the image memory 123 may be a VRAM (Vi Alternatively, deo RAM may be used.

[0087] The image processing circuit 122 processes the image data 126 in accordance with an instruction from the controller 104. Write to memory 123 and read image data 126 from image memory 123. It also has a function of generating a signal Sig1 from image data 126.

[0088] The controller 104 controls the driving circuits of the signal line driving circuit 124 and the scanning line driving circuit 125. The driving signal includes the following: A start pulse signal SSP and a clock signal SCK that control the operation of the signal line driving circuit 124 , a latch signal LP, a start pulse signal GSP for controlling the operation of the scanning line driving circuit 125, This includes the clock signal GCK.

[0089] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0090] (Embodiment 4) In this embodiment, a cross-sectional structure of the light-emitting device and the transistor described in the above embodiment will be described. The layout will be explained using the drawings.

[0091] <Cross-sectional structure of light-emitting device> FIG. 11 shows an example of a cross-sectional structure of a pixel portion of a light-emitting device according to one embodiment of the present invention. 11, the transistor M3, the capacitor C1, and the 1 illustrates a cross-sectional structure of the light-emitting element EL1.

[0092] Specifically, the light emitting device shown in FIG. 11 includes a transistor M3 and a capacitance element C1 on a substrate 400. The transistor M3 has a conductive film 401 functioning as a gate and a conductive film 401 The insulating film 402 is sandwiched between the semiconductor film 403 and the conductive film 401. The conductive film 400 serving as a source or drain electrically connected to the semiconductor film 403 4 and a conductive film 405.

[0093] The capacitance element C1 includes a conductive film 401 functioning as an electrode, an insulating film 402 on the conductive film 401, and A conductive film 401 overlaps with the conductive film 401 with the insulating film 402 interposed therebetween and functions as an electrode. 404.

[0094] The insulating film 402 may be made of aluminum oxide, magnesium oxide, silicon oxide, or silicon oxynitride. , silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, oxide One or more of zirconium, lanthanum oxide, neodymium oxide, hafnium oxide and tantalum oxide The insulating film including the above may be used as a single layer or a laminated layer. An oxynitride is a material whose composition contains more oxygen than nitrogen. refers to a material whose composition contains more nitrogen than oxygen.

[0095] In addition, an insulating film 411 is provided over the semiconductor film 403, the conductive film 404, and the conductive film 405. When an oxide semiconductor is used for the semiconductor film 403, the insulating film 411 is It is preferable to use a material capable of supplying oxygen to the insulating film 4. By using the insulating film 411 as the insulating film 412, oxygen contained in the insulating film 411 can be moved to the semiconductor film 403. Therefore, the amount of oxygen vacancies in the semiconductor film 403 can be reduced. The oxygen is transferred to the semiconductor film 403 by performing heat treatment after the insulating film 411 is formed. This can be done efficiently.

[0096] An insulating film 420 is provided on the insulating film 411, and a conductive film 424 is provided on the insulating film 420. The conductive film 424 is provided in the openings in the insulating film 411 and the insulating film 420. 404.

[0097] An insulating film 425 is provided over the insulating film 420 and the conductive film 424. The insulating film 425 is The insulating film 425 has an opening at a position overlapping with the conductive film 424. An insulating film 426 is provided at a position different from the opening of the insulating film 425. An EL layer 427 and a conductive film 428 are stacked in this order on the insulating film 426. The EL layer 427 is in contact with the upper surface of the conductive film 424 and the lower surface of the conductive film 428. The conductive film 424 and the conductive film 428 function as a light-emitting element EL1. one acts as a cathode and the other as a cathode.

[0098] The light emitting device further includes a substrate 430 that faces the substrate 400 with the light emitting element EL1 sandwiched therebetween. On the substrate 430, that is, on the surface of the substrate 430 close to the light emitting element EL1, The shielding film 431 is provided with a shielding function. The light-emitting element EL1 has an opening in a region overlapping the light-emitting element EL1. A colored layer 432 that transmits visible light in a specific wavelength range is provided on the substrate 430 .

[0099] The insulating film 426 is for adjusting the distance between the light emitting element EL1 and the substrate 430. In some cases, it may be omitted.

[0100] In this embodiment, the light from the light emitting element EL1 is extracted from the side opposite to the element substrate. The bottom emission structure is shown, but the light from the light-emitting element EL1 is extracted from the element substrate side. A mission structure, or a structure in which light from the light-emitting element EL1 is guided from the element substrate side and from the opposite side to the element substrate. A dual emission structure in which the emission is from the side and the outside can also be one aspect of the present invention.

[0101] Pixel Layout Next, an example of the layout of the pixel 101 shown in FIG. 12 is a top view of the pixel 101 shown in FIG. 12 as an example. In order to clarify the out, various insulating films and the light emitting element EL1 (conductive film 424, EL layer 4 27 and the conductive film 428) are omitted.

[0102] FIG. 12 shows a layout of a pixel 101a and a pixel 101b arranged above and below.

[0103] In the pixel 101a, the transistor M1 has a conductive film 501 that functions as a gate. A semiconductor film 511 and a semiconductor film 512 electrically connected to the semiconductor film 511 and serving as a source or drain The conductive film 501 is a wiring GL. It has the function of

[0104] In the pixel 101a, the transistor M2 has a conductive film 502 that functions as a gate. A semiconductor film 512 and a semiconductor film 513 electrically connected to the semiconductor film 512 and serving as a source or drain. The conductive film 502 has a conductive film 522 and a conductive film 524 that have both functions. 3, it is electrically connected to the wiring GL (not shown) of the pixel immediately above.

[0105] In the pixel 101a, the transistor M3 has a conductive film 503 that functions as a gate. A semiconductor film 513 and a semiconductor film 514 electrically connected to the semiconductor film 513 and serving as a source or drain. The conductive film 525 and the conductive film 526 have the same functions as the conductive film 50. 4.

[0106] In the pixel 101a, the capacitance element C1 is formed by a conductive film 503, a conductive film 525, and a conductive film 50 The conductive film 503 has an insulating film (not shown) provided between the conductive film 503 and the conductive film 525. It is electrically connected to the membrane 524 .

[0107] In the pixel 101a, the conductive film 504 functions as the wiring ANL.

[0108] In the pixel 101 a , the conductive film 501 is electrically connected to a conductive film 527 .

[0109] In the pixel 101b, the transistor M1 has a conductive film 505 that functions as a gate. and a semiconductor film 514, which is electrically connected to the semiconductor film 514 and serves as a source or drain. The conductive film 505 is a wiring GL. It has the function of

[0110] In the pixel 101b, the transistor M2 has a conductive film 506 that functions as a gate. A semiconductor film 515 and a semiconductor film 516 electrically connected to the semiconductor film 515 and serving as a source or drain. The conductive film 506 has a conductive film 522 and a conductive film 528 each having the same function. 7 to the conductive film 501 of the pixel 101a.

[0111] In the pixel 101b, the transistor M3 has a conductive film 507 that functions as a gate. A semiconductor film 516 and a semiconductor film 517 electrically connected to the semiconductor film 516 and serving as a source or drain. The conductive film 530 has a conductive film 529 and a conductive film 530 having both functions. 8.

[0112] In the pixel 101b, the capacitance element C1 is formed by a conductive film 507, a conductive film 529, and a conductive film 50 The conductive film 507 has an insulating film (not shown) provided between the conductive film 507 and the conductive film 529. It is electrically connected to the membrane 528 .

[0113] In the pixel 101b, the conductive film 508 functions as the wiring ANL.

[0114] In the pixel 101b, the conductive film 505 is connected to the pixel immediately below via the conductive film 531. The input terminal is electrically connected to the gate of the transistor M2.

[0115] The conductive films 501 to 508 can be manufactured in the same process.

[0116] The semiconductor films 511 to 516 can be manufactured in the same process.

[0117] The conductive films 521 to 531 can be manufactured in the same process.

[0118] The conductive film 521 functions as the wiring SL1.

[0119] The conductive film 522 functions as the wiring SL2.

[0120] In FIG. 12, pixels located above and below are electrically connected to each other via conductive films 523, 527, and 531. 11. However, instead of the conductive films 523, 527, and 531, for example, the conductive film 42 in FIG. The pixels may be electrically connected to each other via a conductive film fabricated in the same process as in 4.

[0121] <Transistor structure> Next, a structure of a transistor 70 having a channel formation region in an oxide semiconductor film will be described as an example. Shown below.

[0122] The transistor 70 shown in FIG. 13A includes a conductive film 80 functioning as a gate and a conductive film 8 0, and an oxide semiconductor film 82 overlapping the conductive film 80 with the insulating film 81 sandwiched therebetween. A conductive film 83 serving as a source and a drain connected to the oxide semiconductor film 82 and 13A includes an oxide semiconductor film and a conductive film 84. 82, insulating films 85 to 87 are stacked in order on the conductive film 83 and the conductive film 84. do.

[0123] 13A, a conductive film is formed on the oxide semiconductor film 82, the conductive film 83, and the conductive film 84 in this order. In the example shown, the insulating films 85 to 87 are formed on the oxide semiconductor layer. The insulating film provided on the conductive film 82, the conductive film 83, and the conductive film 84 may be a single layer or a double layer. Alternatively, it may be a multi-layer structure having three or more layers.

[0124] The insulating film 86 contains oxygen in a stoichiometric amount or more, and a part of the oxygen is removed by heating. It is preferable that the insulating film has a function of supplying the insulating film to the oxide semiconductor film 82. 86 is preferably one having few defects, typically due to dangling bonds of silicon. The resulting ESR spectrum (asymmetric ESR spectrum with g value near 2.01) Pin density is 1×10 18 spins / cm 3 However, it is preferable that the insulation If the insulating film 86 is provided directly on the oxide semiconductor film 82, the oxide semiconductor film 8 When damage is given to the insulating film 85, as shown in FIG. 13(A), The insulating film 85 is preferably provided between the oxide semiconductor film 82 and the insulating film 86. 2 is less damaged than the insulating film 86, and the function of permeating oxygen is However, it is preferable that the oxide semiconductor film 82 has a high insulating film. Since the insulating film 86 can be formed directly on the oxide semiconductor film 82 while keeping the thickness of the insulating film 86 small, If present, the insulating film 85 does not necessarily have to be provided.

[0125] It is preferable that the insulating film 85 has few defects. Typically, the following is obtained by ESR measurement: The density of spins near g=2.001 due to dangling bonds in silicon is 3×10 17 spins / cm 3 This is because the defects contained in the insulating film 85 are If the density is high, oxygen will bind to the defects, and the amount of oxygen that permeates the insulating film 85 will decrease. This is because it will take a little time.

[0126] In addition, it is preferable that there are few defects at the interface between the insulating film 85 and the oxide semiconductor film 82. In the ESR measurement, a magnetic field was applied parallel to the film surface, and the oxide semiconductor film 82 The g value derived from oxygen vacancies in the oxide semiconductor used in the present invention is 1.89 to 1.96. The density of spins is 1×10 17 spins / cm3 Below the detection limit is preferred.

[0127] In addition, it is preferable that the insulating film 87 has a blocking effect to prevent the diffusion of oxygen, hydrogen, and water. Alternatively, the insulating film 87 may have a blocking effect to prevent the diffusion of hydrogen and water. ,desirable.

[0128] The higher the density of the insulating film, the more dense it is, and the fewer the dangling bonds it has, making it more chemically stable. It has a blocking effect that prevents the diffusion of oxygen, hydrogen, and water. The insulating film may be, for example, aluminum oxide, aluminum oxynitride, gallium oxide, or gallium oxynitride. Yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride It can be formed by using a material such as a silicon dioxide film. It is an insulating material that has a blocking effect to prevent the diffusion of hydrogen and water. The insulating film may be made of, for example, silicon nitride, silicon oxynitride, or the like.

[0129] When the insulating film 87 has a blocking effect to prevent the diffusion of water, hydrogen, etc., the resin in the panel In addition, impurities such as water and hydrogen present outside the panel may penetrate into the oxide semiconductor film 82. When an oxide semiconductor is used for the oxide semiconductor film 82, A part of the invaded water or hydrogen acts as an electron donor, resulting in the blocking effect. By using the insulating film 87 having the above structure, the threshold voltage of the transistor 70 is increased by the generation of donors. It can prevent shifting.

[0130] In addition, when an oxide semiconductor is used for the oxide semiconductor film 82, the insulating film 87 prevents oxygen diffusion. The blocking effect prevents oxygen from the oxide semiconductor from diffusing to the outside. As a result, oxygen vacancies that serve as donors in the oxide semiconductor are reduced. , it is possible to prevent the threshold voltage of transistor 70 from shifting due to the generation of donors.

[0131] In FIG. 13A, the oxide semiconductor film 82 is a stack of three oxide semiconductor films. Specifically, the transistor 70 shown in FIG. In the oxide semiconductor film 82, the oxide semiconductor films 82a to 82c are insulating films. The oxide semiconductor film 82 of the transistor 70 is stacked in this order from the insulating film 81 side. The oxide semiconductor film may be a single oxide semiconductor film. It is okay if it is.

[0132] The oxide semiconductor film 82a and the oxide semiconductor film 82c constitute the oxide semiconductor film 82b. The element contains at least one metal element that forms an oxide. The energy of the conduction band minimum is The difference is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.05 eV or more, more preferably 0.07 eV or more, more preferably 0.1 eV or more, more preferably ... .15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less, true The oxide semiconductor film 82b is an oxide film close to a vacant level. It is preferable for the compound to contain the compound to have a high carrier mobility.

[0133] As illustrated in FIG. 13B, in the transistor 70, the oxide semiconductor film 82c is a conductive film. The insulating film 85 is provided on the upper layer of the conductive film 84 and the insulating film 83. It's fine.

[0134] In addition, impurities such as moisture and hydrogen, which act as electron donors, are reduced, and the acid The reduced electron vacancies result in a highly purified oxide semiconductor. Since the source of carrier generation is small, the i-type (intrinsic semiconductor) Therefore, a highly purified oxide semiconductor can be obtained. A transistor having a channel formation region in a film has a significantly small off-state current and is highly reliable. In addition, a transistor in which a channel formation region is formed in the oxide semiconductor film has a threshold voltage The electrical characteristics tend to be such that the applied voltage becomes positive (also called normally-off characteristics).

[0135] Specifically, the present invention relates to an on-state transistor having a channel formation region in a highly purified oxide semiconductor film. The small fringe current can be proven by various experiments. For example, 0 6 Even with a device with a channel length of 10 μm, the voltage between the source and drain electrodes is In the drain voltage range of 1V to 10V, the off-state current was measured by the semiconductor parameter analyzer. Below the riser measurement limit, i.e. 1×10 -13 It is possible to obtain a characteristic of A or less. In this case, the off-state current normalized by the transistor channel width is 100zA / μm or less. In addition, by connecting the capacitance element and the transistor, The off-state current is measured using a circuit that controls the charge flowing out of the capacitor with the transistor. In the measurement, a highly purified oxide semiconductor film was used as a channel of the transistor. The on / off state of the transistor is determined based on the change in the charge amount per unit time of the capacitance element. The current was measured. As a result, the voltage between the source and drain electrodes of the transistor was 3V. It was found that an even smaller off-current of several tens of yA / μm can be obtained in the case of In addition, a transistor in which a highly purified oxide semiconductor film is used for a channel formation region has an off-state current The current is significantly smaller than that of a transistor using crystalline silicon.

[0136] In the case where an oxide semiconductor film is used as the semiconductor film, the oxide semiconductor film should be at least It is preferable that the oxide semiconductor contains indium (In) or zinc (Zn). As a stabilizer to reduce the variation in the electrical characteristics of film-based transistors, In addition to these, it is preferable to have gallium (Ga). It is preferable to have tin (Sn) as a stabilizer. It is preferable that the stabilizer contains aluminum (Al). It is preferable that the stabilizer contains zirconium (Zr). .

[0137] Among oxide semiconductors, In-Ga-Zn oxides and In-Sn-Zn oxides are carbon Unlike silicon nitride, gallium nitride, or gallium oxide, sputtering and wet deposition methods This makes it possible to create transistors with excellent electrical characteristics, and is also suitable for mass production. Also, unlike silicon carbide, gallium nitride, or gallium oxide, The In-Ga-Zn oxide is used to form a transistor having excellent electrical characteristics on a glass substrate. It is also possible to manufacture larger substrates.

[0138] Other stabilizers include the lanthanides lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Ho, Erbium, Thulium, Ytterbium, Ru It may contain one or more of the elements tetraethium (Lu).

[0139] For example, oxide semiconductors include indium oxide, gallium oxide, tin oxide, zinc oxide, and I n-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn-Mg oxide, S n-Mg oxide, In-Mg oxide, In-Ga oxide, In-Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide, In-Sn-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al-Zn oxide, I n-Hf-Zn oxide, In-La-Zn oxide, In-Pr-Zn oxide, In -Nd-Zn oxide, In-Ce-Zn oxide, In-Sm-Zn oxide, In- Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, In-D Y-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide, In-Tm -Zn-based oxide, In-Yb-Zn-based oxide, In-Lu-Zn-based oxide, In-Sn- Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide In-Sn-Al-Zn oxides, In-Sn-Hf-Zn oxides, In-Hf- Al-Zn based oxides can be used.

[0140] For example, In-Ga-Zn oxide means an oxide containing In, Ga, and Zn. The ratio of In, Ga, and Zn is not important. In addition, metal elements other than In, Ga, and Zn In-Ga-Zn oxides have a sufficiently high resistance when no electric field is present, and therefore, The flow can be made sufficiently small and the mobility is also high.

[0141] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. Therefore, in the case of In-Ga-Zn oxides, the mobility can be increased by reducing the defect density in the bulk. It can be done.

[0142] Oxide semiconductors are produced by the CVD (Chemical Vapor Deposition) method ( MOCVD(Metal Organic Chemical Vapor Depos) ition) method, ALD (Atomic Layer Deposition) method, thermal C VD method or PECVD (Plasma Enhanced Chemical Vapor Deposition) (including but not limited to) MBE (Molecular Beam Epitaxy or Deposition) Laser Beam Epitaxy (PLD) method or Pulsed Laser Deposition (PLD) method In particular, the MOCVD method and the ALD method can be used to form the film. The thermal CVD method does not use plasma and therefore does not damage the oxide semiconductor. Therefore, the leakage current of the transistor in the off state can be suppressed to a low level.

[0143] Using thermal CVD methods such as MOVCD and ALD, an In-Ga-Zn oxide film is formed. In some cases, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula for trimethylindium is In(CH3)3. The chemical formula for zinc is Ga(CH3)3. The chemical formula for dimethylzinc is Zn(C H3)2. In addition, the combination is not limited to these, and instead of trimethylgallium, Triethylgallium (chemical formula Ga(C2H5)3) can also be used, and dimethylzinc Alternatively, diethylzinc (chemical formula Zn(C2H5)2) can be used.

[0144] The structure of the oxide semiconductor film will be described below.

[0145] Oxide semiconductor films are roughly classified into single-crystal oxide semiconductor films and non-single-crystal oxide semiconductor films. The single crystal oxide semiconductor film includes an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, a polycrystalline oxide semiconductor film, and a polycrystalline oxide semiconductor film. These include semiconductor films and CAAC-OS films.

[0146] The amorphous oxide semiconductor film has an irregular atomic arrangement in the film and is an oxide film that does not have a crystalline component. The film is a compound semiconductor film. It does not have any crystalline parts even in a microscopic area, and the entire film has a completely amorphous structure. A typical example is an oxide semiconductor film.

[0147] The microcrystalline oxide semiconductor film is, for example, a microcrystal having a size of 1 nm or more and less than 10 nm (nanocrystal). Therefore, the microcrystalline oxide semiconductor film has a lower atomic number than the amorphous oxide semiconductor film. Therefore, the microcrystalline oxide semiconductor film has a higher molecular weight than the amorphous oxide semiconductor film. Also, the defect level density is low.

[0148] The CAAC-OS film is one of the oxide semiconductor films that has multiple crystal parts. The crystal part is so large that it fits inside a cube with one side less than 100 nm. The crystals contained in the S film are in the form of cubes with sides of less than 10 nm, 5 nm, or 3 nm. The CAAC-OS film has a smaller defect density than a microcrystalline oxide semiconductor film. The CAAC-OS film is characterized by a low density of recessed states. Observe using a transmission electron microscope. A clear boundary between the crystals, i.e., the grain boundary, was confirmed. Therefore, the CAAC-OS film has a low electron mobility due to the grain boundaries. It can be said that a decline is unlikely to occur.

[0149] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation ) It can be confirmed that the metal atoms are arranged in layers in the crystal part. Each layer has a surface on which the CAAC-OS film is formed (also called a surface on which the film is formed) or a top surface having irregularities. The shape of the CAAC-OS film reflects this, and the CAAC-OS film is aligned parallel to the surface on which the film is formed or the top surface.

[0150] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. refers to the state in which two straight lines are arranged at an angle between 80° and 100°. This includes cases where the angle is between 85° and 95°.

[0151] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (planar TEM). When the metal atoms were observed, they were found to be arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal parts. stomach.

[0152] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It is clear that there are

[0153] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. This indicates that the crystals in the CAAC-OS film have a c-axis orientation, and the c-axis is generally aligned on the surface on which the film is formed or on the upper surface. It can be seen that it is oriented in a substantially vertical direction.

[0154] On the other hand, in-plane X-ray irradiation is performed on the CAAC-OS film in a direction perpendicular to the c-axis. In the analysis by the ane method, a peak may appear at 2θ around 56°. This peak is This is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is set as the axis (φ axis). When the sample is rotated and analyzed (φ scan), the crystal plane equivalent to the (110) plane is In contrast, in the case of the CAAC-OS film, the 2θ is set to 5 Even when the φ is fixed at around 6° and scanned, no clear peak appears.

[0155] From the above, it is considered that the a-axis and b-axis orientations are inconsistent between different crystal regions in the CAAC-OS film. The crystal is regular, but has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which the crystal is formed or the upper surface. Therefore, the layered arrangement confirmed by the cross-sectional TEM observation mentioned above is consistent with the above. Each layer of aligned metal atoms is a plane parallel to the ab plane of the crystal.

[0156] The crystalline portion is formed when the CAAC-OS film is formed or when a crystallization process such as a heat treatment is performed. As described above, the c-axis of the crystal is aligned along the surface on which the CAAC-OS film is formed or along the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape of the CAAC-OS film is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.

[0157] In addition, the degree of crystallinity in the CAAC-OS film may not be uniform. When the crystal part of the CAAC-OS film is formed by crystal growth from the vicinity of the top surface, The adjacent regions may have a higher degree of crystallinity than the regions adjacent the surface to be formed. When impurities are added to a C-OS film, the crystallinity of the region to which the impurities are added changes, resulting in partial In some cases, regions of differing crystallinity may be formed.

[0158] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ of around 36° may be due to the c-axis orientation in some parts of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferred that the spectrum exhibits a peak and does not exhibit a peak at 2θ of around 36°.

[0159] The electrical characteristics of transistors using CAAC-OS films change when irradiated with visible or ultraviolet light. Therefore, the transistor has high reliability.

[0160] In addition, transistors using CAAC-OS films are resistant to external forces such as deformation caused by bending of the substrate. The resistance to damage is stronger than that of Poly-Si transistors or single crystal Si transistors. For example, It is suitable for flexible substrates such as plastics.

[0161] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, or a CA The AC-OS film may be a laminate film having two or more kinds of films.

[0162] In addition, the following conditions were applied to form the CAAC-OS film by sputtering. is preferred.

[0163] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the processing chamber is In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0164] In addition, by increasing the substrate heating temperature during film formation, the migration of sputtered particles after they reach the substrate is reduced. Specifically, the substrate heating temperature is set to 100° C. or higher and 740° C. or lower, preferably The deposition temperature is set to 200°C or higher and 500°C or lower. When plate- or pellet-shaped sputtered particles reach the substrate, they migrate on the substrate. Sputtering occurs and the flat surface of the sputtered particle adheres to the substrate.

[0165] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. The product is %.

[0166] As an example of the target, an In-Ga-Zn oxide target will be described below.

[0167] InO X powder, GaO Y Powder and ZnO Z The powders are mixed in a specified molar ratio and pressurized. By heat treatment at a temperature between 1000 and 1500℃, polycrystalline In-Ga The target is a Zn-based oxide target. X, Y, and Z are any positive numbers. The molar ratio of the specified amount is, for example, InO X powder, GaO Y Powder and ZnO Z Powder is 2:2: 1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 1:4:4 or 3:1:2 The type of powder and the molar ratio of the powder to be mixed depend on the target to be produced. Please change it as appropriate.

[0168] Note that alkali metals are not elements that constitute an oxide semiconductor and are therefore considered impurities. In particular, lithium-earth metals are impurities when they are not elements constituting an oxide semiconductor. Among the alkali metals, Na is preferable when the insulating film in contact with the oxide semiconductor film is an oxide. Diffusion into the insulating film + In addition, Na is an element that is contained in the oxide semiconductor film. It breaks the bond between the metal and oxygen that make up the conductor, or interrupts that bond. As a result, For example, the threshold voltage shifts in the negative direction, resulting in a normally-on state and a decrease in mobility. This causes degradation of the electrical characteristics of the transistors, such as deterioration of the electrical characteristics of the transistors, and also causes variations in the characteristics. Specifically, the measured Na concentration by secondary ion mass spectrometry was 5×10 16 / cm 3 below , preferably 1 x 1016 / cm 3 More preferably, 1×10 15 / cm 3 The following Similarly, the measured Li concentration is 5×10 15 / cm 3 Below, preferably 1×1 0 15 / cm 3 Similarly, the measured value of K concentration should be 5×10 15 / cm 3 Below Lower, preferably 1×10 15 / cm 3 The following should be used.

[0169] In addition, when a metal oxide containing indium is used, the bond energy with oxygen is Silicon and carbon, which are larger than indium, break the bond between indium and oxygen, creating an oxygen vacancy. Therefore, when silicon or carbon is mixed into the oxide semiconductor film, As with alkali and alkaline earth metals, degradation of the electrical characteristics of transistors occurs. Therefore, it is preferable that the concentrations of silicon and carbon in the oxide semiconductor film be low. Specifically, the measured values ​​of C concentration or Si concentration by secondary ion mass spectrometry is 1 x 10 18 / cm 3 With the above configuration, the electrical characteristics of the transistor are preferably as follows. This makes it possible to prevent deterioration of the electrical conductivity of the semiconductor device, thereby improving the reliability of the semiconductor device.

[0170] In addition, depending on the conductive material used for the source electrode and the drain electrode, The metal in the drain electrode may extract oxygen from the oxide semiconductor film. The region of the nitride semiconductor film in contact with the source electrode and the drain electrode is depleted due to the formation of oxygen vacancies. It is made n-type.

[0171] The n-type region functions as a source region or a drain region, so the oxide semiconductor The contact resistance between the film and the source and drain electrodes can be reduced. Therefore, the formation of an n-type region increases the mobility and on-current of the transistor. This makes it possible to realize high-speed operation of a semiconductor device using transistors. This can be done.

[0172] The extraction of oxygen by the metal in the source and drain electrodes This can occur when forming the drain electrode by sputtering or the like, and can occur when forming the source electrode and drain electrode. This can also occur due to a heat treatment carried out after the formation of the rain electrode.

[0173] In addition, the region to be made n-type is made of a conductive material that easily bonds with oxygen as the source electrode and drain electrode. The conductive material is, for example, Al, C. Examples of these include R, Cu, Ta, Ti, Mo, and W.

[0174] In addition, the oxide semiconductor film is not limited to being composed of a single metal oxide film, but may be composed of a stack of metal oxide films. It may be composed of a plurality of metal oxide films. For example, the first to third metal oxide films are formed in order. In the case of a semiconductor film stacked in a layered manner, the first metal oxide film and the third metal oxide film are The metal oxide film has at least one metal element as a component thereof, and has a conduction band below The edge energy is 0.05 eV or more, 0.07 eV or more, 0. 1 eV or more, or 0.15 eV or more, and 2 eV or less, 1 eV or less, 0.5 eV or less The second metal oxide film is an oxide film with a potential of 0.4 eV or less, close to the vacuum level. It is preferable that at least indium is contained since the carrier mobility is increased.

[0175] When a transistor has a semiconductor film having the above structure, a voltage is applied to a gate electrode. When an electric field is applied to the semiconductor film, the second gold layer in the semiconductor film, which has a lower energy at the bottom of the conduction band, A channel forming region is formed in the second metal oxide film. The third metal oxide film is provided between the gate insulating film and the second metal oxide film, so that the gate insulating film is separated from the second metal oxide film. A channel formation region can be formed in the second metal oxide film.

[0176] The third metal oxide film contains at least one of the metal elements constituting the second metal oxide film. Since the second metal oxide film and the third metal oxide film contain Therefore, the movement of carriers is not easily hindered at the interface. The field effect mobility of the transistor is increased.

[0177] In addition, when an interface state is formed at the interface between the second metal oxide film and the first metal oxide film, Since a channel formation region is also formed in the neighboring region, the threshold voltage of the transistor changes. However, the first metal oxide film contains a small amount of the metal element that constitutes the second metal oxide film. Since the second metal oxide film contains at least one of the metal oxides, the boundary between the second metal oxide film and the first metal oxide film is Therefore, the above-mentioned configuration reduces the threshold voltage of the transistor. It is possible to reduce variations in electrical characteristics such as the above.

[0178] In addition, the presence of impurities between the metal oxide films causes carrier flow at the interface between the films. A plurality of oxide semiconductor films are stacked to prevent the formation of an interfering interface state. If impurities exist between the layers of the laminated metal oxide film, the metal oxide film may be The continuity of the energy at the bottom of the conduction band at the interface is lost, and the carriers are transported near the interface. The impurities between the films are either picked up or disappear due to recombination. By reducing the amount of the metal oxide film, it is possible to form a plurality of metal oxide films each having at least one metal as a main component. In this case, the energy of the conduction band minimum is higher than that of the other films. In this case, a state in which the well structure changes continuously (a U-shaped well structure) is easily formed.

[0179] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. (Sputtering equipment) is used to continuously stack each film without exposing it to the air. Each chamber in the sputtering equipment must be free of impurities for oxide semiconductors. In order to remove as much water as possible, a vacuum pump of the adsorption type like a cryopump is used. High vacuum pumping (5×10 -7 Pa or more, 1×10 -4 Pa or less) Alternatively, a turbomolecular pump and cold trap can be combined to circulate the gas from the exhaust system to the chamber. It is preferable to prevent gas from flowing backwards.

[0180] In order to obtain a high-purity intrinsic oxide semiconductor, it is not enough to evacuate each chamber to a high vacuum. In addition, it is also important to increase the purity of the gas used in sputtering. The dew point of gas or argon gas is -40°C or less, preferably -80°C or less, more preferably - By keeping the temperature at 100°C or less and using highly purified gas, moisture and other substances are prevented from being absorbed into the oxide semiconductor film. Specifically, the second metal oxide film is In- In the case of M-Zn oxide (M is Ga, Y, Zr, La, Ce, or Nd), the second metal In the target used for depositing the oxide film, the atomic ratio of metal elements is In:M: If Zn=x1:y1:z1, 、 x1 / y1 is between 1 / 3 and 6, and between 1 and 6 or less, and z1 / y1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. In addition, by setting z1 / y1 to 1 or more and 6 or less, it is possible to form a CA AC-OS film is easily formed. A typical example of the atomic ratio of the metal elements in the target is , In:M:Zn=1:1:1, In:M:Zn=3:1:2, etc.

[0181] Specifically, the first metal oxide film and the third metal oxide film are In-M-Zn oxide (M is G a, Y, Zr, La, Ce, or Nd), the first metal oxide film, the third metal oxide film In the target used to deposit the metal film, the atomic ratio of metal elements is In:M:Zn If we set =x2:y2:z2 、 x2 / y2 <x1 / y1であって、z2 / y2は、1 / 3 It is preferable that z2 / y2 is 1 or more and 6 or less, and more preferably 1 or more and 6 or less. By setting the following, the CAAC-OS film can be used as the first metal oxide film and the third metal oxide film. A typical example of the atomic ratio of the target metal elements is In:M:Z. n=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M :Zn=1:3:8 etc.

[0182] The thickness of the first metal oxide film and the third metal oxide film is 3 nm or more and 100 nm or less. The thickness of the second metal oxide film is preferably 3 nm or more and 50 nm or less. m is from 0.01 to 200 nm, preferably from 0.01 to 200 nm, more preferably from 0.01 to 200 nm, and even more preferably from 0.01 to 200 nm. Between 3nm and 50nm.

[0183] In the three-layered semiconductor film, the first metal oxide film, the second metal oxide film, and the third metal oxide film are amorphous or However, the second metal in which the channel forming region is formed may be either amorphous or crystalline. The oxide film is crystalline, which gives the transistor stable electrical characteristics. Therefore, the second metal oxide film is preferably crystalline.

[0184] Note that the channel formation region is a region of the semiconductor film of a transistor that overlaps with a gate electrode. The channel region is the region sandwiched between the source electrode and the drain electrode. This refers to the region in the core formation region through which current mainly flows.

[0185] For example, the first metal oxide film and the third metal oxide film are formed by a sputtering method. When an In-Ga-Zn oxide film formed by the above method is used, the first metal oxide film and the third metal oxide film are The In-Ga-Zn oxide (In:Ga:Zn=1:3:2 [atomic number The film forming conditions are, for example, a film forming gas containing The gas was argon at 30 sccm and oxygen at 15 sccm, the pressure was 0.4 Pa, and the substrate temperature was The temperature is set to 200°C and the DC power is set to 0.5kW.

[0186] In addition, when the second metal oxide film is a CAAC-OS film, the second metal oxide film is formed by is an In-Ga-Zn oxide (In:Ga:Zn=1:1:1 [atomic ratio]), It is preferable to use a target containing a polycrystalline In-Ga-Zn oxide. For example, argon gas at 30 sccm and oxygen gas at 15 sccm are used as the deposition gas. The pressure was set to 0.4 Pa, the substrate temperature to 300° C., and the DC power to 0.5 kW. Cut.

[0187] Note that the transistor may have a structure in which the end portion of the semiconductor film is inclined. The end of the membrane may have a rounded structure.

[0188] In addition, when a semiconductor film having a plurality of stacked metal oxide films is used for a transistor, In the above structure, the regions in contact with the source electrode and the drain electrode may be n-type. The present invention provides a semiconductor device using a transistor, which has improved mobility and on-current. Furthermore, a semiconductor having a plurality of laminated metal oxide films can be used. When the conductive film is used for a transistor, the region to be made n-type is the second The fact that the metal oxide film is extended to the upper part of the semiconductor layer increases the mobility and on-current of the transistor, and This is more preferable in terms of achieving higher speed operation of the semiconductor device.

[0189] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0190] (Embodiment 5) FIG. 14 is an example of a perspective view of a light-emitting device according to one embodiment of the present invention.

[0191] The light emitting device shown in FIG. 14 includes a panel 1601, a controller, a power supply circuit, an image processing circuit, It has a circuit board 1602 on which an image memory, a CPU, etc. are provided, and a connection part 1603. The panel 1601 includes a pixel portion 1604 having a plurality of pixels, and a plurality of pixels arranged in rows. A scanning line driver circuit 1605 to select a pixel in the selected row, and a signal Sig1 or a signal and a signal line driver circuit 1606 for controlling the input of Sig2.

[0192] Various signals and a power supply potential are transmitted from the circuit board 1602 to the panel via the connection portion 1603. The connection part 1603 is connected to an FPC (Flexible Printer d Circuit) can be used. Also, COF tape can be used for the connection part 1603. In the case of using a scanning line of a part of the circuit board 1602 or the panel 1601, A driver circuit 1605 and a part of a signal line driver circuit 1606 are formed on a separately prepared chip. Then, the chip is connected to the COF tape using the COF (Chip On Film) method. It's fine to keep it that way.

[0193] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0194] (Embodiment 6) The light-emitting device according to one embodiment of the present invention can be used in a display device, a notebook personal computer, a recording medium, Image playback devices equipped with a DVD player (typically DVD: Digital Versatile Digital Used for devices that play recording media such as ISC and have a display that can display the images. In addition, an electronic device in which the light-emitting device according to one embodiment of the present invention can be used As devices, mobile phones, portable game consoles, personal digital assistants, e-book terminals, video cameras, Digital still cameras and other cameras, goggle-type displays (head-mounted displays) (car audio, digital audio player), navigation systems, audio playback devices Layers, etc.), copiers, facsimiles, printers, multifunction printers, ATM machines Examples of such electronic devices include ATMs and vending machines. show.

[0195] FIG. 15A shows a display device, which includes a housing 5001, a display unit 5002, a support stand 5003, etc. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5002. Display devices include all information displays, such as those for personal computers, TV broadcast reception, and advertisement displays. A display device for displaying information is included.

[0196] FIG. 15B shows a portable information terminal, which includes a housing 5101, a display unit 5102, and operation keys 5103. The light-emitting device according to one embodiment of the present invention can be used in the display portion 5102.

[0197] FIG. 15C shows a display device having a curved housing 5701, a display portion 5702, etc. By using a flexible substrate in the light-emitting device according to one embodiment of the present invention, a curved case can be easily formed. The light emitting device can be used for a display portion 5702 supported by a body 5701. It is therefore possible to provide a display device that is compact, lightweight, and easy to use.

[0198] FIG. 15D shows a portable game machine. The portable game machine includes a housing 5301, a housing 5302, a display portion 5303, A display unit 5304, a microphone 5305, a speaker 5306, an operation key 5307, a star The light-emitting device according to one embodiment of the present invention includes a display portion 5303 or a display The display portion 5303 or the display portion 5304 may be used as one of the display devices of the present invention. By using the light emitting device according to the embodiment, the user experience is excellent and deterioration of quality is unlikely to occur. It is possible to provide a portable game machine that can be used with a portable game machine shown in FIG. The display device has two display areas 5303 and 5304. The number of display units is not limited to this.

[0199] FIG. 15E shows an electronic book terminal, which includes a housing 5601, a display portion 5602, and the like. The light-emitting device according to one embodiment can be used for the display portion 5602. By using a substrate that can be used in a flexible light-emitting device, the device can be made flexible. Moreover, it is possible to provide an electronic book terminal that is light and easy to use.

[0200] FIG. 15F shows a mobile phone. A housing 5901 includes a display unit 5902, a microphone 5907, and a speaker. Speaker 5904, camera 5903, external connection part 5906, and operation button 5905 are provided. The light-emitting device according to one embodiment of the present invention can be used for the display portion 5902. In addition, when the light-emitting device according to one embodiment of the present invention is formed on a flexible substrate, The light-emitting device can be applied to a display portion 5902 having a curved surface as shown in FIG. do.

[0201] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0202] (Embodiment 7) In this embodiment, the transistors M1 to M3 described in Embodiments 1 and 2 are An example of a transistor that can be used will be described with reference to FIG.

[0203] FIG. 16A is a top view of a transistor 300, and FIG. 16B is a top view of a transistor 300 shown in FIG. 16(C) is a cross-sectional view taken along dashed line Y1-Y in FIG. 16(A). 16B is a cross-sectional view of the transistor 300 in the channel length direction. 16(C) is a cross-sectional view of the transistor 300 in the channel width direction. In FIG. 16(A), for clarity, some of the components are omitted.

[0204] The transistor 300 includes a conductive film 361 formed on a substrate 362 and a conductive film 362 and a An insulating film 364 on the film 361, an oxide semiconductor film 366 on the insulating film 364, and an oxide semiconductor The conductive film 370a, the conductive film 370b, and the insulating film 372 in contact with the film 366, The conductive film 374 overlaps with the oxide semiconductor film 366 through an intermediate film. An insulating film 376 is provided on the semiconductor device 300.

[0205] In the transistor 300, the conductive film 374 functions as a first gate electrode. The conductive film 361 functions as a second gate electrode. The insulating film 372 functions as a first gate electrode. The insulating film 364 functions as a first gate insulating film. .

[0206] In the transistor 300, the conductive film 370a serves as one of a source electrode and a drain electrode. The conductive film 370b functions as the other of the source electrode and the drain electrode. do.

[0207] As shown in FIG. 16C, a conductive film 374 is provided on the insulating film 372 and the insulating film 364. The first transistor 300 is connected to the conductive film 361 through the opening 389. Since the same potential is applied to the gate electrode and the second gate electrode, the on-current increases and the initial characteristics Reduction of temperature variation, -GBT (minus Gate Bias Temperature e) Suppression of degradation during stress testing and rise of on-current at different drain voltages It is possible to suppress voltage fluctuations.

[0208] In addition, in the transistor 300, the conductive film 374 and the conductive film 361 are not connected to each other, but are different from each other. In this way, the threshold voltage of the transistor 300 can be set to It is possible to control the amount of the conductive film 361. In some cases, the conductive film 361 may be omitted.

[0209] In the oxide semiconductor film 366, the conductive film 370a, the conductive film 370b, and the conductive film 374 overlap. In the following, the elements that form oxygen vacancies are referred to as Representative examples of impurity elements include hydrogen and rare gas elements. Representative examples of rare gas elements are helium, neon, argon, krypton and xenon. In addition, impurity elements include boron, carbon, nitrogen, fluorine, aluminum, and silicon. The oxide semiconductor film 366 may contain elements such as phosphorus and chlorine.

[0210] The insulating film 376 is a film containing hydrogen, and is typically a nitride insulating film. When the insulating film 376 is in contact with the oxide semiconductor film 366, hydrogen contained in the insulating film 376 is absorbed by the oxide semiconductor film 366. As a result, in a region where the oxide semiconductor film 366 is in contact with the insulating film 376, It contains a lot of hydrogen.

[0211] When a rare gas element is added to an oxide semiconductor film as an impurity element, the gold in the oxide semiconductor film is The bond between the metal element and oxygen is broken, and oxygen vacancies are formed. The electrical conductivity of the oxide semiconductor film is increased by the interaction between the electron vacancy and hydrogen. When hydrogen enters the oxygen vacancies in the semiconductor film, carriers (electrons) are generated. As a result, the conductivity is high.

[0212] Examples of substrates that can be used as the substrate 362 include glass substrates, quartz substrates, and plastic substrates. Plate, metal substrate, stainless steel substrate, substrate with stainless steel foil, Tungsten substrate, substrate with tungsten foil, flexible substrate, laminated film , paper containing a fibrous material, or a base film. The glass is made of barium borosilicate glass, aluminoborosilicate glass, or soda lime glass. Examples of flexible substrates include polyethylene terephthalate (PET), Polyethylene naphthalate (PEN) and polyethersulfone (PES) are typical examples of The laminated film is made of a flexible synthetic resin such as acrylic. , polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, etc. Alternatively, a base film such as an inorganic vapor deposition film may be used. Polyester, polyamide, polyimide, aramid, epoxy, inorganic vapor deposition film, or Paper and other items.

[0213] In addition, the substrate 362 is not limited to being a simple support, but can also be used to mount other elements such as transistors and capacitors. The substrate may be a substrate on which a

[0214] The conductive film 361 and the conductive film 374 may be made of aluminum, chromium, copper, or titanium. A metal element selected from the group consisting of tungsten, titanium, molybdenum, and tungsten, or the above-mentioned metal elements. The alloy may be made of an alloy containing the above-mentioned metal elements or a combination of the above-mentioned metal elements. The conductive film 361 and the conductive film 374 may have a single-layer structure or a two-layer structure or more. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, or a nitride film may be laminated on an aluminum film. A two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film A two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. Layer structure: titanium film, aluminum film laminated on titanium film, titanium on top of aluminum film There are also three-layer structures that form a film. A combination of one or more selected from the group consisting of chromium, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film may be used for the conductive film 361 and the conductive film 374. The material can be formed by using a sputtering method, for example.

[0215] In addition, examples of a conductive film that can be used for the conductive film 361 and the conductive film 374 include indium For example, an oxide containing tungsten oxide, indium oxide, Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide (ITO) containing tin, in ... Conductive materials with light-transmitting properties such as indium zinc oxide and indium tin oxide doped with silicon oxide Materials can be used.

[0216] Examples of materials that can be used for the conductive film 370a and the conductive film 370b include aluminum, Titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum The alloy mainly composed of tungsten or tungsten is used in a single layer structure. In particular, aluminum, chromium, copper, and tantalum can be used. It is preferable that the alloy contains one or more elements selected from the group consisting of titanium, molybdenum, and tungsten. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, or a titanium film on a tungsten film Two-layer structure with a copper film laminated on a copper-magnesium-aluminum alloy film A titanium film or titanium nitride film is laminated on the titanium film or titanium nitride film. A titanium film or a copper film is laminated, and a titanium film or a titanium nitride film is further formed on the aluminum film or a copper film. Three-layer structure, a molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film. An aluminum film or copper film is laminated on top of the tantalum film, and a molybdenum film or The molybdenum nitride film is a three-layer structure. A transparent conductive material containing zinc oxide may be used. The conductive film may be formed by, for example, sputtering. The method can be used to form the sintered body.

[0217] For details of the oxide semiconductor film 366, the description of the oxide semiconductor film 82 in FIG. 13 can be referred to.

[0218] The insulating film 364 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 366, At least a region in contact with the oxide semiconductor film 366 is preferably formed using an oxide insulating film. In addition, by using an oxide insulating film that releases oxygen by heating as the insulating film 364, By the heat treatment, oxygen contained in the insulating film 364 can be moved to the oxide semiconductor film 366. It is possible.

[0219] The thickness of the insulating film 364 is 50 nm or more, or 100 nm or more and 3000 nm or less, or 20 By making the insulating film 364 thick, the insulating The amount of oxygen released from the insulating film 364 can be increased, and the insulating film 364 and the oxide semiconductor film The interface state at the interface with the oxide semiconductor film 366 and the oxide semiconductor film 366 in the channel formation region are It is possible to reduce the oxygen vacancies that are present in the crystal.

[0220] The insulating film 364 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide, etc. may be used. It may be provided in layers or laminates.

[0221] The insulating film 372 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 366, At least a region in contact with the oxide semiconductor film 366 is preferably formed using an oxide insulating film. The insulating film 372 is preferably made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. If silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, etc. are used, Preferably, it can be provided as a single layer or a multilayer.

[0222] In addition, an insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided as the insulating film 372. This allows oxygen to diffuse from the oxide semiconductor film 366 to the outside and oxygen to be absorbed from the outside to the oxide semiconductor film 366. It can prevent hydrogen, water, etc. from entering 366. Blocking effect of oxygen, hydrogen, water, etc. Examples of insulating films having such a structure include aluminum oxide, aluminum oxynitride, gallium oxide, and oxide. Gallium oxide, yttrium oxide, yttrium oxynitride, hafnium oxide, oxynitride Hafnium, etc.

[0223] The insulating film 372 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0224] In addition, by using an oxide insulating film which releases oxygen by heating as the insulating film 372, By the heat treatment, oxygen contained in the insulating film 372 can be moved to the oxide semiconductor film 366. It is possible.

[0225] The thickness of the insulating film 372 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less, or can be 10 nm or more and 250 nm or less.

[0226] This embodiment mode can be implemented in appropriate combination with other embodiment modes. [Explanation of symbols]

[0227] C1 Capacitive element M1 Transistor M2 Transistor M3 Transistor p0 Period p1 Period p2 Period S1 signal Sig0 signal Sig1 signal Sig2 signal SL1 Wiring SL2 Wiring 70 Transistor 80 Conductive Film 81 Insulating film 82 Oxide Semiconductor Film 82a Oxide semiconductor film 82b Oxide semiconductor film 82c Oxide semiconductor film 83 Conductive Film 84 Conductive Film 85 Insulating Film 86 Insulating Film 87 Insulating Film 100 Light emitting device 101 pixels 101a pixel 101b pixels 102 Pixel section Panel 103 104 Controller 105 Power supply circuit 120 Input Device 121 CPU 122 Image processing circuit 123 Image Memory 124 Signal line driver circuit 125 Scanning line driver circuit 126 Image Data 300 Transistors 361 Conductive Film 362 Substrate 364 Insulating Film 366 Oxide Semiconductor Film 370a Conductive film 370b Conductive film 372 Insulating Film 374 Conductive Film 376 Insulating Film 389 Aperture 400 Substrates 401 Conductive film 402 Insulating film 403 Semiconductor Film 404 Conductive film 405 Conductive Film 411 Insulating film 420 Insulating film 424 Conductive Film 425 Insulating Film 426 Insulating Film 427 EL layer 428 Conductive Film 430 Substrate 431 Shielding membrane 432 Colored layer 501 Conductive film 502 Conductive film 503 Conductive film 504 Conductive film 505 Conductive Film 506 Conductive Film 507 Conductive Film 508 Conductive film 511 Semiconductor Film 512 Semiconductor film 513 Semiconductor Film 514 Semiconductor Film 515 Semiconductor Film 516 Semiconductor Film 521 Conductive Film 522 Conductive Film 523 Conductive Film 524 Conductive Film 525 Conductive Film 526 Conductive Film 527 Conductive Film 528 Conductive Film 529 Conductive Film 530 Conductive Film 531 Conductive Film 1601 Panel 1602 Circuit Board 1603 Connection 1604 Pixel section 1605 Scanning line driver circuit 1606 Signal line driver circuit 5001 Case 5002 Display section 5003 Support stand 5101 Case 5102 Display section 5103 Operation key 5301 Case 5302 Case 5303 Display section 5304 Display section 5305 Microphone 5306 Speaker 5307 Operation key 5308 Stylus 5601 Case 5602 Display section 5701 Case 5702 Display section 5901 Case 5902 Display section 5903 Camera 5904 Speaker 5905 Button 5906 External connection part 5907 Mike

Claims

1. a light-emitting element, a capacitor, a first transistor, a second transistor, a third transistor, a first gate line, a second gate line, a signal line to which a signal having image information is applied, a power supply line, a first wiring, and a first conductive film; one of a source and a drain of the first transistor is electrically connected to the signal line; the other of the source and the drain of the first transistor is electrically connected to the capacitive element; one of a source and a drain of the second transistor is electrically connected to the first wiring; the other of the source and the drain of the second transistor is electrically connected to the capacitive element; the other of the source and the drain of the second transistor is electrically connected to the gate of the third transistor; the capacitance element has a function of holding a potential of a gate of the third transistor, a signal corresponding to the image information is applied to a gate of the third transistor; one of a source and a drain of the third transistor is electrically connected to the power supply line; When the power supply line is electrically connected to the light emitting element via the source and drain of the third transistor, a current corresponding to the image information is applied to the light emitting element; the first gate line has a region that functions as a gate of the first transistor; the second gate line has a region that functions as a gate of the second transistor; In a plan view, a channel length direction of the first transistor is a direction along a first direction, a channel length direction of the third transistor is aligned along the first direction in a plan view; In a plan view, the signal line has a region extending in the first direction, In a plan view, the first wiring has a region extending in the first direction, In a plan view, the power supply line has a region intersecting with the signal line and a region intersecting with the first wiring, the first conductive film has a region functioning as a gate of the third transistor and a region functioning as one electrode of the capacitor.

2. In claim 1, When the first transistor is on, the second transistor is off; When the second transistor is turned on, the first transistor is turned off.

3. In claim 1 or 2, A signal not including image information is applied to the first wiring.

4. In any one of claims 1 to 3, When the second transistor is turned on, a potential of a gate of the third transistor is initialized.

Images