Smart connectors and methods for manufacturing same using application specific electronic packaging manufacturing processes
The integration of an ASEP device with a separate printed circuit board in the smart connector addresses the challenges of changing features and performance requirements in ASEP devices, enabling cost-effective customization and efficient high-power electronics manufacturing.
Patent Information
- Application Number
- JP2021531243
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-01-22
- Filing Date
- 2020-01-22
- Publication Date
- 2025-04-23
- Estimated Expiration
- 2040-01-22
AI Technical Summary
Existing ASEP devices and manufacturing processes face challenges in changing features and performance requirements, which can necessitate new stamping dies and molds, leading to high costs and time inefficiencies.
The development of a smart connector that incorporates an ASEP device formed using the ASEP manufacturing process, along with a separate printed circuit board, allows for the modification of properties and functionality without the need for new stamping dies or molds.
This approach enables cost-effective and efficient customization of smart connectors for various applications, reducing capital requirements and allowing the same ASEP device to be used with multiple printed circuit boards, thus addressing thermal challenges and improving high-power electronics manufacturing.
Smart Images

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Abstract
Description
[Technical field]
[0001] Related Applications This application claims priority to U.S. Provisional Patent Application No. 62 / 795,299, filed January 22, 2019, the contents of which are incorporated herein in their entirety.
[0002] FIELD OF THE DISCLOSURE The present disclosure relates to smart connectors and methods of manufacture thereof. More particularly, the present disclosure relates to smart connectors and methods of manufacture thereof that use, in part, an Application Specific Electronics Packaging ("ASEP") manufacturing process to form the smart connectors. [Background technology]
[0003] Application Specific Electronics Packaging ("ASEP") devices and manufacturing processes have been developed by applicants that are useful for creating electronics modules that integrate the functions of printed circuit boards, heat sinks, connectors, high current conductors, and thermal management features into a single electronics module. An advantage of the ASEP manufacturing process is that it allows manufacturers to integrate connector functions into electronics modules that would be much larger and more expensive if the connector functions were discrete components. Additionally, the metal contacts integrated into the ASEP devices are highly conductive, thereby providing an optimal path for carrying high currents as well as removing heat very efficiently.
[0004] The ASEP manufacturing process utilizes many of the same manufacturing steps used to manufacture connectors, but adds significantly more functionality with minimal added cost. The ASEP manufacturing process was previously described and illustrated in International Application PCT / US2016 / 039860, filed June 28, 2016, published on January 5, 2017 as WO 2017 / 004064, and in International Application PCT / US2017 / 040736, filed July 5, 2017, and published on January 11, 2018 as WO 2018 / 009554, the disclosures of which are incorporated herein by reference.
[0005] One industry where ASEP devices and ASEP manufacturing processes are proving to be of great value is that of power electronics. With increasing demand for electrification and higher power levels in various industries, the need for better methods of manufacturing high power electronics is growing exponentially.
[0006] Today, power electronics are still assembled on "thick Cu PCBs" which may have 3-5 ounce Cu traces (110-185 microns thick). However, these types of PCBs are not only expensive, but they are not really very good at carrying the very high currents (100-500 amps) required by the industry. Techniques such as the use of heat pipes have been considered to help remove the heat that is generated, but these approaches are often bulky and expensive to implement.
[0007] The ASEP manufacturing process for forming power electronics offers designers an approach that dramatically reduces the electrical resistance in a system, thereby reducing the amount of heat generated. Furthermore, by attaching the power devices that generate some of the heat directly to a highly thermally conductive metal, ASEP devices allow for the removal of the heat that is still generated in a much more efficient manner.
[0008] While ASEP manufacturing devices and processes offer several significant advantages in the design and manufacture of power electronics that may be capable of hundreds of amps of current, one of the challenges associated with changing the features and / or performance requirements of ASEP devices is that a different application may require entirely new stamping dies and / or molds, which can result in difficulties justifying the costs associated with new stamping dies and / or molds, as well as the time associated with manufacturing and qualifying the stamping dies and / or molds.
[0009] Therefore, there is a need for improved ASEP devices and improved processes for fabricating the same. Summary of the Invention
[0010] In one embodiment, the smart connector includes an Application Specific Electronics Packaging (ASEP) device formed by an ASEP manufacturing process and a separate printed circuit board electrically connected to the electrical components of the ASEP device. The ASEP manufacturing process includes forming a continuous carrier web having a plurality of lead frames, overmolding a substrate over the fingers of each lead frame, each substrate having a plurality of openings exposing a portion of the fingers, electroplating the traces, and electrically attaching at least one electrical component to the traces to form a plurality of ASEP devices. In some embodiments, the printed circuit board has an electrical component configured to control a function of the electrical component. In some embodiments, the printed circuit board has an electrical component configured to modify a characteristic of the smart connector.
[0011] In one embodiment, a method of forming a smart connector includes forming a continuous carrier web having a plurality of lead frames, each lead frame defining an opening and having a plurality of fingers extending into the opening; overmolding a substrate over the fingers of each lead frame, each substrate having a plurality of openings provided therethrough exposing a portion of the fingers to form exposed portions; electrically connecting an electrical component to some exposed portions of the fingers of each lead frame to form a plurality of devices, each device having at least one electrical component; and electrically attaching a printed circuit board to the exposed portion of the fingers of one of the devices, the printed circuit board having an electrical component configured to control a function of the at least one electrical component of one of the devices. [Brief description of the drawings]
[0012] The present application is illustrated by way of example, and not limitation, in the accompanying drawings, in which like reference numerals indicate similar elements and in which:
[0013] [Figure 1] FIG. 2 shows a perspective view of a smart connector. [Diagram 2] 1 illustrates a perspective view of an embodiment of an Application Specific Electronics Packaging ("ASEP") device mated with a printed circuit board that forms part of a smart connector. [Diagram 3] 1 illustrates a perspective view of an embodiment of an Application Specific Electronics Packaging ("ASEP") device mated with a printed circuit board that forms part of a smart connector. [Figure 4] 1 illustrates the process used to form an ASEP device on a carrier at various stages of manufacture. [Diagram 5] 1 illustrates the process used to form an ASEP device on a carrier at various stages of manufacture. [Figure 6]1 illustrates a top view of an embodiment of a printed circuit board. [Figure 7] 1 illustrates an exploded perspective view of an embodiment of a smart connector. [Figure 8] FIG. 2 illustrates a perspective view of a connector assembly including a smart connector and a mating connector in an unmated orientation. [Figure 9] FIG. 1 shows a schematic diagram of multiple ASEP devices connected to a single printed circuit board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0014] The following detailed description describes exemplary embodiments, and the disclosed features are not intended to be limited to the combinations expressly disclosed. Thus, unless otherwise specified, features disclosed herein may be combined together to form additional combinations not otherwise shown for brevity. The terms "forward" and "rearward" are used for descriptive purposes only and do not indicate a required orientation during use.
[0015] The present disclosure is directed to improvements in the design and manufacture of a smart connector 360 formed in part using an Application Specific Electronics Packaging ("ASEP") manufacturing process 320. In some embodiments, the smart connector 360 includes an Application Specific Electronics Packaging ("ASEP") device 310 formed using the ASEP manufacturing process 320 and a separate printed circuit board 200 attached to the ASEP device 310 to control the operation of the ASEP device 310 in various ways. In some embodiments, the smart connector 360 includes an Application Specific Electronics Packaging ("ASEP") device 310 formed using the ASEP manufacturing process 320 and a separate printed circuit board 200 attached to the ASEP device 310 to modify the properties of the resulting smart connector 360 in various ways. In one embodiment, the ASEP device 310 and the printed circuit board 200 are assembled / connected to a housing 375 to form the smart connector 360. In some embodiments, as shown generally in FIG. 9, multiple ASEP devices 310 are connected to a printed circuit board 200, which interacts with all of the ASEP devices 310.
[0016] The ASEP device 310 includes basic electrical components 386 that are commonly used in various applications to meet customer needs. The basic electrical components 386 may include, but are not limited to, a microprocessor unit (MPU) / microcontroller unit (MCU), a field programmable gate array (FPGA), field effect transistors (FETs) that may have associated gate drivers, insulated gate bipolar transistors (IGBTs), motor drivers, electronic components to perform a communications front end (such as an RJ45 connector), sensors (such as current sensors), diodes, capacitors, and resistors. A current sensor may be used to monitor the FET. The ASEP manufacturing process 320 offers several significant advantages to the design and manufacture of high power electronics--an industry that will grow exponentially over the next decade due to the electrification of transportation and other industries. Due to the advantages provided by the ASEP device 310 manufactured by the ASEP manufacturing process 320, the FETs may be 40 amp or higher field effect transistors.
[0017] The separate printed circuit board 200 includes electrical components 202 that can vary in characteristics / parameters and interact with the basic electrical components 386 on the ASEP device 310. The electrical components 202 on the separate printed circuit board 200 may include, but are not limited to, a microprocessor unit (MPU) / microcontroller unit (MCU) / central processing unit (CPU), electronic components for implementing communication protocols, memory, field programmable gate arrays (FPGAs). Examples of communication protocols include controller area network (CAN), local interconnect network (LIN), FlexRay, ControlNet, DirectNet, Modbus, Profibus, any two-wire or radio frequency (RF) communication protocol. Previously, these electrical components 202 provided on the separate printed circuit board 200 were integrated into the ASEP device.
[0018] With the present disclosure, because certain features previously provided on prior art ASEP devices are now provided on the separate printed circuit board 200 and not on the ASEP device 310, many of the electronics and components of the smart connector 360 can be easily changed or upgraded by a manufacturer by replacing the separate printed circuit board 200 without requiring retooling to manufacture the more expensive ASEP device 310. This allows the same ASEP device 310 to be used with multiple printed circuit boards 200, thereby allowing a manufacturer to cost-effectively address the requirements of the same customer or multiple customers using the same basic ASEP device 310 and only modifying the printed circuit board 200. While the printed circuit board 200 is not optimal for use in routing high currents and does not have good thermal management characteristics, the printed circuit board 200 provides the smart connector 360 with the benefits of high density circuitry, multi-layering, and can be manufactured very quickly and cost-effectively. As a result, the capital required to manufacture the basic ASEP device 310 can remain unchanged, and minimal capital is only required to manufacture new printed circuit boards 200 for use with the same ASEP device 310. This also solves the thermal challenges associated with the application, since the ASEP device 310 solves the thermal challenges (which the printed circuit board 200 does not), while allowing the application to be customized for each customer by modifying the printed circuit board 200, thereby significantly reducing the capital required for tooling and manufacturing of high power applications.
[0019] Some examples of applications using these electrical components 202, 386 include: 1) a solid state switch where the printed circuit board 200 is the master. In a solid state switch application, the printed circuit board 200 includes the MCU and communication protocol (e.g., CAN, LIN), and the ASEP device 310 includes FETs. 2) a computation module where the printed circuit board 200 is the slave. In a computation module application, the printed circuit board 200 includes the memory, and the ASEP device 310 includes the CPU. 3) a communication module where the printed circuit board 200 is the master. In a communication module application, the printed circuit board 200 includes the MCU and communication protocol, and the ASEP device 310 includes the communication front end (RJ45 connector). 4) a motor module where the printed circuit board 200 is the master. In a motor module application, the printed circuit board 200 includes the MCU and communication protocol, and the ASEP device 310 includes the motor driver.
[0020] As an example of how the printed circuit board 200 controls the operation of the ASEP device 310, if the printed circuit board 200 includes an MCU and a communication protocol, and the ASEP device 310 includes FETs, the MCU on the printed circuit board 200 will command the FETs on the ASEP device 310 to be on or off as needed. As an example, depending on the communication protocol provided on the printed circuit board 200, the operation of the ASEP device 310 will be controlled differently while using the same FETs on the ASEP device 310.
[0021] As an example of how the printed circuit board 200 may modify the characteristics of the resulting smart connector 360, if the printed circuit board 200 includes a memory and the ASEP device 310 includes a CPU, it will change the characteristics of the resulting smart connector 360 depending on code stored in the memory provided on the printed circuit board 200.
[0022] The smart connector 360 is formed in part using an ASEP manufacturing process 320, as known in the prior art, but modified to form the smart connector 360 by accommodating electrical connections to the printed circuit board 200. Attention is now directed to Figure 4, which illustrates the formation of an ASEP device 310 using the modified ASEP manufacturing process 320, where the formed ASEP device 310 is then used as part of the smart connector 360.
[0023] 4, the ASEP manufacturing process 320 begins at step A. The ASEP manufacturing process 320 is preferably performed between a pair of reels (not shown). In step A, a central portion of a carrier web 322 is stamped (thus removing undesired portions of the central portion of the carrier web 322) to form a lead frame 328. The lead frame 328 is formed in a desired configuration suitable for forming the ASEP device 310. The lead frame 328 preferably includes end portions 324a, 324b (it being understood that the end portion 324a, 324b of one lead frame 328 is continuous with the end portion 324a, 324b of an adjacent lead frame 328), a pair of stabilizing portions 330a, 330b (it being understood that the stabilizing portion 330a of one lead frame 328 also preferably serves as the stabilizing portion 330b of an adjacent lead frame 328), each stabilizing portion 330a, 330b spanning the distance between the opposing end portions 324a, 324b (the end portions 324a, 324b are preferably not subjected to stamping in step A). Thus, the opposing end portions 324a, 324b and the stabilizing portions 330a, 330b generally form a rectangular frame defining an opening 332 therebetween. The lead frame 328 also preferably includes a plurality of fingers 334 connected to one of the opposing end portions 324a, 324b and stabilizing portions 330a, 330b and extending inwardly into the opening 332. It will be appreciated that in forming the ASEP device 310, a portion of the fingers 334 form high current contacts 341 and a portion of the fingers 334 form contact pins 342. The high current contacts 341 and contact pins 342 may have one or more apertures 336 provided therethrough for eventual connection to the printed circuit board 200.
[0024] As illustrated in FIG. 4, the ASEP manufacturing process 320 continues at step B. In step B, a substrate 338 is overmolded onto the fingers 334 of the lead frame 328. The substrate 338 has openings 340 provided therethrough exposing various portions 341a of high current contacts 341 for connection to an electronic component 386, as described herein, and openings 343 (see FIG. 5) exposing various portions of the high current contacts 341 and contact pins 342 for connection to an electronic component 202 on a printed circuit board 200. Only a portion of the openings 343 are shown in FIG. 5 for illustrative purposes only, and the configuration of the openings 343 will depend on the connection required between the ASEP device 310 and the printed circuit board 200. Although the openings 343 are shown on the opposite side of the substrate 338, the openings 343 may be through the same side of the substrate 338 as the openings 340. The substrate 338 of the ASEP device 310 may be formed from acrylonitrile butadiene styrene (ABS), polyphenylene sulfide (PPS), syndiotactic polystyrene (SPS), polycarbonate, polycarbonate blends, polypropylene, polypropylene blends. The substrate 338 of the ASEP device 310 may also be advantageously formed from a thermally conductive liquid crystal polymer (LCP). By making the substrate 338 from a thermally conductive LCP, the thermal load of the electronics can be significantly reduced in the ASEP device 310.
[0025] An end portion of the contact pin 342 does not have the substrate 338 overmolded thereon. The overmolding of step B can be performed in a one or two shot process, or any other conventional molding process.
[0026] The ASEP manufacturing process 320 continues with step C, where patterning is performed on the substrate 338. The patterning provides one or more patterns 344 (which may be circuit patterns) formed on the surface of the substrate 338. The patterns 344 may be formed by any number of suitable processes, including laser processes, plasma processes (which may be vacuum or atmospheric processes), UV processes, and / or fluorination processes. Depending on the process used (e.g., plasma, UV, and / or fluorination), the patterning may include patterning most, if not all, of the surface of the substrate 338 (i.e., surface treatment thereof). Thus, the patterns 344 may be formed on all or nearly all of the surface of the substrate 338.
[0027] The ASEP manufacturing process 320 continues with step D. In step D, a metal layer (commonly called a seed layer) is deposited on all or part of the pattern 344 (typically all if the pattern 344 is formed by a laser process, and typically part if the pattern 344 is formed by a plasma, UV and / or fluorination process) and connected to the substrate 338, the metal layer providing a conductive pattern or trace 346. The trace 346 is also provided along the wall of the opening 340, thus electrically connecting the trace 346 to the finger 334 and thus also to the remainder of the lead frame 328. The deposition of the metal layer may be performed by any suitable process, including an electroless plating process, an inkjet process, a screening process, or an aerosol process. Depending on the process used, the deposited metal may be in any suitable form, including an ink or a paste. The deposited metal preferably has a high electrical conductivity and a low binder content to enhance its electrical conductivity. The deposited metal further preferably has a high chemical stability in the plating bath and a viscosity compatible with the desired deposition process. Although not shown, it should be understood that portions of the fingers 334 may act as internal buses that are electrically connected to traces 346 on the surface of the substrate 338 .
[0028] The ASEP manufacturing process 320 continues with step E. In step E, the traces 346 are made conductive (sintered), thereby forming conductive traces 348. The sintering process can be performed, for example, by a laser, or by flash heat, or by any other desired process that provides sufficient thermal energy to fuse particles (e.g., nano- or micron-sized) in the ink or paste. Sintering helps ensure that the deposited metal forming the traces 346 adheres to the substrate 338 and also ensures that the deposited metal is conductive (as applied deposited metal is often not sufficiently conductive to allow an electrical potential to be applied to the traces 346). As can be appreciated, if step D is performed with an electroless plating process, step E does not need to be performed since there is no need to sinter the electroless plating.
[0029] It is further noted that if both steps C and E are performed using lasers, a preferred process has multiple lasers integrated into a single station / location, which saves space in the ASEP manufacturing process 320 and helps ensure that the lasers are properly aligned. Additionally, the integration of multiple lasers in a single station / location allows for faster processing of materials.
[0030] 4, the ASEP manufacturing process 320 continues at step F. In step F, the traces 346 / conductive traces 348 are electroplated by applying an electrical potential to the lead frame 328, which is electrically connected to the traces 346 / conductive traces 348 via an internal bus, and then exposing the lead frame 328, substrate 338 and the traces 346 / conductive traces 348 to an electroplating bath. The electroplating process not only electroplates the traces 346 / conductive traces 348 to form electronic circuit traces 350, but also electroplates the lead frame 328 to form an electroplated lead frame 354 having electroplated fingers 356 with electroplated high current contacts 357, portions 357a thereof exposed through openings 340 in the substrate 338 and electroplated contact pins 358 having portions thereof exposed through openings 343 in the substrate 338. It is further noted that although ASEP device 310 is illustrated with two electroplated high current contacts 357, ASEP device 310 may have any number of electroplated high current contacts 357, as desired. It is understood that step F may include a single-step plating process that builds up a single layer of a single material, such as copper, or may include a multi-step plating process that builds up multiple layers of multiple materials, such as a copper layer and a tin layer, and that other suitable materials may also be used. Increased thickness allows for increased current carrying capacity, and generally, electroplating processes tend to create materials with higher electrical conductivity such that the performance of the resulting electronic circuit trace 350 is improved.
[0031] The connection of the traces 346 to the internal buss allows for electroplating of all metals including copper, nickel, gold, silver, tin, lead, palladium, and other materials. The process of forming and then electroplating the internally bussed traces 346 allows for faster deposition of metals than known electroless plating processes. In addition, the plating process is smoother and less costly when performed using reel-to-reel technology compared to more conventional batch processes.
[0032] In another embodiment, a full thickness of copper (or other conductive material) can be deposited on a surface using techniques such as those included in Mesoscribe (MesoScribe Technologies) technology. A picosecond laser can then be used to isolate the desired conductive pattern in the conductive material. Such an approach can be used instead of or in addition to step F as described herein if more than one plating material is desired.
[0033] Processes C, D, E, and F may be used on a syndiotactic polystyrene (SPS) film provided by XAREC, which provides good retention of the electronic traces 350 to the surface of the substrate 338 .
[0034] After step F, ASEP manufacturing process 320 continues with steps G and H, which are not shown in Figure 4. In step G, a solder mask is applied that covers selected portions of electronic circuit traces 350 and all or substantially all of the exposed surface of substrate 338. In step H, solder paste is stencil printed onto the exposed portions of electronic circuit traces 350 (i.e., those portions not covered by solder mask 352).
[0035] As illustrated in FIG. 6, the ASEP manufacturing process 320 continues with step I. In step I, the basic electrical component 386 is electrically connected to the exposed portion 357a of the electroplated high current contact 357 and the resulting electronic circuit trace 350, preferably via soldering. Thus, the electrical component 386 is directly mounted to the contact 357 and the electronic circuit trace 350, such that the thermal and electrical path has a very low thermal resistance. Thus, the temperature can be controlled much better than on the printed circuit board 200. In one embodiment, the electrical component 386 includes at least a high power FET, such as those manufactured and sold by Infineon Technologies. The FET may include reverse battery protection.
[0036] The ASEP manufacturing process 320 continues with step J, which is not illustrated in Figure 4. At step J, most of the remaining exposed electroplated fingers 356 connected to the "frame" of the electroplated lead frame 354 are punched / removed, leaving only the required amount of exposed electroplated fingers 356 still connected to the "frame" of the electroplated lead frame 354. At this point, if desired, the formed ASEP device 310 can be electrically tested.
[0037] 4, the ASEP manufacturing process 320 continues at step K. At step K, once the ASEP devices 310 have been formed, they need to be removed from the carrier web 322 for singulation in order to be used.
[0038] It should be understood that not all of steps A-K may be required in a particular application. It should be further understood that the order of steps A-K may be changed as appropriate in a particular application. It should also be understood that although the drawings only show ASEP manufacturing process 320 being applied to substrate 338, ASEP manufacturing process 320 may be applied to interior layers as well.
[0039] In one embodiment, the printed circuit board 200 is conventionally formed and includes an insulating substrate 204 having circuitry 206 formed thereon by a thin layer of conductive material deposited or "printed" on the surface of the substrate 204. Individual electronic components 202 are disposed on the surface of the substrate 204 and soldered to the circuitry 206. In one embodiment, the printed circuit board 200 has a number of contact pins 208 extending from the substrate 204, which provide a connector for the ASEP device 310. Some of the contact pins 208 are labeled as shown in FIG. 6 for illustrative purposes only, and the configuration of the contact pins 208 will depend on the connection required for the ASEP device 310.
[0040] The printed circuit board 200 is mated with the ASEP device 310 before or after the ASEP device 310 is singulated. The contact pins 208 are electrically connected to the high current contacts 341 and contact pins 342 as necessary to complete the mating of the printed circuit board 200 and the ASEP device 310. In some embodiments, the contact pins 208 extend through the openings 343 and through the openings 336 to connect to the high current contacts 341 and contact pins 342 in a press-fit manner. In some embodiments, the contact pins 208 are surface mounted to the high current contacts 341 and contact pins 342 through the openings 343, for example by soldering. The mated printed circuit board 200 and ASEP device 310 are then assembled / connected in a housing 375 to form the smart connector 360. In one embodiment, multiple housings are provided, with the printed circuit board 200 in one housing, and each ASEP device 310 may be provided in its own housing. In one embodiment, multiple housings may be provided, with one housing including the printed circuit board 200 and one or more ASEP devices 310, and other ASEP devices 310 provided in their own housings.
[0041] The substrate 338 has a front edge 390, a rear edge 392, and first and second side edges 394, 396. The housing 375 may include a first interior portion (not shown) into which the mated printed circuit board 200 and ASEP device 310 are inserted and accommodated. The side edges 394, 396 of the ASEP device 310 may be inserted into a track portion (not shown) defined by the housing 375 until the front edge 390 of the ASEP device 310 abuts the interior wall (not shown) of the housing 375. The interior wall separates the housing 375 into a first interior portion (not shown) and a second interior portion 398 having a plurality of openings (not shown) extending therethrough that allow the electroplated high current contacts 357 and the electroplated contact pins 358 to extend into the second interior portion 398. The cover 400 can be secured to the housing 375 via known means to close the first interior portion and essentially encapsulate the ASEP device 310 / printed circuit board 200 therein. The cover 400 as well as the interior walls can be configured with track portions for receiving the side edges 394, 396 of the ASEP device 310 to stabilize the ASEP device 310 / printed circuit board 200 in position within the housing 375. A gasket 402 can be provided between the cover 400 and the housing 375 to seal the ASEP device 310 / printed circuit board 200 from external elements.
[0042] Once the smart connector 360 is formed, it can be connected to a mating connector 500 (see FIG. 8 ), which is configured to be electrically connected to the smart connector 360 via the electroplated high current contacts 357 and electroplated contact pins 358, thereby providing a connector assembly. The connector assembly can be mounted in a vehicle, typically to a panel, in a number of known ways, either via the smart connector 360 or via the mating connector 500 (or both, if desired).
[0043] This results in a small and lightweight smart connector 360.
[0044] The printed circuit board 200 may be fitted directly to the side of the substrate 338 that does not have the electrical components 386 thereon. The side of the substrate 338 that does not have the electrical components 386 thereon may be planar and ideally suited for connection to the printed circuit board 200. The printed circuit board 200 may have an outer edge that defines a smaller perimeter than the perimeter defined by the edges 390, 392, 394, 396 of the substrate 338 such that the printed circuit board 200 does not extend beyond the edges 390, 392, 394, 396. This provides a compact assembly. Other orientations are possible. For example, the printed circuit board 200 may be mounted on the same surface as the electrical components 386 and extend outward from one or more of the edges 390, 392, 394, 396, or, for example, the printed circuit board 200 may be above the electrical components 386 and electrically connected to the ASEP device 310.
[0045] The ASEP device 310 and mated printed circuit board 200 can be used to form a smart battery switch that can be used either to carry 400 amps or to provide secondary redundant protection in the event of a primary switch malfunction. The ASEP device 310 and mated printed circuit board 200 can be used to form a smart battery switch that can switch 200 amps. Each battery switch can have reverse battery protection.
[0046] All references cited in this specification, including publications, patent applications, and patents, are hereby incorporated by reference and set forth in their entirety herein to the same extent as if each reference was individually and specifically indicated to be incorporated by reference.
[0047] In the context of describing the invention (particularly in the context of the claims below), use of the terms "a," "an," and "the," as well as "at least one," and similar referents, should be construed to cover both the singular and the plural, unless otherwise stated herein or clearly contradicted by context. Use of the term "at least one," followed by a list of one or more items (e.g., "at least one of A and B"), should be construed to mean one item selected from the listed item (A or B) or any combination of two or more of the listed items (A and B), unless otherwise stated herein or clearly contradicted by context. The terms "comprising," "having," "including," and "containing" should be construed as open-ended terms (i.e., meaning "including, but not limited to"), unless otherwise stated. The description of ranges of values herein is intended to merely serve as a shorthand method of referring individually to each separate value within the range, and each separate value is incorporated into the specification as if it were individually described herein, unless otherwise stated herein. All processes described herein can be performed in any suitable order, unless otherwise stated herein or otherwise clearly contradicted by context. The use of any and all examples or exemplary language (e.g., "etc.") provided herein is intended merely to better illuminate the invention, and does not impose limitations on the scope of the invention unless otherwise claimed. No language in the specification should be construed as indicating any non-claimed element as essential to the practice of the invention.
[0048] Preferred embodiments of the present invention are described herein, including the best mode known to the inventors for carrying out the invention. Variations of these preferred embodiments may become apparent to those skilled in the art upon reading the foregoing description. The inventors expect that those skilled in the art will adopt such variations as necessary, and the inventors intend for the invention to be practiced otherwise than as specifically described herein. Accordingly, this invention includes all modifications and equivalents of the subject matter recited in the claims appended hereto as permitted by applicable law. Moreover, any combination of the above-described elements in all possible variations thereof is encompassed by the present invention unless otherwise indicated herein or otherwise clearly contradicted by context. As can be understood from the various embodiments shown herein, different features of different embodiments shown herein can be combined with each other to form additional combinations. As a result, the embodiments shown herein are particularly suitable for providing a wide range of configurations, not all of which are shown individually, in order to avoid repetition and unnecessary duplication.
[0049] The disclosure provided herein describes features in terms of its preferred and exemplary embodiments, and numerous other embodiments, modifications, and variations within the scope and spirit of the appended claims will occur to those skilled in the art from a consideration of the present disclosure.
Claims
1. 1. A smart connector, comprising: an application specific electronics packaging device comprising: a substrate overmolded onto a plurality of fingers, the substrate having a plurality of openings formed therethrough exposing a portion of the fingers to form exposed portions, and traces formed on the substrate, the traces being electroplated; and at least one electrical component mounted on the substrate, the electrical component electrically attached to the traces; a separate printed circuit board electrically connected to an exposed portion of a finger of the application specific electronics packaging device, the separate printed circuit board having electrical components configured to control a function of at least one electrical component of the application specific electronics packaging device; A smart connector, in a first case, wherein the separate printed circuit board is a first printed circuit board electrically connected to at least one electrical component of the application specific electronics packaging device, the first printed circuit board controlling a function of the at least one electrical component of the application specific electronics packaging device in a first manner, and in a second case, wherein the separate printed circuit board is a second printed circuit board electrically connected to the electrical component of the application specific electronics packaging device, the second printed circuit board controlling a function of the at least one electrical component of the application specific electronics packaging device in a second manner different from the first manner, and only one of the first printed circuit board and the second printed circuit board is attached to the application specific electronics packaging device at a time.
2. 10. The smart connector of claim 1, wherein the at least one electrical component of the application specific electronics packaging device includes a field effect transistor and the electrical components of the separate printed circuit board include a microcontroller unit and a communication protocol.
3. The smart connector of claim 1 , wherein the at least one electrical component of the application specific electronics packaging device includes a communications front end and the electrical component of the separate printed circuit board includes a microcontroller unit.
4. 10. The smart connector of claim 1, wherein the at least one electrical component of the application specific electronics packaging device includes a motor driver and the electrical components of the separate printed circuit board include a microcontroller unit and a communication protocol.
5. The smart connector of claim 1 , wherein at least one electrical component of the application specific electronics packaging device comprises a field effect transistor.
6. The smart connector of claim 5 , wherein at least one electrical component of the application specific electronics packaging device further comprises a current sensor.
7. 10. The smart connector of claim 1, further comprising a housing in which said application specific electronics packaging device and said printed circuit board are mounted.
8. 10. The smart connector of claim 1, further comprising a plurality of application specific electronics packaging devices electrically connected to the printed circuit board.
9. 1. A smart connector, comprising: an application specific electronics packaging device comprising: a substrate overmolded onto a plurality of fingers, the substrate having a plurality of openings formed therethrough exposing a portion of the fingers to form exposed portions, and traces formed on the substrate, the traces being electroplated; and at least one electrical component mounted on the substrate, the electrical component electrically attached to the traces; a separate printed circuit board electrically connected to an exposed portion of a finger of the application specific electronics packaging device, the separate printed circuit board having an electrical component configured to modify a characteristic of the smart connector, the separate printed circuit board being mounted on a surface of the board opposite a surface on which the at least one electrical component of the application specific electronics packaging device is mounted; A smart connector, in a first case, the separate printed circuit board is a first printed circuit board electrically connected to at least one electrical component of the application specific electronics packaging device, the first printed circuit board modifying a characteristic of the smart connector in a first manner, and in a second case, the separate printed circuit board is a second printed circuit board electrically connected to at least one electrical component of the application specific electronics packaging device, the second printed circuit board modifying a characteristic of the smart connector in a second manner different from the first manner, and only one of the first printed circuit board and the second printed circuit board is attached to the application specific electronics packaging device at a time.
10. 10. The smart connector of claim 9, wherein at least one electrical component of the application specific electronics packaging device includes a central processing unit and the electrical components of the separate printed circuit board include a memory.
11. 10. The smart connector of claim 9, further comprising a housing in which said application specific electronics packaging device and said printed circuit board are mounted.
12. 10. The smart connector of claim 9, further comprising a plurality of application specific electronics packaging devices electrically connected to the printed circuit board.
13. 1. A method of forming a smart connector, comprising: forming a continuous carrier web having a plurality of lead frames, each lead frame defining an opening and having a plurality of fingers extending into the opening; overmolding a substrate onto the fingers of each leadframe, each substrate having a plurality of openings provided therethrough exposing portions of the fingers to form exposed portions; electrically connecting an electrical component to the exposed portions of some of the fingers of each lead frame; Severing the fingers from the remainder of each leadframe to form a plurality of devices, each device having at least one electrical component; electrically attaching a printed circuit board to the exposed portions of some of the fingers of one of the devices, the printed circuit board having electrical components configured to control a function of at least one electrical component of a device, the printed circuit board being electrically attached to a surface of the board opposite a surface to which the at least one electrical component of the device is attached; A method in which, in a first case, the printed circuit board is a first printed circuit board electrically connected to at least one electrical component of the device, the first printed circuit board controlling a function of the at least one electrical component of the device in a first manner, and in a second case, the printed circuit board is a second printed circuit board electrically connected to at least one electrical component of the device, the second printed circuit board controlling a function of the at least one electrical component of the device in a second manner different from the first manner, and only one of the first printed circuit board and the second printed circuit board is attached to the at least one electrical component of the device at a time.
14. singulating the one device from the continuous carrier web; and The method of claim 13 , further comprising packaging the singulated device and the printed circuit board in a housing.
15. 1. A method of forming a smart connector, comprising: forming a continuous carrier web having a plurality of lead frames, each lead frame defining an opening and having a plurality of fingers extending into the opening; overmolding a substrate onto the fingers of each leadframe, each substrate having a plurality of openings provided therethrough exposing portions of the fingers to form exposed portions; electrically connecting an electrical component to the exposed portions of some of the fingers of each lead frame; Severing the fingers from the remainder of each leadframe to form a plurality of devices, each device having at least one electrical component; electrically attaching a printed circuit board to the exposed portions of some of the fingers of one of the devices, the printed circuit board having electrical components configured to modify a characteristic of the smart connector, the printed circuit board being electrically attached to a surface of the board opposite a surface to which the at least one electrical component of the device is attached; a first printed circuit board electrically connected to at least one electrical component of the device, the first printed circuit board modifying a characteristic of the smart connector in a first manner, and a second printed circuit board electrically connected to at least one electrical component of the device, the second printed circuit board modifying a characteristic of the smart connector in a second manner different from the first manner, and only one of the first printed circuit board and the second printed circuit board is attached to the at least one electrical component of the device at a time.
16. singulating a device from the continuous carrier web; The method of claim 15 further comprising packaging the singulated device and the printed circuit board in a housing.
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