Semiconductor Device

Abstract

To provide a thin film transistor including an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance of a source electrode or a drain electrode is reduced, and a manufacturing method for the thin film transistor.SOLUTION: The ohmic contact is formed by intentionally providing a buffer layer with higher carrier concentration than an IGZO semiconductor layer between a source electrode layer and a drain electrode layer, and the IGZO semiconductor layer.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a thin film transistor (hereinafter referred to as TFT) using an oxide semiconductor film in a channel formation region. The present invention relates to a semiconductor device having a circuit formed of a liquid crystal display (hereinafter referred to as a liquid crystal display), and a manufacturing method thereof. The components include electro-optical devices such as display panels and light-emitting display devices with organic light-emitting elements. Regarding the electronic devices installed.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] In recent years, a switching element made of a TFT has been installed for each display pixel arranged in a matrix. Active matrix display devices (liquid crystal display devices, light-emitting display devices, and electrophoretic display devices) Active matrix display devices are made up of pixels (or one dot). ) has a switching element, which increases pixel density compared to the simple matrix method. This is advantageous because it can be driven at a low voltage when the

[0004] In addition, thin film transistors (TFTs) and the like are fabricated using oxide semiconductor films in the channel formation region. The technology of fabricating oxide semiconductors and applying them to electronic and optical devices is attracting attention. TFTs that use zinc oxide (ZnO) as the thin film, and InGaO3 (ZnO) m Using T TFTs using these oxide semiconductor films are formed on a light-transmitting substrate. The technology for forming the semiconductor device and using it as a switching element for an image display device is described in Patent Documents 1 and 2. This is disclosed in. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] Thin film transistors using an oxide semiconductor film for a channel formation region have high operating speed and The manufacturing process is relatively simple and sufficient reliability is required.

[0007] In forming a thin film transistor, the source electrode and the drain electrode are made of a low-resistance metal material. In particular, when manufacturing a display device that displays a large area, the resistance of the wiring can cause the signal Therefore, gold, which has a low electrical resistance, is used as the material for wiring and electrodes. On the other hand, it is desirable to use a metal material for the source electrode and the When the thin film transistor structure is such that the drain electrode and the oxide semiconductor film are in direct contact with each other, The tact resistance may become high. The cause of the high contact resistance is the This is due to the formation of a Schottky junction at the contact surface between the drain electrode and the oxide semiconductor film. It can be considered as one.

[0008] In addition, a capacitance is generated at the portion where the source electrode and the drain electrode are in direct contact with the oxide semiconductor film. This results in a lower frequency characteristic (called the f characteristic), enabling high-speed operation of thin-film transistors. There is a risk of hindering it.

[0009] An oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn) is used. In a thin film transistor, the contact resistance of a source electrode or a drain electrode is reduced. It is another object of the present invention to provide a thin film transistor and a manufacturing method thereof.

[0010] In addition, the operating characteristics of a thin film transistor using an oxide semiconductor film containing In, Ga, and Zn One of the challenges is to improve the reliability of the system.

[0011] In addition, the electrical characteristics of a thin film transistor using an oxide semiconductor film containing In, Ga, and Zn In particular, in liquid crystal display devices, it is necessary to reduce the variation in individual If there is a large variation between elements, the display will be uneven due to the variation in the TFT characteristics. There is a risk that this may happen.

[0012] In addition, in a display device having a light-emitting element, the pixel electrodes are arranged so that a constant current flows through them. The on-chip TFT (which supplies current to the driver circuit or the light-emitting element arranged in the pixel) Current (I on If the variation in the brightness of the display screen is large, the brightness of the display screen may vary. There is a problem.

[0013] An object of one embodiment of the present invention is to solve at least one of the above problems. [Means for solving the problem]

[0014] In one embodiment of the present invention, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, A thin film transistor having a buffer layer provided between a semiconductor layer and a source electrode layer and a drain electrode layer. The gist is that it contains a zygote.

[0015] In this specification, a semiconductor formed using an oxide semiconductor film containing In, Ga, and Zn is The semiconductor layer is also referred to as the "IGZO semiconductor layer."

[0016] The source electrode layer and the IGZO semiconductor layer must have an ohmic contact. It is desirable to reduce the contact resistance as much as possible. An ohmic contact is required with the semiconductor layer, and the contact resistance is extremely low. It is desirable to reduce the force.

[0017] Therefore, an IGZO semiconductor is provided between the source electrode layer, the drain electrode layer and the IGZO semiconductor layer. By intentionally providing a buffer layer with a higher carrier concentration than the Form a contact.

[0018] The buffer layer is an oxide semiconductor film having n-type conductivity and containing In, Ga, and Zn. The buffer layer may contain an impurity element that imparts n-type conductivity. , for example, magnesium, aluminum, titanium, iron, tin, calcium, germanium, Scandium, yttrium, zirconium, hafnium, boron, thallium, lead, etc. Magnesium, aluminum, titanium, etc. can be included in the buffer layer. and oxygen blocking effect. The concentration can be kept within the optimum range.

[0019] The buffer layer functions as an n+ layer and can also be called a drain region or a source region. do.

[0020] In order to reduce the variation in the electrical characteristics of thin-film transistors, the IGZO semiconductor layer is It is preferably in a fast state.

[0021] One embodiment of a semiconductor device disclosed in this specification includes a gate electrode layer and a gate electrode layer provided on the gate electrode layer. An insulating layer, a source electrode layer and a drain electrode layer on the gate insulating layer, A buffer layer having an n-type conductivity on the drain electrode layer, and a semiconductor layer on the buffer layer. a gate insulating layer over which a portion of the semiconductor layer overlaps the gate electrode layer; and between the source electrode layer and the drain electrode layer. is an oxide semiconductor layer containing indium, gallium, and zinc, and the carrier of the buffer layer The concentration is higher than the carrier concentration in the semiconductor layer, and the semiconductor layer and the source electrode layer and the drain electrode layer The insulating layer 10 is electrically connected to the insulating layer 10 via a buffer layer.

[0022] One aspect of the present invention solves at least one of the above problems.

[0023] In the above-mentioned structure, a carrier concentration between the semiconductor layer and the buffer layer is higher than that of the semiconductor layer. A second buffer layer may be provided that is higher than the first buffer layer and lower than the second buffer layer. - layer It functions as:

[0024] As the carrier concentration of an oxide semiconductor film containing In, Ga, and Zn (IGZO film) increases, As the amount of In, Ga, and Zn increases, the hole mobility also increases. The relationship between the carrier concentration and the hole mobility of the oxide semiconductor film is as shown in FIG. In this study, the carrier concentration range of the IGZO film suitable for the channel of the semiconductor layer (channel Concentration range 1) is 1×10 17 atoms / cm 3 Less than (more preferably 1 × 10 11at oms / cm 3 (above), the carrier concentration range of the IGZO film suitable for the buffer layer (buffer The concentration range of the α layer is 1×10 18 atoms / cm 3 or more (more preferably 1×10 2 2 atoms / cm 3 The carrier concentration of the IGZO film is preferably 100% or less than that of the semiconductor layer. When used as a gate-type MOSFET, the value is measured at room temperature with no source, drain, or gate voltages applied. be.

[0025] If the carrier concentration range of the IGZO for the channel exceeds the above range, it will not function as a thin film transistor. Therefore, the IGZO film with the above carrier concentration range is used as a semiconductor. By using this as the channel of the thin film transistor, a highly reliable thin film transistor can be obtained.

[0026] In addition, it is preferable to use a titanium film for the source electrode layer and the drain electrode layer. The laminated layer of the tantalum film, the aluminum film, and the titanium film has low resistance, and the aluminum film Hillocks are less likely to occur.

[0027] In addition, the side surface of the source electrode layer and the side surface of the drain electrode layer facing the side surface are formed of a buffer layer. Therefore, the channel length L of the thin film transistor is determined by the first insulating layer covering the source electrode layer. This corresponds to the gap between the buffer layer and the second buffer layer covering the drain electrode layer.

[0028] The present invention also provides a structure for realizing the above-mentioned structure, comprising: forming a gate electrode layer on a substrate; A gate insulating layer is formed on the gate electrode layer, and a source electrode layer and a drain electrode are formed on the gate insulating layer. a buffer layer having n-type conductivity on the source electrode layer and the drain electrode layer; and forming a semiconductor layer on the buffer layer, the semiconductor layer and the buffer layer being made of indium. The buffer layer is formed using an oxide semiconductor layer containing gallium, zinc, and is higher than the carrier concentration of the semiconductor layer, and the semiconductor layer and the source electrode layer and the drain electrode layer are The method for manufacturing a semiconductor device is characterized in that electrical connection is made through a buffer layer.

[0029] In the above manufacturing method, a part of the semiconductor layer is formed on a gate insulating layer overlapping with a gate electrode layer. and is formed between the source electrode layer and the drain electrode layer.

[0030] The semiconductor layer, the buffer layer having n-type conductivity, the source electrode layer, and the drain electrode layer are formed by sputtering. The gate insulating layer and the semiconductor layer are formed in an oxygen atmosphere. (or oxygen 90% or more, rare gas (argon) 10% or less) with n-type conductivity The ZnO layer is preferably formed in a rare gas (argon) atmosphere.

[0031] There are two types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used for depositing insulating films, while the DC sputtering method is mainly used for depositing metal films. It is used in.

[0032] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0033] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There is a sputtering apparatus that uses this method.

[0034] In addition, in a film formation method using a sputtering method, a target material and a sputtering gas component are mixed during film formation. Reactive sputtering is a method of forming thin films of compounds by chemically reacting them with each other, and There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0035] These various sputtering methods are used to form a semiconductor layer, a buffer layer having an n-type conductivity, a source A pole layer and a drain electrode layer are formed. Effect of the Invention

[0036] The present invention provides a thin-film transistor with low photocurrent, low parasitic capacitance, and high on-off ratio. Therefore, a thin film transistor having good dynamic characteristics can be fabricated. It is possible to provide a semiconductor device having a thin film transistor with excellent thermal characteristics and high reliability. . [Brief description of the drawings]

[0037] [Figure 1] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 2] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 3] 1A to 1C illustrate a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 5] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 6] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 7] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 8] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 9] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 10] FIG. 2 is a diagram illustrating a configuration of a shift register. [Figure 11] 11 is a diagram for explaining a connection configuration of the flip-flop shown in FIG. 10 . [Figure 12] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 14] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 15] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 17] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 18] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 19] 1A to 1C are diagrams illustrating a semiconductor device according to one embodiment of the present invention. [Figure 20] 1A and 1B are diagrams illustrating examples of usage of electronic paper. [Figure 21] FIG. 1 is an external view showing an example of an electronic book. [Figure 22] FIG. 1 is an external view showing an example of a television device and a digital photo frame. [Figure 23] FIG. 1 is an external view showing an example of a gaming machine. [Figure 24] FIG. 1 is an external view showing an example of a mobile phone. [Diagram 25] FIG. 1 is a diagram illustrating the relationship between Hall mobility and carrier concentration. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0038] The present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the above, and various modifications and variations in form and detail are possible without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention can be modified in the following manner. The present invention is not limited to the above-described embodiment. In the structure, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. and the repeated explanation will be omitted.

[0039] (Embodiment 1) In this embodiment, a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. explain.

[0040] A thin film transistor, which is a type of bottom gate structure (also called a bottom contact structure) according to the present embodiment. The transistors 171a and 171b are shown in FIG. 1 and FIG. 2. FIG. 1(A) is a plan view. 1B is a cross-sectional view taken along line A1-A2 in FIG.

[0041] In FIG. 1, a gate electrode layer 101, a gate insulating layer 102, a source electrode a drain electrode layer 105a, 105b; a buffer layer 104a having an n-type conductivity; 104b and a thin film transistor 171a having a semiconductor layer 103.

[0042] The semiconductor layer 103 is an oxide semiconductor film containing In, Ga, and Zn. or between the drain electrode layers 105a, 105b and the semiconductor layer 103 which is an IGZO semiconductor layer. In addition, the buffer layers 104a and 104b, which have a higher carrier concentration than the semiconductor layer 103, are intentionally formed. By providing this, an ohmic contact is formed.

[0043] The buffer layers 104a and 104b are made of In, Ga, and Zn having n-type conductivity. The buffer layers 104a and 104b are formed of an oxide semiconductor film containing an impurity element that imparts n-type conductivity. Impurity elements may include, for example, magnesium, aluminum, titanium, Iron, tin, calcium, germanium, scandium, yttrium, zirconium, hafnium The following can be used: nium, boron, thallium, lead, etc. Magnesium, aluminum If titanium or other materials are included in the buffer layer, it has an oxygen blocking effect, and after the film is formed, The oxygen concentration in the semiconductor layer can be maintained within an optimum range by heat treatment or the like.

[0044] In the present invention, the carrier concentration range of the semiconductor layer is 1×10 17 atoms / cm 3 less than( More preferably, 1×10 11 atoms / cm 3 or more), the carrier concentration range of the buffer layer is 1 x 10 18 atoms / cm 3 or more (1×10 22 atoms / cm 3 (see below) I wish.

[0045] If the carrier concentration range of the IGZO film for the channel exceeds the above range, the thin film transistor Therefore, the IGZO film with the above carrier concentration range is By using it as the channel of the conductor layer, a highly reliable thin film transistor can be created. .

[0046] In addition, between the semiconductor layer and the buffer layer, the carrier concentration is higher than that of the buffer layer which functions as an n-layer. In the case where a second buffer layer having a low conductivity and a higher carrier concentration than the semiconductor layer is provided, the second buffer layer The carrier concentration of the buffer layer should be in the range between the carrier concentrations of the semiconductor layer and the buffer layer. stomach.

[0047] The buffer layers 104a and 104b function as n+ layers and are connected to the drain and source regions. It can also be called.

[0048] A method for manufacturing the thin film transistor 171a shown in FIG. 1A and FIG. 1B will be described with reference to FIGS. ) will be used to explain.

[0049] A gate electrode layer 101, a gate insulating layer 102, and a conductive film 117 are formed on a substrate 100 (FIG. 3(A). The substrate 100 is made of barium borosilicate glass, aluminoborosilicate glass, etc. Glass or aluminosilicate glass, which are produced by the fusion or float process. In addition to non-alkali glass substrates and ceramic substrates, we also offer substrates with heat resistance that can withstand the processing temperatures of this manufacturing process. A plastic substrate having such a structure can be used. A metal substrate such as a stainless steel alloy can also be used. The size of the substrate 100 is 320 mm×4 00mm, 370mm×470mm, 550mm×650mm, 600mm×720mm , 680mm×880mm, 730mm×920mm, 1000mm×1200mm, 1 100mm×1250mm, 1150mm×1300mm, 1500mm×1800mm , 1900mm×2200mm, 2160mm×2460mm, 2400mm×2800 mm, or 2850mm x 3050mm, etc. can be used.

[0050] An insulating film may be formed as a base film on the substrate 100. The base film may be formed by a CVD method or the like. A silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film is formed by using a sputtering method or the like. The insulating film may be formed as a single layer or a multilayer.

[0051] The gate electrode layer 101 may be made of titanium, molybdenum, chromium, tantalum, tungsten, or aluminum. The gate electrode layer 101 is formed using a metal material such as sulphur dioxide or an alloy material thereof. A conductive film is formed on the substrate 100 by a sputtering method or a vacuum deposition method, and then photolithography is performed on the conductive film. A mask is formed by a printing technique or an inkjet method, and a conductive film is etched using the mask. It can be formed by etching. It can also be formed by etching conductive nanoparticles such as silver, gold, and copper. The gate electrode layer 101 is formed by discharging the conductive paste by an ink-jet method and baking the same. In addition, the adhesion of the gate electrode layer 101 can be improved and the substrate and the like made of the gate electrode layer 101 can be easily formed. As a barrier metal to prevent diffusion into the underlayer, a nitride film of the above metal material is formed on the substrate 100 and The gate electrode layer 101 may have a single-layer structure. It may have a laminated structure, for example, a laminate of a molybdenum film and an aluminum film from the substrate 100 side. , a laminate of a molybdenum film and an alloy film of aluminum and neodymium, a laminate of a titanium film and an aluminum A laminate with a titanium film, an aluminum film, and a titanium film can be used. .

[0052] Since a semiconductor film and wiring are formed on the gate electrode layer 101, the edge of the gate electrode layer 101 is cut to prevent a step. It is preferable to process it so that it has a tapered shape.

[0053] The gate insulating layer 102 is formed by depositing a silicon oxide film, a silicon nitride film, an oxide film, or a silicon nitride film by using a CVD method, a sputtering method, or the like. The thin film transistor shown in FIG. 2 can be formed of a silicon nitride film or a silicon oxynitride film. The gate insulating layer 102 is laminated in the sta 171b.

[0054] The gate insulating layer 102 is made of a silicon nitride film or a silicon nitride oxide film, and a silicon oxide film or an oxide The gate insulating layer can be formed by stacking a silicon nitride film and a silicon nitride film in that order. From the substrate side, a silicon nitride film or a silicon nitride oxide film, a silicon oxide film or a silicon oxynitride film, and a nitride The gate insulating film can be formed by laminating three layers in this order: a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The insulating layer is a single layer of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. It can be formed.

[0055] The gate insulating layer 102 is heated under an oxygen atmosphere (or oxygen 90% or more, rare gas (argon, It is preferable to form the film using an atmosphere containing helium (10% or less).

[0056] In addition, a gate insulating layer 102 is formed by nitriding a nitride film on the gate electrode layer 101 by a plasma CVD method. Alternatively, a silicon film may be formed, and a silicon oxide film may be laminated on the silicon nitride film by sputtering. A silicon nitride film and a silicon oxide film are laminated in this order on the gate electrode layer 101 by the micro-CVD method, and the silicon oxide film is A silicon oxide film may be further laminated on the base film by sputtering.

[0057] In this specification, a silicon oxynitride film is a film having a composition in which oxygen is more abundant than nitrogen. Rutherford Backscattering Spectroscopy (RBS) cattering spectrometry and hydrogen forward scattering spectrometry (HFS:Hyd When measured using fluorogen forward scattering, the concentration range The range is 50 to 70 atomic percent oxygen, 0.5 to 15 atomic percent nitrogen, and 25 to 35 atomic percent silicon. The term "silicon oxynitride film" refers to a film containing hydrogen in the range of 0.1 to 10 atomic percent. The composition of the material is such that the nitrogen content is greater than the oxygen content, and the RBS and HFS are used to determine the When measured, the concentration ranges are 5 to 30 atomic % for oxygen, 20 to 55 atomic % for nitrogen, and 10 to 20 atomic % for sulfur. The content of i is in the range of 25 to 35 atomic % and hydrogen is in the range of 10 to 30 atomic %. When the total number of atoms constituting the silicon nitride film or silicon oxynitride film is 100 atomic %, The content ratios of elemental, oxygen, silicon and hydrogen are within the above ranges.

[0058] The gate insulating layer 102 may be formed of an oxide of aluminum, yttrium, or hafnium. At least two of the following compounds are used: Compounds including those mentioned above can also be used.

[0059] The gate insulating layer 102 may contain halogen elements such as chlorine and fluorine. The concentration of halogen elements in the insulating layer 102 is 1×10 15 atoms / cm 3 More than 1×10 20 atoms / cm 3 The following would suffice.

[0060] The conductive film 117 is made of aluminum, copper, silicon, titanium, neodymium, scandium, or the like. Aluminum to which elements for improving heat resistance or elements for preventing hillocks, such as aluminum or molybdenum, have been added. It is preferable to form the n-type GaN film by a single layer or a multilayer structure of a GaN alloy. The film on the side in contact with the semiconductor film having a conductivity type is made of titanium, tantalum, molybdenum, tungsten, etc. The material is a nitride of these elements, and aluminum or aluminum alloy is applied on top of it. Furthermore, a laminated structure in which gold is formed on aluminum or an aluminum alloy may be used. The top and bottom surfaces are coated with titanium, tantalum, molybdenum, tungsten, or nitrogen of these elements. Here, the conductive film 117 may be a laminate structure in which a titanium film, an aluminum film, and a A laminated conductive film of an aluminum film and a titanium film is used.

[0061] A laminate of a titanium film, an aluminum film, and a titanium film provides low resistance and also provides a high resistance to aluminum. Hillocks are unlikely to occur on the film.

[0062] The conductive film 117 is formed by a sputtering method or a vacuum deposition method. Conductive nano paste such as copper is used to print the film using screen printing, inkjet printing, etc. It may be formed by baking.

[0063] Next, a mask 118 is formed on the conductive film 117, and the conductive film 117 is etched using the mask 118. The conductive film 117 is processed to form source and drain electrode layers 105a and 105b. See Figure 3(B).

[0064] Then, the mask 118 is removed, and the source electrode layer or the drain electrode layer 105a, 105b is The n-type conductive oxide semiconductor film is an oxide semiconductor film containing In, Ga, and Zn. For example, IGZO is used as the first target, and a semiconductor film having an n-type conductivity is formed. A material having the above property is used as the second target, and a film is formed by simultaneously using a sputtering method (co-sputtering). A mixed film may be formed by performing a tapping process and used as a buffer layer. The top and side surfaces of the source and drain electrode layers 105a and 105b have an n-type conductivity. The semiconductor film having n-type conductivity is a source electrode layer or a drain electrode layer. The electrode layers 105a and 105b can be protected.

[0065] Next, a mask 116 is formed on the semiconductor film having n-type conductivity. The semiconductor film having n-type conductivity is processed by etching, and n-type semiconductor layers 115a, 1 15b is formed (see FIG. 3(C)). In this embodiment, the source or drain electrode layer 1 In order to protect 05a and 105b, a source electrode layer or The pattern shape covers the drain electrode layers 105a and 105b. The source electrode layer 105a and the drain electrode layer 105b may have a pattern shape other than that shown in FIG. At least the side surface close to the gate electrode is covered with a semiconductor film having n-type conductivity. However, the side surface far from the gate electrode does not have to be covered. In the drain electrode layers 105a and 105b, the side surface close to the gate electrode is of n-type conductivity. If the semiconductor film is not covered with the IGZO film, the side surface is in direct contact with the IGZO film that forms the channel. As a result, a Schottky junction is formed, which may increase the contact resistance.

[0066] Also, an n-type semiconductor formed by etching a semiconductor film having an n-type conductivity The distance between the layers 115a and 115b is the channel length of the thin film transistor. If the distance between 15a and 115b is constant and the distance is located above the gate electrode, Even if misalignment occurs, the electrical characteristics can be kept almost the same, eliminating the variation in thin-film transistors. In addition, the gap between the n-type semiconductor layers 115a and 115b can be reduced by etching. The conventional thin film transistor has a source electrode layer and The distance between the drain electrode layers determines the channel length, but the metal film with high conductivity and the hillocks are likely to occur. Since a thin metal film is used, the distance between the source electrode layer and the drain electrode layer is narrowed, resulting in a short There was a risk of this happening.

[0067] Next, the mask 116 is removed, and the semiconductor film 111 is formed on the n-type semiconductor layers 115a and 115b. (See FIG. 3(D)).

[0068] As the semiconductor film 111, an oxide semiconductor film containing In, Ga, and Zn is formed. For example, the semiconductor film 111 may be formed by sputtering an oxide semiconductor containing In, Ga, and Zn. The conductive film may be formed to a thickness of 50 nm. The semiconductor film 111 is formed in an oxygen atmosphere (or in an atmosphere with 90% oxygen). % or more, and rare gas (argon, helium, etc.) 10% or less) .

[0069] A method other than sputtering of an oxide semiconductor film such as the semiconductor film 111 or a semiconductor film having n-type conductivity Other deposition methods include pulsed laser deposition (PLD) and electron beam deposition. Among the gas phase methods, the following can be used in terms of ease of controlling the composition of the material system: From the viewpoint of mass production, the PLD method is suitable, while the sputtering method is suitable as described above.

[0070] As a specific example of the film formation conditions for the semiconductor film 111, a 8-inch diameter In, Ga, and Zn Using an oxide semiconductor target containing The film is formed under a pressure of 0.4 Pa, a direct current (DC) power of 0.5 kW, and an argon or oxygen atmosphere. In addition, by using a pulsed direct current (DC) power supply, dust can be reduced and the film thickness distribution can be made uniform. This is preferable because

[0071] Next, a mask 113 for processing the semiconductor film 111 is formed (see FIG. 3(E)). The semiconductor film 111 is etched using a mask 113 to form a semiconductor layer 103. It is possible.

[0072] In addition, the same mask 113 is used to perform etching to form buffer layers 104a and 104b. For this reason, as shown in FIG. The ends of the semiconductor film 111, the n-type semiconductor layer 115a, and the n-type semiconductor layer 115b are substantially aligned. For etching IGZO semiconductor films such as 115b, organic acids such as citric acid and oxalic acid are used. For example, the 50 nm semiconductor film 111 is ITO07N (manufactured by Kanto Chemical Co., Ltd.) can be used to perform etching in 150 seconds.

[0073] In addition, the end of the semiconductor layer 103 is etched into a tapered shape, thereby forming a stepped shape. This can prevent wiring from being broken due to step-like defects.

[0074] After that, the mask 113 is removed. Through the above steps, the thin film transistor 171a is formed. The channel length L of the thin film transistor 171a can be determined by the n-type semiconductor layer 1 This corresponds to the distance between the buffer layers 104a and 104b (the distance between the buffer layers 104a and 104b). The source electrode layer or the drain electrode layer 1 The distance between the source electrode layer 105a and the drain electrode layer 105b can be increased. By widening the distance between 5a and 105b, hillocks are generated, which may cause the source electrode layer and the drain electrode layer to become insufficient. In addition, it is possible to prevent a short circuit from occurring between the source electrode layer or the drain electrode layer. By widening the distance between the inner electrode layers 105a and 105b, the area overlapping with the gate electrode is increased. Since the parasitic capacitance with the gate electrode can be reduced by shrinking the size of the gate electrode, good dynamic characteristics, e.g. It is possible to realize a thin-film transistor having a short frequency characteristic (called an f characteristic).

[0075] Furthermore, an insulating film may be formed as a protective film on the thin film transistor 171a. The protective film can be formed in the same manner as the gate insulating layer. It is used to prevent the intrusion of contaminating impurities such as organic matter, metals, and water vapor, and a dense membrane is preferred. For example, a silicon oxide film and a silicon nitride film are formed on the thin film transistor 171a as a protective film. A laminate of the above may be formed.

[0076] In addition, oxide semiconductor films such as the semiconductor layer 103 and the buffer layers 104a and 104b are formed. The heat treatment may be performed at any step after the film formation. However, it can be performed immediately after the film is formed, after the formation of a protective film, etc. It can also be performed in conjunction with other heat treatments. The heating temperature may be 300° C. or higher and 400° C. or lower, and preferably 350° C. The heat treatment is performed multiple times in separate steps on the semiconductor layer 103 and the buffer layers 104a and 104b. Good too.

[0077] A manufacturing process of the thin film transistor 171b shown in FIG. 2 will be described with reference to FIG. The manufacturing process of the thin film transistor 171b shown in FIG. 2 is the same as that of the thin film transistor 171 shown in FIG. The manufacturing process is only partially different from that of 1a, and the different steps will be explained below.

[0078] 2 is different from FIG. 1B in that the gate insulating layer 102 is a two-layer structure and the buffer layer The difference is that the position of the end is different from the position of the end of the semiconductor layer.

[0079] When etching is performed using the mask 113 shown in FIG. By etching the n-type semiconductor layers 115a and 115b, the thin film transistor shown in FIG. In FIG. 2, n-type semiconductor layers 115a and 115b are formed. The insulating film functions as a buffer layer. When forming wiring on the interlayer insulating film, the n-type semiconductor layer is formed on the bottom of the contact hole. Even if 115a and 115b remain, the wiring and the source electrode layer and the drain electrode layer A good electrical connection can be achieved.

[0080] In this embodiment mode, a gate electrode layer, a gate insulating layer, a source electrode layer, a drain electrode layer, A buffer layer (an oxide semiconductor layer containing In, Ga, and Zn and having n-type conductivity), a semiconductor A thin-film transistor having a stacked structure of a semiconductor layer (an oxide semiconductor layer containing In, Ga, and Zn) The oxide semiconductor layer is an n-type conductive oxide semiconductor layer containing In, Ga, and Zn. By using a buffer layer with a high carrier concentration, the semiconductor layer can be made thin while maintaining its thickness. Even if the buffer layer is thin, it is possible to suppress the parasitic capacitance. Since the ratio to the capacitance is sufficient, the parasitic capacitance is sufficiently suppressed.

[0081] According to the present embodiment, a thin-film transistor having a small photocurrent, a small parasitic capacitance, and a high on-off ratio is obtained. Thus, a thin film transistor having good dynamic characteristics can be obtained. As a result, it is possible to provide a semiconductor device having a thin film transistor with excellent electrical characteristics and high reliability. can.

[0082] (Embodiment 2) This embodiment is an example of a thin film transistor having a multi-gate structure according to one embodiment of the present invention. Therefore, the other steps can be performed in the same manner as in the first embodiment, and the same parts or functions as those in the first embodiment can be used. Descriptions of functional parts and repetitive steps will be omitted.

[0083] In this embodiment, a thin film transistor used in a semiconductor device will be described with reference to FIGS. ) and Figs. 5(A) and (B).

[0084] FIG. 4A is a plan view showing a thin film transistor, and FIG. 4B is a plan view showing the thin film transistor in FIG. 1 corresponds to a cross-sectional view showing the thin film transistor 172a along line E1-E2.

[0085] As shown in FIG. 4(A) and (B), gate electrode layers 151a and 151b, A source insulating layer 152, a source electrode layer or a drain electrode layer 155a, 155b, a buffer layer 1 54a, 154b, 154c, the master including the channel formation regions 153a, 153b of the semiconductor layer A thin film transistor 172a having a multi-gate structure is provided. In the thin film transistor 172a, the first channel length L1 is The second channel length L2 corresponds to the distance between the buffer layers 154b and 154c. Equivalent to interval.

[0086] The channel formation regions 153a and 153b of the semiconductor layer are made of an oxide containing In, Ga, and Zn. The buffer layers 154a, 154b, and 154c are In semiconductor layers having n-type conductivity. The source region or drain region (n+ layer) is an oxide semiconductor layer containing Ga and Zn. The buffer layers 154a and 154b functioning as , which has a higher carrier concentration than 153b.

[0087] The channel formation region 153a of the semiconductor layer and the channel formation region 153b of the semiconductor layer are electrically The channel formation region 153a of the semiconductor layer is connected to the buffer layer 154a. A source or drain electrode layer 155a and a channel formation region 153 of the semiconductor layer are formed through the source or drain electrode layer 155a and the channel formation region 153 of the semiconductor layer. b is electrically connected to the source or drain electrode layer 155b via the buffer layer 154b. It continues.

[0088] FIG. 5 shows a thin film transistor 172b having a multi-gate structure having another configuration. FIG. 5(A) shows FIG. 5B is a plan view showing a thin-film transistor 172b, and FIG. 5B is a plan view showing a thin-film transistor 172b along a line F in FIG. 5 corresponds to a cross-sectional view of the thin film transistor 172b of FIG. In the case of 172b, the semiconductor layer is divided into a plurality of parts, and the source electrode layer or the drain electrode layer A wiring layer 156 is formed in the same process as the semiconductor layers 155a and 155b. The semiconductor layer 153d is electrically connected to the wiring layer 156 via the buffer layers 154c and 154d. are connected to the network.

[0089] In the multi-gate thin film transistor 172b, the first channel length L1 is , the distance between the buffer layers 154a and 154c, and the second channel length L2 is the distance between the buffer layers 154a and 154c. This corresponds to the interval between 154b and 154d.

[0090] In this way, in a thin film transistor having a multi-gate structure according to one embodiment of the present invention, each gate The semiconductor layer formed on the electrode layer may be provided continuously, or may be provided as a buffer layer and a wiring layer. A plurality of semiconductor layers may be provided so as to be electrically connected to each other via a first insulating layer, a second insulating layer, or the like.

[0091] The thin film transistor having a multi-gate structure according to one embodiment of the present invention has a small off-current. A semiconductor device including such a thin film transistor can have high electrical characteristics and high reliability. do.

[0092] In this embodiment, a double-gate structure having two gate electrode layers is used as an example of the multi-gate structure. However, one embodiment of the present invention is directed to a triple gate structure having more gate electrode layers. can also be applied.

[0093] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0094] (Embodiment 3) In this embodiment, in a display device which is an example of a semiconductor device according to one embodiment of the present invention, For example, at least a part of the driving circuit and a thin film transistor to be arranged in the pixel part are fabricated on the substrate. This is explained below.

[0095] The thin film transistor to be disposed in the pixel portion is formed according to the first or second embodiment. The thin film transistor described in Embodiment 1 or 2 is an n-channel thin film transistor. Therefore, among the driver circuits, the driver circuits that can be configured with n-channel TFTs A part of the pixel portion is formed on the same substrate as the thin film transistor.

[0096] A block diagram of an active matrix liquid crystal display device which is an example of a semiconductor device according to one embodiment of the present invention. An example of a circuit diagram is shown in FIG. 6A. The display device shown in FIG. 6A has a display element on a substrate 5300. A pixel portion 5301 having a plurality of pixels each having a scanning line driver circuit 530 for selecting each pixel. 2 and a signal line driver circuit 5303 for controlling the input of a video signal to a selected pixel. do.

[0097] In addition, the thin film transistor shown in either the first embodiment or the second embodiment is an n-channel The signal line driver circuit is configured with an n-channel TFT, and is shown in FIG. He explains.

[0098] The signal line driver circuit shown in FIG. 2_M, a first wiring 5611, a second wiring 5612, a third wiring 5613, and a wiring 562 Each of the switch groups 5602_1 to 5602_M includes a A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has transistor 5603c.

[0099] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are a first wiring 5611, a second wiring 5612, a third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor For example, the wiring 5621 in the Jth column is connected to three signal lines via a resistor 5603c. _J (any one of the wirings 5621_1 to 5621_M) is a switch group 5602 The first thin film transistor 5603a, the second thin film transistor 5603b, and and the third thin film transistor 5603c, the signal line Sj-1, the signal line Sj, the signal line S j+1 is connected to

[0100] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0101] It is preferable that the driver IC 5601 is formed on a single crystal substrate. The switch group 5602_1 to 5602_M is formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_ It is recommended to connect to M via an FPC or similar.

[0102] Next, the operation of the signal line driver circuit shown in FIG. 7 will be described with reference to the timing chart of FIG. In the timing chart of FIG. 8, the i-th scanning line Gi is selected. The timing chart shows the case where the scanning line Gi in the i-th row is selected during the 1st The first sub-selection period T1, the second sub-selection period T2, and the third sub-selection period T3 are divided into Furthermore, the signal line driver circuit of FIG. 7 operates in the same manner as in FIG. It works the same as 8.

[0103] In the timing chart of FIG. 8, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603b, and a third thin film transistor 5603 The case where the signal line Sj-1, the signal line Sj, and the signal line Sj+1 are connected via c is shown. is doing.

[0104] In the timing chart of FIG. 8, the timing when the i-th scanning line Gi is selected, the timing when the first scanning line G1 is selected, The on-off timing of the first thin film transistor 5603a 5703a, the second thin film transistor The on / off timing 5703b of the third thin film transistor 560 3c on / off timing 5703c and the signal input to the Jth row wiring 5621_J No. 5721_J is shown.

[0105] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-1 and is input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj, and the line 5621 is connected to the line Sj during the third sub-selection period T3. The video signal input to the first sub-selection period is input to the signal line Sj+1. In the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-1, Data_j, and Data_j+ Let's say it's 1.

[0106] As shown in FIG. 8, in the first sub-selection period T1, the first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c are turned on. At this time, Data_j-1 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-1 via the transistor 5603a. Then, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a and and the third thin film transistor 5603c is turned off. Data_j is input to the signal line Sj via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first The thin film transistor 5603a and the second thin film transistor 5603b are turned off. Then, Data_j+1 input to the wiring 5621_J is input to the third thin film transistor 560 3c and input to the signal line Sj+1.

[0107] From the above, the signal line driver circuit of FIG. 7 divides one gate selection period into three, During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit in FIG. The number of connections between the LCD panel and the substrate on which the pixel area is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one third, the signal line driver circuit of FIG. It can improve retention, etc.

[0108] As shown in Figure 7, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, the arrangement, number, driving method, etc. of the thin film transistors are not limited.

[0109] For example, three or more signal lines are connected to one wiring during each of three or more sub-selection periods. When a video signal is input to each of them, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or It is preferably divided into three sub-selection periods.

[0110] As another example, as shown in the timing chart of FIG. 9, one selection period is precharged. Period Tp, first sub-selection period T1, second sub-selection period T2, third sub-selection period T3 Furthermore, in the timing chart of FIG. 9, when the i-th scanning line Gi is selected, the timing of turning on and off the first thin film transistor 5603a; a, the on-off timing 5803b of the second thin film transistor 5603b, The on / off timing 5803c of the membrane transistor 5603c and the wiring 562 of the Jth column 9, the signal 5821_J is input to the precharge circuit 1_J. In the interval Tp, the first thin film transistor 5603a and the second thin film transistor 5603b and the third thin film transistor 5603c are turned on. At this time, the input The precharge voltage Vp applied to the first thin film transistor 5603a and the second thin film transistor and the third thin film transistor 5603c are connected to the signal line Sj-1. , are input to the signal line Sj and the signal line Sj+1. The second thin film transistor 5603b and the third thin film transistor 5603c are turned on. The transistor 5603c is turned off. At this time, the Data _j-1 is input to the signal line Sj-1 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first thin film transistor The transistor 5603a and the third thin film transistor 5603c are turned off. Data_j input to the wiring 5621_J is input through the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5 603c is turned on, and the first thin film transistor 5603a and the second thin film transistor 56 At this time, Data_j+1 input to the wiring 5621_J is the third The signal is input to the signal line Sj+1 via the thin film transistor 5603c.

[0111] From the above, the signal line driver circuit of FIG. 7 to which the timing chart of FIG. 9 is applied By providing a precharge selection period before the selection period, the signal line can be precharged. Therefore, the video signal can be written to the pixel at high speed. The same parts as those in FIG. 8 are indicated by the same reference numerals and have the same parts or similar functions. A detailed description of the parts will be omitted.

[0112] The configuration of the scanning line driver circuit will be described. The scanning line driver circuit includes a shift register, a buffer, and a In some cases, a level shifter may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP ) is input, the selection signal is generated. The generated selection signal is buffered The signal is buffered and amplified in the 10-bit signal line and then fed to the corresponding scan line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be capable of passing a large current. Used.

[0113] One form of a shift register used as a part of a scanning line driving circuit is shown in FIG. 10 and FIG. 11. He explains.

[0114] The circuit configuration of the shift register is shown in Fig. 10. The shift register shown in Fig. 10 has multiple free Flip-flop 5701_i (any of flip-flops 5701_1 to 5701_n) Also, the first clock signal, the second clock signal, the start pulse It operates when a signal and a reset signal are input.

[0115] The connection relationship of the shift register in Fig. 10 will be described. The shift register in Fig. 10 has i-stage The first flip-flop 5701_i (flip-flops 5701_1 to 5701_n In either one of them, the first wiring 5501 shown in FIG. 11 is connected to the seventh wiring 5717_i-1. 11 is connected to the seventh wiring 5717_i+1. 11 is connected to the seventh wiring 5717_i, The sixth wiring 5506 is connected to the fifth wiring 5715 .

[0116] In addition, the fourth wiring 5504 shown in FIG. 11 corresponds to the second wiring in the odd-numbered flip-flops. 5712, and in the even-numbered flip-flops, it is connected to the third wiring 5713. The fifth wiring 5505 shown in FIG.

[0117] However, the first wiring 5501 shown in FIG. 11 of the first-stage flip-flop 5701_1 is 11 of the n-th flip-flop 5701_n in the n-th stage. The second wiring 5502 is connected to the sixth wiring 5716 .

[0118] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the third power supply line. This may also be called the power line 2.

[0119] Next, the details of the flip-flop shown in FIG. 10 are shown in FIG. The flip-flop includes a first thin film transistor 5571, a second thin film transistor 5572, A third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor a sixth thin film transistor 5575, a seventh thin film transistor 5576, and and an eighth thin film transistor 5578. A second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor a fifth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, The seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel A transistor in which the gate-source voltage (Vgs) exceeds the threshold voltage (Vth). When this occurs, the device is in a conductive state.

[0120] Next, the connection configuration of the flip-flop shown in FIG. 10 will be described below.

[0121] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0122] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506. A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0123] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0124] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506. The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0125] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0126] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0127] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506. The second electrode of the eighth thin film transistor 5578 is connected to the gate of the second thin film transistor 5572. The gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550. Connected to 1.

[0128] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5543, a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0129] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 are referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be connected to a first power supply line, and the sixth wiring 5506 may be connected to a second power supply line. It may be called a line.

[0130] In addition, the signal line driver circuit and the scanning line driver circuit may be the same as those shown in the first embodiment or the second embodiment. It is also possible to fabricate the device using only channel-type TFTs. Since n-channel TFTs have a high transistor mobility, the driving frequency of the driving circuit can be increased. In addition, the n-channel T shown in the first or second embodiment can be FT is a buffer layer that is an oxide semiconductor layer containing n-type indium, gallium, and zinc. The parasitic capacitance is reduced by the anode layer, resulting in high frequency characteristics (called f characteristics). For example, The scanning line driver circuit using the n-channel TFT shown in the first or second embodiment Since it can operate at high speed, it is possible to increase the frame frequency or to It is also possible to realize insertion and the like.

[0131] Furthermore, the channel width of the transistor of the scanning line driving circuit is increased, and multiple scanning lines By arranging the drive circuit, it is possible to achieve even higher frame frequencies. When multiple scanning line driving circuits are arranged, a scanning line driving circuit for driving the even-numbered scanning lines is provided. The circuit is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the opposite side. By placing the pixel clock in the pixel clockwise direction, it is possible to realize a high frame frequency.

[0132] In addition, an active matrix light-emitting display device which is an example of a semiconductor device of one embodiment of the present invention is In manufacturing, a plurality of thin film transistors are arranged in at least one pixel, so that the scanning line It is preferable to arrange a plurality of driving circuits. An example of the diagram is shown in FIG. 6(B).

[0133] The light-emitting display device shown in FIG. 6B has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. A signal line driver circuit 5404 controls the input of a video signal to a selected pixel. 03.

[0134] When a video signal input to a pixel of the light-emitting display device shown in FIG. 6B is in a digital format The pixel emits or does not emit light by switching the transistor on or off. Therefore, gray scale display can be performed using area gray scale or time gray scale. The gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is driven independently based on a video signal. The time gray scale method is a driving method that displays gray scales by changing the time This is a driving method that displays gradations by controlling the period.

[0135] Light-emitting elements have a higher response speed than liquid crystal elements, so they are more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, the light emitting element of the pixel is divided into sub-frame periods according to the video signal. By dividing the period into multiple subframes, The total length of time that pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0136] In the light-emitting display device shown in FIG. 6B, one pixel has a switching TFT and a current When two TFTs are arranged, the first TFT, which is the gate wiring of the switching TFT, A signal to be input to the scanning line is generated by a first scanning line driving circuit 5402, and the gate of the current control TFT is A signal to be input to the second scanning line, which is a port wiring, is generated by a second scanning line driver circuit 5404. In this example, the signal input to the first scanning line and the signal input to the second scanning line are The signal and the signal may be generated by one scanning line driving circuit. The operation of the switching element is controlled by the number of transistors that the switching element has. A plurality of first scanning lines may be provided for each pixel. Alternatively, all of the signals input to the first scanning lines may be generated by one scanning line driver circuit. It may be generated by a plurality of scanning line driving circuits.

[0137] In addition, in the light-emitting display device, the driver circuit may be configured with n-channel TFTs. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit may be the same as those shown in Embodiment 1 or 2. It is also possible to fabricate the device using only channel-type TFTs.

[0138] The above-mentioned driving circuit is not limited to liquid crystal display devices and light-emitting display devices, but may also be used in devices with switching elements and It may also be used in electronic paper, where electrically connected elements are used to drive electronic ink. Electronic paper is also called an electrophoretic display (electrophoretic display) and has the same properties as paper. The advantages are ease of reading, lower power consumption compared to other display devices, and the possibility of making them thin and lightweight. It has points.

[0139] Electrophoretic displays can take a variety of forms, but the first particle has a positive charge. A microcapsule containing a negatively charged second particle and a negatively charged second particle is immersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the capsule are moved in opposite directions to each other, and only the color of the particles that have gathered on one side is displayed. The first particles or the second particles contain a dye, and in the absence of an electric field, The first particles and the second particles are different in color (colorless). (including

[0140] Thus, electrophoretic displays operate in such a way that materials with high dielectric constants migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. Electrophoretic displays do not require polarizing plates or opposing substrates, which are necessary for display devices, and are half the thickness and weight. Reduce.

[0141] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0142] In addition, the above microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be performed by applying an electric field to the cell. An active matrix substrate obtained by using the thin film transistor of the second embodiment can be used. do.

[0143] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof. Just use it.

[0144] Through the above steps, a display device with high reliability as a semiconductor device can be manufactured.

[0145] This embodiment is implemented by appropriately combining with the configuration described in the first or second embodiment. It is possible to implement this.

[0146] (Embodiment 4) A thin film transistor according to one embodiment of the present invention is manufactured, and the thin film transistor is used in a pixel portion and further in a driving By using the semiconductor device in the operating circuit, a semiconductor device having a display function (also called a display device) can be manufactured. In addition, a part or the whole of a driver circuit using a thin film transistor according to one embodiment of the present invention may be It is possible to form the element portion on the same substrate as the substrate, forming a system on panel.

[0147] The display device includes a display element. The display element may be a liquid crystal element (also called a liquid crystal display element), a light-emitting A light-emitting element (also called a light-emitting display element) can be used. A light-emitting element is a light-emitting element that emits light by applying a current or a voltage. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. Also, electronic ink, etc. A display medium in which the contrast changes due to an electrical effect, such as a liquid crystal display, can also be used.

[0148] The display device includes a panel in which a display element is sealed, and a controller for the panel. and a module in which an IC or the like including the above-mentioned is mounted. Regarding the element substrate, which corresponds to one form before the display element is completed in the process of manufacturing a display device The element substrate includes a means for supplying a current to each of the plurality of pixels. Specifically, the substrate may be in a state where only pixel electrodes of the display element are formed, or the substrate may be in a state where only pixel electrodes of the display element are formed. After the conductive film that will become the electrode is formed, but before etching is performed to form the pixel electrode. It's fine to have one, and any form is acceptable.

[0149] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also refers to connectors, such as FPC (Flexible Printed Circuit) inted circuit) or TAB (Tape Automated Bon ding tape or TCP (Tape Carrier Package) is used. Modules with printed wiring boards attached to the ends of TAB tape or TCP or the display element is mounted with an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which a display circuit (or other circuit) is directly mounted.

[0150] In this embodiment, a liquid crystal display device is shown as an example of a semiconductor device according to one embodiment of the present invention.

[0151] 12(A) and (B) show an active matrix type liquid crystal display device to which the present invention is applied. FIG. 12A is a plan view of a liquid crystal display device, and FIG. 12B is a line view of FIG. 1 is a cross-sectional view of a thin film transistor 201 used in the semiconductor device. It can be fabricated in the same manner as the thin-film transistor shown in Form 2, and the IGZO semiconductor layer and the n-type conductivity type The present invention relates to a highly reliable thin film transistor including an IGZO semiconductor layer having the above-mentioned structure. The thin film transistor shown in the embodiment 1 can also be applied as the thin film transistor 201 of this embodiment. Cut.

[0152] The liquid crystal display device of this embodiment shown in FIG. 12(A) includes a source wiring layer 202 and a multi-gate structure. The thin film transistor 201 , the gate wiring layer 203 , and the capacitor wiring layer 204 are included.

[0153] In addition, in FIG. 12B, the liquid crystal display device of the present embodiment has a multi-gate structure. A transistor 201, an insulating layer 211, an insulating layer 212, an insulating layer 213, and a display element The substrate 2 is provided with an electrode layer 255, an insulating layer 261 that functions as an alignment film, and a polarizing plate 268. 00, an insulating layer 263 that functions as an alignment film, an electrode layer 265 used for a display element, A colored layer 264 functioning as a filter, a substrate 266 provided with a polarizing plate 267, and a liquid crystal layer 268 are arranged in the liquid crystal layer 268. 62 and has a liquid crystal display element 260.

[0154] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 262. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 10 μs to 1 It is optically isotropic, so alignment processing is unnecessary and viewing angle dependency is small. .

[0155] Although FIG. 12 shows an example of a transmissive liquid crystal display device, one embodiment of the present invention is a reflective liquid crystal display device. The present invention can also be applied to semi-transmissive liquid crystal display devices.

[0156] In the liquid crystal display device of FIG. 12, a polarizing plate 267 is provided on the outer side (the viewing side) of the substrate 266. In the example shown, a colored layer 264 and an electrode layer 265 used for a display element are provided in this order on the inside. The plate 267 may be provided on the inside of the substrate 266. The laminated structure of the polarizing plate and the colored layer may also be the same as that shown in FIG. It is not limited to B, and may be appropriately set depending on the materials of the polarizing plate and the colored layer and the manufacturing process conditions. In addition, a light-shielding film that functions as a black matrix may be provided.

[0157] In this embodiment, in order to reduce the surface unevenness of the thin film transistor, In order to improve the reliability of the transistor, the thin film transistor obtained in the second embodiment is provided with a protective film or The insulating layer 211, the insulating layer 212, and the insulating layer 213 function as a planarizing insulating film. The protective film is made of a material that can withstand organic matter, metals, water vapor, and other substances suspended in the air. The purpose of the protective film is to prevent the intrusion of contaminating impurities, and a dense film is preferable. Alternatively, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride film may be formed by sputtering or the like. The protective film may be a single layer or a multilayer of a silicon oxide film. A silicon oxide film may be formed by plasma CVD using silane gas and oxygen.

[0158] Organosilanes are ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetramethyl Silane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasiloxane (T MCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexamethyldisilane (HMDS), triethoxysilane (SiH(OC2H5)3), or tris(dimethylamino)silane (TDS). Compounds such as ethylaminosilane (SiH(N(CH3)2)3).

[0159] An insulating layer 211 is formed as the first layer of the protective film. The insulating layer 211 is a hiroma of an aluminum film. Here, the insulating layer 211 is made of an oxide film using a plasma CVD method. A silicon film is formed. TEOS and O2 are used as process gases for forming the silicon oxide film. The flow rate is TEOS\O2=15\750(sccm). is 300°C.

[0160] In addition, an insulating layer 212 is formed as the second layer of the protective film. Silicon nitride film is formed using plasma CVD. The process gas for forming silicon nitride film is , SiH4, N2, NH3 and H2 are used. A silicon nitride film is used as one layer of the protective film. When this happens, mobile ions such as sodium penetrate into the semiconductor region and change the electrical properties of the TFT. This can prevent the above from happening.

[0161] After forming the protective film, the IGZO semiconductor layer is annealed (300°C to 400°C). This is also possible.

[0162] Further, an insulating layer 213 is formed as a planarizing insulating film. The insulating layer 213 is made of polyimide. Heat-resistant organic materials such as acrylic, benzocyclobutene, polyamide, and epoxy In addition to the above organic materials, low-k materials, silicon materials, etc. can be used. Use oxyxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. Siloxane resins can have hydrogen, fluorine, alkyl groups, or aryl groups as substituents. The insulating film formed of these materials may have at least one of the following groups: The insulating layer 213 may be formed by stacking a plurality of layers.

[0163] Siloxane-based resin is a type of Si-OS formed using siloxane-based materials as starting materials. Siloxane-based resins contain hydrogen, fluorine, alkyl, and aryl groups as substituents. The alkyl group may have at least one of a cyclic group, a cyclic group, or an aromatic hydrocarbon.

[0164] The insulating layer 213 can be formed by a CVD method, a sputtering method, a SOG method, a spin-on method, or the like, depending on the material. Coating, dip, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife coater When the insulating layer 213 is formed using a material liquid, a baking process is performed. At the same time, annealing (300°C to 400°C) of the IGZO semiconductor layer may be performed. By combining the firing process of the layer 213 with the annealing process of the IGZO semiconductor layer, a semiconductor device can be efficiently manufactured. It becomes possible to create it.

[0165] The electrode layers 255 and 265 functioning as pixel electrode layers are made of indium tungsten oxide. Oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide (ITO) ), indium zinc oxide, indium tin oxide doped with silicon oxide, etc. A conductive material having such a property can be used.

[0166] The electrode layers 255 and 265 are made of a conductive material including a conductive polymer. The pixel electrode formed by using the conductive composition can be formed by the following steps: Sheet resistance is 10,000 Ω / □ or less, and light transmittance at a wavelength of 550 nm is 70% or more. It is preferable that the resistivity of the conductive polymer contained in the conductive composition is 0.1 Ω cm. It is preferable that:

[0167] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0168] Through the above steps, a highly reliable liquid crystal display device can be manufactured as a semiconductor device. .

[0169] This embodiment mode is implemented by appropriately combining with any of the configurations described in the first to third embodiments. It is possible to implement this.

[0170] (Embodiment 5) In this embodiment, an example of electronic paper will be described as a semiconductor device according to one embodiment of the present invention.

[0171] FIG. 13 shows an active matrix type electronic paper as an example of a semiconductor device to which the present invention is applied. As a thin film transistor 581 used in the semiconductor device, The IGZO semiconductor layer and the IGZO thin-film transistor with n-type conductivity can be fabricated in the same manner as the thin-film transistor. The thin film transistor includes a ZO semiconductor layer and is highly reliable. A thin film transistor can also be applied as the thin film transistor 581 in this embodiment.

[0172] The electronic paper in FIG. 13 is an example of a display device that uses the twisting ball display method. The spherical display method is an electrode layer that uses spherical particles painted in black and white as display elements. A potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying information by controlling the orientation of spherical particles caused by the generation of light.

[0173] The thin film transistor 581 is a type of inverted staggered type with a multi-gate structure (bottom contact type). The first electrode is formed by a source electrode layer or a drain electrode layer. The electrode layer 587 is in contact with the insulating layer 585 through an opening formed therein and is electrically connected to the electrode layer 587. Between the electrode layer 587 and the second electrode layer 588, a black region 590a and a white region 590b are provided. A spherical particle 589 is provided having a cavity 594 therearound that is filled with liquid. The spherical particles 589 are filled with a filler 595 such as a resin (see FIG. 13). .

[0174] Also, instead of the twist ball, an electrophoretic element can be used. and a 10μm to 20μm diameter nanoparticle that contains positively charged white nanoparticles and negatively charged black nanoparticles. Microcapsules with a diameter of about 0 μm are used. When an electric field is applied to the microcapsules by the first and second electrode layers, the microcapsules emit white light. White particles and black particles move in opposite directions, allowing the display to be white or black. A display element that applies this principle is an electrophoretic display element, commonly known as electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display, the image that was displayed can be retained. Therefore, a semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0175] Through the above steps, electronic paper having high reliability as a semiconductor device can be manufactured. .

[0176] This embodiment mode is implemented by appropriately combining with any of the configurations described in the first to third embodiments. It is possible to implement this.

[0177] (Embodiment 6) In this embodiment, an example of a light-emitting display device will be described as a semiconductor device according to one embodiment of the present invention. As the display element of the device, a light-emitting element using electroluminescence is used here. The light-emitting element that utilizes electroluminescence uses an organic compound as the light-emitting material. Generally, the former are organic EL elements and the latter are inorganic compounds. These are called inorganic EL elements.

[0178] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0179] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0180] 14A and 14B show an active matrix type semiconductor device as an example of the semiconductor device to which the present invention is applied. 14A is a plan view of the light-emitting display device, and FIG. 14B is a schematic view of the light-emitting display device. 15 is a cross-sectional view of the light-emitting display device shown in FIG. The equivalent circuit of the device is shown.

[0181] The thin film transistors 301 and 302 used in the semiconductor device are the same as those in the first embodiment and the second embodiment. The thin film transistor can be fabricated in the same manner as in the second embodiment. The present invention relates to a highly reliable thin-film transistor that includes an IGZO semiconductor layer having a GaN- ...

[0182] The light-emitting display device of this embodiment shown in FIG. 14A and FIG. 15 is a thin film having a multi-gate structure. A transistor 301, a thin film transistor 302, a light emitting element 303, a capacitor element 304, a The thin film transistor 301 includes a gate wiring layer 305, a gate wiring layer 306, and a power supply line 307. 302 is an n-channel thin film transistor.

[0183] In addition, in FIG. 14B, the light-emitting display device of this embodiment mode has a thin film transistor 302 , the insulating layer 311, the insulating layer 312, the insulating layer 313, the partition wall 321, and the light-emitting element 303. The light-emitting device has a first electrode layer 320 , an electroluminescent layer 322 , and a second electrode layer 323 .

[0184] The insulating layer 313 is made of an organic resin such as acrylic, polyimide, or polyamide, or siloxane. It is preferable to form the insulating film using the above method.

[0185] In this embodiment, since the thin film transistor 302 of the pixel is an n-type transistor, the first It is preferable to use a cathode as the first electrode layer 320. Materials with small functions, such as Ca, Al, CaF, MgAg, and AlLi, can be used. can.

[0186] The partition wall 321 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. A photosensitive material is used to form an opening on the first electrode layer 320, and the sidewall of the opening is continuous. It is preferable to form the inclined surface so as to have a continuous curvature.

[0187] The electroluminescent layer 322 may be composed of a single layer or a plurality of layers may be laminated. It doesn't matter whether it's

[0188] A second electrode layer 323 using an anode is formed so as to cover the electroluminescent layer 322. The electrode layer 323 is made of a conductive material having light transmitting properties that is listed as a pixel electrode layer in the fourth embodiment. In addition to the above-mentioned transparent conductive film, a titanium nitride film or A titanium film may be used for the first electrode layer 320, the electroluminescent layer 322, and the second electrode layer 32 3 are overlapped to form the light emitting element 303. The second electrode layer 323 and the partition wall 32 are provided to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the A protective film may be formed on the substrate 1. Examples of the protective film include a silicon nitride film, a silicon oxynitride film, and a DLC film. A film or the like can be formed.

[0189] Furthermore, in practice, once the process up to Fig. 14(B) is completed, the structure is made airtight to prevent it from being exposed to the outside air. Protective films with high heat resistance and low degassing (laminated films, UV curable resin films, etc.) It is preferable to package (enclose) the container in a container-type container or a cover material.

[0190] Next, the configuration of the light emitting element will be described with reference to FIG. 16. Here, the driving TFT is The cross-sectional structure of a pixel will be described using the example of the type shown in Figure 16(A), (B), and (C). The driving TFTs used in the semiconductor device, TFTs 7001, 7011, and 7021, are The thin film transistor can be fabricated in the same manner as in the first embodiment. The present invention relates to a highly reliable thin film transistor including an IGZO semiconductor layer having a morphology. The thin film transistor shown in form 2 is applied as TFT7001, 7011, and 7021. It is also possible.

[0191] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. Top emission, bottom emission, and side emission. There are light-emitting elements with a dual-side emission structure in which light is emitted from the side of the pixel. The present invention can also be applied to a light emitting element having an injection structure.

[0192] A light emitting element having a top emission structure will be described with reference to FIG.

[0193] In FIG. 16A, a TFT 7001 which is a driving TFT is an n-type TFT, and a light emitting element 7002 emits light. FIG. 16(A) shows a cross-sectional view of a pixel when the light incident on the pixel exits the anode 7005 side. A cathode 7003 of a light emitting element 7002 and a TFT 7001 which is a driving TFT are electrically connected. A light-emitting layer 7004 and an anode 7005 are laminated in this order on a cathode 7003. 7003 uses various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are preferable. The light-emitting layer 7004 may be composed of a single layer or a plurality of layers may be laminated. When the cathode 7003 is composed of multiple layers, the electron injection layer 7004 is disposed on the cathode 7003. The layers are laminated in this order: electron transport layer, light emitting layer, hole transport layer, and hole injection layer. It is not necessary to provide all of the anodes. The anode 7005 is made of a conductive material that transmits light. For example, indium oxide containing tungsten oxide, indium oxide containing tungsten oxide Indium zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide Oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, oxide A light-transmitting conductive film such as indium tin oxide doped with indium may be used.

[0194] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 constitutes the light-emitting element 7002. In the case of the pixel shown in FIG. 16A, the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as indicated by the mark.

[0195] Next, a light emitting element having a bottom emission structure will be described with reference to FIG. When 011 is an n-type light emitting element and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, FIG. 16B shows a cross-sectional view of a pixel. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive film 7017. A light-emitting layer 7014 and an anode 7015 are laminated in this order on the cathode 7013. When the anode 15 has a light-transmitting property, a shielding layer for reflecting or blocking light is provided so as to cover the anode. The cathode 7013 may have a film 7016 formed thereon, as in the case of FIG. Various conductive materials with small thermal coefficients can be used. However, the thickness of the material should be The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, a 20 nm film An aluminum film having a thickness of 700 nm can be used as the cathode 7013. 16(A), even if it is composed of a single layer, multiple layers are laminated. The anode 7015 does not need to transmit light, but as shown in FIG. As in the case of 16(A), the insulating film 16 can be formed using a conductive material having light-transmitting properties. The shielding film 7016 may be made of, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0196] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 16B, the light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0197] Next, a light emitting element having a dual emission structure will be described with reference to FIG. In this example, a conductive film 7027 having a light-transmitting property and electrically connected to the driving TFT 7021 is formed on the substrate 7022. A cathode 7023 of the light-emitting element 7022 is formed, and a light-emitting layer 7024 is formed on the cathode 7023. The anode 7025 is laminated in order. The cathode 7023 is, as in the case of FIG. Various conductive materials with small thermal coefficients can be used. However, the thickness of the material should be For example, the cathode 7023 is made of Al having a thickness of 20 nm. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 70 may be configured as a single layer or as a laminate of multiple layers. 25 is formed using a conductive material having a light transmitting property, similar to FIG. It is possible.

[0198] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 constitutes the light-emitting element 70. In the case of the pixel shown in FIG. 16C, the light emitted from the light emitting element 7022 corresponds to is emitted toward both the anode 7025 side and the cathode 7023 side as indicated by the arrows.

[0199] Although the organic EL element has been described as the light-emitting element here, inorganic EL elements can also be used as the light-emitting element. It is also possible to provide an L element.

[0200] In this embodiment, a thin film transistor (driving TFT) that controls driving of a light emitting element is Although an example in which the light-emitting element is electrically connected has been shown, the current between the driving TFT and the light-emitting element is A control TFT may be connected.

[0201] Note that the semiconductor device described in this embodiment mode is not limited to the configuration shown in FIG. Various modifications based on the technical concept of the present invention are possible.

[0202] Through the above steps, a light-emitting display device having high reliability as a semiconductor device can be manufactured. .

[0203] This embodiment mode is implemented by appropriately combining with any of the configurations described in the first to third embodiments. It is possible to implement this.

[0204] (Embodiment 7) A structure of a display panel, which is one embodiment of a semiconductor device of the present invention, will be described below. In this embodiment, a liquid crystal display panel ( A light-emitting device that is one form of a semiconductor device having a light-emitting element as a display element. The display panel (also called a light-emitting panel) will now be described.

[0205] Next, the appearance and cross section of a light-emitting display panel, which is one embodiment of a semiconductor device of the present invention, will be described. The following description will be given with reference to FIG. 17. FIG. 17A shows an IGZO semiconductor layer formed on a first substrate and A highly reliable thin-film transistor and a light-emitting device including an n-type conductive IGZO semiconductor layer 17(A) is a top view of a panel in which a semiconductor device is sealed between a first substrate and a second substrate by a sealant. 17B) corresponds to a cross-sectional view taken along line HI in FIG. 17A.

[0206] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. A sealant 4505 is formed to surround the gate driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealant 4505, and a second substrate 4506. 4507. It is sealed together with the filler material 4507 by

[0207] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b each have a plurality of thin film transistors. In FIG. 17B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45, a thin film transistor 4509 included in a line driver circuit 4503a is illustrated.

[0208] The thin film transistors 4509 and 4510 are I-type transistors having an IGZO semiconductor layer and an n-type conductivity type. This corresponds to a thin film transistor including a GZO semiconductor layer, and is shown in the first or second embodiment. In this embodiment, a thin film transistor 4509 and 4510 are n-channel thin film transistors.

[0209] In addition, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 is The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. Note that the structure of the light-emitting element 4511 is not limited to that shown in this embodiment mode. The structure of the light emitting element 4511 is adjusted according to the direction of the light to be extracted from the light emitting element 4511. The composition can be changed as appropriate.

[0210] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are It is supplied by b.

[0211] In this embodiment mode, the connection terminal 4515 is formed from the same conductive film as the second electrode layer 4512. The wiring 4516 is made of the same conductive film as the first electrode layer 4517 of the light-emitting element 4511. has been formed.

[0212] The connection terminal 4515 is connected to a terminal of the FPC 4518a via an anisotropic conductive film 4519. are electrically connected.

[0213] The second substrate is not transparent to light, and is located in the direction of light extraction from the light emitting element 4511. In this case, glass plates, plastic plates, polyester films or A light-transmitting material such as an acrylic film is used.

[0214] In addition, filler 4507 can be inert gas such as nitrogen or argon, or ultraviolet-curing resin. It can be made of oil or thermosetting resin, and can be made of PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. In this embodiment, nitrogen is used as the filler. The substance was used.

[0215] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0216] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Also, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted. In this embodiment, the structure shown in FIG. Not limited.

[0217] Next, the appearance and cross section of a liquid crystal display panel, which is one embodiment of a semiconductor device of the present invention, will be described. The following description will be given with reference to FIG. 18. FIG. 18(A1) and (A2) show a structure of a semiconductor device formed on a first substrate 4001. A highly reliable thin film including an IGZO semiconductor layer having a high conductivity type and an IGZO semiconductor layer having an n-type conductivity type. The transistors 4010 and 4011 and the liquid crystal element 4013 are disposed between the second substrate 4006 and the 18(B) is a top view of the panel sealed with a sealant 4005, and FIG. (A1) corresponds to the cross-sectional view at MN in (A2).

[0218] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this manner, a sealant 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealant 4005, and a second substrate 4006. The liquid crystal layer 4008 is sealed together with the first substrate 4001. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0219] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, A wire bonding method, a TAB method, or the like can be used. FIG. 18A shows an example of mounting a signal line driver circuit 4003 by the COG method. This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0220] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In FIG. 18B, the thin film transistor included in the pixel portion 4002 A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 The following are given as examples:

[0221] The thin film transistors 4010 and 4011 are I-type transistors having an IGZO semiconductor layer and an n-type conductivity type. This corresponds to a thin film transistor including a GZO semiconductor layer, and is the same as in the first or second embodiment. In this embodiment, a thin film transistor The transistors 4010 and 4011 are n-channel thin film transistors.

[0222] In addition, a pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. A pixel electrode layer 4030, a counter electrode layer 4031, and a liquid crystal layer 4008 are formed on the liquid crystal layer 4006. The overlapping portion corresponds to a liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0223] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film, or acrylic resin film You can also use aluminum foil with PVF film or polyester film. Alternatively, a sheet having a structure in which the sheet is sandwiched between two films may be used.

[0224] Also, 4035 is a columnar spacer obtained by selectively etching the insulating film. In order to control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may also be used.

[0225] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials are applied to 002 via FPC4018.

[0226] In this embodiment, the connection terminal 4015 is connected to the pixel electrode layer 4030 of the liquid crystal element 4013. The wiring 4016 is formed from the same conductive film as the thin film transistors 4010 and 4011. The gate electrode layer is formed from the same conductive film.

[0227] The connection terminal 4015 is electrically connected to a terminal of the FPC 4018 via an anisotropic conductive film 4019. are electrically connected.

[0228] In FIG. 18, a signal line driver circuit 4003 is formed separately and mounted on a first substrate 4001. However, the present embodiment is not limited to this configuration. Alternatively, a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately and mounted. Alternatively, the circuit board may be formed separately and mounted.

[0229] FIG. 19 shows a liquid crystal display device as a semiconductor device using a TFT substrate 2600 produced by applying the present invention. 1 shows an example of a liquid crystal display module.

[0230] FIG. 19 shows an example of a liquid crystal display module, in which a TFT substrate 2600 and an opposing substrate 2601 are connected. The substrate 2602 is fixed to the substrate 2601 by a bonding material 2602, and a pixel portion 2603 including a TFT and the like and a liquid crystal layer are disposed between the substrate 2601 and the substrate 2602. A display element 2604 and a colored layer 2605 are provided to form a display area. is necessary for color display, and in the case of the RGB method, it corresponds to each color of red, green, and blue. A colored layer is provided corresponding to each pixel. On the outside, a polarizing plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are arranged. It is composed of a cathode ray tube 2610 and a reflector 2611, and a circuit board 2612 is a flexible wiring board. A wiring board 2609 is connected to the wiring circuit section 2608 of the TFT board 2600, and the controller The LCD has external circuits such as a filter circuit and a power supply circuit. The layers may be laminated with a retardation plate interposed therebetween.

[0231] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) irefringence mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0232] Through the above steps, a highly reliable display panel can be manufactured as a semiconductor device.

[0233] This embodiment is implemented by appropriately combining with any of the configurations described in the first to sixth embodiments. It is possible to implement this.

[0234] (Embodiment 8) One embodiment of the semiconductor device of the present invention can be applied to electronic paper. The display can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, and vehicles such as trains. The present invention can be applied to in-car advertising, displays on various cards such as credit cards, etc. An example of the electronic device is shown in FIG. 20 and FIG.

[0235] FIG. 20(A) shows a poster 2631 made of electronic paper. In the case of printed matter, the advertisements are exchanged manually, but in the case of electronic matter to which the present invention is applied, By using paper, you can change the display of your advertisement in a short time. Also, the display will not collapse. The poster can also be configured to transmit and receive information wirelessly. good.

[0236] FIG. 20B shows an advertisement 2632 on a train or other vehicle. In the case of paper printouts, the advertisements are exchanged manually, but in the case of electronic By using child paper, it is possible to change the display of advertisements in a short time without a lot of manpower. In addition, the display is stable and the image does not collapse. It may be configured to be capable of transmitting and receiving.

[0237] FIG. 21 also shows an example of an electronic book 2700. For example, the electronic book 2700 is The device is made up of two housings, a housing 2701 and a housing 2703. The body 2703 is integrated with a shaft portion 2711, and the opening and closing movement is performed around the shaft portion 2711. This configuration allows the device to operate like a paper book. It becomes.

[0238] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a text is displayed on the right display (display 2705 in FIG. 21) and An image can be displayed on the display unit 2707 in FIG.

[0239] FIG. 21 shows an example in which the housing 2701 is provided with an operation unit and the like. 701, a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The configuration may include a touch panel, a touch screen, a pointing device, etc. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables such as a cable, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have a function as an electronic dictionary. This is also fine.

[0240] The electronic book 2700 may be configured to transmit and receive information wirelessly. The desired book data can be purchased and downloaded from the electronic book server. is also possible.

[0241] This embodiment is the same as any one of the first to third embodiments or the fifth embodiment. It is possible to carry out the above in combination as appropriate.

[0242] (Embodiment 9) The semiconductor device according to the present invention can be applied to various electronic devices (including gaming machines). The electronic device may be, for example, a television device (television or television receiver) (also called "computer monitors"), digital cameras, digital video cameras, digital digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable games Examples of such devices include machines, portable information terminals, audio playback devices, and large game machines such as pachinko machines.

[0243] FIG. 22A shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In addition, the stand 9605 supports the housing 9601. This shows a configuration in which the above is supported.

[0244] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the display 9603 shows In addition, the remote control unit 9610 can control the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0245] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0246] FIG. 22B shows an example of a digital photo frame 9700. The photo frame 9700 includes a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example images captured by a digital camera. By displaying the image data, it can function like a normal photo frame.

[0247] The Digital Photo Frame 9700 is equipped with an operation unit, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section, etc. These components may be installed on the same surface as the display unit, but they may be installed on the side or back. It is preferable to have a digital photo frame with a built-in memory card because it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The captured image data can be displayed on the display portion 9703 .

[0248] The digital photo frame 9700 may also be configured to transmit and receive information wirelessly. It is also possible to wirelessly import and display desired image data.

[0249] FIG. 23(A) shows a portable gaming machine, which is composed of two housings, a housing 9881 and a housing 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in FIG. 23(A) also includes a speaker unit 9884 and a recording medium insertion unit 988. 6, LED lamp 9890, input means (operation keys 9885, connection terminals 9887, sensors 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration 9889) equipped with a microphone, etc. Of course, the configuration of the portable gaming machine is not limited to the above, and at least the present invention is It is sufficient that the device is provided with the semiconductor device, and other auxiliary equipment is provided as appropriate. The portable game machine shown in FIG. 23(A) can be used to play a game using a program recorded on a recording medium. It has the function of reading the program or data and displaying it on the display unit, and wirelessly communicating with other portable gaming machines. The portable gaming machine shown in FIG. 23(A) has the following functions: The function is not limited to this and may have various functions.

[0250] FIG. 23(B) shows an example of a slot machine 9900, which is a large-scale gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. The Machine 9900 also includes other operating means such as a start lever and stop switch, coin The slot machine 9900 is equipped with a slot slot, a speaker, etc. However, the present invention is not limited to the above, and may be configured to include at least the semiconductor device according to the present invention. Other auxiliary equipment may be provided as appropriate.

[0251] FIG. 24 shows an example of a mobile phone 1000. The mobile phone 1000 has a housing 100 In addition to the display unit 1002 incorporated in the device 1, the device 1002 also includes an operation button 1003, an external connection port 1004, It is equipped with a speaker 1005, a microphone 1006, etc.

[0252] The mobile phone 1000 shown in FIG. 24 allows users to input information by touching the display unit 1002 with a finger or the like. In addition, operations such as making a phone call or typing an e-mail can be performed by the display unit 100. This can be done by touching 2 with a finger or other object.

[0253] The screen of the display unit 1002 has three main modes. The first is a display mode that is mainly used for displaying images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.

[0254] For example, when making a call or composing an e-mail, the display unit 1002 is used for inputting characters. The main character input mode is to input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. I wish.

[0255] In addition, the mobile phone 1000 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above configuration, the orientation of the mobile phone 1000 (portrait or landscape) can be determined and the display The screen display of the display unit 1002 can be automatically switched.

[0256] The screen mode can be changed by touching the display unit 1002 or by operating the housing 1001. This is done by operating the button 1003. Also, depending on the type of image displayed on the display unit 1002, For example, the image signal to be displayed on the display unit is a moving image. If it is data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.

[0257] In the input mode, the optical sensor of the display unit 1002 detects a signal and displays If there is no input by touch operation of the part 1002 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0258] The display unit 1002 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to image finger veins, palm veins, etc. [Explanation of symbols]

[0259] 100: Substrate 101: Gate electrode layer 102: Gate insulating layer 103: Semiconductor layer 104a, 104b: buffer layers having n-type conductivity 105a, 105b: source electrode layer or drain electrode layer 111: Semiconductor film 113, 116, 118: Mask 115a, 115b: n-type semiconductor layer 117: Conductive film 171a, 171b: thin film transistor

Claims

[Claim 1] a gate electrode layer; a gate insulating layer on the gate electrode layer; a source electrode layer and a drain electrode layer on the gate insulating layer; a first buffer layer having an n-type conductivity on the source electrode layer; a second buffer layer having an n-type conductivity on the drain electrode layer; an oxide semiconductor layer having a channel formation region on the first and second buffer layers, the source electrode layer does not have a region overlapping with the gate electrode layer in a cross-sectional view, the drain electrode layer does not have a region overlapping with the gate electrode layer in a cross-sectional view, the first buffer layer has a region overlapping with the gate electrode layer in a cross-sectional view; the second buffer layer has a region overlapping with the gate electrode layer in a cross-sectional view; the oxide semiconductor layer has a region in contact with the gate insulating layer, the first and second buffer layers have a higher carrier concentration than the oxide semiconductor layer; the oxide semiconductor layer is electrically connected to the source electrode layer via the first buffer layer; the oxide semiconductor layer is electrically connected to the drain electrode layer via the second buffer layer.

Images