Liquid crystal display device

Abstract

To provide a semiconductor device capable of mass production of highly reliable semiconductor devices using materials suitable for semiconductor applications, such as a transistor and a diode, and a large substrate such as a mother glass, a semiconductor device including a transistor with the excellent electron state at an interface between an oxide semiconductor film and a gate insulating film in contact with the oxide semiconductor film, and a method for manufacturing a highly reliable semiconductor device by applying stable electric characteristics to a transistor including an oxide semiconductor film in a channel.SOLUTION: A semiconductor device includes an oxide material including a crystal that is c-axis oriented, has a triangular or hexagonal atomic arrangement when viewed from a surface or interface direction, and is rotated about the c-axis.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device having a circuit including a semiconductor element such as a transistor, and a method for manufacturing the same. For example, power devices mounted on power circuits, memories, thyristors, converters, Semiconductor integrated circuits including image sensors, electro-optical devices such as liquid crystal display panels, The present invention relates to an electronic device that incorporates a light-emitting display device having a light-emitting element as a component. This relates to oxides used in devices.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, light-emitting display devices, semiconductor circuits, and electronic devices are all semiconductor devices. It is. [Background technology]

[0003] As typified by liquid crystal display devices, most of the transistors formed on glass substrates are amorphized. It is made up of amorphous silicon, polycrystalline silicon, etc. Although the field-effect mobility of the transistor using this material is low, it is possible to accommodate the large area of ​​the glass substrate. In addition, the field effect mobility of a transistor using polycrystalline silicon is high, but the field effect mobility of a transistor using glass is low. However, it has the disadvantage that it is not suitable for making the surface area of ​​a substrate larger.

[0004] In addition to transistors using silicon, transistors using oxide semiconductors have been developed in recent years. The technology of fabricating oxide semiconductors and applying them to electronic and optical devices is attracting attention. The transistor was fabricated using zinc oxide and In-Ga-Zn-O oxide as the substrate. The technology used for switching elements of pixels in display devices is disclosed in Patent Documents 1 and 2. It has been done. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] One aspect of the present invention is to provide a material suitable for semiconductor applications such as transistors and diodes. One of the challenges we face is to:

[0007] In addition, by using large substrates such as mother glass, it is possible to mass-produce with high reliability. It is an object of the present invention to provide a semiconductor device which can

[0008] The electrical characteristics of the transistor are determined by the oxide semiconductor film and the gate insulating film in contact with the oxide semiconductor film. It is easily affected by the electronic state at the interface with the film. During or after the fabrication of the transistor, When the interface between the oxide semiconductor film and the gate insulating film is in an amorphous state, the defect density at the interface is large. Therefore, the electrical characteristics of the transistor tend to become unstable.

[0009] In addition, a transistor using an oxide semiconductor film as a channel can be irradiated with visible light or ultraviolet light. The electrical characteristics change depending on the

[0010] In view of the above problem, one embodiment of the present invention is a method for manufacturing an oxide semiconductor film having a first insulating film and a second insulating film which is in contact with the oxide semiconductor film. To provide a semiconductor device having a transistor with a good electronic state at the interface with a gate insulating film. One of the challenges we face is to:

[0011] In addition, stable electrical characteristics are imparted to a transistor using an oxide semiconductor film as a channel, An object of the present invention is to manufacture a highly reliable semiconductor device. [Means for solving the problem]

[0012] Atoms oriented along the c axis and triangular or hexagonal when viewed from the ab plane, surface, or interface direction The oxide material has a crystal structure with different a-axis or b-axis directions in the ab plane. There are.

[0013] The oxide material may contain zinc. By containing zinc, the c-axis is oriented. and has a triangular or hexagonal atomic arrangement as viewed from the ab-plane, surface or interface direction, On the b-plane, it becomes easier to form oxide materials that contain crystals with different a-axis or b-axis orientations. .

[0014] Alternatively, the aforementioned oxide material may be selected from the group consisting of indium, gallium, zinc, tin, titanium and aluminum. The material is made of two or more elements selected from the group consisting of aluminum.

[0015] The aforementioned oxide materials can be deposited by sputtering, molecular beam epitaxy, atomic layer deposition or photolithography. The thin film can be formed by laser deposition.

[0016] The oxide materials mentioned above can be formed by laminating two films of different compositions, or by heat-treating the films after lamination. It can be formed by crystallizing it by

[0017] One embodiment of the present invention has a plurality of metal oxide layers, and the metal oxide layers are connected to each other by a 4-coordinate oxygen atom. (hereinafter, 4-coordinated O) is a bonded oxide material. Also, one metal oxide layer is , 4-coordinate central metal atom, 5-coordinate central metal atom, or both 5- and 6-coordinate central metal atoms. The metal atom is a central metal atom, and the metal atom is connected via a tricoordinate oxygen atom (hereinafter, tricoordinate O) or a tetracoordinate O. This forms a layer that spreads in a plane.

[0018] When the oxide material has electrical conductivity, it can be used as a material for a gate electrode of a transistor. The gate electrode is formed by laminating a film made of the above-mentioned oxide material and a metal film. It may be possible to do so.

[0019] Alternatively, if the oxide material is conductive, the source and drain electrodes of the transistor may be The source and drain electrodes can be made of the above-mentioned oxide. Alternatively, the insulating film may be formed by laminating a film made of a material and a metal film.

[0020] When the oxide material has a semiconducting property, the active layer of the transistor is made of the oxide material. In this case, for example, a film made of the source electrode and the drain electrode of a transistor can be used. The insulating film is provided in contact with the conductive film that functions as a drain electrode and the insulating film. The insulating film functions as a gate insulating film, a base insulating film, or an interlayer insulating film of a transistor. Effect of the Invention

[0021] According to one embodiment of the present invention, a semiconductor device with excellent electrical characteristics can be manufactured.

[0022] In addition, large substrates such as mother glass are used to mass-produce highly reliable semiconductor devices. It can be done. [Brief description of the drawings]

[0023] [Figure 1]1A to 1C are diagrams illustrating a structure of an oxide material according to one embodiment of the present invention. [Diagram 2] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device which is one embodiment of the present invention. [Diagram 3] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device which is one embodiment of the present invention. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device which is one embodiment of the present invention. [Diagram 5] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device which is one embodiment of the present invention. [Figure 6] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device which is one embodiment of the present invention. [Figure 7] 1A and 1B are a top view and a cross-sectional view illustrating an example of a semiconductor device which is one embodiment of the present invention. [Figure 8] FIG. 1 is a circuit diagram illustrating an example of a liquid crystal display device including a transistor which is one embodiment of the present invention. [Figure 9] FIG. 1 is a circuit diagram illustrating an example of a semiconductor memory device including a transistor according to one embodiment of the present invention. [Figure 10] 1A and 1B are a circuit diagram and a diagram showing electrical characteristics of an example of a semiconductor memory device including a transistor according to one embodiment of the present invention. [Figure 11] 1A and 1B are a circuit diagram and a diagram showing electrical characteristics of an example of a semiconductor memory device including a transistor according to one embodiment of the present invention. [Figure 12] 1 is a perspective view illustrating an example of an electronic device according to one embodiment of the present invention. [Figure 13] Planar and cross-sectional images of an oxide film containing CAAC taken by HAADF-STEM. [Figure 14] Planar and cross-sectional images of oxide films without CAAC taken by HAADF-STEM. [Figure 15] XRD spectrum of as-depo oxide film containing CAAC. [Figure 16] XRD spectrum of oxide film containing CAAC after heat treatment. [Figure 17] XRD spectrum of as-depo oxide film containing CAAC. [Figure 18]XRD spectrum of oxide film containing CAAC after heat treatment. [Figure 19] XRD spectrum of as-depo oxide film containing CAAC. [Figure 20] XRD spectrum of oxide film containing CAAC after heat treatment. [Figure 21] Graph showing the Vg-Id curve of a transistor. [Figure 22] Graph showing the results of +BT test and -BT test. [Figure 23] 1 is a graph showing the results of a +BT test and a -BT test performed while irradiating a transistor with light. [Figure 24] 1 is a graph showing the time dependence of the change (ΔVth) in threshold voltage Vth under various stress conditions. [Diagram 25] 1A and 1B are schematic diagrams illustrating the mechanism of negative bias light irradiation deterioration. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and various modifications in form and details are possible by those skilled in the art. The present invention is not limited to the description of the following embodiments. In addition, when explaining the configuration of the invention using the drawings, The reference numbers are used in common between different drawings. Note that the hatch pattern is used to refer to the same objects. In some cases, the same symbols are used and no particular symbols are used.

[0025] The present invention will be described below, but the terms used in this specification will be briefly explained. In this specification, one of the source and drain of a transistor is called the drain. When one is connected to the other, the other is treated as the source. In other words, they are not distinguished by the level of potential. In this specification, the part referred to as a source may be read as a drain.

[0026] Voltage is the difference between a certain potential and a reference potential (for example, ground potential). Therefore, voltage, potential, and potential difference can be rephrased as potential, voltage, and voltage difference, respectively. It is possible.

[0027] In this specification, even when the term "connect" is used, in an actual circuit, In some cases, there may be no physical connection and only wiring running through.

[0028] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the present specification does not refer to a specific name as a matter for identifying the invention. This does not indicate a title.

[0029] (Embodiment 1) In this embodiment, the c-axis is oriented and has a triangular or triangular shape when viewed from the ab plane, surface, or interface direction. The metal atoms are arranged in layers or in a layer of metal atoms and oxygen atoms on the c axis. Atoms are arranged in layers, and on the ab plane (or surface or interface), the a-axis or is a crystal with a different b-axis orientation (rotated around the c-axis) (CAAC: C Axis Ali This paper describes a method for forming an oxide film containing ZnO (also called gned crystal).

[0030] In a broad sense, oxides containing CAAC are non-single crystals that are not crystalline when viewed from a direction perpendicular to the ab plane. The atomic arrangement is a triangle, a hexagon, an equilateral triangle, or an equilateral hexagon, and the perpendicular orientation is in the c-axis direction. When viewed from a perpendicular direction, the metal atoms are arranged in layers, or the metal atoms and oxygen atoms are arranged in layers. In addition, oxide films containing CAAC have a new structure that may have grain boundaries. The film is of this structure and is not necessarily aligned with respect to the ab plane.

[0031] CAAC is not a single crystal. In addition, oxide films containing CAAC are formed only from amorphous materials. In addition, oxide films containing CAAC contain crystallized parts (crystalline parts). However, sometimes the boundary between one crystalline part and another cannot be clearly distinguished.

[0032] A part of the oxygen constituting the oxide film containing CAAC may be replaced with nitrogen. The c-axis of each crystalline part of C is aligned in a certain direction (for example, the substrate surface supporting the CAAC or The CAA may be aligned in a direction perpendicular to the surface of the oxide film containing the CAA. The normal of the ab plane of each crystal part that constitutes C is in a certain direction (e.g., CAAC The direction may be perpendicular to the substrate surface or the surface of the oxide film containing CAAC.

[0033] Oxide films containing CAAC can be conductive, semiconducting, or both, depending on their composition. Also, depending on the composition, they can be transparent or opaque to visible light. It may be bright.

[0034] Examples of oxides containing such CAAC include oxides formed in a film shape and present on the film surface, substrate surface, or When observed from a direction perpendicular to the interface, a triangular or hexagonal atomic arrangement is observed, and When the cross section of the film is observed, the layer arrangement of metal atoms or metal atoms and oxygen atoms (or nitrogen atoms) is observed. Materials in which rows are found may also be mentioned.

[0035] The CAAC will be described in detail with reference to FIG. 1. Unless otherwise specified, FIG. 1 is a top view. The direction of the c-axis is the c-axis direction, and the plane perpendicular to the plane in FIG. When we say "half," we mean the upper and lower halves with the ab plane as the boundary.

[0036] In Figure 1(A), there is one 6-coordinate metal atom M_1 and six 4-coordinate metal atoms adjacent to the metal atom M_1. The structure shown has 1 O and 1 O. For one such metal atom, only the adjacent oxygen atoms are shown. The structure in Fig. 1(A) is an octahedral structure, For simplicity, the structure is shown in a plane. Each subunit typically contains only one metal atom. However, in reality, multiple subunits are connected to each other in a planar manner via tri- or tetra-coordinated O atoms. A spreading metal oxide layer is formed.

[0037] Figure 1(B) shows one 5-coordinate metal atom M_2 and three 3-coordinate metal atoms adjacent to the metal atom M_2. The structure has O of 1 and two adjacent 4-coordinate O. The 3-coordinate O is ab There is one 4-coordinate O atom in each of the upper and lower halves of Figure 1(B). do.

[0038] Figure 1(C) shows one tetracoordinate metal atom M_3 and four tetracoordinate metal atoms adjacent to the metal atom M_3. The upper half of Fig. 1(C) has one tetracoordinate O, and the lower half has one tetracoordinate O. There are three 4-coordinate O atoms in the atom.

[0039] Metal atoms with these coordination numbers are bonded via 4-coordinated O. For example, a 6-coordinate metal atom M_1 bonds with a 4-coordinate atom M_2 in the upper half of the When bonding through the O at the 5-position, there are three 4-coordinate O atoms, so the 5-coordinate metal atom M_2 The upper half of the tetracoordinated O or pentacoordinated metal atom M2 is a tetracoordinated O or a tetracoordinated It bonds to one of the four-coordinate O's in the upper half of the metal atom M_3.

[0040] In addition, the subunits are bonded together so that the total charge of the layer structure is zero. .

[0041] Here, the charge per bond for the three-coordinated O and four-coordinated O is -0.6, respectively. 67, -0.5. For example, In (6 or 5 coordinates), Zn (4 The charges of Ga (5-coordinate), Sn (5-coordinate or 6-coordinate) are +3, +2, and +6, respectively. Since the subunits are +3 and +4, the subunits are In, Zn, and G The subunits consisting of a have a charge of 0. Therefore, these combinations form a layer The total charge of the structure is always 0. On the other hand, the Sn subunits have a charge of +1. Therefore, to form a layered structure containing Sn, a charge of -1 is required to cancel the charge of +1. An example of a structure with a charge of -1 is a structure in which two Zn subunits are bonded. For example, one Sn subunit is bound to two Zn subunits. If there is one structure with this charge, the charges are cancelled out, so the total charge of the layer structure can be made zero. Cut.

[0042] Figure 1(D) shows the layer structure of the In-Sn-Zn-O system. For simplicity, the three-coordinate O is omitted. Only the number of 4-coordinated O is shown. In can be either 5-coordinated or 6-coordinated. By repeating the one period shown in FIG. 1(D), the In-Sn-Z In-Sn-Zn The layer structure of the -O system is In2SnZn2O7(ZnO) m (m is 0 or a natural number.) In addition, there are In-Sn-Ga-Zn-O materials, In -Ga-Zn-O based materials, In-Si-Zn-O based materials, In-Al-Zn-O based materials Materials, Sn-Ga-Zn-O materials, Al-Ga-Zn-O materials, Sn-Al-Z nO-based materials, In-Zn-O-based materials, Sn-Zn-O-based materials, Al-Zn-O based materials, Zn-Mg-O based materials, Sn-Mg-O based materials, In-Mg-O based materials , In-Ga-O based materials, In-O based materials, Sn-O based materials, Zn-O based materials The same applies when using etc.

[0043] Next, a method for forming an oxide film containing CAAC will be described.

[0044] First, a first oxide film is deposited on the substrate by sputtering, molecular beam epitaxy, or atomic layer deposition. Alternatively, the film is formed by pulsed laser deposition. By heating the substrate during film formation, For example, the ratio of the crystalline region to the amorphous region is high. The substrate temperature is preferably 200° C. to 350° C. The temperature should be below 0℃.

[0045] By increasing the substrate temperature, the oxide film containing CAAC can be crystallized more. do.

[0046] Next, the substrate may be subjected to a first heat treatment. By performing the first heat treatment, the substrate becomes more amorphous. The first heat treatment can be, for example, a thermal treatment for forming an oxide film having a high ratio of crystalline regions to amorphous regions. For example, the temperature may be 200° C. or higher and lower than the distortion point of the substrate. The atmosphere is not limited, but it is preferably an oxidizing atmosphere, an inert atmosphere, or a reduced pressure atmosphere. The treatment time is 3 minutes to 24 hours. The longer the treatment time, the more the crystalline region becomes. However, heat treatment for more than 24 hours reduces productivity. This is undesirable because it leads to a decrease in

[0047] An oxidizing atmosphere is an atmosphere containing an oxidizing gas. The oxidizing gas is oxygen, ozone, or It is preferable that the gas used is nitrous oxide or the like, and does not contain water, hydrogen, etc. The purity of oxygen, ozone, and nitrous oxide introduced into the equipment must be 8N (99.999999%) or higher. Preferably, the concentration of impurities is 9N (99.9999999%) or more (i.e., the impurity concentration is 1 ppm or less, The oxidizing atmosphere is a mixture of an oxidizing gas and an inert gas. In that case, the oxidizing gas must be at least 10 ppm. .

[0048] Here, the inert atmosphere is nitrogen, rare gas (helium, neon, argon, krypton, The main component of the atmosphere is an inert gas such as xenon. The reactive gas content is less than 10 ppm.

[0049] The first heat treatment is performed using an RTA (Rapid Thermal Anneal) device. By using an RTA, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. Therefore, it is possible to form an oxide film having a high ratio of crystalline regions to amorphous regions. This can reduce the time required to

[0050] As an oxide, it has the chemical formula InMO3(ZnO) m Materials with the formula (m>0) may be used. Here, M is one or more metal elements selected from Ga, Al, Mn, and Co. For example, M may be Ga, Ga and Al, Ga and Mn, or Ga and Co. etc. may also be used.

[0051] Also, nitrogen 5×10 19 atoms / cm 3 More than 1×10 20 atoms / cm 3 The In-Ga-Zn-O system material containing 7 atomic percent or less has a hexagonal crystal structure oriented along the c-axis. The oxide has a crystal structure, and the In-O crystal plane (a crystal plane containing indium and oxygen) and the In -O crystal plane (crystal plane containing indium and oxygen) has a layer of Ga and Zn between them. Alternatively, the layer may be made of an In-Ga-Zn-O-based oxide material containing nitrogen in the above range. In the present invention, a multi-layer structure having Ga and Zn between the In-O crystal planes is provided. It is acceptable for the substrate 10 to have a layer therein.

[0052] Next, a second oxide film may be formed on the first oxide film to form an oxide stack. The first oxide film and the second oxide film can be formed in a similar manner.

[0053] When forming the second oxide film, the substrate is heated while the film is being formed, so that the first oxide film is annealed. The second oxide film can be crystallized in the same manner as the first oxide film. When an oxide film is made up of the same elements, it is called homo-growth. The formation of the first oxide film and the second oxide film from at least one different element is called heterogrowth. say.

[0054] After the second oxide film is formed, a second heat treatment may be performed. The second heat treatment can be performed in the same manner as the first heat treatment. Alternatively, the second heat treatment can be performed to obtain an oxide stack having a high ratio of crystalline regions to the first oxide stack. By carrying out the above process, it is possible to crystallize the second oxide film using the first oxide film as a seed crystal. At this time, the first oxide film and the second oxide film are homo-growth, which means that they are composed of the same elements. Alternatively, the first oxide film and the second oxide film may be at least one type of oxide. Hetero growth consisting of different elements may also be used.

[0055] By the above method, an oxide film containing CAAC can be formed.

[0056] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0057] (Embodiment 2) In this embodiment, a transistor using an oxide film containing CAAC shown in Embodiment 1 is An example of the data will be described with reference to FIG.

[0058] 2A is a top view of a transistor. The dashed lines CD indicate the AB cross section shown in FIG. 2(B) and the CD cross section shown in FIG. 2(C), respectively. corresponds to the surface.

[0059] Here, the cross section AB shown in FIG. 2(B) will be described in detail.

[0060] The AB cross section includes a substrate 100, a gate electrode 104 on the substrate 100, and a gate electrode 104 on the substrate 100. A gate insulating film 112 covers the gate electrode 104, and a gate electrode 1 04 on the semiconductor film 106 and a portion of the semiconductor film 106 that is on the semiconductor film 106 and in contact with the semiconductor film 106. A pair of electrodes 116, a gate insulating film 112, a semiconductor film 106 and a pair of electrodes 116 are covered. 1 is a cross section of a transistor having an interlayer insulating film 118.

[0061] The gate electrode 104 may have a single layer or a multilayer structure, and may be made of Al, Ti, Cr, Co, Ni , Cu, Y, Zr, Mo, Ag, Ta and W, their nitrides, oxides and alloys The gate electrode 104 may be formed by using one or more of the CA A conductive film (oxide conductive film) made of an oxide film containing AC can be used. The work function can be controlled by the composition of the oxide conductive film.

[0062] When an oxide conductive film is used for the gate electrode 104, the oxide conductive film has a higher resistance than a metal film. Therefore, in order to reduce the resistance of the gate electrode 104, the sheet resistance is set to 10 Ω / sq or less. It is preferable to laminate the low resistance film selected from the above-mentioned materials. The laminated structure is selected so that the film is on the gate insulating film 112 side.

[0063] In FIG. 2, the gate electrode 104 is arranged vertically and horizontally in a top view, rather than the semiconductor film 106. By making the shape of the semiconductor film 106 larger, deterioration of the semiconductor film 106 due to light and generation of electric charges are suppressed. However, the present invention is not limited to this. In this case, the shape may be large both vertically and horizontally.

[0064] There is no particular limitation on the substrate 100, but it should have at least sufficient heat resistance to withstand subsequent heat treatments. For example, glass substrates, ceramic substrates, quartz substrates, and sapphire substrates. Alternatively, a single crystal semiconductor such as silicon or silicon carbide may be used as the substrate 100. Conductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI ( It is also possible to apply a silicon on insulator substrate. Any of these substrates on which semiconductor elements are provided may be used as the substrate 100 .

[0065] A flexible substrate may be used as the substrate 100. In that case, In order to provide a transistor on a flexible substrate, A non-flexible substrate 100 is used, on which a transistor is fabricated, and then the transistor is Alternatively, the transistor may be peeled off and transferred to a flexible substrate. It is advisable to provide a release layer between the resistor and the substrate.

[0066] The semiconductor film 106 may be a silicon film, a germanium film, a silicon germanium film, or a silicon carbide film. From a gallium nitride film, a gallium nitride film, or an oxide film containing CAAC shown in embodiment 1 An oxide semiconductor film can be easily formed and has a low In addition, since the semiconductor film 106 has a high field effect mobility without laser beam treatment or the like, In addition, the oxide semiconductor film and the gate electrode in contact with the oxide semiconductor film are preferably used as a material for the gate insulating film. A transistor having a small interface state at the interface with the insulating film can be obtained.

[0067] The gate insulating film 112 and the interlayer insulating film 118 are made of, for example, silicon oxide or silicon oxynitride. , silicon oxide nitride, silicon nitride, aluminum oxide, hafnium oxide, yttrium oxide For example, aluminum or zirconium oxide may be used, and the material may be a laminate or a single layer. The gate insulating film 112 and the gate insulating film 113 may be formed by oxidation, CVD, sputtering, or the like. The interlayer insulating film 118 may be a film that releases oxygen when heated. By using the film, defects occurring in the semiconductor film 106 can be repaired, and the transistor This can suppress the deterioration of the electrical characteristics.

[0068] Here, silicon oxynitride is a material whose composition contains more oxygen than nitrogen. For example, oxygen is 50 atomic % or more and 70 atomic % or less, nitrogen is 0.5 atomic % or more and 15 atomic % or less. % or less, silicon is 25 atomic % to 35 atomic % or less, and hydrogen is 0 atomic % to 10 atomic % or less Silicon nitride oxide is a material that contains more oxygen than silicon dioxide in its composition. Also indicates that the nitrogen content is high. For example, oxygen is 5 atomic % or more and 30 atomic % or less, and nitrogen is 20 atomic % to 55 atomic %; silicon is 25 atomic % to 35 atomic %; hydrogen is 10 atomic % % or more and 25 atomic % or less. However, the above range is based on the Rutherford method. Rutherford Backscattering Spectrum (RBS) rometry and Hydrogen Forward Scattering (HFS) The results are based on measurements using ion scattering spectrometry (ICS). The total content of the constituent elements does not exceed 100 atomic %.

[0069] The gate insulating film 112 and the interlayer insulating film 118 are formed by insulating the semiconductor film 10 with the material of the pair of electrodes 116. 6 and adversely affect the transistor characteristics, The interlayer insulating film 118 is formed by using an insulating film having a small diffusion coefficient of the material. It acts as a protective film.

[0070] "Oxygen is released by heating" means that TDS (Thermal Desorption S Thermal desorption spectroscopy (TDA) analysis was used to measure the amount of oxygen in oxygen atoms. The emission amount is 1.0×10 18 atoms / cm 3 More than 3.0×10 20 ato ms / cm 3 This means that the above is the case.

[0071] Here, the method for measuring the amount of released oxygen converted into oxygen atoms in TDS analysis is as follows: will explain.

[0072] The amount of gas released during TDS analysis is proportional to the integral value of the spectrum. The amount of gas released is calculated based on the ratio of the integral value of the spectrum to the reference value of the standard sample. The reference value of the standard sample is the integral value of the spectrum of the sample containing the specified atom. is the density ratio of atoms.

[0073] For example, the results of a TDS analysis of a silicon wafer containing a standard sample of hydrogen with a given density, From the results of TDS analysis of the insulating film, the amount of oxygen molecules released from the insulating film (N O2 ) is calculated using formula 1. Here, the total mass of the spectrum detected at mass number 32 obtained by TDS analysis is We assume that the mass of the molecule is derived from oxygen molecules. There is another molecule with mass number 32, CH3OH, but it does not exist. This is not considered here because it is unlikely to occur. Also, the mass number of the isotope of the oxygen atom The oxygen molecule containing oxygen atoms with mass numbers 17 and 18 also occurs in nature. Not considered since its presence is extremely small.

[0074] N O2 =N H2 / S H2 ×S O2 ×α (Formula 1)

[0075] N H2 is the density of hydrogen molecules desorbed from the standard sample. H2 is a standard test The integral value of the spectrum obtained when the sample was subjected to TDS analysis. H2 / S H2 Let us assume that S O2 is the integral value of the spectrum obtained by TDS analysis of the insulating film. α is a coefficient that affects the spectral intensity in the TDS analysis. For details of Equation 1, For details, see Japanese Patent Application Laid-Open No. 6-275697. The amount of oxygen released from the insulating film is A thermal desorption analyzer EMD-WA1000S / W manufactured by Electron Science Corporation was used to measure the standard sample and 1×10 16 atoms / cm 3 The measurement was performed using a silicon wafer containing hydrogen atoms. .

[0076] In addition, some of the oxygen is detected as oxygen atoms in the TDS analysis. The ratio of the oxygen molecules can be calculated from the ionization rate of the oxygen molecules. Since the ionization rate of oxygen molecules is included in the calculation, the amount of oxygen atoms released can be calculated by evaluating the amount of oxygen molecules released. It is possible to estimate even if

[0077] In addition, N O2 is the amount of oxygen molecules released. The amount of oxygen released in terms of oxygen atoms is This is twice the amount released.

[0078] In the above-mentioned structure, the film that releases oxygen by heating is a silicon oxide (SiO X (X>2)) or silicon oxide (SiO X (X>2) means It contains more than twice as many oxygen atoms as silicon atoms per unit volume. The numbers of silicon and oxygen atoms per unit area were measured by the Rutherford backscattering method. be.

[0079] From the gate insulating film 112 or the interlayer insulating film 118 to the semiconductor film 106 which is an oxide semiconductor film By supplying oxygen, the interface state density between the semiconductor film 106 and the gate insulating film 112 and This can reduce the interface state density between the semiconductor film 106 and the interlayer insulating film 118. Due to the operation of the transistor, the interface between the semiconductor film 106 and the gate insulating film 112 or the semiconductor It is possible to suppress the capture of carriers at the interface between the conductive film 106 and the interlayer insulating film 118. As a result, a transistor with little deterioration in electrical characteristics can be obtained.

[0080] Furthermore, charges may be generated due to oxygen vacancies in the oxide semiconductor film. The oxygen vacancies in the conductive film act as donors and release electrons, which are carriers. The threshold voltage of the transistor is shifted in the negative direction. In this case, oxygen is sufficiently supplied from the interlayer insulating film 118 to the semiconductor film 106, which is an oxide semiconductor film. As a result, the oxide semiconductor film becomes oxide-free, which is a factor of the threshold voltage shifting in the negative direction. The density of elemental defects can be reduced.

[0081] That is, a film that releases oxygen when heated is provided on the gate insulating film 112 or the interlayer insulating film 118. By this, the interface state density at the interface between the semiconductor film 106 and the gate insulating film 112 or the semiconductor The interface state density at the interface between the film 106 and the interlayer insulating film 118 and the oxide semiconductor film The oxygen vacancy density of the conductive film 106 is reduced, and the semiconductor film 106, which is an oxide semiconductor film, and the gate insulating film The effect of carrier capture at the interface with the insulating film 112 or the interlayer insulating film 118 is reduced. This can be done.

[0082] The pair of electrodes 116 may be made of the metal, metal nitride, metal oxide or alloy shown in the gate electrode 104. Gold or the like can be used appropriately.

[0083] When a film containing Cu is used for the pair of electrodes 116, the resistance of the wiring can be reduced, and the device can be used in large displays, etc. Even if the pair of electrodes 116 is made of Cu, the occurrence of wiring delays and the like can be reduced. Depending on the material of the substrate 100, the adhesion may be poor, so the thickness of the substrate 100 and the film with good adhesion may be increased. It is preferable to form a layer structure. As a film having good adhesion to the substrate 100, Ti, Mo, Mn, or the like is used. Alternatively, a film containing Al may be used. For example, a Cu-Mn-Al alloy may be used.

[0084] As described above, a transistor having a controlled threshold voltage and excellent electrical characteristics can be obtained. This allows the semiconductor device to have low power consumption, good electrical characteristics, and high reliability. The device can be manufactured with high productivity.

[0085] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0086] (Embodiment 3) In this embodiment, a transistor having a structure different from that of the transistor described in Embodiment 2 is used. We will explain about this.

[0087] 3A and 3B are a top view and a cross-sectional view of a transistor according to one embodiment of the present invention. The dashed lines AB and CD in the figure represent the cross sections AB and CD shown in FIG. 3(B), respectively. 3(C) and corresponds to the CD cross section shown in FIG.

[0088] The cross section AB shown in FIG. 3(B) will be described in detail below.

[0089] The AB cross section includes a substrate 100, a gate electrode 104 on the substrate 100, and a gate electrode 104 on the substrate 100. A gate insulating film 112 covering the gate electrode 104 and a pair of electrodes 116 on the gate insulating film 112 Then, a part of the gate electrode 104 is connected to a pair of electrodes 116 on the gate electrode 104 via the gate insulating film 112. A semiconductor film 106 that is connected to the gate insulating film 112, a pair of electrodes 116, and the semiconductor film 106 are 1 is a cross section of a transistor having an insulating interlayer 118 covering the transistor.

[0090] In this embodiment, the gate electrode 104 and the semiconductor film 106 are the same as those in the second embodiment. The gate electrode having the oxide film containing CAAC shown in the first embodiment is used. By this, the work function can be controlled, and the threshold voltage of the transistor can be controlled. In addition, by using the oxide semiconductor film described in Embodiment 1 for the semiconductor film 106, A transistor having a low interface state density at the interface between a conductor film and a gate insulating film in contact with the oxide semiconductor film. You can get a star.

[0091] FIG. 4 is a top view and a cross-sectional view of a transistor according to one embodiment of the present invention. The dashed lines AB and CD in the figure represent the cross sections AB and CD shown in FIG. 4(B), respectively. 4(C) and corresponds to the CD cross section shown in FIG.

[0092] The cross section AB shown in FIG. 4(B) will be described in detail below.

[0093] The AB cross section is a cross section of a substrate 100, an insulating base film 102 on the substrate 100, and a thin film 104 on the insulating base film 102. A semiconductor film 106 and a pair of electrodes that are on the semiconductor film 106 and are partially in contact with the semiconductor film 106. 116, a gate insulating film 112 covering the semiconductor film 106 and the pair of electrodes 116, and a gate A gate electrode 104 is disposed on the semiconductor film 106 via an insulating film 112. 4 is a cross section of the rotor.

[0094] The base insulating film 102 has the same structure as the gate insulating film 112 and the interlayer insulating film 118. This can be done.

[0095] FIG. 5 is a top view and a cross-sectional view of a transistor according to one embodiment of the present invention. The dashed lines AB and CD in the figure represent the cross sections AB and CD shown in FIG. 5(B), respectively. This corresponds to the CD cross section shown in FIG. 5(C).

[0096] The cross section AB shown in FIG. 5(B) will be described in detail below.

[0097] The AB cross section is a cross section of a substrate 100, an insulating base film 102 on the substrate 100, and a thin film 104 on the insulating base film 102. A pair of electrodes 116 and a semiconductor layer that is on the pair of electrodes 116 and partially contacts the pair of electrodes 116. A semiconductor film 106, a gate insulating film 112 that covers the semiconductor film 106 and a pair of electrodes 116, and a gate insulating film 112 that covers the semiconductor film 106 and a pair of electrodes 116. A gate electrode 104 is disposed on the semiconductor film 106 via a gate insulating film 112. This is a cross section of a zircon.

[0098] 3 to 5, the gate electrode 104 is larger than the semiconductor film 106 in both length and width. By forming the semiconductor film 106 in a shape similar to that described above, deterioration of the semiconductor film 106 due to light and generation of electric charges are suppressed. The semiconductor film 106 is located vertically and horizontally in the top view from the gate electrode 104. It is acceptable for the shape to be large both vertically and horizontally.

[0099] 6A and 6B are a top view and a cross-sectional view of a transistor according to one embodiment of the present invention. The dashed lines AB and CD in the figure represent the cross sections AB and CD shown in FIG. 6(B), respectively. 6(C) and corresponds to the CD cross section shown in FIG.

[0100] The cross section AB shown in FIG. 6(B) will be described in detail below.

[0101] The AB cross section is a cross section of a substrate 100, an insulating base film 102 on the substrate 100, and a thin film 104 on the insulating base film 102. A semiconductor film having the region 126 and the region 121, and a gate insulating film 112 on the region 121. The gate electrode 104 on the gate insulating film 112, the base insulating film 102, the region 126, the gate An interlayer insulating film 118 covers the gate insulating film 112 and the gate electrode 104 , and A pair of electrodes 116 in contact with the region 126 through an opening exposing the region 126; 1 is a cross section of a transistor having a

[0102] Here, the gate insulating film 112 and the gate electrode 104 may have substantially the same top surface shape. This shape is obtained by processing the gate electrode 104 and the gate insulating film 112 using the same mask. After the gate electrode 104 and the gate insulating film 112 are formed, The width of the gate electrode 104 may be narrowed by Zuma treatment or chemical treatment.

[0103] The region 121 has a top surface shape that is approximately the same as that of the gate insulating film 112 or the gate electrode 104. This shape may be obtained by forming a semiconductor film using the gate insulating film 112 or the gate electrode 104 as a mask. For example, the gate insulating film 112 or the gate electrode 126 is formed. Using 04 as a mask, impurities (boron, phosphorus, hydrogen, rare gas, nitrogen, etc.) are introduced into the semiconductor film. The region with low resistance can be designated as region 126. 6 is a region of the semiconductor film where no

[0104] The region 121 functions as a channel region of a transistor. , functioning as the source region and drain region of the transistor.

[0105] 7A and 7B are a top view and a cross-sectional view of a transistor according to one embodiment of the present invention. The dashed lines AB and CD in the figure represent the cross sections AB and CD shown in FIG. 7(B), respectively. 7(C) and corresponds to the CD cross section shown in FIG.

[0106] The cross section AB shown in FIG. 7(B) will be described in detail below.

[0107] The AB cross section includes a substrate 100, a gate electrode 104 on the substrate 100, and a gate electrode 104 on the gate electrode 104. The gate insulating film 112 and the region 1 on the gate electrode 104 via the gate insulating film 112 26 and a semiconductor film having a region 121, and a gate insulating film 112 covering the semiconductor film Through an opening exposing the interlayer insulating film 118 and a region 126 provided in the interlayer insulating film 118, 1 is a cross-section of a transistor having a pair of electrodes 116 in contact with a region 126 .

[0108] FIG. 7 shows that the gate insulating film 112, the gate electrode 104 and the region 121 have substantially the same top surface shape. However, the gate insulating film 112 and the gate electrode 1 The shapes of area 04 and area 121 may be different.

[0109] As described above, a transistor having a controlled threshold voltage and excellent electrical characteristics can be obtained. This allows the semiconductor device to have low power consumption, good electrical characteristics, and high reliability. The device can be manufactured with high productivity.

[0110] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0111] (Embodiment 4) In this embodiment, the transistor described in Embodiment 2 or 3 is used. In the present embodiment, the liquid crystal display device according to the present invention is An example of the application of the form will be described below, but the present invention is not limited to this. For example, EL( One embodiment of the present invention may also be applied to a display device such as an electroluminescence (EL) display device. This is something that can be easily conceived by a person skilled in the art.

[0112] FIG. 8 shows a circuit diagram of a liquid crystal display device using an active matrix driving method. Source lines SL_1 to SL_a, gate lines GL_1 to GL_b, and a plurality of pixels 200 The pixel 200 includes a transistor 230, a capacitor 220, and a liquid crystal element 210. A plurality of such pixels 200 are arranged to form a pixel section of a liquid crystal display device. When simply referring to a source line or a gate line, the lines are written as source line SL and gate line GL. do.

[0113] The transistor 230 is the transistor described in the second or third embodiment. By using a transistor according to one embodiment of the present invention, power consumption is low and electrical characteristics are good. Therefore, a good and reliable display device can be obtained.

[0114] The gate line GL is connected to the gate of the transistor 230, and the source line SL is connected to the gate of the transistor 23 The drain of transistor 230 is connected to the source of transistor 220. The other capacitance of the capacitor 220 is connected to the electrode and one of the pixel electrodes of the liquid crystal element 210. The electrode and the other pixel electrode of the liquid crystal element 210 are connected to a common electrode. It may be provided in the same layer and made of the same material as the gate line GL.

[0115] The gate lines GL are connected to a gate drive circuit. Alternatively, the transistor described in the third embodiment may be included. Since the voltage is controlled, the off-current can be reduced and the on-voltage can be reduced. This makes it possible to reduce power consumption.

[0116] The source line SL is connected to a source driver circuit as described in the second embodiment. Alternatively, the transistor described in the third embodiment may be included. Since the voltage is controlled, the off-current can be reduced and the on-voltage can be reduced. This makes it possible to reduce power consumption.

[0117] Either or both of the gate driver circuit and the source driver circuit are provided by a separately prepared substrate. Formed on a board and then processed by COG (Chip On Glass), wire bonding, or T Even if you use a method such as AB (Tape Automated Bonding) good.

[0118] In addition, since transistors are easily damaged by static electricity, it is preferable to provide a protection circuit. The protection circuit is preferably configured using a non-linear element.

[0119] When a potential is applied to the gate line GL so as to be equal to or higher than the threshold voltage of the transistor 230, The charge supplied from the source line SL becomes the drain current of the transistor 230 and After one column is charged, the transistor 230 in that column is in the off state. This causes the source line SL to no longer apply voltage, but the voltage stored in the capacitor 220 The required voltage can then be maintained by the load. In this way, charging is performed for rows 1 to a.

[0120] Since the transistor 230 has a controlled threshold voltage, The charge held in the capacitor 220 is difficult to escape, and the capacitance of the capacitor 220 can be reduced. This makes it possible to reduce the power consumption required for charging.

[0121] In addition, the transistor 230 may be a transistor having a low off-state current (a transistor using an oxide semiconductor film). When a transistor is used, the period during which the voltage is maintained can be extended. This allows the redraw frequency of the display to be reduced for images with little movement (including still images). This allows further reduction in power consumption. This makes it possible to reduce the power consumption required for charging.

[0122] As described above, according to one embodiment of the present invention, a liquid crystal display device which is highly reliable and consumes low power is provided. can be obtained.

[0123] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0124] (Embodiment 5) In this embodiment, a semiconductor device is manufactured using the transistor described in Embodiment 2 or 3. An example of fabricating a semiconductor memory device will be described.

[0125] A typical example of a volatile semiconductor memory device is a transistor that constitutes a memory element. By storing electric charge in a capacitor, information is stored in the DRAM (Dynamic Random Access Memory). random access memory, which uses circuits such as flip-flops to store data SRAM (Static Random Access Memory) holds the data. be.

[0126] A typical example of a non-volatile semiconductor memory device is a transistor having a gate electrode and a channel forming region. A floating gate is provided between the semiconductor device and the semiconductor region, and a charge is held on the floating gate. There is a flash memory that stores data in a digital format.

[0127] A part of the transistors included in the above-mentioned semiconductor memory device may be The transistor shown in 3 can be applied.

[0128] First, a volatile memory using the transistor shown in the second or third embodiment This will be explained with reference to FIG.

[0129] The memory cell includes a bit line BL, a word line WL, a sense amplifier SAmp, and a transistor. The transistor Tr and the capacitor C (see FIG. 9(A)).

[0130] The change in the voltage held in the capacitor C over time is caused by the off-current of the transistor Tr, as shown in Figure 9. It is known that the charge gradually decreases as shown in (B). Initially, the charge is increased from V0 to V1. Over time, the applied voltage decreases to VA, which is the limit for reading data1. This period is called the retention period T_1. In other words, in the case of a binary memory cell, during the retention period T_1 Needs to be refreshed.

[0131] Here, the transistor shown in the second or third embodiment is applied to the transistor Tr. By using this, the retention period T_1 can be extended because the threshold voltage is controlled. In other words, it is possible to reduce the frequency of refresh, thereby reducing power consumption. This can be done.

[0132] When using a transistor with a small off-state current for the transistor Tr, the period during which the voltage is maintained is Since it is possible to further extend the length, it is possible to further reduce power consumption. For example, , and the off-state current is 1×10 -21 A or less, preferably 1×10 -24 A or below When a DRAM is configured using transistors using an oxide semiconductor film, it can operate for several It is possible to retain data for periods ranging from days to decades.

[0133] As described above, according to one embodiment of the present invention, a highly reliable volatile memory with low power consumption can be provided. can be obtained.

[0134] Next, a nonvolatile memory to which the transistor shown in the second embodiment or the third embodiment is applied will be described. This will be explained with reference to FIG.

[0135] FIG. 10A is a circuit diagram of a nonvolatile memory. The nonvolatile memory includes a transistor Tr _1, a word line WL_1 connected to the gate of the transistor Tr_1, and a transistor T A source wiring SL_1 connected to the source of r_1, a transistor Tr_2, and a transistor A source wiring SL_2 connected to the source of the transistor Tr_2 and a drain wiring SL_3 connected to the drain of the transistor Tr_2 a drain wiring DL_2 connected to one end of the capacitor C; The capacitance line CL, the other end of the capacitor C, the drain of the transistor Tr_1, and the transistor and a floating gate FG connected to the gate of the transistor Tr_2.

[0136] Note that the nonvolatile memory shown in this embodiment mode changes the potential of the floating gate FG according to This utilizes the fact that the threshold voltage of the transistor Tr_2 varies. For example, Figure 10(B) shows the voltage V of the capacitance line CL. CL The drain current flowing through transistor Tr_2 is Flow I D This is a diagram explaining the relationship with _2.

[0137] Here, the floating gate FG adjusts the voltage through the transistor Tr_1. For example, the potential of the source line SL_1 is set to VDD. The potential of WL_1 is equal to or higher than the threshold voltage Vth of transistor Tr_1 plus VDD. By doing so, the potential of the floating gate FG can be set to HIGH. By setting the potential of the word line WL_1 to be equal to or lower than the threshold voltage Vth of the transistor Tr_1, , the potential of the floating gate FG can be set to LOW.

[0138] Therefore, V shown with FG=LOW CL -I D _2 curve and V shown with FG=HIGH CL -I D _2 curves can be obtained. That is, when FG=LOW, V CL = 0V, drain current I D Since _2 is smaller, the data is 0. Also, FG=HIGH So, V. CL = 0V, drain current I D Since _2 is larger, it becomes data 1. Then, data can be stored.

[0139] Here, the transistor Tr_1 is the transistor shown in the second or third embodiment. By applying the flow The charge stored in the gate FG is transferred between the source and drain of the transistor Tr_1. This prevents unintentional leaks of data. In addition, by using one embodiment of the present invention, the threshold voltage of the transistor Tr_1 can be reduced. This voltage control makes it possible to reduce the voltage required for writing, It is possible to reduce power consumption compared to memory.

[0140] The transistor Tr_2 is the transistor shown in the second or third embodiment. may be applied.

[0141] Next, in the nonvolatile memory shown in FIG. 10, a configuration not including a capacitor is described with reference to FIG. 1 will be used to explain.

[0142] FIG. 11 is a circuit diagram of a nonvolatile memory. The nonvolatile memory includes a transistor Tr_1 and , a word line WL_1 connected to the gate of the transistor Tr_1, a source wiring SL_1 connected to the source of the transistor Tr_2; The source wiring SL_2 connected to the source of transistor Tr_2 is connected to the drain of transistor Tr_2. A drain wiring DL_2 connected to the drain of the transistor Tr_1 and a transistor and the gate of Tr_2.

[0143] When a transistor with a small off-state current is used for the transistor Tr_1, a capacitor is provided. A charge can be held between the drain of Tr_1 and the gate of Tr_2 without the need for a capacitor. Since no capacitor is provided, the area can be reduced, and the integration is higher than when a capacitor is provided. It is possible.

[0144] In addition, in this embodiment, a nonvolatile memory using four or five wirings is shown. For example, the source wiring SL_1 and the drain wiring DL_2 may be connected in common. It is also acceptable to configure it as follows.

[0145] As described above, according to one embodiment of the present invention, a semiconductor device having high long-term reliability and low power consumption can be obtained. A body memory device can be obtained.

[0146] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0147] (Embodiment 6) In this embodiment, an example of an electronic device to which the second or third embodiment is applied will be described. Reveal.

[0148] FIG. 12A shows a mobile information terminal. It has a housing 300, a button 301, and a microphone 3 02, a display unit 303, a speaker 304, and a camera 305, One embodiment of the present invention is applied to the display unit 303 and the camera 305. In addition, although not shown, a calculation device, a wireless circuit, or a memory circuit inside the main body One embodiment of the present invention can also be applied to the above.

[0149] FIG. 12B shows a display. The display includes a housing 310 and a display unit 311. One embodiment of the present invention can be applied to the display portion 311. Therefore, even when the size of the display unit 311 is increased, a display with high display quality can be obtained. can.

[0150] FIG. 12C shows a digital still camera. It has a housing 320, a button 321, and a microphone. The device includes a microphone 322 and a display unit 323. Although not shown, one embodiment of the present invention can be used in a memory circuit or an image sensor. The aspect can also be applied.

[0151] By using one embodiment of the present invention, the cost of electronic devices can be reduced. A high-quality display device can be obtained.

[0152] This embodiment mode can be implemented in appropriate combination with other embodiment modes. EXAMPLES

[0153] High-angle annular dark-field scanning transmission electron microscopy (HAADF-STE) of oxides containing CAAC M:High-Angle Annular Dark Field Scanning Transmission Electron Microscopy The planar and cross-sectional images are shown in Figures 13(A) and 13(B), respectively. The planar and cross-sectional images of the oxides obtained by HAADF-STEM are shown in Fig. 14(A), respectively. ) and FIG. 14(B).

[0154] The sample is an In-Ga-Zn-O oxide film deposited on a quartz substrate by DC sputtering. The other deposition conditions were power 0.5 kW, deposition pressure 0.4 Pa, deposition Gases were Ar 35sccm, O2 15sccm, and the target-substrate distance was 60m. The target was an In-Ga-Zn-O target (molar ratio, In2O3: The thickness of the film was 100 nm.

[0155] Here, the substrate temperature of sample 1 was 400° C., and the substrate temperature of sample 2 was room temperature. No heat treatment was performed after the film formation.

[0156] From the planar images shown in the regions 1001 and 1002 in FIG. 13(A), the ab plane, the surface, or It was found that the atomic arrangement is triangular or hexagonal when viewed from the interface direction. The cross-sectional image shown in Figure 13(B) reveals that the metal atoms are aligned in the direction indicated by the arrows. That is, metal atoms or metal atoms and oxygen atoms are arranged in layers in the c-axis direction. In other words, it is found that Sample 1 is an oxide film containing CAAC.

[0157] From the planar image shown in FIG. 14(A), triangular or hexagonal shapes are seen from the surface or interface direction. The atomic arrangement of the metal atoms and the lattice structure was not confirmed. It was found that the metal atoms and oxygen atoms were not arranged in layers. It is clear that this is not an oxide film containing AAC.

[0158] As described above, an oxide film containing CAAC was obtained. EXAMPLES

[0159] In this example, the crystal state of the oxide film containing CAAC was measured by X-ray diffraction (XRD). An example of evaluation using the diffraction method will be described.

[0160] The sample is an In-Ga-Zn-O oxide film deposited on a quartz substrate by DC sputtering. The other deposition conditions were: power 0.5 kW, deposition pressure 0.4 Pa, and ter The distance between the target and the substrate was 60 mm, and the substrate temperature was 400°C. The target was In-Ga -Zn-O target (molar ratio, In2O3:Ga2O3:ZnO=1:1:2) The thickness was 300 nm.

[0161] Here, the deposition gas for sample 3 is O2=40sccm, and the deposition gas for sample 4 is N2=40sccm.

[0162] Figures 15 and 16 are XRD spectra measured by the out of plane method. 15 shows the film after deposition (as-depo), and 16 shows the film after deposition in a N2 atmosphere at 450°C for 1 hour. Here, solid lines 1101 and 1103 represent sample 3, and solid line 110 2 and solid line 1104 show the XRD spectrum of sample 4.

[0163] 15 and 16, under all conditions, there is a peak corresponding to (009), and the c-axis It was found that the crystals were strongly oriented along the c-axis in Samples 3 and 4. In particular, the peak intensity corresponding to (009) tends to be large in sample 4. In addition, in sample 3, the peak position corresponding to (009) shifted to the lower angle side. It was found that there are

[0164] Figures 17 and 18 show XRD spectra measured by the in-plane method. After deposition (as-depo), Fig. 18 shows the result after heat treatment at 450℃ for 1 hour in N2 atmosphere after deposition. Here, solid lines 1111 and 1113 represent sample 3, and solid lines 1112 and The solid line 1114 shows the XRD spectrum of Sample 4.

[0165] 17 and 18, under all conditions, there is a peak corresponding to (009), and the c-axis It was found that the crystal was strongly oriented. In addition, the peaks corresponding to (110) and (119) It was also found that there was a peak corresponding to

[0166] Next, Figures 19 and 20 show the (110) peak obtained by the in-plane method. The optical system was fixed at the position (2θ) and the XRD spectrum was obtained by rotating the sample around the normal to the sample surface. Here, solid lines 1121 and 1123 represent sample 3, and solid line 1122 represents sample 4. and solid line 1124 shows the XRD spectrum of Sample 4.

[0167] 19 and 20, no peak was observed under any of the conditions.

[0168] 15 to 20, the measured sample is non-single crystal and has properties different from polycrystal. It was found that this example shows the characteristics of CAAC having the In-Ga-Zn- Although the present invention describes an oxide film of In-Sn-ZnO, the present invention is not limited to this material. In the case of -O-based oxide films, oxide films containing CAAC can be obtained. EXAMPLES

[0169] On a 600mm x 720mm glass substrate, an In-Ga-Zn-O system acid containing CAAC was A transistor was fabricated using the nitride film (thickness: 35 nm), and its initial characteristics are shown in FIG. The channel length L of the fabricated transistor is 3 μm and the channel width W is 50 μm. The bottom gate transistor has the structure shown in FIG. The film thickness is 100 nm.

[0170] Figure 21 shows the Vg-Id curve data (Vd=1V, Vd=1 0V), but since almost the same values ​​are plotted and overlap, this result indicates that CAAC The transistor using the In-Ga-Zn-O oxide film has good uniformity. The upper Vg-Id curve in Figure 21 is the value when Vd = 10 V, and the lower Vg-Id curve in Figure 21 is the value when Vd = 10 V. The Vg-Id curve shown here is the value when Vd=1V.

[0171] The average threshold voltage Vth of these transistors is 1.34V. The average movement rate was 10.7 cm. 2 / Vs. This threshold voltage Vth is V The curve that expresses Id of the Vg-Id curve measured with d set to 10 V as the square root (hereafter, √ This value is calculated using the Id curve.

[0172] In addition, in order to evaluate the reliability of transistors, a new In-Ga-Zn- Multiple transistors were fabricated on a 5-inch substrate using an O-based oxide film (thickness 35 nm). The transistors were then subjected to BT testing. L is 6 μm, and the channel width W is 50 μm. The thickness of the gate insulating film of the transistor is 100 nm.

[0173] BT testing is a type of accelerated testing that measures the changes in transistor characteristics that occur over a long period of use. In particular, the transistor threshold voltage before and after the BT test can be evaluated in a short time. The change in the threshold voltage Vth is an important indicator for investigating reliability. The smaller the change in threshold voltage Vth (ΔVth), the more reliable the transistor is. It can be said that.

[0174] Specifically, the temperature of the substrate on which the transistor is formed (substrate temperature) is kept constant. The source and drain of the transistor are at the same potential, and the gate is connected to a different potential than the source and drain. The substrate temperature may be appropriately set depending on the purpose of the test. When the potential applied to the gate is higher than the potentials of the source and drain, this is called a +BT test. The case where the potential applied to the gate is lower than the potentials of the source and drain is called the -BT test. say.

[0175] The test strength of the BT test depends on the substrate temperature, the electric field strength applied to the gate insulating film, and the electric field application time. The electric field strength applied to the gate insulating film can be determined by the following equation: It is determined by dividing the potential difference between the drain and the source by the thickness of the gate insulating film. If you want to apply an electric field strength of 2MV / cm to a gate insulating film of 2 nm, the potential difference should be 20V This can be done as follows.

[0176] Voltage refers to the potential difference between two points, and potential refers to the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) of a unit charge in a particle. Generally, the potential difference between the potential at a certain point and a reference potential (e.g., ground potential) is This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage, Voltage may be read as potential.

[0177] The BT test was performed at a substrate temperature of 80°C, with an electric field strength of 3MV / cm applied to the gate insulating film. Set the time (also called stress time) to 100 seconds, 200 seconds, 500 seconds, 1000 seconds, 150 The time was set to 0 seconds and 2000 seconds, and +BT and -BT tests were performed.

[0178] The results of the +BT test after 2000 seconds are shown in FIG. 22(A), and the results of the -BT test after 2000 seconds are shown in FIG. The results are shown in Figure 22(B).

[0179] In FIG. 22(A), the threshold voltage Vth after the +BT test is positive compared to the initial characteristics. In Fig. 22(B), the change in the characteristic curve after the -BT test is 0.63 V in the direction of the initial characteristic. The threshold voltage Vth of the transistor changes by 0.02 V in the positive direction. Even so, the change in threshold voltage Vth, ΔVth, is less than 1 V, and the In-G It was confirmed that the reliability of the transistors fabricated using a-Zn-O oxide films is high. Ta.

[0180] In addition, the BT test was performed using transistors that had never been subjected to the BT test. For example, it is important to perform a -B test using a transistor that has already undergone a +BT test. When a T test is performed, the -BT test results are correctly evaluated due to the influence of the previous +BT test. In addition, it is not possible to perform a +BT test again using a transistor that has already been +BT tested. The same applies if the BT test is repeated. This does not apply when returning the item.

[0181] In addition, the experiment was conducted while irradiating light using an LED light source (white light with an illuminance of 10,000 lux). The results of the BT test (also called photoinduced positive bias degradation) are shown in Figure 23(A). The results of the -BT test (also called negative bias light photodegradation) performed while irradiating the device with light are shown in Figure 23(B). In FIG. 23(A), the threshold voltage Vth after the +BT test is smaller than the initial characteristic. has changed by 0.27V in the positive direction, and in Figure 23(B), -B After the test, the threshold voltage Vth changed by 0.23 V in the negative direction. In both BT tests, the change in threshold voltage Vth, ΔVth, was less than 1 V. Reliability of transistors fabricated using In-Ga-Zn-O oxide films containing AAC was confirmed to be high.

[0182] In addition, Fig. 24 shows the time dependence of the change ΔVth of the threshold voltage Vth under various stress conditions. The vertical axis indicates the change ΔVth of the threshold voltage Vth on a linear scale. The horizontal axis shows the stress time on a log scale.

[0183] Figures 25(A) and 25(B) show schematic diagrams explaining the mechanism of negative bias light photodegradation. Figure 25(A) and Figure 25(B) show the interface between the oxide semiconductor and the gate insulating film. As shown in Figure 25(A), when light hits a transistor, holes are created. The holes are trapped and detrapped in the gate insulating film as shown in FIG. When the charge is attracted to the negative electrode, it becomes a fixed charge and causes a negative shift in the threshold voltage Vth. Therefore, it is important to have no oxygen vacancy level in order to prevent the negative bias light irradiation deterioration. In other words, reducing oxygen vacancies is effective in preventing the negative bias light irradiation deterioration. Since oxygen is less likely to escape from the crystal surface than from the plane, the In-Ga-Zn-O Transistors using oxide films based on this technology have high reliability. For this purpose, a film that releases oxygen when heated is used as the gate insulating film and the interlayer insulating film. Performing the heat treatment in an oxidizing atmosphere is effective in improving reliability. [Explanation of symbols]

[0184] 100 Substrates 102 Undercoat insulating film 104 Gate electrode 106 Semiconductor Film 112 Gate insulating film 116 Electrode 118 Interlayer insulating film 121 areas 126 areas 200 pixels 210 Liquid crystal element 220 Capacitor 230 Transistor 300 Case 301 Button 302 Microphone 303 Display section 304 Speaker 305 Camera 310 Case 311 Display section 320 Case 321 Button 322 Microphone 323 Display section 1001 area 1002 area 1101 Solid line 1102 Solid line 1103 Solid Line 1104 Solid Line 1111 Solid line 1112 Solid line 1113 Solid line 1114 Solid line 1121 Solid Line 1122 Solid line 1123 Solid Line 1124 Solid Line

Claims

1. A liquid crystal display device including a plurality of pixels, each pixel including a transistor and a pixel electrode electrically connected to the transistor, The transistor is a gate electrode, an insulating film having a region above the gate electrode, an oxide semiconductor film having a region above the insulating film, and a conductive layer having a region above the oxide semiconductor film; the conductive layer has a region functioning as a source electrode or a drain electrode, the oxide semiconductor film has a first region in contact with the conductive layer, the first region has a region overlapping with the gate electrode and a region not overlapping with the gate electrode, a thickness of a region of the first region overlapping with the gate electrode is equal to a thickness of a region of the first region not overlapping with the gate electrode; the oxide semiconductor film has a region including a plurality of crystals whose c-axes are aligned and whose a-axes or b-axes are oriented in different directions, the oxide semiconductor film has a region in which metal atoms are confirmed to be arranged in a layered manner in a cross-sectional view.

2. A liquid crystal display device including a plurality of pixels, each pixel including a transistor and a pixel electrode electrically connected to the transistor, The transistor is a gate electrode, an insulating film having a region above the gate electrode, an oxide semiconductor film having a region above the insulating film, and a conductive layer having a region above the oxide semiconductor film; the conductive layer has a region functioning as a source electrode or a drain electrode, the oxide semiconductor film has a first region in contact with the conductive layer, the first region has a region overlapping with the gate electrode and a region not overlapping with the gate electrode, a thickness of a region of the first region overlapping with the gate electrode is equal to a thickness of a region of the first region not overlapping with the gate electrode; the oxide semiconductor film includes a first oxide film and a second oxide film having a region above the first oxide film, the second oxide film has a region including a plurality of crystals whose c-axes are oriented and whose a-axes or b-axes are oriented in different directions; the second oxide film has a region in which it is confirmed that metal atoms are arranged in a layered manner in a cross-sectional view.

3. In claim 1 or 2, The liquid crystal display device, wherein the oxide semiconductor film contains indium, gallium, and zinc.

4. In any one of claims 1 to 3, The insulating film comprises a first film containing oxygen and silicon, and a second film containing nitrogen and silicon.

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