Image pickup element, stacked image pickup element, and solid-state image pickup device

Abstract

This imaging element comprises a photoelectric conversion unit in which a first electrode 21, a photoelectric conversion layer 23A, and a second electrode 22 are stacked, wherein a protective layer 23B comprising an inorganic oxide and an inorganic oxide semiconductor material layer 23C are formed immediately below the photoelectric conversion layer 23A from the photoelectric conversion layer side.

Description

[Technical field]

[0001] The present disclosure relates to an imaging element, a stacked imaging element, and a solid-state imaging device. [Background technology]

[0002] In recent years, stacked imaging elements have been attracting attention as imaging elements constituting image sensors and the like. In stacked imaging elements, a photoelectric conversion layer (light receiving layer) is sandwiched between two electrodes. In stacked imaging elements, a structure is required for storing and transferring signal charges generated in the photoelectric conversion layer based on photoelectric conversion. In conventional structures, a structure is required in which the signal charges are stored and transferred to an FD (Floating Drain) electrode, and high-speed transfer is required to prevent delays in the signal charges.

[0003] An imaging element (photoelectric conversion element) for solving such problems is disclosed in, for example, Japanese Patent Application Laid-Open No. 2016-063165. a storage electrode formed on the first insulating layer; a second insulating layer formed on the storage electrode; a semiconductor layer formed to cover the storage electrode and the second insulating layer; a collection electrode formed in contact with the semiconductor layer and spaced apart from the storage electrode; A photoelectric conversion layer formed on the semiconductor layer; and An upper electrode formed on the photoelectric conversion layer; It is equipped with:

[0004] An imaging element using an organic semiconductor material for the photoelectric conversion layer is capable of photoelectrically converting a specific color (wavelength band). Because of this characteristic, when used as an imaging element in a solid-state imaging device, a combination of an on-chip color filter layer (OCCF) and an imaging element constitutes sub-pixels, and the sub-pixels are arranged two-dimensionally, making it possible to obtain a structure in which sub-pixels are stacked (stacked imaging element), which is not possible in conventional solid-state imaging devices (see, for example, JP 2011-138927 A). In addition, since demosaicing is not required, there is an advantage that false colors do not occur. In the following description, an imaging element having a photoelectric conversion unit provided on or above a semiconductor substrate is conveniently referred to as a "first type imaging element," a photoelectric conversion unit constituting the first type imaging element is conveniently referred to as a "first type photoelectric conversion unit," an imaging element provided in a semiconductor substrate is conveniently referred to as a "second type imaging element," and a photoelectric conversion unit constituting the second type imaging element is conveniently referred to as a "second type photoelectric conversion unit."

[0005] FIG. 72 shows a configuration example of a conventional stacked type imaging element (stacked type solid-state imaging device). In the example shown in FIG. 72, a third photoelectric conversion unit 343A and a second photoelectric conversion unit 341A, which are second type photoelectric conversion units constituting a third imaging element 343 and a second imaging element 341, which are second type imaging elements, are stacked and formed in a semiconductor substrate 370. In addition, a first photoelectric conversion unit 310A, which is a first type photoelectric conversion unit, is disposed above the semiconductor substrate 370 (specifically, above the second imaging element 341). Here, the first photoelectric conversion unit 310A includes a first electrode 321, a photoelectric conversion layer 323 made of an organic material, and a second electrode 322, and constitutes the first imaging element 310, which is a first type imaging element. In the second photoelectric conversion unit 341A and the third photoelectric conversion unit 343A, for example, blue light and red light are photoelectrically converted, respectively, due to the difference in absorption coefficient. In addition, in the first photoelectric conversion section 310A, for example, green light is photoelectrically converted.

[0006] The charges generated by photoelectric conversion in the second photoelectric conversion unit 341A and the third photoelectric conversion unit 343A are temporarily stored in the second photoelectric conversion unit 341A and the third photoelectric conversion unit 343A, and then transferred to a second floating diffusion layer (Floating Diffusion) FD by a vertical transistor (a gate unit 345 is shown) and a transfer transistor (a gate unit 346 is shown), respectively. 2 and the third floating diffusion layer FD 3 The signal is then transferred to an external read circuit (not shown), and is then output to an external read circuit (not shown). 2 ,FD 3 are also formed on the semiconductor substrate 370.

[0007] The charges generated by photoelectric conversion in the first photoelectric conversion section 310A are guided to a first floating diffusion layer FD 1 formed in the semiconductor substrate 370 via a contact hole section 361 and a wiring layer 362. 1 The first photoelectric conversion section 310A is also connected to a gate section 352 of an amplifying transistor that converts the amount of charge into a voltage via a contact hole section 361 and a wiring layer 362. The first floating diffusion layer FD 1 constitutes a part of the reset transistor (gate portion 351 is shown). Reference numeral 371 denotes an element isolation region, reference numeral 372 denotes an insulating material film formed on the surface of the semiconductor substrate 370, reference numerals 376 and 381 denote interlayer insulating layers, reference numeral 383 denotes a protective material layer, and reference numeral 314 denotes an on-chip microlens. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] JP 2016-063165 A [Patent Document 2] JP 2011-138927 A [Patent Document 3] Special Publication No. 2016-502278 Summary of the Invention [Problem to be solved by the invention]

[0009] However, in the technology disclosed in the above-mentioned JP 2016-063165 A, there are restrictions such as the storage electrode and the second insulating layer formed thereon must be formed with the same length, and the interval between the storage electrode and the collection electrode is specified in detail, which may complicate the manufacturing process and cause a decrease in manufacturing yield. Furthermore, although some materials constituting the semiconductor layer are mentioned, more specific material compositions and configurations are not mentioned. Also, although a correlation equation between the carrier mobility of the semiconductor layer and the stored charge is mentioned, there is no mention of matters related to the improvement of charge transfer, such as matters related to the relationship with the energy level of the region adjacent to the photoelectric conversion layer, which is important for the transfer of generated charges. Also, regarding the energy level, in the thin film transistor disclosed in JP 2016-502278 A, it is mentioned that the energy level of the conduction band of the metal oxide semiconductor constituting the channel is equal to or higher than the energy level of the conduction band of the passivation material laminated on the channel by less than 0.5 eV, but there is no mention of matters related to the improvement of charge transfer.

[0010] Therefore, an object of the present disclosure is to provide an imaging element, a stacked imaging element, and a solid-state imaging device that have excellent transfer characteristics of charges accumulated in a photoelectric conversion layer despite having a simple configuration and structure. [Means for solving the problem]

[0011] In order to achieve the above object, the imaging element of the present disclosure comprises: The photoelectric conversion unit includes a first electrode, a photoelectric conversion layer, and a second electrode. Directly below the photoelectric conversion layer, from the photoelectric conversion section side, a protective layer made of an inorganic oxide and an inorganic oxide semiconductor material layer are formed.

[0012] In order to achieve the above object, a stacked imaging element of the present disclosure includes at least one imaging element of the present disclosure.

[0013] A solid-state imaging device according to a first aspect of the present disclosure for achieving the above object includes a plurality of the imaging elements of the present disclosure. Also, a solid-state imaging device according to a second aspect of the present disclosure for achieving the above object includes a plurality of the stacked imaging elements of the present disclosure. [Brief description of the drawings]

[0014] [Figure 1] FIG. 1 is a schematic partial cross-sectional view of an image pickup device according to a first embodiment. [Diagram 2] FIG. 2 is an equivalent circuit diagram of the image sensor of the first embodiment. [Diagram 3] FIG. 3 is an equivalent circuit diagram of the image sensor of the first embodiment. [Figure 4] FIG. 4 is a schematic layout diagram of the first electrode and charge storage electrode constituting the image sensor of the first embodiment, and the transistors constituting the control unit. [Diagram 5] FIG. 5 is a diagram illustrating a schematic diagram of a potential state at each portion during operation of the image sensor of the first embodiment. [Figure 6] 6A, 6B, and 6C are equivalent circuit diagrams of the image pickup elements of Examples 1, 4, and 6 for explaining the respective portions of FIG. 5 (Example 1), FIGS. 20 and 21 (Example 4), and FIGS. 32 and 33 (Example 6). [Figure 7] FIG. 7 is a schematic layout diagram of the first electrodes and charge storage electrodes constituting the image sensor of the first embodiment. [Figure 8] FIG. 8 is a schematic perspective view of a first electrode, a charge storage electrode, a second electrode, and a contact hole portion that constitute the image sensor of the first embodiment. [Figure 9] FIG. 9 is an equivalent circuit diagram of a modified example of the image sensor of the first embodiment. [Figure 10] FIG. 10 is a schematic layout diagram of the first electrode and charge storage electrode constituting the modified example of the image sensor of Example 1 shown in FIG. 9, and transistors constituting the control section. [Figure 11] FIG. 11 is a schematic partial cross-sectional view of an image sensor according to a second embodiment. [Figure 12] FIG. 12 is a schematic partial cross-sectional view of an image sensor according to a third embodiment. [Figure 13] FIG. 13 is a schematic partial cross-sectional view of a modified example of the image sensor of the third embodiment. [Figure 14] FIG. 14 is a schematic partial cross-sectional view of another modified example of the image sensor of the third embodiment. [Figure 15] FIG. 15 is a schematic partial cross-sectional view of still another modified example of the image sensor of the third embodiment. [Figure 16] FIG. 16 is a schematic partial cross-sectional view of a portion of the image sensor of the fourth embodiment. [Figure 17] FIG. 17 is an equivalent circuit diagram of the image sensor according to the fourth embodiment. [Figure 18] FIG. 18 is an equivalent circuit diagram of the image sensor according to the fourth embodiment. [Figure 19] FIG. 19 is a schematic layout diagram of the first electrode, the transfer control electrode, and the charge storage electrode constituting the image sensor of the fourth embodiment, and the transistors constituting the control section. [Figure 20] FIG. 20 is a diagram illustrating the state of electric potential at each portion during operation of the image sensor of Example 4. In FIG. [Figure 21] FIG. 21 is a diagram illustrating the state of electric potential at each portion during another operation of the image sensor of Example 4. In FIG. [Figure 22] FIG. 22 is a schematic layout diagram of the first electrodes, the transfer control electrodes, and the charge storage electrodes that constitute the image sensor of the fourth embodiment. [Diagram 23] FIG. 23 is a schematic perspective view of a first electrode, a transfer control electrode, a charge storage electrode, a second electrode, and a contact hole portion that constitute the image sensor of Example 4. FIG. [Figure 24] FIG. 24 is a schematic layout diagram of the first electrode, the transfer control electrode, and the charge storage electrode constituting the modified image sensor of the fourth embodiment, as well as transistors constituting the control section. [Diagram 25] FIG. 25 is a schematic partial cross-sectional view of a portion of the image sensor of the fifth embodiment. [Figure 26]FIG. 26 is a schematic layout diagram of a first electrode, a charge accumulation electrode, and a charge discharging electrode that configure the image sensor of the fifth embodiment. [Figure 27] FIG. 27 is a schematic perspective view of a first electrode, a charge storage electrode, a charge discharging electrode, a second electrode, and a contact hole portion that constitute the image sensor of Example 5. FIG. [Figure 28] FIG. 28 is a schematic partial cross-sectional view of an image pickup device according to a sixth embodiment. [Figure 29] FIG. 29 is an equivalent circuit diagram of the image sensor of the sixth embodiment. [Diagram 30] FIG. 30 is an equivalent circuit diagram of the image sensor of the sixth embodiment. [Diagram 31] FIG. 31 is a schematic layout diagram of a first electrode and a charge storage electrode constituting an image sensor according to a sixth embodiment, and a transistor constituting a control unit. [Diagram 32] FIG. 32 is a diagram showing a schematic diagram of a potential state at each portion during operation of the image pickup device of Example 6. In FIG. [Diagram 33] FIG. 33 is a diagram showing a schematic diagram of a potential state at each portion during another operation (transfer) of the image sensor of Example 6. In FIG. [Diagram 34] FIG. 34 is a schematic layout diagram of the first electrodes and charge storage electrodes constituting the image sensor of Example 6. In FIG. [Diagram 35] FIG. 35 is a schematic perspective view of a first electrode, a charge storage electrode, a second electrode, and a contact hole portion that constitute the image sensor of Example 6. FIG. [Diagram 36] FIG. 36 is a schematic layout diagram of the first electrodes and the charge accumulation electrodes constituting a modified example of the image sensor of the sixth embodiment. [Figure 37] FIG. 37 is a schematic cross-sectional view of a portion of an imaging element (two imaging elements arranged side by side) of Example 7. [Figure 38] FIG. 38 is a schematic layout diagram of the first electrode and charge storage electrode constituting the image sensor of the seventh embodiment, and the transistors constituting the control unit. [Figure 39] FIG. 39 is a schematic layout diagram of the first electrodes, charge storage electrodes, and the like that constitute the image sensor of Example 7. In FIG. [Diagram 40] FIG. 40 is a schematic layout diagram of a modification of the first electrode and the charge storage electrode that configure the image sensor of the seventh embodiment. [Diagram 41] FIG. 41 is a schematic layout diagram of a modification of the first electrode and the charge storage electrode that constitute the image sensor of the seventh embodiment. [Diagram 42] 42A and 42B are schematic layout diagrams of modified examples of the first electrode and the charge storage electrode that configure the image sensor of Example 7. FIG. [Diagram 43] FIG. 43 is a schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Example 8. [Diagram 44] FIG. 44 is a schematic plan view of a portion of the imaging element (2×2 imaging elements arranged side by side) of Example 8. In FIG. [Diagram 45] FIG. 45 is a schematic plan view of a part of a modified example of the imaging element (2×2 imaging elements arranged side by side) of the eighth embodiment. [Figure 46] 46A and 46B are schematic cross-sectional views of a portion of a modified example of the imaging element (two imaging elements arranged side by side) of Example 8. FIG. [Figure 47] 47A and 47B are schematic cross-sectional views of a portion of a modified example of the imaging element (two imaging elements arranged side by side) of Example 8. FIG. [Figure 48] 48A and 48B are schematic plan views of a portion of a modified example of the image sensor of the eighth embodiment. [Figure 49] 49A and 49B are schematic plan views of a portion of a modified example of the image sensor of the eighth embodiment. [Figure 50] FIG. 50 is a schematic plan view of a first electrode and a charge storage electrode segment in a solid-state imaging device according to a ninth embodiment. [Figure 51] FIG. 51 is a schematic plan view of a first electrode and a charge storage electrode segment in a first modified example of a solid-state imaging device according to an embodiment 9. FIG. [Figure 52] FIG. 52 is a schematic plan view of a first electrode and a charge storage electrode segment in a second modified example of the solid-state imaging device of the ninth embodiment. [Diagram 53] FIG. 53 is a schematic plan view of a first electrode and a charge storage electrode segment in a third modified example of the solid-state imaging device of the ninth embodiment. [Figure 54] FIG. 54 is a schematic plan view of a first electrode and a charge storage electrode segment in a fourth modified example of the solid-state imaging device of the ninth embodiment. [Figure 55] FIG. 55 is a schematic plan view of a first electrode and a charge storage electrode segment in a fifth modified example of a solid-state imaging device according to the ninth embodiment. [Figure 56] FIG. 56 is a schematic plan view of a first electrode and a charge storage electrode segment in a sixth modified example of the solid-state imaging device of the ninth embodiment. [Figure 57] FIG. 57 is a schematic plan view of a first electrode and a charge storage electrode segment in a seventh modified example of the solid-state imaging device of the ninth embodiment. [Figure 58] 58A, 58B, and 58C are charts showing an example of readout driving in the image sensor block of the ninth embodiment. [Figure 59] FIG. 59 is a schematic plan view of a first electrode and a charge storage electrode segment in a solid-state imaging device according to a tenth embodiment. [Figure 60] FIG. 60 is a schematic plan view of a first electrode and a charge storage electrode segment in a modified example of the solid-state imaging device of the tenth embodiment. [Figure 61] FIG. 61 is a schematic plan view of a first electrode and a charge storage electrode segment in a modified example of the solid-state imaging device of the tenth embodiment. [Figure 62] FIG. 62 is a schematic plan view of a first electrode and a charge storage electrode segment in a modified example of the solid-state imaging device of the tenth embodiment. [Figure 63] FIG. 63 is a schematic partial cross-sectional view of still another modified example of the imaging element and the stack-type imaging element of the first embodiment. [Figure 64] FIG. 64 is a schematic partial cross-sectional view of still another modified example of the imaging element and the stack-type imaging element of the first embodiment. [Figure 65]FIG. 65 is a schematic partial cross-sectional view of still another modified example of the imaging element and the stack-type imaging element of the first embodiment. [Figure 66] FIG. 66 is a schematic partial cross-sectional view of another modified example of the imaging element and the stack-type imaging element of the first embodiment. [Figure 67] FIG. 67 is a schematic partial cross-sectional view of still another modified example of the image pickup element of the fourth embodiment. [Figure 68] FIG. 68 is a conceptual diagram of the solid-state imaging device of the first embodiment. [Figure 69] FIG. 69 is a conceptual diagram of an example in which a solid-state imaging device constituted by the imaging element of the present disclosure, a stacked imaging element, is used in an electronic device (camera). [Figure 70] FIG. 70 is a conceptual diagram of energy alignment according to the present disclosure. [Figure 71] Figures 71A and 71B are graphs showing the operational results of a test bottom-gate thin-film transistor in which a protective layer and an inorganic oxide semiconductor material layer were stacked in Example 1 to function as a channel formation region, and graphs showing the operational results of a comparative test bottom-gate thin-film transistor in which an inorganic oxide semiconductor material layer was used to function as a channel formation region without a protective layer. [Figure 72] FIG. 72 is a conceptual diagram of a conventional stacked type imaging element (stacked type solid-state imaging device). [Figure 73] FIG. 73 is a block diagram showing an example of a schematic configuration of a vehicle control system. [Figure 74] FIG. 74 is an explanatory diagram showing an example of the installation positions of the outside-of-vehicle information detection unit and the imaging unit. [Figure 75] FIG. 75 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. [Figure 76] FIG. 76 is a block diagram showing an example of the functional configuration of the camera head and the CCU. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Hereinafter, the present disclosure will be described based on examples with reference to the drawings, but the present disclosure is not limited to the examples, and various numerical values ​​and materials in the examples are merely examples. The description will be made in the following order. 1. General Description of the Imaging Element of the Present Disclosure, the Stacked Imaging Element of the Present Disclosure, and the Solid-State Imaging Device According to the First and Second Aspects of the Present Disclosure 2. Example 1 (Imaging element of the present disclosure, stacked imaging element of the present disclosure, and solid-state imaging device according to the second aspect of the present disclosure) 3. Example 2 (Modification of Example 1) 4. Example 3 (Modification of Examples 1 and 2, Solid-state Imaging Device According to the First Aspect of the Present Disclosure) 5. Example 4 (Modification of Examples 1 to 3, Image Sensor Having Transfer Control Electrodes) 6. Example 5 (Modification of Examples 1 to 4, Imaging device equipped with charge discharging electrode) 7. Example 6 (Modification of Examples 1 to 5, Image Sensor Having a Plurality of Charge Storage Electrode Segments) 8. Example 7 (Modification of Examples 1 to 6, Image Sensor Having Charge Transfer Control Electrode) 9. Example 8 (Modification of Example 7) 10. Example 9 (Solid-state imaging device with first and second configurations) 11. Example 10 (Modification of Example 9) 12.Other

[0016] <General Description of the Imaging Element of the Present Disclosure, the Stacked Imaging Element of the Present Disclosure, and the Solid-State Imaging Device According to the First and Second Aspects of the Present Disclosure> In the imaging element of the present disclosure, the imaging element of the present disclosure constituting the stacked imaging element of the present disclosure, and the imaging element of the present disclosure constituting the solid-state imaging device according to the first and second aspects of the present disclosure (hereinafter, these imaging elements may be collectively referred to as the "imaging element, etc. of the present disclosure"), the oxygen vacancy generation energy (energy required to generate oxygen vacancies) of the metal atoms constituting the protective layer is preferably 5 eV or more (or, in other words, 4.5 eV or more). In these cases, the oxygen vacancy generation energy of the metal atoms constituting the protective layer is set to E OD-1The oxygen vacancy generation energy of the metal atoms constituting the inorganic oxide semiconductor material layer is E OD-2 When E OD-1 -E OD-2 ≧1eV In these cases, it is preferable that the oxygen vacancy generation energy E of the metal atoms constituting the inorganic oxide semiconductor material layer is satisfied. OD-2 is preferably 3 eV or more, and more preferably 4 eV or more. When the protective layer or inorganic oxide semiconductor material layer is composed of multiple types of metal atoms, the "oxygen vacancy formation energy of metal atoms" refers to the average value of the oxygen vacancy formation energies of the multiple types of metal atoms. The higher the value of the oxygen vacancy formation energy, the more difficult it is for oxygen atoms to be detached, and the more difficult it is for oxygen atoms or oxygen molecules, other atoms or molecules to be incorporated, and the more stable it can be said to be. The oxygen vacancy formation energy can be calculated, for example, from first-principles calculations.

[0017] In the imaging element and the like of the present disclosure including the above-mentioned preferred embodiment, if the vacuum level is defined as the zero reference and the absolute value of the energy (value with a negative sign) increases as the distance from the vacuum level increases, the average energy of the LUMO value of the photoelectric conversion layer (see "A" in FIG. 70) is defined as E 0 , the average energy at the maximum energy value of the conduction band of the protective layer (see "B" in Figure 70) is E 1 When E 0 ≧E 1 Preferably, E 0 -E 1 ≧0.1(eV) More preferably, E 0 -E 1 >0.1(eV) Furthermore, it is preferable that the average energy value at the maximum energy value of the conduction band of the inorganic oxide semiconductor material layer (see "C" in FIG. 70) is E 2 When E 1 -E 2 ≧0.1(eV) It is preferable that the following is satisfied: E 1 -E 2 >0.1(eV) It is more preferable that the average energy E at the maximum energy value of the conduction band of the protective layer and the inorganic oxide semiconductor material layer is satisfied. 1 ,E 2 is the average value in the protective layer and the inorganic oxide semiconductor material layer. In addition, the average energy E 0 is the average value in the portion of the photoelectric conversion layer located near the protective layer. Here, "the portion of the photoelectric conversion layer located near the protective layer" refers to the portion of the photoelectric conversion layer located in an area equivalent to within 10% of the thickness of the photoelectric conversion layer (i.e., an area ranging from 0% to 10% of the thickness of the photoelectric conversion layer) based on the interface between the protective layer and the photoelectric conversion layer. Furthermore, "minimum energy" means that the absolute value of the energy value is the smallest, and "maximum energy" means that the absolute value of the energy value is the largest. The same applies hereinafter.

[0018] The valence band energy and HOMO value can be determined, for example, by ultraviolet photoelectron spectroscopy (UPS method). The conduction band energy and LUMO value can be calculated by the formula {(valence band energy, HOMO value) + E b Furthermore, the band gap energy E b can be calculated from the optical absorption wavelength λ (optical absorption edge wavelength, unit is nm) based on the following formula: E b =hν=h(c / λ)=1239.8 / λ[eV]

[0019] Furthermore, in the imaging device and the like of the present disclosure including the preferred embodiment described above, the protective layer is preferably made of Nb a Ti b O c(where a+b+c=1.00), and in this case, it is more preferable that 0.05≦a≦0.25 and 0.05≦b≦0.25 are satisfied. The values ​​of a, b, and c correspond to atomic percentages. The protective layer may contain metal atoms such as aluminum (Al), silver (Ag), and copper (Cu). The composition of the protective layer or the inorganic oxide semiconductor material layer can be determined, for example, based on ICP atomic emission spectroscopy (inductively coupled plasma atomic emission spectroscopy, ICP-AES) or X-ray photoelectron spectroscopy (XPS). In the process of forming the protective layer or the inorganic oxide semiconductor material layer, impurities such as hydrogen, other metals, or metal compounds may be mixed in depending on the circumstances, but a small amount (for example, 3% or less in mole fraction) does not prevent the mixing.

[0020] Furthermore, in the imaging element and the like of the present disclosure including the preferred embodiment described above, the protective layer can be configured to prevent hydrogen from penetrating into the inorganic oxide semiconductor material layer. By preventing hydrogen from penetrating into the inorganic oxide semiconductor material layer, it is possible to suppress the occurrence of oxygen vacancies due to the withdrawal of oxygen atoms in the inorganic oxide semiconductor material layer caused by hydrogen penetration, and to obtain an inorganic oxide semiconductor material layer having stable characteristics. Hydrogen that may penetrate into the inorganic oxide semiconductor material layer is present in the photoelectric conversion layer, or is present during the manufacturing process of the imaging element. The hydrogen blocking ability of the protective layer by thermal desorption spectroscopy (TDS method, Thermal Desorption Spectroscopy method) is preferably such that the hydrogen ion relative intensity ratio detected when heated to 350°C using the TDS method is 0.1 or less, with the intensity ratio when titanium is heated being 1.0. In the thermal desorption method, a sample is heated in a vacuum, the partial pressure of desorbed hydrogen is measured, and the relationship between the hydrogen desorption rate and the sample temperature can be obtained. Specifically, the sample is placed on a stage and heated by irradiating it with infrared rays from below the stage. Temperature control is performed using a thermocouple on the stage side. It is also possible to measure the temperature on the sample surface side using a thermocouple on the upper side of the sample. Gas generated by heating is positively ionized by collisions with accelerated electrons and separated according to its mass-to-charge ratio. This allows the detection of hydrogen ions.

[0021] Furthermore, in the imaging element etc. of the present disclosure including the preferred embodiments described above, the photoelectric conversion unit may further include an insulating layer and a charge storage electrode that is arranged apart from the first electrode and faces the inorganic oxide semiconductor material layer via the insulating layer.

[0022] Alternatively, the inorganic oxide semiconductor material layer may be in a form composed of at least two elements selected from the group consisting of indium (In), tungsten (W), tin (Sn) and zinc (Zn). Here, the inorganic oxide semiconductor material layer does not contain gallium atoms. Specifically, the inorganic oxide semiconductor material layer can be in the form of indium tungsten oxide (IWO), which is a material in which tungsten (W) is added to indium oxide, indium tungsten zinc oxide (IWZO), which is a material in which tungsten (W) and zinc (Zn) are added to indium oxide, indium tin zinc oxide (ITZO), which is a material in which tin (Sn) and zinc (Zn) are added to indium oxide, or zinc tin oxide (ZTO). More specifically, the inorganic oxide semiconductor material layer is made of In-W oxide, or In-Sn oxide, In-Zn oxide, or W-Sn oxide, or W-Zn oxide, or Sn-Zn oxide, or In-W-Sn oxide, or In-W-Zn oxide, or In-Sn-Zn oxide, or In-W-Sn-Zn oxide. In IWO, when the total mass of indium oxide and tungsten oxide is 100 mass%, the mass ratio of tungsten oxide is preferably 10 mass% to 30 mass%. Furthermore, in IWZO, when the total mass of indium oxide, tungsten oxide, and Zn oxide is 100 mass%, the mass ratio of tungsten oxide is preferably 2 mass% to 15 mass%, and the mass ratio of Zn oxide is preferably 1 mass% to 3 mass%. In ITZO, when the total mass of indium oxide, Zn oxide, and Sn oxide is 100 mass%, the mass ratio of tungsten oxide is preferably 3 mass% to 10 mass%, and the mass ratio of tin oxide is preferably 10 mass% to 17 mass%. However, it is not limited to these values.

[0023] Alternatively, the inorganic oxide semiconductor material layer may be in a form containing indium (In) atoms, gallium (Ga) atoms, tin (Sn) atoms, and zinc (Zn) atoms. Specifically, the inorganic oxide semiconductor material layer may be in a form containing In a Ga b Sn c Zincd O e When represented by, it can be in a form that satisfies 1.8 < (b + c) / a < 2.3, and 2.3 < d / a < 2.6, and further satisfies b > 0.

[0024] Alternatively, the metal element constituting the inorganic oxide semiconductor material can be in a form having a closed-shell d orbital. Specifically, the metal atom can be a metal atom selected from the group consisting of copper, silver, gold, zinc, gallium, germanium, indium, tin, and thallium. That is, as the metal atom having a closed-shell d orbital, specifically, it can be a configuration of a metal atom selected from the group consisting of copper (Cu), silver (Ag), gold (Au), zinc (Zn), gallium (Ga), germanium (Ge), indium (In), tin (Sn), thallium (Tl), cadmium (Cd), mercury (Hg), and lead (Pb). Preferably, it can be a configuration of a metal atom selected from the group consisting of copper (Cu), silver (Ag), gold (Au), zinc (Zn), gallium (Ga), germanium (Ge), indium (In), tin (Sn), and thallium (Tl). More preferably, the metal atom does not contain indium (In). Even more preferably, the metal atom can be a configuration of a metal atom selected from the group consisting of copper (Cu), silver (Ag), zinc (Zn), gallium (Ga), germanium (Ge), and tin (Sn). Here, more preferably, as the combination of metal atoms, (In, Ga), (In, Zn), (In, Sn), (Ga, Sn), (Ga, Zn), (Zn, Sn), (Cu, Zn), (Cu, Ga), (Cu, Sn), (Ag, Zn), (Ag, Ga), (Ag, Sn) can be mentioned.

[0025] Alternatively, the inorganic oxide semiconductor material layer can be in a form containing indium (In) atoms, gallium (Ga) atoms, and tin (Sn) atoms. Here, the inorganic oxide semiconductor material layer is In a Ga b Sn c O dWhen expressed as above, it is preferable that a>b and a>c are satisfied, it is even more preferable that a>b>c or a>c>b are satisfied, and it is even more preferable that a>b>c is satisfied. a+b+c+d=1.00 0.4 0.3 0.2 <c / (a+b+c)<0.3 or alternatively, a+b+c+d=1.00 0.30 0.20 0.25 <c / (a+b+c)<0.45 It is preferable to satisfy the following:

[0026] Alternatively, the inorganic oxide semiconductor material layer may be in a form containing gallium (Ga) atoms and tin (Sn) atoms, where the inorganic oxide semiconductor material layer is Ga a Sn b O c It is preferable that a>b is satisfied. Specifically, a+b+c=1.00 and, 0.20 Alternatively, the inorganic oxide semiconductor material layer may be in a form containing gallium (Ga) atoms and indium (In) atoms, and the inorganic oxide semiconductor material layer may be in a form containing Ga atoms and In atoms. d In e O f It is preferable that d>e is satisfied. Specifically, d+e+f=1.00 and, 0.20 <e / (d+e)<0.40 It is preferable to satisfy the following:

[0027] ​​​​​Alternatively, the inorganic oxide semiconductor material layer contains zinc (Zn) atoms and tin (Sn) atoms, and Zn a Sn b O c When expressed as a+b+c=1.00 b>a and preferably satisfies b>a>0.18. The inorganic oxide semiconductor material layer preferably further contains a 5d transition metal. The inorganic oxide semiconductor material layer further contains tungsten atoms and Zn a Sn b M d O c (wherein M represents a tungsten atom), a+b+c+d=1.00 0.0005 <d<0.065 Alternatively, the inorganic oxide semiconductor material layer further contains tantalum atoms or hafnium atoms, and Zn a Sn b M d O c (wherein M represents a tantalum atom or a hafnium atom), a+b+c+d=1.00 0.0005 <d<0.065 It is preferable to satisfy the following:

[0028] Alternatively, the inorganic oxide semiconductor material layer may be In a Ga b Sn c O d It consists of 0.30≦b / (a+b+c)≦0.50 And, b ≥ c Alternatively, 0.40≦b / (a+b+c)≦0.50 Alternatively, b ≥ 1.2c It is possible to make the above configuration satisfy the above.

[0029] Alternatively, the inorganic oxide semiconductor material layer may be in a form containing indium (In) atoms, tin (Sn) atoms, titanium (Ti) atoms, and zinc (Zn) atoms, and the composition of the inorganic oxide semiconductor material layer may be In a Sn b Ti c Zinc d O e When a+b+c+d=1.00, b>d>c>0.09 It is preferable to satisfy the following: a+b+c+d=1.00. a<(b+c+d)≦0.6 Alternatively, the composition of the inorganic oxide semiconductor material layer is preferably In a Sn b M f Zinc d O e When a+b+f+d=1.00, b>d>f>0.09 Here, M is any one of aluminum, hafnium, and zirconium. Alternatively, the composition of the inorganic oxide semiconductor material layer may be In a Sn b Ti c Zinc d O e When a+b+c+d=1.00, a<(b+c+d)≦0.6 It is desirable to satisfy the following. 0.4≦a<(b+d)≦0.5 Alternatively, the composition of the inorganic oxide semiconductor material layer is preferably In. a Sn b M f Zinc d O e When a+b+f+d=1.00, a<(b+f+d)≦0.6 It is desirable to satisfy the following. 0.4≦a<(b+d)≦0.5 It is desirable to satisfy the following: M is any one of aluminum, hafnium, and zirconium, as described above.

[0030] Alternatively, examples of inorganic oxide semiconductor materials constituting the inorganic oxide semiconductor material layer (hereinafter, sometimes referred to as "inorganic oxide semiconductor material layer constituent materials") include indium oxide, gallium oxide, zinc oxide, tin oxide, materials containing at least one of these oxides, and materials in which dopants are added to these materials, specifically, for example, IGZO (indium-gallium-zinc oxide in which indium and gallium are added as dopants to zinc oxide), ITZO, IWZO, IWO, ZTO, and ITO-SiO X (indium tin oxide mixed or doped with silicon oxide), GZO (gallium zinc oxide with gallium added as a dopant to zinc oxide), IGO (indium gallium oxide with indium added as a dopant to gallium oxide), ZnSnO 3 , AlZnO, GaZnO, InZnO, and also CuI, InSbO 4 , ZnMgO, CuInO 2 , MgIn 2 O 4 Examples of the material for constituting the inorganic oxide semiconductor material layer include, but are not limited to, materials having an ionization potential greater than that of the material for constituting the photoelectric conversion layer when the charges to be stored are electrons, and materials having an electron affinity smaller than that of the material for constituting the photoelectric conversion layer when the charges to be stored are holes. Alternatively, the impurity concentration in the material for constituting the inorganic oxide semiconductor material layer is 1×10 18 cm -3 It is preferable that:

[0031] Alternatively, the inorganic oxide semiconductor material layer is made of a composite oxide composed of titanium oxide and zinc oxide. However, the present invention is not limited thereto, and titanium oxide can be replaced with aluminum oxide, hafnium oxide, or zirconium oxide. That is, the inorganic oxide semiconductor material layer can be in a form containing indium (In) atoms, tin (Sn) atoms, aluminum (Al) and zinc (Zn) atoms, indium (In) atoms, tin (Sn) atoms, hafnium (Hf) and zinc (Zn) atoms, indium (In) atoms, tin (Sn) atoms, zirconium (Zr) and zinc (Zn) atoms, or alternatively, the inorganic oxide semiconductor material layer can contain indium (In) atoms, tin (Sn) atoms, metal atoms and zinc (Zn) atoms, and the metal atoms can be at least one type of atom selected from the group consisting of titanium, aluminum, hafnium and zirconium.

[0032] Furthermore, in the imaging element etc. of the present disclosure including the preferred embodiment described above, the charges generated in the photoelectric conversion layer can be configured to move to the first electrode via the protective layer and the inorganic oxide semiconductor material layer, and in this case, the charges can be configured to be electrons.

[0033] Furthermore, in the imaging device and the like of the present disclosure including the various preferred embodiments described above, the carrier mobility of the inorganic oxide semiconductor material layer constituent material is 10 cm 2 / V·s or more, which allows the charge stored in the inorganic oxide semiconductor material layer to be rapidly transferred to the first electrode. In addition, the carrier concentration (carrier density) of the inorganic oxide semiconductor material layer is preferably 1×10 16 / cm 3 This makes it possible to increase the amount of charge stored in the inorganic oxide semiconductor material layer.

[0034] Furthermore, in the imaging element and the like of the present disclosure including the various preferred embodiments described above, Light is incident on the second electrode, The surface roughness Ra of the inorganic oxide semiconductor material layer surface at the interface between the protective layer and the inorganic oxide semiconductor material layer is preferably 1.5 nm or less, and the root mean square roughness Rq value of the inorganic oxide semiconductor material layer surface is preferably 2.5 nm or less. The surface roughness Ra and Rq are based on the provisions of JIS B0601:2013. Such smoothness of the inorganic oxide semiconductor material layer surface at the interface between the protective layer and the inorganic oxide semiconductor material layer can suppress scattered reflection on the inorganic oxide semiconductor material layer surface and improve the light current characteristics in photoelectric conversion. The surface roughness Ra of the charge storage electrode surface is preferably 1.5 nm or less, and the root mean square roughness Rq value of the charge storage electrode surface is preferably 2.5 nm or less.

[0035] Furthermore, in the imaging element and the like of the present disclosure including the various preferred embodiments described above, the inorganic oxide semiconductor material layer can be amorphous (for example, amorphous with no local crystal structure). Whether the inorganic oxide semiconductor material layer is amorphous can be determined based on X-ray diffraction analysis. However, the inorganic oxide semiconductor material layer is not limited to being amorphous, and may have a crystalline structure or a polycrystalline structure.

[0036] Furthermore, in the imaging device and the like of the present disclosure including the various preferred embodiments described above, the thickness of the inorganic oxide semiconductor material layer is 1×10 -8 m to 1.5×10 -7 m, preferably 2 x 10 -8 m to 1.0×10 -7 m, more preferably 3×10 -8 m to 1.0×10 -7 It is preferable that m.

[0037] The first electrode, the second electrode, the charge storage electrode, and the photoelectric conversion layer will be described in detail later.

[0038] In the conventional imaging element shown in FIG. 72, the charges generated by photoelectric conversion in the second photoelectric conversion unit 341A and the third photoelectric conversion unit 343A are temporarily stored in the second photoelectric conversion unit 341A and the third photoelectric conversion unit 343A, and then are transferred to the second floating diffusion layer FD 2 and the third floating diffusion layer FD 3 Therefore, the second photoelectric conversion section 341A and the third photoelectric conversion section 343A can be completely depleted. However, the charges generated by photoelectric conversion in the first photoelectric conversion section 310A are directly transferred to the first floating diffusion layer FD 1 Therefore, it is difficult to completely deplete the first photoelectric conversion section 310A. As a result, kTC noise increases, random noise deteriorates, and there is a risk of causing a deterioration in image quality.

[0039] In the imaging element and the like of the present disclosure, as described above, if the charge storage electrode is disposed apart from the first electrode and opposed to the inorganic oxide semiconductor material layer via an insulating layer, when light is irradiated to the photoelectric conversion section and photoelectric conversion is performed in the photoelectric conversion section, charges can be stored in the inorganic oxide semiconductor material layer (in some cases, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer). Therefore, at the start of exposure, it is possible to completely deplete the charge storage section and erase the charges. As a result, it is possible to suppress the occurrence of phenomena such as increased kTC noise, worsening random noise, and reduced image quality. In the following description, the inorganic oxide semiconductor material layer, or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer may be collectively referred to as "inorganic oxide semiconductor material layer, etc."

[0040] The inorganic oxide semiconductor material layer may be a single layer or a multilayer structure. The inorganic oxide semiconductor material layer constituting the inorganic oxide semiconductor material layer located above the charge storage electrode may be made of different materials from the inorganic oxide semiconductor material layer constituting the inorganic oxide semiconductor material layer located above the first electrode. The protective layer may also be a single layer or a multilayer structure.

[0041] The protective layer and the inorganic oxide semiconductor material layer can be formed, for example, by a physical vapor deposition method (PVD method), specifically, a sputtering method. More specifically, a sputtering method using, for example, a parallel plate sputtering device, a DC magnetron sputtering device, or an RF sputtering device, argon (Ar) gas as a process gas, and a desired sintered body as a target can be exemplified. Alternatively, an atomic layer deposition method (ALD method) can be exemplified as a method for forming the protective layer. However, the film formation methods are not limited to these.

[0042] When the inorganic oxide semiconductor layer is formed by sputtering, the energy level of the inorganic oxide semiconductor layer can be controlled by controlling the amount of oxygen gas introduced (oxygen gas partial pressure). Oxygen gas partial pressure = (O 2 Gas pressure) / (Ar gas and O 2 total gas pressure) It is possible to control the oxygen gas partial pressure based on the oxygen content. The oxygen gas partial pressure is preferably 0.005 to 0.10. Furthermore, in the imaging element and the like of the present disclosure, the oxygen content in the inorganic oxide semiconductor material layer can be made lower than the oxygen content of the stoichiometric composition. Here, the energy level of the inorganic oxide semiconductor material layer can be controlled based on the oxygen content, and the lower the oxygen content is compared to the oxygen content of the stoichiometric composition, i.e., the more oxygen vacancies there are, the deeper the energy level becomes.

[0043] Examples of the imaging element and the like of the present disclosure include a CCD element, a CMOS image sensor, a CIS (Contact Image Sensor), and a CMD (Charge Modulation Device) type signal amplification type image sensor. For example, a digital still camera, a video camera, a camcorder, a surveillance camera, a vehicle-mounted camera, a smartphone camera, a user interface camera for games, and a biometric authentication camera can be configured from the solid-state imaging devices according to the first and second aspects of the present disclosure and the solid-state imaging devices having the first and second configurations described below. EXAMPLES

[0044] Example 1 relates to an imaging element of the present disclosure, a stacked imaging element of the present disclosure, and a solid-state imaging device according to a second aspect of the present disclosure. FIG. 1 shows a schematic partial cross-sectional view of the imaging element and stacked imaging element (hereinafter simply referred to as "imaging element") of Example 1, FIG. 2 and FIG. 3 show equivalent circuit diagrams of the imaging element of Example 1, FIG. 4 shows a schematic layout diagram of the first electrode and charge storage electrode constituting the photoelectric conversion unit of the imaging element of Example 1 and the transistor constituting the control unit, FIG. 5 shows a schematic electric potential state at each part during operation of the imaging element of Example 1, and FIG. 6A shows an equivalent circuit diagram for explaining each part of the imaging element of Example 1. FIG. 7 shows a schematic layout diagram of the first electrode and charge storage electrode constituting the photoelectric conversion unit of the imaging element of Example 1, and FIG. 8 shows a schematic perspective view of the first electrode, charge storage electrode, second electrode, and contact hole part. Furthermore, FIG. 68 shows a conceptual diagram of the solid-state imaging device of Example 1.

[0045] The imaging element of Example 1 includes a photoelectric conversion section formed by stacking a first electrode 21, a photoelectric conversion layer 23A, and a second electrode 22. A protective layer 23B made of an inorganic oxide and an inorganic oxide semiconductor material layer 23C are formed from the photoelectric conversion section side directly below the photoelectric conversion layer 23A. The inorganic oxide semiconductor material layer 23C is in contact with the first electrode 21, the inorganic oxide semiconductor material layer 23C is in contact with the protective layer 23B, and the protective layer 23B is in contact with the photoelectric conversion layer 23A.

[0046] The stacked imaging element of the embodiment 1 includes at least one imaging element of the embodiment 1. The solid-state imaging device of the embodiment 1 includes a plurality of stacked imaging elements of the embodiment 1. The solid-state imaging device of the embodiment 1 is used to configure, for example, a digital still camera, a video camera, a camcorder, a surveillance camera, a vehicle-mounted camera (vehicle-mounted camera), a camera for a smartphone, a user interface camera for games, a camera for biometric authentication, and the like.

[0047] In the image sensor of the first embodiment, the oxygen vacancy generation energy of the metal atoms constituting the protective layer 23B is 5 eV or more. In this case, the oxygen vacancy generation energy of the metal atoms constituting the protective layer 23B is E OD-1 The oxygen vacancy generation energy of the metal atoms constituting the inorganic oxide semiconductor material layer 23C is E OD-2 When E OD-1 -E OD-2 ≧1eV Furthermore, the oxygen vacancy generation energy of the metal atoms constituting the inorganic oxide semiconductor material layer 23C is 3 eV or more. In addition, the average energy of the LUMO value of the portion of the photoelectric conversion layer 23A facing the protective layer 23B is E 0 The average energy at the maximum energy value of the conduction band of the protective layer 23B and the inorganic oxide semiconductor material layer 23C is E 1 ,E 2 When E 0 ≧E 1 Preferably, E 0 -E 1 ≧0.1(eV) More preferably, E 0 -E 1 >0.1(eV) Satisfying E 1 -E 2 ≧0.1(eV) Satisfying the above and moreover, E 1 -E 2 >0.1(eV) Satisfy.

[0048] The protective layer 23B is made of Nb a Ti b O c (where a+b+c=1.00), in which case 0.05≦a≦0.25 and 0.05≦b≦0.25 are satisfied. In Example 1, three types of protective layers 23B were evaluated. That is, in the protective layers 23B of Examples 1A, 1B, and 1C, the values ​​of a, b, and c were specifically as shown in Table 1 below.

[0049] abc Example 1A 0.20 0.06 0.74 Example 1B 0.21 0.07 0.72 Example 1C 0.12 0.18 0.70

[0050] The protective layer 23B prevents hydrogen from penetrating into the inorganic oxide semiconductor material layer 23C. In this case, the hydrogen blocking ability of the protective layer 23B based on the thermal desorption method was as shown in Table 2 below. In the test based on the thermal desorption method, a titanium layer was formed as an underlayer on a silicon semiconductor substrate, and a protective layer 23B having a thickness of 30 nm was formed on the titanium layer. The ion current value was obtained while the sample was heated. In Comparative Example 1, the protective layer 23B was not provided, and only a titanium layer was formed as an underlayer on a silicon semiconductor substrate.

[0051] Example 1A Example 1B Example 1C Comparative Example 1 200°C heating 1.038 1.019 1.058 1.000 350°C heating 0.040 0.033 0.044 1.000

[0052] It is confirmed from Table 2 that when heated to 350°C, the intensity of detected hydrogen atoms is suppressed by at least one order of magnitude compared to the case where there is no protective layer (Comparative Example 1). In other words, it is found that the protective layer can suppress the penetration of hydrogen, which easily penetrates during the manufacturing or processing of the image sensor.

[0053] The thickness of the inorganic oxide semiconductor material layer 23C is 1×10 -8 m to 1.5×10 -7 m. In Example 1, the inorganic oxide semiconductor material layer 23C is made of IGZO with a thickness of 50 nm. The photoelectric conversion layer 23A is made of C60 with a thickness of 0.1 μm. The protective layer 23B has a thickness of 3 nm. The charge generated in the photoelectric conversion layer 23A moves to the first electrode 21 via the protective layer 23B and the inorganic oxide semiconductor material layer 23C, and in this case, the charge is an electron.

[0054] The oxygen vacancy formation energy of the metal atoms constituting the protective layer 23B is 5 eV or more, and the oxygen vacancy formation energy of the metal atoms constituting the inorganic oxide semiconductor material layer 23C is 3 eV or more. Specifically, E OD-1 =5.5 eV (energy of oxygen vacancy formation in niobium atoms) E OD-2 =3.1 eV (energy of oxygen vacancy formation in gallium atoms) and E OD-1 -E OD-2 ≧1eV Also, E 0 =-4.3eV(C60) E 2 =-4.7eV(IGZO) And, Example 1A E 1 =-4.4eV Example 1B E 1 =-4.3eV Example 1C E 1 =-4.4eV The average energy at the minimum energy value of the valence band of the protective layer is E 1 ', Example 1A E 1 '=-7.7eV Example 1B E 1 '=-7.6eV Example 1C E 1 '=-7.8eV It is.

[0055] In addition, the carrier mobility of the inorganic oxide semiconductor layer constituent material is 10 cm 2 / V·s or more, and the carrier concentration of the inorganic oxide semiconductor material layer 23C is 1×10 16 / cm 3 and the inorganic oxide semiconductor material layer 23C is amorphous. Specific examples of these values ​​are shown in Table 3 below.

[0056] Table 3: Inorganic oxide semiconductor layer constituent materials (IGZO) Mobility: 1×10cm 2 / V s Carrier concentration 1×10 16 / cm 3

[0057] The photoelectric conversion section further includes an insulating layer 82 and a charge storage electrode 24 that is disposed apart from the first electrode 21 and faces the inorganic oxide semiconductor material layer 23C via the insulating layer 82. Specifically, the inorganic oxide semiconductor material layer 23C has a region in contact with the first electrode 21, a region in contact with the insulating layer 82 below which the charge storage electrode 24 is not present, and a region in contact with the insulating layer 82 below which the charge storage electrode 24 is present. Light is incident from the second electrode 22, and the surface roughness Ra of the inorganic oxide semiconductor material layer 23C at the interface between the protective layer 23B and the inorganic oxide semiconductor material layer 23C is 1.5 nm or less, specifically 0.65 nm, and the value of the root mean square roughness Rq of the surface of the inorganic oxide semiconductor material layer 23C is 2.5 nm or less, specifically 1.3 nm. The surface roughness Ra of the surface of the charge-storage electrode 24 is 1.5 nm or less, specifically 0.45 nm, and the root-mean-square roughness Rq of the surface of the charge-storage electrode 24 is 2.5 nm or less, specifically 1.5 nm.

[0058] In addition, by controlling the amount of oxygen gas introduced (oxygen gas partial pressure) when forming the inorganic oxide semiconductor material layer 23C based on a sputtering method, it is possible to control the energy level of the inorganic oxide semiconductor material layer 23C. The oxygen gas partial pressure is preferably set to 0.005 (0.5%) to 0.10 (10%).

[0059] The energy level structure of the photoelectric conversion unit in the image sensor of Example 1 is shown in the conceptual diagram of Figure 70. Inorganic oxide semiconductor material layer 23C, protective layer 23B, and photoelectric conversion layer 23A are laminated in this order from the first electrode side. Here, the average energy E 0 Therefore, the average energy at the maximum energy value of the conduction band of the protective layer 23B is set to E 1 is formed deeper, and the average energy value at the minimum energy value of the valence band of the protective layer 23B is formed deeper than the average energy value at the HOMO value of the photoelectric conversion layer 23A. As a result, electrons generated during photoelectric conversion are transferred without barriers, and the escape of holes is also suppressed.

[0060] In addition, in Example 1, a protective layer (Example 1B) is formed on the inorganic oxide semiconductor material layer, and these two layers function as a channel formation region. The characteristic evaluation result of the bottom gate thin film transistor is shown in FIG. 71A, and the characteristic evaluation result of the bottom gate thin film transistor in which the inorganic oxide semiconductor material layer functions as a channel formation region without the protective layer is shown in FIG. 71B. This is related to the results of the TDS method, but the provision of a protective layer can suppress hydrogen penetration, suppressing the extraction of oxygen atoms in the inorganic oxide semiconductor material layer 23C, and allowing the TFT to operate normally. In other words, the behavior of the inorganic oxide semiconductor material layer 23C is stabilized, and as a result, an imaging element with stable characteristics can be obtained.

[0061] As described above, in the imaging element of Example 1, by providing a protective layer between the photoelectric conversion layer and the inorganic oxide semiconductor material layer, it is possible to effectively prevent hydrogen from penetrating into the inorganic oxide semiconductor material layer, and as a result, it is possible to suppress the occurrence of oxygen vacancies due to the extraction of oxygen atoms in the inorganic oxide semiconductor material layer caused by the penetration of hydrogen, and it is possible to obtain an inorganic oxide semiconductor material layer with stable characteristics and an imaging element with stable characteristics. In addition, by specifying the oxygen vacancy generation energy (energy required to generate oxygen vacancies) of the metal atoms constituting the protective layer, it becomes difficult for oxygen atoms to be released and difficult for oxygen atoms or oxygen molecules, other atoms or molecules to be incorporated, and it is possible to more reliably suppress the occurrence of oxygen vacancies due to the extraction of oxygen atoms in the inorganic oxide semiconductor material layer. Furthermore, the average energy E 0 and the average energy E at the maximum energy value of the conduction band of the protective layer 1 By defining the relationship between the above, the energy barrier between adjacent photoelectric conversion layers is reduced, and reliable charge transfer from the photoelectric conversion layer to the inorganic oxide semiconductor material layer via the protective layer can be achieved. Furthermore, the carrier concentration of the inorganic oxide semiconductor material layer is optimized (the degree of depletion of the inorganic oxide semiconductor material layer is optimized), high carrier mobility is achieved in the inorganic oxide semiconductor material layer constituent material, and the average energy E at the maximum energy value of the conduction band of the inorganic oxide semiconductor material layer is optimized. 2 As a result of being able to achieve a well-balanced control of the charge transfer characteristic and the suppression of oxygen vacancies in the inorganic oxide semiconductor material layer, it is possible to provide an imaging element, a stacked imaging element, and a solid-state imaging device that, despite their simple configuration and structure, are excellent in the transfer characteristic of the charge stored in the photoelectric conversion layer. In addition, because the photoelectric conversion section has a stacked structure of the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer, it is possible to prevent recombination during charge accumulation, and to further increase the charge transfer efficiency of the charge stored in the photoelectric conversion layer to the first electrode. Furthermore, it is possible to temporarily hold the charge generated in the photoelectric conversion layer, control the timing of transfer, and suppress the generation of dark current.

[0062] Below, the imaging element of the present disclosure, the stacked imaging element of the present disclosure, and the solid-state imaging device according to the second aspect of the present disclosure will be generally described, and then the imaging element and the solid-state imaging device of Example 1 will be described in detail. In the following, a case where the potential applied to the first electrode is higher than the potential applied to the second electrode will be described. The symbols representing the potentials applied to various electrodes in the following description are shown in Table 4 below.

[0063] Charge accumulation period Charge transfer period 1st electrode V 11 V 12 2nd electrode V 21 V 22 Charge storage electrode V 31 V 32 Charge transfer control electrode V 41 V 42 Transfer control electrode V 51 V 52 Charge discharge electrode V 61 V 62

[0064] An imaging element, etc. according to the present disclosure including the preferred embodiments described above and equipped with a charge storage electrode may be referred to hereinafter, for convenience, as an "imaging element, etc. equipped with a charge storage electrode according to the present disclosure."

[0065] In the imaging element and the like of the present disclosure, the inorganic oxide semiconductor material layer preferably has a light transmittance of 65% or more for light having a wavelength of 400 nm to 660 nm. The charge storage electrode preferably has a light transmittance of 65% or more for light having a wavelength of 400 nm to 660 nm. The sheet resistance of the charge storage electrode is preferably 3×10 Ω / □ to 1×10 3 It is preferably Ω / □.

[0066] The imaging element and the like of the present disclosure may further include a semiconductor substrate, and the photoelectric conversion unit may be disposed above the semiconductor substrate. The first electrode, the charge storage electrode, the second electrode, and the various electrodes are connected to a drive circuit, which will be described later.

[0067] The second electrode located on the light incidence side may be common to a plurality of imaging elements. That is, except for imaging elements having an upper charge transfer control electrode of the present disclosure described later, the second electrode may be a so-called solid electrode. The photoelectric conversion layer may be common to a plurality of imaging elements, that is, one photoelectric conversion layer may be formed in a plurality of imaging elements, or may be provided for each imaging element. The inorganic oxide semiconductor material layer and the protective layer are preferably provided for each imaging element, but may be common to a plurality of imaging elements in some cases. That is, for example, one inorganic oxide semiconductor material layer and protective layer may be formed in a plurality of imaging elements by providing a charge transfer control electrode described later between the imaging elements. When one inorganic oxide semiconductor material layer and protective layer common to a plurality of imaging elements is formed, it is desirable that the ends of the inorganic oxide semiconductor material layer and the protective layer are at least covered with the photoelectric conversion layer from the viewpoint of protecting the ends of the inorganic oxide semiconductor material layer and the protective layer.

[0068] Furthermore, in the imaging element and the like of the present disclosure including the various preferred embodiments described above, the first electrode may extend inside an opening provided in the insulating layer and be connected to the inorganic oxide semiconductor material layer. Alternatively, the inorganic oxide semiconductor material layer and the protective layer may extend inside an opening provided in the insulating layer, and the inorganic oxide semiconductor material layer may be connected to the first electrode, in which case: The edge of the top surface of the first electrode is covered with an insulating layer, The first electrode is exposed at the bottom of the opening. When the surface of the insulating layer in contact with the top surface of the first electrode is defined as the first surface, and the surface of the insulating layer in contact with the portion of the inorganic oxide semiconductor material layer facing the charge storage electrode is defined as the second surface, the side of the opening can be configured to have a slope spreading from the first surface toward the second surface, and further, the side of the opening having a slope spreading from the first surface toward the second surface can be configured to be located on the charge storage electrode side.

[0069] Furthermore, in the imaging element and the like of the present disclosure including the various preferred embodiments described above, The semiconductor substrate further includes a control unit having a drive circuit. The first electrode and the charge storage electrode are connected to a drive circuit, During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied, charges are accumulated in the inorganic oxide semiconductor material layer, etc., During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied, and the charge stored in the inorganic oxide semiconductor material layer or the like is read out to the control unit via the first electrode. However, the potential of the first electrode is higher than the potential of the second electrode, V 31 ≧V 11 , and V 32 <V 12 It is.

[0070] Furthermore, in the imaging element etc. of the present disclosure including the various preferred embodiments described above, a charge transfer control electrode may be formed in a region facing the region of the photoelectric conversion layer located between adjacent imaging elements via an insulating layer. For convenience, such a form may be called "an imaging element etc. having a lower charge transfer control electrode of the present disclosure". Alternatively, a charge transfer control electrode may be formed on the region of the photoelectric conversion layer located between adjacent imaging elements instead of forming a second electrode. For convenience, such a form may be called "an imaging element etc. having an upper charge transfer control electrode of the present disclosure".

[0071] In the following description, the "area of ​​the photoelectric conversion layer located between adjacent imaging elements" is referred to as "area-A of the photoelectric conversion layer" for convenience, and the "area of ​​the insulating layer located between adjacent imaging elements" is referred to as "area-A of the insulating layer" for convenience. Area-A of the photoelectric conversion layer corresponds to area-A of the insulating layer. Furthermore, the "area between adjacent imaging elements" is referred to as "area-a" for convenience.

[0072] In an imaging element or the like including the lower charge transfer control electrode (lower charge transfer control electrode, charge transfer control electrode located on the opposite side to the light incident side with respect to the photoelectric conversion layer) of the present disclosure, the lower charge transfer control electrode is formed in a region facing the region-A of the photoelectric conversion layer via an insulating layer. In other words, the lower charge transfer control electrode is formed under a portion of the insulating layer (region-A of the insulating layer) in a region (region-a) sandwiched between the charge storage electrodes constituting each of the adjacent imaging elements. The lower charge transfer control electrode is provided at a distance from the charge storage electrode. In other words, the lower charge transfer control electrode is provided at a distance from the charge storage electrode surrounding the charge storage electrode, and the lower charge transfer control electrode is disposed facing the region-A of the photoelectric conversion layer via an insulating layer.

[0073] The imaging element or the like including the lower charge transfer control electrode of the present disclosure further includes a control unit provided on the semiconductor substrate and having a drive circuit, the first electrode, the second electrode, the charge storage electrode and the lower charge transfer control electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied to the lower charge transfer control electrode, and a potential V 41 is applied, charges are accumulated in the inorganic oxide semiconductor material layer, etc., During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied to the lower charge transfer control electrode, and a potential V 42 is applied, and the charge stored in the inorganic oxide semiconductor material layer or the like is read out to the control unit via the first electrode. V 31 ≧V 11 , V 31 >V 41 , and V 12 >V 32 >V 42 The lower charge transfer control electrode may be formed at the same level as the first electrode or the charge storage electrode, or may be formed at a different level.

[0074] In an imaging element or the like including an upper charge transfer control electrode (an upper charge transfer control electrode, which is a charge transfer control electrode located on the light incident side with respect to the photoelectric conversion layer) of the present disclosure, instead of a second electrode being formed on the region of the photoelectric conversion layer located between adjacent imaging elements, the upper charge transfer control electrode is formed, but the upper charge transfer control electrode is provided at a distance from the second electrode. In other words, [A] The second electrode is provided for each image sensor, and the upper charge transfer control electrode surrounds at least a part of the second electrode, is spaced apart from the second electrode, and is provided on the region-A of the photoelectric conversion layer. Alternatively, [B] The second electrode is provided for each image sensor, the upper charge transfer control electrode is provided to surround at least a part of the second electrode and spaced apart from the second electrode, and a part of the charge storage electrode is present below the upper charge transfer control electrode. Alternatively, [C] The second electrode is provided for each imaging element, the upper charge transfer control electrode is provided surrounding at least a part of the second electrode and spaced apart from the second electrode, a part of the charge storage electrode is present below the upper charge transfer control electrode, and a lower charge transfer control electrode is formed below the upper charge transfer control electrode. An electric potential generated by coupling between the upper charge transfer control electrode and the second electrode may be applied to the region of the photoelectric conversion layer located below the region between the upper charge transfer control electrode and the second electrode.

[0075] In addition, an imaging element or the like including the upper charge transfer control electrode of the present disclosure further includes a control unit provided on the semiconductor substrate and having a drive circuit, the first electrode, the second electrode, the charge storage electrode and the upper charge transfer control electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 21 is applied to the upper charge transfer control electrode, and a potential V 41 is applied, charges are accumulated in the inorganic oxide semiconductor material layer, etc., During the charge transfer period, the drive circuit applies a potential V 22 is applied to the upper charge transfer control electrode, and a potential V 42 is applied, and the charge stored in the inorganic oxide semiconductor material layer or the like is read out to the control unit via the first electrode. V 21 ≧V 41 , and V 22 ≧V 42 The upper charge transfer control electrode is formed at the same level as the second electrode.

[0076] Furthermore, the imaging element etc. of the present disclosure, including the various preferred embodiments described above, may further include a transfer control electrode (charge transfer electrode) disposed between the first electrode and the charge storage electrode, spaced apart from the first electrode and the charge storage electrode, and facing the inorganic oxide semiconductor material layer via an insulating layer. For convenience, the imaging element etc. of the present disclosure having such a configuration is referred to as "the imaging element etc. having the transfer control electrode of the present disclosure."

[0077] In the image sensor or the like including the transfer control electrode of the present disclosure, The semiconductor substrate further includes a control unit having a drive circuit. the first electrode, the charge storage electrode, and the transfer control electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied to the transfer control electrode, and a potential V 51 is applied, charges are accumulated in the inorganic oxide semiconductor material layer, etc., During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied to the transfer control electrode, and a potential V 52 The electric charge stored in the inorganic oxide semiconductor material layer or the like is read out to the control unit via the first electrode. However, the electric potential of the first electrode is higher than the electric potential of the second electrode. V 31 >V 51 , and V 32 ≦V 52 ≦V 12 It is.

[0078] Furthermore, the imaging element etc. of the present disclosure, including the various preferred embodiments described above, may further include a charge discharge electrode connected to the inorganic oxide semiconductor material layer and arranged at a distance from the first electrode and the charge storage electrode. For convenience, the imaging element etc. of the present disclosure having such a configuration is referred to as "an imaging element etc. having a charge discharge electrode of the present disclosure." In the imaging element etc. having the charge discharge electrode of the present disclosure, the charge discharge electrode may be arranged so as to surround the first electrode and the charge storage electrode (i.e., in a frame shape). The charge discharge electrode may be shared (common) among a plurality of imaging elements. In this case, the inorganic oxide semiconductor material layer or the like extends through a second opening provided in the insulating layer and is connected to the charge discharging electrode; The edge of the top surface of the charge discharging electrode is covered with an insulating layer, A charge discharge electrode is exposed on the bottom surface of the second opening, When the surface of the insulating layer in contact with the top surface of the charge discharging electrode is defined as the third surface, and the surface of the insulating layer in contact with the part of the inorganic oxide semiconductor material layer facing the charge storage electrode is defined as the second surface, the side surface of the second opening can have a slope that widens from the third surface toward the second surface.

[0079] Furthermore, in an image sensor or the like having the charge discharging electrode of the present disclosure, The semiconductor substrate further includes a control unit having a drive circuit. the first electrode, the charge storage electrode, and the charge discharging electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied to the charge discharge electrode, and a potential V 61 is applied, charges are accumulated in the inorganic oxide semiconductor material layer, etc., During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied to the charge discharging electrode, and a potential V 62The electric charge stored in the inorganic oxide semiconductor material layer or the like is read out to the control unit via the first electrode. However, the electric potential of the first electrode is higher than the electric potential of the second electrode. V 61 >V 11 , and V 62 <V 12 It is.

[0080] Furthermore, in the various preferred embodiments of the imaging element etc. of the present disclosure described above, the charge storage electrode may be configured to be composed of a plurality of charge storage electrode segments. For convenience, such an embodiment of the imaging element etc. of the present disclosure will be referred to as "an imaging element etc. equipped with a plurality of charge storage electrode segments of the present disclosure." The number of charge storage electrode segments may be two or more. In the imaging element etc. equipped with a plurality of charge storage electrode segments of the present disclosure, when a different potential is applied to each of the N charge storage electrode segments, When the potential of the first electrode is higher than the potential of the second electrode, during the charge transfer period, the potential applied to the charge storage electrode segment (the first photoelectric conversion unit segment) located closest to the first electrode is higher than the potential applied to the charge storage electrode segment (the Nth photoelectric conversion unit segment) located farthest from the first electrode, When the potential of the first electrode is lower than the potential of the second electrode, during the charge transfer period, the potential applied to the charge storage electrode segment (the first photoelectric conversion unit segment) located closest to the first electrode can be lower than the potential applied to the charge storage electrode segment (the Nth photoelectric conversion unit segment) located farthest from the first electrode.

[0081] In the imaging element and the like of the present disclosure including the various preferred embodiments described above, At least a floating diffusion layer and an amplifying transistor that configure a control unit are provided on the semiconductor substrate, The first electrode may be connected to the floating diffusion layer and the gate of the amplification transistor. The semiconductor substrate is further provided with a reset transistor and a selection transistor which constitute a control section, The floating diffusion layer is connected to one of the source / drain regions of the reset transistor, A configuration can be used in which one source / drain region of the amplifying transistor is connected to one source / drain region of the selection transistor, and the other source / drain region of the selection transistor is connected to a signal line.

[0082] Furthermore, in the imaging device and the like of the present disclosure including the various preferred embodiments described above, the size of the charge storage electrode may be larger than that of the first electrode. 1 ', the area of ​​the first electrode is s 1 In this case, but not limited to, 4≦s 1 ' / s 1 It is preferable to satisfy the following:

[0083] Alternatively, as modified examples of the imaging element etc. of the present disclosure including the various preferred embodiments described above, imaging elements of the first to sixth configurations described below can be given. That is, in the imaging elements of the first to sixth configurations of the imaging element etc. of the present disclosure including the various preferred embodiments described above, The photoelectric conversion unit is composed of N (N≧2) photoelectric conversion unit segments, The inorganic oxide semiconductor material layer or the like is composed of N photoelectric conversion layer segments, The insulating layer is composed of N insulating layer segments, In the image pickup devices of the first to third configurations, the charge storage electrode is composed of N charge storage electrode segments, In the image sensor of the fourth or fifth configuration, the charge storage electrode is composed of N charge storage electrode segments arranged to be spaced apart from each other, an n-th (n=1, 2, 3,...,N) photoelectric conversion section segment is composed of an n-th charge storage electrode segment, an n-th insulating layer segment, and an n-th photoelectric conversion layer segment; The larger the value of n, the farther the photoelectric conversion segment is located from the first electrode. Here, the "photoelectric conversion layer segment" refers to a segment formed by laminating a photoelectric conversion layer, a protective layer, and an inorganic oxide semiconductor material layer.

[0084] In the imaging element of the first configuration, the thickness of the insulating layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. In the imaging element of the second configuration, the thickness of the photoelectric conversion layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. In the photoelectric conversion layer segment, the thickness of the photoelectric conversion layer portion may be changed and the thickness of the inorganic oxide semiconductor material layer portion may be kept constant, or the thickness of the photoelectric conversion layer portion may be kept constant and the thickness of the inorganic oxide semiconductor material layer portion may be changed to change the thickness of the photoelectric conversion layer segment, or the thickness of the photoelectric conversion layer portion may be changed and the thickness of the inorganic oxide semiconductor material layer portion may be changed to change the thickness of the photoelectric conversion layer segment. Furthermore, in the imaging element of the third configuration, the materials constituting the insulating layer segments are different in adjacent photoelectric conversion unit segments. In the imaging element of the fourth configuration, the materials constituting the charge storage electrode segments are different in adjacent photoelectric conversion unit segments. Furthermore, in the imaging element of the fifth configuration, the area of ​​the charge storage electrode segments gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. The area may decrease continuously or in a stepwise manner.

[0085] Alternatively, in an imaging element of a sixth configuration in the imaging elements etc. of the present disclosure including the various preferred embodiments described above, when the stacking direction of the charge storage electrode, the insulating layer, the inorganic oxide semiconductor material layer, and the photoelectric conversion layer is the Z direction and the direction away from the first electrode is the X direction, the cross-sectional area of ​​the stacked portion when the stacked portion in which the charge storage electrode, the insulating layer, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer are stacked is cut in a YZ imaginary plane changes depending on the distance from the first electrode. The change in the cross-sectional area may be a continuous change or a step-like change.

[0086] In the imaging devices of the first to second configurations, the N photoelectric conversion layer segments are continuously provided, the N insulating layer segments are also continuously provided, and the N charge storage electrode segments are also continuously provided. In the imaging devices of the third to fifth configurations, the N photoelectric conversion layer segments are continuously provided. In the imaging devices of the fourth and fifth configurations, the N insulating layer segments are continuously provided, while in the imaging device of the third configuration, the N insulating layer segments are provided corresponding to each of the photoelectric conversion section segments. Furthermore, in the imaging devices of the fourth to fifth configurations, and in some cases in the imaging device of the third configuration, the N charge storage electrode segments are provided corresponding to each of the photoelectric conversion section segments. And in the imaging devices of the first to sixth configurations, the same potential is applied to all of the charge storage electrode segments. Alternatively, in the imaging devices of the fourth to fifth configurations, and in some cases in the imaging device of the third configuration, different potentials may be applied to each of the N charge storage electrode segments.

[0087] In the imaging element of the present disclosure consisting of the imaging elements of the first to sixth configurations, the thickness of the insulating layer segment is specified, or the thickness of the photoelectric conversion layer segment is specified, or the materials constituting the insulating layer segment are different, or the materials constituting the charge storage electrode segment are different, or the area of ​​the charge storage electrode segment is specified, or the cross-sectional area of ​​the laminated portion is specified, so that a kind of charge transfer gradient is formed, and it becomes possible to transfer the charge generated by photoelectric conversion to the first electrode more easily and reliably. As a result, it is possible to prevent the occurrence of afterimages and charge transfer residues.

[0088] In the imaging elements of the first to fifth configurations, the photoelectric conversion unit segment with a larger value of n is located farther from the first electrode, but whether or not it is located farther from the first electrode is determined based on the X direction. In the imaging element of the sixth configuration, the direction away from the first electrode is defined as the X direction, but the "X direction" is defined as follows. That is, a pixel region in which a plurality of imaging elements or stacked imaging elements are arranged is composed of a plurality of pixels arranged regularly in a two-dimensional array, that is, in the X direction and the Y direction. When the planar shape of the pixel is rectangular, the direction in which the side closest to the first electrode extends is defined as the Y direction, and the direction perpendicular to the Y direction is defined as the X direction. Alternatively, when the planar shape of the pixel is an arbitrary shape, the overall direction including the line segment and curve closest to the first electrode is defined as the Y direction, and the direction perpendicular to the Y direction is defined as the X direction.

[0089] The following describes the imaging elements of the first to sixth configurations when the potential of the first electrode is higher than the potential of the second electrode.

[0090] In the image sensor of the first configuration, the thickness of the insulating layer segment gradually changes from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment, and it is preferable that the thickness of the insulating layer segment gradually increases, thereby forming a kind of charge transfer gradient. 31 ≧V 11In this state, the nth photoelectric conversion segment can store more charge than the (n+1)th photoelectric conversion segment, and a strong electric field is applied, reliably preventing the flow of charge from the first photoelectric conversion segment to the first electrode. 32 <V 12 In this state, the flow of charge from the first photoelectric conversion segment to the first electrode and the flow of charge from the (n+1)th photoelectric conversion segment to the nth photoelectric conversion segment can be reliably ensured.

[0091] In the imaging element of the second configuration, the thickness of the photoelectric conversion layer segments gradually changes from the first photoelectric conversion section segment to the Nth photoelectric conversion section segment, and it is preferable that the thickness of the photoelectric conversion layer segments gradually increases, thereby forming a kind of charge transfer gradient. 31 ≧V 11 In this state, a stronger electric field is applied to the nth photoelectric conversion segment than to the (n+1)th photoelectric conversion segment, and it is possible to reliably prevent the flow of charges from the first photoelectric conversion segment to the first electrode. 32 <V 12 In this state, the flow of charge from the first photoelectric conversion segment to the first electrode and the flow of charge from the (n+1)th photoelectric conversion segment to the nth photoelectric conversion segment can be reliably ensured.

[0092] In the imaging element of the third configuration, the materials constituting the insulating layer segments are different in adjacent photoelectric conversion unit segments, which forms a kind of charge transfer gradient. However, it is preferable that the relative dielectric constant values ​​of the materials constituting the insulating layer segments gradually decrease from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. By adopting such a configuration, during the charge accumulation period, V 31 ≧V 11In this state, the nth photoelectric conversion segment can store more charge than the (n+1)th photoelectric conversion segment. 32 <V 12 In this state, the flow of charge from the first photoelectric conversion segment to the first electrode and the flow of charge from the (n+1)th photoelectric conversion segment to the nth photoelectric conversion segment can be reliably ensured.

[0093] In the image sensor of the fourth configuration, the materials constituting the charge storage electrode segments are different in adjacent photoelectric conversion unit segments, which forms a kind of charge transfer gradient, but it is preferable that the work function values ​​of the materials constituting the insulating layer segments gradually increase from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment. By adopting such a configuration, a potential gradient that is advantageous for signal charge transfer can be formed regardless of the positive or negative voltage (potential).

[0094] In the image sensor of the fifth configuration, the area of ​​the charge storage electrode segments gradually decreases from the first photoelectric conversion unit segment to the Nth photoelectric conversion unit segment, and a kind of charge transfer gradient is formed. 31 ≧V 11 In this state, the nth photoelectric conversion segment can store more charge than the (n+1)th photoelectric conversion segment. 32 <V 12 In this state, the flow of charge from the first photoelectric conversion segment to the first electrode and the flow of charge from the (n+1)th photoelectric conversion segment to the nth photoelectric conversion segment can be reliably ensured.

[0095] In the image sensor of the sixth configuration, the cross-sectional area of ​​the laminated portion changes depending on the distance from the first electrode, which forms a kind of charge transfer gradient. Specifically, if the thickness of the cross-section of the laminated portion is constant and the width of the cross-section of the laminated portion is narrowed as it moves away from the first electrode, then, as explained in the image sensor of the fifth configuration, during the charge accumulation period, V 31 ≧V 11 In this state, the area closer to the first electrode can store more charge than the area farther away. Therefore, during the charge transfer period, V 32 <V 12 In this state, the flow of charges from the region close to the first electrode to the first electrode and from the region farther away to the region close to the first electrode can be reliably ensured. On the other hand, if a configuration is adopted in which the width of the cross section of the laminated portion is constant and the thickness of the cross section of the laminated portion, specifically, the thickness of the insulating layer segment, is gradually increased, then, as explained in the image sensor of the first configuration, during the charge accumulation period, V 31 ≧V 11 In this state, the area closer to the first electrode can store more charge than the area farther away, and a strong electric field is applied, reliably preventing the flow of charge from the area closer to the first electrode to the first electrode. 32 <V 12 In this state, the flow of charges from the region close to the first electrode to the first electrode and from the region farther away to the region close to the first electrode can be reliably ensured. Also, by adopting a configuration in which the thickness of the photoelectric conversion layer segment is gradually increased, as explained in the image sensor of the second configuration, during the charge accumulation period, V 31 ≧V 11 In this state, a stronger electric field is applied to the region closer to the first electrode than to the region farther away, and it is possible to reliably prevent the flow of charges from the region closer to the first electrode to the first electrode. 32 <V 12 In this state, the flow of charges from the region close to the first electrode to the first electrode and the flow of charges from the distant region to the close region can be reliably ensured.

[0096] Two or more of the imaging elements of the first to sixth configurations including the preferred embodiments described above can be combined as desired.

[0097] As a modification of the solid-state imaging device according to the first and second aspects of the present disclosure, The imaging device has a plurality of imaging elements having the first to sixth configurations, An imaging element block is composed of a plurality of imaging elements, A solid-state imaging device may be configured such that the first electrode is shared among a plurality of imaging elements that constitute an imaging element block. For convenience, a solid-state imaging device having such a configuration is referred to as a "solid-state imaging device having a first configuration." Alternatively, as a modification of the solid-state imaging device according to the first and second aspects of the present disclosure, The imaging device includes a plurality of imaging elements having the first to sixth configurations, or a stacked imaging element including at least one imaging element having the first to sixth configurations, An imaging element block is composed of a plurality of imaging elements or stacked imaging elements, A solid-state imaging device can be configured in such a way that the first electrode is shared among the multiple imaging elements or stacked imaging elements that make up the imaging element block. For convenience, a solid-state imaging device configured in this way is called a "solid-state imaging device of second configuration." If the first electrode is shared among the multiple imaging elements that make up the imaging element block in this way, the configuration and structure in the pixel region where the multiple imaging elements are arranged can be simplified and miniaturized.

[0098] In the solid-state imaging devices of the first and second configurations, one floating diffusion layer is provided for a plurality of imaging elements (one imaging element block). Here, the plurality of imaging elements provided for one floating diffusion layer may be composed of a plurality of first type imaging elements described later, or may be composed of at least one first type imaging element and one or more second type imaging elements described later. Then, by appropriately controlling the timing of the charge transfer period, it becomes possible for the plurality of imaging elements to share one floating diffusion layer. The plurality of imaging elements are operated in cooperation with each other and are connected to a driving circuit described later as an imaging element block. That is, the plurality of imaging elements constituting the imaging element block are connected to one driving circuit. However, the charge storage electrode is controlled for each imaging element. Also, it is possible for the plurality of imaging elements to share one contact hole portion. The arrangement relationship between the first electrode shared by the plurality of imaging elements and the charge storage electrode of each imaging element may be such that the first electrode is arranged adjacent to the charge storage electrode of each imaging element. Alternatively, the first electrode may be disposed adjacent to some of the charge storage electrodes of the multiple imaging elements, but not adjacent to the remaining charge storage electrodes of the multiple imaging elements. In this case, the charge transfer from the remaining multiple imaging elements to the first electrode is via some of the multiple imaging elements. It is preferable that the distance between the charge storage electrode constituting the imaging element and the charge storage electrode constituting the imaging element (for convenience, referred to as "distance A") is longer than the distance between the first electrode and the charge storage electrode in the imaging element adjacent to the first electrode (for convenience, referred to as "distance B") in order to ensure the transfer of charge from each imaging element to the first electrode. It is also preferable that the value of the distance A is larger for imaging elements located farther away from the first electrode. The above description can be applied not only to the solid-state imaging devices of the first and second configurations, but also to the solid-state imaging devices according to the first and second aspects of the present disclosure.

[0099] Furthermore, in the imaging element and the like of the present disclosure including the various preferred embodiments described above, a configuration may be adopted in which light is incident from the second electrode side, and a light shielding layer is formed on the light incident side from the second electrode. Alternatively, a configuration may be adopted in which light is incident from the second electrode side, and light is not incident on the first electrode (or the first electrode and the transfer control electrode in some cases). In this case, a configuration may be adopted in which a light shielding layer is formed on the light incident side from the second electrode, and above the first electrode (or the first electrode and the transfer control electrode in some cases), or a configuration may be adopted in which an on-chip microlens is provided above the charge storage electrode and the second electrode, and light incident on the on-chip microlens is focused on the charge storage electrode. Here, the light shielding layer may be disposed above the surface of the second electrode on the light incident side, or may be disposed on the surface of the second electrode on the light incident side. In some cases, a light shielding layer may be formed on the second electrode. Examples of materials that can be used to form the light-shielding layer include chromium (Cr), copper (Cu), aluminum (Al), tungsten (W), and light-opaque resin (eg, polyimide resin).

[0100] Specific examples of the imaging element and the like of the present disclosure include an imaging element sensitive to blue light (for convenience, referred to as a "first type blue light imaging element") having a photoelectric conversion layer or photoelectric conversion unit that absorbs blue light (light of 425 nm to 495 nm) (for convenience, referred to as a "first type blue light photoelectric conversion layer" or a "first type blue light photoelectric conversion unit"), and a photoelectric conversion layer or photoelectric conversion unit that absorbs green light (light of 495 nm to 570 nm) (for convenience, referred to as a "first type green light photoelectric conversion layer" or a "first type green light photoelectric conversion unit") Examples of such an imaging element include an imaging element sensitive to green light having a photoelectric conversion layer or photoelectric conversion unit (for convenience, referred to as a ``first type of green light imaging element'') that absorbs red light (light of 620 nm to 750 nm) (for convenience, referred to as a ``first type of red light imaging element'') that absorbs red light (light of 620 nm to 750 nm). Furthermore, a conventional imaging element that does not have a charge storage electrode and that is sensitive to blue light will be referred to as a "second type blue light imaging element" for convenience, an imaging element that is sensitive to green light will be referred to as a "second type green light imaging element" for convenience, an imaging element that is sensitive to red light will be referred to as a "second type red light imaging element" for convenience, the photoelectric conversion layer or photoelectric conversion unit that constitutes the second type blue light imaging element will be referred to as a "second type blue light photoelectric conversion layer" or a "second type blue light photoelectric conversion unit" for convenience, the photoelectric conversion layer or photoelectric conversion unit that constitutes the second type green light imaging element will be referred to as a "second type green light photoelectric conversion layer" or a "second type green light photoelectric conversion unit" for convenience, and the photoelectric conversion layer or photoelectric conversion unit that constitutes the second type red light imaging element will be referred to as a "second type red light photoelectric conversion layer" or a "second type red light photoelectric conversion unit" for convenience.

[0101] The stacked imaging element of the present disclosure includes at least one imaging element or the like (photoelectric conversion element) of the present disclosure. Specifically, for example, [A] A first type blue light photoelectric conversion unit, a first type green light photoelectric conversion unit, and a first type red light photoelectric conversion unit are stacked in a vertical direction, A configuration and structure in which the control units of the first type blue light imaging element, the first type green light imaging element, and the first type red light imaging element are each provided on a semiconductor substrate. [B] A first type blue light photoelectric conversion unit and a first type green light photoelectric conversion unit are stacked in a vertical direction, a second type red light photoelectric conversion unit is disposed below these two layers of the first type photoelectric conversion unit; A configuration and structure in which the control units of the first type blue light imaging element, the first type green light imaging element, and the second type red light imaging element are each provided on a semiconductor substrate. [C] a second type blue light photoelectric conversion unit and a second type red light photoelectric conversion unit are arranged below a first type green light photoelectric conversion unit, A configuration and structure in which the control units of the first type green light imaging element, the second type blue light imaging element, and the second type red light imaging element are each provided on a semiconductor substrate. [D] a second type green light photoelectric conversion unit and a second type red light photoelectric conversion unit are arranged below the first type blue light photoelectric conversion unit, A configuration and structure in which the control units of the first type blue light imaging element, the second type green light imaging element, and the second type red light imaging element are each provided on a semiconductor substrate. The photoelectric conversion units of these imaging elements are preferably arranged in the vertical direction in the order of blue light photoelectric conversion unit, green light photoelectric conversion unit, and red light photoelectric conversion unit from the light incidence direction, or in the order of green light photoelectric conversion unit, blue light photoelectric conversion unit, and red light photoelectric conversion unit from the light incidence direction. This is because light with shorter wavelengths is absorbed more efficiently on the incident surface side. Since red has the longest wavelength among the three colors, it is preferable to position the red light photoelectric conversion unit in the lowest layer as viewed from the light incidence surface. One pixel is formed by the stacked structure of these imaging elements. In addition, a first type of near-infrared light photoelectric conversion unit (or an infrared light photoelectric conversion unit) may be provided. Here, the photoelectric conversion layer of the first type of infrared light photoelectric conversion unit is preferably made of, for example, an organic material, and is preferably arranged as the lowest layer in the stacked structure of the first type imaging element and above the second type imaging element. Alternatively, a second type of near-infrared light photoelectric conversion section (or an infrared light photoelectric conversion section) may be provided below the first type of photoelectric conversion section.

[0102] In the first type of imaging element, for example, the first electrode is formed on an interlayer insulating layer provided on a semiconductor substrate. The imaging element formed on the semiconductor substrate may be of a back-illuminated type or a front-illuminated type.

[0103] When the photoelectric conversion layer is made of an organic material, the photoelectric conversion layer is (1) It is composed of a p-type organic semiconductor. (2) It is composed of an n-type organic semiconductor. (3) Consists of a laminated structure of a p-type organic semiconductor layer / n-type organic semiconductor layer. Consists of a laminated structure of a p-type organic semiconductor layer / mixed layer of p-type organic semiconductor and n-type organic semiconductor (bulk heterostructure) / n-type organic semiconductor layer. Consists of a laminated structure of a p-type organic semiconductor layer / mixed layer of p-type organic semiconductor and n-type organic semiconductor (bulk heterostructure). Consists of a laminated structure of an n-type organic semiconductor layer / mixed layer of p-type organic semiconductor and n-type organic semiconductor (bulk heterostructure). (4) It is composed of a mixture of p-type and n-type organic semiconductors (bulk heterostructure). However, the order of the layers may be changed as desired.

[0104] Examples of p-type organic semiconductors include naphthalene derivatives, anthracene derivatives, phenanthrene derivatives, pyrene derivatives, perylene derivatives, tetracene derivatives, pentacene derivatives, quinacridone derivatives, thiophene derivatives, thienothiophene derivatives, benzothiophene derivatives, benzothienobenzothiophene derivatives, triallylamine derivatives, carbazole derivatives, perylene derivatives, picene derivatives, chrysene derivatives, fluoranthene derivatives, phthalocyanine derivatives, subphthalocyanine derivatives, subporphyrazine derivatives, metal complexes having a heterocyclic compound as a ligand, polythiophene derivatives, polybenzothiadiazole derivatives, and polyfluorene derivatives. Examples of n-type organic semiconductors include fullerenes and fullerene derivatives (e.g., fullerenes (higher fullerenes) such as C60, C70, and C74, endohedral fullerenes, etc.) or fullerene derivatives (e.g., fullerene fluorides, PCBM fullerene compounds, fullerene polymers, etc.)), organic semiconductors having larger (deeper) HOMO and LUMO than p-type organic semiconductors, and transparent inorganic metal oxides. Specific examples of n-type organic semiconductors include organic molecules, organometallic complexes, and subphthalocyanine derivatives having heterocyclic compounds containing nitrogen atoms, oxygen atoms, or sulfur atoms as part of their molecular skeletons, such as pyridine derivatives, pyrazine derivatives, pyrimidine derivatives, triazine derivatives, quinoline derivatives, quinoxaline derivatives, isoquinoline derivatives, acridine derivatives, phenazine derivatives, phenanthroline derivatives, tetrazole derivatives, pyrazole derivatives, imidazole derivatives, thiazole derivatives, oxazole derivatives, imidazole derivatives, benzimidazole derivatives, benzotriazole derivatives, benzoxazole derivatives, benzoxazole derivatives, carbazole derivatives, benzofuran derivatives, dibenzofuran derivatives, subporphyrazine derivatives, polyphenylenevinylene derivatives, polybenzothiadiazole derivatives, and polyfluorene derivatives.Examples of groups contained in the fullerene derivative include halogen atoms, linear, branched or cyclic alkyl or phenyl groups, groups having linear or condensed aromatic compounds, groups having halides, partial fluoroalkyl groups, perfluoroalkyl groups, silyl alkyl groups, silyl alkoxy groups, aryl silyl groups, aryl sulfanyl groups, alkyl sulfanyl groups, aryl sulfonyl groups, alkyl sulfonyl groups, aryl sulfide groups, alkyl sulfide groups, amino groups, alkyl amino groups, aryl amino groups, hydroxy groups, alkoxy groups, acyl amino groups, acyloxy groups, carbonyl groups, carboxy groups, carboxoamide groups, carboalkoxy groups, acyl groups, sulfonyl groups, cyano groups, nitro groups, groups having chalcogenides, phosphine groups, phosphonic groups, and derivatives thereof. The thickness of the photoelectric conversion layer (sometimes called "organic photoelectric conversion layer") made of organic materials is not limited, but may be, for example, 1×10. -8 m to 5×10 -7 m, preferably 2.5 × 10 -8 m to 3×10 -7 m, more preferably 2.5 × 10 -8 m to 2×10 -7 m, more preferably 1×10 -7 m to 1.8×10 -7 Examples of the organic semiconductor include p-type and n-type. Although organic semiconductors are often classified as p-type and n-type, the p-type means that they easily transport holes, and the n-type means that they easily transport electrons, and are not limited to the interpretation that they have holes or electrons as the majority carriers of thermal excitation like inorganic semiconductors.

[0105] Alternatively, examples of materials constituting an organic photoelectric conversion layer that converts green light into electricity include rhodamine-based dyes, melacyanine-based dyes, quinacridone derivatives, subphthalocyanine-based dyes (subphthalocyanine derivatives), etc., examples of materials constituting an organic photoelectric conversion layer that converts blue light into electricity include coumaric acid dyes, tris-8-hydroxyquinolialuminum (Alq3), melacyanine-based dyes, etc., and examples of materials constituting an organic photoelectric conversion layer that converts red light into electricity include phthalocyanine-based dyes and subphthalocyanine-based dyes (subphthalocyanine derivatives).

[0106] Alternatively, inorganic materials constituting the photoelectric conversion layer include crystalline silicon, amorphous silicon, microcrystalline silicon, crystalline selenium, amorphous selenium, and chalcopallite compounds such as CIGS (CuInGaSe) and CIS (CuInSe 2 ), CuInS 2 , CuAlS 2 , CuAlSe 2 , CuGaS 2 , CuGaSe 2 , AgAlS 2 , AgAlSe 2 , AgInS 2 , AgInSe 2 , or III-V group compounds GaAs, InP, AlGaAs, InGaP, AlGaInP, InGaAsP, as well as CdSe, CdS, In 2 Se 3 , In 2 S 3 , Bi 2 Se 3 , Bi 2 S 3 Examples of compound semiconductors include ZnSe, ZnS, PbSe, PbS, etc. In addition, quantum dots made of these materials can also be used in the photoelectric conversion layer.

[0107] A single-chip color solid-state imaging device can be configured by the solid-state imaging devices according to the first and second aspects of the present disclosure and the solid-state imaging devices having the first and second configurations.

[0108] In the solid-state imaging device according to the second aspect of the present disclosure, which includes a stacked imaging element, unlike a solid-state imaging device including an imaging element with a Bayer array (i.e., instead of using a color filter layer to separate light into blue, green, and red), imaging elements having sensitivity to light of a plurality of wavelengths are stacked in the direction of light incidence within the same pixel to form one pixel, so that it is possible to improve sensitivity and pixel density per unit volume. In addition, since organic materials have a high absorption coefficient, the film thickness of the organic photoelectric conversion layer can be made thinner than that of a conventional Si-based photoelectric conversion layer, and light leakage from adjacent pixels and restrictions on the angle of incidence of light are alleviated. Furthermore, in the conventional Si-based imaging element, false colors occur because color signals are created by performing an interpolation process between three color pixels, but the occurrence of false colors is suppressed in the solid-state imaging device according to the second aspect of the present disclosure, which includes a stacked imaging element. Since the organic photoelectric conversion layer itself also functions as a color filter layer, color separation is possible without providing a color filter layer.

[0109] On the other hand, in the solid-state imaging device according to the first embodiment of the present disclosure, the use of a color filter layer can ease the requirements for the spectral characteristics of blue, green, and red, and also has high mass productivity. In addition to the Bayer array, the solid-state imaging device according to the first embodiment of the present disclosure can have an interline array, a G-stripe RB checkered array, a G-stripe RB complete checkered array, a checkered complementary color array, a stripe array, a diagonal stripe array, a primary color color difference array, a field color difference sequential array, a frame color difference sequential array, a MOS type array, an improved MOS type array, a frame interleaved array, and a field interleaved array. Here, one pixel (or subpixel) is formed by one imaging element.

[0110] The color filter layer (wavelength selection means) may be a filter layer that transmits not only red, green, and blue, but also, in some cases, specific wavelengths such as cyan, magenta, and yellow. The color filter layer may be composed of an organic material-based color filter layer using organic compounds such as pigments and dyes, but may also be composed of a wavelength selection element that applies photonic crystals or plasmons (a color filter layer having a conductor lattice structure in which a lattice-shaped hole structure is provided in a conductor thin film. For example, see JP-A-2008-177191), or a thin film made of an inorganic material such as amorphous silicon.

[0111] A pixel region in which a plurality of imaging elements or the like of the present disclosure or stacked imaging elements of the present disclosure are arranged is composed of a plurality of pixels arranged regularly in a two-dimensional array. The pixel region is usually composed of an effective pixel region that actually receives light, amplifies the signal charge generated by photoelectric conversion, and reads it out to a drive circuit, and a black reference pixel region (also called an optical black pixel region (OPB)) for outputting optical black that serves as a reference for the black level. The black reference pixel region is usually arranged on the outer periphery of the effective pixel region.

[0112] In the imaging element and the like of the present disclosure including the various preferred embodiments described above, light is irradiated, photoelectric conversion occurs in the photoelectric conversion layer, and holes and electrons are separated as carriers. The electrode from which the holes are extracted is the anode, and the electrode from which the electrons are extracted is the cathode. The first electrode constitutes the cathode, and the second electrode constitutes the anode.

[0113] The first electrode, the charge storage electrode, the transfer control electrode, the charge transfer control electrode, the charge discharge electrode, and the second electrode may be made of a transparent conductive material. The first electrode, the charge storage electrode, the transfer control electrode, the charge transfer control electrode, and the charge discharge electrode may be collectively referred to as the "first electrode, etc." Alternatively, when the imaging element, etc. of the present disclosure is arranged on a plane, for example, in a Bayer array, the second electrode may be made of a transparent conductive material, and the first electrode, etc. may be made of a metal material. In this case, specifically, the second electrode located on the light incident side may be made of a transparent conductive material, and the first electrode, etc. may be made of, for example, Al-Nd (alloy of aluminum and neodymium) or ASC (alloy of aluminum, samarium, and copper). An electrode made of a transparent conductive material may be called a "transparent electrode." Here, it is desirable that the band gap energy of the transparent conductive material is 2.5 eV or more, preferably 3.1 eV or more. Examples of the transparent conductive material constituting the transparent electrode include conductive metal oxides. Specifically, indium oxide and indium tin oxide (ITO, Indium Tin Oxide, Sn-doped In 2 O 3 , including crystalline ITO and amorphous ITO), indium zinc oxide (IZO, Indium Zinc Oxide) in which indium is added as a dopant to zinc oxide, indium gallium oxide (IGO) in which indium is added as a dopant to gallium oxide, and indium gallium zinc oxide (IGZO, In-GaZnO) in which indium and gallium are added as dopants to zinc oxide. 4 ), indium-tin-zinc oxide (ITZO), which is zinc oxide doped with indium and tin, and IFO (F-doped In 2 O 3 ), tin oxide (SnO 2 ), ATO (Sb-doped SnO 2 ), FTO (F-doped SnO 2 ), zinc oxide (including ZnO doped with other elements), aluminum zinc oxide (AZO) in which aluminum is added as a dopant to zinc oxide, gallium zinc oxide (GZO) in which gallium is added as a dopant to zinc oxide, titanium oxide (TiO2 ), titanium oxide with niobium added as a dopant (TNO), antimony oxide, CuI, InSbO 4 , ZnMgO, CuInO 2 , MgIn 2 O 4 , CdO, ZnSnO 3 , spinel oxide, YbFe 2 O 4 Examples of the transparent electrodes include oxides having a structure. Alternatively, examples of the transparent electrodes include transparent electrodes having a base layer of gallium oxide, titanium oxide, niobium oxide, nickel oxide, etc. The thickness of the transparent electrodes is 2×10 -8 m to 2×10 -7 m, preferably 3 × 10 -8 m to 1×10 -7 When the first electrode is required to be transparent, it is preferable that the charge discharging electrode is also made of a transparent conductive material from the viewpoint of simplifying the manufacturing process.

[0114] Alternatively, when transparency is not required, the conductive material constituting the cathode having the function as an electrode for extracting electrons is preferably composed of a conductive material having a low work function (for example, φ=3.5 eV to 4.5 eV). Specific examples of such a conductive material include alkali metals (for example, Li, Na, K, etc.) and their fluorides or oxides, alkaline earth metals (for example, Mg, Ca, etc.) and their fluorides or oxides, aluminum (Al), zinc (Zn), tin (Sn), thallium (Tl), sodium-potassium alloys, aluminum-lithium alloys, magnesium-silver alloys, indium, ytterbium, and other rare earth metals, and alloys thereof. Alternatively, the material constituting the cathode may be a metal such as platinum (Pt), gold (Au), palladium (Pd), chromium (Cr), nickel (Ni), aluminum (Al), silver (Ag), tantalum (Ta), tungsten (W), copper (Cu), titanium (Ti), indium (In), tin (Sn), iron (Fe), cobalt (Co), or molybdenum (Mo), or an alloy containing these metal elements, conductive particles made of these metals, conductive particles of alloys containing these metals, polysilicon containing impurities, carbon-based materials, oxide semiconductor materials, carbon nanotubes, graphene, or other conductive materials, or may have a laminated structure of layers containing these elements. Furthermore, the material constituting the cathode may be an organic material (conductive polymer) such as poly(3,4-ethylenedioxythiophene) / polystyrene sulfonate [PEDOT / PSS]. In addition, these conductive materials may be mixed with a binder (polymer) to form a paste or ink, which may be hardened and used as an electrode.

[0115] As a method for forming a film of the first electrode or the second electrode (cathode or anode), a dry method or a wet method can be used. As a dry method, physical vapor deposition (PVD) and chemical vapor deposition (CVD) can be mentioned. As a film forming method using the principle of PVD, a vacuum deposition method using resistance heating or high-frequency heating, EB (electron beam) deposition, various sputtering methods (magnetron sputtering, RF-DC coupled bias sputtering, ECR sputtering, facing target sputtering, high-frequency sputtering), ion plating, laser ablation, molecular beam epitaxy, and laser transfer can be mentioned. In addition, as a CVD method, a plasma CVD method, a thermal CVD method, an organic metal (MO) CVD method, and a photo CVD method can be mentioned. On the other hand, as a wet method, an electrolytic plating method, an electroless plating method, a spin coating method, an inkjet method, a spray coating method, a stamp method, a microcontact printing method, a flexographic printing method, an offset printing method, a gravure printing method, a dip method, and the like can be mentioned. Examples of the patterning method include chemical etching such as shadow mask, laser transfer, and photolithography, and physical etching using ultraviolet light, laser, etc. Examples of the planarization technique for the first electrode, etc. and the second electrode include laser planarization, reflow, and CMP (Chemical Mechanical Polishing).

[0116] As materials for forming the insulating layer, silicon oxide-based materials; silicon nitride (SiN Y ); Aluminum oxide (Al 2 O 3In addition to inorganic insulating materials such as metal oxide high dielectric insulating materials, examples of the insulating materials include polymethyl methacrylate (PMMA); polyvinylphenol (PVP); polyvinyl alcohol (PVA); polyimide; polycarbonate (PC); polyethylene terephthalate (PET); polystyrene; silanol derivatives (silane coupling agents) such as N-2(aminoethyl)3-aminopropyltrimethoxysilane (AEAPTMS), 3-mercaptopropyltrimethoxysilane (MPTMS), and octadecyltrichlorosilane (OTS); novolac-type phenolic resins; fluorine-based resins; and straight-chain hydrocarbons having a functional group at one end that can be bonded to a control electrode, such as octadecanethiol and dodecyl isocyanate. Combinations of these materials can also be used. Examples of silicon oxide-based materials include silicon oxide (SiO X ), BPSG, PSG, BSG, AsSG, PbSG, silicon oxynitride (SiON), SOG (spin-on glass), and low dielectric constant insulating materials (e.g., polyaryl ether, cycloperfluorocarbon polymer and benzocyclobutene, cyclic fluororesin, polytetrafluoroethylene, fluorinated aryl ether, fluorinated polyimide, amorphous carbon, and organic SOG) can be exemplified. The insulating layer can be a single layer structure, or a structure in which multiple layers (e.g., two layers) are laminated. In the latter case, the insulating layer / lower layer is formed at least on the charge storage electrode and in the region between the charge storage electrode and the first electrode, and the insulating layer / lower layer is left at least in the region between the charge storage electrode and the first electrode by performing a planarization process on the insulating layer / lower layer, and the insulating layer / upper layer is formed on the remaining insulating layer / lower layer and the charge storage electrode, thereby ensuring the planarization of the insulating layer. Materials constituting various interlayer insulating layers, protective material layers, and insulating material layers may also be appropriately selected from these materials.

[0117] The configurations and structures of the floating diffusion layer, amplifying transistor, reset transistor, and selection transistor constituting the control section may be the same as those of the conventional floating diffusion layer, amplifying transistor, reset transistor, and selection transistor. The driving circuit may also have a known configuration and structure.

[0118] The first electrode is connected to the floating diffusion layer and the gate of the amplification transistor, and a contact hole is formed to connect the first electrode to the floating diffusion layer and the gate of the amplification transistor. The material for forming the contact hole may be polysilicon doped with impurities, tungsten, Ti, Pt, Pd, Cu, TiW, TiN, TiNW, WSi 2 , MoSi 2 Examples of the material include high melting point metals such as TiN and metal silicides, and laminated structures of layers made of these materials (for example, Ti / TiN / W).

[0119] A first carrier blocking layer may be provided between the inorganic oxide semiconductor material layer and the first electrode, and a second carrier blocking layer may be provided between the organic photoelectric conversion layer and the second electrode. A first charge injection layer may be provided between the first carrier blocking layer and the first electrode, and a second charge injection layer may be provided between the second carrier blocking layer and the second electrode. For example, materials constituting the electron injection layer include alkali metals such as lithium (Li), sodium (Na), and potassium (K) and their fluorides and oxides, and alkaline earth metals such as magnesium (Mg) and calcium (Ca) and their fluorides and oxides.

[0120] Examples of the film-forming method for various organic layers include dry film-forming methods and wet film-forming methods. Examples of the dry film-forming methods include vacuum deposition using resistance heating, high-frequency heating, and electron beam heating, flash deposition, plasma deposition, EB deposition, various sputtering methods (two-pole sputtering, direct current sputtering, direct current magnetron sputtering, high-frequency sputtering, magnetron sputtering, RF-DC combined bias sputtering, ECR sputtering, facing target sputtering, high-frequency sputtering, and ion beam sputtering), DC (Direct Current) method, RF method, multi-cathode method, activation reaction method, field deposition method, various ion plating methods such as high-frequency ion plating and reactive ion plating, laser ablation method, molecular beam epitaxy method, laser transfer method, and molecular beam epitaxy method (MBE method). Examples of the CVD method include plasma CVD method, thermal CVD method, MOCVD method, and photo CVD method. On the other hand, examples of wet methods include spin coating, immersion, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. In the coating method, examples of the solvent include non-polar or low polar organic solvents such as toluene, chloroform, hexane, and ethanol. Examples of patterning methods include chemical etching such as shadow mask, laser transfer, and photolithography, and physical etching using ultraviolet light or laser. Examples of the planarization technique for various organic layers include laser planarization and reflow.

[0121] As described above, the imaging element or solid-state imaging device may be provided with an on-chip microlens or a light-shielding layer, and may be provided with a driving circuit and wiring for driving the imaging element, as necessary. If necessary, a shutter may be provided for controlling the incidence of light on the imaging element, and an optical cut filter may be provided depending on the purpose of the solid-state imaging device.

[0122] Furthermore, in the solid-state imaging devices of the first and second configurations, a configuration can be adopted in which one on-chip microlens is disposed above one imaging element or the like of the present disclosure, or a configuration can be adopted in which an imaging element block is constituted by two imaging elements or the like of the present disclosure, and one on-chip microlens is disposed above the imaging element block.

[0123] For example, when stacking a solid-state imaging device with a readout integrated circuit (ROIC), the readout integrated circuit and a driving substrate having a connection part made of copper (Cu) are stacked on top of the imaging element having a connection part so that the connection parts are in contact with each other, and the stacking can be performed by joining the connection parts, or the connection parts can be joined using solder bumps or the like.

[0124] In addition, in the driving method for driving the solid-state imaging device according to the first and second aspects of the present disclosure, In all the imaging elements, charges are simultaneously stored in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer and the photoelectric conversion layer) while the charges in the first electrode are discharged to the outside of the system, and then In all of the image pickup elements, the electric charges accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer and the photoelectric conversion layer) are transferred to the first electrode at the same time, and after the transfer is completed, the electric charges transferred to the first electrode are read out in sequence in each image pickup element. A method for driving a solid-state imaging device can be achieved by repeating each step.

[0125] In such a method for driving a solid-state imaging device, each imaging element has a structure in which light incident from the second electrode side does not enter the first electrode, and in all imaging elements, charges are simultaneously accumulated in the inorganic oxide semiconductor material layer, etc. while the charges in the first electrode are discharged to the outside of the system, so that the first electrodes can be reliably reset simultaneously in all imaging elements. Then, in all imaging elements, the charges accumulated in the inorganic oxide semiconductor material layer, etc. are simultaneously transferred to the first electrode, and after the transfer is completed, the charges transferred to the first electrode are read out in each imaging element in sequence. Therefore, a so-called global shutter function can be easily realized.

[0126] The imaging element and the solid-state imaging device according to the first embodiment will be described in detail below.

[0127] The image sensor 10 of the first embodiment further includes a semiconductor substrate (more specifically, a silicon semiconductor layer) 70, and the photoelectric conversion unit is disposed above the semiconductor substrate 70. The image sensor 10 further includes a control unit provided on the semiconductor substrate 70 and having a drive circuit to which the first electrode 21 and the second electrode 22 are connected. Here, the light incident surface of the semiconductor substrate 70 is defined as the upper side, and the opposite side of the semiconductor substrate 70 is defined as the lower side. A wiring layer 62 made up of a plurality of wirings is provided below the semiconductor substrate 70.

[0128] The semiconductor substrate 70 includes at least a floating diffusion layer FD constituting a control unit. 1 and the amplification transistor TR1 amp The first electrode 21 is provided with a floating diffusion layer FD 1 and the amplification transistor TR1 amp The semiconductor substrate 70 further includes a reset transistor TR1 which constitutes a control section. rst and selection transistor TR1 sel A floating diffusion layer (FD) is provided. 1 Reset transistor TR1 rst and the amplifier transistor TR1 is connected to one of the source / drain regions of the amplifier transistor TR1. amp The other source / drain region of the select transistor TR1 seland a select transistor TR1 is connected to one of the source / drain regions of the select transistor TR1. sel The other source / drain region is connected to the signal line VSL 1 These amplifier transistors TR1 amp , reset transistor TR1 rst and selection transistor TR1 sel constitutes the drive circuit.

[0129] Specifically, the imaging element and stacked imaging element of Example 1 are back-illuminated imaging elements and stacked imaging elements, and have a structure in which three imaging elements are stacked: a first-type green light imaging element of Example 1 (hereinafter referred to as a "first imaging element") having sensitivity to green light and including a first-type green light photoelectric conversion layer that absorbs green light, a second-type conventional blue light imaging element (hereinafter referred to as a "second imaging element") having sensitivity to blue light and including a second-type blue light photoelectric conversion layer that absorbs blue light, and a second-type conventional red light imaging element (hereinafter referred to as a "third imaging element") having sensitivity to red light and including a second-type red light photoelectric conversion layer that absorbs red light. Here, the red light imaging element (third imaging element) 12 and the blue light imaging element (second imaging element) 11 are provided in a semiconductor substrate 70, and the second imaging element 11 is located closer to the light incident side than the third imaging element 12. Moreover, the green light imaging element (first imaging element 10) is provided above the blue light imaging element (second imaging element 11). One pixel is formed by a layered structure of the first imaging element 10, the second imaging element 11, and the third imaging element 12. No color filter layer is provided.

[0130] In the first imaging element 10, the first electrode 21 and the charge storage electrode 24 are formed on an interlayer insulating layer 81, with a space between them. The interlayer insulating layer 81 and the charge storage electrode 24 are covered with an insulating layer 82. An inorganic oxide semiconductor material layer 23C, a protective layer 23B, and a photoelectric conversion layer 23A are formed on the insulating layer 82, and a second electrode 22 is formed on the photoelectric conversion layer 23A. A protective material layer 83 is formed on the entire surface including the second electrode 22, and an on-chip microlens 14 is provided on the protective material layer 83. No color filter layer is provided. The first electrode 21, the charge storage electrode 24, and the second electrode 22 are formed of transparent electrodes made of, for example, ITO (work function: about 4.4 eV). The inorganic oxide semiconductor material layer 23C is made of IGZO. The photoelectric conversion layer 23A is composed of a layer containing a well-known organic photoelectric conversion material (e.g., organic materials such as rhodamine-based dyes, melacyanine-based dyes, and quinacridone) having sensitivity to at least green light. The interlayer insulating layer 81, the insulating layer 82, and the protective material layer 83 are made of well-known insulating materials (e.g., SiO 2 The inorganic oxide semiconductor material layer 23C is made of a conductive material such as silicon nitride (SiN) and a conductive material such as silicon carbide (SiO 2 ). The inorganic oxide semiconductor material layer 23C and the first electrode 21 are connected by a connection portion 67 provided in the insulating layer 82. The inorganic oxide semiconductor material layer 23C and the protective layer 23B extend within the connection portion 67. That is, the inorganic oxide semiconductor material layer 23C extends within an opening portion 84 provided in the insulating layer 82, and is connected to the first electrode 21.

[0131] The charge storage electrode 24 is connected to a drive circuit. Specifically, the charge storage electrode 24 is connected to a connection hole 66, a pad portion 64, and a wiring V, which are provided in the interlayer insulating layer 81. OA 1, which is connected to a vertical drive circuit 112 constituting a drive circuit.

[0132] The size of the charge storage electrode 24 is larger than that of the first electrode 21. The area of ​​the charge storage electrode 24 is s 1 ', the area of ​​the first electrode 21 is s 1 In this case, but not limited to, 4≦s 1 ' / s 1 It is preferable to satisfy the following. In the first embodiment, the following is not limited to the above: s 1 ' / s 1 =8 It was decided.

[0133] An element isolation region 71 is formed on the first surface (front surface) 70A of the semiconductor substrate 70, and an insulating material film 72 is formed on the first surface 70A of the semiconductor substrate 70. Furthermore, on the first surface side of the semiconductor substrate 70, a reset transistor TR1 constituting the control unit of the first imaging element 10 is formed. rst , amplifying transistor TR1 amp and selection transistor TR1 sel Further, a first floating diffusion layer FD 1 is provided.

[0134] Reset transistor TR1 rst The reset transistor TR1 is composed of a gate portion 51, a channel forming region 51A, and source / drain regions 51B and 51C. rst The gate portion 51 of the reset line RST 1 connected to the reset transistor TR1 rst One of the source / drain regions 51C is a first floating diffusion layer FD 1 The other source / drain region 51B serves as a power supply V DD is connected to

[0135] The first electrode 21 is connected to the reset transistor TR1 via a connection hole 65 provided in the interlayer insulating layer 81, a pad portion 63, a contact hole portion 61 formed in the semiconductor substrate 70 and the interlayer insulating layer 76, and a wiring layer 62 formed in the interlayer insulating layer 76. rst One of the source / drain regions 51C (first floating diffusion layer FD 1 )

[0136] Amplification transistor TR1 ampThe gate portion 52 is composed of a gate section 52, a channel forming region 52A, and source / drain regions 52B, 52C. The gate portion 52 is connected to the first electrode 21 and the reset transistor TR1 via a wiring layer 62. rst One of the source / drain regions 51C (first floating diffusion layer FD 1 ) and one of the source / drain regions 52B is connected to a power supply V DD is connected to

[0137] Selection transistor TR1 sel The gate portion 53 is composed of a gate section 53, a channel forming region 53A, and source / drain regions 53B and 53C. 1 The source / drain region 53B is connected to the amplifier transistor TR1. amp The other source / drain region 53C is connected to the signal line (data output line) VSL 1 (117).

[0138] The second imaging element 11 includes an n-type semiconductor region 41 provided on a semiconductor substrate 70 as a photoelectric conversion layer. trs The gate portion 45 of the n-type semiconductor region 41 is extended to the n-type semiconductor region 41, and the transfer gate line TG 2 Also, the transfer transistor TR2 trs In the region 45C of the semiconductor substrate 70 near the gate portion 45, a second floating diffusion layer FD 2 The charges stored in the n-type semiconductor region 41 are transferred to the second floating diffusion layer FD via a transfer channel formed along the gate portion 45. 2 is read out.

[0139] In the second imaging element 11, a reset transistor TR2 constituting a control unit of the second imaging element 11 is further provided on the first surface side of the semiconductor substrate 70. rst , amplifying transistor TR2 amp and selection transistor TR2 sel is provided.

[0140] Reset transistor TR2 rst The reset transistor TR2 is composed of a gate portion, a channel forming region, and a source / drain region. rst The gate of the reset line RST 2 connected to the reset transistor TR2 rst One of the source / drain regions is connected to the power supply V DD , and the other source / drain region is connected to the second floating diffusion layer FD 2 It also serves as a

[0141] Amplification transistor TR2 amp The reset transistor TR2 is composed of a gate portion, a channel forming region, and a source / drain region. rst The other source / drain region (second floating diffusion layer FD 2 ) and one of the source / drain regions is connected to the power supply V DD is connected to

[0142] Selection transistor TR2 sel The gate portion is composed of a gate section, a channel forming region, and a source / drain region. 2 One of the source / drain regions is connected to the amplifier transistor TR2. amp The other source / drain region is shared with the signal line (data output line) VSL 2 is connected to

[0143] The third imaging element 12 includes an n-type semiconductor region 43 provided on a semiconductor substrate 70 as a photoelectric conversion layer. trs The gate portion 46 of the transfer gate line TG 3 Also, the transfer transistor TR3 trs In the region 46C of the semiconductor substrate 70 near the gate portion 46, a third floating diffusion layer FD 3The charges stored in the n-type semiconductor region 43 are transferred to the third floating diffusion layer FD via a transfer channel 46A formed along the gate portion 46. 3 is read out.

[0144] In the third imaging element 12, a reset transistor TR3 constituting a control unit of the third imaging element 12 is further provided on the first surface side of the semiconductor substrate 70. rst , amplifying transistor TR3 amp and selection transistor TR3 sel is provided.

[0145] Reset transistor TR3 rst The reset transistor TR3 consists of a gate portion, a channel forming region, and a source / drain region. rst The gate of the reset line RST 3 connected to the reset transistor TR3 rst One of the source / drain regions is connected to the power supply V DD The other source / drain region is connected to the third floating diffusion layer FD 3 It also serves as a

[0146] Amplification transistor TR3 amp The reset transistor TR3 is composed of a gate portion, a channel forming region, and a source / drain region. rst The other source / drain region (third floating diffusion layer FD 3 ) and one of the source / drain regions is connected to the power supply V DD is connected to

[0147] Selection transistor TR3 sel The gate portion is composed of a gate section, a channel forming region, and a source / drain region. 3 One of the source / drain regions is connected to the amplifier transistor TR3. amp The other source / drain region is shared with the signal line (data output line) VSL3 is connected to

[0148] Reset line RST 1 ,RST 2 ,RST 3 , selection line SEL 1 ,SEL 2 ,SEL 3 , transfer gate line TG 2 ,T.G. 3 is connected to the vertical drive circuit 112 constituting the drive circuit, and the signal line (data output line) VSL 1 ,VSL 2 ,VSL 3 are connected to a column signal processing circuit 113 which constitutes a driving circuit.

[0149] Between the n-type semiconductor region 43 and the surface 70A of the semiconductor substrate 70, + A p-type semiconductor layer 44 is provided between the n-type semiconductor region 41 and the n-type semiconductor region 43 to suppress the generation of dark current. + The layer 42 is formed, and further, a part of the side surface of the n-type semiconductor region 43 is p + The semiconductor substrate 70 is surrounded by a layer 42. The back surface 70B of the semiconductor substrate 70 is + A layer 73 is formed, and p + The layer 73 is disposed in the area of ​​the semiconductor substrate 70 where the contact hole 61 is to be formed. 2 On the interlayer insulating layer 76, a film 74 and an insulating material film 75 are formed. Wiring is formed across a plurality of layers in the interlayer insulating layer 76, but is not shown in the figure.

[0150] HfO 2 The film 74 is a film having a negative fixed charge, and by providing such a film, it is possible to suppress the generation of dark current. 2 Instead of the film, aluminum oxide (Al 2 O 3 ) film, zirconium oxide (ZrO 2 ) film, tantalum oxide (Ta 2 O 5 ) film, titanium oxide (TiO 2 ) film, lanthanum oxide (La 2 O 3) film, praseodymium oxide (Pr 2 O 3 ) film, cerium oxide (CeO 2 ) film, neodymium oxide (Nd 2 O 3 ) film, promethium oxide (Pm 2 O 3 ) film, samarium oxide (Sm 2 O 3 ) film, europium oxide (Eu 2 O 3 ) film, gadolinium oxide ((Gd 2 O 3 ) film, terbium oxide (Tb 2 O 3 ) film, dysprosium oxide (Dy 2 O 3 ) film, holmium oxide (Ho 2 O 3 ) film, thulium oxide (Tm 2 O 3 ) film, ytterbium oxide (Yb 2 O 3 ) film, lutetium oxide (Lu 2 O 3 ) film, yttrium oxide (Y 2 O 3 Alternatively, a hafnium nitride film, an aluminum nitride film, a hafnium oxynitride film, or an aluminum oxynitride film may be used. Examples of the method for forming these films include the CVD method, the PVD method, and the ALD method.

[0151] Hereinafter, the operation of the stacked type imaging element (first imaging element 10) having the charge storage electrode of Example 1 will be described with reference to FIG. 5 and FIG. 6A. The imaging element of Example 1 is provided on a semiconductor substrate 70 and further includes a control unit having a driving circuit, and the first electrode 21, the second electrode 22, and the charge storage electrode 24 are connected to the driving circuit. Here, the potential of the first electrode 21 is set higher than the potential of the second electrode 22. That is, for example, the first electrode 21 is set to a positive potential, the second electrode 22 is set to a negative potential, and electrons generated by photoelectric conversion in the photoelectric conversion layer 23A are read out to the floating diffusion layer. The same applies to other examples. Also, in FIG. 16, FIG. 25, FIG. 28, FIG. 63, FIG. 64, FIG. 65, FIG. 66, and FIG. 67, the inorganic oxide semiconductor material layer 23C and the protective layer 23B are collectively indicated by the reference number 23D.

[0152] The symbols used in FIG. 5, FIGS. 20 and 21 in the fourth embodiment described below, and FIGS. 32 and 33 in the sixth embodiment are as follows.

[0153] P A Point P in the region of the inorganic oxide semiconductor material layer 23C facing the region located between the charge storage electrode 24 or the transfer control electrode (charge transfer electrode) 25 and the first electrode 21 A Electric potential at P B Point P in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 B Electric potential at P C1 Point P in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode segment 24A C1 Electric potential at P C2 Point P in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode segment 24B C2 Electric potential at P C3 Point P in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode segment 24C C3 Electric potential at P DPoint P in the region of the inorganic oxide semiconductor material layer 23C facing the transfer control electrode (charge transfer electrode) 25 D Electric potential at FD: First floating diffusion layer FD 1 Electric potential at V OA Potential at the charge storage electrode 24 V OA-A Potential at the charge storage electrode segment 24A V OA-B Potential at the charge storage electrode segment 24B V OA-C Potential at the charge storage electrode segment 24C V OT Potential at the transfer control electrode (charge transfer electrode) 25 RST Reset transistor TR1 rst The potential at the gate portion 51 V DD ...Power supply potential VSL 1 Signal line (data output line) VSL 1 TR1 rst Reset transistor TR1 rst TR1 amp Amplification transistor TR1 amp TR1 sel Selection transistor TR1 sel

[0154] During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode 24, and a potential V 31 A voltage V V is applied to the second electrode 22. Photoelectric conversion occurs in the photoelectric conversion layer 23A due to light incident on the photoelectric conversion layer 23A. Holes generated by the photoelectric conversion are transferred from the second electrode 22 to the wiring V OU On the other hand, since the potential of the first electrode 21 is made higher than the potential of the second electrode 22, that is, for example, a positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22, V31 ≧V 11 , preferably V 31 >V 11 As a result, electrons generated by photoelectric conversion are attracted to the charge storage electrode 24 and stay in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 or the inorganic oxide semiconductor material layer 23C, the protective layer 23B, and the photoelectric conversion layer 23A (hereinafter, these are collectively referred to as "inorganic oxide semiconductor material layer 23C, etc."). That is, charges are stored in the inorganic oxide semiconductor material layer 23C, etc. 31 >V 11 For this reason, the electrons generated inside the photoelectric conversion layer 23A do not move toward the first electrode 21. As the photoelectric conversion progresses, the potential in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 becomes more negative.

[0155] In the latter part of the charge accumulation period, a reset operation is performed. This resets the first floating diffusion layer FD 1 The potential of the first floating diffusion layer FD 1 The potential of the power supply V DD It becomes.

[0156] After the reset operation is completed, the electric charge is read out. That is, during the electric charge transfer period, the driving circuit applies a potential V 12 is applied to the charge storage electrode 24, and a potential V 32 is applied, where V 32 <V 12 As a result, the electrons that had been staying in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 are transported to the first electrode 21 and further to the first floating diffusion layer FD 1 That is, the charges stored in the inorganic oxide semiconductor material layer 23C and the like are read out to the control unit.

[0157] This completes a series of operations including charge accumulation, reset operation, and charge transfer.

[0158] First floating diffusion layer (FD) 1After the electrons are read out to the amplifier transistor TR1 amp , selection transistor TR1 sel The operation of the second imaging element 11 and the third imaging element 12 is the same as that of the conventional transistors. The series of operations of the second imaging element 11 and the third imaging element 12, such as charge accumulation, reset operation, and charge transfer, are the same as the series of operations of the conventional charge accumulation, reset operation, and charge transfer. The first floating diffusion layer FD 1 The reset noise can be removed by correlated double sampling (CDS) processing, as in the conventional method.

[0159] As described above, in the first embodiment, the charge storage electrode is disposed apart from the first electrode and opposed to the photoelectric conversion layer via the insulating layer. Therefore, when the photoelectric conversion layer is irradiated with light and photoelectric conversion is performed in the photoelectric conversion layer, a kind of capacitor is formed by the inorganic oxide semiconductor material layer, the insulating layer, and the charge storage electrode, and charges can be stored in the inorganic oxide semiconductor material layer. Therefore, at the start of exposure, it is possible to completely deplete the charge storage section and erase the charges. As a result, it is possible to suppress the occurrence of phenomena such as increased kTC noise, worsening random noise, and a decrease in image quality. In addition, since all pixels can be reset simultaneously, a so-called global shutter function can be realized.

[0160] Fig. 68 shows a conceptual diagram of a solid-state imaging device of Example 1. The solid-state imaging device 100 of Example 1 is composed of an imaging region 111 in which stacked imaging elements 101 are arranged in a two-dimensional array, and a vertical driving circuit 112, a column signal processing circuit 113, a horizontal driving circuit 114, an output circuit 115, a driving control circuit 116, and the like as driving circuits (peripheral circuits) thereof. It goes without saying that these circuits can be composed of well-known circuits, and can also be composed of other circuit configurations (for example, various circuits used in conventional CCD imaging devices and CMOS imaging devices). In Fig. 68, the reference number "101" for the stacked imaging element 101 is displayed in only one line.

[0161] The drive control circuit 116 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114, based on the vertical synchronizing signal, the horizontal synchronizing signal, and the master clock. The generated clock signals and control signals are then input to the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114.

[0162] The vertical drive circuit 112 is configured with, for example, a shift register, and sequentially selects and scans each stack-type imaging element 101 in the imaging region 111 in the vertical direction on a row-by-row basis. Then, pixel signals (image signals) based on currents (signals) generated according to the amount of light received in each stack-type imaging element 101 are sent to a column signal processing circuit 113 via signal lines (data output lines) 117 and VSL.

[0163] The column signal processing circuit 113 is arranged, for example, for each column of the stacked imaging element 101, and performs signal processing such as noise removal and signal amplification on the image signals output from one row of the stacked imaging element 101 using signals from black reference pixels (not shown, but formed around the effective pixel area) for each imaging element. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 113 and connected between the horizontal signal line 118.

[0164] The horizontal drive circuit 114 is configured by, for example, a shift register, and sequentially outputs horizontal scanning pulses to sequentially select each of the column signal processing circuits 113 and output signals from each of the column signal processing circuits 113 to a horizontal signal line 118.

[0165] The output circuit 115 processes the signals sequentially supplied from each of the column signal processing circuits 113 via a horizontal signal line 118 and outputs the processed signals.

[0166] FIG. 9 shows an equivalent circuit diagram of a modified example of the imaging element and the stacked imaging element of the first embodiment. FIG. 10 shows a schematic layout diagram of the first electrode, the charge storage electrode, and the transistors constituting the control unit. rstThe other source / drain region 51B is connected to a power supply V DD Instead of connecting to ground,

[0167] The imaging element and stacked type imaging element of the first embodiment can be fabricated, for example, by the following method. That is, first, an SOI substrate is prepared. Then, a first silicon layer is formed on the surface of the SOI substrate by epitaxial growth. + Next, a second silicon layer is formed on the first silicon layer by epitaxial growth, and an element isolation region 71, an insulating material film 72, a p + layer 42, n-type semiconductor region 43, p + A layer 44 is formed. Various transistors constituting the control section of the image sensor are formed in the second silicon layer, and a wiring layer 62, an interlayer insulating layer 76, and various wirings are formed thereon, and then the interlayer insulating layer 76 and a support substrate (not shown) are bonded together. Thereafter, the SOI substrate is removed to expose the first silicon layer. The surface of the second silicon layer corresponds to the surface 70A of the semiconductor substrate 70, and the surface of the first silicon layer corresponds to the back surface 70B of the semiconductor substrate 70. The first silicon layer and the second silicon layer are collectively referred to as the semiconductor substrate 70. Next, an opening for forming a contact hole portion 61 is formed on the back surface 70B side of the semiconductor substrate 70, and HfO 2 Then, the film 74, the insulating material film 75 and the contact hole portion 61 are formed, and further, the pad portions 63, 64, the interlayer insulating layer 81, the connection holes 65, 66, the first electrode 21, the charge storage electrode 24 and the insulating layer 82 are formed. Next, the connection portion 67 is opened, and the inorganic oxide semiconductor material layer 23C, the protective layer 23B, the photoelectric conversion layer 23A, the second electrode 22, the protective material layer 83 and the on-chip microlens 14 are formed. Through the above steps, the imaging element and the stacked type imaging element of Example 1 can be obtained.

[0168] Although not shown, the insulating layer 82 may have a two-layer structure of a lower insulating layer and an upper insulating layer. That is, the lower insulating layer is formed at least on the charge storage electrode 24 and in the region between the charge storage electrode 24 and the first electrode 21 (more specifically, the lower insulating layer is formed on the interlayer insulating layer 81 including the charge storage electrode 24), and after the lower insulating layer is planarized, the upper insulating layer is formed on the lower insulating layer and the charge storage electrode 24, thereby ensuring the planarization of the insulating layer 82. Then, the connection portion 67 is opened in the insulating layer 82 thus obtained. EXAMPLES

[0169] Example 2 is a modification of Example 1. The imaging element, stacked imaging element, of Example 2, the schematic partial cross-sectional view of which is shown in Fig. 11, is a front-illuminated imaging element, stacked imaging element, and has a structure in which three imaging elements are stacked: a first type green light imaging element (first imaging element 10) of Example 1 having sensitivity to green light and including a first type green light photoelectric conversion layer that absorbs green light, a second type conventional blue light imaging element (second imaging element 11) having sensitivity to blue light and including a second type blue light photoelectric conversion layer that absorbs blue light, and a second type conventional red light imaging element (third imaging element 12) having sensitivity to red light and including a second type red light photoelectric conversion layer that absorbs red light. Here, the red light imaging element (third imaging element 12) and the blue light imaging element (second imaging element 11) are provided in a semiconductor substrate 70, and the second imaging element 11 is located closer to the light incident side than the third imaging element 12. Moreover, the green light imaging element (first imaging element 10) is provided above the blue light imaging element (second imaging element 11).

[0170] Various transistors constituting a control unit are provided on the front surface 70A side of the semiconductor substrate 70 in the same manner as in Example 1. These transistors can be substantially similar in configuration and structure to the transistors described in Example 1. In addition, the semiconductor substrate 70 is provided with a second imaging element 11 and a third imaging element 12, and these imaging elements can also be substantially similar in configuration and structure to the second imaging element 11 and the third imaging element 12 described in Example 1.

[0171] An interlayer insulating layer 81 is formed above the surface 70A of the semiconductor substrate 70, and above the interlayer insulating layer 81, similar to the imaging element of Example 1, a first electrode 21, an inorganic oxide semiconductor material layer 23C, a protective layer 23B, a photoelectric conversion layer 23A, a second electrode 22, and a charge storage electrode 24, etc. are provided.

[0172] In this way, except for being a front-illuminated type, the configurations and structures of the imaging element and stack-type imaging element of Example 2 can be similar to the configurations and structures of the imaging element and stack-type imaging element of Example 1, and therefore detailed description thereof will be omitted. EXAMPLES

[0173] The third embodiment is a modification of the first and second embodiments.

[0174] The imaging element and stacked imaging element of Example 3, the schematic partial cross-sectional view of which is shown in FIG. 12, is a back-illuminated imaging element and stacked imaging element, and has a structure in which two imaging elements, the first imaging element 10 of Example 1 of the first type and the third imaging element 12 of the second type, are stacked. Also, the imaging element and the modified example of the stacked imaging element of Example 3, the schematic partial cross-sectional view of which is shown in FIG. 13, is a front-illuminated imaging element and stacked imaging element, and has a structure in which two imaging elements, the first imaging element 10 of Example 1 of the first type and the third imaging element 12 of the second type, are stacked. Here, the first imaging element 10 absorbs primary color light, and the third imaging element 12 absorbs complementary color light. Alternatively, the first imaging element 10 absorbs white light, and the third imaging element 12 absorbs infrared light.

[0175] The modified image sensor of the third embodiment, the schematic partial cross-sectional view of which is shown in FIG. 14, is a back-illuminated image sensor, and is composed of the first image sensor 10 of the first embodiment of the first type. The modified image sensor of the third embodiment, the schematic partial cross-sectional view of which is shown in FIG. 15, is a front-illuminated image sensor, and is composed of the first image sensor 10 of the first embodiment of the first type. Here, the first image sensor 10 is composed of three types of image sensors, an image sensor that absorbs red light, an image sensor that absorbs green light, and an image sensor that absorbs blue light. Furthermore, the solid-state image sensor according to the first aspect of the present disclosure is composed of a plurality of these image sensors. The arrangement of a plurality of these image sensors can be a Bayer arrangement. A color filter layer for performing blue, green, and red separation is arranged on the light incident side of each image sensor, as necessary.

[0176] Instead of providing one image pickup element of the first type of embodiment 1, two may be stacked (i.e., two photoelectric conversion units are stacked and control units for the two photoelectric conversion units are provided on the semiconductor substrate), or three may be stacked (i.e., three photoelectric conversion units are stacked and control units for the three photoelectric conversion units are provided on the semiconductor substrate). Examples of stacked structures of the first type image pickup element and the second type image pickup element are shown in the following table.

[0177] TIFF0007673637000001.tif156158 EXAMPLES

[0178] Example 4 is a modification of Examples 1 to 3, and relates to an imaging element or the like having a transfer control electrode (charge transfer electrode) of the present disclosure. FIG. 16 shows a schematic partial cross-sectional view of a part of the imaging element and stacked imaging element of Example 4, FIG. 17 and FIG. 18 show equivalent circuit diagrams of the imaging element and stacked imaging element of Example 4, FIG. 19 shows a schematic layout diagram of the first electrode, transfer control electrode, and charge storage electrode constituting the imaging element of Example 4, and the transistor constituting the control unit, FIG. 20 and FIG. 21 show schematic electric potential states at each part during operation of the imaging element of Example 4, and FIG. 6B shows an equivalent circuit diagram for explaining each part of the imaging element of Example 4. FIG. 22 shows a schematic layout diagram of the first electrode, transfer control electrode, and charge storage electrode constituting the photoelectric conversion unit of the imaging element of Example 4, and FIG. 23 shows a schematic perspective view of the first electrode, transfer control electrode, charge storage electrode, second electrode, and contact hole part.

[0179] The imaging element and stacked imaging element of the fourth embodiment further include a transfer control electrode (charge transfer electrode) 25 disposed between the first electrode 21 and the charge storage electrode 24, spaced apart from the first electrode 21 and the charge storage electrode 24, and disposed opposite the inorganic oxide semiconductor material layer 23C via an insulating layer 82. The transfer control electrode 25 is connected to a connection hole 68B, a pad portion 68A, and a wiring V provided in the interlayer insulating layer 81. OT 16, 25, 28, 37, 43, 46A, 46B, 47A, 47B, 66, and 67, various imaging element components located below interlayer insulating layer 81 are collectively indicated by reference number 13 for the sake of simplifying the drawings.

[0180] Hereinafter, the operation of the imaging element (first imaging element 10) of the fourth embodiment will be described with reference to Fig. 20 and Fig. 21. In Fig. 20 and Fig. 21, in particular, the potential applied to the charge accumulation electrode 24 and the point P D The values ​​of the potential at are different.

[0181] During the charge accumulation period, the driving circuit applies a potential V 11is applied to the charge storage electrode 24, and a potential V 31 is applied to the transfer control electrode 25, and a potential V 51 A voltage V V is applied to the second electrode 22. Photoelectric conversion occurs in the photoelectric conversion layer 23A due to light incident on the photoelectric conversion layer 23A. Holes generated by the photoelectric conversion are transferred from the second electrode 22 to the wiring V OU On the other hand, since the potential of the first electrode 21 is made higher than the potential of the second electrode 22, that is, for example, a positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22, V 31 >V 51 (For example, V 31 >V 11 >V 51 , or V 11 >V 31 >V 51 ) As a result, electrons generated by photoelectric conversion are attracted to the charge storage electrode 24 and stay in the region of the inorganic oxide semiconductor material layer 23C, etc., facing the charge storage electrode 24. That is, charges are stored in the inorganic oxide semiconductor material layer 23C, etc. 31 >V 51 Therefore, it is possible to reliably prevent electrons generated inside the photoelectric conversion layer 23A from moving toward the first electrode 21. As the photoelectric conversion progresses, the potential in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 becomes more negative.

[0182] In the latter part of the charge accumulation period, a reset operation is performed. This resets the first floating diffusion layer FD 1 The potential of the first floating diffusion layer FD 1 The potential of the power supply V DD It becomes.

[0183] After the reset operation is completed, the electric charge is read out. That is, during the electric charge transfer period, the driving circuit applies a potential V 12 is applied to the charge storage electrode 24, and a potential V 32 is applied to the transfer control electrode 25, and a potential V 52 is applied, where V 32 ≦V 52 ≦V12 (Preferably, V 32 <V 52 <V 12 As a result, the electrons that had been staying in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 are transported to the first electrode 21 and further to the first floating diffusion layer FD 1 That is, the charges stored in the inorganic oxide semiconductor material layer 23C and the like are read out to the control unit.

[0184] This completes a series of operations including charge accumulation, reset operation, and charge transfer.

[0185] First floating diffusion layer (FD) 1 After the electrons are read out to the amplifier transistor TR1 amp , selection transistor TR1 sel The operations of the second imaging element 11 and the third imaging element 12 are the same as those of the conventional transistors. Also, for example, a series of operations such as charge accumulation, reset operation, and charge transfer of the second imaging element 11 and the third imaging element 12 are the same as the series of operations such as charge accumulation, reset operation, and charge transfer of the conventional transistors.

[0186] FIG. 24 shows a schematic layout diagram of the first electrode and the charge storage electrode constituting the modified image sensor of the fourth embodiment, and the transistors constituting the control unit. rst The other source / drain region 51B is connected to a power supply V DD Instead of connecting to ground, EXAMPLES

[0187] Example 5 is a modification of Examples 1 to 4, and relates to an imaging element including a charge discharging electrode of the present disclosure, etc. Fig. 25 shows a schematic partial cross-sectional view of a part of the imaging element of Example 5, Fig. 26 shows a schematic layout diagram of a first electrode, a charge storage electrode, and a charge discharging electrode that configure a photoelectric conversion unit including a charge storage electrode of the imaging element of Example 5, and Fig. 27 shows a schematic perspective view of the first electrode, the charge storage electrode, the charge discharging electrode, the second electrode, and a contact hole portion.

[0188] The imaging element of the fifth embodiment further includes a charge discharge electrode 26 that is connected to the inorganic oxide semiconductor material layer 23C via a connection portion 69 and is disposed apart from the first electrode 21 and the charge storage electrode 24. Here, the charge discharge electrode 26 is disposed so as to surround the first electrode 21 and the charge storage electrode 24 (i.e., in a frame shape). The charge discharge electrode 26 is connected to a pixel driving circuit that constitutes a driving circuit. The inorganic oxide semiconductor material layer 23C and the protective layer 23B extend within the connection portion 69. That is, the inorganic oxide semiconductor material layer 23C and the protective layer 23B extend within a second opening 85 provided in the insulating layer 82, and the inorganic oxide semiconductor material layer 23C is connected to the charge discharge electrode 26. The charge discharge electrode 26 is shared (commonly used) by a plurality of imaging elements. A slope that widens upward may be formed on the side surface of the second opening 85. The charge discharging electrode 26 can be used, for example, as a floating diffusion or an overflow drain of the photoelectric conversion section.

[0189] In the fifth embodiment, during the charge accumulation period, the driving circuit applies a potential V 11 is applied to the charge storage electrode 24, and a potential V 31 is applied to the charge discharging electrode 26, and a potential V 61 A voltage is applied to the photoelectric conversion layer 23A, and charges are accumulated in the inorganic oxide semiconductor material layer 23C and the like. Photoelectric conversion occurs in the photoelectric conversion layer 23A due to light incident on the photoelectric conversion layer 23A. Holes generated by the photoelectric conversion are transported from the second electrode 22 to the wiring V OU On the other hand, since the potential of the first electrode 21 is made higher than the potential of the second electrode 22, that is, for example, a positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22, V 61 >V 11 (For example, V 31 >V 61 >V 11). This ensures that electrons generated by photoelectric conversion are attracted to the charge storage electrode 24 and remain in the region of the inorganic oxide semiconductor material layer 23C or the like facing the charge storage electrode 24, and are reliably prevented from moving toward the first electrode 21. However, electrons that are not sufficiently attracted by the charge storage electrode 24 or that cannot be stored in the inorganic oxide semiconductor material layer 23C or the like (so-called overflow electrons) are sent to the drive circuit via the charge discharge electrode 26.

[0190] In the latter part of the charge accumulation period, a reset operation is performed. This resets the first floating diffusion layer FD 1 The potential of the first floating diffusion layer FD 1 The potential of the power supply V DD It becomes.

[0191] After the reset operation is completed, the electric charge is read out. That is, during the electric charge transfer period, the driving circuit applies a potential V 12 is applied to the charge storage electrode 24, and a potential V 32 is applied to the charge discharging electrode 26, and a potential V 62 is applied, where V 62 <V 12 (For example, V 62 <V 32 <V 12 As a result, the electrons that had been staying in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 are transported to the first electrode 21 and further to the first floating diffusion layer FD 1 That is, the charges stored in the inorganic oxide semiconductor material layer 23C and the like are read out to the control unit.

[0192] This completes a series of operations including charge accumulation, reset operation, and charge transfer.

[0193] First floating diffusion layer (FD) 1 After the electrons are read out to the amplifier transistor TR1 amp , selection transistor TR1 selThe operations of the second and third imaging elements are the same as those of the conventional transistors. Also, for example, a series of operations such as charge accumulation, reset operation, and charge transfer of the second and third imaging elements are the same as the series of operations such as charge accumulation, reset operation, and charge transfer of the conventional transistors.

[0194] In the fifth embodiment, so-called overflowed electrons are sent to the drive circuit via the charge discharging electrode 26, so that leakage into the charge storage section of the adjacent pixel can be suppressed, and the occurrence of blooming can be suppressed. This improves the imaging performance of the image sensor. EXAMPLES

[0195] Example 6 is a modification of Examples 1 to 5, and relates to an imaging element and the like including a plurality of charge storage electrode segments according to the present disclosure.

[0196] A schematic partial cross-sectional view of a part of the image sensor of Example 6 is shown in Fig. 28, equivalent circuit diagrams of the image sensor of Example 6 are shown in Fig. 29 and Fig. 30, a schematic layout diagram of the first electrode and charge storage electrode constituting the photoelectric conversion unit having the charge storage electrode of the image sensor of Example 6 and the transistor constituting the control unit is shown in Fig. 31, the state of electric potential at each part during operation of the image sensor of Example 6 is shown in Fig. 32 and Fig. 33, and an equivalent circuit diagram for explaining each part of the image sensor of Example 6 is shown in Fig. 6C. In addition, a schematic layout diagram of the first electrode and charge storage electrode constituting the photoelectric conversion unit having the charge storage electrode of the image sensor of Example 6 is shown in Fig. 34, and a schematic perspective view of the first electrode, the charge storage electrode, the second electrode, and the contact hole part is shown in Fig. 35.

[0197] In the sixth embodiment, the charge storage electrode 24 is composed of a plurality of charge storage electrode segments 24A, 24B, and 24C. The number of the charge storage electrode segments may be two or more, and is set to "3" in the sixth embodiment. In the imaging element of the sixth embodiment, the potential of the first electrode 21 is higher than the potential of the second electrode 22. That is, for example, a positive potential is applied to the first electrode 21, and a negative potential is applied to the second electrode 22. In the charge transfer period, the potential applied to the charge storage electrode segment 24A located closest to the first electrode 21 is higher than the potential applied to the charge storage electrode segment 24C located farthest from the first electrode 21. In this way, by applying a potential gradient to the charge storage electrode 24, the electrons that have remained in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 move toward the first electrode 21 and further to the first floating diffusion layer FD. 1 That is, the charges stored in the inorganic oxide semiconductor material layer 23C and the like are read out to the control unit.

[0198] In the example shown in FIG. 32, during the charge transfer period, the potential of the charge storage electrode segment 24C is set to be less than the potential of the charge storage electrode segment 24B and less than the potential of the charge storage electrode segment 24A, so that the electrons that have been staying in the region of the inorganic oxide semiconductor material layer 23C and the like are simultaneously transferred to the first floating diffusion layer FD 133, during the charge transfer period, the potentials of the charge storage electrode segment 24C, the charge storage electrode segment 24B, and the charge storage electrode segment 24A are gradually changed (i.e., changed in a step-like or slope-like manner) to move the electrons that have stayed in the region of the inorganic oxide semiconductor material layer 23C, etc., facing the charge storage electrode segment 24C to the region of the inorganic oxide semiconductor material layer 23C, etc., facing the charge storage electrode segment 24B, and then the electrons that have stayed in the region of the inorganic oxide semiconductor material layer 23C, etc., facing the charge storage electrode segment 24B are moved to the region of the inorganic oxide semiconductor material layer 23C, etc., facing the charge storage electrode segment 24A, and then the electrons that have stayed in the region of the inorganic oxide semiconductor material layer 23C, etc., facing the charge storage electrode segment 24A are moved to the first floating diffusion layer FD 1 to be read out reliably.

[0199] FIG. 36 shows a schematic layout diagram of the first electrode and the charge storage electrode constituting the modified example of the image sensor of the sixth embodiment, and the transistors constituting the control unit. rst The other source / drain region 51B is connected to a power supply V DD Instead of connecting to ground, EXAMPLES

[0200] Example 7 is a modification of Examples 1 to 6, and relates to an imaging element having a charge transfer control electrode of the present disclosure, specifically, an imaging element having a lower charge transfer control electrode (lower charge transfer control electrode) of the present disclosure. FIG. 37 shows a schematic partial cross-sectional view of a part of the imaging element of Example 7, FIG. 38 shows a schematic layout diagram of the first electrode and charge storage electrode constituting the imaging element of Example 7 and the transistor constituting the control unit, and FIG. 39 and FIG. 40 show schematic layout diagrams of the first electrode, charge storage electrode and lower charge transfer control electrode constituting the photoelectric conversion unit having the charge storage electrode of the imaging element of Example 7. In FIG. 37, FIG. 43, FIG. 46A, FIG. 46B, FIG. 47A and FIG. 47B, the photoelectric conversion layer 23A, the protective layer 23B and the inorganic oxide semiconductor material layer 23C are collectively illustrated as the photoelectric conversion laminate 23.

[0201] In the imaging element of Example 7, the region (region-A of the photoelectric conversion layer) 23 of the photoelectric conversion stack 23 located between the adjacent imaging elements A The lower charge transfer control electrode 27 is formed in a region facing the charge storage electrodes 24 of the adjacent image pickup elements via the insulating layer 82. In other words, the portion 82 of the insulating layer 82 in the region (region-a) sandwiched between the charge storage electrodes 24 of the adjacent image pickup elements (region-A of the insulating layer 82) A The lower charge transfer control electrode 27 is formed below the charge storage electrode 24. The lower charge transfer control electrode 27 is provided at a distance from the charge storage electrode 24. In other words, the lower charge transfer control electrode 27 surrounds the charge storage electrode 24 and is provided at a distance from the charge storage electrode 24. The lower charge transfer control electrode 27 is connected to the region-A (23) of the photoelectric conversion layer via an insulating layer 82. A The lower charge transfer control electrode 27 is connected to the drive circuit. Specifically, the lower charge transfer control electrode 27 is formed by a connection hole 27A, a pad portion 27B, and a wiring V, which are provided in the interlayer insulating layer 81. OBvia the lower charge transfer control electrode 27, which is connected to the vertical drive circuit 112 constituting the drive circuit. The lower charge transfer control electrode 27 may be formed at the same level as the first electrode 21 or the charge storage electrode 24, or may be formed at a different level (specifically, at a level lower than the first electrode 21 or the charge storage electrode 24). In the former case, the distance between the charge transfer control electrode 27 and the photoelectric conversion layer 23A can be shortened, making it easier to control the potential. On the other hand, in the latter case, the distance between the charge transfer control electrode 27 and the charge storage electrode 24 can be shortened, which is advantageous for miniaturization.

[0202] In the imaging element of the seventh embodiment, when light is incident on the photoelectric conversion layer 23A and photoelectric conversion occurs in the photoelectric conversion layer 23A, the absolute value of the potential applied to the portion of the photoelectric conversion layer 23A facing the charge storage electrode 24 is greater than the absolute value of the potential applied to the region-A of the photoelectric conversion layer 23A, so that the charge generated by the photoelectric conversion is strongly attracted to the portion of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24. As a result, it is possible to prevent the charge generated by the photoelectric conversion from flowing into the adjacent imaging element, so that the quality of the captured image (image) is not deteriorated. Alternatively, since the lower charge transfer control electrode 27 is formed in the region facing the region-A of the photoelectric conversion layer 23A via an insulating layer, the electric field and potential of the region-A of the photoelectric conversion layer 23A located above the lower charge transfer control electrode 27 can be controlled. As a result, the lower charge transfer control electrode 27 can prevent the charge generated by photoelectric conversion from flowing into the adjacent imaging element, so that the quality of the captured video (image) is not degraded.

[0203] In the example shown in FIG. 39 and FIG. 40, a portion 82 of the insulating layer 82 in a region (region-a) sandwiched between the charge storage electrodes 24 is A41, 42A, and 42B, the lower charge transfer control electrode 27 is formed under the insulating layer 82 in the region surrounded by the four charge storage electrodes 24. The examples shown in FIGS. 41, 42A, and 42B also include solid-state imaging devices of the first and second configurations. In the four imaging elements, a common first electrode 21 is provided corresponding to the four charge storage electrodes 24.

[0204] 42B, one common first electrode 21 is provided in four imaging elements corresponding to four charge storage electrodes 24, a lower charge transfer control electrode 27 is formed below a portion of the insulating layer 82 in the region surrounded by the four charge storage electrodes 24, and further, a charge discharge electrode 26 is formed below a portion of the insulating layer 82 in the region surrounded by the four charge storage electrodes 24. As described above, the charge discharge electrode 26 can be used, for example, as a floating diffusion or overflow drain of the photoelectric conversion unit. EXAMPLES

[0205] Example 8 is a modification of Examples 1 to 7, and relates to an imaging element or the like including an upper charge transfer control electrode (upper charge transfer control electrode) of the present disclosure. FIG. 43 shows a schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Example 8, and FIGS. 44 and 45 show schematic plan views of a portion of the imaging element (2×2 imaging elements arranged side by side) of Example 8. In the imaging element of Example 8, region 23 of photoelectric conversion stack 23 located between adjacent imaging elements A Instead of forming the second electrode 22, an upper charge transfer control electrode 28 is formed on the photoelectric conversion stack 23. The upper charge transfer control electrode 28 is provided spaced apart from the second electrode 22. In other words, the second electrode 22 is provided for each imaging element, and the upper charge transfer control electrode 28 is provided on the region-A of the photoelectric conversion stack 23, surrounding at least a portion of the second electrode 22 and spaced apart from the second electrode 22. The upper charge transfer control electrode 28 is formed at the same level as the second electrode 22.

[0206] In the example shown in Fig. 44, one charge accumulation electrode 24 is provided in one imaging element corresponding to one first electrode 21. On the other hand, in the modified example shown in Fig. 45, one common first electrode 21 is provided in two imaging elements corresponding to two charge accumulation electrodes 24. A schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Example 8 shown in Fig. 43 corresponds to Fig. 45.

[0207] 46A is a schematic cross-sectional view of a portion of the imaging element (two imaging elements arranged side by side) of Example 8, the second electrode 22 may be divided into a plurality of portions, and different potentials may be applied to each divided second electrode 22. Furthermore, as shown in FIG. 46B, an upper charge transfer control electrode 28 may be provided between the divided second electrodes 22.

[0208] In the eighth embodiment, the second electrode 22 located on the light incident side is shared among the imaging elements arranged in the left-right direction of the paper surface of FIG. 44, and is shared among a pair of imaging elements arranged in the up-down direction of the paper surface of FIG. 44. The upper charge transfer control electrode 28 is also shared among the imaging elements arranged in the left-right direction of the paper surface of FIG. 44, and is also shared among a pair of imaging elements arranged in the up-down direction of the paper surface of FIG. 44. The second electrode 22 and the upper charge transfer control electrode 28 can be obtained by forming a material layer constituting the second electrode 22 and the upper charge transfer control electrode 28 on the photoelectric conversion laminate 23, and then patterning the material layer. The second electrode 22 and the upper charge transfer control electrode 28 are each separately connected to wiring (not shown), and these wirings are connected to a driving circuit. The wiring connected to the second electrode 22 is shared among a plurality of imaging elements. The wiring connected to the upper charge transfer control electrode 28 is also shared among a plurality of imaging elements.

[0209] In the image sensor of the eighth embodiment, during the charge accumulation period, the driving circuit applies a potential V 21 is applied to the upper charge transfer control electrode 28, and a potential V 41is applied, charges are accumulated in the photoelectric conversion stack 23, and during the charge transfer period, a potential V 22 is applied to the upper charge transfer control electrode 28, and a potential V 42 is applied, and the charge stored in the photoelectric conversion stack 23 is read out to the control unit via the first electrode 21. Here, since the potential of the first electrode 21 is higher than the potential of the second electrode 22, V 21 ≧V 41 , and V 22 ≧V 42 It is.

[0210] As described above, in the imaging element of Example 8, instead of a second electrode being formed on the region of the photoelectric conversion layer located between adjacent imaging elements, a charge transfer control electrode is formed. Therefore, the charge transfer control electrode can prevent the charge generated by photoelectric conversion from flowing into the adjacent imaging element, and therefore no degradation in quality occurs in the captured video (image).

[0211] A schematic cross-sectional view of a portion of a modified example of the imaging element (two imaging elements arranged side by side) of Example 8 is shown in Fig. 47A, and schematic plan views of the portion are shown in Fig. 48A and Fig. 48B. In this modified example, the second electrode 22 is provided for each imaging element, the upper charge transfer control electrode 28 is provided so as to surround at least a portion of the second electrode 22 and be spaced apart from the second electrode 22, and a portion of the charge storage electrode 24 exists below the upper charge transfer control electrode 28. The second electrode 22 is provided above the charge storage electrode 24 and has a size smaller than that of the charge storage electrode 24.

[0212] A schematic cross-sectional view of a part of a modified example of the imaging element (two imaging elements arranged side by side) of Example 8 is shown in FIG. 47B, and schematic plan views of the part are shown in FIG. 49A and FIG. 49B. In this modified example, the second electrode 22 is provided for each imaging element, the upper charge transfer control electrode 28 is provided to surround at least a part of the second electrode 22 and spaced apart from the second electrode 22, a part of the charge storage electrode 24 exists below the upper charge transfer control electrode 28, and a lower charge transfer control electrode (lower charge transfer control electrode) 27 is provided below the upper charge transfer control electrode (upper charge transfer control electrode) 28. The size of the second electrode 22 is smaller than that of the modified example shown in FIG. 47A. That is, the area of ​​the second electrode 22 facing the upper charge transfer control electrode 28 is located closer to the first electrode 21 than the area of ​​the second electrode 22 facing the upper charge transfer control electrode 28 in the modified example shown in FIG. 47A. The charge storage electrode 24 is surrounded by a lower charge transfer control electrode 27 . EXAMPLES

[0213] The ninth embodiment relates to a solid-state imaging device having the first and second configurations.

[0214] The solid-state imaging device of the ninth embodiment is The photoelectric conversion section is formed by stacking a first electrode 21, an inorganic oxide semiconductor material layer 23C, a protective layer 23B, a photoelectric conversion layer 23A, and a second electrode 22. The photoelectric conversion unit further includes a plurality of image pickup elements each including a charge storage electrode 24 disposed apart from the first electrode 21 and facing the inorganic oxide semiconductor material layer 23C with an insulating layer 82 interposed therebetween; An imaging element block is composed of a plurality of imaging elements, The first electrode 21 is shared by a plurality of imaging elements that form an imaging element block.

[0215] Alternatively, the solid-state imaging device of the ninth embodiment includes a plurality of imaging elements described in the first to eighth embodiments.

[0216] In the ninth embodiment, one floating diffusion layer is provided for multiple image sensors. By appropriately controlling the timing of the charge transfer period, the multiple image sensors can share one floating diffusion layer. In this case, the multiple image sensors can share one contact hole.

[0217] Incidentally, except for the fact that the first electrode 21 is shared among the multiple imaging elements that constitute the imaging element block, the solid-state imaging device of Example 9 has substantially the same configuration and structure as the solid-state imaging devices described in Examples 1 to 8.

[0218] The arrangement of the first electrode 21 and the charge storage electrode 24 in the solid-state imaging device of the embodiment 9 is shown in FIG. 50 (embodiment 9), FIG. 51 (first modified example of embodiment 9), FIG. 52 (second modified example of embodiment 9), FIG. 53 (third modified example of embodiment 9), and FIG. 54 (fourth modified example of embodiment 9). 16 imaging elements are shown in FIG. 50, FIG. 51, FIG. 54, and FIG. 55, and 12 imaging elements are shown in FIG. 52 and FIG. 53. An imaging element block is composed of two imaging elements. The imaging element block is shown surrounded by a dotted line. The subscripts attached to the first electrode 21 and the charge storage electrode 24 are for distinguishing the first electrode 21 and the charge storage electrode 24. The same applies to the following description. In addition, one on-chip microlens (not shown in FIG. 50 to FIG. 57) is arranged above one imaging element. In one imaging element block, two charge storage electrodes 24 are arranged with the first electrode 21 between them (see Figs. 50 and 51). Alternatively, one first electrode 21 is arranged facing two juxtaposed charge storage electrodes 24 (see Figs. 54 and 55). That is, the first electrode is arranged adjacent to the charge storage electrodes of each imaging element. Alternatively, the first electrode is arranged adjacent to some of the charge storage electrodes of the multiple imaging elements, but not adjacent to the remaining charge storage electrodes of the multiple imaging elements (see Figs. 52 and 53). In this case, the movement of charges from the remaining multiple imaging elements to the first electrode is via some of the multiple imaging elements. It is preferable that the distance A between the charge storage electrode constituting the imaging element and the charge storage electrode constituting the imaging element is longer than the distance B between the first electrode and the charge storage electrode of the imaging element adjacent to the first electrode in order to ensure the movement of charges from each imaging element to the first electrode. It is also preferable to increase the value of the distance A for an imaging element located farther from the first electrode. In the examples shown in Figs. 51, 53 and 55, a charge transfer control electrode 27 is disposed between a plurality of imaging elements constituting an imaging element block. By disposing the charge transfer control electrode 27, it is possible to reliably suppress the transfer of charges in imaging element blocks located on either side of the charge transfer control electrode 27. The potential applied to the charge transfer control electrode 27 is V 17 Then, V31 >V 17 This can be done as follows.

[0219] The charge transfer control electrode 27 may be formed on the first electrode side at the same level as the first electrode 21 or the charge storage electrode 24, or may be formed at a different level (specifically, at a level lower than the first electrode 21 or the charge storage electrode 24). In the former case, the distance between the charge transfer control electrode 27 and the photoelectric conversion layer can be shortened, making it easier to control the potential. On the other hand, in the latter case, the distance between the charge transfer control electrode 27 and the charge storage electrode 24 can be shortened, which is advantageous for miniaturization.

[0220] Below, the first electrode 21 2 and two charge storage electrodes 24 21 ,twenty four 22 The operation of the imaging element block constructed as above will be described.

[0221] During the charge accumulation period, the driving circuit outputs a signal to the first electrode 21 2 potential V 11 is applied to the charge storage electrode 24 21 ,twenty four 22 potential V 31 A voltage V V is applied to the second electrode 22. Photoelectric conversion occurs in the photoelectric conversion layer 23A due to light incident on the photoelectric conversion layer 23A. Holes generated by the photoelectric conversion are transferred from the second electrode 22 to the wiring V OU On the other hand, the first electrode 21 2 potential V 11 the potential V of the second electrode 22 21 That is, for example, the first electrode 21 2 A positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22. 31 ≧V 11 , preferably V 31 >V 11 As a result, the electrons generated by photoelectric conversion are transferred to the charge storage electrode 24 21 ,twenty four 22 is attracted to the charge storage electrode 24 21 ,twenty four 22That is, charges are accumulated in the inorganic oxide semiconductor material layer 23C, etc. 31 ≧V 11 Therefore, the electrons generated inside the photoelectric conversion layer 23A are transferred to the first electrode 21 2 As the photoelectric conversion time elapses, the charge storage electrode 24 21 ,twenty four 22 The potential in the region of the inorganic oxide semiconductor material layer 23C facing the inorganic oxide semiconductor material layer 23B becomes a more negative value.

[0222] In the latter part of the charge accumulation period, a reset operation is performed. This resets the potential of the first floating diffusion layer, and the potential of the first floating diffusion layer becomes equal to the power supply potential V DD It becomes.

[0223] After the reset operation is completed, the charge is read out. That is, during the charge transfer period, the drive circuit 2 potential V 21 is applied to the charge storage electrode 24 21 potential V 32-A is applied to the charge storage electrode 24 22 potential V 32-B is applied, where V 32-A <V 21 <V 32-B As a result, the charge storage electrode 24 21 The electrons that had been staying in the region of the inorganic oxide semiconductor material layer 23C facing the first electrode 21 2 , and is further read out to the first floating diffusion layer. 21 The charge stored in the region of the inorganic oxide semiconductor material layer 23C facing the V 32-B ≦V 32-A <V 21 In the examples shown in Figures 54 and 55, V 32-B <V 21 <V 32-A As a result, the charge storage electrode 24 22 The electrons that had been staying in the region of the inorganic oxide semiconductor material layer 23C facing the first electrode 212 52 and 53, the charge storage electrode 24 22 The electrons that have stayed in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 22 The first electrode 21 is adjacent to 3 In this way, the charge storage electrode 24 may be read out to the first floating diffusion layer. 22 The charge stored in the region of the inorganic oxide semiconductor material layer 23C facing the charge storage electrode 24 is read out to the control unit. 21 When the readout of the charges accumulated in the region of the inorganic oxide semiconductor material layer 23C facing the first floating diffusion layer to the control unit is completed, the potential of the first floating diffusion layer may be reset.

[0224] FIG. 58A shows an example of readout driving in the image sensor block of the ninth embodiment. [Step-A] Autozero signal input to comparator [Step B] Reset operation of a shared floating diffusion layer [Step-C] Charge storage electrode 24 21 P-phase readout and first electrode 21 in the imaging element corresponding to 2 Charge transfer to [Step-D] Charge storage electrode 24 21 D-phase readout and first electrode 21 in the imaging element corresponding to 2 Charge transfer to [Step-E] Reset operation of a shared floating diffusion layer [Step-F] Autozero signal input to comparator [Step-G] Charge storage electrode 24 22 P-phase readout and first electrode 21 in the imaging element corresponding to 2 Charge transfer to [Step-H] Charge storage electrode 24 22D-phase readout and first electrode 21 in the imaging element corresponding to 2 Charge transfer to In this manner, the charge storage electrode 24 21 and charge storage electrode 24 22 Based on the correlated double sampling (CDS) process, the difference between the P-phase readout in [Step-C] and the D-phase readout in [Step-D] is input to the charge storage electrode 24 21 The difference between the P-phase readout in [Step-G] and the D-phase readout in [Step-H] is the signal from the image sensor corresponding to the charge storage electrode 24 22 This is a signal from the imaging element corresponding to

[0225] The operation of [Step-E] may be omitted (see FIG. 58B). Also, the operation of [Step-F] may be omitted. In this case, [Step-G] can be omitted (see FIG. 58C). The difference between the P-phase readout in [Step-C] and the D-phase readout in [Step-D] is calculated by dividing the charge accumulation electrode 24 21 The difference between the D-phase readout in [Step-D] and the D-phase readout in [Step-H] is the signal from the image sensor corresponding to 22 The signal from the imaging element corresponds to the

[0226] In the modifications in which the arrangement of the first electrodes 21 and the charge storage electrodes 24 is typically shown in Fig. 56 (sixth modification of the ninth embodiment) and Fig. 57 (seventh modification of the ninth embodiment), an imaging element block is made up of four imaging elements. The operation of these solid-state imaging devices can be substantially the same as the operation of the solid-state imaging devices shown in Figs. 50 to 55.

[0227] In the solid-state imaging device of Example 9, the first electrode is shared by the multiple imaging elements constituting the imaging element block, so that the configuration and structure of the pixel region in which the multiple imaging elements are arranged can be simplified and miniaturized. Note that the multiple imaging elements provided for one floating diffusion layer may be composed of multiple first type imaging elements, or may be composed of at least one first type imaging element and one or more second type imaging elements. EXAMPLES

[0228] Example 10 is a modification of Example 9. In the solid-state imaging device of Example 10, in which the arrangement of the first electrodes 21 and the charge storage electrodes 24 is shown in Figs. 59, 60, 61 and 62, an imaging element block is composed of two imaging elements. An on-chip microlens 14 is disposed above the imaging element block. In the example shown in Figs. 60 and 62, a charge transfer control electrode 27 is disposed between the imaging elements constituting the imaging element block.

[0229] For example, the charge storage electrode 24 constituting the image sensor block 11 ,twenty four 21 ,twenty four 31 ,twenty four 41 The photoelectric conversion layer corresponding to has high sensitivity to incident light from the diagonal upper right of the drawing. 12 ,twenty four 22 ,twenty four 32 ,twenty four 42 The photoelectric conversion layer corresponding to the charge storage electrode 24 has high sensitivity to incident light from the upper left in the drawing. 11 and a charge storage electrode 24 12 By combining it with an image sensor having the charge storage electrode 24, it is possible to obtain an image plane phase difference signal. 11 A signal from an imaging element having a charge storage electrode 24 12In the example shown in FIG. 59, if signals from an image sensor having a charge storage electrode 24 are added, a single image sensor can be formed by combining these image sensors. 11 and charge storage electrode 24 12 A first electrode 21 is disposed between the 1 However, as shown in the example of FIG. 61, two charge storage electrodes 24 are arranged side by side. 11 ,twenty four 12 A first electrode 21 faces the 1 By providing the above, the sensitivity can be further improved.

[0230] Although the present disclosure has been described above based on preferred embodiments, the present disclosure is not limited to these embodiments. The structures and configurations, manufacturing conditions, manufacturing methods, and materials used of the imaging element, stacked imaging element, and solid-state imaging device described in the embodiments are examples and can be appropriately changed. The imaging elements of each embodiment can be appropriately combined. The configuration and structure of the imaging element of the present disclosure can be applied to a light-emitting element, for example, an organic EL element, or to a channel formation region of a thin film transistor.

[0231] In some cases, as mentioned above, a floating diffusion layer (FD) 1 ,FD 2 ,FD 3 , 51C, 45C, and 46C can also be shared.

[0232] 63 shows, for example, a modified example of the imaging element and stacked imaging element described in the first embodiment, in which light is incident from the second electrode 22 side and a light shielding layer 15 is formed on the light incident side of the second electrode 22. Note that various wirings provided on the light incident side of the photoelectric conversion layer can also function as a light shielding layer.

[0233] In the example shown in Fig. 63, the light-shielding layer 15 is formed above the second electrode 22, that is, the light-incident side from the second electrode 22, and above the first electrode 21, but it may be disposed on the light-incident surface of the second electrode 22 as shown in Fig. 64. In some cases, the light-shielding layer 15 may be formed on the second electrode 22 as shown in Fig. 65.

[0234] Alternatively, a structure may be used in which light is incident from the second electrode 22 side and light is not incident on the first electrode 21. Specifically, as shown in FIG. 63, a light shielding layer 15 is formed above the first electrode 21 on the light incident side from the second electrode 22. Alternatively, as shown in FIG. 67, a structure may be used in which an on-chip microlens 14 is provided above the charge storage electrode 24 and the second electrode 22, and light incident on the on-chip microlens 14 is focused on the charge storage electrode 24 and does not reach the first electrode 21. As described in the fourth embodiment, when the transfer control electrode 25 is provided, a form in which light is not incident on the first electrode 21 and the transfer control electrode 25 may be used. Specifically, as shown in FIG. 66, a structure in which a light shielding layer 15 is formed above the first electrode 21 and the transfer control electrode 25 may be used. Alternatively, a structure may be used in which the light incident on the on-chip microlens 14 does not reach the first electrode 21 or the first electrode 21 and the transfer control electrode 25 .

[0235] By adopting these configurations and structures, or by providing a light-shielding layer 15 so that light is incident only on the portion of the photoelectric conversion unit located above the charge storage electrode 24, or by designing the on-chip microlens 14, the portion of the photoelectric conversion unit located above the first electrode 21 (or above the first electrode 21 and the transfer control electrode 25) will not contribute to photoelectric conversion, so that all pixels can be reset simultaneously more reliably, and the global shutter function can be realized more easily. That is, in a method for driving a solid-state imaging device equipped with a plurality of imaging elements having these configurations and structures, In all the imaging elements, charges are simultaneously stored in the inorganic oxide semiconductor material layer 23C, etc., while the charges in the first electrode 21 are discharged to the outside of the system, and then, In all of the imaging elements, the electric charges accumulated in the inorganic oxide semiconductor material layer 23C and the like are transferred to the first electrode 21 at the same time, and after the transfer is completed, the electric charges transferred to the first electrode 21 are read out in sequence in each imaging element. Each step is repeated.

[0236] In such a method for driving a solid-state imaging device, each imaging element has a structure in which light incident from the second electrode side does not enter the first electrode, and in all imaging elements, charges are simultaneously accumulated in the inorganic oxide semiconductor material layer, etc. while the charges in the first electrode are discharged to the outside of the system, so that the first electrodes can be reliably reset simultaneously in all imaging elements. Then, in all imaging elements, the charges accumulated in the inorganic oxide semiconductor material layer, etc. are simultaneously transferred to the first electrode, and after the transfer is completed, the charges transferred to the first electrode are read out in each imaging element in sequence. Therefore, a so-called global shutter function can be easily realized.

[0237] When one layer of inorganic oxide semiconductor material layer 23C and protective layer 23B is formed common to a plurality of imaging elements, it is desirable from the viewpoint of protecting the ends of inorganic oxide semiconductor material layer 23C and protective layer 23B that at least the ends of inorganic oxide semiconductor material layer 23C and protective layer 23B are covered with photoelectric conversion layer 23A. The structure of the imaging element in such a case may be a structure as illustrated at the right end of inorganic oxide semiconductor material layer 23C and protective layer 23B in a schematic cross-sectional view shown in FIG.

[0238] As a modification of the fourth embodiment, as shown in Fig. 67, a plurality of transfer control electrodes may be provided from the position closest to the first electrode 21 toward the charge storage electrode 24. Fig. 67 shows an example in which two transfer control electrodes 25A and 25B are provided. An on-chip microlens 14 is provided above the charge storage electrode 24 and the second electrode 22, and a structure in which light incident on the on-chip microlens 14 is collected on the charge storage electrode 24 and does not reach the first electrode 21 and the transfer control electrodes 25A and 25B may also be used.

[0239] The first electrode 21 may also be configured to extend within an opening 85 provided in the insulating layer 82 and to be connected to the inorganic oxide semiconductor material layer 23C.

[0240] In the embodiment, the present invention is applied to a CMOS type solid-state imaging device in which unit pixels that detect a signal charge corresponding to the amount of incident light as a physical quantity are arranged in a matrix, but the present invention is not limited to the application to a CMOS type solid-state imaging device, and can also be applied to a CCD type solid-state imaging device. In the latter case, the signal charge is transferred vertically by a vertical transfer register of a CCD type structure, transferred horizontally by a horizontal transfer register, and amplified to output a pixel signal (image signal). In addition, the present invention is not limited to all column-type solid-state imaging devices in which pixels are formed in a two-dimensional matrix and a column signal processing circuit is arranged for each pixel column. Furthermore, in some cases, the selection transistor can be omitted.

[0241] Furthermore, the imaging element and stacked imaging element of the present disclosure are not limited to application to solid-state imaging devices that detect the distribution of the amount of incident visible light and capture it as an image, but can also be applied to solid-state imaging devices that capture the distribution of the amount of incident infrared rays, X-rays, particles, etc. In a broader sense, they can be applied to all solid-state imaging devices (physical quantity distribution detection devices) such as fingerprint detection sensors that detect the distribution of other physical quantities such as pressure and capacitance and capture them as an image.

[0242] Furthermore, the present invention is not limited to a solid-state imaging device that scans each unit pixel of an imaging region in sequence by row and reads out pixel signals from each unit pixel. It can also be applied to an XY address type solid-state imaging device that selects an arbitrary pixel by pixel and reads out pixel signals from the selected pixel by pixel. The solid-state imaging device may be formed as a one-chip, or may be a module having an imaging function in which the imaging region and a driving circuit or an optical system are packaged together.

[0243] In addition, the present invention is not limited to application to solid-state imaging devices, but can also be applied to imaging devices. Here, imaging devices refer to camera systems such as digital still cameras and video cameras, and electronic devices with imaging functions such as mobile phones. In some cases, a modular form mounted on an electronic device, i.e., a camera module, is used as the imaging device.

[0244] FIG. 69 is a conceptual diagram showing an example in which a solid-state imaging device 201 constituted by the imaging element and stacked imaging element of the present disclosure is used in an electronic device (camera) 200. The electronic device 200 has a solid-state imaging device 201, an optical lens 210, a shutter device 211, a driving circuit 212, and a signal processing circuit 213. The optical lens 210 forms an image of image light (incident light) from a subject on the imaging surface of the solid-state imaging device 201. As a result, signal charges are accumulated in the solid-state imaging device 201 for a certain period of time. The shutter device 211 controls the light irradiation period and the light blocking period to the solid-state imaging device 201. The driving circuit 212 supplies a driving signal that controls the transfer operation of the solid-state imaging device 201 and the shutter operation of the shutter device 211. Signal transfer of the solid-state imaging device 201 is performed by the driving signal (timing signal) supplied from the driving circuit 212. The signal processing circuit 213 performs various signal processing. The video signal that has undergone signal processing is stored in a storage medium such as a memory, or is output to a monitor. In such an electronic device 200, it is possible to achieve a reduction in pixel size and an improvement in transfer efficiency in the solid-state imaging device 201, and therefore it is possible to obtain an electronic device 200 with improved pixel characteristics. The electronic device 200 to which the solid-state imaging device 201 can be applied is not limited to a camera, and can be applied to imaging devices such as digital still cameras, camera modules for mobile devices such as mobile phones, etc.

[0245] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, etc.

[0246] FIG. 73 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology of the present disclosure can be applied.

[0247] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 73, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053 are illustrated.

[0248] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0249] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0250] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0251] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0252] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0253] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0254] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0255] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0256] The audio / video output unit 12052 transmits at least one output signal of audio and video to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 73, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0257] FIG. 74 is a diagram showing an example of the installation position of the imaging unit 12031.

[0258] In FIG. 74, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.

[0259] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The images of the front acquired by the imaging units 12101 and 12105 are mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0260] 74 shows an example of the imaging ranges of the imaging units 12101 to 12104. An imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and an imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0261] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0262] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0263] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0264] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0265] Furthermore, for example, the technology disclosed herein may be applied to an endoscopic surgery system.

[0266] FIG. 75 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0267] 75 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0268] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel.

[0269] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0270] An optical system and an image sensor are provided inside the camera head 11102, and reflected light (observation light) from an observation target is collected on the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as RAW data.

[0271] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0272] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0273] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing an operation site or the like.

[0274] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 11100.

[0275] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing the field of view of the endoscope 11100 and securing the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, image, or graph.

[0276] The light source device 11203 that supplies irradiation light to the endoscope 11100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation object with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0277] The light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. The driving of the image sensor of the camera head 11102 may be controlled in synchronization with the timing of the change in the light intensity to obtain images in a time-division manner, and the images may be synthesized to generate an image with a high dynamic range that is free of so-called blackout and whiteout.

[0278] The light source device 11203 may be configured to supply light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, by utilizing the wavelength dependency of light absorption in body tissue, a narrow band light is irradiated compared to the irradiated light (i.e., white light) during normal observation, and a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast, so-called narrow band imaging is performed. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating an excitation light. In the fluorescent observation, it is possible to irradiate an excitation light to a body tissue and observe the fluorescence from the body tissue (autofluorescence observation), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0279] FIG. 76 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0280] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so as to be able to communicate with each other.

[0281] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0282] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be one (so-called single-plate type) or multiple (so-called multi-plate type). When the imaging unit 11402 is composed of a multi-plate type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. Note that when the imaging unit 11402 is composed of a multi-plate type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0283] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens.

[0284] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be appropriately adjusted.

[0285] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0286] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and focus of the captured image.

[0287] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by a user, or may be automatically set by the control unit 11413 of the CCU 11201 based on an acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0288] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0289] The communication unit 11411 is configured with a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0290] Furthermore, the communication unit 11411 transmits, to the camera head 11102, a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0291] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data sent from the camera head 11102 .

[0292] The control unit 11413 performs various controls related to imaging of the surgical site etc. by the endoscope 11100 and display of the captured image obtained by imaging the surgical site etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0293] Further, the control unit 11413 causes the display device 11202 to display the captured image showing the surgical site, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical tools such as forceps, specific living body parts, bleeding, mist when the energy treatment tool 11112 is used, etc., by detecting the shape and color of the edge of an object included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it may use the recognition result to superimpose various types of surgery support information on the image of the surgical site. By superimposing and presenting the surgery support information to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0294] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0295] Here, in the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0296] Although an endoscopic surgery system has been described here as an example, the technology disclosed herein may also be applied to other systems, such as a microsurgery system.

[0297] The present disclosure may also be configured as follows. [A01] 《Imaging element》 The photoelectric conversion unit includes a first electrode, a photoelectric conversion layer, and a second electrode. An imaging element in which a protective layer made of an inorganic oxide and an inorganic oxide semiconductor material layer are formed directly below the photoelectric conversion layer from the photoelectric conversion section side. [A02] The imaging element according to [A01], wherein the oxygen vacancy generation energy of the metal atoms constituting the protective layer is 5 eV or more. [A03] The oxygen vacancy formation energy of the metal atoms that make up the protective layer is E OD-1 The oxygen vacancy generation energy of the metal atoms constituting the inorganic oxide semiconductor material layer is E OD-2 When E OD-1 -E OD-2 ≧1eV The imaging element according to [A02], [A04] The imaging element according to [A02] or [A03], wherein the oxygen vacancy formation energy of metal atoms constituting the inorganic oxide semiconductor material layer is 3 eV or more. [A05] The average energy of the LUMO value of the photoelectric conversion layer is E 0 , the average energy at the maximum energy value of the conduction band of the protective layer is E 1 When E 0 ≧E 1 The imaging element according to any one of [A01] to [A04], which satisfies the following: [A06]E 0 -E 1 ≧0.1(eV) The imaging element according to [A05], [A07] The minimum energy of the conduction band of the material constituting the inorganic oxide semiconductor material layer is E 2 When E 1 -E 2 >0.1(eV) The imaging element according to [A06], [A08] The minimum energy of the conduction band of the inorganic oxide that constitutes the protective layer is E 1 , the minimum energy of the conduction band of the material constituting the inorganic oxide semiconductor material layer is E 2 When E 1 -E 2 ≧0.1(eV) The imaging element according to any one of [A01] to [A07], which satisfies the following: [A09]E 1 -E 2 >0.1(eV) The imaging element according to [A08], [A10] The protective layer is Nb a Ti b O c (wherein a+b+c=1.00). [A11] The imaging element according to [A10], wherein 0.05≦a≦0.25 and 0.05≦b≦0.25 are satisfied. [A12] The image sensor according to any one of [A01] to [A11], wherein the protective layer prevents hydrogen from entering the inorganic oxide semiconductor material layer. [A13] The imaging element according to [A12], wherein the hydrogen blocking ability of the protective layer is such that the relative intensity ratio of hydrogen ions detected when heated to 350°C as measured using a thermal desorption method is 0.1 or less, with the intensity ratio when titanium is heated being taken as 1.0. [A14] The imaging element described in any one of [A01] to [A13], wherein the photoelectric conversion unit further includes an insulating layer and a charge storage electrode arranged at a distance from the first electrode and facing the inorganic oxide semiconductor material layer via the insulating layer. [A15] The imaging element according to any one of [A01] to [A14], wherein charges generated in the photoelectric conversion layer move to the first electrode via the protective layer and the inorganic oxide semiconductor material layer. [A16] The imaging element according to [A15], wherein the electric charge is an electron. [A17] The carrier mobility of the material that constitutes the inorganic oxide semiconductor material layer is 10 cm 2 The imaging element according to any one of [A01] to [A16], wherein the refractive index is 1.0 / V·s or more. [A18] The carrier concentration (carrier density) of the inorganic oxide semiconductor material layer is 1×10 16 / cm 3The imaging element according to any one of [A01] to [A17] below. [A19] The imaging element according to any one of [A01] to [A18], wherein the inorganic oxide semiconductor material layer is amorphous. [A20] The thickness of the inorganic oxide semiconductor material layer is 1×10 -8 m to 1.5×10 -7 The imaging element according to any one of [A01] to [A19], [B01] Further comprising a semiconductor substrate, The image sensor according to any one of [A01] to [A20], wherein the photoelectric conversion unit is disposed above a semiconductor substrate. [B02] The image sensor according to any one of [A01] to [B01], wherein the first electrode extends within an opening provided in the insulating layer and is connected to the inorganic oxide semiconductor material layer. [B03] The image sensor according to any one of [A01] to [B01], wherein the inorganic oxide semiconductor material layer and the protective layer extend within an opening provided in the insulating layer and are connected to the first electrode. [B04] The edge of the top surface of the first electrode is covered with an insulating layer; The first electrode is exposed at the bottom of the opening. The imaging element described in [B03], wherein when a surface of the insulating layer in contact with the top surface of the first electrode is defined as a first surface, and a surface of the insulating layer in contact with a portion of the inorganic oxide semiconductor material layer facing the charge storage electrode is defined as a second surface, the side of the opening has a slope that widens from the first surface toward the second surface. [B05] The image sensor according to [B04], wherein a side surface of the opening having an inclination expanding from the first surface toward the second surface is located on the charge accumulation electrode side. [B06] Control of potential of first electrode and charge storage electrode The semiconductor substrate further includes a control unit having a drive circuit. The first electrode and the charge storage electrode are connected to a drive circuit, During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31is applied, and charges are accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer), During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 The imaging element described in any one of [A01] to [B05], in which a voltage is applied and charges accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer) are read out to a control unit via a first electrode. However, the potential of the first electrode is higher than the potential of the second electrode, V 31 ≧V 11 , and V 32 <V 12 It is. [B07] 《Lower charge transfer control electrode》 An imaging element described in any one of [A01] to [B06], in which a lower charge transfer control electrode is formed in a region facing a region of the photoelectric conversion layer located between adjacent imaging elements via an insulating layer. [B08] <<Control of potentials of first electrode, charge storage electrode, and lower charge transfer control electrode>> The semiconductor substrate further includes a control unit having a drive circuit. the first electrode, the second electrode, the charge storage electrode and the lower charge transfer control electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied to the lower charge transfer control electrode, and a potential V 41 is applied, and charges are accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer), During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied to the lower charge transfer control electrode, and a potential V 42is applied, and charges accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer) are read out to the control unit via the first electrode. however, V 31 ≧V 11 , V 31 >V 41 , and V 12 >V 32 >V 42 It is. [B09] 《Upper charge transfer control electrode》 An imaging element described in any one of [A01] to [B06], in which an upper charge transfer control electrode is formed on a region of the photoelectric conversion layer located between adjacent imaging elements, instead of a second electrode being formed on the region of the photoelectric conversion layer located between adjacent imaging elements. [B10] An imaging element described in [B09], wherein a second electrode is provided for each imaging element, and the upper charge transfer control electrode surrounds at least a portion of the second electrode, is spaced apart from the second electrode, and is provided above region-A of the photoelectric conversion layer. [B11] An imaging element described in [B09], in which a second electrode is provided for each imaging element, the upper charge transfer control electrode is provided so as to surround at least a portion of the second electrode and be spaced apart from the second electrode, and a portion of the charge storage electrode is present below the upper charge transfer control electrode. [B12] An imaging element described in any one of [B09] to [B11], wherein a second electrode is provided for each imaging element, an upper charge transfer control electrode is provided surrounding at least a portion of the second electrode and spaced apart from the second electrode, a portion of the charge storage electrode is present below the upper charge transfer control electrode, and a lower charge transfer control electrode is formed below the upper charge transfer control electrode. [B13] Control of potentials of first electrode, charge storage electrode, and charge transfer control electrode The semiconductor substrate further includes a control unit having a drive circuit. the first electrode, the second electrode, the charge storage electrode, and the charge transfer control electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 21is applied to the charge transfer control electrode, and a potential V 41 is applied, and charges are accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer), During the charge transfer period, the drive circuit applies a potential V 22 is applied to the charge transfer control electrode, and a potential V 42 An imaging element described in any one of [B09] to [B12], in which a voltage is applied and charges accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer) are read out to a control unit via the first electrode. however, V 21 ≧V 41 , and V 22 ≧V 42 It is. [B14] 《Transfer control electrode》 The imaging element described in any one of [A01] to [B13] further includes a transfer control electrode disposed between the first electrode and the charge storage electrode, spaced apart from the first electrode and the charge storage electrode, and facing the inorganic oxide semiconductor material layer via an insulating layer. [B15] <<Control of potentials of first electrode, charge storage electrode, and transfer control electrode>> The semiconductor substrate further includes a control unit having a drive circuit. the first electrode, the charge storage electrode, and the transfer control electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied to the transfer control electrode, and a potential V 51 is applied, and charges are accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer), During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied to the transfer control electrode, and a potential V 52The imaging element according to [B14], wherein a voltage is applied and charges accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer) are read out to the control unit via the first electrode. However, the potential of the first electrode is higher than the potential of the second electrode, V 31 >V 51 , and V 32 ≦V 52 ≦V 12 It is. [B16]《Charge discharge electrode》 The imaging element according to any one of [A01] to [B15], further comprising a charge discharging electrode connected to the inorganic oxide semiconductor material layer and arranged apart from the first electrode and the charge storage electrode. [B17] The imaging element according to [B16], wherein the charge discharging electrode is disposed so as to surround the first electrode and the charge accumulation electrode. [B18] The inorganic oxide semiconductor material layer and the protective layer extend through a second opening provided in the insulating layer and are connected to the charge discharging electrode; The edge of the top surface of the charge discharging electrode is covered with an insulating layer, A charge discharge electrode is exposed on the bottom surface of the second opening, The imaging element described in [B16] or [B17], wherein when a surface of the insulating layer in contact with the top surface of the charge discharging electrode is defined as a third surface, and a surface of the insulating layer in contact with a portion of the inorganic oxide semiconductor material layer facing the charge storage electrode is defined as a second surface, a side surface of the second opening has a slope expanding from the third surface toward the second surface. [B19] <<Control of potentials of first electrode, charge storage electrode, and charge discharge electrode>> The semiconductor substrate further includes a control unit having a drive circuit. the first electrode, the charge storage electrode, and the charge discharging electrode are connected to a drive circuit; During the charge accumulation period, the drive circuit applies a potential V 11 is applied to the charge storage electrode, and a potential V 31 is applied to the charge discharging electrode, and a potential V 61is applied, and charges are accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer), During the charge transfer period, the drive circuit applies a potential V 12 is applied to the charge storage electrode, and a potential V 32 is applied to the charge discharge electrode, and a potential V 62 An imaging element according to any one of [B16] to [B18], in which a voltage is applied and charges accumulated in the inorganic oxide semiconductor material layer (or the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer) are read out to a control unit via the first electrode. However, the potential of the first electrode is higher than the potential of the second electrode, V 61 >V 11 , and V 62 <V 12 It is. [B20] 《Electrode segment for charge storage》 The image sensor according to any one of [A01] to [B19], wherein the charge storage electrode is composed of a plurality of charge storage electrode segments. [B21] When the potential of the first electrode is higher than the potential of the second electrode, during a charge transfer period, the potential applied to the charge-storage electrode segment located closest to the first electrode is higher than the potential applied to the charge-storage electrode segment located farthest from the first electrode; An imaging element described in [B20], wherein, when the potential of the first electrode is lower than the potential of the second electrode, during a charge transfer period, the potential applied to the charge storage electrode segment located closest to the first electrode is lower than the potential applied to the charge storage electrode segment located farthest from the first electrode. [B22] At least a floating diffusion layer and an amplifying transistor constituting a control unit are provided on the semiconductor substrate, The image sensor according to any one of [A01] to [B21], wherein the first electrode is connected to the floating diffusion layer and the gate portion of the amplifying transistor. [B23] The semiconductor substrate further includes a reset transistor and a selection transistor that constitute a control unit, The floating diffusion layer is connected to one of the source / drain regions of the reset transistor, The imaging element according to [B22], wherein one source / drain region of the amplifying transistor is connected to one source / drain region of the selection transistor, and the other source / drain region of the selection transistor is connected to a signal line. [B24] The image sensor according to any one of [A01] to [B23], wherein the charge storage electrode is larger than the first electrode. [B25] The image sensor according to any one of [A01] to [B24], wherein light is incident from the second electrode side, and a light-shielding layer is formed on the light incident side of the second electrode. [B26] The imaging element according to any one of [A01] to [B24], in which light is incident from the second electrode side and no light is incident on the first electrode. [B27] The imaging element according to [B26], further comprising a light-shielding layer formed on the light-incident side of the second electrode and above the first electrode. [B28] An on-chip microlens is provided above the charge storage electrode and the second electrode; The imaging element according to [B26], wherein light incident on the on-chip microlens is focused on the charge storage electrode. [B29] 《Imaging element: 1st configuration》 The photoelectric conversion unit is composed of N (N≧2) photoelectric conversion unit segments, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer are composed of N photoelectric conversion layer segments; The insulating layer is composed of N insulating layer segments, The charge storage electrode is composed of N charge storage electrode segments, an n-th (n=1, 2, 3,...,N) photoelectric conversion section segment is composed of an n-th charge storage electrode segment, an n-th insulating layer segment, and an n-th photoelectric conversion layer segment; The larger the value of n, the farther the photoelectric conversion segment is located from the first electrode. The imaging element according to any one of [A01] to [B28], wherein the thickness of the insulating layer segments gradually changes from the first photoelectric conversion portion segment to the Nth photoelectric conversion portion segment. [B30] 《Imaging element: second configuration》 The photoelectric conversion unit is composed of N (N≧2) photoelectric conversion unit segments, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer are composed of N photoelectric conversion layer segments; The insulating layer is composed of N insulating layer segments, The charge storage electrode is composed of N charge storage electrode segments, an n-th (n=1, 2, 3,...,N) photoelectric conversion section segment is composed of an n-th charge storage electrode segment, an n-th insulating layer segment, and an n-th photoelectric conversion layer segment; The larger the value of n, the farther the photoelectric conversion segment is located from the first electrode. The imaging element according to any one of [A01] to [B28], wherein the thickness of the photoelectric conversion layer segments gradually changes from the first photoelectric conversion portion segment to the Nth photoelectric conversion portion segment. [B31] 《Imaging element: 3rd configuration》 The photoelectric conversion unit is composed of N (N≧2) photoelectric conversion unit segments, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer are composed of N photoelectric conversion layer segments; The insulating layer is composed of N insulating layer segments, The charge storage electrode is composed of N charge storage electrode segments, an n-th (n=1, 2, 3,...,N) photoelectric conversion section segment is composed of an n-th charge storage electrode segment, an n-th insulating layer segment, and an n-th photoelectric conversion layer segment; The larger the value of n, the farther the photoelectric conversion segment is located from the first electrode. The imaging element according to any one of [A01] to [B28], wherein adjacent photoelectric conversion unit segments have insulating layer segments made of different materials. [B32] 《Imaging element: 4th configuration》 The photoelectric conversion unit is composed of N (N≧2) photoelectric conversion unit segments, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer are composed of N photoelectric conversion layer segments; The insulating layer is composed of N insulating layer segments, The charge storage electrode is composed of N charge storage electrode segments arranged spaced apart from each other, an n-th (n=1, 2, 3,...,N) photoelectric conversion section segment is composed of an n-th charge storage electrode segment, an n-th insulating layer segment, and an n-th photoelectric conversion layer segment; The larger the value of n, the farther the photoelectric conversion segment is located from the first electrode. The imaging element according to any one of [A01] to [B28], wherein the materials constituting the charge storage electrode segments in adjacent photoelectric conversion unit segments are different. [B33] 《Imaging element: 5th configuration》 The photoelectric conversion unit is composed of N (N≧2) photoelectric conversion unit segments, the inorganic oxide semiconductor material layer, the protective layer, and the photoelectric conversion layer are composed of N photoelectric conversion layer segments; The insulating layer is composed of N insulating layer segments, The charge storage electrode is composed of N charge storage electrode segments arranged spaced apart from each other, an n-th (n=1, 2, 3,...,N) photoelectric conversion section segment is composed of an n-th charge storage electrode segment, an n-th insulating layer segment, and an n-th photoelectric conversion layer segment; The larger the value of n, the farther the photoelectric conversion segment is located from the first electrode. The imaging element according to any one of [A01] to [B28], wherein the areas of the charge storage electrode segments gradually decrease from the first photoelectric conversion portion segment to the Nth photoelectric conversion portion segment. [B34] 《Imaging element: 6th configuration》 The imaging element described in any one of [A01] to [B28], wherein when the stacking direction of the charge storage electrode, the insulating layer, the inorganic oxide semiconductor material layer, and the photoelectric conversion layer is the Z direction and the direction away from the first electrode is the X direction, the cross-sectional area of ​​the stacked portion when the stacked portion in which the charge storage electrode, the insulating layer, the inorganic oxide semiconductor material layer, and the photoelectric conversion layer are stacked is cut in a YZ imaginary plane changes depending on the distance from the first electrode. [C01] 《Stacked image sensor》 A stacked imaging element having at least one imaging element according to any one of [A01] to [B34]. [D01] Solid-state imaging device: First aspect A solid-state imaging device comprising a plurality of imaging elements according to any one of [A01] to [B34]. [D02] Solid-state imaging device: second aspect A solid-state imaging device comprising a plurality of stacked imaging elements according to [C01]. [E01] <<Solid-state imaging device: First configuration>> The photoelectric conversion unit includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion unit includes a plurality of image pickup elements according to any one of [A01] to [B34], An imaging element block is composed of a plurality of imaging elements, A solid-state imaging device in which a first electrode is shared by a plurality of imaging elements that constitute an imaging element block. [E02] Solid-state imaging device: second configuration The stacked imaging element according to [C01] is provided in plurality. An imaging element block is composed of a plurality of imaging elements, A solid-state imaging device in which a first electrode is shared by a plurality of imaging elements that constitute an imaging element block. [E03] The solid-state imaging device according to [E01] or [E02], wherein one on-chip microlens is disposed above one imaging element. [E04] An imaging element block is composed of two imaging elements, The solid-state imaging device according to [E01] or [E02], wherein one on-chip microlens is disposed above the imaging element block. [E05] The solid-state imaging device according to any one of [E01] to [E04], in which one floating diffusion layer is provided for a plurality of imaging elements. [E06] The solid-state imaging device according to any one of [E01] to [E05], wherein the first electrode is disposed adjacent to the charge storage electrode of each imaging element. [E07] A solid-state imaging device according to any one of [E01] to [E06], wherein the first electrode is arranged adjacent to some of the charge storage electrodes of the multiple imaging elements, and is not arranged adjacent to the remaining charge storage electrodes of the multiple imaging elements. [E08] A solid-state imaging device according to [E07], wherein the distance between a charge storage electrode constituting an imaging element and another charge storage electrode constituting an imaging element is longer than the distance between a first electrode and a charge storage electrode in an imaging element adjacent to the first electrode. [F01] <<Method of driving a solid-state imaging device>> The photoelectric conversion unit includes a first electrode, a photoelectric conversion layer, and a second electrode. the photoelectric conversion unit further includes a charge storage electrode disposed apart from the first electrode and facing the photoelectric conversion layer with an insulating layer interposed therebetween; A method for driving a solid-state imaging device including a plurality of imaging elements each having a structure in which light is incident from a second electrode side and light is not incident on a first electrode, comprising: In all the imaging elements, charges are simultaneously stored in the inorganic oxide semiconductor material layer while the charges in the first electrodes are discharged to the outside of the system, and then, In all of the imaging elements, the electric charges stored in the inorganic oxide semiconductor material layer are transferred to the first electrode at the same time, and after the transfer is completed, the electric charges transferred to the first electrode are read out in sequence in each imaging element. A method for driving a solid-state imaging device in which each process is repeated. [Explanation of symbols]

[0298] 10 imaging element (stacked imaging element, first imaging element), 11 second imaging element, 12 third imaging element, 13 various imaging element components located below an interlayer insulating layer, 14 on-chip microlens (OCL), 15 light-shielding layer, 21 first electrode, 22 second electrode, 23 photoelectric conversion stack, 23A photoelectric conversion layer, 23B protective layer, 23C inorganic oxide semiconductor material layer, 23D inorganic oxide semiconductor material layer and protective layer, 24 charge storage electrode, 24A, 24B, 24C Charge storage electrode segment, 25, 25A, 25B...transfer control electrode (charge transfer electrode), 26...charge discharge electrode, 27...lower charge transfer control electrode (lower charge transfer control electrode), 27A...connection hole, 27B...pad portion, 28...upper charge transfer control electrode (upper charge transfer control electrode), 41...n-type semiconductor region constituting the second imaging element, 43...n-type semiconductor region constituting the third imaging element, 42, 44, 73...p+ layer, 45, 46...gate portion of transfer transistor, 51...reset transistor TR1 rst Gate of 51A reset transistor TR1 rst The channel forming region of the reset transistor TR1, 51B, 51C rst 52, the source / drain region of amplifying transistor TR1 amp Gate of 52A amplifier transistor TR1 amp The channel forming region of the amplifier transistor TR1, 52B, 52C amp 53, the source / drain region of select transistor TR1 sel Gate section of 53A···Selection transistor TR1 sel The channel forming region of the selection transistor TR1 sela source / drain region of the semiconductor substrate, 61 contact hole portion, 62 wiring layer, 63, 64, 68A pad portion, 65, 68B connection hole, 66, 67, 69 connection portion, 70 semiconductor substrate, 70A first surface (front surface) of the semiconductor substrate, 70B second surface (back surface) of the semiconductor substrate, 71 element isolation region, 72 insulating material film, 74 HfO 2 film, 75...insulating material film, 76, 81...interlayer insulating layer, 82...insulating layer, 82 A 83···region between adjacent imaging elements (region-a), 84···protective material layer, 85···second opening, 100···solid-state imaging device, 101···stacked imaging element, 111···imaging region, 112···vertical drive circuit, 113···column signal processing circuit, 114···horizontal drive circuit, 115···output circuit, 116···drive control circuit, 117···signal line (data output line), 118···horizontal signal line, 200···electronic device (camera), 201···solid-state imaging device, 210···optical lens, 211···shutter device, 212···drive circuit, 213···signal processing circuit, FD 1 ,FD 2 ,FD 3 ,45C,46C···Floating diffusion layer, TR1 trs ,TR2 trs ,TR3 trs Transfer transistor, TR1 rst ,TR2 rst ,TR3 rst Reset transistor, TR1 amp ,TR2 amp ,TR3 amp Amplifying transistor, TR1 sel ,TR3 sel ,TR3 sel Select transistor, V DD ...Power supply, RST 1 ,RST 2 ,RST 3 Reset line, SEL 1 ,SEL 2 ,SEL 3 ...Selection line, 117, VSL, VSL 1 ,VSL 2 ,VSL3 Signal line (data output line), TG 2 ,T.G. 3 Transfer gate line, V OA ,V OB ,V OT ,V OU ···wiring

Claims

1. The photoelectric conversion unit includes a first electrode, a photoelectric conversion layer, and a second electrode. Between the photoelectric conversion layer and the first electrode, a protective layer made of an inorganic oxide and an inorganic oxide semiconductor material layer are formed from the photoelectric conversion layer side, The protective layer is made of Nb ａ Ti ｂ O ｃ (wherein a+b+c=1.00), and 0.05≦a≦0.25 and 0.05≦b≦0.25 are satisfied; The surface roughness Ra of the surface of the inorganic oxide semiconductor material layer at the interface with the protective layer is 1.5 nm or less, and the root mean square roughness Rq value of the surface of the inorganic oxide semiconductor material layer at the interface with the protective layer is 2.5 nm or less. Image sensor.

2. 2. The image sensor according to claim 1, wherein the oxygen vacancy generation energy of the metal atoms constituting the protective layer is 5 eV or more and 5.5 eV or less.

3. The oxygen vacancy generation energy of the metal atoms constituting the protective layer is E ＯＤ－１ The oxygen vacancy generation energy of the metal atoms constituting the inorganic oxide semiconductor material layer is E ＯＤ－２ When 2.4≧E ＯＤ－１ -E ＯＤ－２ ≧1(eV) 3. The imaging device according to claim 2, which satisfies the following:

4. 4. The image sensor according to claim 3, wherein the oxygen vacancy generation energy of metal atoms constituting the inorganic oxide semiconductor material layer is 3 eV or more and 3.1 eV or less.

5. The average energy at the LUMO value of the photoelectric conversion layer is defined as E ０ , the average energy at the maximum energy value of the conduction band of the protective layer is E １ When E ０ ≧E １ 2. The imaging device according to claim 1, which satisfies the following:

6. 0.1≧E ０ -E １ ≧0(eV) 6. The imaging device according to claim 5, which satisfies the following:

7. The minimum energy of the conduction band of the material constituting the inorganic oxide semiconductor material layer is defined as E ２ When 0.4≧E １ -E ２ >0.1(eV) 7. The imaging device according to claim 6, which satisfies the following:

8. The image sensor according to claim 1 , wherein the protective layer prevents hydrogen from entering the inorganic oxide semiconductor material layer.

9. 9. The image sensor according to claim 8, wherein when the protective layer has a thickness of 30 nm, the hydrogen blocking ability of the protective layer is such that a relative intensity ratio of hydrogen ions detected when heated to 350° C. as measured by a thermal desorption method is 0.1 or less, with an intensity ratio of 1.0 being obtained when titanium is heated.

10. 2. The imaging element according to claim 1, wherein the photoelectric conversion unit further includes an insulating layer and a charge storage electrode arranged at a distance from the first electrode and facing the inorganic oxide semiconductor material layer with the insulating layer interposed therebetween.

11. The image sensor according to claim 1 , wherein charges generated in the photoelectric conversion layer move to the first electrode via the protective layer and the inorganic oxide semiconductor material layer.

12. The imaging device according to claim 11 , wherein the electric charges are electrons.

13. A stacked type imaging element comprising at least one imaging element according to claim 1 .

14. A solid-state imaging device comprising a plurality of the imaging elements according to claim 1 .

15. A solid-state imaging device comprising a plurality of the stack-type imaging elements according to claim 13.

Images