Semiconductor Device

Abstract

To provide a semiconductor device capable of improving characteristics.SOLUTION: A semiconductor device includes first to third electrodes, a semiconductor member, and a first insulation member. A first semiconductor region includes first to fifth subregions. The first insulation member includes first to third insulation regions. The fourth subregion includes a first opposed region in contact with the first insulation region. The fifth subregion includes a second opposed region in contact with the second insulation region. The first opposed region contains a first element including at least any one of Si, Ge, Te, and Sn. The second opposed region does not include the first element, or alternatively, a concentration of the first element in the second opposed region is lower than that in the first opposed region.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] It is desirable to improve the characteristics of semiconductor devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-150141 A Summary of the Invention [Problem to be solved by the invention]

[0004] An embodiment of the present invention provides a semiconductor device capable of improving characteristics. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first insulating member. A direction from the first electrode to the second electrode is along a first direction. A position of the third electrode in the first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The semiconductor member includes a first semiconductor region and a second semiconductor region. The first semiconductor region is Al x1 Ga 1-x1It includes N(0≦x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The direction from the first partial region to the first electrode is along a second direction that intersects the first direction. The direction from the second partial region to the second electrode is along the second direction. The direction from the third partial region to at least a part of the third electrode is along the second direction. The position of the fourth partial region in the first direction is between the position of the first partial region in the first direction and the position of the third partial region in the first direction. The position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and the position of the second partial region in the first direction. The second semiconductor region is Al x2 Ga 1-x2 It includes N(0<x2≦1, x1<x2). The second semiconductor region includes a first semiconductor part and a second semiconductor part. The direction from the fourth partial region to the first semiconductor part is along the second direction. The direction from the fifth partial region to the second semiconductor part is along the second direction. The first insulating member includes a first insulating region, a second insulating region, and a third insulating region. The first insulating region is between the fourth partial region and the third electrode in the first direction. The second insulating region is between the third electrode and the fifth partial region in the first direction. The third insulating region is between the third partial region and the third electrode in the second direction. The fourth partial region includes a first opposing region that contacts the first insulating region. The fifth partial region includes a second opposing region that contacts the second insulating region. The first opposing region includes a first element that includes at least one of Si, Ge, Te, and Sn. The second opposing region does not include the first element, or the concentration of the first element in the second opposing region is lower than the concentration of the first element in the first opposing region.

Brief Description of the Drawings

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. [Diagram 2]FIG. 2 is a graph illustrating the characteristics of the semiconductor device. [Diagram 3] FIG. 3 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Diagram 5] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 10] FIG. 10 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 11] FIG. 11 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 12] FIG. 12 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 13] FIG. 13 is a schematic cross-sectional view illustrating the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. In this specification and each drawing, elements similar to those described above with reference to the previous drawings are given the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. As shown in FIG. 1, a semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, and a first insulating member 41.

[0009] The direction from the first electrode 51 to the second electrode 52 is along a first direction D1. The first direction D1 is defined as the X-axis direction. A direction perpendicular to the X-axis direction is defined as the Z-axis direction. A direction perpendicular to the X-axis direction and the Y-axis direction is defined as the Y-axis direction.

[0010] The position of the third electrode 53 in the first direction D1 is between the position of the first electrode 51 in the first direction D1 and the position of the second electrode 52 in the first direction D1. For example, at least a portion of the third electrode 53 is between the first electrode 51 and the second electrode 52 in the first direction D1.

[0011] The semiconductor member 10M includes a first semiconductor region 10 and a second semiconductor region 20.

[0012] The first semiconductor region 10 is Al x1 Ga 1-x1 N (0≦x1<1). In one example, the composition ratio x1 is equal to or greater than 0 and less than 0.1. The first semiconductor region 10 is, for example, a GaN layer.

[0013] The first semiconductor region 10 includes a first partial region 11, a second partial region 12, a third partial region 13, a fourth partial region 14, and a fifth partial region 15. The direction from the first partial region 11 to the first electrode 51 is along the second direction D2. The second direction D2 intersects the first direction D1. The direction from the second partial region 12 to the second electrode 52 is along the second direction D2. The direction from the third partial region 13 to at least a part of the third electrode 53 is along the second direction D2. For example, in the second direction D2, the region overlapping the first electrode 51 corresponds to the first partial region 11. For example, in the second direction D2, the region overlapping the second electrode 52 corresponds to the second partial region 12. For example, in the second direction D2, the region overlapping at least a part of the third electrode 53 corresponds to the third partial region 13.

[0014] The position of the fourth partial region 14 in the first direction D1 is between the position of the first partial region 11 in the first direction D1 and the position of the third partial region 13 in the first direction D1. The position of the fifth partial region 15 in the first direction D1 is between the position of the third partial region 13 in the first direction D1 and the position of the second partial region 12 in the first direction D1. The boundaries between these partial regions may be unclear.

[0015] The second semiconductor region 20 contains Al x2 Ga 1-x2 N (0 < x2 < 1, x1 < x2). In one example, the composition ratio x2 is 0.1 or more and 0.3 or less. The second semiconductor region 20 is, for example, an AlGaN layer. An AlN layer may be provided between the first semiconductor region 10 and the second semiconductor region 20. The thickness of the AlN layer is, for example, 3 nm or less.

[0016] The second semiconductor region 20 includes a first semiconductor part 21 and a second semiconductor part 22. The direction from the fourth partial region 14 to the first semiconductor part 21 is along the second direction D2. The direction from the fifth partial region 15 to the second semiconductor part 22 is along the second direction D2.

[0017] The first insulating member 41 includes a first insulating region 41a, a second insulating region 41b, and a third insulating region 41c. The first insulating region 41a is between the fourth partial region 14 and the third electrode 53 in the first direction D1. The second insulating region 41b is between the third electrode 53 and the fifth partial region 15 in the first direction D1. The third insulating region 41c is between the third partial region 13 and the third electrode 53 in the second direction D2.

[0018] The fourth partial region 14 includes a first facing region p1. The first facing region p1 contacts the first insulating region 41a. The fifth partial region 15 includes a second facing region p2. The second facing region p2 contacts the second insulating region 41b.

[0019] The first facing region p1 includes a first element. The first element includes at least one of Si, Ge, Te, and Sn. The first facing region p1 is, for example, an n-type region. The second facing region p2 does not include the first element. Alternatively, the concentration of the first element in the second facing region p2 is lower than the concentration of the first element in the first facing region p1. The second facing region p2 is, for example, an undoped region.

[0020] As shown in FIG. 1, the semiconductor device 110 may include a base 10s and a nitride semiconductor layer 10B. The base 10s may be, for example, a silicon substrate or a SiC substrate. The nitride semiconductor layer 10B is provided on the base 10s. The nitride semiconductor layer 10B contains, for example, Al and N. The nitride semiconductor layer 10B may include an AlGaN layer. A first semiconductor region 10 is provided on the nitride semiconductor layer 10B. A second semiconductor region 20 is provided on the first semiconductor region 10.

[0021] The current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 may be, for example, a magnitude based on the potential of the first electrode 51. The first electrode 51 functions as one of a source electrode and a drain electrode. The second electrode 52 functions as the other of the source electrode and the drain electrode. The third electrode 53 functions as, for example, a gate electrode. The semiconductor device 110 is, for example, a transistor.

[0022] In this example, the distance along the first direction D1 between the first electrode 51 and the third electrode 53 is shorter than the distance along the first direction D1 between the third electrode 53 and the second electrode 52. The first electrode 51 functions as a source electrode, and the second electrode 52 functions as a drain electrode.

[0023] The first semiconductor region 10 includes a region facing the second semiconductor region 20. A carrier region 10C is formed in this region. The carrier region 10C is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor).

[0024] As described above, the first insulating region 41a is between the fourth partial region 14 and the third electrode 53 in the first direction D1. The second insulating region 41b is between the third electrode 53 and the fifth partial region 15 in the first direction D1. In this case, the third electrode 53 is between the fourth partial region 14 and the fifth partial region 15 in the first direction D1. The third electrode 53 is a recessed gate electrode. This allows a high threshold voltage to be obtained.

[0025] As described above, in the embodiment, the n-type regions are provided asymmetrically. This makes it possible to obtain a high threshold voltage as well as a low on-resistance. It is possible to provide a semiconductor device with improved characteristics.

[0026] For example, there is a first reference example in which an n-type region is not provided. In the first reference example, a high threshold voltage is obtained. However, in the first reference example, the on-resistance is high.

[0027] A high threshold voltage can be obtained by providing a structure that increases the threshold voltage in a part of the current path from the first electrode 51 to the second electrode 52. In the semiconductor device 110, the recessed gate electrode increases the threshold voltage in the region between the third electrode 53 and the second electrode 52. Meanwhile, an n-type region is provided between the first electrode 51 and the third electrode 53. This allows a low on-resistance to be obtained.

[0028] As shown in FIG. 1, the third partial region 13 includes a first face f1. The first face f1 faces the third insulating region 41c. The second semiconductor portion 22 includes a second face f2 and a third face f3. The third face f3 faces the fifth partial region 15. The second face f2 is opposite to the third face f3 in the second direction D2. For example, the third face f3 is between the fifth partial region 15 and the second face f2 in the second direction D2.

[0029] The distance between the first surface f1 and the second surface f2 along the second direction D2 is defined as a distance d1. The distance d1 corresponds to, for example, a recess depth. In the embodiment, the distance d1 is preferably, for example, 100 nm or more and 400 nm or less. When the distance d1 is 100 nm or more, an appropriately high threshold voltage is obtained. For example, normally-off characteristics are stably obtained. When the distance d1 is 400 nm or less, a low on-resistance is easily obtained.

[0030] 1, the first insulating member 41 may include a fourth insulating region 41d and a fifth insulating region 41e. The first semiconductor portion 21 is located between the fourth partial region 14 and the fourth insulating region 41d. The second semiconductor portion 22 is located between the fifth partial region 15 and the fifth insulating region 41e. The boundaries between the first to fifth insulating regions 41a to 41e may be unclear.

[0031] In one example, the first insulating member 41 includes silicon and oxygen. The first insulating member 41 may be silicon oxide (e.g., SiO 2 The first insulating member 41 may include at least one selected from the group consisting of silicon and aluminum, and at least one selected from the group consisting of oxygen and nitrogen.

[0032] As shown in FIG. 1, the semiconductor device 110 may include a second insulating member 42. In one example, the second insulating member 42 includes silicon and nitrogen. The second insulating member 42 includes, for example, SiN. The second insulating member 42 includes a first insulating portion 42a and a second insulating portion 42b. The first semiconductor portion 21 is between the fourth partial region 14 and the first insulating portion 42a in the second direction D2. The second semiconductor portion 22 is between the fifth partial region 15 and the second insulating portion 42b in the second direction D2.

[0033] For example, the first insulating portion 42a is between the first semiconductor portion 21 and the fourth insulating region 41d. For example, the second insulating portion 42b is between the second semiconductor portion 22 and the fifth insulating region 41e. For example, the first insulating portion 42a may be in contact with the first semiconductor portion 21. For example, the second insulating portion 42b may be in contact with the second semiconductor portion 22. By providing the second insulating member 42, stable characteristics can be easily obtained in the second semiconductor region 20. For example, current collapse can be suppressed.

[0034] FIG. 2 is a graph illustrating the characteristics of the semiconductor device. FIG. 2 illustrates the results of simulating the characteristic on-resistance when the gate-drain distance is changed in the semiconductor device. The horizontal axis of FIG. 2 is the gate-drain distance Lgd. The gate-drain distance Lgd corresponds to the distance along the first direction D1 between the third electrode 53 and the second electrode 52. The vertical axis of FIG. 2 is the characteristic on-resistance R1. FIG. 2 illustrates the characteristics of the semiconductor device 110 and the characteristics of the semiconductor device 119 of the first reference example. As shown in FIG. 2, at the same gate-drain distance Lgd, the semiconductor device 110 has a lower characteristic on-resistance R1 than the semiconductor device 119.

[0035] The semiconductor device 110 can be manufactured, for example, as follows. For example, a stacked body that will become the first semiconductor region 10 and the second semiconductor region 20 including an n-type region is prepared. The n-type region can be formed, for example, by ion implantation. A recess is formed in the stacked body. Then, an insulating film is formed in the recess. The remaining space in the recess is filled with a conductive material to form the third electrode 53. The first electrode 51 and the second electrode 52 are formed, and the semiconductor device 110 is obtained.

[0036] In another example, a recess is formed in a stacked body not including an n-type region. Then, an n-type region is formed in a part of the first semiconductor region 10. The n-type region can be formed by, for example, ion implantation. Then, an insulating film is formed, and the first to third electrodes 51 to 53 are formed. The semiconductor device 110 can also be formed by such a method.

[0037] In the embodiment, the concentration of the first element in the first opposing region p1 is 1×10 16 cm -3 5×10 or more 19 cm -3 At such a concentration, a low on-resistance can be stably obtained.

[0038] FIG. 3 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 3, in the semiconductor device 110a according to the embodiment, the position of the third electrode 53 is different from the position of the third electrode 53 in the semiconductor device 110. Other configurations of the semiconductor device 110a may be similar to the configurations of the semiconductor device 110.

[0039] In the semiconductor device 110a, the distance between the first electrode 51 and the third electrode 53 in the first direction D1 is longer than the distance between the third electrode 53 and the second electrode 52 in the first direction D1. In the semiconductor device 110a, the first electrode 51 functions as a drain electrode, and the second electrode 52 functions as a source electrode. The semiconductor device 110a also has an n-type first opposing region p1. This allows a high threshold voltage and a low on-resistance to be obtained. A semiconductor device with improved characteristics can be provided.

[0040] Each of the various configurations exemplified below can be applied to the semiconductor device 110 and the semiconductor device 110a.

[0041] FIG. 4 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 4, in the semiconductor device 111 according to the embodiment, the first insulating member 41 includes a plurality of films (such as the first film 41p and the second film 41q). Other configurations in the semiconductor device 111 may be the same as those in the semiconductor device 110 or the semiconductor device 110a.

[0042] In the semiconductor device 111, the first insulating member 41 includes the first film 41p and the second film 41q. The first film 41p is provided between the second film 41q and the semiconductor member 10M. Such first films 41p and second films 41q may be provided in each of the first to fifth insulating regions 41a to 41e.

[0043] The material of the first film 41p is different from that of the second film 41q. For example, the first film 41p contains Al x3 Ga 1-x3 N (0 < x3 ≤ 1, x2 < x3). The first film 41p is, for example, an AlN film. The second film 41q contains silicon and oxygen.

[0044] By providing the first film 41p as described above, the characteristics of the semiconductor member 10M are likely to be stabilized. For example, by providing the first film 41p as described above, high mobility is easily obtained. The on-resistance of the device can be lowered. By providing the second film 41q as described above, for example, a stable threshold voltage is easily obtained. For example, high reliability can be obtained.

[0045] When the second film 41q containing silicon and oxygen is provided, for example, the second film 41q may not contain nitrogen. Or the concentration of nitrogen contained in the second film 41q may be lower than the concentration of nitrogen contained in the second insulating member 42. Higher reliability can be obtained.

[0046] The second insulating member 42 does not contain oxygen. Or, the concentration of oxygen contained in the second insulating member 42 may be lower than the concentration of oxygen contained in the second film 41q.

[0047] The above-mentioned second film 41q is included in the first insulating member 41, and the first film 41p may be regarded as being provided separately from the first insulating member 41. Hereinafter, such an example will be described.

[0048] FIG. 5 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 5, the semiconductor device 112 according to the embodiment includes first to third electrodes 51 to 53, a semiconductor member 10M, a first insulating member 41, and a compound member 45. The first insulating member 41 in the semiconductor device 112 corresponds to the second film 41q in the semiconductor device 111. The compound member 45 corresponds to the first film 41p in the semiconductor device 111. The configurations other than these in the semiconductor device 112 may be the same as those in the semiconductor device 110 or the semiconductor device 111.

[0049] For example, the first insulating member 41 includes first to third insulating regions 41a to 41c. The first insulating region 41a is between the fourth partial region 14 and the third electrode 53 in the first direction D1. The second insulating region 41b is between the third electrode 53 and the fifth partial region 15 in the first direction D1. The third insulating region 41c is between the third partial region 13 and the third electrode 53 in the second direction D2.

[0050] The compound member 45 is Al x3 Ga 1-x3 N (0 <x3 ≦ 1, x2 <x3). The compound member 45 is, for example, an AlN film. The compound member 45 includes a first compound region 45a and a second compound region 45b. The first compound region 45a is between the fourth partial region 14 and the first insulating region 41a in the first direction D1. The second compound region 45b is between the second insulating region 41b and the fifth partial region 15 in the first direction D1.

[0051] The fourth partial region 14 includes a first opposing region p1. The first opposing region p1 contacts the first compound region 45a. The fifth partial region 15 includes a second opposing region p2. The second opposing region p2 contacts the second compound region 45b.

[0052] The first facing region p1 contains a first element. The first element contains at least one of Si, Ge, Te, and Sn. The second facing region p2 does not contain the first element. Alternatively, the concentration of the first element in the second facing region p2 is lower than the concentration of the first element in the first facing region p1. In the semiconductor device 112, by providing the compound member 45, high mobility is easily obtained. The on-resistance of the device can be reduced.

[0053] The compound member 45 may include a third compound region 45c. The third compound region 45c is between the third partial region 13 and the third insulating region 41c in the second direction D2. At least one of the first compound region 45a, the second compound region 45b, and the third compound region 45c may be single crystal. Being single crystal makes it easier to obtain higher mobility. The on-resistance of the device can be reduced.

[0054] The semiconductor device 112 may include a second insulating member 42. The second insulating member 42 includes silicon and nitrogen. The second insulating member 42 includes a first insulating portion 42a and a second insulating portion 42b. The first semiconductor portion 21 is between the fourth partial region 14 and the first insulating portion 42a in the second direction D2. The second semiconductor portion 22 is between the fifth partial region 15 and the second insulating portion 42b in the second direction D2.

[0055] In the semiconductor device 112, the first insulating member 41 contains, for example, silicon and oxygen. The first insulating member 41 does not contain nitrogen. Or, the concentration of nitrogen contained in the first insulating member 41 is lower than the concentration of nitrogen contained in the second insulating member 42. For example, the second insulating member 42 does not contain oxygen. Or, the concentration of oxygen contained in the second insulating member 42 is lower than the concentration of oxygen contained in the first insulating member 41.

[0056] By providing the first insulating member 41 containing silicon and oxygen, higher reliability can be obtained.

[0057] In the semiconductor device 112, the compound member 45 may include a fourth compound region 45d and a fifth compound region 45e. The first insulating portion 42a is between the first semiconductor portion 21 and the fourth compound region 45d. The second insulating portion 42b is between the second semiconductor portion 22 and the fifth compound region 45e.

[0058] The first insulating member 41 may include a fourth insulating region 41d and a fifth insulating region 41e. The fourth compound region 45d is between the first semiconductor portion 21 and the fourth insulating region 41d. The fifth compound region 45e is between the second semiconductor portion 22 and the fifth insulating region 41e.

[0059] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 6, in the semiconductor device 112a according to the embodiment, a part of the first opposing region p1 containing the first element overlaps a part of the first electrode 51 in the second direction D2. Other configurations of the semiconductor device 112a may be similar to those of the semiconductor device 112. A high threshold voltage and a low on-resistance can be obtained in the semiconductor device 112a as well. A semiconductor device with improved characteristics can be provided.

[0060] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. As shown in FIG. 7, in the semiconductor device 112b according to the embodiment, a portion of the first opposing region p1 containing the first element overlaps with the first electrode 51 in the second direction D2. For example, the first partial region 11 contains the first element. The other configurations of the semiconductor device 112b may be similar to those of the semiconductor device 112. A high threshold voltage and a low on-resistance can be obtained in the semiconductor device 112b as well. A semiconductor device with improved characteristics can be provided. A portion of the first opposing region p1 containing the first element overlaps with the first electrode 51 in the second direction D2. This allows, for example, the contact resistance between the first electrode 51 and the first semiconductor portion 21 to be reduced. A low on-resistance can be obtained.

[0061] FIG. 8 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 8, in the semiconductor device 113 according to the embodiment, the third partial region 13 includes a first face f1. The first face f1 faces the third insulating region 41c in the second direction D2. The fourth partial region 14 includes a first side face s1. The first side face s1 faces the first insulating region 41a in the first direction D1. The fifth partial region 15 includes a second side face s2. The second side face s2 faces the second insulating region 41b in the first direction D1.

[0062] The angle between the first face f1 and the first side face s1 is the first angle θ1. The angle between the first face f1 and the second side face s2 is the second angle θ2. The first angle θ1 is larger than the second angle θ2. The first angle θ1 is, for example, larger than 90 degrees. When the first angle θ1 is large, for example, a low on-resistance is easily obtained. High reliability is easily obtained.

[0063] For example, the absolute value of the difference between the second angle θ2 and 90 degrees is smaller than the absolute value of the difference between the first angle θ1 and 90 degrees. The second angle θ2 is close to 90 degrees. With such a second angle θ2, a high threshold voltage is easily obtained. The second angle θ2 may be less than 90 degrees. A higher threshold voltage is easily obtained.

[0064] The configuration of the semiconductor device 113 may be the same as that of the semiconductor device 112, except for the difference in angle.

[0065] FIG. 9 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. As shown in FIG. 9, in the semiconductor device 113a according to the embodiment, the third partial region 13 includes a first face f1. The fourth partial region 14 includes a first side face s1. The fifth partial region 15 includes a second side face s2. The second angle θ2 between the first face f1 and the second side face s2 is, for example, not less than 70 degrees and not more than 110 degrees. When the second angle θ2 is close to 90 degrees, a high threshold voltage is easily obtained. The second angle θ2 may be less than 90 degrees. A higher threshold voltage is easily obtained.

[0066] FIG. 10 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 10, in the semiconductor device 114 according to the embodiment, the third partial region 13 includes a third facing region p3. The third facing region p3 contacts the third insulating region 41c. At least a portion of the third facing region p3 includes the first element. The configuration of the semiconductor device 114 other than the above may be similar to the configuration of the semiconductor device 110 or the semiconductor device 111.

[0067] In the semiconductor device 114, the third opposing region p3 is an n-type region. In this manner, in addition to the n-type first opposing region p1, the n-type third opposing region p3 may be provided.

[0068] FIG. 11 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 11, in a semiconductor device 114a according to the embodiment, a compound member 45 is provided. The third partial region 13 includes a third opposing region p3. The third opposing region p3 is in contact with the third compound region 45c. At least a portion of the third opposing region p3 includes the first element. The configuration of the semiconductor device 114a other than the above may be similar to the configuration of the semiconductor device 112.

[0069] In the semiconductor device 114a, the third opposing region p3 is an n-type region. In this manner, in addition to the first opposing region p1 of n-type, the third opposing region p3 of n-type may be provided.

[0070] In the semiconductor device 114 and the semiconductor device 114a, a high threshold voltage and a low on-resistance can be obtained, and a semiconductor device with improved characteristics can be provided.

[0071] FIG. 12 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 12, in the semiconductor device 115 according to the embodiment, the shape of the third electrode 53 is different from the shape of the third electrode 53 in the semiconductor device 112. The configuration of the semiconductor device 115 other than the above may be similar to the configuration of the semiconductor device 112.

[0072] In the semiconductor device 115, the third electrode 53 includes a first end 53a and a second end 53b. The first end 53a is the end on the first electrode 51 side. The second end 53b is the end on the second electrode 52 side.

[0073] The position of the first end 53a in the first direction D1 is between the position of the first electrode 51 in the first direction D1 and the position of the second end 53b in the first direction D1. The position of the second end 53b in the first direction D1 is between the position of the first end 53a in the first direction D1 and the position of the second electrode 52 in the first direction D1.

[0074] The first end 53a is located between the fourth partial region 14 and the fifth partial region 15 in the first direction D1. The position of the second semiconductor portion 22 in the second direction D2 is between the position of the first end 53a in the second direction D2 and the position of the second end 53b in the second direction D2.

[0075] Even when such a shape is provided, a high threshold voltage and a low on-resistance can be obtained. A semiconductor device with improved characteristics can be provided. The third electrode 53 having such a shape may be applied to the semiconductor device 110 or the semiconductor device 111.

[0076] Second embodiment FIG. 13 is a schematic cross-sectional view illustrating a semiconductor device according to the second embodiment. As shown in FIG. 13, in the semiconductor device 120 according to the embodiment, the second opposing region p2 is p-type. The configuration of the semiconductor device 120 other than the above may be the same as that of any semiconductor device according to the first embodiment.

[0077] In the semiconductor device 120, the second opposing region p2 contains a second element. The second element contains at least one of Mg, Zn, and C. In this example, the second opposing region p2 is a p-type region.

[0078] The first opposing region p1 does not contain the second element. Or, the concentration of the second element in the first opposing region p1 is lower than the concentration of the second element in the second opposing region p2.

[0079] By providing the p-type second opposing region p2, a higher threshold voltage can be obtained. For example, a high threshold voltage can be stably obtained.

[0080] In the embodiment, at least one of the first electrode 51 and the second electrode 52 contains at least one selected from the group consisting of, for example, Ti, Al, Cu, and Au. For example, the third electrode 53 contains at least one selected from the group consisting of TiN, WN, Ni, TaN, Ni, Au, Al, Ru, and W.

[0081] In the embodiment, the third electrode 53 may contain, for example, conductive silicon, or polysilicon. The third electrode 53 may contain, for example, conductive poly-GaN, or poly-AlGaN.

[0082] In the embodiment, the composition ratio x2 may be 1 or less. For example, the second semiconductor region 20 contains Al x2 Ga 1-x2 N (0 <x2 ≦ 1, x1 <x2). In the embodiment, the composition ratio x3 may be equal to or greater than the composition ratio x2. For example, the first film 41p contains Al x3 Ga 1-x3 N (0 <x3 ≦ 1, x2 ≦ x3).

[0083] As already described, an AlN layer may be provided between the first semiconductor region 10 and the second semiconductor region 20. The thickness of the AlN layer is, for example, 3 nm or less. By providing the AlN layer, for example, the mobility is improved. For example, the on-resistance of the semiconductor device can be reduced.

[0084] For example, the nitride semiconductor layer 10B (see FIG. 1) may include a GaN layer containing carbon. The concentration of carbon in the GaN layer containing carbon is higher than the concentration of carbon in the first semiconductor region 10. This makes it possible to suppress leakage current.

[0085] In the embodiment, when the distance d1 (see FIG. 1) is 100 nm or more, for example, the short channel effect is unlikely to occur.

[0086] In one example of a method for manufacturing the semiconductor device 110, as described above, a recess may be formed in a stacked body not including an n-type region, and an n-type region may be formed in a part of the first semiconductor region 10. The n-type region may be formed, for example, by ion implantation. When forming an n-type region in a part of the first semiconductor region 10, the first element may also be included in a part of the first semiconductor portion 21. For example, the concentration of the first element in the part of the first semiconductor portion 21 may be higher than the concentration of the first element in the second semiconductor portion 22. This makes it possible to widen the process margin. A semiconductor device with stable characteristics is easily obtained. Thereafter, an insulating film is formed as described above, and the first to third electrodes 51 to 53 are formed. The semiconductor device 110 can also be formed by such a method.

[0087] In the semiconductor device 112 (see FIG. 5), the thickness of the third compound region 45c along the second direction D2 may be greater than the thickness of the first compound region 45a along the first direction D1. The thickness of the third compound region 45c along the second direction D2 may be greater than the thickness of the second compound region 45b along the first direction D1. When the third compound region 45c is thick, for example, a high carrier concentration can be obtained. A low on-resistance can be easily obtained. A high threshold voltage can be stably obtained. High reliability can be easily obtained.

[0088] In the semiconductor device 112b (see FIG. 7), the first semiconductor portion 21 in contact with the fourth partial region 14 may contain a first element. For example, the concentration of the first element in the first semiconductor portion 21 may be higher than the concentration of the first element in the second semiconductor portion 22. This makes it possible to widen the process margin. A semiconductor device with stable characteristics can be easily obtained.

[0089] In the semiconductor device 113 (see FIG. 8), when the first angle θ1 is large, for example, the coverage of the first insulating region 41a is stable. For example, a uniform film is easily obtained.

[0090] Information on the thickness and shape can be obtained, for example, by observation using an electron microscope, etc. Information on the composition can be obtained by secondary ion mass spectrometry (SIMS) or energy dispersive X-ray spectroscopy (EDX), etc.

[0091] According to the embodiment, it is possible to provide a semiconductor device with improved characteristics.

[0092] In this specification, "electrically connected" includes a state in which multiple conductors are in physical contact with each other and a current flows between the multiple conductors. "Electrically connected" includes a state in which a conductor is inserted between multiple conductors and a current flows between the multiple conductors.

[0093] In this specification, "vertical" and "parallel" do not only mean strictly vertical and strictly parallel, but also include, for example, variations in the manufacturing process, and may mean substantially vertical and substantially parallel.

[0094] The above describes the embodiments of the present invention with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of each element, such as an electrode, a semiconductor member, a semiconductor region, a nitride member, and an insulating member, included in a semiconductor device are included in the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain the same effects by appropriately selecting them from the known range.

[0095] Furthermore, any combination of two or more elements of each of the specific examples, within the scope of technical feasibility, is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0096] In addition, all semiconductor devices that can be implemented by those skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also belong to the scope of the present invention as long as they include the gist of the present invention.

[0097] In addition, within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0098] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0099] 10...semiconductor region, 10C...carrier region, 10B...nitride semiconductor layer, 10M...semiconductor member, 10s...base, 11-15...first to fifth partial regions, 20...second semiconductor region, 21, 22...first and second semiconductor portions, 41...first insulating member, 41a-41e...first to fifth insulating regions, 41p, 41q...first and second films, 42...second insulating member, 42a, 42b...first and second insulating portions, 45...compound member, 45a-45e...first to fifth compound regions, 51-53...first to third electrodes, 53a, 53b...first and second ends, θ1, θ2...first and second angles, 110, 110a, 111, 112, 112a, 112b, 113, 113a, 114, 114a, 115, 119, 120...semiconductor device; D1, D2...first and second directions; Lgd...gate-drain distance; R1...specific on-resistance; d1...distance; f1 to f3...first to third surfaces; p1 to p3...first to third opposing regions; s1, s2...first and second side surfaces

Claims

1. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; a third electrode, the position of the third electrode in the first direction being between the position of the first electrode in the first direction and the position of the second electrode in the first direction; A semiconductor member comprising a first semiconductor region and a second semiconductor region, The first semiconductor region is Al ｘ１ G １－ｘ１ N (0≦x1<1), the first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a direction from the first partial region to the first electrode is along a second direction intersecting the first direction, a direction from the second partial region to the second electrode is along the second direction, a direction from the third partial region to at least a part of the third electrode is along the second direction, a position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction, and a position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction; The second semiconductor region is Al ｘ２ G １－ｘ２ N (0 < x2 ≦ 1, x1 < x2), the second semiconductor region includes a first semiconductor portion and a second semiconductor portion, the direction from the fourth partial region to the first semiconductor portion is along the second direction, and the direction from the fifth partial region to the second semiconductor portion is along the second direction; a first insulating member, the first insulating member including a first insulating region, a second insulating region, and a third insulating region, the first insulating region being between the fourth partial region and the third electrode in the first direction, the second insulating region being between the third electrode and the fifth partial region in the first direction, and the third insulating region being between the third partial region and the third electrode in the second direction; Equipped with the fourth partial region includes a first opposing region in contact with the first insulating region, the fifth partial region includes a second opposing region in contact with the second insulating region, the first opposing region includes a first element including at least one of Si, Ge, Te, and Sn, a semiconductor device in which the second opposing region does not contain the first element, or a concentration of the first element in the second opposing region is lower than a concentration of the first element in the first opposing region.

2. the first insulating member includes a first film and a second film, the first film is provided between the second film and the semiconductor member, The first film is Al ｘ３ G １－ｘ３ N (0<x3≦1, x2≦x3), The semiconductor device according to claim 1 , wherein the second film contains silicon and oxygen.

3. the first opposing region is in contact with a portion of the first film, The semiconductor device according to claim 2 , wherein the second opposing region is in contact with another part of the first film.

4. Further comprising a second insulating member including silicon and nitrogen; the second insulating member includes a first insulating portion and a second insulating portion, the first semiconductor portion is between the fourth portion region and the first insulating portion in the second direction; The semiconductor device according to claim 2 , wherein the second semiconductor portion is located between the fifth portion region and the second insulating portion in the second direction.

5. the second film does not contain nitrogen, or the concentration of nitrogen contained in the second film is lower than the concentration of nitrogen contained in the second insulating member; 5. The semiconductor device according to claim 4, wherein the second insulating member does not contain oxygen, or the concentration of oxygen contained in the second insulating member is lower than the concentration of oxygen contained in the second film.

6. the third partial region includes a third opposing region in contact with the third insulating region, 6. The semiconductor device according to claim 1, wherein at least a portion of said third opposing region contains said first element.

7. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction; a third electrode, the position of the third electrode in the first direction being between the position of the first electrode in the first direction and the position of the second electrode in the first direction; A semiconductor member comprising a first semiconductor region and a second semiconductor region, The first semiconductor region is Al ｘ１ G １－ｘ１ N (0≦x1<1), the first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, a direction from the first partial region to the first electrode is along a second direction intersecting the first direction, a direction from the second partial region to the second electrode is along the second direction, a direction from the third partial region to at least a part of the third electrode is along the second direction, a position of the fourth partial region in the first direction is between a position of the first partial region in the first direction and a position of the third partial region in the first direction, and a position of the fifth partial region in the first direction is between the position of the third partial region in the first direction and a position of the second partial region in the first direction; The second semiconductor region is Al ｘ２ G １－ｘ２ N (0 < x2 ≦ 1, x1 < x2), the second semiconductor region includes a first semiconductor portion and a second semiconductor portion, the direction from the fourth partial region to the first semiconductor portion is along the second direction, and the direction from the fifth partial region to the second semiconductor portion is along the second direction; a first insulating member, the first insulating member including a first insulating region, a second insulating region, and a third insulating region, the first insulating region being between the fourth partial region and the third electrode in the first direction, the second insulating region being between the third electrode and the fifth partial region in the first direction, and the third insulating region being between the third partial region and the third electrode in the second direction; A ｘ３ G １－ｘ３ N (0<x3≦1, x2≦x3), the compound member including a first compound region and a second compound region, the first compound region being between the fourth partial region and the first insulating region in the first direction, and the second compound region being between the second insulating region and the fifth partial region in the first direction; Equipped with the fourth partial region includes a first opposing region in contact with the first compound region, the fifth partial region includes a second opposing region in contact with the second compound region, the first opposing region includes a first element including at least one of Si, Ge, Te, and Sn, a semiconductor device in which the second opposing region does not contain the first element, or a concentration of the first element in the second opposing region is lower than a concentration of the first element in the first opposing region.

8. The compound member further includes a third compound region; The semiconductor device according to claim 7 , wherein the third compound region is located between the third partial region and the third insulating region in the second direction.

9. Further comprising a second insulating member including silicon and nitrogen; the second insulating member includes a first insulating portion and a second insulating portion, the first semiconductor portion is between the fourth portion region and the first insulating portion in the second direction; The semiconductor device according to claim 7 , wherein the second semiconductor portion is located between the fifth portion region and the second insulating portion in the second direction.

10. the first insulating member includes silicon and oxygen; the first insulating member does not contain nitrogen, or the concentration of nitrogen contained in the first insulating member is lower than the concentration of nitrogen contained in the second insulating member; 10. The semiconductor device according to claim 9, wherein the second insulating member does not contain oxygen, or the concentration of oxygen contained in the second insulating member is lower than the concentration of oxygen contained in the first insulating member.

11. the third partial region includes a third opposing region in contact with the third compound region, The semiconductor device according to claim 8 , wherein at least a portion of the third opposing region contains the first element.

12. The semiconductor device according to any one of claims 1 to 11, wherein a distance along the first direction between the first electrode and the third electrode is shorter than a distance along the first direction between the third electrode and the second electrode.

13. The semiconductor device according to any one of claims 1 to 11, wherein a distance along the first direction between the first electrode and the third electrode is longer than a distance along the first direction between the third electrode and the second electrode.

14. The third region includes a first surface, the first surface faces the third insulating region; the second semiconductor portion includes a second surface and a third surface; The third surface faces the fifth partial region, the second surface is opposite to the third surface in the second direction, 14. The semiconductor device according to claim 1, wherein a distance between said first surface and said second surface along said second direction is not less than 100 nm and not more than 400 nm.

15. the third portion region includes a first surface facing the third insulating region; the fourth portion region includes a first side surface facing the first insulating region; the fifth portion region includes a second side surface facing the second insulating region; 14. The semiconductor device according to claim 1, wherein an angle between said first surface and said first side surface is larger than an angle between said first surface and said second side surface.

16. the third portion region includes a first surface facing the third insulating region; the fifth portion region includes a second side surface facing the second insulating region; 14. The semiconductor device according to claim 1, wherein an angle between said first surface and said second side surface is equal to or greater than 70 degrees and equal to or less than 110 degrees.

17. the second opposing region includes a second element including at least one of Mg, Zn, and C; The semiconductor device according to any one of claims 1 to 16, wherein the first opposing region does not contain the second element, or the concentration of the second element in the first opposing region is lower than the concentration of the second element in the second opposing region.

18. 18. The semiconductor device according to claim 1, wherein at least a portion of said first partial region contains said first element.

19. the third electrode includes a first end and a second end; a position of the first end in the first direction is between the position of the first electrode in the first direction and a position of the second end in the first direction; the first end is between the fourth partial region and the fifth partial region in the first direction, A semiconductor device according to any one of claims 1 to 18, wherein the position of the second semiconductor portion in the second direction is between the position of the first end portion in the second direction and the position of the second end portion in the second direction.

20. The concentration of the first element in the first opposing region is 1×10 １６ cm －３ Above 5 x 10 １９ cm －３ 20. The semiconductor device according to claim 1, wherein:

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