Reverse connection damage prevention circuit

Abstract

To provide a reverse connection failure preventing circuit in which a circuit for detecting the voltage of an input power source is not separately required, and a voltage drop / power loss is small.SOLUTION: A reverse connection failure preventing circuit A includes a first path 11 having one end connected to a power source and the other end connected to a load 30, a second path 12 having one end connected to the power source and the other end connected to the load 30, a third path 13 having one end connected to the first path 11 and the other end connected to an FET 21, a fifth path 15 having one end connected to the first path 11 and the other end connected to the second path 12, and a sixth path 16 having one end connected to the third path 13, having, between the ends, a point electrically connected to and intersecting the fifth path 15, and having the other end connected to the second path 12. The FET 21 is disposed on the second path 12. A first resistor is disposed on the third path 13. A diode 23, a second resistor 24, and a constant voltage diode 25 are disposed on the fifth path 15. A third resistor 26 is disposed on the sixth path 16.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a reverse connection damage prevention circuit that prevents damage to a load and protects the load when the polarity of an input power supply is connected in reverse. [Background technology]

[0002] The input power supply that supplies power to a load such as an LED lighting device for DC power distribution has polarity, so if it is connected in reverse, there is a risk of damaging the load.

[0003] For this reason, in order to prevent damage to the load and protect the load when the polarity of the input power supply is connected in reverse, conventional devices use comparators, etc. to detect the voltage of the input power supply and turn it ON (= conduct the electric circuit) if it is appropriate, or turn it OFF (= cut off the electric circuit) if it is inappropriate. A configuration in which a voltage detection circuit is provided is disclosed.

[0004] Also disclosed is a configuration in which a diode is provided in series with the electrical path to prevent current from flowing when the polarity of the input power supply is connected in reverse.

[0005] For example, Patent Document 1 discloses, as a conventional technique, a configuration in which a diode and an electric circuit to be protected are connected in series between a positive power supply terminal and a negative power supply terminal. In this configuration, when the power supply is reverse-connected and the potential of the negative power supply terminal is higher than the potential of the positive power supply terminal, the diode blocks the current. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2001-314032 A DISCLOSURE OF THEINVENTION [Problem to be solved by the invention]

[0007] However, in the case of a configuration in which a voltage detection circuit is provided, it is necessary to configure a separate circuit for voltage detection, which is inconvenient.

[0008] Furthermore, in a configuration where a diode is placed in series with an electric circuit, a typical PN junction diode will cause a voltage drop and power loss of approximately 0.6 V due to the voltage drop VF. When the amount of current flowing through the circuit is large or the voltage is high, a voltage drop and power loss of around 0.6 V is not much of a problem. However, when the amount of current flowing through the circuit is small or the voltage is low, even a voltage drop of around 0.6 V can result in a large loss and become a problem.

[0009] Therefore, the present invention is intended to solve the above-mentioned problems by providing a reverse connection damage prevention circuit that does not require the configuration of a separate circuit for detecting the voltage of the input power supply and has little voltage drop and power loss. [Means for solving the problem]

[0010] The invention of claim 1 is as follows: A reverse connection damage prevention circuit that prevents damage to a load due to reverse connection of a power supply, A first electric circuit having one end connected to a positive electrode of a power source and the other end connected to one end of a load; a second electric circuit having one end connected to the negative electrode of the power source and the other end connected to the other end of the load; a third electric path having one end connected to the first electric path and the other end connected to a gate of a field effect transistor; a fifth electric circuit having one end connected to the first electric circuit at a location farther from the one end of the first electric circuit than the one end of the third electric circuit, and having the other end connected to the second electric circuit; A sixth electric path has one end connected to the third electric path, is electrically connected to and intersects with the fifth electric path midway, and has the other end connected to the second electric path; The field effect transistor is provided on the second electric path by connecting a drain to a negative electrode side of the power supply and a source to the other end side of a load, a first resistor is provided on the third electric circuit at a location closer to the one end connected to the first electric circuit than a connection location with the sixth electric circuit; On the fifth electric path, a diode with a cathode on the first electric path side, a second resistor, and a constant voltage diode with a cathode on the first electric path side are provided in that order from the end connected to the first electric path; A third resistor is provided on the sixth electric circuit at a location closer to the other end connected to the second electric circuit than the intersection with the fifth electric circuit, thereby forming a reverse connection damage prevention circuit. Effect of the Invention

[0011] By applying and using the reverse connection damage prevention circuit according to the present invention, damage to a load such as an LED lighting device for DC power distribution caused by reverse connection of the input power supply can be prevented, and the load can be protected.

[0012] In addition, there is no longer a need to configure a separate circuit for detecting the voltage of the input power supply to detect whether the polarity of the input power supply is properly connected. A simple circuit configuration using field effect transistors (FETs) and resistors can conveniently prevent damage to the load caused by reverse connection of the input power supply and protect the load.

[0013] Furthermore, the reverse connection damage prevention circuit according to the present invention is configured to minimize voltage drop and power loss compared to a configuration in which a diode is provided in series with an electric circuit to prevent current from flowing in the circuit when the polarity of the input power supply is connected in reverse. In particular, when the amount of current flowing in the circuit is small or the voltage is low, the advantage of minimizing this voltage drop and power loss is significant. [Brief description of the drawings]

[0014] [Figure 1] 1 is a configuration diagram of a reverse connection damage prevention circuit according to a first embodiment of the present invention. FIG. [Diagram 2] 1 is a conceptual configuration diagram of a field-effect transistor in a reverse connection damage prevention circuit according to a first embodiment of the present invention; [Diagram 3]4 is an explanatory diagram showing the operation of a field-effect transistor in the reverse connection damage prevention circuit according to the first embodiment of the present invention. FIG. [Figure 4] 4 is an explanatory diagram showing the operation of a field-effect transistor in the reverse connection damage prevention circuit according to the first embodiment of the present invention. FIG. [Diagram 5] 4 is an explanatory diagram showing the operation of the reverse connection damage prevention circuit according to the first embodiment of the present invention; FIG. [Figure 6] 4 is an explanatory diagram showing the operation of a field-effect transistor in the reverse connection damage prevention circuit according to the first embodiment of the present invention. FIG. [Figure 7] 4 is an explanatory diagram showing the operation of the reverse connection damage prevention circuit according to the first embodiment of the present invention; FIG. [Figure 8] FIG. 13 is a configuration diagram of a reverse connection damage prevention circuit according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] (Embodiment Example 1) First, the configuration of the reverse connection damage prevention circuit A according to the first embodiment of the present invention will be described with reference to Fig. 1. If a DC input power supply is connected with the polarity reversed by mistake to a load such as an LED lighting device for DC power distribution, the load may be damaged. Therefore, the reverse connection damage prevention circuit A according to the first embodiment of the present invention prevents the load from being damaged even if the DC input power supply is connected with the polarity reversed. This is a protection circuit that prevents damage and protects the load.

[0016] 1, one end of the first electric circuit 11 is connected to the positive electrode of a DC input power supply (not shown), and the other end is connected to one end of a load 30. One end of the second electric circuit 12 is connected to the negative electrode of the DC input power supply, and the other end is connected to the other end of the load 30. One end of the third electric circuit 13 is connected to the first electric circuit 11, and the other end is connected to the gate (G) of a field effect transistor (FET) 21.

[0017] One end of the fifth electric path 15 is connected to the first electric path 11 at a location farther from one end of the first electric path 11 than one end of the third electric path 13, and the other end is connected to the second electric path 12. One end of the sixth electric path 16 is connected to the third electric path 13, electrically connects to and intersects with the fifth electric path 15 midway, and the other end is connected to the second electric path 12.

[0018] On the second circuit 12, a field effect transistor (FET) 21 is arranged in series by connecting a drain (D) to one end to which the negative electrode of the input power supply is connected and connecting a source (S) to the other end to which the other end of the load 30 is connected.

[0019] A first resistor 22 is provided on the third electric circuit 13 at a position closer to one end connected to the first electric circuit 11 than to the connection point with the sixth electric circuit 16. The resistance value of the first resistor 22 is, for example, 1 M(Ω).

[0020] On the fifth electric circuit 15, in order of proximity to the connection point of the first electric circuit 11, a diode 23 with the first electric circuit 11 side as the cathode (K), a second resistor 24, and a constant voltage diode 25 with the first electric circuit 11 side as the cathode (K) are provided. The resistance value of the second resistor 24 is, for example, 10 (Ω). Furthermore, a normal constant voltage diode outputs a constant voltage when a predetermined voltage is applied in the reverse direction to the pn junction. The constant voltage diode 25 outputs a constant voltage of 10 (V) or 20 (V).

[0021] A third resistor 26 is provided on the sixth electric path 16 at a position closer to the other end connected to the second electric path 12 than the intersection with the fifth electric path 15. The resistance value of the third resistor 26 is, for example, 1 M(Ω).

[0022] Next, a description will be given of the field effect transistor (FET) 21. In the first embodiment, the field effect transistor (FET) 21 is an n-channel MOS-FET (insulated gate field effect transistor).

[0023] 2, a field effect transistor (FET) 21 is generally configured by joining a p-type semiconductor 211 and an n-type semiconductor 212. The field effect transistor (FET) 21 has three electrodes: a drain (D), a source (S), and a gate (G). The drain (D) and the source (S) are each connected to the n-type semiconductor 212. The source (S) is connected not only to the n-type semiconductor 212 but also to the p-type semiconductor 211. The gate (G) is made of, for example, metal, and is connected to the p-type semiconductor 211 via an oxide insulating film 213.

[0024] A voltage with drain (D) + polarity (positive polarity) is applied between the drain (D) and source (S), and a voltage with gate (G) + polarity (positive polarity) is applied between the gate (G) and source (S). Then, as shown in Figure 3, electrons are attracted to the p-type semiconductor 211 (inversion layer 214) directly below the oxide insulating film 213, and the p-type semiconductor 211 changes to an n-type semiconductor (is inverted). Then, a current flows from the drain (D) to the source (S).

[0025] As described above, the field effect transistor (FET) 21 is configured by junction of a p-type semiconductor 211 and an n-type semiconductor 212. The source (S) is connected not only to the n-type semiconductor 212 but also to the p-type semiconductor 211. Therefore, when a voltage with source (S) + polarity (positive polarity) is applied between the drain (D) and source (S), a current flows from the source (S) to the drain (D) as shown in Fig. 4. This is due to the action of a body diode (parasitic diode) formed between the drain (D) and source (S) as a result of the field effect transistor (FET) structurally having a p-type semiconductor and an n-type semiconductor junction.

[0026] <Operation of reverse connection damage prevention circuit A (in the case of forward connection)> Next, the operation of the reverse connection damage prevention circuit A of the first embodiment of the present invention will be described. As shown in Fig. 5, when the input power supply is forward connected to the reverse connection damage prevention circuit A, a current flows through the path "first electric circuit 11 → load 30 → second electric circuit 12". In addition, in the field effect transistor (FET) 21 on the second electric circuit 12, a current flows from "source (S) → drain (D)". A detailed explanation will be given below.

[0027] A small current flows through the third electric circuit 13 because the resistance value of the first resistor 22 is large, at 1 M (Ω). The current that flows through the path "third electric circuit 13 → sixth electric circuit 16" flows through the second electric circuit 12, and flows between the source (S) and drain (D) due to the action of the body diode of the field effect transistor (FET) 21 on the second electric circuit. The current that flows through the path "third electric circuit 13 → sixth electric circuit 16" causes the constant voltage diode 25 to output a constant voltage (for example, 10 V).

[0028] The first resistor 22 serves to adjust the amount of current flowing through the constant voltage diode 25 in order to make the constant voltage diode 25 output a constant voltage. The current that has flowed through the path "third electric circuit 13 → sixth electric circuit 16" tries to flow through the third resistor 26, but because the resistance value of the third resistor 26 is large, the amount of current that flows is small. Therefore, most of the current that has flowed through the path "third electric circuit 13 → sixth electric circuit 16" flows through the constant voltage diode 25.

[0029] Further, the current that has flowed on the third current path 13 flows to the sixth current path 16, but some of the current flows directly on the third current path 13. As a result, charge is accumulated on the gate (G) of the field effect transistor (FET) 21.

[0030] When charge accumulates at the gate (G) of the field effect transistor (FET) 21 and a voltage of positive polarity is applied, the p-type semiconductor 211 (inversion layer 214) directly below the oxide insulating film 213 changes (inverts) to an n-type semiconductor, and the field effect transistor (FET) 21 turns ON. When the field effect transistor (FET) 21 turns ON, it becomes a simple resistor (R) and current flows in either direction. Currently, as shown in Figure 6, a voltage of positive polarity is applied to the source (S), so current flows from "source (S) to drain (D)".

[0031] In this case, since the field effect transistor (FET) 21 is ON, the resistance value is low and there is almost no voltage drop. Therefore, due to the action of the body diode, a current does not flow from the p-type semiconductor 211 to the n-type semiconductor 212 in the field effect transistor (FET) 21, but flows from "source (S) → n-type semiconductor 212 connected to the source (S) → inversion layer 214 (n-type semiconductor) → n-type semiconductor 212 connected to the drain (D) → drain (D)".

[0032] When the input power supply and the reverse connection damage prevention circuit A are disconnected, the charge accumulated in the gate (G) of the field effect transistor (FET) 21 is quickly consumed (discharged) by the "second resistor 24 with a small resistance value", the "diode 23" and the "load 30". When the load 30 is not connected to the circuit A, the power is consumed (discharged) by the "third resistor 26." However, since the resistance value of the third resistor 26 is large, the consumption (discharge) time is long.

[0033] Incidentally, the fifth electric circuit 15 is provided with a diode 23 having a cathode (K) on the first electric circuit 11 side, so that the current that has flowed through the first electric circuit 11 does not flow through the fifth electric circuit 15.

[0034] <Operation of reverse connection damage prevention circuit A (in the case of reverse connection)> 7, when the input power supply is reverse-connected to the reverse connection damage prevention circuit A, a voltage with drain (D) + polarity (positive polarity) is applied between the drain (D) and source (S) of the field effect transistor (FET) 21 on the second current path 12. However, when the drain (D) is taken as the reference, the gate (G) has a negative polarity (negative polarity), so that the p-type semiconductor 211 directly below the oxide insulating film 213 does not change to an n-type semiconductor (does not invert), and no current flows between the drain (D) and source (S) of the field effect transistor (FET) 21 on the second current path 12. As a result, no current flows in the load 30 either.

[0035] In addition, even if a current flows between the drain (D) and the source (S) of the field effect transistor (FET) 21 on the second current path 12, for example, when the input power supply is reverse-connected to the reverse connection damage prevention circuit A immediately after the field effect transistor (FET) 21 on the second current path 12 is in the ON state (= the p-type semiconductor 211 directly below the oxide insulating film 213 changes to an n-type semiconductor and a current flows between the drain (D) and the source (S)), the constant voltage diode 25 is provided on the fifth current path 15 and the third resistor 26 is provided on the sixth current path 26, thereby consuming the charge directed toward the gate (G) of the field effect transistor (FET) 21 and preventing the gate (G) from being turned ON (= the p-type semiconductor 211 directly below the oxide insulating film 213 changes to an n-type semiconductor). Furthermore, the charge remaining in the gate (G) of the field effect transistor (FET) 21 is consumed (discharged) by the "second resistor 24 having a small resistance value", the "diode 23", and the "load 30 (or input power supply)". In particular, the consumption of the charge is promoted by the second resistor 24 having a small resistance value and the diode 23 being provided on the fifth electric path 15.

[0036] By configuring the reverse connection damage prevention circuit A of the first embodiment of the present invention in this manner, it is possible to prevent damage to a load such as an LED lighting device for DC power distribution due to reverse connection of the input power supply, and to protect the load.

[0037] In addition, there is no longer a need to configure a separate circuit for detecting the voltage of the input power supply to detect whether the polarity of the input power supply is properly connected. A simple circuit configuration using field effect transistors (FETs) and resistors can conveniently prevent damage to the load caused by reverse connection of the input power supply and protect the load.

[0038] Furthermore, the reverse connection damage prevention circuit A according to the present invention is configured to minimize voltage drop and power loss compared to a configuration in which a diode is provided in series with an electric circuit to prevent current from flowing in the circuit when the polarity of the input power supply is connected in reverse. In particular, when the amount of current flowing in the circuit is small or the voltage is low, the advantage of minimizing this voltage drop and power loss is significant.

[0039] <Modification> Although the configuration of the reverse connection damage prevention circuit A according to the first embodiment of the present invention has been described above, the present invention is not limited to this configuration. For example, as shown in FIG. 8, the reverse connection damage prevention circuit B according to the present invention may be configured with the minimum necessary elements.

[0040] The reverse connection damage prevention circuit B includes a first electric circuit 11 having one end connected to the positive electrode of a DC input power source and the other end connected to one end of a load 30, a second electric circuit 12 having one end connected to the negative electrode of the power source and the other end connected to the other end of the load 30, and a third electric circuit 13 having one end connected to the first electric circuit 11 and the other end connected to the gate (G) of a field effect transistor (FET) 21.

[0041] The circuit also includes a fourth electric path 14 having one end connected to the third electric path 13 and the other end connected to the second electric path 12. One end of the fourth electric path 14 is connected to the third electric path 13 at a location between the first resistor 22 and the field effect transistor (FET) 21 on the third electric path 13.

[0042] A constant voltage diode 25 is provided on the fourth electric path 14, with the first electric path side serving as a cathode (K).

[0043] When the input power supply is forward-connected to the reverse connection damage prevention circuit B, a current flows through the path "first current circuit 11 → load 30 → second current circuit 12." As described above, in the field effect transistor (FET) 21 on the second current circuit 12, a current flows from "source (S) to drain (D)" due to the action of the body diode (parasitic diode).

[0044] When electric charge accumulates in the gate (G) of the field effect transistor (FET) 21, the field effect transistor (FET) 21 turns ON, and the p-type semiconductor 211 (inversion layer 214) directly below the oxide insulating film 213 changes to an n-type semiconductor (is inverted). Then, a current flows in the following order of the field effect transistor (FET) 21: "source (S) → n-type semiconductor 212 connected to the source (S) → inversion layer 214 (n-type semiconductor) → n-type semiconductor 212 connected to the drain (D) → drain (D)."

[0045] Next, when the input power supply is reverse-connected to the reverse connection damage prevention circuit B, a voltage with drain (D) + polarity (positive polarity) is applied between the drain (D) and source (S) of the field effect transistor (FET) 21 on the second current path 12. However, when the drain (D) is taken as the reference, the gate (G) has a - polarity (negative polarity), so the p-type semiconductor 211 directly below the oxide insulating film 213 does not change to an n-type semiconductor (does not invert), and no current flows between the drain (D) and source (S) of the field effect transistor (FET) 21 on the second current path 12. As a result, no current flows in the load 30 either.

[0046] Although the preferred embodiments of the present invention have been described above, it goes without saying that the reverse connection damage prevention circuit according to the present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the present invention. [Explanation of symbols]

[0047] 11: 1st electrical circuit, 12: 2nd electrical circuit, 13: 3rd electrical circuit, 14: 4th electrical circuit, 15: 5th electrical circuit, 16: 6th electrical circuit, 21: field effect transistor (FET), 211: p-type semiconductor, 212: n-type semiconductor, 213: oxide insulating film, 214: inversion layer, 22: first resistor, 23: diode, 24: second resistor, 25: constant voltage diode, 26: third resistor, 30: Load

Claims

[Claim 1] A reverse connection damage prevention circuit that prevents damage to a load due to reverse connection of a power supply, A first electric circuit having one end connected to a positive electrode of a power source and the other end connected to one end of a load; a second electric circuit having one end connected to the negative electrode of the power source and the other end connected to the other end of the load; a third electric path having one end connected to the first electric path and the other end connected to a gate of a field effect transistor; a fifth electric path having one end connected to the first electric path at a location farther from the one end of the first electric path than the one end of the third electric path, and having the other end connected to the second electric path; a sixth electric path having one end connected to the third electric path, electrically connected to and intersecting with the fifth electric path midway, and having the other end connected to the second electric path; The field effect transistor is provided on the second electric path by connecting a drain to a negative electrode side of the power supply and a source to the other end side of a load, A first resistor is provided on the third electric circuit at a location closer to the one end connected to the first electric circuit than a connection location with the sixth electric circuit, On the fifth electric path, a diode having a cathode on the first electric path side, a second resistor, and a constant voltage diode having a cathode on the first electric path side are provided in this order from the end connected to the first electric path, A reverse connection damage prevention circuit, characterized in that a third resistor is provided on the sixth electric path at a location closer to the other end connected to the second electric path than the intersection with the fifth electric path.

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