BACKPLANE CONNECTOR HAVING SHIELD TERMINALS - Patent application

Abstract

A backplane connector system includes an electromagnetic shielding terminal enclosure for protecting high speed differential data signals from harmful electromagnetic signals. Such terminal enclosure includes connected U-shaped shields including protrusions that slidably contact one another to form multiple electrical ground paths. The multiple paths direct such harmful signals away from the high speed differential data signals.

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Provisional Patent Application No. 63 / 143,658, filed January 29, 2021, which is incorporated by reference in its entirety.

[0002] The present disclosure relates to the field of connectors, and more particularly, to high speed data connectors. [Background technology]

[0003] Backplane connectors used in many different applications are designed to provide specific characteristics, such as the ability to support high speed data rates.

[0004] Some backplane connectors may be configured in an orthogonal configuration (e.g., a configuration including two electronic circuit boards arranged orthogonally to one another). The orthogonal configuration allows for a main circuit board at the bottom and multiple secondary circuit boards (often referred to as daughter cards) arranged orthogonal to the main circuit board but parallel to one another. Each daughter card may support one or more integrated circuits (ICs) that provide the desired processing functionality.

[0005] One problem with backplane connectors is the amount of electrical crosstalk between adjacent pairs of high speed differential data signals. Existing techniques for reducing crosstalk are inadequate.

[0006] Therefore, there is a need for a backplane connector that reliably supports high data rates with minimal crosstalk. Summary of the Invention

[0007] In one embodiment, an exemplary backplane connector system may comprise a first orthogonally disposed connector assembly including a first housing and a first wafer set, the first wafer set including one or more first wafers, each first wafer including one or more first U-shaped shields, each first shield configured as a first portion of an electromagnetically shielded terminal enclosure for protecting high speed differential data signals (e.g., signals up to at least 112 Gigabits per second (Gbps)) from harmful electromagnetic signals; and a second orthogonally disposed connector assembly including a second housing configured to connect to the first housing and a second wafer set, the second wafer set including one or more second wafers, each second wafer including an electrical ground plane including one or more integral second U-shaped shields, each second shield configured as a second portion of an electromagnetically shielded terminal enclosure for protecting high speed differential data signals from harmful electromagnetic signals.

[0008] The first assembly may further include an electrical grounding insert connected to each of the one or more first U-shaped shields of each first wafer to form an electrical ground path at each connection.

[0009] In an embodiment, each of the one or more first U-shaped shields of a respective first wafer may include opposing sidewalls, each opposing sidewall may include at least one first protrusion. Further, each first protrusion may be configured to slidably contact one or more second protrusions from one of the one or more second U-shaped shields to form an electromagnetic shield terminal enclosure and to form an electrical ground path that includes the first protrusion and the one or more second protrusions.

[0010] Each of the one or more first wafers may be configured to be offset from adjacent wafers within the first wafer set to reduce the effects of unwanted harmful electromagnetic signals (e.g., crosstalk).

[0011] The second housing may further include a support structure for at least supporting and aligning the electromagnetic shield terminal enclosure. Such a support structure may include one or more openings, one or more separation ribs, and one or more tower bases. In an embodiment, (i) one of the one or more openings may be configured to receive a set of shields including one of the one or more first U-shaped shields and one of the one or more second U-shaped shields, (ii) one of the one or more bases may support the set of shields, and / or (iii) one of the one or more ribs may be configured to maintain alignment and separation of the set of shields.

[0012] Still further, each of the first U-shaped shields may include a first terminal support structure, and each of the second U-shaped shields may include a second terminal support structure. In an embodiment, the first terminal support structure may be configured at a position within each first U-shaped shield to function as a fulcrum for supporting an end portion of each terminal of the first wafer set, and similarly, the second terminal support structure may be configured at a position within each second U-shaped shield to function as a fulcrum for supporting an end portion of each terminal of the second wafer set.

[0013] Each of the one or more second U-shaped shields may include opposing sidewalls, each sidewall being slidably in contact with one or more first protrusions of one of the one or more first U-shaped shields to form an electromagnetic shield terminal enclosure and may include one or more second protrusions configured to form an electrical grounding path including the first protrusion and the second protrusion.

[0014] Still further, each of the one or more second U-shaped shields may include one or more integral ground wings, each configured to contact one of the first U-shaped shields to form an electrical ground path. Thus, by having a second U-shaped shield with multiple contact wings that may contact multiple first U-shaped shields, a highly redundant ground structure may be established throughout the system.

[0015] Each of the one or more second U-shaped shields may additionally include an extension connected to the electrically grounding cover to form an electrical grounding path between the shield and the cover.

[0016] In addition to the embodiments described above, another exemplary backplane connector system may comprise a first orthogonally disposed connector assembly including a first housing and a first wafer set, the first wafer set including one or more first wafers, each first wafer including one or more first U-shaped shields, each first shield configured as a first portion of an electromagnetically shielded terminal enclosure for protecting high speed differential data signals from harmful electromagnetic signals; and a second orthogonally disposed connector assembly including a second housing configured to connect to the first housing and provide multiple electrical ground paths between the first assembly and the second assembly and a second wafer set, the second wafer set including one or more second wafers, each second wafer including an electrical ground plane including one or more integral second U-shaped shields, each second shield configured as a second portion of an electromagnetically shielded terminal enclosure for protecting high speed differential data signals from harmful electromagnetic signals.

[0017] In such an embodiment, each of the one or more first U-shaped shields of each first wafer may include opposing sidewalls, each opposing sidewall may include at least one first protrusion. Each such protrusion may be configured to slidably contact one or more second protrusions from one of the one or more second U-shaped shields to form an electromagnetic shield terminal enclosure and at least one of the ground paths including the first protrusion and the second protrusion. Further, each of the one or more second U-shaped shields may include one or more integral ground wings, each wing may be configured to contact one of the first U-shaped shields to form at least a second of the ground paths.

[0018] Yet another exemplary backplane connector system may include a pattern of offset electromagnetic shielded terminal enclosures, each configured as a set of electromagnetic U-shaped shields that form one or more electrical ground paths, and each terminal enclosure is not aligned next to an adjacent terminal enclosure formed by another set of electromagnetic U-shaped shields. [Brief description of the drawings]

[0019] The present disclosure is illustrated by way of example and not limitation in the accompanying drawings in which like reference numbers may refer to similar elements.

[0020] [Figure 1] 1 shows a diagram of an exemplary backplane connector system including two connected assemblies. [Diagram 2] Shows the same backplane connector system as in Figure 1, but with the assembly separated. [Diagram 3] 3 shows another view of the disconnected assembly of FIG. 2. [Figure 4] FIG. 2 shows an exploded view of one of the assemblies from the previous figure. [Diagram 5] FIG. 2 shows another exploded view of one of the assemblies of the previous figure. [Figure 6] An enlarged view of an exemplary U-shaped electromagnetic shield that may be used to form a first portion of an electromagnetic shielding terminal enclosure structure that shields conductive terminals transmitting high-speed differential data signals (hereinafter the electromagnetic shielding terminal enclosure may be referred to as a "terminal enclosure" or "cage"). [Figure 7] 1 shows a diagram of an offset terminal of a connector assembly. [Figure 8] 1 shows a simplified diagram of an exemplary wafer. [Figure 8A] 9 shows an enlarged view of the embodiment shown in FIG. 8. [Figure 9] 1 shows an exploded view of the second assembly. [Figure 10] 10 shows another exploded view of the assembly of FIG. 9. [Figure 11] 13 illustrates a plurality of second U-shaped shields forming a second portion of the exemplary terminal enclosure. [Figure 12] 1 illustrates an enlarged view of several second U-shaped shields forming a second portion of the exemplary terminal enclosure. [Figure 13] 1 illustrates a diagram of an exemplary connection of a first and second U-shaped shield. [Figure 14] 1 illustrates an expanded view of an exemplary connection of first and second U-shaped shields forming a terminal enclosure. [Figure 15] Shown is a pattern of offset terminal enclosures that form one or more electrical ground paths. [Figure 16] FIG. 1 shows a close-up view of a pattern of offset terminal enclosures that form one or more electrical ground paths. [Figure 17] A view of a partial connector assembly is shown with the wafer removed to understand that the wafer may be configured to form an offset terminal enclosure. [Figure 18] 18 shows a diagram of a wafer that can be used in the embodiment shown in FIG. 17. [Figure 18A] 18A shows a simplified cross-section along line 18-18 of FIG. [Figure 19]A close-up view of the connection of the second U-shaped electromagnetic shield to the electrical grounding cover is shown. [Figure 20] An exploded view of the wafer is shown. [Figure 21] 1 illustrates another partially exploded view of the wafer with the electrical grounding cover separated from the wafer. [Figure 22] 1 illustrates an exemplary electrical ground plane of a wafer. [Figure 23] 1 shows a view of a wafer without an electrical ground plane attached. [Figure 24] 13 shows the connection of an offset wafer to an offset tail alignment structure. [Diagram 25] 13 shows another view of the offset tail alignment structure. [Figure 26] 13 shows yet another view of the connection of an offset wafer to an offset tail alignment structure. [Figure 27] FIG. 13 shows a close-up view of the connection of the offset wafer to the offset tail alignment structure. [Figure 28] 1A-1C show diagrams of an exemplary wafer gripper. [Figure 29] 1 illustrates an enlarged view of a terminal enclosure supported by a housing of one of the assemblies of the exemplary system. [Diagram 30] 1 illustrates a side view of a terminal enclosure including an exemplary terminal support structure. [Diagram 31] 4 illustrates an exemplary opening for receiving an exemplary terminal support structure. [Diagram 32] 1 illustrates a partial view of an exemplary first connector mating with an exemplary second connector. [Diagram 33] 1 illustrates another view of a mating interface between an exemplary first connector and an exemplary second connector. [Diagram 34] 1 shows a simplified cross-sectional view of the first connector illustrating how a wafer shield may engage with an insert. [Diagram 35] 1 shows another view of a simplified cross section of the first connector with the wafer shield and frame omitted. [Diagram 36]1 shows an enlarged cross-sectional view of the first shield engaging the insert. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Simplicity and clarity in both illustration and description are required to effectively enable a person skilled in the art to make, use, and best practice the embodiments disclosed herein in light of what is already known in the art. Those skilled in the art will appreciate that various modifications and changes may be made to the specific embodiments described herein without departing from the spirit and scope of the present disclosure. Thus, the present specification and drawings should be considered illustrative and exemplary, rather than limiting or comprehensive, and all such modifications to the specific embodiments described herein are intended to be included within the scope of the present disclosure. Moreover, unless otherwise indicated, features disclosed herein may be combined together to form additional combinations not otherwise described or shown for purposes of brevity.

[0022] It should also be noted that one or more exemplary embodiments may be described or illustrated as a method or process. Although a method or process may be described as an exemplary sequence, it should be understood that steps within the sequence may be performed in parallel, concurrently, or simultaneously unless otherwise specified. In addition, the order of each forming step within a method or process may be changed. A described or illustrated method or process may be terminated when completed or may include additional steps not described or illustrated herein, for example, if such steps are known to one of ordinary skill in the art.

[0023] As used herein, the terms "high speed," "high data speed," and "high data rate" may be used interchangeably. As used herein, the terms "embodiment" or "exemplary" refer to examples falling within the scope of the present disclosure.

[0024] Referring now to FIG. 1, there is shown a diagram of an exemplary connector system 1 typically used in backplane applications. As shown, connector assembly 1 may include connector assemblies 2, 3, which are shown connected together to form connector system 1. Also shown in FIG. 1 is a first housing 4 of connector assembly 3 connected over a second housing 5 of connector assembly 2, it being understood that each connector assembly 2, 3 includes at least one housing (as used herein, the terms "first" and "second" are used to distinguish between two separate components, one for each assembly 2, 3). Although not shown in FIG. 1, each connector assembly 2, 3 may be connected to a substrate, such as a circuit board.

[0025] 2 and 3 show the same connector system 1, but with the connector assemblies 2, 3 not mated to one another.

[0026] 4, an exploded view of a first connector assembly 3 (hereinafter, the "first" connector assembly or simply the "first assembly" to distinguish it from the "second" connector assembly 2) is shown. As shown, the first connector assembly 3 may include, among other components, a first housing 4, a shield support structure 6, an insert 7, a retaining member 8, first tail alignment structures 9a, 9b, and a wafer set 10 (which may be the first wafer set if multiple wafer sets are discussed). In an embodiment, the wafer set 10 may include multiple wafers 10a-10i (where "i" indicates the last wafer, and where multiple wafer sets are discussed, a wafer may be considered the first wafer) that may be aligned and supported by the retaining member 8.

[0027] In an embodiment, each wafer of wafer set 10 may support one or more pairs of terminals for transmitting and receiving high speed differential data signals (e.g., at least up to 112 Gbps). The terminals may be electromagnetically shielded by a first shield 11, which may be configured as a first portion of a terminal enclosure that serves to provide shielding of the mating interface, as described more fully herein. In an embodiment, the terminals and shield 11 may be structurally supported by a support structure 6.

[0028] Further, in one embodiment, the insert 7 may be formed of plastic with a conductive plating along traces providing the desired connections or along substantially all of its surface, such that the insert 7 may be connected to each of the one or more first shields 11 of each first wafer 10a-10i to form an electrical ground path at each connection involving the shield 11 and the insert 7. Alternatively, the insert 7 may be configured as a conductive cap made of stamped sheet metal.

[0029] 5 illustrates another exploded view of the assembly 3. In this view, one first wafer 10n of the plurality of first wafers 10a-10i is shown inserted into the wafer set 10 (where "n" refers to one exemplary wafer in the wafer set 10).

[0030] FIG. 6 is an enlarged view of a ground insert 7 connected to exemplary first shields 11a, 11b, 11n ("n" refers to one of the shields) that may be used to form a first portion of a terminal enclosure. As shown, the shields 11a, 11b, 11n are U-shaped. As shown, each first shield 11a, 11b, 11n may be connected to the insert 7 at one or more points, such as point 7a, to form an electrical ground path (indicated by "G") where a conductive path is provided on the insert. Note that each connection point between the insert 7 and the shield may form a ground path, although only some of such points are illustratively labeled in FIG. 6. Additionally, while only four shields are shown in FIG. 6, this is merely exemplary. More or fewer shields may be connected to the insert 7 (typically more than four shields are provided).

[0031] Each first shield 11a, 11b may support fingers 13a, 13b for receiving a set of contacts transmitting and receiving differential high speed data signals.

[0032] In an embodiment, each of the one or more first shields of each first wafer 10a-10i may include a respective first protrusion 12a, 12b on an opposing shield sidewall. As shown, each shield includes two opposing sidewalls, each of which includes at least one protrusion 12a, 12b (only one opposing sidewall of each shield is shown with a protrusion in FIG. 6).

[0033] As previously mentioned, each of the first U-shaped electromagnetic shields 11 may be configured as a first portion of a terminal enclosure (e.g., a top, bottom, or one side depending on the orientation of the terminal enclosure). In an embodiment, each protrusion 12a, 12b of each first shield may be configured to slidably contact one or more protrusions from a mating shield of the connector assembly 2, which may be configured as a "second" portion of the same terminal enclosure (e.g., a bottom, top, or second side of the same terminal enclosure), to form at least one electrical ground path therebetween. Stated differently, the first shields 11 and their respective protrusions 12 may form a portion of a terminal enclosure that reduces detrimental effects from undesired electromagnetic signals or interference on high speed differential data signals transmitted by the terminals within the respective cages.

[0034] To further reduce the effects of undesired detrimental signals (e.g., crosstalk or, more generally, noise), each of the one or more first wafers 10a-10i may be configured offset from adjacent wafers 10a-10i in the first wafer set 10. Furthermore, the terminals and corresponding shields 11 of each of the wafers may be offset from adjacent wafers. For example, referring now to FIG. 7, a wafer set 10 (which may be the first wafer set) is shown having two adjacent wafers 10a, 10b in the wafer set 10. Furthermore, although one set of contacts 23a is labeled for wafer 10a and one set of contacts 23b is labeled for wafer 10b, it should be understood that each wafer may include multiple sets of contacts (see FIG. 8 where wafer 10n includes multiple terminals 14n and sets of contacts 23, the contacts being blocked). In one embodiment, contacts 23a may be received by fingers 13a of FIG. 6 and contacts 23b may be received by fingers 13b.

[0035] In addition to reducing crosstalk, offset wafers allow adjacent channels to be relocated from one wafer to another. Because the portions of the wafer at the locations of the channels may be subject to high levels of potentially harmful electromagnetic signals, it may be desirable to adjust the locations of the channels to reduce such signals.

[0036] Additionally, offsetting the wafer positions allows the connector assemblies 2, 3 to be properly connected or mated. For example, an exemplary wafer offset at the mating interface may be half the pitch (2 mm) of a typical pair-to-pair pitch within a wafer structure (which may be 4 mm) and / or may be equal to the wafer-to-wafer pitch (which may be 2 mm). Of course, the desired pitch will vary depending on the competing density and signal integrity requirements of the connector system.

[0037] As shown in Figure 7, the contacts 23a and 23b of adjacent first wafers 10a, 10b are not aligned side-by-side. Instead, they are offset from one another. Thus, high speed differential data signals transmitted by terminals in wafer 10a may be protected from harmful electromagnetic effects caused by transmission of high speed differential data signals by terminals (e.g., contacts 23b) in wafer 10b, and vice versa, due to the protection provided by the offset configuration of wafers 10a, 10b and their respective contacts, as well as the respective shields 11a, 11b.

[0038] FIG. 8 shows a portion of an exemplary first wafer 10n with the frame and shield wafer omitted to better view the channel 38. The general structure of the first wafer 10n is a cover 50, a wafer body 51, and a wafer shield 52 (see FIGS. 32-36) that form a three-layer structure, but the wafer shield 52 of the first wafer 10n does not include a U-shaped shield. Instead, the wafer shield 52 includes an insert protrusion 55 that engages the insert 7. The shield 11a, for example, includes a shield finger 58 that also engages the insert 7. The insert has a conductive path that provides a ground connection between the insert protrusion 55 and the shield finger 58. In contrast, as can be seen in FIG. 20 and discussed below, the second wafer may include a cover 28, a wafer body 29, and a wafer shield 30, and thus has a similar structure to the first wafer, but the wafer shield 30 includes a shield 17 integrally formed within the wafer shield 30. The cover 28 may include openings 37 that engage protrusions 36 in the frame of the wafer body 29. The frame (not shown in FIG. 8) may be constructed from an insulating material (such as engineering grade plastic), and the frame may include a number of webs (such as webs 39 shown in FIG. 20) that support the terminals 14. In embodiments, the dimensions of each web through which the frame supports the terminals may be configured to reduce crosstalk between adjacent sets of conductors. For example, the width of the conductors and / or the gap between the conductors may be adjusted (e.g., 40-60%) to compensate for changes in dielectric properties as the webs are displaced by air to maintain a more uniform impedance.

[0039] FIG. 9 shows an exploded view of the second connector assembly 2. As shown, the connector assembly 2 may include, among other components, a second housing 5, a second retaining member 15, second tail alignment structures 18a, 18b, and a second wafer set 16. In an embodiment, the wafer set 16 may include one or more second wafers 16a-16i (where "i" indicates the last wafer), which may be aligned and separated by the retaining member 15, which is J-shaped as shown and engages the wafer set 16 in at least two locations. In this view, one such second wafer 16n of the plurality of wafers is shown being inserted into the second wafer set 16 (where "n" refers to one of the wafers in the set 16).

[0040] 20-22, details of each second wafer 16n are shown. More specifically, FIG. 20 shows an exploded view of the second wafer 16n including a wafer body 29 made of insulating material supporting terminals 9 including contacts 22, a wafer shield 30 including a plurality of integral second shields 17 (U-shaped as shown) on a first side of the wafer body 29, and a cover 28 on a second side of the wafer body 29. It should be noted that additional wafers of the wafer set 10 of the connector assembly 3 may include similar features and structures. As shown in FIGS. 20 and 21, the wafer body 29 may have its frame 27 configured with one or more connection structures 36 (shown as circular pegs, but not limited to such) on each side thereof, and although only one side of the frame 27 is shown, both sides have connection structures 36 that may be molded to be inserted into correspondingly molded openings 37 in the cover 28 and openings 40 in the wafer shield 30 to secure the cover and the planar surface to the wafer body, or vice versa.

[0041] Additionally, as can be seen from the combination of Figures 18, 18a, and 20, the wafer shield, wafer body 29, and cover 28 can be configured and shaped to ensure that the terminals 9 are positioned within the channels 38 by using webs 39 of the frame 29. As with the above embodiment, the dimensions of each web 39 and each terminal can be configured to reduce crosstalk between adjacent channels 38. For example, the width of the terminals and / or the gap between the terminals may be adjusted (e.g., 40-60%) to compensate for the change in dielectric properties as the webs are replaced by air to maintain a uniform impedance. Preferably, to reduce losses, the webs are used intermittently to support the terminals 9 such that the effective dielectric constant is closer to that of air.

[0042] As can be seen in FIG. 8A, which is an enlarged view of FIG. 8, the channel 38 is formed in part by a wall 48 of the cover 50 .

[0043] In an embodiment, each second wafer (e.g., wafer 16n) of second wafer set 16 may support one or more terminals for transmitting and receiving high speed differential data signals (e.g., at least up to 112 Gbps). The terminals may be electromagnetically shielded by a second U-shaped electromagnetic shield 17, which may be configured as a second portion of a terminal enclosure, as described more fully herein.

[0044] 10 illustrates another exploded view of the second connector assembly 2. In this view, an exemplary second housing 5 is shown that includes a support structure 19. As described in more detail elsewhere herein, the structure 19 may support and align the terminal enclosure formed by the connection of the first U-shaped shield 11 of the assembly 3 and the second U-shaped shield 17 of the assembly 2.

[0045] 11, there is shown a plurality of second integral U-shaped shields 17 forming a second portion of the terminal enclosure. The shields 17 may be formed as an integral part of the electrical ground plane 30 of the wafer. In an embodiment, each second wafer in the second wafer set 16 may include its own plane 30 and a plurality of second integral U-shaped shields 17.

[0046] Each second shield 17 may include a respective exemplary protrusion 24a on the shield sidewall. It should be understood that each shield 17 may include two opposing sidewalls, each of which may include a corresponding protrusion 24a, although in FIG. 11 protrusions are shown on only one opposing sidewall of each shield. In FIG. 11, two such protrusions 24a are shown, but this is merely exemplary. More or fewer protrusions may be used (see, for example, single protrusion 24b in FIG. 12). The second shields 17 and their respective protrusions 24a may form a portion (the "second" portion) of a terminal enclosure that reduces the harmful effects of undesired electromagnetic signals from high speed data signals transmitted by terminals within the respective terminal enclosure. For example, two of the shields 17 are illustratively labeled 17a, 17b. Thus, high speed differential data signals carried by terminals in one second shield 17a (see contacts 22 in FIG. 12) can be electromagnetically shielded from the harmful effects of electromagnetic crosstalk generated by high speed differential data signals carried by terminals in another second shield 17b, and vice versa.

[0047] 12, a close-up view of several second shields 17 is shown. As shown, each shield 17 may include an opening 21, for example, in a wall perpendicular to a side wall (e.g., either a top wall or a bottom wall depending on the orientation of the assembly or wafer). Each opening 21 may be configured to align with, for example, one or more of the contacts 22 of the second wafer transmitting and receiving differential high speed data signals. The ability to receive the contacts 22 within the opening 21 reduces the possibility that the contacts 22 will inadvertently contact the ground shield 17, resulting in potential loss of data or signal errors.

[0048] As previously mentioned, the second shield 17 may be formed as an integral part of the electrical ground plane 30. Figures 11 and 12 also show one or more integral ground "wings" 20. As shown and described in more detail elsewhere herein, in an embodiment, each of the one or more wings 20 of the shield 17 of the second connector assembly 2 may be configured to contact the shield 11 of the first connector assembly 3 to form a ground path including both assemblies 2, 3. Because there are multiple shields 11, 17 within each assembly 2, 3, the multiple wings 20 of each shield 17 form multiple ground paths between and including the assemblies 2, 3. The inventors believe that forming multiple ground paths increases the likelihood that undesirable harmful electromagnetic signals may be conducted away from terminals received within the respective shields 11, 17 by the multiple ground paths. Furthermore, maintaining a consistent electrical ground is important to ensure the transmission of high speed data signals. Thus, the formation of multiple redundant ground structures forming multiple redundant ground paths helps ensure consistent electrical ground within the system 1.

[0049] Although each second shield 17 is shown to include four ground wings 20, this is by way of example only, more or fewer wings may be included, provided that the number of wings and their positioning provide similar ground paths and allow the wafers of the assemblies 2, 3 to be aligned in an offset pattern, as described elsewhere herein.

[0050] Each of the second shields 17 may be configured as a second portion of the terminal enclosure (e.g., the top, bottom, or one side, depending on the orientation of the terminal enclosure). In an embodiment, when the shield 17 of assembly 2 (second portion) is combined with the shield 11 of assembly 3 (first portion), a terminal enclosure may be formed.

[0051] By way of example, the reader is now referred to Figures 13 and 14. In Figure 13, an exemplary second shield 17 is shown connected to an exemplary first shield 11 to form an exemplary terminal enclosure. Figure 14 shows a close-up view of such a connection and terminal enclosure.

[0052] More specifically, as seen in FIG. 14, in one embodiment, a first shield 11, which electromagnetically shields the contacts 23 of a first wafer 10n of the assembly 3, is connected to a second shield 17, which electromagnetically shields the contacts 22 of a second wafer 16n of the assembly 2. In one embodiment, to make such an exemplary connection, each side wall of the shield 17 includes one or more second protrusions 24a (or 24b) that may be configured to engage one or more first protrusions 12 (or 12n) of one of the one or more first shields 11 to form a terminal enclosure and to form an electrical ground path that includes the one or more first protrusions and the one or more second protrusions. To assist the reader, an exemplary connection point between an exemplary first protrusion 12, 12n and an exemplary second protrusion 24a is labeled 17c or "G" in FIGS. 13, 14 to indicate that the respective connection forms a ground path between the shields 11, 17 so connected.

[0053] The formation of a shielded area by combining the exemplary shields 11, 17 is believed to reduce detrimental effects from unwanted electromagnetic signals on high speed differential data signals transmitted by terminals in the contact interface that are normally difficult to shield. For example, high speed data signals transmitted between terminals in one terminal enclosure formed by one set of shields 11, 17 may be electromagnetically shielded from the detrimental effects of noise generated by high speed data signals transmitted between terminals in another set of shields 11, 17, and vice versa.

[0054] Although the shields 11, 17 are described above as having protrusions, this is by way of example only, i.e., instead of protrusions, either the first shield 11 or the second shield 17 may include one or more recesses, and either the second shield 17 or the first shield may include one or more protrusions.

[0055] In summary, the discussion so far has described a backplane connector system 1 that may include a first connector assembly 3 including a first housing 4 and a first wafer set 10, where the first wafer set 10 may include one or more first wafers 10a-10i, each connected to one or more first shields 11 via conductive paths in an insert. Each first shield 11 may be configured as a first portion of a terminal enclosure for protecting high speed differential data signals from harmful electromagnetic signals. Additionally, the system as described so far may include a second connector assembly 2 including a second housing 5 and a second wafer set 16, which may be configured to connect to the first housing 4 and provide multiple electrical ground paths between the first assembly and a second assembly as discussed herein. In an embodiment, the second wafer set 16 may include one or more second wafers 16a-16i, where each second wafer may include an electrical ground plane including one or more integral second shields 17. Additionally, each second shield may be configured as a second portion of the terminal enclosure to protect the high speed differential data signals from harmful electromagnetic signals.

[0056] Subsequently, as previously mentioned, the terminals in each shield and the corresponding shield 11, 17 may be offset to reduce the effects of undesired detrimental signals (e.g., crosstalk). This also applies to the terminal enclosure formed by the connected shields. For example, referring now to Figures 15 and 16, there is shown a cross-sectional view of the formation of an offset terminal enclosure pattern formed by the connection of the shields 11, 17 of the assemblies 2, 3 (Figure 16 shows a close-up of the offset terminal enclosure pattern).

[0057] As shown, the terminal enclosures form a pattern of offset terminal enclosures, each configured as a set of respective shields 11, 17 forming one or more electrical ground paths, and each terminal enclosure is not aligned next to an adjacent terminal enclosure formed by another set of shields 11, 17. Instead, they are offset from one another. For example, in Figs. 15 and 16, two terminal enclosures are labeled as being formed by respective shields 11d, 17d and 11e, 17e. In this manner, the terminal enclosure formed by the set of shields 11d, 17d is not aligned next to the terminal enclosure formed by the set of shields 11e, 17e. Rather, the terminal enclosures are offset from one another. Thus, high speed differential data signals transmitted by contacts 22, 23 in the respective cages of a wafer may be protected from harmful electromagnetic effects caused by the transmission of high speed differential data signals by terminals in another wafer, and vice versa.

[0058] 15 and 16 also show multiple ground paths formed by connecting wings 20 of shield 17 of second connector assembly 2 to shield 11 of first connector assembly 3. For example, exemplary points labeled 17c or "G" form some of the multiple ground paths (other connection points are not labeled but are apparent from the figures). The formation of multiple ground paths with multiple terminal enclosures increases the likelihood that any undesirable harmful electromagnetic signals may be conducted by such ground paths in a direction away from terminals within the respective terminal enclosures formed by the respective shields 11, 17.

[0059] 29, there is shown a close-up view of a terminal enclosure formed by the first shield 11 and the second shield 17 (both shields may also be referred to as U-shields). As shown, each terminal enclosure may be supported and aligned by a support structure 19 of the housing 5 (see FIG. 10). In an embodiment, the structure 19 may include one or more openings 19a, one or more separation ribs 19b, and one or more tower foundations 19c ("foundations" for short). Although only a single terminal enclosure is shown in FIG. 29, it should be understood that multiple electromagnetic shield terminal enclosures (e.g., terminal enclosures) may be formed as part of the connector system 1. In an embodiment, each opening 19a may be configured to receive a set of shields including one of the one or more first shields 11 and one of the one or more second shields 17 and their respective contacts 22, 23. When received, the set of shields that make up the terminal enclosure may be supported by one of the one or more respective foundations 19c. Further, each of the one or more separation ribs 19b may be configured to help maintain alignment and separation of one set of shields from another set of shields, for example. By maintaining separation between the respective terminal enclosures, the deleterious effects of electrical crosstalk and other undesirable electrical interference may be reduced.

[0060] As shown in FIG. 29, the contacts 22 of the wafer from assembly 2 may be connected to the contacts 23 of assembly 3 within a terminal enclosure formed by shields 11, 17. In this view, only the ends of the respective contacts 22, 23 are shown. Referring now to FIG. 30, a side view of the terminal enclosure formed by shields 11, 17 is shown. In this view, shield 11 may include a first terminal support structure 45 and shield 17 may include a second terminal support structure 44. In an embodiment, each of the support structures 44, 45 may be configured at a position within the respective shield 11, 17 such that the respective support structure acts as a fulcrum to support an end of the respective contact 22, 23 when the respective ends are inserted into openings 19a and supported by structure 19c. For example, the second support structure 44 may be configured at a position within shield 17 such that structure 44 acts as a fulcrum to support an end of the respective contact 22. Structure 45 may similarly function to support an end of terminal 23.

[0061] In one embodiment, each exemplary second terminal support structure 44 may include an integral extension 46 that may be molded to protrude through a correspondingly molded opening 47 in the shield 17 to connect the support structure 44 to the shield 17 (see FIG. 31 ; also see FIG. 14 for an exemplary location of the extension 46).

[0062] FIG. 30 also illustrates the gap d between the contacts 22, 23 of an exemplary terminal enclosure that separates the two contacts formed therebetween. 1 In an embodiment, the dimensions of at least the contacts 22, 23 and support structures 44, 45 may be configured such that the dimensions of this gap may not exceed a threshold that may cause loss or distortion of high speed electrical signals transmitted from the contacts 22 to the terminals 23 (or vice versa).

[0063] 17, an additional view is shown illustrating some of the wafers 16a, 16b, 16c of the wafer set 16, where each wafer 16a, 16b, 16c may be offset from adjacent wafers (e.g., wafer 16b is offset from adjacent wafers 16a, 16c). FIG. 17 also illustrates exemplary second tail alignment structures 18a, 18b and wafer alignment structure 15. In one embodiment, structures 18a, 18b each include a plurality of retention tabs formed in a row that protrudes toward the wafer. In FIG. 17, two of the exemplary tabs are labeled 33a, 33b, where tab 33a is included in one row and tab 33b is included in another offset row of tabs. In an embodiment, each wafer may be separated by a row of tabs, where the row of retention tabs helps lock the position of each individual wafer within the wafer set 16.

[0064] 18 and 19, there is shown the connection of the second shield 17 of the second wafer 16n of the assembly 2 to the electrically grounded cover 28 of the wafer 16n at exemplary point 25 or "G," with FIG. 19 showing a close-up view of such connection. In an embodiment, the extension 26 of the shield 17 (each shield may include such an extension) may be connected to the grounded cover 28 via a desired connection process (press fit, welding, etc.) to form a ground path between the shield 17 and the cover 28.

[0065] 23, a diagram of a wafer 16n is shown without the electrical ground plane 30 and shield 17 attached. As shown, the wafer 16n may include multiple tails 32. It should be understood that in an embodiment, each of the tails of each wafer in the wafer set 16 (and wafer set 10) may be connected to a tail alignment structure 18a, 18b, as shown in FIGS. 24-27. Also shown are one or more molded, raised protrusions 31 of the ground cover. These protrusions aid in connecting the wafers (e.g., 16n) to the tail alignment structures, and thus each wafer may have its own raised protrusion.

[0066] More specifically, Figure 24 illustrates the connection of offset wafers 16a-16i of body 16 to offset tail alignment structures 18a, 18b. Structures 18a, 18b may include a ridge portion 34 that includes a number of openings 42 (see also Figure 27 for a close-up view), each of which is configured to be shaped to receive a correspondingly shaped raised protrusion 31 for connecting the wafer to structures 18a, 18b.

[0067] 24 and 25 both show diagrams of the connection of offset wafers 16a-16i to offset tail alignment structures 18a, 18b. As previously discussed, structures 18a, 18b may each include a plurality of retention tabs formed in offset rows that protrude toward the wafer. Two exemplary tabs are labeled 33a, 33b, with tab 33a included in one row and tab 33b included in another row. In an embodiment, each wafer 16a-16i may be separated by a row of tabs that help lock the position of each individual wafer within wafer set 16.

[0068] FIG. 26 shows a view from below the assembly 1 of the connection of the offset wafer 16n to the offset tail alignment structures 18a, 18b. In this view, exemplary tails 32 of the wafer 16n are shown connected to the structures 18a, 18n, which may be constructed of conductively plated plastic. In an embodiment, the structures 18a, 18b may be constructed of plated plastic and have a number of openings 43, each of which may be aligned with a set of protruding differential signal tails 32 of the wafer. Similarly, the ground tails of each wafer may be connected to the structures 18a, 18b (not shown). In an embodiment, an air gap may be formed around each pair of differential signal tails 32 to help manage the impedance of the connected tails. Furthermore, the presence of the air gap does not affect the impedance of the connection, such that small changes in the dimensions of the connected tails may reduce the possibility of bending.

[0069] FIG. 28 shows a diagram of an exemplary wafer gripper 35. In an embodiment, the gripper 35 may include multiple openings (not shown) for receiving pegs from the wafer frame of either assembly 2, 3. The rib gripper 35 may be configured to connect to the wafer 16n (e.g., on the cover) such that the rib gripper extends from the top of the wafer to the bottom of the wafer in a staggered or zigzag configuration. Alternatively, the rib gripper may extend diagonally laterally toward the edge of the wafer. The rib gripper may include one or more pairs of extensions that extend toward the mating edge to grip and hold in place a housing (not shown). Still further, the rib gripper may be connected to a ground insert.

[0070] Although benefits, advantages, and solutions have been described above with respect to particular embodiments of the present invention, it should be understood that the part or parts that may make such benefits, advantages, or solutions more pronounced or that may result are not to be construed as a critical, necessary, or essential feature or element of any or all claims appended to or resulting from this disclosure.

[0071] Furthermore, the disclosure provided herein describes features in terms of certain exemplary embodiments. However, numerous additional embodiments and modifications within the scope and spirit of the appended claims will occur to those skilled in the art upon consideration of this disclosure, and are intended to be included within the scope of this disclosure and the appended claims. Accordingly, it is intended to include all such additional embodiments, modifications, and equivalents of the subject matter recited in the claims appended hereto as permitted by applicable law. Moreover, any combination of the above-described parts in all possible variations thereof is included in the disclosure, unless otherwise stated herein or otherwise clearly contradicted by context.

Claims

1. 1. A backplane connector system comprising: a first connector assembly including a first housing and a first wafer set, the first wafer set including a first wafer, the first wafer including a first set of terminals and a first wafer shield, the first wafer shield being connected to a first shield via an insert, the first shield including at least one first protrusion, configured as a first portion of a terminal enclosure; a second connector assembly including a second housing configured to connect to the first housing and a second wafer set, the second wafer set including a second wafer including a second set of terminals and a second wafer shield having an integral second shield, the integral second shield including at least one second protrusion and configured to engage the first shield to form a second portion of the terminal enclosure, the first set of terminals and the second set of terminals configured to provide a differential signal path; A backplane connector system, wherein at least one first protrusion of the first shield is configured to slidably contact at least one second protrusion of the integral second shield to form the terminal enclosure and to form an electrical ground path that includes the at least one first protrusion and the at least one second protrusion.

2. 10. The system of claim 1, wherein the differential signal paths are configured to support high speed data signals of 112 gigabits per second.

3. the first shield is one of a plurality of first U-shaped shields; 2. The system of claim 1, wherein the first connector assembly further comprises an electrical grounding insert connected to each of a plurality of first U-shaped shields of the first wafer to form the electrical ground path.

4. the first shield is one of a plurality of first U-shaped shields; the one-piece second shield is one of a plurality of second U-shaped shields; the first wafer is one of a plurality of first wafers; the at least one first protrusion is one of a plurality of first protrusions; the at least one second protrusion is one of a plurality of second protrusions; each of the plurality of first U-shaped shields of each of the plurality of first wafers includes opposing sidewalls, each opposing sidewall including a respective one of the plurality of first protrusions; 2. The system of claim 1, wherein each of the plurality of first protrusions is configured to slidably contact a corresponding one of the plurality of second protrusions from one of the plurality of second U-shaped shields to form the terminal enclosure and to form an electrical ground path that includes the plurality of first protrusions and the plurality of second protrusions.

5. 10. The system of claim 1, wherein the first wafer is configured offset from adjacent wafers in the first wafer set.

6. The system of claim 1 , wherein the second housing further comprises a support structure for supporting and aligning at least the terminal enclosure.

7. The system of claim 6 , wherein the support structure includes one or more openings, one or more isolation ribs, and one or more tower foundations.

8. The system of claim 7 , wherein one of the one or more openings is configured to receive a set of shields including the first shield and an integral second shield.

9. The system of claim 8 , wherein one of the one or more tower foundations supports the set of shields.

10. The system of claim 8 , wherein one of the one or more separation ribs is configured to maintain alignment and separation of the set of shields.

11. The system of claim 1 , wherein the first shield is one of a plurality of first U-shaped shields that include a first terminal support structure.

12. 12. The system of claim 11, wherein the first terminal support structure is configured at a position within each of a plurality of first U-shaped shields to act as a fulcrum for supporting an end of a respective terminal.

13. The system of claim 1 , wherein the second shield is one of a plurality of second U-shaped shields, each of the plurality of second U-shaped shields including a second terminal support structure.

14. 14. The system of claim 13, wherein the second terminal support structure is configured at a position within each of the plurality of second U-shaped shields to act as a fulcrum for supporting an end of a respective terminal.

15. 10. The system of claim 1, wherein the integral second shield includes at least one of a top wall or a bottom wall that includes an opening, the opening being aligned with one or more of the contacts of the second wafer transmitting and receiving differential high speed data signals.

16. 2. The system of claim 1, wherein the first shield is a first U-shaped shield and the integral second shield is a second U-shaped shield including one or more integral ground wings, each wing configured to contact the first U-shaped shield to form an electrical ground path.

17. 2. The system of claim 1, wherein the integral second shield is one of a plurality of second U-shaped shields, each second U-shaped shield including an extension connected to an electrically grounding cover to form an electrical grounding path between each of the plurality of second U-shaped shields and the electrically grounding cover.

18. 1. A backplane connector system comprising: a first connector assembly including a first housing and a first wafer set, the first wafer set including one or more first wafers, each first wafer including one or more first U-shaped shields, each first U-shaped shield including at least one first protrusion; a second connector assembly including: a second housing configured to connect to the first housing to provide a plurality of electrical ground paths between the first connector assembly and the second connector assembly; and a second wafer set including one or more second wafers, each second wafer including an electrical ground plane including one or more integral second U-shaped shields, each second U-shaped shield including at least one second protrusion; At least one first protrusion of the first U-shaped shield slidably contacts a respective second protrusion of the second U-shaped shield to form a terminal enclosure that protects high speed differential data signals from harmful electromagnetic signals by forming an electrical ground path that includes the at least one first protrusion and the at least one second protrusion.

19. 20. The system of claim 18, wherein the second U-shaped shield includes one or more integral ground wings, each ground wing configured to contact a corresponding first U-shaped shield to form at least a portion of the electrical ground path.

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