display

Abstract

To provide: a new display; a display in which chromaticity of a micro light-emitting diode less changes with respect to current density; and a display capable of reducing power consumption of a driver circuit when a still image is displayed.SOLUTION: Each of a plurality of pixels has a display element and a microcontroller. The microcontroller includes a first transistor, a triangular wave generation circuit, a comparator, a switch, and a constant current circuit. The first transistor has a function of holding a potential corresponding to data written into the pixel by being an off state. The triangular wave generation circuit has a function of generating a triangular wave signal. The comparator has a function of generating an output signal corresponding to the potential and the triangular wave signal. The switch has a function of controlling whether to flow a current flowing through the constant current circuit to the display element according to the output signal.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] One aspect of the present invention relates to a display and an electronic device including the display. [Background technology]

[0002] In recent years, micro light-emitting diodes (hereinafter referred to as micro LEDs) have Display and lighting devices equipped with a dipping diode have been proposed (for example, Patent Document 1). Displays equipped with micro LEDs can achieve high brightness, so they can be used on walls. The advantages of this method include being able to project images onto a monitor or desk for viewing, and improving visibility outdoors. Research and development into this field as a next-generation display is currently underway.

[0003] The brightness of micro LEDs changes in proportion to the current density. In Patent Document 2, the chromaticity changes slightly with the pulse width modulation ( Discloses the configuration for PWM (Pulse Width Modulation) control By driving it with PWM control, it is possible to obtain good chromaticity and the desired brightness. It becomes possible. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] US Patent Application Publication No. 2014 / 0367705 [Patent Document 2] US Patent Application Publication No. 2010 / 0102752 Summary of the Invention [Problem to be solved by the invention]

[0005] A configuration for controlling the brightness of a micro LED by PWM control is effective for performing display with good chromaticity. However, even when displaying a still image or the like, the drive circuit needs to continue operating.

[0006] One aspect of the present invention is to provide a novel display and an electronic device including the display. Or, one aspect of the present invention is to provide a display in which, even when the operation of the drive circuit is stopped to reduce power consumption during still image display, the chromaticity change of the micro light-emitting diode with respect to the current density is small. It should be noted that one aspect of the present invention does not necessarily need to solve all of the above problems, and it suffices if it can solve at least one problem. Also, the description of the above problems does not prevent the existence of other problems. Other problems will become apparent from the description in the specification, claims, drawings, etc., and it is possible to extract other problems from the description in the specification, claims, drawings, etc.

[0007]

Means for Solving the Problems

[0008] One aspect of the present invention has a plurality of pixels, and each pixel has a display element and a microcontroller. The display element has a micro light-emitting diode, and the microcontroller has a first transistor, a triangular wave generation circuit, a comparator, a switch, and a constant current circuit. The first transistor has a function of holding a potential corresponding to data written into the pixel by turning off. The triangular wave generation circuit has a function of generating a triangular wave signal. The comparator has a function of generating an output signal according to a potential and the triangular wave signal. The switch ​ The function of the switch is to control whether or not the current flowing through the constant current circuit is passed to the display element according to the output signal. It is a display having the following:

[0009] One embodiment of the present invention includes a plurality of pixels and a triangular wave generating circuit. The pixels include a display element and The triangular wave generating circuit has a function of generating a triangular wave signal. The display element has a function of outputting a triangular wave signal to the pixel, and the display element has a micro light-emitting diode. The microcontroller includes a first transistor, a comparator, a switch, and a constant current a current circuit, and the first transistor is turned off to write a data to the pixel. The comparator has a function of holding the potential according to the input signal, and the comparator has a function of holding the potential according to the input signal and the triangular wave signal. The switch has a function of generating an output signal corresponding to the current flowing through the constant current circuit in response to the output signal. A display that has the function of controlling whether or not current flows through a display element.

[0010] In one embodiment of the present invention, the first transistor includes a first semiconductor having a channel forming region. A display having a conductor layer and a first semiconductor layer having an oxide semiconductor is preferred.

[0011] In one embodiment of the present invention, the comparator and the switch have a second transistor. The second transistor has a second semiconductor layer having a channel formation region. The body layer is preferably a display comprising silicon.

[0012] In one embodiment of the present invention, the constant current circuit includes a third transistor and a fourth transistor. the third transistor has a third semiconductor layer having a channel formation region; The third semiconductor layer includes an oxide semiconductor, and the fourth transistor includes a channel formation region. and a fourth semiconductor layer comprising silicon. stomach.

[0013] In one aspect of the present invention, the micro light emitting diode is made of gallium nitride and indium. A display device that has an active layer and a cladding layer made of a gallium nitride compound. Ray is preferred.

[0014] One aspect of the present invention is an electronic device including the above-described display.

[0015] Other aspects of the present invention will be described in the following embodiments and As shown in the drawings. Effect of the Invention

[0016] According to one aspect of the present invention, a novel display and a device equipped with the display are provided. Alternatively, according to one embodiment of the present invention, when a still image is displayed, Even if the operation of the drive circuit is stopped to reduce power consumption, the micro It is possible to provide a display in which the chromaticity change of the light-emitting diode is small.

[0017] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be clearly seen. The above will become apparent from the detailed description, claims, drawings, etc. Other effects can be extracted from the claims, drawings, etc. [Brief description of the drawings]

[0018] [Figure 1] 1A and 1B are a block diagram and a circuit diagram illustrating an example of the configuration of a display. [Diagram 2] FIG. 4 is a waveform diagram illustrating an example of the configuration of a display. [Diagram 3] 1A and 1B are a block diagram and a circuit diagram illustrating an example of the configuration of a display. [Figure 4] FIG. 1 is a circuit diagram illustrating an example of the configuration of a display. [Diagram 5] FIG. 1 is a circuit diagram illustrating an example of the configuration of a display. [Figure 6] FIG. 1 is a circuit diagram illustrating an example of the configuration of a display. [Figure 7] FIG. 1 is a circuit diagram illustrating an example of the configuration of a display. [Figure 8] FIG. 1 is a circuit diagram illustrating an example of the configuration of a display. [Figure 9] 1A to 1C are diagrams illustrating a cross-sectional structure of a semiconductor device. [Figure 10] FIG. 1 is a diagram for explaining an example of display implementation. [Figure 11] FIG. 2 is a cross-sectional view showing an example of the configuration of a DOSRAM. [Figure 12] 1A to 1C are diagrams for explaining application examples of a display. [Figure 13] 1A to 1C are diagrams for explaining application examples of a display. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, the embodiments will be described with reference to the drawings. It is possible to carry out the invention in various forms without departing from the spirit and scope of the invention. It will be readily understood by those skilled in the art that various modifications may be made to the mode and details of the present invention. The present invention should not be construed as being limited to the description of the following embodiment.

[0020] In this specification, the ordinal numbers "first," "second," and "third" refer to the components of the The above is added to avoid confusion, and does not limit the number of components. In addition, the order of the components is not limited. The element referred to as "first" in one embodiment may be used in another embodiment or in the claims. In addition, for example, the second component may be the component referred to in the present specification. A component referred to as "first" in one embodiment may be used in another embodiment, or It may be omitted in the claims.

[0021] In the drawings, elements that are the same or have similar functions, elements that are made of the same material, or In some cases, the same reference numerals may be used to denote elements that are formed simultaneously, and repeated explanations of such elements will be omitted. It may be omitted.

[0022] (Embodiment 1) In this embodiment, a configuration example of a display according to one embodiment of the present invention will be described.

[0023] FIG. 1(A) is a block diagram of a display according to one embodiment of the present invention. The display 10 includes a gate driver 13, a source driver 14, a power supply circuit 15, and a display The display unit 11 includes a plurality of pixels 20.

[0024] The gate driver 13 transmits signals for driving the pixels 20, such as scanning signals, to the wiring GL. The source driver 14 outputs a signal for driving the pixel 20, e.g. The pixel data (also called image data or video data) is output to the wiring SL. The power supply circuit 15 outputs a power supply voltage for driving the pixel 20, for example, a voltage VDD, to a line VL. It has the function of forcing.

[0025] Figure 1(B) is a diagram for explaining the configuration of the pixel 20 shown in Figure 1(A). The pixel 20 has a microcontroller 30 and a display element 90.

[0026] The microcontroller 30 is connected to a wiring SL, a wiring GL, and a wiring VL. The wiring SL is a wiring having a function of transmitting image data to the pixel 20. The wiring GL is a wiring having a function of transmitting a scanning signal for writing or holding pixel data in the pixel. The wiring VL is a wiring having a function of transmitting a power supply voltage VDD to the pixel 20.

[0027] The display element 90 is a micro LED. The micro LED is, for example, a light emitting diode having a side length of about 10 μm to 100 μm. The light emitting diode included in the display element 90 can use an inorganic material, for example, gallium nitride, and an indium gallium nitride compound. By adopting such a configuration, it is possible to achieve a longer lifespan compared to a display element using an organic material. The light emitting diode included in the display element 90 is a self-emitting element and can achieve excellent black display, so that a display with a good contrast ratio can be obtained. Further, since the display element 90 can emit light of different wavelengths such as red, green, and blue, color display without using a color filter or a polarizing plate can be realized with low power consumption.

[0028] In addition, since the display element 90 can respond quickly to the output current, a time gradation method of providing a constant current circuit in the pixel and performing duty driving can be adopted. Therefore, pulse width modulation control can be performed on the display element 90 to drive it, and a good chromaticity and a desired luminance can be obtained.

[0029]

[0029] In addition, the display element 90 has a higher light emission efficiency than a display element using an organic material, so that it can be used outdoors. The display element 90 has an extremely high brightness. Since it can be made taller, it can be used for lighting.

[0030] The microcontroller 30 controls the display element 90 to display a pixel according to the input pixel data. The microcontroller 30 has a function of performing gray scale display by PWM control. The microcontroller 30 has a function of storing pixel data. By this, a circuit having a function of outputting pixel data, for example, a source driver 14, is During the period when the pixel data is held by the microcontroller 30, the function is stopped intermittently. It becomes possible.

[0031] The microcontroller 30 generates signals with different duty ratios according to pixel data. The microcontroller 30 has a switch and a constant current circuit. The microcontroller 30 turns the switch on or off in response to an internally generated signal. The microcontroller 30 has a function of controlling the switch to be intermittently turned on. This allows the current generated by the constant current circuit (I led ) to the display element 90. This configuration allows different PWM control for each light-emitting element LED, Good chromaticity and desired brightness can be obtained.

[0032] By adopting the configuration of one embodiment of the present invention, it is possible to write pixel data repeatedly, for example, when displaying a still image. In a period when power is not required, the operation of the source driver 14 is stopped to reduce power consumption. In addition, PWM control can be performed on the display element 90, which is a light-emitting diode. This makes it possible to provide a display with small chromaticity change.

[0033] FIG. 1C is a block diagram for explaining a configuration example of the microcontroller 30 shown in FIG. 1B. The microcontroller 30 includes a transistor 31, a capacitive element 32, a triangular wave generator It includes a circuit 33, a comparator 34, a constant current circuit 35, and a switch 36.

[0034] One of the source and the drain of the transistor 31 is connected to the wiring SL. The gate of the transistor 31 is connected to the wiring GL. The other terminal is connected to the non-inverting input terminal of the comparator 34. As shown in FIG. The other of the source and drain of the transistor 31 and the non-inverting input terminal of the comparator 34 are connected to each other. The connected node is node V S Node V S A capacitive element 32 is connected to the The capacitance element 32 is connected to the node V S This is to improve the charge retention characteristics in the It is possible.

[0035] The transistor 31 has a low current (off current) that flows between the source and drain when it is off. By using a transistor with an extremely low off-state current, S Electricity That is, the potential according to the pixel data written in the pixel 20 can be maintained for a long time. Therefore, the transistor 31 can function as a sample and hold circuit. The transistor 31 is, for example, a transistor using a metal oxide for a channel formation region. As the metal oxide, In and , Zn and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd or Hf) The OS transistor will be described in detail in a later embodiment.

[0036] The triangular wave generating circuit 33 has a function of outputting a triangular wave for PWM control. The square wave generating circuit 33 is connected to the inverting input terminal of the comparator 34. The triangular wave generating circuit 33 and the inverting input terminal of the comparator 34 are connected to each other. Node V T He said.

[0037] The comparator 34 functions as a comparison circuit. Either the source or drain of the S and node V S The potential is given The inverting input terminal is connected to the wiring that supplies the triangular wave of the triangular wave generating circuit 33, that is, the node V T and Connected to node V T The output terminal is connected to the node V S and node V T The potential V changes the magnitude relationship with the potential PWM That is, the comparator 34 outputs In response to the potential corresponding to the pixel data held in the microcontroller 30 and the triangular wave signal, The arithmetic unit generates an output signal according to the

[0038] The constant current circuit 35 is a circuit that functions as a constant current source. The constant current circuit 35 is connected in series with the switch 36. The constant current circuit 35 is connected to the external The data for supplying a constant current is written and held in the memory, and a constant current is supplied. Alternatively, a potential may be generated internally and a constant current corresponding to the potential may be passed.

[0039] The switch 36 controls the current I led As The switch 36 functions as a switch that controls whether or not water flows by turning it on or off. The on / off state is controlled by a signal at the output terminal of the comparator 34 .

[0040] A triangular wave generating circuit 33, a comparator 34, a switch 36 and a constant current circuit 35 are included. The transistors used are transistors that use silicon in the channel formation region (Si transistors). As for the Si transistor, it is preferable to use single crystal silicon as the semiconductor layer. The Si transistor can be an OS transistor. In comparison, the current that flows between the source and drain when on (on current) is large. The starter is connected to a circuit such as a switch 36 that requires high-speed switching such as PWM control. However, one aspect of the present invention is not limited to this. For example, The transistors constituting the constant current circuit 35 are a voltage regulator 33, a comparator 34, a switch 36, and a constant current circuit 35. The transistor may be an OS transistor.

[0041] A triangular wave generating circuit 33, a comparator 34, a switch 36 and a constant current circuit 35 are included. By using a Si transistor as the transistor, the OS transistor constituting transistor 31 can be By using this configuration, the microcontroller This allows the layout area of ​​the circuits constituting the roller 30 to be reduced.

[0042] The constant current circuit 35 described above writes and holds data for supplying a constant current from the outside. In order to achieve this, a structure using an OS transistor with low off-state current is preferable. By stacking Si transistors and OS transistors, the layout of the circuit is improved. This is preferable because it is possible to reduce the product and also the number of transistors.

[0043] FIG. 2 illustrates the operation of the display according to one embodiment of the present invention illustrated in FIGS. 1(A) to 1(C). FIG. 2 is a waveform diagram showing the wiring SL, the wiring GL, and the node V S , Node V T , the potential V of the output terminal of the comparator 34 PWM The waveforms of .

[0044] As shown in FIG. 2, the wiring SL is connected to a potential corresponding to pixel data to be supplied to the pixels of each row. is given. Node V S A potential corresponding to pixel data is held at node V S To The held potential is maintained by setting the wiring GL to the L level. T is, one The potential is given by a triangular wave of constant amplitude and frequency. S and Node V T The potential V PWM The change in pulse width (duty ) is determined. Node V S The potential held in is updated by setting the line GL to the H level. Node V S The potential held in is updated to the potential V PWM The potential V P WM changes, and the current I ledBy flowing, it can be switched to a desired gradation. It can be achieved.

[0045] With the configuration of one aspect of the present invention, during a period when there is no need to repeatedly write pixel data such as during still image display, even if the operation of the source driver 14 is stopped, gradation display according to PWM control can be performed at the pixel 20. Therefore, power consumption can be reduced, and a display with a small chromaticity change can be achieved.

[0046] Note that one aspect of the present invention is not limited to the configuration described with reference to FIGS. 1(A) to (C). As another configuration, the configuration shown in FIGS. 3(A) to (C) can also be adopted.

[0047] The display 10A shown in FIG. 3(A) includes a gate driver 13, a source driver 14, a power supply circuit 15, a display unit 11, and a triangular wave generation circuit 16. That is, FIG. 3(A) corresponds to a configuration in which the triangular wave generation circuit 33 described with reference to FIGS. 1(A) to (C) is arranged outside the display unit 11 to form the triangular wave generation circuit 16. The display unit 11 includes a plurality of pixels 20A.

[0048] FIG. 3(B) is a diagram for explaining the configuration of the pixel 20A shown in FIG. 3(A). The pixel 20A includes a microcontroller 30A and a display element 90. The microcontroller 30A is connected to a wiring SL, a wiring GL, a wiring VL, and a wiring TL. The wiring TL is a wiring having a function of transmitting a triangular wave generated by the triangular wave generation circuit 33D.

[0049] FIG. 3(C) is a diagram for explaining a configuration example of the microcontroller 30A shown in FIG. 3(B). The microcontroller 30A includes a transistor 31, a capacitive element 32, a comparator The inverter 34, the constant current circuit 35, and the switch 36 are included. This corresponds to a configuration in which the triangular wave generating circuit 33 described in 1(C) is omitted. In the controller 30A, a triangular wave is applied via a line TL.

[0050] Note that one embodiment of the present invention is not limited to the structures described in FIGS. Alternatively, the configuration shown in FIGS. 4(A) and 4(B) may be used.

[0051] In the diagram for explaining the configuration of a pixel 20B of the display shown in FIG. The microcontroller 30B controls each of the three display elements 90_R, 90_G, and 90_B. The current I led_R , I led_G , I led_B The configuration for controlling The microcontroller 30B has wiring SL, wiring GL_R, wiring GL_G, and wiring GL _B, and the wiring VL. The wiring GL_R, the wiring GL_G, and the wiring GL_B are connected to the wiring SL In order to write pixel data provided to the microcontroller 30B at different timings, This is the wiring through which signals are given.

[0052] FIG. 4B is a block diagram for explaining a configuration example of the microcontroller 30B shown in FIG. The microcontroller 30B is a diagram of each of the components described in FIG. In addition to the generating circuit 33, transistors 31_R, 31_G, and 31_B, a capacitive element 32, a comparator The transistor 31_R has a resistor 34, a constant current circuit 35, and a switch 36. 1_G and 31_B are different types depending on wiring GL_R, wiring GL_G, and wiring GL_B. The microcontroller then writes the pixel data to the Separate nodes V in 30B S_R , V S_G , V S_B By storing pixel data in , a separate PWM control (V PWM_R , V PWM_G , V PW M_B ) can be applied.

[0053] Note that one embodiment of the present invention is not limited to the structure described in FIGS. 4A and 4B. Alternatively, the configurations shown in FIGS. 5(A) and 5(B) may be used.

[0054] In the diagram for explaining the configuration of a pixel 20C of the display shown in FIG. 5(A), one The microcontroller 30C controls each of the three display elements 90_R, 90_G, and 90_B. The current I led_R , I led_G , I led_B The configuration for controlling The microcontroller 30C is connected to the wiring GL, the wiring SL_R, the wiring SL_G, and the wiring SL _B, and the wiring VL. The wiring SL_R, the wiring SL_G, and the wiring SL_B are connected to the wiring GL When the pixel data is written to the microcontroller 30C, the pixel data is written to the microcontroller 30C at the timing when the pixel data is written to the microcontroller 30C. This is the wiring for connecting the

[0055] FIG. 5B is a block diagram for explaining a configuration example of the microcontroller 30C shown in FIG. The microcontroller 30C includes the components described in FIG. In addition to the generation circuit 33, a plurality of transistors 31_R, 31_G, and 31_B, a capacitance element 32, The transistor 31 includes a comparator 34, a constant current circuit 35, and a switch 36. R, 31_G, and 31_B are connected to the wiring GL at the same time as wiring SL_R and wiring S Signals are given from the wiring SL_B to write pixel data. Separate nodes V in the controller 30C S_R , V S_G , V S_B Pixel data to By holding the voltage, a separate PWM control (V PWM_R , V PW M_G , V PWM_B ) can be applied.

[0056] Next, an example of the configuration of the constant current circuit 35 described with reference to FIG. 1C will be described with reference to FIGS. 6A and 6B. This will be explained with reference to Figures 7(A) and (B).

[0057] FIG. 6A shows an example of the configuration of a constant current circuit 35A using an OS transistor. In A), transistor 41 is made of an OS transistor, and transistor 42 is made of a Si transistor. The wiring GLP A signal for controlling the on / off of the transistor 41 is applied to the line SLP. A signal to be held is given to node MN. Node MN changes its current according to the potential of the signal to be held. I flowing through Transistor 42 led The capacitance element 43 generates a By using an OS transistor with low off-state current as the transistor 41, This makes it possible to suppress fluctuations in potential due to leakage current of the node MN.

[0058] FIG. 6B shows an example of the configuration of a constant current circuit 35B using an OS transistor. In B), transistors 44 and 45 are made of OS transistors, and S a p-channel transistor 46 and a transistor 47, which are p-channel transistors; The wiring GLP is connected to the transistor 44 and the transistor A signal is given to control the on / off of 45. The line SLP is held at the node MN. The node MN is connected to the transistor 46 in response to the potential of the signal held therein. Flowing through I led The capacitance element 48 holds the charge applied to the node MN. The transistors 44 and 45 are OS transistors with low off-state current. This makes it possible to suppress the fluctuation of the potential of the node MN due to the leakage current. ) in which the transistors 46 and 47 form a current mirror. Therefore, data can be written by the current programming method, and each pixel This can reduce the influence of variations in transistor characteristics.

[0059] 7(A) and (B) show an example of a constant current circuit using Si transistors. In the constant current circuit 35C shown in FIG. 1(A), a plurality of transistors are formed of Si transistors. The band gap reference circuit 51 and the operational amplifier 52 are formed by using a band gap resistor. The gap reference circuit 51 generates an internal potential Vc and a current I led Generate The configuration of FIG. 7(A) can be made to be the same as that shown in FIG. 7(B) by applying a potential Vc from the outside. The band gap reference circuit 51 can be omitted as in the constant current circuit 35D shown in FIG. can.

[0060] Next, another example of the configuration of the transistor 31 described in FIG. 1C and the like will be described with reference to FIG. This will be explained using (B).

[0061] The transistor 31_DG of the microcontroller 30 shown in FIG. The transistor has a back gate. The back gate is a front gate. It is electrically connected to the on-state current, and has the effect of increasing the on-state current. The back gate of the transistor 31_BG of the microcontroller 30 is a floating gate. A configuration may be adopted in which a constant potential (VBG) different from that of the input gate can be supplied. By this, the threshold voltage of the transistor can be controlled. The configuration having a gate is also effective for other circuits in this embodiment, for example, a constant current circuit. be.

[0062] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is possible.

[0063] (Embodiment 2) In this embodiment, the OS transistor described in Embodiment 1 will be described in detail. .

[0064] The semiconductor material used in the OS transistor is preferably a material having an energy gap of 2 eV or more. Preferably, a metal oxide having a polarization energy of 2.5 eV or more, more preferably 3 eV or more, can be used. A typical example is an oxide semiconductor containing indium, for example, a CAAC -OS, CAC-OS, etc. can be used. CAAC-OS is the atom that constitutes the crystal. CAC-OS is suitable for transistors that require high reliability. Because it exhibits high mobility characteristics, it is suitable for transistors that operate at high speed.

[0065] OS transistors have a large energy gap and therefore exhibit extremely low off-state current characteristics. In addition, OS transistors have the following problems: impact ionization, avalanche breakdown, and short-channel It has characteristics different from silicon transistors, such as no effect, and forms highly reliable circuits. It is possible.

[0066] The semiconductor layer of the OS transistor is made of, for example, indium, zinc, and M (aluminum). , titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium In-M-Zn oxides containing metals such as In, tin, neodymium or hafnium It may be a membrane.

[0067] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of metal elements in the sputtering target used to form a film of the oxide is In≧ It is preferable that M and Zn satisfy the condition M. The atomic ratio of In:M:Zn is 1:1:1, In:M:Zn is 1:1:1.2, and I n:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4 .1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5 The atomic ratio of the semiconductor layers to be formed is preferably 1:1:8. The atomic ratio of metal elements contained in the target varies by ±40%. .

[0068] For the semiconductor layer, an oxide semiconductor having a low carrier density is used. For example, the semiconductor layer Carrier density is 1×10 17 / cm 3 Less than or equal to 1×10 15 / cm3 The following is further Preferably 1 x 10 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Below, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than a career Such an oxide semiconductor can be a high-purity intrinsic or This is called a substantially high-purity intrinsic oxide semiconductor. The oxide semiconductor has a low density of defect states and is stable. It can be said that the oxide semiconductor has stable characteristics.

[0069] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer are determined. It is preferable to appropriately set the density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. stomach.

[0070] In the oxide semiconductor that constitutes the semiconductor layer, silicon and carbon, which are group 14 elements, If oxygen is contained, oxygen vacancies increase and the semiconductor layer becomes n-type. The concentrations of com and carbon (obtained by secondary ion mass spectrometry) were 2 × 10 18 ato ms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0071] In addition, when alkali metals and alkaline earth metals combine with oxide semiconductors, they generate carriers. This may result in an increase in the off-state current of the transistor. The concentration of alkali metals or alkaline earth metals in the conductor layer (measured by secondary ion mass spectrometry) The resulting concentration is 1 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 16 at oms / cm 3 To the following:

[0072] In addition, when nitrogen is contained in the oxide semiconductor that constitutes the semiconductor layer, the electron This causes an increase in carrier density, making it easier to convert to n-type. Transistors using semiconductors tend to be normally-on. The nitrogen concentration in the sample (obtained by secondary ion mass spectrometry) was 5×10 18 atoms / cm 3 It is preferable to do the following:

[0073] The semiconductor layer may have a non-single crystal structure. The non-single crystal structure may have a non-single crystal structure, for example, a structure in which the crystal is aligned along the c-axis. CAAC-OS (C-Axis Aligned Crystallography) ine oxide semiconductor), polycrystalline structure, microcrystalline structure, or non-crystalline structure Among non-single crystal structures, the amorphous structure has the highest defect level density and CAA C-OS has the lowest density of defect states.

[0074] An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and does not contain a crystalline component. Alternatively, the oxide film having an amorphous structure is, for example, a completely amorphous structure having no crystalline portion. stomach.

[0075] In addition, the semiconductor layer may have an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA The film may be a mixed film having two or more of the C-OS region and the single crystal structure region. The composite film may be, for example, a single-layer structure including two or more of the above-mentioned regions, or a laminated structure. It may have a structure.

[0076] In the following, a CAC (Cloud-Aligned Crystal) layer, which is one aspect of a non-single crystal semiconductor layer, will be described. This paper explains the structure of the Composite-OS.

[0077] CAC-OS is, for example, an oxide semiconductor in which the elements constituting the oxide semiconductor are 0.5 nm to 10 nm thick. A structure of a material unevenly distributed in a size range of 1 nm to 2 nm or less, preferably 1 nm to 2 nm or less, or in the vicinity thereof. In the following, it is assumed that one or more metal elements are present in the oxide semiconductor. The region having the metal element is unevenly distributed and has a size of 0.5 nm to 10 nm, preferably 1 nm A mixture of particles with sizes of 2 nm or more or less, or close to that size, is also called a mosaic or patch pattern. say.

[0078] Note that the oxide semiconductor preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably included. Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more elements selected from tantalum, tungsten, magnesium, etc. It's fine.

[0079] For example, CAC-OS in In-Ga-Zn oxide (In- The Ga-Zn oxide may be specifically referred to as CAC-IGZO. (hereinafter referred to as InO X1 (X1 is a real number greater than 0) or indium zinc oxide compound (hereinafter referred to as In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) ) and gallium oxide (GaO X3 (X3 is a real number greater than 0). ), or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z4 are The material is separated into the mosaic shape, and the mosaic shape is created by dividing the material into the mosaic shape. InO X1 , or In X2 Zinc Y2 O Z2 is uniformly distributed in the film (hereafter , also called cloud-like.

[0080] In other words, CAC-OS is X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 A composite oxide semiconductor having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Assume that the In concentration is higher than in region 2.

[0081] Note that IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO 3 (ZnO) m1 (m1 is a natural number), or In (1 +x0) Ga (1-x0) O3 (ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of such crystalline compounds include those that are

[0082] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. is a non-oriented connected crystal structure.

[0083] On the other hand, CAC-OS refers to the material composition of an oxide semiconductor. In a material composition containing Ga, Zn, and O, some of the nanoparticles are observed to be mainly composed of Ga. The regions where the In nanoparticles are observed are the same as those where the In nanoparticles are observed as the main component. This refers to a structure in which the pixels are randomly distributed in a mosaic pattern. The crystal structure is a secondary factor.

[0084] Note that CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, Not at all.

[0085] In addition, GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 but In some cases, a clear boundary between the region of the main component and the region of the main component may not be observed.

[0086] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium are used. Aluminum, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more of the following elements are included, CAC-OS will The area observed is that of nanoparticles mainly composed of metal elements, and in some areas, nanoparticles mainly composed of In. This refers to a structure in which the regions observed as particles are randomly dispersed in a mosaic pattern. .

[0087] CAC-OS can be formed, for example, by a sputtering method without heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the following deposition gas is used: Any one selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. In addition, the flow rate of oxygen gas relative to the total flow rate of deposition gas during deposition may be The lower the ratio, the more preferable. For example, the flow rate ratio of oxygen gas is set to 0% or more and less than 30%, preferably 0%. It is preferable to set the ratio to 10% or less.

[0088] CAC-OS is a method for measuring X-ray diffraction (XRD). When measured using the out-of-plane θ / 2θ scan, In other words, no clear peaks are observed in the X-ray diffraction measurement. It can be seen that no orientation in the ab plane direction or the c-axis direction is observed in the fixed region.

[0089] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron beam diffraction pattern obtained by irradiating the sample with light, a ring-shaped region of high brightness and Several bright spots are observed in the ring region. Therefore, the electron diffraction pattern indicates that CAC The crystal structure of -OS has no orientation in the planar direction and cross-sectional direction. It can be seen that the crystalline structure is o-crystal.

[0090] For example, in the case of CAC-OS using In-Ga-Zn oxide, the energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectrometry) The EDX mapping obtained using oscopy revealed that GaO X3 The area where is the main component Area and In X2 Zinc Y2 O Z2 , or InO X1 The areas where the main component is It can be confirmed that the compound has a structure similar to that shown in FIG.

[0091] CAC-OS has a structure different from that of IGZO compounds in which metal elements are uniformly distributed. It has different properties from GZO compounds. That is, CAC-OS is GaO X3 The main components are In a certain area, X2 Zinc Y2 O Z2 , or InO X1 The area where is the principal component and It has a phase-separated structure with a mosaic of regions each consisting of one element as the main component.

[0092] Here, In X2 Zinc Y2 O Z2 , or InO X1 The area where GaO is the main component X3 This region has a higher electrical conductivity than the region where In is the main component. X2 Zinc Y2 O Z2 , or InO X1 The carriers flow through the region where the oxide semiconductor is the main component. The electrical conductivity of the conductor is expressed. X2 Zinc Y2 OZ2 , or InO X1 The region mainly composed of ZnO is distributed in a cloud-like shape in the oxide semiconductor, which leads to a high field effect transition. Mobility (μ) can be achieved.

[0093] On the other hand, GaO X3 The region where In etc. are the principal components is X2 Zinc Y2 O Z2 , or InO X1 This region has higher insulating properties than the region where GaO is the main component. X3 The main components are The distribution of the regions with the junction structure in the oxide semiconductor suppresses leakage current and provides good switching performance. This allows for realizing a matching operation.

[0094] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation caused by And, In X2 Zinc Y2 O Z2 , or InO X1 The conductivity caused by the This results in a high on-state current (I on ) and high field-effect mobility (μ) can.

[0095] In addition, semiconductor devices using CAC-OS have high reliability. is suitable as a constituent material for various semiconductor devices.

[0096] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is possible.

[0097] (Embodiment 3) In this embodiment, a microcomputer having a stacked structure of a Si transistor and an OS transistor is A cross-sectional configuration example of a semiconductor device 900 applicable to the controller 30 will be described with reference to the drawings. The cross-sectional configuration example described in this embodiment is the same as that of the constant current circuit described in the above embodiment. It is also applicable to

[0098] <Cross-sectional configuration example of semiconductor device 900> 9 shows a cross section of a portion of a semiconductor device 900. The semiconductor device 900 shown in FIG. 9, a layer 300 and a layer 301 are laminated on the substrate 231. The layer 300 includes a crystalline semiconductor substrate (e.g., a single crystal silicon substrate). The transistors included in the semiconductor device have a source, a drain, and a channel formed in a portion of the substrate 231. Layer 301 also includes a thin film transistor (e.g., an OS transistor). .

[0099] [Layer 300] In FIG. 9, layer 300 includes transistors 233a, 233b, and 233c on substrate 231. 9, transistor 233a, transistor 3b, and transistor 233c. 2 shows cross sections of the transistor 233b and the transistor 233c in the channel length direction.

[0100] As described above, the transistor 233a, the transistor 233b, and the transistor 2 The channel 33c is formed in a part of the substrate 231. High speed operation is required for the integrated circuit. In this case, it is preferable to use a single crystal semiconductor substrate as the substrate 231.

[0101] The transistor 233a, the transistor 233b, and the transistor 233c are elements The element isolation layers 232 are electrically isolated from each other. Local Oxidation of Silicon (STI) method and Shallo A trench isolation method or the like can be used.

[0102] In addition, the transistors 233a, 233b, and 233c An insulating layer 234, an insulating layer 235, and an insulating layer 237 are provided on the insulating layer 237. An electrode 238 is provided in the insulating layer 237. The electrode 238 is connected to the transistor 233a via a contact plug 236. The transistor is electrically connected to either the source or the drain of the transistor.

[0103] In addition, on the electrode 238 and the insulating layer 237, an insulating layer 239, an insulating layer 240, and an insulating An edge layer 241 is provided, and an electrode 2 is disposed in the insulating layer 239, the insulating layer 240, and the insulating layer 241. 42 is embedded in the electrode 242. The electrode 242 is electrically connected to the electrode 238.

[0104] Moreover, an insulating layer 243 and an insulating layer 244 are provided on the electrode 242 and the insulating layer 241. The electrode 245 is embedded in the insulating layer 243 and the insulating layer 244. 45 is electrically connected to the electrode 242 .

[0105] Moreover, an insulating layer 246 and an insulating layer 247 are provided on the electrode 245 and the insulating layer 244. An electrode 249 is embedded in the insulating layer 246 and the insulating layer 247. is electrically connected to the electrode 245.

[0106] Moreover, an insulating layer 248 and an insulating layer 250 are provided on the electrode 249 and the insulating layer 247. An electrode 251 is embedded in the insulating layer 248 and the insulating layer 250. is electrically connected to the electrode 249.

[0107] [Layer 301] Layer 301 is disposed on layer 300. In FIG. 8a, a transistor 368b, a capacitor 369a, and a capacitor 369b. 9 shows a cross section of a transistor 368a and a transistor 368b in the channel length direction. The transistor 368a and the transistor 368b are back-gate It is a transistor having the following structure.

[0108] The semiconductor layers of the transistors 368a and 368b are made of a metal oxide. That is, the transistor 368a and the transistor 3 An OS transistor is used for 68b.

[0109] The transistor 368a and the transistor 368b are formed by insulating layers 361 and 3 62. In addition, insulating layer 363 and insulating layer 364 are provided on insulating layer 362. The back gates of the transistors 368a and 368b are The insulating layer 363 is embedded in the insulating layer 364. The insulating layer 365 is embedded on the insulating layer 364. An electrode 367 is provided between the insulating layers 361 to 366. 66. The electrode 367 is electrically connected to the electrode 251.

[0110] In addition, a transistor 368a, a transistor 368b, a capacitor 369a, and a capacitor An insulating layer 371, an insulating layer 372, and an insulating layer 373 are formed on the element 369b. An electrode 375 is formed on the layer 373. The electrode 375 is connected to the contact plug 374. The electrode 367 is electrically connected thereto.

[0111] In addition, on the electrode 375, an insulating layer 376, an insulating layer 377, an insulating layer 378, and an insulating layer 3 79 is provided. An electrode 380 is embedded in the insulating layers 376 to 379. The electrode 380 is electrically connected to the electrode 375.

[0112] Moreover, an insulating layer 381 and an insulating layer 382 are provided on the electrode 380 and the insulating layer 379. An insulating layer 383 is provided on the insulating layer 382.

[0113] <About the constituent materials> 〔substrate〕 There are no major limitations to the material used as the substrate, but it should be strong enough to withstand the subsequent heat treatment. For example, the substrate must be made of silicon or silicon carbide. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, silicon germanium, etc. In addition, a compound semiconductor substrate having a SOI substrate or a semiconductor substrate having a Uses transistors equipped with semiconductor elements such as distorted transistors and FIN type transistors. Alternatively, a high electron mobility transistor (HEMT) can be used. Gallium arsenide and aluminum arsenide applicable to the GaN-on-Mobility Transistor Minium gallium, indium gallium arsenide, gallium nitride, indium phosphide, silicon In other words, the substrate is not limited to a simple support substrate, but may be any other suitable substrate. It may also be a substrate on which devices such as transistors are formed.

[0114] In addition, glass such as barium borosilicate glass and aluminoborosilicate glass is used as the substrate. A glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. may also be used. A flexible substrate may be used as the substrate. A transistor, a capacitor, or the like may be directly formed on the flexible substrate, or may be formed on another substrate. A transistor, a capacitor, and the like may be formed on the flexible substrate and then peeled off and transferred to the flexible substrate. In order to peel and transfer the transistors and capacitors from the manufacturing substrate to the flexible substrate, A release layer may be provided between the element and the like.

[0115] The flexible substrate may be, for example, a metal, an alloy, a resin, or a glass, or a fiber thereof. The lower the linear expansion coefficient of the flexible substrate used, the less the resistance to environmental influences. The substrate is preferably a flexible substrate having a linear expansion coefficient of, for example, 1×10 - 3 / K or less, 5×10 -5 / K or less, or 1×10 -5 If a material with a temperature of 0.1 to 1.5 K is used, Examples of resins include polyester, polyolefin, polyamide (nylon, Aramid, polyimide, polycarbonate, acrylic, etc. Aramid Since it has a low linear expansion coefficient, it is suitable as a flexible substrate.

[0116] [Insulating layer] The insulating layer is made of aluminum nitride, aluminum oxide, aluminum nitride oxide, aluminum oxide nitride, etc. Aluminum, magnesium oxide, silicon nitride, silicon oxide, silicon nitride oxide, oxide Silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide , lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate Materials selected from the group consisting of oxides, nitrides, etc. are used in a single layer or in a laminated form. A mixture of a plurality of materials selected from the group consisting of a nitride material, an oxide-nitride material, and a nitride oxide material may be used. .

[0117] In this specification, the term "nitride oxide" refers to a compound that contains more nitrogen than oxygen. In addition, an oxynitride is a compound that contains more oxygen than nitrogen. The content of oxygen can be measured, for example, by Rutherford Backscattering (RBS) spectroscopy. It can be measured using ion scattering spectrometry (ICS) etc. do.

[0118] In addition, when an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer, In order to prevent an increase in the hydrogen concentration in the insulating layer, it is preferable to reduce the hydrogen concentration in the insulating layer. Specifically, the hydrogen concentration in the insulating layer is measured by secondary ion mass spectrometry (SIMS). Ion Mass Spectrometry) is 2×10 20 atoms / c m 3 Less than or equal to 5×10 19 atoms / cm 3 Less than or equal to 1×10 1 9 atoms / cm 3 Less than 5×10, more preferably 18 atoms / cm 3 The following In particular, it is preferable to reduce the hydrogen concentration in the insulating layer in contact with the semiconductor layer.

[0119] In addition, in order to prevent an increase in the nitrogen concentration in the semiconductor layer, the nitrogen concentration in the insulating layer is reduced. Specifically, the nitrogen concentration in the insulating layer is preferably 5×10 19 ato ms / cm 3 Less than or equal to 5×10 18atoms / cm 3 More preferably, 1 ×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 The following applies.

[0120] In addition, it is preferable that at least the region of the insulating layer that contacts the semiconductor layer has few defects. Generally speaking, the electron spin resonance method (ESR) It is preferable that the number of signals observed in e) is small. For example, the above-mentioned signals are The E' center has an observed value of 2.001. For example, a silicon oxide layer or an oxide layer is used as an insulating layer. When a silicon nitride layer is used, the spin density due to the E' center is 3×10 17 spin s / cm 3 Less than or equal to 5×10 16 spins / cm 3 A silicon oxide layer that is Alternatively, a silicon oxynitride layer may be used.

[0121] In addition to the above signals, nitrogen dioxide (NO 2 ) is observed. The signal is split into three signals by the nuclear spin of N, The g value is between 2.037 and 2.039 (first signal), and the g value is 2.001 2.003 or less (second signal), and g value is 1.964 or more and 1.966 or less. It is observed below (referred to as the third signal).

[0122] For example, nitrogen dioxide (NO 2 ) is the spin density of the signal due to ×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 An insulating layer that is less than It is preferable to use it.

[0123] In addition, nitrogen dioxide (NO 2 Nitrogen oxides (NO x ) forms a level in the insulating layer. The level is located within the energy gap of the oxide semiconductor layer. Monster (NO x ) diffuses to the interface between the insulating layer and the oxide semiconductor layer, the level is As a result, the trapped electrons are transported between the insulating layer and the oxide layer. Since it remains near the interface of the semiconductor layer, it shifts the threshold voltage of the transistor in the positive direction. Therefore, if a film with a low content of nitrogen oxide is used as the insulating layer, The shift in the threshold voltage of the transistor can be reduced.

[0124] Nitrogen oxides (NO x An example of an insulating layer with a low emission amount of . The silicon oxynitride layer can be analyzed by thermal desorption spectroscopy (TDS). Nitrogen oxides were detected by thermal desorption spectroscopy. (NO x ) is a membrane that releases more ammonia than water. Output is 1×10 18 / cm 3 5×10 or more 19 / cm 3 The above is the ammo. The amount of Ni released was 50°C or more and 650°C or less for the TDS heat treatment. This is the total amount in the range of ℃ to 550℃.

[0125] Nitrogen oxides (NO x ) reacts with ammonia and oxygen during heat treatment, By using an insulating layer with a high monia emission rate, nitrogen oxides (NO x ) is reduced.

[0126] In addition, at least one of the insulating layers in contact with the oxide semiconductor layer is formed such that oxygen is released by heating. Specifically, the surface temperature of the insulating layer is preferably 100 TDS performed at a temperature between 100°C and 700°C, preferably between 100°C and 500°C. The amount of oxygen released, converted to oxygen atoms, is 1.0×10 18 atoms / cm 3 That's it, 1 .0×10 19 atoms / cm 3 or more, or 1.0×10 20 atoms / cm 3 Below It is preferable to use an insulating layer on the substrate. The oxygen that is released is called "excess oxygen."

[0127] In addition, the insulating layer containing excess oxygen can be formed by performing a process of adding oxygen to the insulating layer. The process of adding oxygen is carried out by heat treatment in an oxidizing atmosphere or plasma treatment. Alternatively, ion implantation, ion doping, plasma immersion, etc. Oxygen may be added by using an ion implantation method or the like. Well, 16 O 2 or 18 O 2 Oxygen gas, nitrous oxide gas, or ozone gas In this specification, the process of adding oxygen is called "oxygen doping." The oxygen doping process may be performed by heating the substrate.

[0128] The insulating layer may be made of polyimide, acrylic resin, benzocyclobutene resin, or poly Organic materials having heat resistance, such as amide and epoxy resins, can be used. In addition to organic materials, low-k materials, siloxane resins, PSG (ringa Glass, BPSG (borophosphorus glass), etc. can be used. The insulating layer may be formed by stacking a plurality of insulating layers.

[0129] The siloxane resin is a Si-O- formed material that is made from a siloxane material. This corresponds to a resin containing Si bonds. Siloxane-based resins have organic groups (e.g., arsenic) as substituents. Alternatively, the organic group may have a fluoro group. It's fine if you're there.

[0130] The method for forming the insulating layer is not particularly limited. Depending on the material used for the insulating layer, a firing process may be used. In this case, the insulating layer firing process can be combined with other heat treatment processes to This makes it possible to manufacture transistors efficiently.

[0131] 〔electrode〕 Conductive materials for forming electrodes include aluminum, chromium, copper, silver, gold, and platinum. , Tantalum, Nickel, Titanium, Molybdenum, Tungsten, Hafnium, Vanadium, Select from niobium, manganese, magnesium, zirconium, beryllium, indium, etc. Materials containing one or more of the above metal elements can be used. Materials containing impurity elements such as phosphorus can also be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon with Any silicide may be used.

[0132] In addition, the conductive material containing the above-mentioned metal element and oxygen may be used. A conductive material containing a metal element and nitrogen may be used. For example, titanium nitride, tantalum nitride, etc. Alternatively, a conductive material containing nitrogen, such as indium tin oxide (ITO), may be used. tungsten oxide, indium oxide containing tungsten oxide, tungsten oxide Indium zinc oxide containing ingested indium, indium oxide containing titanium oxide, titanium oxide Indium tin oxide, indium zinc oxide, indium gallium zinc oxide, Silicon-doped indium tin oxide may also be used. Sodium zinc oxide may also be used.

[0133] In addition, a plurality of conductive layers made of the above materials may be laminated. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated material that combines the above-mentioned material containing a metal element and a conductive material containing nitrogen is In addition, the above-mentioned metal element-containing material, the conductive material containing oxygen, and the nitrogen A laminated structure may be formed by combining a conductive material containing nitrogen. Alternatively, a laminated structure may be used in which a material and a conductive material containing oxygen are combined.

[0134] In addition, an oxide semiconductor is used for the semiconductor layer, and the above-mentioned material containing a metal element is used for the gate electrode. When a laminated structure is used in which a conductive material containing oxygen is combined with a conductive material containing oxygen, It is preferable to provide a conductive material on the semiconductor layer side. Thus, oxygen released from the conductive material is easily supplied to the semiconductor layer.

[0135] The electrodes are made of highly conductive material with high embedding properties, such as tungsten or polysilicon. A conductive material having high embedding properties, a titanium layer, and a titanium nitride layer may be used. Alternatively, a barrier layer (diffusion prevention layer) such as a tantalum nitride layer may be used in combination. The pole is sometimes called a "contact plug."

[0136] In particular, it is preferable to use a conductive material that is difficult for impurities to permeate for the electrode in contact with the gate insulating layer. An example of a conductive material that is difficult for impurities to permeate is tantalum nitride.

[0137] The insulating layer is made of an insulating material that is difficult for impurities to penetrate, and the electrode in contact with the gate insulating layer is made of an insulating material that is difficult for impurities to penetrate. By using a conductive material that is difficult for impurities to penetrate, the diffusion of impurities into the transistor is further suppressed. This makes it possible to further improve the reliability of the transistor. In other words, the reliability of the semiconductor device can be further improved.

[0138] [Semiconductor Layer] The semiconductor layer may be a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, or the like. The semiconductor materials include, for example, silicon. Silicon, germanium, etc. can be used. Silicon germanium, carbide Compound semiconductors such as silicon, gallium arsenide, oxide semiconductors, and nitride semiconductors, as well as organic semiconductors The body, etc. can be used.

[0139] In addition, when using an organic semiconductor as the semiconductor layer, low molecular weight organic materials with aromatic rings or π-electron Conjugated conductive polymers such as rubrene, tetracene, pentaerythritol, etc. can be used. Tetrathane, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene Polyparaphenylenevinylene, polyparaphenylenevinylene, etc. can be used.

[0140] In addition, the semiconductor layers may be laminated. When the semiconductor layers are laminated, each layer may have a different crystal structure. For the semiconductor layers, semiconductors having different structures may be used, or different semiconductor materials may be used.

[0141] In addition, since the band gap of oxide semiconductors is 2 eV or more, the oxide semiconductor is used in the semiconductor layer. By using the above, a transistor with extremely low off-state current can be realized. At room temperature (typically 25°C) and with a source-drain voltage of 3.5V, The off-state current per 1 μm of width is 1×10 -20 Less than A, 1×10 -22 Less than A, or 1×10 -24 In other words, the on / off ratio can be set to 20 digits or more. In addition, a transistor using an oxide semiconductor for a semiconductor layer can have a source and a drain. Therefore, a highly reliable transistor can be provided. It is possible to provide a transistor having a high voltage resistance and a highly reliable semiconductor device. In addition, a semiconductor device having a large output voltage and high withstand voltage can be provided.

[0142] In the present specification and the like, a semiconductor layer in which a channel is formed has crystalline silicon. Transistors using this method are also called "crystalline silicon transistors."

[0143] Crystalline silicon transistors tend to have higher mobility than OS transistors. On the other hand, crystalline silicon transistors have an extremely low off-state current like OS transistors. Therefore, the semiconductor material used in the semiconductor layer should be appropriately selected according to the purpose and application. For example, depending on the purpose and application, it is important to distinguish between OS transistors and crystalline silicon A combination of transistors and the like may also be used.

[0144] When an oxide semiconductor layer is used as the semiconductor layer, the oxide semiconductor layer is formed by a sputtering method. It is preferable that the oxide semiconductor layer be formed by a sputtering method. The oxide semiconductor layer is preferably formed by sputtering because the density of the oxide semiconductor layer can be increased. In this case, the sputtering gas is a rare gas (typically argon), oxygen, or a rare gas. A mixed gas of nitrogen and oxygen can be used. Also, the sputtering gas must be highly purified. For example, oxygen gas and rare gases used as sputtering gas have a dew point of -60°C or lower. The gas used is highly purified to a temperature of preferably -100°C or lower. By forming the oxide semiconductor layer using a deposition gas, moisture or the like can be taken into the oxide semiconductor layer. It can be prevented as much as possible.

[0145] In addition, in the case where the oxide semiconductor layer is formed by a sputtering method, It is preferable to remove as much moisture as possible from the deposition chamber. For example, a cryopump or similar device is used. A suction-type vacuum pump was used to create a high vacuum (5×10 -7 Pa to 1×10 -4 It is preferable to evacuate the gas to a pressure of about 10 Pa. H in the deposition chamber 2 Partial pressure of gas molecules equivalent to O (gas molecules equivalent to m / z=18) 1×10 -4 Pa or less, and 5×10 -5 It is more preferable to set the value to 0.1 Pa or less. I wish.

[0146] [Metal oxides] The oxide semiconductor preferably contains at least indium or zinc. In addition to these, aluminum, gallium, and zinc are preferably included. It is preferable that the alloy contains boron, silicon, or yttrium. , titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium Choose from titanium, neodymium, hafnium, tantalum, tungsten, or magnesium. The composition may contain one or more of the above-mentioned compounds.

[0147] Here, a case will be considered in which the oxide semiconductor contains indium, the element M, and zinc. The element M is aluminum, gallium, yttrium, tin, etc. Applicable elements for element M are boron, silicon, titanium, iron, nickel, and germanium. Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium, Tantalum However, the element M may be a combination of multiple of the above elements. There are cases where it is acceptable to combine them.

[0148] In this specification, metal oxides containing nitrogen are also referred to as metal oxides. Metal oxides containing nitrogen are also called metal oxynitrides (MEs). It may also be called tal oxynitride.

[0149] [Metal oxide composition] The following describes a CAC (C This paper explains the configuration of the Multicloud Aligned Composite Operating System (MSO).

[0150] In this specification, CAAC (c-axis aligned crystal l), and CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents a function or a material configuration. An example is shown below.

[0151] CAC-OS or CAC-metal oxide is a material that has a conductive function in some parts. The material has a function of insulating in part and a function of semiconductor in the whole material. In addition, CAC-OS or CAC-metal oxide is used as the active layer of a transistor. When used in a layer, the conductive function is to allow the electrons (or holes) that serve as carriers to flow. The insulating function is to prevent the flow of electrons, which act as carriers. By making the functions of the two work in a complementary manner, the switching function (On / Off) The function of providing the CAC-OS or CAC-metal oxide with the In CAC-OS or CAC-metal oxide, the respective functions are By separating the two, the functions of both can be maximized.

[0152] In addition, CAC-OS or CAC-metal oxide is a conductive area and an insulating area. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive and insulating regions in the material are formed by nanoparticles. The conductive and insulating regions may be separated by different materials. In addition, the conductive area may be observed as a cloud-like connected area with a blurred periphery. This may be the case.

[0153] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and The insulating regions are each 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. They may be dispersed in the material at sizes of less than one millimeter.

[0154] In addition, CAC-OS or CAC-metal oxide has different band gaps For example, CAC-OS or CAC-metal ox The ide consists of a wide gap component due to the insulating region and a conductive region. In this configuration, the narrow gap is In the component having a narrow gap, carriers mainly flow. It acts complementarily to components with wide gaps and acts in conjunction with components with narrow gaps. Carriers also flow to the components with an id gap. When AC-metal oxide is used for the channel formation region of a transistor, High current drive capability in the on-state of the transistor, i.e., large on-state current, and high field effect Mobility can be obtained.

[0155] That is, CAC-OS or CAC-metal oxide is a matrix composite. matrix composite, or metal matrix composite It can also be called a composite matrix.

[0156] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single crystal oxide semiconductor, for example, CAAC-OS (c- axis aligned crystalline oxide semiconductor ctor), polycrystalline oxide semiconductor, nc-OS (nanocrystalline ox ide semiconductor), pseudo amorphous oxide semiconductor (a-like OS : amorphous-like oxide semiconductor) and non and amorphous oxide semiconductors.

[0157] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The nanocrystals are connected together to form a distorted crystal structure. In a region, a lattice arrangement is formed between a region having a uniform lattice arrangement and another region having a uniform lattice arrangement. This refers to the point where the direction of the

[0158] Nanocrystals are basically hexagonal, but are not limited to regular hexagons and may have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in the CAAC-OS, clear grain boundaries (grain bows) were observed even in the vicinity of the strain. It is difficult to confirm the presence of the lattice distortion. This is because the CAAC-OS has ab-plane orientation. In the case of the SiO2, the arrangement of oxygen atoms is not dense, and the bond distance between atoms is reduced by the substitution of metal elements. This is because distortion can be tolerated due to changes in the distance, etc.

[0159] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter, the In layer) and an elemental A layered crystal consisting of layers of element M, zinc, and oxygen (hereinafter referred to as the (M, Zn) layer). Indium and element M tend to have a layered structure. When the element M in the (M, Zn) layer is replaced with indium, (In, M, Zn ) layer. Also, when indium in the In layer is replaced with element M, (In, M) layer.

[0160] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides is reduced by the incorporation of impurities and the generation of defects. Therefore, CAAC-OS is a metal oxide with few impurities and defects (oxygen vacancies, etc.). Therefore, the physical properties of metal oxides having CAAC-OS are stable. Therefore, metal oxides with CAAC-OS are heat-resistant and highly reliable.

[0161] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. Sometimes it is indistinguishable from the body.

[0162] The a-like OS is a metal oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has voids or low density regions. The ke-OS has a lower crystallinity than the nc-OS and CAAC-OS.

[0163] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention can be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more kinds.

[0164] [Transistors with metal oxide] Next, the case where the above metal oxide is used for a channel formation region of a transistor will be described. do.

[0165] By using the above metal oxide for the channel formation region of a transistor, a high field effect can be achieved. It is possible to realize a transistor with high mobility. It can be realized.

[0166] In addition, it is preferable to use a metal oxide having a low carrier density for the transistor. In the case of lowering the carrier density of the metal oxide film, the impurity concentration in the metal oxide film is lowered. In this specification, the impurity concentration is low and the defect level density is low. A metal oxide with a low level of density is called high purity intrinsic or substantially high purity intrinsic. For example, , the carrier density is 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 Less than, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's it. stomach.

[0167] In addition, a highly pure intrinsic or substantially highly pure intrinsic metal oxide film has a low density of defect states. Therefore, the trap level density may be low.

[0168] In addition, the charges trapped in the trap levels of metal oxides take a long time to disappear. Therefore, the trap level density is high. A transistor having a metal oxide in a channel formation region may have unstable electrical characteristics. be.

[0169] Therefore, in order to stabilize the electrical characteristics of the transistor, the impurity concentration in the metal oxide must be In order to reduce the impurity concentration in the metal oxide, It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0170] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0171] When metal oxides contain silicon or carbon, which are group 14 elements, the metal oxide This leads to the formation of defect levels in the oxides. The concentration of silicon and carbon near the interface with the metal oxide was measured using secondary ion mass spectrometry (SIM The concentration obtained by S) is 2 × 10 18 atoms / cm 3 Below, preferably 2 x 1 0 17 atoms / cm 3 The following applies.

[0172] In addition, when an alkali metal or alkaline earth metal is contained in a metal oxide, a defect level is formed. Therefore, alkali metals or alkaline earth metals may form a carrier. A transistor that uses a metal oxide containing metals in the channel formation region is a normally-on transistor. Therefore, the concentration of alkali metals or alkaline earth metals in the metal oxide Specifically, it is preferable to reduce the degree of Al in the metal oxide obtained by SIMS. The concentration of potassium metal or alkaline earth metal is 1×10 18 atoms / cm 3 The following are the preferred Or 2×10 16 atoms / cm 3 To the following:

[0173] In addition, when nitrogen is contained in a metal oxide, electrons that act as carriers are generated, and the carriers The density increases and it becomes easier to make the metal oxide containing nitrogen into a channel type. The transistors used in the metal-doped region tend to be normally-on. In the oxide, it is preferable that the nitrogen in the channel formation region is reduced as much as possible. For example, the nitrogen concentration in metal oxide is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 The following .

[0174] In addition, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the carrier In some cases, hydrogen atoms are formed by bonding with oxygen atoms that bond with metal atoms. Therefore, metal oxides containing hydrogen can generate electrons that are carriers. The transistor used in the channel formation region tends to have normally-on characteristics. It is preferable that the amount of hydrogen in the metal oxide is reduced as much as possible. The hydrogen concentration obtained by SIMS in the specimen is 1×10 20 atoms / cm 3 less than , preferably 1 x 10 19 atoms / cm 3 less than 5×10 18 ato ms / cm 3 less than 1×10 18 atoms / cm 3 Less than.

[0175] A metal oxide with a sufficiently reduced impurity concentration is used for the channel formation region of a transistor. This makes it possible to impart stable electrical characteristics.

[0176] <Film formation method> Insulating materials for forming insulating layers, conductive materials for forming electrodes, or semiconductors The semiconductor material for forming the layer is deposited by sputtering, spin coating, or CVD (Chemical Vapor Deposition). mical vapor deposition) method (thermal CVD method, MOCVD (Met al Organic Chemical Vapor Deposition) method, P ECVD (Plasma Enhanced CVD) method, High density plasma CVD (Hi gh density plasma CVD) method, LPCVD (low pressu re CVD) method, APCVD (atmospheric pressure CVD) method), ALD (Atomic Layer Deposition) method, or , MBE (Molecular Beam Epitaxy) method, or PLD (Pu lsed Laser Deposition method, dip method, spray coating method, droplet Using the ejection method (inkjet method, etc.) and printing method (screen printing, offset printing, etc.) It can be formed by

[0177] The plasma CVD method can produce high-quality films at relatively low temperatures. Alternatively, when a deposition method that does not use plasma during deposition, such as a thermal CVD method, is used, Damage is unlikely to occur. For example, wiring, electrodes, and elements (transistors) contained in semiconductor devices , capacitance elements, etc.) may become charged up by receiving electric charge from the plasma. At this time, the accumulated charges can damage the wiring, electrodes, elements, etc., included in the semiconductor device. On the other hand, in the case of a deposition method that does not use plasma, such a plasma Since no damage occurs, the yield of semiconductor devices can be increased. Since no plasma damage occurs, a film with few defects can be obtained.

[0178] The CVD and ALD methods are deposition methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is not easily affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it ideal for achieving high aspect ratios. However, the ALD method is relatively slow in forming a film. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a faster deposition rate. may be preferred.

[0179] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, the film formation By changing the flow rate ratio of the source gas while heating, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gas, multiple film forming chambers can be used. Compared to deposition using a vacuum, the time required for deposition is shorter due to the time required for transportation and pressure adjustment. Therefore, the productivity of the semiconductor device can be increased in some cases.

[0180] When forming a film by the ALD method, it is recommended to use a gas that does not contain chlorine as the material gas. is preferred.

[0181] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. is possible.

[0182] (Embodiment 4) In this embodiment, an embodiment of a microcontroller and a display element according to one embodiment of the present invention will be described. An example of the mounting method will be described with reference to the drawings.

[0183] The display of this embodiment uses micro LEDs as display elements. In the embodiment, a micro LED having a double heterojunction is described. One aspect of the invention may be, but is not limited to, a micro LED having a quantum well junction. stomach.

[0184] By using micro LEDs as the display element, it is possible to Compared to displays using electroluminescence elements, the brightness can be increased. By using micro LEDs as the display element, it is possible to display images with constant brightness like an LCD display. Since there is no need to turn on the backlight, power consumption can be reduced. In addition, displays that use micro LEDs as display elements have high contrast. Since the viewing angle is wide, the display quality can be improved.

[0185] The area of ​​the light-emitting region of the micro LED is 1 mm 2 Less than 10000μ is preferable. m 2 Less than 1000μm is more preferable. 2 Less than 100μm is more preferable. 2 The following is further Preferred.

[0186] Micro LEDs have a structure in which the cladding layer sandwiches the active layer between the electrodes. The electrodes are preferably made of a conductive material that transmits visible light so that light can be emitted. In the active layer, electrons and holes combine to emit light. In other words, the active layer is also called the light-emitting layer. The active layer is sandwiched between a pair of cladding layers, one of which is an n-type cladding layer and the other is a p-type cladding layer. The cladding layer and the active layer are stacked to form red, yellow, green, and red light. The laminated structure is formed to emit light of a different color, such as blue or blue. Gallium arsenide, gallium aluminum arsenide, aluminum gallium Indium-indium-phosphide, gallium nitride, indium-gallium nitride compound, selenium For example, gallium nitride, indium nitride, etc. can be used. Gallium compounds may be used.

[0187] The micro LEDs are formed on a carrier substrate, such as a sapphire wafer. The black LEDs are then transferred from the carrier substrate onto the display substrate.

[0188] For example, as shown in FIG. 10(A), micro LEDs are The electrodes are formed on different carrier substrates 1001R, 1001G, and 1001B. Each micro LED (LED chip 1002R, 1002G, 1002B) is mounted on a board The substrate 1003 is a transistor on which a microcontroller is already mounted. By adopting this configuration, the display described in the above embodiment can be obtained. It is possible.

[0189] The method for mounting the microcontroller and the display element on the display is shown in Figure 10 (A For example, as shown in FIG. 10B, the micro LED can be used in a variety of colors (e.g., red). , green, and blue) are formed on different carrier substrates 1001R, 1001G, and 1001B, Each micro LED (LED chip 1002R, 1002G, 1002B) is integrated The LED chip 1004 may be transferred onto the substrate 1003. This is a transistor substrate on which a microcontroller is already installed. Reduce the number of LED chips transposed onto the transistor substrate with the microcontroller This can be used as the display described in the above embodiment.

[0190] The method for mounting the microcontroller and the display element on the display is shown in Figure 10 (A ), (B). For example, as shown in FIG. 10(C), the micro LED can be used in a variety of colors ( For example, red, green, and blue) are represented by different carrier substrates 1001R, 1001G, and 1001B. Further, a carrier substrate 1005 on which a microcontroller is formed is provided, and each microcontroller is Black LED (LED chip 1002R, 1002G, 1002B) and microcontroller A semiconductor chip 1006 having a circuit configuration for the LED chip 1002 is prepared. LED chip 1 integrating R, 1002G, 1002B and a semiconductor chip 1006 007 on a substrate 1008. The substrate 1008 has electrodes and wiring. This is a board on which the microcontroller and the microLE are mounted. The display described in the above embodiment is formed by using a chip that is electrically connected to D in advance. It can be said that:

[0191] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes.

[0192] (Embodiment 5) In this embodiment, a semiconductor device applicable to the display exemplified in the above embodiment will be described. The semiconductor device exemplified below can function as a memory device.

[0193] In this embodiment, a DOSRAM (registered trademark) is used as an example of a memory device including an oxide semiconductor. The name "DOSRAM" is a trademark of Dynamic Oxid The name comes from e Semiconductor Random Access Memory. DOSRAM is a type of memory cell that is 1T1C (1 transistor 1 capacitance). and a write transistor including an oxide semiconductor. That is the thing.

[0194] An example of the stacked structure of the DOSRAM 1000 will be described with reference to FIG. 1300 is a sense amplifier unit 1302 that reads data and a cell that stores the data. The array section 1303 is laminated.

[0195] As shown in FIG. 11, the sense amplifier unit 1302 includes a bit line BL, a Si transistor The Si transistors Ta10 and Ta11 are single crystal The silicon wafer has a semiconductor layer. The Si transistors Ta10 and Ta11 are sense amplifiers. The memory cell 10 constitutes a buffer and is electrically connected to the bit line BL.

[0196] The cell array unit 1303 has a plurality of memory cells 1301. The memory cells 1301 are The cell array unit 1303 includes a transistor Tw1 and a capacitance element C1. The transistor Tw1 shares a semiconductor layer. The semiconductor layer and the bit line BL are connected by a conductive layer (not shown). It is electrically connected by the body.

[0197] The stacked structure shown in FIG. 11 is made by stacking multiple circuits each having a group of transistors. The present invention can be applied to various semiconductor devices.

[0198] The metal oxide, insulator, conductor, etc. in FIG. 11 may be a single layer or a multilayer. The methods are sputtering, molecular beam epitaxy (MBE), and pulse laser ablation. Various film formation methods such as polystyrene (PLA) method, CVD method, and atomic layer deposition (ALD) method are used. The CVD method includes plasma CVD, thermal CVD, and metal organic CVD. etc.

[0199] Here, the semiconductor layer of the transistor Tw1 is made of a metal oxide (oxide semiconductor). Here, an example is shown in which the semiconductor layer is composed of three metal oxide layers. The conductor layer is preferably composed of a metal oxide containing In, Ga, and Zn.

[0200] Here, the metal oxide is a metal oxide that is formed by adding an element that forms an oxygen vacancy or an element that bonds with the oxygen vacancy. The addition of a metal oxide increases the carrier density and may result in a lower resistance. By selectively lowering the resistance of the semiconductor layer using A region can be provided.

[0201] Representative elements that reduce the resistance of metal oxides include boron and phosphorus. In addition, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, rare gases, etc. can also be used. Representative examples of rare gases are helium, neon, argon, krypton, and xenon. The concentration of the element is measured using secondary ion mass spectrometry (SIMS) etc. It is possible.

[0202] In particular, boron and phosphorus are used in the manufacturing process of amorphous silicon or low-temperature polysilicon. This is preferable because existing equipment can be used. Existing facilities can be repurposed. Capital investment can be reduced.

[0203] A transistor having a semiconductor layer selectively reduced in resistance is, for example, a transistor using a dummy gate. Specifically, a dummy gate is provided on a semiconductor layer. The Mie gate may be used as a mask to add an element that reduces the resistance of the semiconductor layer. That is, the element is added to the region of the semiconductor layer that does not overlap with the dummy gate, and a low resistance The element is added by using an ionized source gas. The ion implantation method adds ionized source gas without mass separation. The ion doping method and plasma immersion ion implantation method are used. It is possible.

[0204] The conductive material used for the conductor is polycrystalline silicon doped with impurity elements such as phosphorus. Semiconductors such as nickel silicide, molybdenum, titanium, tungsten Metals such as aluminum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or metal nitrides containing the above-mentioned metals (tantalum nitride, titanium nitride, molybdenum nitride, etc.) In addition, indium tin oxide, indium oxide containing tungsten oxide, etc. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium oxide, indium tin oxide with titanium oxide, indium zinc oxide, silicon oxide A conductive material such as indium tin oxide doped with silicon can be used.

[0205] The insulating materials used for the insulator include aluminum nitride, aluminum oxide, and aluminum nitride oxide. Aluminum, aluminum oxide nitride, magnesium oxide, silicon nitride, silicon oxide, Silicon oxide nitride, silicon oxynitride, gallium oxide, germanium oxide, yttrium oxide , Zirconium oxide, Lanthanum oxide, Neodymium oxide, Hafnium oxide, Tantalum oxide In this specification, the term "oxynitride" refers to an oxide, A compound in which the amount of oxygen is greater than the amount of nitrogen is called a nitride compound. It refers to many compounds.

[0206] (Embodiment 6) In this embodiment, an electronic device including a display according to one embodiment of the present invention will be described with reference to drawings. Please refer to the following for explanation.

[0207] The electronic devices exemplified below are equipped with the displays described in the above embodiments. This allows for low power consumption, small color change, and high brightness. It is therefore possible to provide an electronic device capable of displaying high quality images.

[0208] Examples of electronic devices include television sets, desktop or notebook computers, etc. Personal computers, computer monitors, digital signage al Signage: Electronic signage, wearable displays, large displays such as pachinko machines In addition to electronic devices with relatively large screens such as game consoles, digital cameras, digital video digital cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio equipment playback devices, etc.

[0209] The electronic device according to one embodiment of the present invention can have various functions. Functions for displaying still images, videos, text images, etc. on the display, touch panel function, calendar Functions such as displaying date or time, running various software (programs) a function to read out a program or data recorded on a recording medium; It can have functions etc.

[0210] FIG. 12A shows an example of a television device. The television device 1100 has a housing 1. A display 1102 is built into the display 101. Here, the display 1102 is supported by a stand 1103. The configuration in which the housing 1101 is supported is shown.

[0211] The display of one embodiment of the present invention can be applied to the display 1102. This allows for low power consumption while displaying images with little color change and high brightness. It is possible to provide a television device capable of receiving the television signal.

[0212] FIG. 12B shows a portable electronic device 1110. The portable electronic device 1110 has a housing 1. A display 1112 is built into the housing 111. In FIG. 1 shows an image capture device 1113.

[0213] The display of one embodiment of the present invention can be applied to the display 1112. This allows for low power consumption while producing images with little color change and high brightness. It is possible to provide a portable electronic device 1110 capable of displaying the above-mentioned information. Since the luminance of the light source 2 can be increased, the light source 2 can be used as a light source when using the imaging device 1113. This allows the provision of a highly convenient portable electronic device 1110. It is possible.

[0214] FIG. 12C shows a projection display device 1120 and a projected image. The display device 1120 has a display and a projection lens built into a housing 1121. In FIG. 12C, an image 1122 projected from a projection type display device 1120 is A screen 1123 for projection is shown.

[0215] The display of one embodiment of the present invention can be applied to the display in the housing 1121. This allows for low power consumption, small color change, and high brightness. It is possible to provide a projection type display device 1120 capable of projecting a high quality image onto a screen. .

[0216] In addition, the display of one embodiment of the present invention has high luminance and excellent visibility outdoors. Therefore, it can be used, for example, as a headlight for an automobile.

[0217] FIG. 13A shows an automobile 1200. The automobile 1200 can be used as a light source. A display 1201 capable of displaying the above information is incorporated as a headlight.

[0218] The display of one embodiment of the present invention can be applied to the display 1201. This allows for low power consumption, small color change, and high brightness light. It is possible to provide a projectable automobile 1200. Note that the display 1201 has a brightness of In addition to emitting high-intensity light, it can also be used as a display to display highly visible images. Therefore, it can be used as a means of communication. By providing a plurality of displays 1201_1 and 1201_2, the light emission direction can be changed. In addition to being able to diffuse light, the function of the turn signal or brake light can be determined according to the color. It is also possible to display the

[0219] This embodiment mode can be appropriately combined with the descriptions of other embodiment modes. [Explanation of symbols]

[0220] 10: display, 11: display unit, 13: gate driver, 14: source driver, 1 5: power supply circuit, 20: pixel, 30: microcontroller, 90: display element, SL: wiring GL: wiring, VL: wiring, 31: transistor, 32: capacitance element, 33: triangular wave generating circuit circuit, 34: comparator, 35: constant current circuit, 36: switch

Claims

1. A plurality of pixels are included. The pixel includes a first display element, a second display element, a third display element, and a microcontroller. The first display element comprises a first micro light emitting diode; the second display element comprises a second micro light emitting diode; the third display element comprises a third micro light emitting diode; the microcontroller includes first to third transistors, a triangular wave generating circuit, first to third comparators, first to third switches, and first to third constant current circuits; each of the first constant current circuit to the third constant current circuit includes a fourth transistor including an oxide semiconductor in a channel formation region, a fifth transistor including silicon in a channel formation region, and a capacitor; the first transistor has a function of holding a first potential corresponding to first image data written to the pixel when the first transistor is turned off; the second transistor has a function of holding a second potential according to second image data written to the pixel when the second transistor is turned off; the third transistor has a function of holding a third potential according to third image data written to the pixel when the third transistor is turned off; each of the first transistor to the third transistor has a front gate and a back gate; the front gate is electrically connected to the back gate, The triangular wave generating circuit has a function of generating a triangular wave signal, the first comparator has a function of generating a first output signal corresponding to the first potential and the triangular wave signal; the second comparator has a function of generating a second output signal corresponding to the second potential and the triangular wave signal; the third comparator has a function of generating a third output signal corresponding to the third potential and the triangular wave signal; the first switch has a function of controlling whether or not a current flowing through the first constant current circuit is caused to flow to the first display element in response to the first output signal; the second switch has a function of controlling whether or not a current flowing through the second constant current circuit is caused to flow to the second display element in response to the second output signal; the third switch has a function of controlling whether or not a current flowing through the third constant current circuit is caused to flow to the third display element in response to the third output signal; In each of the first constant current circuit to the third constant current circuit, one of a source and a drain of the fourth transistor is electrically connected to a gate of the fifth transistor; the other of the source and the drain of the fourth transistor is electrically connected to a first wiring to which a signal to be held is applied to a gate of the fifth transistor; one of a source and a drain of the fifth transistor is electrically connected to a second wiring to which a power supply voltage is applied; one electrode of the capacitance element is electrically connected to the second wiring; the other electrode of the capacitance element is electrically connected to the gate of the fifth transistor; In the first constant current circuit, the fifth transistor has a function of supplying the current to the first display element via the first switch, In the second constant current circuit, the fifth transistor has a function of supplying the current to the second display element via the second switch, A display, wherein in the third constant current circuit, the fifth transistor has a function of supplying the current to the third display element via the third switch.

2. A plurality of pixels are included. The pixel includes a first display element, a second display element, a third display element, and a microcontroller. The first display element comprises a first micro light emitting diode; the second display element comprises a second micro light emitting diode; the third display element comprises a third micro light emitting diode; the microcontroller includes first to third transistors, a triangular wave generating circuit, first to third comparators, first to third switches, and first to third constant current circuits; each of the first constant current circuit to the third constant current circuit includes a fourth transistor including an oxide semiconductor in a channel formation region, a fifth transistor including silicon in a channel formation region, and a capacitor; the first transistor has a function of holding a first potential corresponding to first image data written to the pixel when the first transistor is turned off; the second transistor has a function of holding a second potential according to second image data written to the pixel when the second transistor is turned off; the third transistor has a function of holding a third potential according to third image data written to the pixel when the third transistor is turned off; each of the first transistor to the third transistor has a front gate and a back gate; the front gate is electrically connected to the back gate, The triangular wave generating circuit has a function of generating a triangular wave signal, the first comparator has a function of generating a first output signal corresponding to the first potential and the triangular wave signal; the second comparator has a function of generating a second output signal corresponding to the second potential and the triangular wave signal; the third comparator has a function of generating a third output signal corresponding to the third potential and the triangular wave signal; the first switch has a function of controlling whether or not a current flowing through the first constant current circuit is caused to flow to the first display element in response to the first output signal; the second switch has a function of controlling whether or not a current flowing through the second constant current circuit is caused to flow to the second display element in response to the second output signal; the third switch has a function of controlling whether or not a current flowing through the third constant current circuit is caused to flow to the third display element in response to the third output signal; In each of the first constant current circuit to the third constant current circuit, one of a source and a drain of the fourth transistor is electrically connected to a gate of the fifth transistor; the other of the source and the drain of the fourth transistor is electrically connected to a first wiring to which a signal to be held is applied to a gate of the fifth transistor; one of a source and a drain of the fifth transistor is electrically connected to a second wiring to which a power supply voltage is applied; one electrode of the capacitance element is electrically connected to the second wiring; the other electrode of the capacitance element is electrically connected to the gate of the fifth transistor; In the first constant current circuit, the fifth transistor has a function of supplying the current to the first display element via the first switch, In the second constant current circuit, the fifth transistor has a function of supplying the current to the second display element via the second switch, In the third constant current circuit, the fifth transistor has a function of supplying the current to the third display element via the third switch, The display wherein the oxide semiconductor is indium oxide.

Images