Active balancer

The active balancer addresses the complexity and cost issues of existing balancers by simplifying detection circuits to detect both voltage and current resonance, achieving miniaturization and cost reduction while ensuring efficient charge and discharge control.

JP7682585B2Active Publication Date: 2025-05-26IMASEN ELECTRIC IND CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
JP2021137879
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-08-26
Publication Date
2025-05-26
Estimated Expiration
2041-08-26

AI Technical Summary

Technical Problem

Existing active balancers require complex and costly detection circuits to detect voltage and current resonance, hindering miniaturization and cost reduction.

Method used

A novel active balancer configuration that simplifies detection circuits by using a single detection circuit to detect both voltage and current resonance, integrated with a half-bridge circuit and an LC series circuit, allowing efficient switching control with reduced power loss.

Benefits of technology

The proposed active balancer achieves miniaturization and cost reduction while maintaining efficient charge and discharge control, reducing switching losses and enabling smaller, more affordable devices.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007682585000001
    Figure 0007682585000001
  • Figure 0007682585000002
    Figure 0007682585000002
  • Figure 0007682585000003
    Figure 0007682585000003
Patent Text Reader

Abstract

To provide an active balancer which can be miniaturized, and achieve a low price.SOLUTION: An active balancer 1 equalizes a voltage of a plurality of cells 11 and 12. The active balancer 1 comprises a capacitor 2 and an inductance 3, arranged between the cells 11 and 12, and in addition, comprises: a plurality of switching elements Q1, Q2, Q3, and Q4 switching a connection state between the plurality of cells 11 and 12; and detection circuits M1, M2, M3, and M4 detecting the voltage of the switching elements Q1, Q2, Q3, and Q4. Each of the detection circuits M1, M2, M3, and M4 detects a voltage resonance and a current resonance of the switching elements Q1, Q2, Q3, and Q4.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to an active balancer. In particular, it relates to an active balancer for connecting to a battery module including a plurality of cells connected in series and performing charge and discharge control.

Background Art

[0002] As a secondary battery for supplying power at a high voltage, a battery module in which a plurality of cells are connected in series is widely used. In such a battery module, variations in the state of charge occur during repeated charging and discharging. Variations in the state of charge reduce the effective capacity of the entire battery module and cause degradation of individual cells due to overcharging or over-discharging. For this reason, a balance control device, that is, a balancer, which performs charge and discharge control for each cell and equalizes the state of charge of the cells is required. There are active balancers and passive balancers as balancers, but in recent years, active balancers that regeneratively charge a low-voltage cell with the discharge from a high-voltage cell have been widely used.

[0003] An active balancer includes a plurality of switching elements for switching the direction of the power supplied to the cells. As a method for efficiently turning on and off the switching elements, a soft switching method is known. The soft switching method includes an LC resonance circuit composed of an inductance element and a capacitor for determining the timing of switching. The active balancer controls the current or voltage in a sine wave shape by this LC resonance circuit, and switches on and off each switching element in a state where either the current or voltage flowing through the switching element is substantially 0. Thereby, switching loss and noise can be reduced. Patent Document 1 discloses a power supply device including a series resonance circuit including a reactor and a capacitor, and a power storage control device for controlling the connection state between the cell and the series resonance circuit, in a power storage device that suppresses the burden on the cells when equalizing the cell voltages, and the power storage control device transfers energy between the cells via the series resonance circuit.

[0004] FIG. 8 shows a circuit diagram illustrating an example of a circuit configuration for equalizing the states of charge of two cells by a conventional active balancer. In the conventional active balancer 10, in order to detect the resonance of the voltage and current of the LC resonance circuit, four voltage detection circuits indicated by reference symbols M1, M2, M3, and M4 and one current detection circuit indicated by reference symbol C are required for each active balancer. [Prior Art Documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-65795 [Summary of the Invention] [Problems to be Solved by the Invention]

[0006] In recent years, there has been a demand for further miniaturization and reduction of manufacturing costs in active balancers. Therefore, miniaturization and simplification are also required in current detection circuits and voltage detection circuits for detecting the resonance of the circuits of active balancers.

[0007] The present invention has been made in view of the problems to be solved as described above, and an object of the present invention is to provide a novel configuration of a resonance circuit for an active balancer, thereby solving the problems of miniaturizing the entire active balancer and reducing costs. [Means for Solving the Problems]

[0008] The invention according to claim 1 relates to an active balancer that equalizes the voltages of a plurality of cells connected in series. The active balancer of the present invention A plurality of switching elements for switching the connection state between a plurality of cells, wherein two of said switching elements are arranged in parallel with respect to one cell to constitute a half-bridge circuit for each cell; an inductance having one end connected to a connection point provided between cells and the other end connected to a connection point between the half-bridge circuits; , a capacitor having one end connected to a connection point between the switching elements in the half-bridge circuit and the other end connected to a connection point between the switching elements in a half-bridge circuit separate from the half-bridge circuit to which one end is connected; detection circuits arranged one by one for each of the switching elements to detect the current and voltage of the switching elements; is provided with the capacitor and the inductance constitute an LC series circuit; the detection circuit detects current resonance and voltage resonance of the switching element; It is characterized by the following.

[0009] The active balancer of the present invention it is preferable that the switching element is a MOSFET. Further, it further includes control means for controlling the gate voltage of the switching element, and the detection circuit detects the current applied to the switching element and the voltage between the source and drain of the switching element, and at the timing when either the detected current value or voltage value of the switching element becomes zero, the control means performs switching; is preferable.

Advantages of the Invention

[0010] In the active balancer according to the present invention, the configuration of the detection circuit can be simplified compared with the prior art by a configuration in which the detection circuit detects both the voltage resonance and the current resonance of the switching element. As a result, an active balancer with a lower cost and a smaller size can be provided.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

[0012] Hereinafter, a preferred embodiment of the active balancer 1 of the present invention will be described with reference to the drawings. FIG. 1 shows an outline of the circuit configuration of the active balancer 1 of the present invention when performing charge and discharge control of two cells 11 and 12 connected in series.

[0013] The active balancer 1 of the present embodiment includes a capacitor 2 and an inductor 3 disposed between the cells 11 and 12, and a plurality of switching elements Q 1 , Q 2 , Q 3 , Q 4 for switching the connection state between the cells 11 and 12, and a detection circuit M 1 , M 2 , M 3 , M 4 for detecting the current and voltage of the switching elements.

[0014] In the present embodiment, the cells 11 and 12 for which the active balancer 1 performs charge and discharge control are secondary batteries composed of a positive electrode, a negative electrode, and an electrolyte filled between the electrodes, and capable of repeating charge and discharge. In the present invention, those in which two or more batteries are connected in series and a positive electrode terminal and a negative electrode terminal are disposed at the terminal portions are also referred to as cells. Power can be supplied to an external load from the terminals of the cells. In the present embodiment, as the cells 11 and 12, a lithium ion battery, a lithium ion capacitor, or an electric double layer capacitor is preferably used.

[0015] The active balancer 1 of the present embodiment performs control such that the power of the cell having the larger charge state among the cells 11 and 12 is temporarily stored in the capacitor and redistributed to the other cell having the smaller charge state. The switching elements Q 1 , Q 2 , Q 3 , Q4 constitutes a half-bridge circuit for performing switching. The capacitors for temporarily storing the power of the cells are connected to the cells 11 and 12 via the half-bridge circuit.

[0016] The switching element Q 1 , Q 2 , Q 3 , Q 4 is generally a transistor. In this embodiment, the most preferably used switching element is a MOSFET.

[0017] The capacitor 2 and the inductance 3 constitute an LC series circuit. In this circuit configuration, voltage resonance and current resonance occur, the current and voltage change in a sinusoidal function respectively, and a timing when either the current or the voltage becomes zero occurs.

[0018] FIG. 2 is a diagram showing an example of the current path through the active balancer 1 when the active balancer 1 of this embodiment charges the cell 11 from the cell 12, with the thick arrow indicating the path. When charging the cell 11 from the cell 12 in the path shown in FIG. 2, the switching element Q 1 and the switching element Q 3 are on, and the switching element Q 2 and the switching element Q 4 are off.

[0019] When passing current in the direction shown in FIG. 2, the current value flowing through the inductance 3 is equal to the current value flowing through the switching element. Therefore, by regarding the switching element as a shunt resistor and giving a detection circuit the detection functions of both current and voltage, the number of detection circuits can be reduced.

[0020] The switching element Q 1 , Q 2 , Q 3 , Q 4When switching between on and off when the current and voltage are not zero, a large power loss occurs. Therefore, the active balancer 1 switches the on and off of each of the switching elements Q 1 ,Q 2 ,Q 3 ,Q 4 at the timing when either the current or the voltage becomes zero, that is, at the zero-cross detection timing, thereby significantly reducing the switching loss.

[0021] To detect the on-off switching timing, a detection circuit M 1 ,M 2 ,M 3 ,M 4 corresponding one-to-one to the switching elements Q 1 ,M 2 ,M 3 ,M 4 is used. For each switching element Q 1 ,Q 2 ,Q 3 ,Q 4 , operational amplifiers (op-amps) OP 1 ,OP 2 ,OP 3 ,OP 4 are connected in parallel, and the detection circuit M 1 ,M 2 ,M 3 ,M 4 is connected to the output terminal of the op-amp.

[0022] The detection circuit M 1 detects the voltage between the source and drain of the switching element Q 1 . The detection circuit M 2 detects the current between the source and drain of the switching element Q 2 . The detection circuit M 2 can also detect the voltage between the source and drain of the switching element Q 2 . The detection circuit M 3 detects the current between the source and drain of the switching element Q 3 . The detection circuit M 3 detects the voltage between the source and drain of the switching element Q 3It is also possible to detect the voltage between the source and the drain. The detection circuit M 4 detects the voltage between the source and the drain of the switching element Q 4 .

[0023] In particular, the detection circuit M for current detection 2 , M 3 can improve the detection accuracy by including an operational amplifier such as an op-amp.

[0024] Based on the detection result of the detection circuit, the switching timing of the switching element is determined, and the gate voltages G 1 , Q 2 , Q 3 , Q 4 of each of Q 1 , G 2 , G 3 , G 4 are controlled by control means (not shown).

[0025] Fig. 6 shows an example of the voltage waveform and current waveform detected by the detection circuit M 1 , M 2 , M 3 , M 4 when the active balancer 1 of this embodiment charges cell 11 from cell 12, and the control result of the gate voltage for switching performed corresponding to the detection result.

[0026] Fig. 7 shows an example of the voltage waveform and current waveform detected by the detection circuit M 1 , M 2 , M 3 , M 4 when the active balancer 1 of this embodiment charges cell 12 from cell 11, and the control result of the gate voltage for switching performed corresponding to the detection result.

[0027] In Figs. 6 and 7, I_L indicates the change over time of the current flowing through the coil 3, which is an inductance, detected by the detection circuit M 2 . G 1 is where the control circuit switches the switching element Q1 The gate voltage G applied to 1 shows the waveform over time. VQ 1 to the detection circuit M 1 shows the change over time of the voltage between the source and drain of the switching element Q 1 measured by 2 to the control circuit applies the gate voltage G to the switching element Q 2 shows the waveform over time. VQ 2 to the detection circuit M 2 shows the change over time of the voltage between the source and drain of the switching element Q 2 measured by 1 shows the change over time of the voltage between the source and drain of the switching element Q 3 to the control circuit applies the gate voltage G to the switching element Q 3 shows the waveform over time. VQ 3 to the detection circuit M 3 shows the change over time of the voltage between the source and drain of the switching element Q 3 measured by 3 shows the change over time of the voltage between the source and drain of the switching element Q 4 to the control circuit applies the gate voltage G to the switching element Q 4 shows the waveform over time. VQ 4 to the detection circuit M 4 shows the change over time of the voltage between the source and drain of the switching element Q 4 measured by 4 shows the change over time of the voltage between the source and drain.

[0028] As shown in FIG. 6, in the control of the active balancer 1 when charging cell 11 from cell 12, the gate voltage G of the switching element Q 1 is switched on and off at the timing when the source-drain voltage of the switching element Q 1 becomes zero, or at the timing when the current in coil 3 becomes zero. The gate voltage G of the switching element Q 1 is switched on and off at the timing when the source-drain voltage of the switching element Q 2 becomes zero, or at the timing when the current becomes zero. The gate voltage G of the switching element Q 2 is switched on and off at the timing when the source-drain voltage of the switching element Q 2 becomes zero, or at the timing when the current becomes zero. The gate voltage G of the switching element Q 3 ​3 is the timing when the source-drain voltage of the switching element Q 3 becomes zero, or the switching between on and off is performed at the timing when the current becomes zero. The gate voltage G 4 of the switching element Q 4 is switched so that the on and off timing is opposite to that of the switching element Q 3 . When the switching element Q 3 and the switching element Q 4 are turned on simultaneously, the operation is only to store energy in the coil 3 from the lower cell 12, so LC resonance does not occur.

[0029] With reference to FIGS. 3-5 and 7, the control of the active balancer 1 when charging the cell 12 from the cell 11 will be described. FIGS. 3 to 5 are diagrams showing the path of the current passing through the active balancer 1 when the active balancer 1 of the present embodiment charges the cell 12 from the cell 11, with the thick arrows indicating the path of the current. When the active balancer 1 charges the cell 12 from the cell 11, the path of the current is changed in three ways as shown in FIGS. 3 to 5 by controlling the on and off of the switching element.

[0030] The switching timing of the switching element is the timing when the source-drain voltage of the switching element becomes zero, or the timing when the current in the coil 3 becomes zero, in the same manner as when charging the cell 11 from the cell 12. Also when passing current in the direction shown in FIGS. 3 to 5, the current value flowing through the inductance 3 and the current value flowing through the switching element are equal. Therefore, by arranging a current detection circuit considering the switching element as a shunt resistor, both current and voltage can be detected by one detection circuit.

[0031] In FIG. 7, the period A indicated with the symbol A starts at the timing when the current in the coil 3 becomes zero and continues until the timing when the source-drain voltage of the switching element Q 4 becomes zero. In the period A, the active balancer 1 switches the switching element Q 1 and Q3 is turned on, and the switching elements Q 2 and Q 4 are controlled to be turned off. The current path through the active balancer 1 in period A is shown in FIG. 3.

[0032] In FIG. 7, period B following period A continues until the current in coil 3 becomes zero. In period B, the active balancer 1 turns on the switching elements Q 1 , Q 3 , Q 4 and controls the switching element Q 2 to be turned off. The current path through the active balancer 1 in period B is shown in FIG. 4.

[0033] In FIG. 7, period C following period B continues until the source-drain voltage of the switching element Q 4 becomes zero. In period C, the active balancer 1 turns on the switching elements Q 2 , Q 4 and controls the switching elements Q 1 , Q 3 to be turned off. The current path through the active balancer 1 in period C is shown in FIG. 5.

[0034] In FIG. 7, period D following period C continues until the current in coil 3 becomes zero again. In period D, the active balancer 1 turns on the switching elements Q 1 , Q 3 , Q 4 in the same way as in period B and controls the switching element Q 2 to be turned off. The current path through the active balancer 1 in period D is the same as the path shown in FIG. 4 for period B.

[0035] As described in detail above, when the active balancer according to the present embodiment performs charge and discharge control of, for example, two cells connected in series, by including a circuit that detects both current and voltage in one-to-one correspondence with switching elements, it is possible to perform efficient switching control with reduced power loss during switching. Compared with the conventional active balancer shown in FIG. 8, even when performing charge and discharge control of the same two cells, switching control can be sufficiently performed by a smaller number of detection circuits, and miniaturization and cost reduction of the active balancer can be achieved.

[0036] The active balancer of the present invention is also applicable when equalizing the voltages of more cells. For example, when equalizing the voltages of four cells, by using three active balancers to form a multi-stage hierarchical structure, it is similarly possible to equalize the voltages when repeatedly charging and discharging.

Industrial Applicability

[0037] The active balancer according to the present invention is suitably mounted on various vehicles using secondary batteries, as well as on any industrial equipment.

Explanation of Reference Numerals

[0038] 1, 10 Active balancer 2 Capacitor 3 Inductance (coil) 11, 12 Cell Q 1 , Q 2 , Q 3 , Q 4 Switching element M 1 , M 2 , M 3 , M 4 Detection circuit OP 1 , OP 2 , OP 3 , OP 4 Operational amplifier

Claims

1. An active balancer for equalizing the voltages of a plurality of cells connected in series, wherein the active balancer includes a plurality of switching elements for switching the connection state between the plurality of cells, with two of the switching elements arranged in parallel with respect to one cell to form a half-bridge circuit for each cell; an inductance having one end connected to a connection point provided between the cells and the other end connected to a connection point between the half-bridge circuits; a capacitor having one end connected to a connection point between the switching elements in a half-bridge circuit and the other end connected to a connection point between the switching elements in a half-bridge circuit separate from the half-bridge circuit to which one end is connected; a detection circuit arranged one by one for each of the switching elements to detect the current and voltage of the switching element; and is provided with, the capacitor and the inductance form an LC series circuit, and the detection circuit is characterized by detecting the current resonance and voltage resonance of the switching element. An active balancer.

2. The switching element is a MOSFET, and further includes control means for controlling the gate voltage of the switching element, the detection circuit detects the current applied to the switching element and the voltage between the source and drain of the switching element, and the active balancer according to claim 1, wherein the control means performs switching at the timing when either the detected current or voltage value of the switching element becomes zero.

Citation Information

Patent Citations

  • Power storage device and energy balance adjusting method

    JP2012034446A

  • Inductor-based active balancing for batteries and other power sources

    JP2014528692A

  • Power storage, power storage controller and power storage control method

    JP2015065795A

  • Battery management circuit and method, balancing circuit and method, and charged device

    JP2019537409A

  • Electricity storage device, electricity storage control device, and electricity storage control method

    WO2015045660A1