Method for manufacturing semiconductor device and semiconductor device

Abstract

According to the present invention, a dopant is activated by subjecting a silicon substrate, in which point defects have been generated due to ion implantation of the dopant, to laser annealing. At the same time as the activation of the dopant, the point defects are caused to evolve into (311) defects or dislocation loops; and the (311) defects or the dislocation loops function as lifetime killers. Consequently, the present invention provides a method for producing a semiconductor element, the method being capable of generating lifetime killers without increasing the number of production steps.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device.

Background Art

[0002] Power semiconductor devices using silicon pn junctions, such as insulated gate bipolar transistors (IGBTs), are known. In an IGBT, at turn-off, the tail current generated by carriers accumulated in the drift layer becomes a factor in increasing switching losses. By generating lifetime killers such as defects in the silicon layer and shortening the carrier lifetime, the switching losses can be reduced. Techniques for controlling the lifetime by implanting light elements such as protons and helium into the silicon layer to generate defects in the silicon layer are known (for example, Patent Document 1 below).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the conventional method of generating a lifetime killer, a light element implantation step and an annealing step must be added to the semiconductor device manufacturing process. An object of the present invention is to provide a method for manufacturing a semiconductor device capable of generating a lifetime killer without increasing the number of manufacturing steps, and a semiconductor device.

Means for Solving the Problems

[0005] According to one aspect of the present invention, By laser annealing a silicon substrate in which a dopant is ion-implanted and point defects are generated, the dopant is activated, and the point defects are grown into {311} defects or dislocation loops, and a method for manufacturing a semiconductor device using the {311} defects or dislocation loops as lifetime killers is provided.

[0006] According to another aspect of the present invention, a first layer disposed on the surface layer portion of the silicon substrate and implanted with a dopant of a first conductivity type, and a second layer disposed in a region shallower than the first layer of the silicon substrate and implanted with a dopant of a second conductivity type, and a lifetime killer composed of {311} defects or dislocation loops formed in at least one of the first layer and the second layer are provided in a semiconductor device.

Advantages of the Invention

[0007] In the annealing for activating the dopant, since a lifetime killer is generated simultaneously with the activation of the dopant, a dedicated process for generating the lifetime killer can be omitted.

Brief Description of the Drawings

[0008]

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Embodiments for Carrying Out the Invention

[0009] With reference to FIGS. 1 to 9, a method for manufacturing a semiconductor element and a semiconductor element according to an embodiment of the present invention will be described.

[0010] FIG. 1 is a schematic diagram of a laser annealing apparatus used in the method for manufacturing a semiconductor element according to this embodiment. A silicon substrate 10 into which dopants are ion-implanted is held on a movable stage 51 housed in a processing chamber 50. A laser light introduction window 55 is attached to the ceiling surface of the processing chamber 50.

[0011] A laser light source 61 outputs a laser beam 70 of quasi-continuous wave (QCW) oscillation, for example, with a wavelength of 808 nm. Note that a laser light source that outputs a laser beam in the infrared region with a wavelength of 800 nm or more and 950 nm or less may be used. For example, a laser diode is used as the laser light source 61. Note that, as the laser light source 61, other laser oscillators, such as a solid laser oscillator such as a Nd:YAG laser, may be used.

[0012] The laser beam 70 output from the laser light source 61 passes through the attenuator 62, the beam expander 63, and the homogenizer 64, and is reflected downward by the folding mirror 65. The laser beam 70 reflected downward is introduced into the processing chamber 50 through the condenser lens 66 and the laser light introduction window 55. The laser beam 70 introduced into the processing chamber 50 is incident on the silicon substrate 10.

[0013] The beam expander 63 collimates the laser beam 70 and expands the beam diameter. The homogenizer 64 and the condenser lens 66 shape the beam spot on the surface of the object 52 to be processed into a shape elongated in one direction and uniformize the light intensity distribution within the beam cross section. By moving the movable stage 51 in two directions orthogonal to the optical axis of the condenser lens 66 with respect to the object 52 to be processed, the laser beam 70 can be made incident on almost the entire surface of the object 52 to be processed.

[0014] Next, with reference to FIGS. 2 to 4, a method for manufacturing a semiconductor element according to this embodiment will be described. In this embodiment, an insulated gate bipolar transistor (IGBT) is manufactured as the semiconductor element.

[0015] FIG. 2 is a flowchart showing the procedure of the method for manufacturing a semiconductor element according to this embodiment. FIGS. 3A and 3B are cross-sectional views of the semiconductor element in the middle of the manufacturing process, and FIG. 3C is a cross-sectional view of the semiconductor element after the manufacturing process is completed. FIG. 4 is a schematic diagram for explaining the movement of the beam spot during laser annealing.

[0016] First, an element structure shown in FIG. 3A is formed on the first surface 10A, which is one surface of the n-type conductive silicon substrate 10 (step S1). Hereinafter, the element structure formed on the first surface 10A will be described. A p-type base region 11, an n-type emitter region 12, a gate electrode 13, a gate insulating film 14, and an emitter electrode 15 are formed in the surface layer portion of the first surface 10A of the silicon substrate 10. This element structure can be formed using a known semiconductor process. The on / off control of the current can be performed by the voltage between the gate and the emitter. For example, aluminum is used for the emitter electrode 15.

[0017] After forming the element structure in the surface layer portion of the first surface 10A, the silicon substrate 10 is thinned by grinding the silicon substrate 10 from the second surface 10B on the side opposite to the first surface (step S2). As an example, the thickness of the silicon substrate 10 is thinned to be within the range of 50 μm to 200 μm.

[0018] After grinding the silicon substrate 10, phosphorus (P) ions and boron (B) ions are implanted from the second surface 10B of the silicon substrate 10 (step S3). As a result, as shown in FIG. 3B, a first layer 21 into which phosphorus is implanted and a second layer 22 into which boron is implanted in a region shallower than the first layer 21 are formed. Note that FIG. 3B is shown with the top and bottom of the cross-sectional view of FIG. 3A reversed. By ion implantation, a plurality of point defects 25 are generated in the first layer 21, and a plurality of point defects 26 are also generated in the second layer 22. The point defects 25 and 26 include vacancies or interstitial silicon atoms.

[0019] After ion implantation, activation annealing is performed by irradiating the second surface 10B of the silicon substrate 10 with a laser beam under conditions where a lifetime killer is generated (step S4). For this laser annealing, for example, a pulsed laser beam having a wavelength of 600 nm to 1200 nm and a pulse width of 10 μs to 100 μs is used. Note that a continuous wave (CW) laser may be used. When a continuous wave laser is used, the incident time of the laser beam can be controlled by adjusting the beam spot size and the scanning speed.

[0020] Due to this activation annealing, P in the first layer 21 and B in the second layer 22 are activated. The second layer 22 functions as the collector layer of the IGBT. The first layer 21 is sometimes referred to as a buffer layer. The n-type region of the silicon substrate 10 is sometimes referred to as a drift layer. In the activation annealing, as shown in FIG. 3C, {311} defects grow from the point defects 25 and 26, and dislocation loops 27 and 28 are generated due to the {311} defects. Thereafter, a collector electrode 30 is formed on the surface of the second layer 22 (step S5).

[0021] The {311} defect is a rod-shaped defect extending in the <110> direction on the {311} plane, and is generated by the precipitation of excess inter-lattice silicon atoms generated by ion implantation at the very initial stage of heat treatment. This {311} defect serves as a primary reservoir for excess inter-lattice silicon atoms.

[0022] After the {311} defects are generated, when the heat treatment is continued, the {311} defects decompose and inter-lattice silicon atoms are released. The dislocation loops 27 and 28 grow by absorbing the inter-lattice silicon atoms released by the decomposition of the {311} defects. A dislocation loop is a defect in which silicon atoms are clustered in the form of a disk of one atomic layer on the {111} plane, and appears in a ring shape or a coffee bean shape in a transmission electron microscope image (TEM image).

[0023] Generally, in order to eliminate this dislocation loop, additional laser annealing is performed. The wavelength of the pulsed laser beam used for the additional laser annealing is, for example, in the green wavelength range, and the pulse width is 1 / 10 or less of the pulse width of the pulsed laser beam used for the laser annealing in step S4. By this additional laser annealing, the dislocation loop almost disappears and the activation rate increases. In contrast, in this embodiment, without eliminating the dislocation loop, the dislocation loop is used as a lifetime killer.

[0024] Next, with reference to FIG. 4, the laser irradiation procedure in activation annealing (step S4) will be described. FIG. 4 is a schematic diagram showing the movement of the beam spot 71 on the surface of the silicon substrate 10. The beam spot 71 has a shape that is long in one direction. The dimension in the longitudinal direction of the beam spot 71 is denoted as L, and the dimension in the width direction orthogonal to the longitudinal direction is denoted as W. A pulsed laser beam is used for activation annealing.

[0025] The procedure of moving the beam spot 71 in the width direction and the procedure of shifting it in the longitudinal direction on the surface of the silicon substrate 10 are repeated to irradiate the laser beam over substantially the entire surface of the silicon substrate 10. Actually, as shown in FIG. 1, the path of the laser beam 70 is fixed and the silicon substrate 10 is moved.

[0026] The overlap width of the beam spots 71 of two adjacent shots on the time axis is denoted as Wov. The overlap length when the beam spot 71 is shifted in the longitudinal direction is denoted as Lov. Wov / W is called the overlap rate in the width direction, and Lov / L is called the overlap rate in the longitudinal direction. For example, the overlap rate in the width direction is 67% and the overlap rate in the longitudinal direction is 50%.

[0027] Next, with reference to FIG. 5, the relationship between the distribution of the dopant concentration and the distribution of the dislocation loops 27 and 28 will be described. The right diagram in FIG. 5 is a graph showing an example of the depth-direction distribution of the dopant concentration. The vertical axis represents the depth in the unit of "μm", and the horizontal axis represents the dopant concentration. Phosphorus is implanted in a relatively deep region, and boron is implanted in a shallow region. As an example, the depth at which the boron concentration shows the maximum value is about 0.1 μm, and the depth at which the phosphorus concentration shows the maximum value is about 1 μm.

[0028] The left figure in Fig. 5 is a schematic diagram showing the distribution of dislocation loops 27 and 28 in the depth direction of the silicon substrate 10. The dislocation loop 27 in the first layer 21 is generated near the depth where the phosphorus concentration shows the maximum value, and the dislocation loop 28 in the second layer 22 is generated near the depth where the boron B concentration shows the maximum value. That is, the dislocation loops 27 and 28 are unevenly distributed in the region of the depth where the dopant concentration is the highest in the depth direction of the silicon substrate 10. For example, the dislocation loops are distributed such that the difference between the depth of the region where the dopant concentration is the highest and the average depth of the distribution of the dislocation loops is equal to or less than three times the standard deviation of the distribution of the dislocation loops. By changing the depth of ion implantation, it is possible to change the depth of the region where the dislocation loops 27 and 28 are generated.

[0029] Next, with reference to FIGS. 6A and 6B, an evaluation experiment for confirming the generation of dislocation loops by laser annealing will be described.

[0030] FIGS. 6A and 6B are cross-sectional TEM images of the silicon substrate before and after laser annealing, respectively. The sample was ion-implanted with boron under the condition that the concentration shows a peak at a depth of about 100 nm. A pulsed laser beam in the infrared region with a wavelength of 808 nm was used for laser annealing.

[0031] Before laser annealing, no defects are observed in the TEM image (Fig. 6A). However, point defects such as vacancies and interstitial silicon atoms are generated. It can be seen that a large number of defects are generated in the sample subjected to laser annealing in the range of 50 nm or more and 160 nm or less in depth. These defects are dislocation loops. The depth of the region where a large number of dislocation loops are generated is approximately equal to the depth where the boron concentration shows a peak. Thus, when laser annealing is performed under appropriate conditions, a large number of dislocation loops can be generated in the region of the depth where the dopant concentration shows a peak.

[0032] Next, with reference to FIGS. 7A and 7B, the relationship between the energy density per pulse of the laser beam (hereinafter referred to as the pulse energy density) and the generated defects will be described.

[0033] Figures 7A and 7B are cross-sectional TEM images of a silicon substrate when annealing is performed at pulse energy densities of 90% and 97% of the minimum pulse energy density (hereinafter referred to as the melting threshold) at which the surface of the silicon substrate melts due to the incidence of a pulsed laser beam. The sample was implanted with boron ions under conditions where the concentration peaks at a depth of about 100 nm. The boron dose is 5×10 14 cm -2 -2.

[0034] When the pulse energy density is 90% of the melting threshold (Figure 7A), {311} defects are generated. When the pulse energy density is increased to 97% of the melting threshold (Figure 7B), it can be seen that dislocation loops are generated. Thus, by adjusting the pulse energy density, the type of defects generated can be made different. Both {311} defects and dislocation loops can be used as lifetime killers.

[0035] Next, with reference to Figures 8A and 8B, the relationship between the dose and the generated defects will be described.

[0036] Figures 8A and 8B are cross-sectional TEM images of samples fabricated under conditions where the phosphorus doses are 5×10 14 cm -2 -2 and 1×10 13 cm -2 -2, respectively, after laser annealing. The depth at which the phosphorus concentration peaks is about 1 μm, and the pulse energy density is 97% of the melting threshold.

[0037] In the sample with a dose of 5×10 14 cm -2 -2 (Figure 8A), dislocation loops are generated as indicated by the circles. In the sample with a dose of 1×10 13 cm -2In the sample (Fig. 8B), no dislocation loops were observed, and {311} defects extending in a direction perpendicular to the plane of the paper were generated as indicated by the circles. Also, in any of the samples, the activation rate was 80% or higher, achieving a sufficiently high activation rate.

[0038] Thus, when the pulse energy density during laser annealing is the same but the dose amount is different, the types of defects generated may be different. Both {311} defects and dislocation loops can be used as lifetime killers.

[0039] Next, with reference to Figs. 9A and 9B, the relationship between the pulse energy density and the activation rate will be described. Figs. 9A and 9B are graphs showing the relationship between the pulse energy density and the activation rate. The horizontal axis represents the ratio of the pulse energy density to the melting threshold in units of "%", and the vertical axis represents the activation rate in units of "%". Figs. 9A and 9B show the activation rates of samples with boron dose amounts of 5×10 14 cm -2 and 1×10 13 cm -2 respectively.

[0040] In the sample with a dose amount of 5×10 14 cm -2 , an activation rate of 80% or higher was achieved by setting the pulse energy density to 97% or more of the melting threshold. In the sample with a dose amount of 1×10 13 cm -2 , an activation rate of 80% or higher, or almost close to 80%, was achieved by setting the pulse energy density to 90% or more of the melting threshold. Also, by performing activation annealing under such conditions, either {311} defects or dislocation loops can be generated. Note that when the dose amount is smaller, a desired activation rate can be achieved even under the condition that the pulse energy density is less than 90% of the melting threshold.

[0041] Next, the excellent effects of the above embodiments will be described. In the above embodiments, the {311} defects or dislocation loops generated by activation annealing are used as lifetime killers. Conventionally, in order to generate lifetime killers, light elements such as protons were implanted and annealed. In the above embodiments, without implanting protons, lifetime killers are generated in the activation annealing process, so that lifetime killers can be generated without increasing the number of process steps.

[0042] In addition, conventionally, it was considered that if {311} defects or dislocation loops remained after activation annealing, a sufficiently high activation rate could not be achieved. Therefore, post-treatment was performed to eliminate these defects remaining after activation annealing. The inventors of the present application have found through the evaluation experiments described in the above embodiments that a sufficiently high activation rate can be achieved even if {311} defects or dislocation loops remain after activation annealing.

[0043] In the above embodiments, the pulse width of the pulsed laser beam used for activation annealing is set in the range of 10 μs to 100 μs. Even if the pulse width is changed, by changing the peak power according to the change in the pulse width, the pulse energy density remains constant. When the pulse width is shortened and the peak power is increased, a large laser energy is input into an extremely shallow region of the silicon substrate in an extremely short time, so that the surface of the silicon substrate may melt even if the pulse energy density is low. That is, the melting threshold of the pulse energy density changes depending on the pulse width.

[0044] In the above embodiments, the case of manufacturing an IGBT as a power semiconductor device is described, but the activation annealing according to the above embodiments can also be applied to the manufacture of other power semiconductor devices.

[0045] The above embodiments are illustrative, and the present invention is not limited to the above embodiments. For example, it will be apparent to those skilled in the art that various changes, improvements, combinations, etc. are possible.

Explanation of Reference Numerals

[0046] 10 Silicon substrate 10A First surface 10B Second surface 11 p-type base region 12 n-type emitter region 13 Gate electrode 14 Gate insulating film 15 Emitter electrode 21 First layer 22 Second layer 25, 26 Point defects 27, 28 Dislocation loops 30 Collector electrode 50 Processing chamber 51 Movable stage 52 Silicon substrate 55 Laser light introduction window 61 Laser light source 62 Attenuator 63 Beam expander 64 Homogenizer 65 Fold-back mirror 66 Condensing lens 70 Laser beam 71 Beam spot

Claims

1. A method for manufacturing a semiconductor device, comprising laser annealing a silicon substrate in which a dopant is ion-implanted to generate point defects, thereby activating the dopant and growing the point defects into {311} defects or dislocation loops, and using the {311} defects or dislocation loops as lifetime killers.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the wavelength of the laser beam used for the laser annealing is 600 nm or more and 1200 nm or less.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the laser beam used for the laser annealing is a pulsed laser beam, and the pulsed laser beam is incident on the silicon substrate under the condition that the pulse energy density on the surface of the silicon substrate is less than the melting threshold, which is the minimum pulse energy density capable of melting the surface of the silicon substrate by the incidence of the pulsed laser beam.

4. The method for manufacturing a semiconductor device according to claim 3, wherein the pulsed laser beam is incident on the silicon substrate under the condition that the pulse energy density on the surface of the silicon substrate is 97% or more of the melting threshold.

5. A semiconductor device, comprising: a first layer disposed in a surface layer portion of a silicon substrate and implanted with a dopant of a first conductivity type; a second layer disposed in a region shallower than the first layer of the silicon substrate and implanted with a dopant of a second conductivity type; and a lifetime killer composed of {311} defects or dislocation loops formed in at least one of the first layer and the second layer.

6. The semiconductor device according to claim 5, wherein the lifetime killer is unevenly distributed in a region of the depth at which the concentration of at least one of the dopant of the first conductivity type and the dopant of the second conductivity type is the highest with respect to the depth direction of the silicon substrate.

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