Reference voltage generation circuit

Abstract

To realize a reference voltage generation circuit capable of operating at a lower voltage without using an operational amplifier with less variation of mis-matching while using less number of components.SOLUTION: A first voltage generation unit 11 Includes a first bipolar transistor Q1 in which a base and collector are connected and in which an emitter is connected with a reference power source VSS. A second voltage generation unit 12 includes a second bipolar transistor Q2 in which a base is connected to the base and collector of the first bipolar transistor Q1 and in which an emitter is connected to the reference power source VSS via a resistor R1. A control unit 20 includes a third bipolar transistor Q3 in which a base and emitter are respectively connected to the collector of the second bipolar transistor Q2 and the reference power source VSS, and controls a reference voltage VREF by controlling the first voltage and the second voltage on the basis of a voltage between the collector and emitter of the third bipolar transistor.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This invention relates to a reference voltage generation circuit that generates a reference voltage stable with respect to temperature.

Background Art

[0002] FIG. 2 is a circuit diagram showing the configuration of a reference voltage generation circuit 2 disclosed in Patent Document 1. This reference voltage generation circuit 2 is composed of P-channel MOS (Metal Oxide Semiconductor) transistors MP1, MP2, and MP3, diodes D1 and D2 having a size ratio of 1:m, and resistors R10, R20, R11A, and R11B. Here, resistors R11A and R11B have the same resistance value R11.

[0003] In this reference voltage generation circuit 2, MOS transistor MP1 and diode D1 constitute a first voltage generation section, and MOS transistor MP2, resistor R10, and diode D2 constitute a second voltage generation section. And in the reference voltage generation circuit 2, feedback control via operational amplifier OA0 and MOS transistors MP1 and MP2, and feedback control via operational amplifier OA0, MOS transistor MP3, and resistors R11A and R11B act. As a result, the same current I0 that makes the first voltage and the second voltage, which are the voltage drops of both, match flows through both the diode D1 and the series circuit composed of resistor R10 and diode D2. As a result, the reference voltage VREF shown in the following equation is obtained from both ends of resistor R20. VREF =(3·R20 / (R11 + 3·R20)) ·((R10·VT·ln(m) / (3·R10)) + VF) ……(1) However, VT is the thermal voltage kT / q (k is the Boltzmann constant, T is the temperature, q is the charge of one electron), and VF is the forward voltage of diode D1.

[0004] Thus, in the reference voltage generation circuit 2, a reference voltage VREF stable with respect to temperature T is obtained.

Prior Art Documents

Patent Document

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] By the way, in the above - described conventional reference voltage generation circuit 2, since an operational amplifier is used for the control to obtain the reference voltage VREF, when the reference voltage generation circuit 2 is designed with a small area, there is a problem that the mismatch variation in which the voltage value or current value of each part of the operational amplifier deviates from the designed value becomes large. Here, in order to improve the mismatch variation of the operational amplifier, it is necessary to increase the area of the operational amplifier, which is not suitable for a reference voltage generation circuit with a small area. Further, when manufacturing a reference voltage generation circuit by a process in which the threshold voltage Vth of the MOS transistor is equal to or higher than the forward voltage VF of the diode, when an operational amplifier is used in the reference voltage generation circuit, the operating point becomes large. For this reason, it is necessary to secure the operating point of the operational amplifier using a charge pump circuit or the like, and in that case, there is a problem that the input voltage is determined by the operating point of the operational amplifier.

[0007] This invention has been made in view of the above - described circumstances, and an object thereof is to provide a reference voltage generation circuit having less mismatch variation, fewer component counts, and capable of operating at a low voltage.

Means for Solving the Problems

[0008] The present invention provides a reference voltage generation circuit including a first bipolar transistor with its base and collector connected and its emitter connected to a reference power supply, a first voltage generation unit that generates a first voltage, a second bipolar transistor with its base connected to the base and collector of the first bipolar transistor and its emitter connected to the reference power supply via a resistor, a second voltage generation unit that generates a second voltage, a third bipolar transistor with its collector connected to the collector of the second bipolar transistor and its base and emitter connected to the reference power supply, and a control unit that controls the first voltage and the second voltage based on the collector-emitter voltage of the third bipolar transistor to control the reference voltage.

[0009] According to the present invention, a reference voltage generation circuit with less mismatch variation, fewer components, and capable of operating at a low voltage can be realized without using an operational amplifier.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0012] FIG. 1 is a circuit diagram showing the configuration of a reference voltage generation circuit 1 according to an embodiment of the present invention. This reference voltage generation circuit 1 is composed of P-channel MOS transistors M0 to M2 and M7 to M9, N-channel MOS transistors M5 and M6, first to third NPN bipolar transistors Q1 to Q3, and resistors R1, R2, R3A, and R3B.

[0013] Here, the sources and the respective formed n-wells of MOS transistors M0 to M2 and M7 to M9 are connected to the power supply VCC. Also, the sources and the respective formed p-wells of MOS transistors M5 and M6 are connected to the reference power supply VSS which is at a lower potential than the power supply VCC.

[0014] The first bipolar transistor Q1 and the MOS transistor M7 constitute a first voltage generation unit 11 that generates a first voltage V1. Here, the base and the collector of the first bipolar transistor Q1 are connected, and the emitter is connected to the reference power supply VSS. The drain of the MOS transistor M7 is connected to the collector of the first bipolar transistor Q1. The MOS transistor M7 is a first current supply unit that supplies a first current I1 to the first bipolar transistor Q1.

[0015] The base of the second bipolar transistor Q2 is connected to the base and the collector of the first bipolar transistor Q1, and the emitter is connected to the reference power supply VSS via a resistor R1. The second bipolar transistor Q2, the resistor R1, and the MOS transistor M9 constitute a second voltage generation unit 12 that generates a second voltage V2. Here, the gate of the MOS transistor M9 is commonly connected to the gate of the MOS transistor M7, and the drain is connected to the collector of the second bipolar transistor Q2. This MOS transistor M9 is a second current supply unit that supplies a second current I2, which is in a proportional relationship with the first current I1 supplied to the first bipolar transistor Q1, to the second bipolar transistor Q2.

[0016] In this embodiment, the transistor sizes of the MOS transistors M7 and M9 are the same. Therefore, the first and second current supply units supply currents I1 and I2 of the same magnitude to the bipolar transistors Q1 and Q2.

[0017] The third bipolar transistor Q3, MOS transistors M0 to M2, M5, M6, M8, resistors R2, R3A and R3B constitute the control unit 20. This control unit 20 includes the third bipolar transistor Q3 and is a circuit that controls the reference voltage VREF by controlling the first voltage V1 and the second voltage V2 based on the collector-emitter voltage Vce3 of the third bipolar transistor Q3. Hereinafter, the configuration of this control unit 20 will be described.

[0018] The collector of the third bipolar transistor Q3 is connected to the drain of the MOS transistor M0 and is also connected to the gates of the MOS transistors M0 and M2. The drain of the MOS transistor M2 is connected to the drain of the MOS transistor M5 and the gates of the MOS transistors M7, M9, M8 and M1.

[0019] The drain of the MOS transistor M8 is connected to the drain of the MOS transistor M6 and the gates of the MOS transistors M5 and M6. The drain of the MOS transistor M1 is connected to the reference power supply VSS via the resistor R2.

[0020] The connection point between the drain of the MOS transistor M1 and the resistor R2 serves as an output node that outputs the reference voltage VOUT. One end of the resistors R3A and R3B is connected to this output node. The other end of the resistor R3A is connected to the collector of the first bipolar transistor Q1, and the other end of the resistor R3B is connected to the collector of the second bipolar transistor Q2.

[0021] In this control unit 20, the MOS transistors M0, M2, M8, M6, and M5 function as a current control unit that controls the first current I1 and the second current I2 based on the collector-emitter voltage Vce3 of the third bipolar transistor Q3. Specifically, when the second voltage V2 decreases and the collector-emitter voltage Vce3 of the third bipolar transistor Q3 increases, the gate-source voltage Vgs0 of the MOS transistor M0 decreases, the drain voltage of the MOS transistor M2 decreases, the gate-source voltage of the MOS transistor M8 increases, the gate-source voltage of the MOS transistor M5 increases, the drain voltage of the MOS transistor M2 further decreases, the first current I1 and the second current I2 increase, and the first voltage V1 and the second voltage V2 increase, and such control is performed.

[0022] Also, the MOS transistors M0, M2, M8, M6, M5, M1, the resistors R2, R3A, and R3B function as a circuit that controls the reference voltage VOUT based on the collector-emitter voltage Vce3 of the third bipolar transistor Q3, and feeds back the third current I3 and the fourth current I4 corresponding to this reference voltage VOUT to the first transistor Q1 and the second transistor Q2. Specifically, when the second voltage V2 decreases and the collector-emitter voltage Vce3 of the third bipolar transistor Q3 increases, the gate-source voltage Vgs0 of the MOS transistor M0 decreases, the drain voltage of the MOS transistor M2 decreases, the drain current of the MOS transistor M1 increases, and the reference voltage VOUT is determined by the current obtained by subtracting the third current I3 and the fourth current I4 from this drain current, and the third current I3 and the fourth current I4 are added to the first current I1 and the second current I2, so that the first voltage V1 and the second voltage V2 increase, and such control is performed.

[0023] Next, the operation of this embodiment will be described. In the reference voltage generation circuit 1, control is performed to make the first voltage V1 and the second voltage V2 coincide while making the current flowing through the first bipolar transistor Q1 and the current flowing through the second bipolar transistor Q2 coincide. As a result of this control, the reference voltage VOUT shown in the following equation is output from the reference voltage generation circuit 1. VOUT =(3·R2 / (R3+3·R2))·((R3·VT·In(m) / (3·R1)) +Vbe) ……(2) However, R3 = R3A = R3B, m is the size ratio of the bipolar transistors Q1 and Q2 (that is, Q1:Q2 = 1:m), VT is the thermal voltage, and Vbe is the base-emitter voltage Vbe1 of the first bipolar transistor Q1.

[0024] In the conventional technique (FIG. 2), the operational amplifier OA0 was interposed in the control to make the first voltage generated in the diode D1 and the second voltage generated in the series circuit composed of the resistor R10 and the diode D2 coincide.

[0025] On the other hand, in this embodiment, control is performed to make the first voltage V1 and the second voltage V2 coincide by current feedback described below.

[0026] Hereinafter, it is assumed that the sizes of the MOS transistors M0 to M2 and M7 to M9 are the same, and the sizes of the MOS transistors M5 and M6 are the same.

[0027] In FIG. 1, the collector voltage Vc1 (that is, the first voltage V1) of the first bipolar transistor Q1 coincides with the base-emitter voltage Vbe1 of the same bipolar transistor Q1. Therefore, the emitter current Ie1 flowing through the bipolar transistor Q1 is as shown in the following equation. Ie1 =(VT·ln(m) / R1)-((VOUT-Vbe) / R3)+Ib1+Ib2 ……(3) However, Ib1 is the base current of the first bipolar transistor Q1, and Ib2 is the base current of the second bipolar transistor Q2.

[0028] The collector voltage Vc2 of the second bipolar transistor Q2 (i.e., the second voltage V2) is equal to the base-emitter voltage Vbe3 of the bipolar transistor Q3. Therefore, the emitter current Ie2 flowing through the bipolar transistor Q2 is as shown in the following equation. Ie2 =(VT·ln(m) / R1)-((VOUT-Vbe) / R3)+Ib3 ……(4)

[0029] In the above equations (3) and (4), the base currents Ib1, Ib2, and Ib3 of the bipolar transistors Q1, Q2, and Q3 are very small. Therefore, Ie1 = Ie2, Vbe1 = Vbe2 holds, and Vc1 = Vc2 (i.e., V1 = V2). As a result, equation (2) holds with respect to the reference voltage VOUT.

[0030] Next, the mismatch variation will be described. Generally, the base-emitter voltage Vbe of a bipolar transistor has less variation compared to an operational amplifier. In particular, for a low-voltage bipolar transistor, when miniaturized, the degree of mismatch variation is lower than that of an operational amplifier. According to this embodiment, without using an operational amplifier, control is performed to match the first voltage V1 and the second voltage V2 by current feedback using the above-described third bipolar transistor Q3, so that the mismatch variation can be reduced.

[0031] Next, the operating point of the reference voltage generation circuit will be described. In the conventional reference voltage generation circuit 2 (Fig. 2) described above, the operating point of the operational amplifier OA0 is as follows. In Fig. 2, diodes D1 and D2 are bipolar transistors connected in diode connection, the base-emitter voltage of this bipolar transistor is Vbe, the overdrive voltage of MOS transistors MP1 and MP2 is Vov, and the gate-source voltage of the P-channel MOS transistor used in the differential pair of the operational amplifier OA0 is Vgs. In this case, since the power supply voltage VCC needs to satisfy the condition VCC > Vbe + Vgs + Vov, for example, when Vbe = Vgs = 0.7V and Vov = 0.1V, the lower limit of the power supply voltage VCC at which the reference voltage generation circuit can operate is 1.5V. Thus, when an operational amplifier is used in the reference voltage generation circuit, it is difficult to operate at a low voltage. To operate at a low voltage, it is necessary to combine the operational amplifier with a boosting circuit such as a charge pump circuit, and an increase in the circuit area is expected.

[0032] Also, when an N-channel MOS transistor is used instead of the P-channel MOS transistor in the differential pair of the operational amplifier OA0, it is necessary to satisfy the condition Vov > Vbe - Vgs due to the limitation of the input range of this N-channel MOS transistor. Here, when Vbe < Vgs, it is impossible to pass current through diode D1 and the MOS transistor. Also, in order to operate the reference voltage generation circuit normally at a low voltage, it is necessary to design with a process having a small Vth, but there are limitations in the process during design.

[0033] In this embodiment, when the overdrive voltages of MOS transistors M7 and M1 are Vov7 and Vov1, in order for the reference voltage generation circuit to operate normally, it is only necessary to satisfy the conditions VCC > Vbe1 + Vov7, Vce3 > VCC - Vgs0, and VCC > VOUT + Vov1. Other blocks such as a charge pump circuit are not required, and low-voltage operation is possible without depending on the process.

[0034] <Other Embodiments> Although each embodiment of the present invention has been described above, other embodiments are also conceivable for the present invention.

[0035] (1) In the above embodiment, the first current supply unit that supplies the first current I1 to the first bipolar transistor Q1 and the second current supply unit that supplies the second current I2 to the second bipolar transistor Q2 are configured by MOS transistors, but they may be configured by bipolar transistors.

[0036] (2) In the above embodiment, a P-channel MOS transistor is replaced with an N-channel MOS transistor, an N-channel MOS transistor is replaced with a P-channel MOS transistor, an NPN-type bipolar transistor is replaced with a PNP-type bipolar transistor, and the power supply VCC is replaced with a negative power supply with respect to the reference power supply VSS, thereby constituting a reference voltage generation circuit that generates a negative reference voltage.

[0037] (3) In the above embodiment, for simplicity, the configuration in the case of I1 = I2 and I3 = I4 has been described, but I1 ≠ I2 and I3 ≠ I4 may also be possible.

Explanation of Reference Numerals

[0038] Q1... First bipolar transistor, Q2... Second bipolar transistor, Q3... Third bipolar transistor, 11... First voltage generation unit, 12... Second voltage generation unit, 20... Control unit, M0~M2, M5~M9, MP1~MP3... MOS transistors, R1, R1, R3A, R3B, R10, R20, R11A, R11B... Resistors, OA0... Operational amplifier, D1, D2... Diodes.

Claims

【Claim 1】 A first bipolar transistor having a base and a collector connected and an emitter connected to a reference power supply, a first voltage generation unit that generates a first voltage; A second bipolar transistor having a base connected to the base and the collector of the first bipolar transistor and an emitter connected to the reference power supply via a resistor, a second voltage generation unit that generates a second voltage; A third bipolar transistor having a base connected to the collector of the second bipolar transistor and an emitter connected to the reference power supply, a control unit that controls the first voltage and the second voltage based on the collector-emitter voltage of the third bipolar transistor to control a reference voltage; comprising The first voltage generation unit and the second voltage generation unit each include a first current supply unit and a second current supply unit that supply a first current and a second current that are in a proportional relationship to the first bipolar transistor and the second bipolar transistor, respectively; The control unit includes a current control unit that controls the first current and the second current based on the collector-emitter voltage of the third bipolar transistor; The control unit controls the reference voltage based on the collector-emitter voltage of the third bipolar transistor, and feeds back a third current and a fourth current corresponding to the reference voltage to the first bipolar transistor and the second bipolar transistor; A reference voltage generation circuit.

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