Filter device and high-frequency front-end circuit equipped with the same

Abstract

A filter device (100) comprises: a dielectric (110) having a main surface; and a filter (FLT1) arranged on the dielectric (110). The filter (FLT1) comprises inductors (L11, L12) arranged inside of the dielectric (110). The inductor (L11) is a type 1 coil in which the normal vector direction of the main surface of the dielectric (110) is set to be a winding axis. The inductor (L12) is a type 2 coil including: plate electrodes (PL2A, PL2B) provided in the dielectric (110) and extending in a straight line; and vias (VL2A, VL2B) connected to the plate electrodes (PL2A, PL2B) and extending in the normal vector direction of the dielectric (110). When viewed in a plan view from the normal vector direction of the dielectric (110), a virtual line (CL1), which has been drawn in a direction orthogonal to the extension direction of the plate electrodes (PL2A, PL2B) from the center of the inductor (L12) in said extension direction, does not intersect the inner surface (SF) of a planar coil.

Description

[Technical field]

[0001] The present disclosure relates to a filter device and a high-frequency front-end circuit incorporating the same, and more particularly to a technique for improving robustness against manufacturing variations in an LC filter including an inductor. [Background technology]

[0002] Japanese Patent Application Laid-Open No. 2021-19304 (Patent Document 1) discloses a diplexer including a low-pass circuit and a high-pass circuit. Each of the low-pass circuit and the high-pass circuit includes an LC filter including a plurality of inductors and a plurality of capacitors arranged in a dielectric. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-19304 Summary of the Invention [Problem to be solved by the invention]

[0004] In a filter device such as a diplexer disclosed in JP 2021-19304 A (Patent Document 1), the inductors that constitute each filter are made up of a planar coil whose winding axis is in the normal direction of the dielectric, and / or a vertical coil composed of multiple vias extending in the normal direction of the dielectric and flat electrodes connecting them.

[0005] In such a filter device, if the inductors constituting each filter are displaced from their designed positions due to manufacturing variations, it may not be possible to obtain desired filter characteristics.

[0006] The present disclosure has been made to solve such problems, and has an object to improve robustness against manufacturing variations in a filter device. [Means for solving the problem]

[0007] A filter device according to a first aspect of the present disclosure includes a dielectric having a main surface, and a first filter disposed in the dielectric. The first filter includes a first inductor and a second inductor disposed within the dielectric. The first inductor is a first type coil whose winding axis is in a normal direction to the main surface of the dielectric. The second inductor includes a first flat plate electrode provided on the dielectric and extending linearly, and a via connected to the first flat plate electrode and extending in the normal direction of the dielectric. Type 2 When viewed in a plan view from the normal direction of the main surface of the dielectric, a first imaginary line drawn from the center of the extension direction of the first plate electrode in the second inductor in a direction perpendicular to the extension direction does not intersect with the inner surface of the first-type coil.

[0008] A filter device according to a second aspect of the present disclosure includes a dielectric having a main surface, and a first filter and a second filter arranged on the dielectric. The first filter has a first pass band. The second filter has a second pass band having a higher frequency than the first pass band. The first filter includes a first inductor and a second inductor arranged in the dielectric. The first inductor is a first type coil having a winding axis in a normal direction to the main surface of the dielectric. The second inductor is a second type coil including a first flat plate electrode provided on the dielectric and extending linearly, and a via connected to the first flat plate electrode and extending in the normal direction of the dielectric. When viewed in a plan view from the normal direction to the main surface of the dielectric, a virtual line drawn from the center of the extension direction of the first flat plate electrode in the second inductor in a direction perpendicular to the extension direction does not intersect with the inner surface of the first type coil. Effect of the Invention

[0009] In the filter device according to the present disclosure, the inductors are arranged so that the direction of the winding axis of the second inductor formed by a vertical coil (second type coil) does not intersect with the inner surface of the first inductor formed by a planar coil (first type coil). This suppresses magnetic coupling between the first inductor and the second inductor even if the positions of the first inductor and the second inductor are slightly shifted due to manufacturing variations. Therefore, the robustness of the filter device against manufacturing variations can be improved. [Brief description of the drawings]

[0010] [Figure 1] 1 is a block diagram of a communication device having a high-frequency front-end circuit to which a filter device according to a first embodiment is applied. [Diagram 2] 1 is an equivalent circuit diagram of a filter device according to a first embodiment. [Diagram 3] 1 is an outline view of a filter device according to a first embodiment. [Figure 4] 1 is a perspective view showing the inside of a filter device according to a first embodiment. [Diagram 5] 4 is an exploded perspective view showing an example of a detailed structure of the filter device according to the first embodiment. FIG. [Figure 6] 1A to 1C are diagrams for explaining structures of filter devices according to the first embodiment, the first modification, and a comparative example, and for explaining fluctuations in resonant frequency due to manufacturing variations. [Figure 7] FIG. 11 is a diagram for explaining evaluation points of damping characteristics. [Figure 8] 5 is a diagram for explaining attenuation characteristics in the filter devices of the first embodiment and the comparative example. FIG. [Figure 9] 5 is a diagram showing the attenuation characteristics of the filter device according to the first embodiment. FIG. [Figure 10] 11 is an equivalent circuit diagram of a filter device according to a second embodiment. FIG. [Figure 11] FIG. 11 is a plan view of a first example of an arrangement of a filter device according to a second embodiment. [Figure 12] FIG. 11 is a plan view of a second example of the arrangement of the filter device according to the second embodiment. [Figure 13] FIG. 13 is a plan view of a third example of the arrangement of the filter device according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference characters and their description will not be repeated.

[0012] [Embodiment 1] (Basic configuration of communication device) 1 is a block diagram of a communication device 10 including a high-frequency front-end circuit 20 to which a filter device 100 according to an embodiment is applied. The high-frequency front-end circuit 20 splits a high-frequency signal received by an antenna device ANT into a plurality of predetermined frequency bands and transmits the split signals to a subsequent processing circuit. The high-frequency front-end circuit 20 is used in communication devices such as mobile terminals such as mobile phones, smartphones, and tablets, and personal computers equipped with communication functions.

[0013] 1, a communication device 10 includes a high-frequency front-end circuit 20 including a filter device 100, and an RF signal processing circuit (hereinafter, also referred to as "RFIC") 30. The high-frequency front-end circuit 20 shown in Fig. 1 is a receiving system front-end circuit. The high-frequency front-end circuit 20 includes the filter device 100 and amplifier circuits LNA1 and LNA2.

[0014] The filter device 100 is a diplexer including a filter FLT1 (first filter) and a filter FLT2 (second filter) having passbands in different frequency ranges. In the following description, the filter device 100 may be referred to as a "diplexer."

[0015] The filter FLT1 is connected between the antenna terminal TA, which is a common terminal, and the first terminal T1. The filter FLT1 is a low-pass filter whose passband is the frequency range of the low band (LB) group and whose non-passband is the frequency range of the high band (HB) group. The filter FLT2 is connected between the antenna terminal TA and the second terminal T2. The filter FLT2 is a high-pass filter whose passband is the frequency range of the high band group and whose non-passband is the frequency range of the low band group. The filters FLT1 and FLT2 may be formed as band-pass filters.

[0016] Each of the filters FLT1 and FLT2 passes a high-frequency signal that corresponds to the pass band of the respective filter among the high-frequency signals received by the antenna device ANT, thereby splitting the signal received from the antenna device ANT into signals of a plurality of predetermined frequency bands.

[0017] Each of the amplifier circuits LNA1 and LNA2 is a so-called low noise amplifier. The amplifier circuits LNA1 and LNA2 amplify the high-frequency signal that has passed through the corresponding filter with low noise and transmit the amplified signal to the RFIC 30.

[0018] The RFIC 30 is an RF signal processing circuit that processes high-frequency signals transmitted and received by the antenna device ANT. Specifically, the RFIC 30 processes the high-frequency signals input from the antenna device ANT via the receiving-side signal path of the high-frequency front-end circuit 20 by down-conversion or the like, and outputs the received signals generated by the signal processing to a baseband signal processing circuit (not shown).

[0019] When the high-frequency front-end circuit 20 is used as a receiving circuit as shown in Fig. 1, in the filter device 100, the antenna terminal TA becomes the input terminal IN, and the first terminal T1 and the second terminal T2 become the first output terminal OUT1 and the second output terminal OUT2, respectively. On the other hand, the high-frequency front-end circuit can also be used as a transmitting circuit. In this case, each of the first terminal T1 and the second terminal T2 of the filter device 100 becomes an input terminal, and the antenna terminal TA becomes a common output terminal. In that case, a power amplifier is used as the amplifier included in the amplification circuit instead of a low-noise amplifier.

[0020] (Configuration of filter device) Fig. 2 is a diagram showing an example of an equivalent circuit of the filter device (diplexer) 100 in Fig. 1. As described in Fig. 1, the filter FLT1 is connected between the antenna terminal TA and the first terminal T1. Also, the filter FLT2 is connected between the antenna terminal TA and the second terminal T2.

[0021] The filter FLT1 includes inductors L11, L12 and a capacitor C12 forming a series arm circuit, and a capacitor C11 forming a parallel arm circuit. The inductor L11 is connected to the antenna terminal TA, and the inductor L12 is connected between the inductor L11 and the first terminal T1. That is, the inductors L11, L12 are connected in series between the antenna terminal TA and the first terminal T1. The capacitor C11 is connected between the connection node between the inductor L11 and the inductor L12 and the ground terminal GND. The capacitor C12 is connected in parallel to the inductor L12. With these configurations, the filter FLT1 functions as a low-pass filter that passes signals in a frequency band lower than a predetermined frequency. Note that an attenuation pole occurs near the high-frequency side of the pass band due to an LC resonant circuit formed by a parallel circuit of the capacitor C12 and the inductor L12.

[0022] The filter FLT2 includes capacitors C21 and C22 forming a series arm circuit, and inductors L21, L22 and a capacitor C23 forming a parallel arm circuit. The capacitors C21 and C22 are connected in series between the antenna terminal TA and the second terminal T2. The inductor L21 is connected between a connection node between the capacitors C21 and C22 and the ground terminal GND. One end of the inductor L22 is connected to the second terminal T2. The other end of the inductor L22 is connected to the ground terminal GND via the capacitor C23. With this configuration, the filter FLT2 functions as a high-pass filter that passes signals in a frequency band higher than a predetermined frequency.

[0023] Next, a detailed configuration of the filter device 100 will be described with reference to Fig. 3 to Fig. 5. Fig. 3 is an external view of the filter device 100 in Fig. 2, and Fig. 4 is a perspective view showing the inside of the filter device 100. Fig. 5 is an exploded perspective view showing an example of a layered structure of the filter device 100.

[0024] 3 to 5, the filter device 100 includes a rectangular or substantially rectangular parallelepiped dielectric 110 formed by stacking a plurality of dielectric layers LY1 to LY13 in a predetermined direction. In the dielectric 110, the direction in which the plurality of dielectric layers LY1 to LY13 are stacked is defined as a stacking direction. Each dielectric layer of the dielectric 110 is formed of ceramics such as low temperature co-fired ceramics (LTCC) or resin. In the dielectric 110, a plurality of electrodes provided in each dielectric layer and a plurality of vias provided between the dielectric layers form inductors and capacitors for configuring the filters FLT1 and FLT2. Note that in FIGS. 3 to 5, the dielectric of the dielectric 110 is omitted, and only the wiring pattern, vias, and terminal conductors provided therein are shown. Note that in the following description, for ease of explanation, a case in which the dielectric 110 has the above-mentioned multilayer structure will be described as an example, but the dielectric 110 may have a single-layer structure.

[0025] In this specification, the term "via" refers to a conductor formed in a dielectric layer to connect electrodes provided on different dielectric layers. The via is formed, for example, by conductive paste, plating, and / or a metal pin. In the following description, the direction in which the dielectric layers LY1 to LY13 in the dielectric 110 are stacked is referred to as the "Z-axis direction", the direction perpendicular to the Z-axis direction and along the long side of the dielectric 110 is referred to as the "X-axis direction", and the direction along the short side of the dielectric 110 is referred to as the "Y-axis direction". In the following description, the positive direction of the Z-axis in each drawing may be referred to as the upper side, and the negative direction may be referred to as the lower side.

[0026] The dielectric 110 includes an upper surface 111 (first main surface) and a lower surface 112 (second main surface). A direction mark DM for identifying the direction of the filter device 100 is arranged on the upper surface 111 (dielectric layer LY1) of the dielectric 110. As shown in FIG. 3, an antenna terminal TA, a first terminal T1, a second terminal T2, and a ground terminal GND are arranged on the lower surface 112 (dielectric layer LY13) of the dielectric 110 as external terminals for connecting the filter device 100 to an external device. Each external terminal is a flat electrode, and is an LGA (Land Grid Array) terminal regularly arranged on the lower surface 112 of the dielectric 110. As shown in FIG. 4, roughly speaking, a low-band filter FLT1 is arranged on the right side (positive direction of the X-axis) of the dielectric 110, and a high-band filter FLT2 is arranged on the left side (negative direction of the X-axis).

[0027] The antenna terminal TA arranged on the dielectric layer LY13 on the lower surface 112 is connected to a plate electrode PL1A including a branch point PB1 between the filters FLT1 and FLT2 on the dielectric layer LY2 through vias VA1 and VA2 and a plate electrode PA1. The via VA1 is connected to the antenna terminal TA and the plate electrode PA1 provided on the dielectric layer LY12. The via VA2 is connected to the plate electrode PA1 and the plate electrode PL1A.

[0028] First, the details of the filter FLT1, which is a low-pass filter, will be described. As described above, the branch point PB1 is disposed midway on the band-shaped flat plate electrode PL1A wound around the axis (Z-axis) in the lamination direction of the dielectric 110. PL1A A via VL1A is connected to one end of the plate electrode. PL1A is via VL1A 1. The plate electrode PL1B has a substantially C-shape, and the other end of the plate electrode PL1B is connected to a via VL1B. The plate electrode PL1B is connected to a capacitor electrode PC10 provided on the dielectric layer LY8 through the via VL1B. The plate electrodes PL1A, PL1B and the vias VL1A, VL1B form the inductor L11 in FIG. 2. The inductor L11 is a coil whose winding direction is in the Z-axis direction. In the following description, a coil whose winding direction is in the Z-axis direction, such as the inductor L11, is also referred to as a "planar coil."

[0029] The capacitor electrode PC10 is connected to a capacitor electrode PC12 provided on the dielectric layer LY10 by vias VC1 and VC2. When the dielectric 110 is viewed in a plan view from the stacking direction (the normal direction to the main surface), each of the capacitor electrodes PC10 and PC12 is arranged so that at least a portion of the capacitor electrodes PC10 and PC12 overlaps with a capacitor electrode PC11 provided on the dielectric layer LY9. The combined capacitance of the capacitor formed by the capacitor electrodes PC10 and PC11 and the capacitor formed by the capacitor electrodes PC11 and PC12 forms the capacitor C12 in FIG.

[0030] The capacitor electrode PC11 is connected to a plate electrode PA2 provided on the dielectric layer LY12 by a via VL2B. The plate electrode PA2 is connected to a first terminal T1 arranged on the dielectric layer LY13 on the lower surface 112 of the dielectric 110 by a via V1. The capacitor electrode PC11 is also connected to one end of a linear plate electrode PL2A provided on the dielectric layer LY2 and one end of a linear plate electrode PL2B provided on the dielectric layer LY3 by a via VL2B. The other end of each of the plate electrodes PL2A and PL2B is connected to the capacitor electrode PC10 on the dielectric layer LY8 by a via VL2A. The plate electrodes PL2A and PL2B and the vias VL2A and VL2B form the inductor L12 in FIG. 2. The inductor L12 is a coil formed of a linearly extending plate electrode and a plurality of vias, and the winding axis crosses the Z-axis direction. In the following description, a coil configured like the inductor L12 is also referred to as a "vertical coil."

[0031] It is desirable that the line length of inductor L11 is longer than that of inductor L12. In general, vertical coils have a higher Q value and smaller loss than planar coils, but are disadvantageous in obtaining a large reactance value. Therefore, by relatively shortening the line length of inductor L12, which is a vertical coil with a high Q value, and relatively lengthening the line length of inductor L11, which is a planar coil, it is possible to realize the inductance value required for filter FLT1 while maintaining a high Q value.

[0032] In addition, in the low-band filter of the diplexer, it is desirable to make the inductance value on the input side as high as possible in order to block signals on the high-band side. Therefore, in the first embodiment, an inductor L11 with a relatively large inductance value is connected to the antenna terminal TA.

[0033] Furthermore, in order to obtain a steep characteristic in the vicinity of the passband, it is desirable to make the reactance value of the vertical coil as small as possible, so it is preferable to form the inductor L12 so that the number of turns is one turn or less.

[0034] The via VC2 connecting the capacitor electrodes PC10 and PC12 is also connected to a capacitor electrode PC13 provided on the dielectric layer LY11. The capacitor electrode PC13 is arranged so as to partially overlap with a ground electrode PG1 provided on the dielectric layer LY12 when the dielectric 110 is viewed in a plan view from the stacking direction. The ground electrode PG1 is connected by a via VG1 to a ground terminal GND arranged on the dielectric layer LY13 on the lower surface 112 of the dielectric 110. The capacitor electrode PC13 and the ground electrode PG1 form a capacitor C11 in FIG. 2.

[0035] Next, the details of the filter FLT2, which is a high-pass filter, will be described. The other end of the plate electrode PL1A where the branch point PB1 is arranged is connected to a capacitor electrode PC20 provided on the dielectric layer LY4 through a via VL3. When the dielectric 110 is viewed in a plan view from the lamination direction, the capacitor electrode PC20 is arranged so as to partially overlap with a capacitor electrode PC21 provided on the dielectric layer LY3. The capacitor electrodes PC20 and PC21 form the capacitor C21 in FIG. 2.

[0036] In addition, a capacitor electrode PC22 is disposed on the dielectric layer LY4 so as to partially overlap the capacitor electrode PC21 disposed on the dielectric layer LY3 when the dielectric 110 is viewed in a plan view from the lamination direction. The capacitor electrode PC22 is connected to one end of a strip-shaped plate electrode PL5A disposed on the dielectric layer LY8 by a via VL5. The other end of the plate electrode PL5A is connected to a via VL5B, and is connected to a plate electrode PA4 disposed on the dielectric layer LY12 by the via VL5B. The plate electrode PA4 is connected to a second terminal T2 disposed on the dielectric layer LY13 on the lower surface 112 of the dielectric 110 by a via V2. The capacitor electrode PC21 and the capacitor electrode PC22 constitute the capacitor C22 in FIG. 2.

[0037] The capacitor electrode PC22 is also connected, via a via VL6A, to one end of a belt-shaped plate electrode PL6A provided on the dielectric layer LY5 and wound around the Z-axis. A via VL6B is connected to the other end of the plate electrode PL6A. The plate electrode PL6A is connected, via the via VL6B, to one end of a belt-shaped plate electrode PL6B provided on the dielectric layer LY6 and wound around the Z-axis. A via VL6C is connected to the other end of the plate electrode PL6B. The plate electrode PL6B is connected, via the via VL6C, to one end of a belt-shaped plate electrode PL6C provided on the dielectric layer LY7 and wound around the Z-axis. A via VL6D is connected to the other end of the plate electrode PL6C. The plate electrode PL6C is connected, via the via VL6D, to a capacitor electrode PC30 provided on the dielectric layer LY10. The plate electrodes PL6A to PL6C and the vias VL6A to VL6D form the inductor L22 in FIG.

[0038] The capacitor electrode PC30 is disposed so as to partially overlap with the ground electrode PG1 provided on the dielectric layer LY12 when viewed in a plan view from the stacking direction of the dielectric 110. The capacitor electrode PC30 and the ground electrode PG1 form the capacitor C23 in FIG.

[0039] The capacitor electrode PC21 is connected to one end of a belt-shaped plate electrode PL4A wound around the Z-axis and provided on the dielectric layer LY5 through a via VL4A. The other end of the plate electrode PL4A is connected to one end of a belt-shaped plate electrode PL4B provided on the dielectric layer LY6 through a via VL4B. The plate electrode PL4B has a substantially L-shape, and the other end is connected to a via VL4C. The via VL4C is connected to a plate electrode PA3 provided on the dielectric layer LY12. The plate electrode PA3 is connected to a ground terminal GND arranged on the dielectric layer LY13 on the lower surface 112 of the dielectric 110 through a via VG2. The plate electrodes PL4A, PL4B, PA3 and the vias VL4A to VL4C and VG2 form the inductor L21 in FIG. 2.

[0040] (Characteristics fluctuation due to manufacturing variations) In recent years, the increase in the frequency bands used has led to demand for diplexers with small band gaps, where the pass bands on the high and low bands are close to each other. In this case, steepness of attenuation in the non-pass bands near the pass bands is required for each band. For example, if the high band is 2.3 GHz and the low band is 2.2 GHz band In this case, a frequency margin of about 20 MHz is required for each band.

[0041] The frequency bandwidth and attenuation of each band are greatly affected by the resonant frequency of each filter that constitutes the diplexer. Therefore, in order to stably achieve the narrow band gap requirement described above, it is important to suppress the variation in the resonant frequency.

[0042] In the above-described filter device 100, the inductors L21 and L22 included in the high-band filter FLT2 are configured as planar coils with their winding axes in the Z-axis direction. Meanwhile, in the low-band filter FLT1, the inductor L11 is configured as a planar coil, and the inductor L12 is configured as a vertical coil formed of a via and a linear plate electrode.

[0043] Here, when both planar coils and vertical coils are used as inductors, as in the low-band filter FLT1, if the winding axis direction of the vertical coil faces the planar coil direction, magnetic coupling occurs between the planar coil and the vertical coil. In this case, if the positional relationship between the planar coil and the vertical coil is slightly misaligned from the design value due to the processing accuracy when forming the vias or distortion during the lamination press of the dielectric, the magnetic coupling between the two coils easily changes, resulting in a shift in the resonant frequency of the filter. This may make it impossible to achieve the desired passband width and attenuation.

[0044] Therefore, in the first embodiment, in a filter using a planar coil and a vertical coil as inductors, when the filter is viewed from above in the direction of the winding axis of the planar coil, the two coils are arranged so that the winding axis of the vertical coil (i.e., the normal direction of the imaginary plane formed by the vias and the flat electrode) does not intersect with the planar coil. In other words, the two coils are arranged so that no magnetic coupling occurs between the coils. With this configuration, since the magnetic coupling between the two coils is originally weak or does not occur, even if the positional relationship between the planar coil and the vertical coil is displaced due to manufacturing variations, the magnetic coupling is unlikely to vary. Therefore, it is possible to suppress characteristic variations caused by manufacturing variations.

[0045] Fig. 6 is a diagram for explaining the variation in the resonant frequency of the filter caused by the positional deviation of the vertical coil, with respect to the coil arrangement in the filter device 100 of the first embodiment and the filter device 100X of the comparative example. Fig. 6 shows the arrangement of each coil when the filter part on the low band side of each filter device is viewed in a plan view from the lamination direction (Z-axis direction) of the dielectric 110, and a simulation value of the variation amount of the resonant frequency when the via position of the vertical coil is shifted by 20 μm in the winding axis direction. Note that Fig. 6 also shows the case of the filter device 100A of the modified example of the first embodiment. Moreover, the configuration on the high band side of the filter device is omitted in the coil arrangement diagram of Fig. 6.

[0046] In the filter device 100 of the first embodiment, the inductor L12, which is a vertical coil, is disposed at an angle with respect to the inductor L11, which is a planar coil. More specifically, when the angle between the arrangement direction of the inductors L11 and L12 (i.e., the Y-axis direction) and the extension direction of the plate electrode PL2A constituting the inductor L12 is θ, the inductor L12 is disposed so that 0°<θ≦45°. The filter device 100A of the modified example is an example in which the inductor L12A, which is a vertical coil, is disposed so that the winding direction of the inductor L12A is the X-axis direction, that is, θ=0°. On the other hand, in the filter device 100X of the comparative example, the inductor L12X, which is a vertical coil, is disposed so that the winding axis of the inductor L12X is the Y-axis direction. That is, the comparative example is an example in which θ=90°.

[0047] In the diagrams of the coil arrangements in each example, the arrows AR1, AR2, and AR3 indicate the direction of the winding axis of the inductors L12, L12A, and L12X, which are vertical coils. In the filter device 100X of the comparative example, a virtual line CL3 drawn in a direction perpendicular to the extending direction of the flat electrode of the inductor L12X (i.e., the winding axis direction) intersects with the inductor L11. On the other hand, in the filter devices 100 and 100A, the virtual lines CL1 and CL2 drawn in the winding axis direction of the inductors L12 and L12A do not intersect with the inner surface SF1 of the inductor L11 and the main body of the inductor L11. The "inner surface" of the inductor L11 refers to the surface of the coil-shaped inductor L11 on the air-core side. The extending direction of each of the virtual lines CL1, CL2, and CL3 is a direction perpendicular to the direction connecting the two vias from the center between the two vias connected to the linearly extending flat electrode of each inductor.

[0048] In this configuration, the amount of change in the resonant frequency when the via position is moved by 20 μm in the winding axis direction of the vertical coil (i.e., the directions of the arrows AR1, AR2, and AR3) is 15 MHz in the filter device 100X of the comparative example, but is reduced to 3 MHz in the filter device 100 of the first embodiment and to 5 MHz in the filter device 100A of the modified example. Note that in the filter device 100A of the modified example, the distance between the inductor L11 and the inductor L12A is shorter than in the filter device 100 of the first embodiment, and therefore the degree of magnetic coupling is greater than in the filter device 100, and it is considered that the effect on the amount of change is also greater.

[0049] Next, the attenuation characteristics of the filter devices of the first embodiment and the comparative example will be described with reference to Fig. 7 and Fig. 8. Fig. 7 is a diagram for explaining evaluation points of the attenuation characteristics. Fig. 8 is a diagram showing the frequency variation (standard deviation σ) of the above evaluation points within a manufacturing lot of the filter devices of the first embodiment and the comparative example. Each lot contains 30 pieces.

[0050] In Fig. 7, the solid line LN10 indicates the insertion loss of the low-band (LB) filter, and the dashed line LN11 indicates the insertion loss of the high-band (HB) filter. As evaluation points, the point where the insertion loss in the non-passband becomes 3 dB is indicated by "fc", and the position of the attenuation pole is indicated by "fr".

[0051] 8, on the low-band side, the variation in fc in the filter device 100 of the first embodiment is 2.9 MHz, and the variation in fr is 5.7 MHz. On the other hand, the variation in fc in the filter device 100X of the comparative example is 4.7 MHz, and the variation in fr is 8.7 MHz. Therefore, in the first embodiment, the variation in fc is reduced by 38% and the variation in fr is reduced by 34% compared to the comparative example.

[0052] Also, on the high-band side, the variation of fc in the filter device 100 of the first embodiment is 2.8 MHz, and the variation of fr is 4.9 MHz. On the other hand, the variation of fc in the filter device 100X of the comparative example is 4.6 MHz, and the variation of fr is 5.1 MHz. Therefore, the variation of fc in the first embodiment is reduced by 38% compared to the comparative example, but the variation of fr is reduced by about 5%. Basically, the influence of the positional deviation of the vertical coil on the low-band side on the filter characteristics on the high-band side is almost not felt. However, for example, when the fc and fr characteristics on the low-band side fluctuate to the high frequency side, the attenuation on the high-band side is deteriorated, and the amount of the signal on the high-band side leaking to the low-band side increases. Then, the current flowing to the high-band side is reduced, and the fc on the high-band side fluctuates. Therefore, it is considered that the variation of the fc characteristics on the high-band side is also reduced as the characteristic variation on the low-band side is suppressed.

[0053] Fig. 9 is a diagram showing the attenuation characteristics of the filter device 100 of the first embodiment. In Fig. 9, a solid line LN20 indicates the insertion loss of the low-band filter FLT1, and a dashed line LN21 indicates the insertion loss of the high-band filter FLT2. As shown in Fig. 9, the low-band filter FLT1 has a larger attenuation amount at the attenuation pole than the high-band filter, and achieves steeper attenuation characteristics.

[0054] As described above, in a filter device equipped with a filter including a planar coil and a vertical coil as inductors, by arranging the vertical coil so that the imaginary line drawn in the winding axis direction does not intersect at least the inner surface of the planar coil, it is possible to reduce the characteristic variation caused by the positional deviation of the vertical coil, thereby improving the robustness against manufacturing variations.

[0055] In the above description, a case where a planar coil and a vertical coil are used in combination in the low-band filter FLT1 has been described. However, the features of the present disclosure can also be applied to a case where a planar coil and a vertical coil are used in combination in the high-band filter FLT2.

[0056] The "filter FLT1" and the "filter FLT2" in the present embodiment 1 correspond to the "first filter" and the "second filter" in this disclosure, respectively. The "inductor L11" and the "inductor L12" in the present embodiment 1 correspond to the "first inductor" and the "second inductor" in this disclosure, respectively. The "plate electrodes PL2A, PL2B" in the present embodiment 1 correspond to the "first plate electrode" in this disclosure. The "planar coil" and the "vertical coil" in the present embodiment 1 correspond to the "first type coil" and the "second type coil" in this disclosure, respectively.

[0057] [Embodiment 2] In the first embodiment, the inductor arrangement is described when the low-band filter of the diplexer includes two inductors. In the second embodiment, the case where the low-band filter includes three inductors is described.

[0058] Fig. 10 is an equivalent circuit diagram of a filter device 100B according to the second embodiment. In the filter device 100B, the low-band filter FLT1 in the filter device 100 according to the first embodiment shown in Fig. 2 is replaced with a filter FLT1A. The filter FLT1A further includes an inductor L13 and a capacitor C13 in addition to the configuration of the filter FLT1 according to the first embodiment. Note that, in the filter device 100B in Fig. 10, description of the elements that overlap with those of the filter device 100 in Fig. 2 will not be repeated.

[0059] 10, in the filter FLT1A, an inductor L13 is connected in series between the inductor L11 and the inductor L12 in the filter FLT1, and a capacitor C13 is disposed between the connection node between the inductor L12 and the inductor L13 and the ground terminal GND.

[0060] In this way, even in a configuration including three inductors, in order to suppress the variation in characteristics due to manufacturing variance, it is necessary to suppress the magnetic coupling between the inductors, as in the description of the first embodiment. Therefore, in the filter FLT1A, among the three inductors, the inductors L12 and L13 are formed as vertical coils, and the inductor L11 is formed as a planar coil. Then, when the filter device is viewed from above, the inductors L12 and L13 are arranged so that the winding axes of the inductors L12 and L13, which are vertical coils, do not intersect with the inner surface of the inductor L11, which is a planar coil. Furthermore, the inductors L12 and L13 are arranged so that the winding axes of the inductors L12 and L13 do not intersect with the other inductor.

[0061] By arranging the inductors in the filter FLT1A in this manner, even if manufacturing variations occur, it is possible to suppress fluctuations in the filter characteristics of the filter FLT1A.

[0062] Hereinafter, examples of the arrangement of inductors in the low-band filter FLT1A included in the filter device according to the second embodiment will be described with reference to FIGS.

[0063] (Example 1) Fig. 11 is a plan view of the coil arrangement in the filter FLT1A of the filter device 100B according to the first example of the embodiment 2. In Fig. 11, the region of the filter FLT1A in the dielectric 110 is rectangular, and three inductors, inductors L12, L11, and L13, are arranged in this order along the Y-axis direction of the long side of the region. The inductor L11 is a planar coil, and the inductors L12 and L13 are vertical coils.

[0064] The inductor L12 is arranged so that 0°≦θ≦45° with respect to the arrangement direction of the inductors (Y-axis direction) similarly to the filter FLT1 in embodiment 1. Moreover, a virtual line CL1 drawn in the winding direction (arrow AR10) of the inductor L11 does not intersect with the inner surface SF1 and main body of the inductor L11, nor with the inductor L13.

[0065] Similarly to the inductor L12, the inductor L13 is also arranged so that θ is 0°≦θ≦45° with respect to the arrangement direction of the inductors. A virtual line CL4 drawn in the winding direction (arrow AR11) of the inductor L13 intersects the inner surface SF1 and the main body of the inductor L11, and the inductor L12 It does not intersect with.

[0066] In this way, even if the filter includes two vertical coils and one planar coil as inductors, robustness against misalignment of the vertical coil can be increased by ensuring that the winding axis of the vertical coil does not intersect with the planar coil.

[0067] (Example 2) Fig. 12 is a plan view of the coil arrangement in a filter FLT1A of a filter device 100B1 according to a second example of embodiment 2. In the filter device 100B1, similarly to the filter device 100B of Fig. 11, the region of the filter FLT1A in the dielectric 110 is rectangular, and three inductors, inductors L12, L11, and L13A, are arranged in this order along the Y-axis direction of the long side of the region. The inductor L11 is a planar coil, and the inductors L12 and L13A are vertical coils.

[0068] In the filter device 100B1, the inductors L11 and L12 are arranged in the same manner as in Fig. 11. The inductor L13A is arranged at a position obtained by rotating the inductor L13 in Fig. 11 by 90° around the normal line (Z-axis) of the dielectric 110.

[0069] In this case as well, the imaginary line CL4A drawn in the winding direction (arrow AR12) of the inductor L13A corresponds to the inner surface SF1 and the main body of the inductor L11, and the inductor L12 In addition, an imaginary line CL1 drawn in the winding direction (arrow AR10) of inductor L11 does not intersect with the inner surface SF1 and main body of inductor L11, nor with inductor L13A.

[0070] In the filter device 100B1 having the coil arrangement as in the second example, robustness against misalignment of the vertical coil can also be improved by preventing the direction of the winding axis of the vertical coil from intersecting with the planar coil.

[0071] (Example 3) 13 is a plan view of the coil arrangement in a filter FLT1A of a filter device 100B2 according to a third example of embodiment 2. In the filter device 100B2, the region of the filter FLT1A in the dielectric 110 has a substantially L-shape, and the inductor L13B is arranged with respect to the inductor L11 in a direction (X-axis direction) perpendicular to the arrangement direction (Y-axis direction) of the inductors L12 and L11.

[0072] A virtual line CL4B drawn in the winding direction of inductor L13B (arrow AR13) does not intersect with the inner surface SF1 and main body of inductor L11, nor with inductor L12. A virtual line CL1 drawn in the winding direction of inductor L12 (arrow AR10) does not intersect with the inner surface SF1 and main body of inductor L11, nor with inductor L13B.

[0073] In the filter device 100B2 having the coil arrangement as in the third example, robustness against misalignment of the vertical coil can also be improved by preventing the direction of the winding axis of the vertical coil from intersecting with the planar coil.

[0074] 13, the virtual line CL1 of the inductor L12 does not intersect with the inductor L13B, but the virtual line CL1 may intersect with the inductor L13B as long as the virtual line CL4B of the inductor L13B does not overlap with the inductor L11. In this case, although the effect of the characteristic variation is somewhat reduced, the magnetic coupling between the planar coil and the vertical coil is suppressed, so that a certain degree of effect of reducing the variation can be obtained.

[0075] Each of the "inductors L13, L13C, and L13D" in the second embodiment corresponds to a "third inductor" in this disclosure.

[0076] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present invention is defined by the claims, not by the description of the embodiments described above, and is intended to include all modifications within the scope and meaning equivalent to the claims. [Explanation of symbols]

[0077] 10 communication device, 20 high frequency front-end circuit, 30 RFIC, 100, 100A, 100B, 100B1, 100B2, 100X filter device, 110 dielectric, 111 upper surface, 112 lower surface, ANT antenna device, C11 to C13, C21 to C23 capacitor, DM directional mark, FLT1, FLT1A, FLT2 filter, GND ground terminal, IN input terminal, V1, V2, VA1, VA2, VC1, VC2, VG1, VG2, VL1, VL1A, VL1B, VL2A, VL2B, VL3, VL4A to VL4C, VL5, VL5B, VL6A to VL6D Via, L11, L12, L12A, L12X, L13, L13A to L13D, L21, L22 inductors, LNA1, LNA2 amplifier circuit, LY1 to LY13 dielectric layer, OUT1, OUT2 output terminal, PA1 to PA4, PL1, PL1A, PL1B, PL2A, PL2B, PL4A, PL4B, PL5A, PL6A to PL6C plate electrodes, PB1 branch point, PC10 to PC13, PC20 to PC22, PC30 capacitor electrodes, PG1 ground electrode, SF1 inner surface, T1 first terminal, T2 second terminal, TA antenna terminal.

Claims

1. A dielectric having a main surface, and a first filter disposed on the dielectric, wherein the first filter includes a first inductor and a second inductor disposed in the dielectric, the first inductor is a first-type coil having a winding axis in the normal direction of the main surface of the dielectric, the second inductor includes a first flat plate electrode provided on the dielectric and extending linearly, and a via connected to the first flat plate electrode and extending in the normal direction of the dielectric, and is a second-type coil having a winding axis in a direction intersecting the normal direction of the dielectric, when viewed in plan from the normal direction of the dielectric, the first inductor and the second inductor are disposed adjacent to each other in a first direction, from the center in the extending direction of the first flat plate electrode in the second inductor, a first virtual line drawn in the direction of the winding axis of the second inductor does not intersect the inner surface of the first-type coil, a filter device, wherein the extending direction of the first flat plate electrode is inclined with respect to the first direction in the dielectric.

2. The filter device according to claim 1, wherein the first virtual line does not intersect the first inductor when viewed in plan from the normal direction of the dielectric.

3. The filter device according to claim 1 or claim 2, wherein the extending direction of the first flat plate electrode is greater than 0° and 45° or less with respect to the first direction.

4. The filter device according to claim 1 or claim 2, wherein the line length of the first inductor is longer than the line length of the second inductor.

5. The filter device according to claim 1 or claim 2, wherein the number of turns of the second inductor is 1 turn or less.

6. The first filter further includes an input terminal and an output terminal disposed on the dielectric, In the first filter, the first inductor and the second inductor are arranged in this order along the signal path from the input terminal to the output terminal. The filter device according to claim 1 or claim 2.

7. The first filter further includes a third inductor disposed in the dielectric, the third inductor is the second-type coil including a second flat plate electrode provided on the dielectric and extending linearly, and a via connected to the second flat plate electrode and extending in the normal direction of the dielectric. When viewed in plan view from the normal direction of the dielectric, a second imaginary line drawn from the center in the extending direction of the second flat electrode in the third inductor in the direction of the winding axis of the third inductor does not intersect the inner surface of the first type coil. The filter device according to claim 1 or claim 2.

8. The first imaginary line does not intersect the third inductor. The filter device according to claim 7.

9. The first filter further includes input and output terminals disposed on the dielectric. In the first filter, the second inductor, the first inductor, and the third inductor are arranged in this order along the signal path from the input terminal to the output terminal. The filter device according to claim 7.

10. The first filter is a low-pass filter or a band-pass filter. The filter device according to claim 1 or claim 2.

11. The filter device further includes a second filter disposed on the dielectric. The frequency of the passband in the second filter is higher than the frequency of the passband in the first filter. The filter device according to claim 1 or claim 2.

12. The second filter is a high-pass filter or a band-pass filter. The filter device according to claim 11.

13. A dielectric having a main surface, A first filter disposed on the dielectric and having a first passband, A second filter disposed on the dielectric and having a second passband at a frequency higher than the first passband, The first filter includes a first inductor and a second inductor disposed in the dielectric. The first inductor is a first type coil having the normal direction of the main surface of the dielectric as a winding axis. The second inductor includes a first flat electrode provided on the dielectric and extending linearly, and a via connected to the first flat electrode and extending in the normal direction of the dielectric. It is a second type coil having a direction intersecting the normal direction of the dielectric as a winding axis. When viewed in plan view from the normal direction of the dielectric, The first inductor and the second inductor are arranged adjacent to each other in a first direction. In the second inductor, a virtual line drawn from the center in the extending direction of the first flat electrode in the direction of the winding axis of the second inductor does not intersect the inner surface of the first type coil. A filter device in which the extending direction of the first flat electrode is arranged to be inclined with respect to the first direction in the dielectric.

14. A high-frequency front-end circuit including the filter device according to claim 1 or claim 13.

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