Method for manufacturing a stacked device chip
The method addresses the issue of foreign substance adhesion in stacked device chips by forming grooves and resin layers in wafers, resulting in chips with resin-covered side surfaces that prevent adhesion, enhancing manufacturing efficiency and chip integrity.
Patent Information
- Application Number
- JP2021069658
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-04-16
- Publication Date
- 2025-06-03
- Estimated Expiration
- 2041-04-16
AI Technical Summary
When forming laminated device chips by stacking device chips in the thickness direction, gaps are formed between adjacent chips, leading to the adhesion of foreign substances like insulators or metals to the side surfaces of the chips, requiring a subsequent step for removal.
A method involving the formation of grooves and resin layers in wafers, followed by thinning and bonding to create stacked device chips with resin-covered side surfaces, thereby preventing foreign substance adhesion.
The method effectively suppresses the adhesion of foreign substances to the side surfaces of the laminated device chips, simplifying the manufacturing process by eliminating the need for additional cleaning steps and ensuring the integrity of the stacked device chips.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to a method for manufacturing a stacked device chip having a structure in which a plurality of device chips are stacked.
Background Art
[0002] In electronic devices typified by mobile phones and personal computers, a device chip including a device such as an electronic circuit is an essential component. A device chip is obtained, for example, by partitioning the surface of a wafer made of a semiconductor material such as silicon into a plurality of regions by division planned lines (streets), forming a device in each region, and then dividing the wafer along the division planned lines.
[0003] In recent years, in order to achieve further miniaturization and high density of device chips, a technique called Wafer On Wafer in which a plurality of wafers on which devices are formed are stacked and bonded in the thickness direction has been put into practical use (see, for example, Patent Document 1). After forming a stacked wafer by stacking a plurality of wafers, a stacked device chip having a structure in which a plurality of device chips are stacked can be obtained by dividing the stacked wafer along the division planned lines.
[0004] By the way, when the wafer used for Wafer On Wafer becomes thin, the wafer is likely to be damaged when the stacked wafer is cut and divided into stacked device chips. Therefore, a method has been considered in which a groove is formed from the surface side in the division planned line of the wafer, the surface of the wafer is attached to a support, and then the wafer is ground to expose the groove on the back side, thereby thinning the wafer while dividing it into a plurality of device chips (see, for example, Patent Document 2).
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
[0006] After obtaining a device chip supported on a support by the above method, for example, a laminated device chip can be formed by stacking another device chip obtained by the same method thereon. However, when forming a laminated device chip by stacking device chips in the thickness direction by this method, a gap is formed between two adjacent laminated device chips.
[0007] Therefore, for example, when attempting to form a film made of an insulator, an electrode made of a metal, etc. on the laminated device chip obtained by this method, foreign substances made of an insulator or a metal also adhere to the side surfaces of the laminated device chips facing the gap. Therefore, when adopting the above method, a step of removing the foreign substances adhering to the laminated device chip was required later.
[0008] The present invention has been made in view of such problems, and an object thereof is to provide a new method for manufacturing a laminated device chip capable of suppressing the adhesion of foreign substances to the side surfaces of the laminated device chip. [Means for Solving the Problems]
[0009] According to one aspect of the present invention, there is provided a method for manufacturing a stacked device chip having a structure in which a plurality of device chips are stacked, using a wafer in which devices are provided in respective regions of a surface partitioned by a plurality of planned division lines. The method includes: a first groove forming step of forming a first groove having a depth corresponding to the finished thickness of a first device chip obtained by dividing a first wafer from the surface of the first wafer along the plurality of planned division lines of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; a second groove forming step of forming a second groove having a depth corresponding to the finished thickness of a second device chip obtained by dividing a second wafer from the surface of the second wafer along the plurality of planned division lines of the second wafer; a second resin layer forming step of forming a second resin layer in the second groove of the second wafer; a fixing step of fixing the front surface side of the first wafer to a plate-shaped first support; a first wafer processing step of thinning the first wafer fixed to the first support from the back surface side to a thickness corresponding to the finished thickness of the first device chip to expose the first resin layer provided in the first groove on the back surface side of the first wafer; a bonding step of bonding the back surface side of the first wafer and the front surface side of the second wafer so that the first resin layer exposed on the back surface side of the first wafer and the second resin layer provided in the second groove of the second wafer overlap when viewed from a direction perpendicular to the back surface of the first wafer; a second wafer processing step of thinning the second wafer bonded to the first wafer from the back surface side to a thickness corresponding to the finished thickness of the second device chip to expose the second resin layer provided in the second groove on the back surface side of the second wafer; A through electrode forming step of forming a through electrode that connects the device on the first wafer and the device on the second wafer bonded to the first wafer; a resin layer cutting step of cutting the first resin layer along the first groove and cutting the second resin layer along the second groove to manufacture a stacked device chip having a structure in which the first device chip having its side surface covered with the first resin layer and the second device chip having its side surface covered with the second resin layer are stacked, and includes Note that in the through electrode forming step, the through electrode is formed so as to penetrate at least the second device chip. A method for manufacturing a stacked device chip is provided.
[0010] According to another aspect of the present invention, there is provided a method for manufacturing a stacked device chip having a structure in which a plurality of device chips are stacked, using a wafer in which devices are provided in respective regions of a surface partitioned by a plurality of planned division lines. The method includes: a first groove forming step of forming a first groove having a depth corresponding to the finished thickness of a first device chip obtained by dividing a first wafer, along the plurality of planned division lines of the first wafer, from the surface of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; a first fixing step of fixing the surface side of the first wafer to a plate-like first support; a first wafer processing step of thinning the first wafer fixed to the first support from the back side to a thickness corresponding to the finished thickness of the first device chip, to expose the first resin layer provided in the first groove on the back side of the first wafer; a second groove forming step of forming a second groove having a depth corresponding to the finished thickness of a second device chip obtained by dividing a second wafer, along the plurality of planned division lines of the second wafer, from the surface of the second wafer; a second resin layer forming step of forming a second resin layer in the second groove of the second wafer; a second fixing step of fixing the surface side of the second wafer to a plate-like second support; a second wafer processing step of thinning the second wafer fixed to the second support from the back side to a thickness corresponding to the finished thickness of the second device chip, to expose the second resin layer provided in the second groove on the back side of the second wafer; a bonding step of bonding the back side of the first wafer and the surface side of the second wafer so that the first resin layer exposed on the back side of the first wafer and the second resin layer exposed on the surface side of the second wafer overlap when viewed from a direction perpendicular to the back surface of the first wafer, after separating the second support from the second wafer; and a resin layer cutting step of cutting the first resin layer along the first groove and cutting the second resin layer along the second groove, to manufacture a stacked device chip having a structure in which a first device chip having a side surface covered with the first resin layer and a second device chip having a side surface covered with the second resin layer are stacked.
[0011] According to still another aspect of the present invention, there is provided a method for manufacturing a stacked device chip having a structure in which a plurality of device chips are stacked, using a wafer in which devices are provided in respective regions of a surface partitioned by a plurality of division planned lines. The method includes: a first groove forming step of forming a first groove having a depth corresponding to the finished thickness of a first device chip obtained by dividing a first wafer, along the plurality of division planned lines of the first wafer, from the surface of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; a first fixing step of fixing the front surface side of the first wafer to a plate-like first support; a first wafer processing step of thinning the first wafer fixed to the first support from the back surface side to a thickness corresponding to the finished thickness of the first device chip, to expose the first resin layer provided in the first groove on the back surface side of the first wafer; a second groove forming step of forming a second groove having a depth corresponding to the finished thickness of a second device chip obtained by dividing a second wafer, along the plurality of division planned lines of the second wafer, from the surface of the second wafer; a second resin layer forming step of forming a second resin layer in the second groove of the second wafer; a second fixing step of fixing the front surface side of the second wafer to a plate-like second support; a second wafer processing step of thinning the second wafer fixed to the second support from the back surface side to a thickness corresponding to the finished thickness of the second device chip, to expose the second resin layer provided in the second groove on the back surface side of the second wafer; a bonding step of bonding the back surface side of the first wafer and the back surface side of the second wafer so that the first resin layer exposed on the back surface side of the first wafer and the second resin layer exposed on the back surface side of the second wafer overlap when viewed from a direction perpendicular to the back surface of the first wafer; and a resin layer cutting step of separating the second support from the second wafer and then cutting the first resin layer along the first groove and cutting the second resin layer along the second groove, to manufacture a stacked device chip having a structure in which a first device chip having its side surface covered with the first resin layer and a second device chip having its side surface covered with the second resin layer are stacked.
[0012] Preferably, the method further includes a through electrode forming step of forming a through electrode that connects the device on the first wafer and the device on the second wafer bonded to the first wafer. Further preferably, in the resin layer cutting step, after separating the first support from the first wafer, the first resin layer is cut along the first groove, and the second resin layer is cut along the second groove.
Advantages of the Invention
[0013] In the method for manufacturing a stacked device chip according to each aspect of the present invention, a first groove having a depth corresponding to the finished thickness of the first device chip is formed in the first wafer, and a first resin layer is formed in the first groove. Also, a second groove having a depth corresponding to the finished thickness of the second device chip is formed in the second wafer, and a second resin layer is formed in the second groove.
[0014] Therefore, the side surface of the first device chip obtained from the first wafer and the side surface of the second device chip obtained from the second wafer are each covered with the first resin layer and the second resin layer. That is, the side surface of the stacked device chip having a structure in which the first device chip and the second device chip are stacked is also covered with the first resin layer and the second resin layer. Thereby, adhesion of foreign matter to the side surface of the stacked device chip can be suppressed.
[0015] Further, when the first wafer becomes as thin as the finished thickness of the first device chip and the second wafer becomes as thin as the finished thickness of the second device chip, the first wafer is divided into the first device chips, and the second wafer is divided into the second device chips. Therefore, the stacked device chip can be completed only by cutting the first resin layer along the first groove and cutting the second resin layer along the second groove. That is, when cutting the stacked device chip, the first wafer and the second wafer are not damaged.
Brief Description of the Drawings
[0016]
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DETAILED DESCRIPTION OF THE INVENTION
[0017] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a perspective view schematically showing a first wafer 11 used in a method for manufacturing a laminated device chip according to this embodiment, and FIG. 2 is a cross-sectional view schematically showing the first wafer 11. Note that in FIGS. 1 and 2, only the first wafer 11 among a plurality of wafers used in this embodiment is illustrated, but the structure of the second wafer 31 (see FIG. 8) used in this embodiment is the same.
[0018] As shown in FIGS. 1 and 2, the first wafer 11 is configured in a disk shape using a semiconductor such as silicon (Si), for example, and has a generally circular front surface 11a and back surface 11b. The front surface 11a side of the first wafer 11 is partitioned into a plurality of small regions by a plurality of division planned lines (streets) 13 that intersect each other, and a device 15 such as an IC (Integrated Circuit) is provided in each small region.
[0019] Note that in this embodiment, a disk-shaped first wafer 11 made of a semiconductor such as silicon is used, but there are no restrictions on the material, shape, structure, size, etc. of the first wafer 11. For example, a substrate made of other materials such as semiconductors, ceramics, resins, and metals can also be used as the first wafer 11. Similarly, there are no restrictions on the type, quantity, shape, structure, size, arrangement, etc. of the device 15.
[0020] In the method for manufacturing a laminated device chip according to this embodiment, for example, along the plurality of division planned lines 13 of the first wafer 11, a first groove having a depth corresponding to the finished thickness of the first device chip obtained by dividing the first wafer 11 is formed from the front surface 11a of the first wafer 11 (first groove forming step). FIG. 3 is a cross-sectional view schematically showing the first wafer 11 in which the first groove 17 is formed.
[0021] When forming the first groove 17, for example, an annular (disk-shaped) cutting blade (cutting tool) obtained by fixing abrasive grains such as diamond with a binder such as resin is used. Specifically, this cutting blade is rotated (spun) around a generally horizontal rotation axis, and while cutting into the first wafer 11, the cutting blade and the first wafer 11 are relatively moved along the division planned line 13. Note that a processing liquid such as pure water is supplied to the processing point where the first wafer 11 and the cutting blade come into contact.
[0022] In the present embodiment, the cutting blade is cut into the first wafer 11 to a depth slightly exceeding the finished thickness of the first device chip obtained by dividing the first wafer 11. Thereby, the first wafer 11 is cut from the surface 11a, and the first groove 17 having a depth slightly exceeding the finished thickness of the first device chip can be formed.
[0023] However, there is no particular limitation on the method for forming the first groove 17. For example, the first groove 17 can also be formed in the first wafer 11 by a method called so-called ablation processing using a laser beam having a wavelength absorbed by the first wafer 11. Further, the first groove 17 may be formed in the first wafer 11 by etching using a gas (including plasma) or a liquid having high reactivity with respect to the first wafer 11. Furthermore, the first groove 17 can be formed in the first wafer 11 by arbitrarily combining these methods.
[0024] After the first groove 17 is formed in all the division planned lines 13, a liquid material is filled into the first groove 17 to form a first resin layer (first resin layer forming step). FIG. 4 is a cross-sectional view schematically showing the first wafer 11 in which the first resin layer 19 is provided in the first groove 17. When filling the liquid material into the first groove 17, for example, methods such as spin coating, spray coating, screen printing, dip coating, and inkjet are used. Of course, the first groove 17 may be filled with a liquid material by other methods.
[0025] As the liquid material filled in the first groove 17, it is desirable to use a material having a certain high heat resistance and a thermal expansion coefficient (typically, a linear expansion coefficient) close to that of the first wafer 11. For example, when the first wafer 11 is made of silicon, benzocyclobutene (BCB) used for bonding wafers in wafer-on-wafer or a material for a molding resin used in a fan-out package may be used.
[0026] However, the liquid material filled in the first groove 17 is not limited to these. After filling the liquid material in the first groove 17, the liquid material is cured by a method such as heating, drying, or light irradiation. Thereby, a first resin layer 19 covering the side surface and the bottom surface of the first groove 17 is formed in the first groove 17 of the first wafer 11.
[0027] In the present embodiment, a second groove 37 (see FIG. 8) and a second resin layer 39 (see FIG. 8) are also formed in a second wafer 31 different from the first wafer 11 by the same method as the method described above. That is, along a plurality of planned division lines (streets) of the second wafer 31, a second groove 37 having a depth corresponding to the finished thickness of the second device chip obtained by dividing the second wafer 31 is formed from the surface 31a of the second wafer 31 (second groove forming step).
[0028] In the present embodiment, the second wafer 31 is cut from the surface 31a to form a second groove 37 having a depth slightly exceeding the finished thickness of the second device chip. Further, a liquid material is filled in the second groove 37 to form a second resin layer 39 (second resin layer forming step). The liquid material filled in the second groove 37 is the same as the liquid material filled in the first groove 17. That is, it is desirable to use a material having a certain high heat resistance and a thermal expansion coefficient (typically, a linear expansion coefficient) close to that of the second wafer 31.
[0029] Note that the formation of the first groove 17 (first groove formation step), the formation of the first resin layer 19 (first resin layer formation step), the formation of the second groove 37 (second groove formation step), and the formation of the second resin layer 39 (second resin layer formation step) can be performed at any timing and in any order that does not cause a contradiction in the series of steps according to this embodiment.
[0030] For example, after forming the second groove 37 and the second resin layer 39 on the second wafer 31, the first groove 17 and the first resin layer 19 can be formed on the first wafer 11. Also, the formation of the first groove 17 and the first resin layer 19 and the formation of the second groove 37 and the second resin layer 39 may be performed in parallel.
[0031] After forming the first groove 17 and the first resin layer 19 on the first wafer 11, the surface 11a side of this first wafer 11 is fixed to a plate-shaped first support (fixing step). FIG. 5 is a cross-sectional view showing a state where the first wafer 11 is fixed to the plate-shaped first support 21, and FIG. 6 is a cross-sectional view schematically showing the first support 21 and the first wafer 11 fixed to the first support 21.
[0032] The first support 21 is typically a substrate made of resin, a substrate made of glass, a wafer of the same or different type as the first wafer 11, etc., and is configured to have a size capable of supporting the first wafer 11. Specifically, the first support 21 has a front surface 21a and a back surface 21b having the same size as or larger than the front surface 11a of the first wafer 11.
[0033] When fixing the surface 11a side of the first wafer 11 to the first support 21, for example, as shown in FIG. 5, an adhesive layer (temporary adhesive layer) 23 containing an adhesive showing an adhesive force is provided on the front surface 21a of the first support 21. As the adhesive layer 23, a liquid material whose adhesive force decreases by light such as ultraviolet rays or heat is used so that the completed laminated device chip can be appropriately separated from the first support 21.
[0034] However, the adhesive layer 23 used when fixing the first wafer 11 is not limited to this. For example, in the case of manufacturing a finished product (chip) including the first support 21 and the stacked device chip by cutting the first support 21 according to the stacked device chip, a material with a long-term adhesive force that is difficult to decrease may be used as the adhesive layer 23.
[0035] By bringing the surface 11a side of the first wafer 11 into close contact with the adhesive layer 23 provided on the surface 21a of the first support 21, as shown in FIG. 6, the first wafer 11 is fixed to the first support 21. Thereafter, the adhesive layer 23 may be cured by a method such as heating, drying, or light irradiation. Note that this adhesive layer 23 may be provided on the side of the first wafer 11 instead of the side of the first support 21.
[0036] After the first wafer 11 is fixed to the first support 21, the first wafer 11 is thinned from the back surface 11b side to a thickness corresponding to the finished thickness of the first device chip, and the first resin layer 19 provided in the first groove 17 is exposed on the back surface side of the first wafer 11 (first wafer processing step). FIG. 7 is a cross-sectional view schematically showing the first support 21 and the thinned first wafer 11.
[0037] When thinning the first wafer 11, for example, an annular (disk-shaped) grinding wheel (grinding tool) provided with a grinding stone obtained by fixing abrasive grains such as diamond with a binder such as resin is used on the lower surface side. Specifically, while rotating (spinning) the grinding wheel and the first wafer 11 (first support 21) around a substantially vertical rotation axis, the grinding wheel is lowered and the grinding stone is pressed against the back surface 11b of the first wafer 11. Note that a processing liquid such as pure water is supplied to the processing point where the first wafer 11 and the grinding stone come into contact.
[0038] In this embodiment, the lower surface of the grinding wheel is lowered to a position corresponding to the height of the finished thickness of the first device chip 25 obtained by dividing the first wafer 11 (the position corresponding to the back surface 25a of the first device chip 25). As a result, the first wafer 11 can be ground from the back surface 11b side and thinned to a thickness corresponding to the finished thickness of the first device chip 25.
[0039] As a result, as shown in FIG. 7, the bottom of the first groove 17 is removed, and the first resin layer 19 provided in the first groove 17 is exposed on the back surface side of the first wafer 11 (the back surface 25a side of the first device chip 25). That is, the first wafer 11 is divided into a plurality of first device chips 25 along the first groove 17 formed in the division planned line 13.
[0040] Note that there is no particular limitation on the method of thinning the first wafer 11. For example, the first wafer 11 can also be thinned by polishing using a polishing pad (polishing tool) made of a resin such as foamed polyurethane or a non-woven fabric. The first wafer 11 may be thinned by etching using a gas (including plasma) or a liquid having a high reactivity with respect to the first wafer 11. Further, the first wafer 11 may be thinned by arbitrarily combining these methods.
[0041] After the first wafer 11 is thinned, the surface 31a side of the second wafer 31 in a state where the second resin layer 39 is provided is bonded to the back surface side of the first wafer 11 (the back surface 25a side of the first device chip 25) (bonding step). FIG. 8 is a cross-sectional view schematically showing a state where the second wafer 31 is bonded to the first wafer 11, and FIG. 9 is a cross-sectional view schematically showing the first support 21, the first wafer 11, and the second wafer 31 bonded to the first wafer 11.
[0042] When bonding the surface 31a side of the second wafer 31 to the back side of the first wafer 11, as shown in FIG. 8, an adhesive layer 27 containing an adhesive showing adhesive force is provided on the back surface of the first wafer 11. As the adhesive layer 27, for example, a liquid material containing an adhesive such as benzocyclobutene (BCB), which is difficult to reduce adhesive force over a long period of time, is used.
[0043] However, the adhesive layer 27 used for bonding the first wafer 11 and the second wafer 31 is not limited to this. By bringing the surface 31a side of the second wafer 31 into close contact with the adhesive layer 27 provided on the back surface (the back surface 25a side of the first device chip 25) of the first wafer 11, as shown in FIG. 9, the first wafer 11 and the second wafer 31 are bonded together.
[0044] Specifically, the first resin layer 19 exposed on the back side of the first wafer 11 and the second resin layer 39 provided in the second groove 37 of the second wafer 31 are overlapped when viewed from a direction perpendicular to the back surface of the first wafer 11, and the back side of the first wafer 11 and the surface 31a side of the second wafer 31 are bonded together.
[0045] That is, the back side of the first wafer 11 and the surface 31a side of the second wafer 31 are bonded together so that the device 35 of the second wafer 31 overlaps the back surface 25a of the first device chip 25. After that, the adhesive layer 27 may be cured by methods such as heating, drying, or light irradiation. Note that this adhesive layer 27 may be provided on the second wafer 31 side instead of the first wafer 11 side.
[0046] Also, the first wafer 11 and the second wafer 31 may be bonded together without using the adhesive layer 27 containing the adhesive as described above. For example, a thin oxide film is formed on the back side of the first wafer 11 and the surface 31a side of the second wafer 31, and the first wafer 11 and the second wafer 31 can be bonded together by bringing these oxide films into contact with each other and joining them. Note that after joining the oxide films, the joining may be strengthened by methods such as heating.
[0047] After the surface 31a side of the second wafer 31 is bonded to the back side of the first wafer 11, the second wafer 31 is thinned from the back side 31b to a thickness corresponding to the finished thickness of the second device chip, and the second resin layer 39 provided in the second groove 37 is exposed on the back side of the second wafer 31 (second wafer processing step). FIG. 10 is a cross-sectional view schematically showing the first support 21, the first wafer 11, and the thinned second wafer 31.
[0048] The method of thinning the second wafer 31 is the same as the method of thinning the first wafer 11. That is, methods such as grinding using a grinding wheel (grinding tool), polishing using a polishing pad (polishing tool), or etching using a gas (including plasma) or liquid having high reactivity with respect to the second wafer 31 are used.
[0049] In this embodiment, similar to the case of the first wafer 11, the second wafer 31 is ground and thinned to a thickness corresponding to the finished thickness of the second device chip 45 obtained by dividing the second wafer 31. As a result, as shown in FIG. 10, the bottom of the second groove 37 is removed, and the second resin layer 39 provided in the second groove 37 is exposed on the back side of the second wafer 31 (the back side 45a side of the second device chip 45). That is, the second wafer 31 is divided into a plurality of second device chips 45 along the second groove 37 formed in the planned division line.
[0050] After the second wafer 31 is thinned, a through electrode is formed to connect the device 15 of the first wafer 11 (first device chip 25) and the device 35 of the second wafer 31 (second device chip 45) bonded to the first wafer 11 (through electrode forming step). FIG. 11 is a cross-sectional view schematically showing the first support 21, the first wafer 11 and the second wafer 31 on which the through electrode 47 is formed.
[0051] When forming the through electrode 47 that connects the device 15 and the device 35, first, from the back surface 45a side of the second device chip 45, a through hole is formed in the planned formation area of the through electrode 47, which penetrates at least the second device chip 45 and reaches the device 15 of the first device chip 25. There is no particular limitation on the method of forming the through hole, but for example, a method such as etching using a mask obtained by photolithography may be used.
[0052] After forming the through hole that reaches the device 15, a through electrode 47 that connects the device 15 and the device 35 is formed in this through hole. There is no particular limitation on the method of forming the through electrode 47, but for example, methods such as plating, sputtering, and CVD (Chemical Vapor Deposition) may be used to fill the through hole with the conductive metal that constitutes the through electrode 47.
[0053] In this embodiment, by providing the first resin layer 19 in the first groove 17 of the first wafer 11, the side surface of the first device chip 25 obtained by dividing the first wafer 11 is covered with the first resin layer 19. Similarly, by providing the second resin layer 39 in the second groove 37 of the second wafer 31, the side surface of the second device chip 45 obtained by dividing the second wafer 31 is covered with the second resin layer 39. Therefore, when forming the through electrode 47, foreign substances made of metal do not adhere to the side surfaces of the first device chip 25 and the second device chip 45.
[0054] After forming the through electrode 47, the first resin layer 19 is cut along the first groove 17, and the second resin layer 39 is cut along the second groove 37 to manufacture a stacked device chip having a structure in which the first device chip 25 and the second device chip 45 are stacked (resin layer cutting step). FIG. 12 is a cross-sectional view schematically showing the first support 21 and a plurality of stacked device chips 51.
[0055] When cutting the first resin layer 19 and the second resin layer 39, for example, an annular (disk-shaped) cutting blade (cutting tool) obtained by fixing abrasive grains such as diamond with a binder such as resin is used. However, the width of this cutting blade is narrower than the width of the cutting blade used when forming the first groove 17 and the second groove 37.
[0056] Specifically, this cutting blade is rotated (spun) around a generally horizontal rotation axis, and while cutting into the first resin layer 19 and the second resin layer 39, the first wafer 11 and the second wafer 31 and the cutting blade are relatively moved along the first groove 17 and the second groove 37. Note that a processing fluid such as pure water is supplied to the processing point where the first resin layer 19 and the second resin layer 39 come into contact with the cutting blade.
[0057] In the present embodiment, the cutting blade is cut into the first resin layer 19 and the second resin layer 39 so as not to process the side surfaces of the first device chip 25 and the second device chip 45, and so that the first resin layer 19 and the second resin layer 39 can be completely cut. Thereby, a kerf 49 for cutting the first resin layer 19 and the second resin layer 39 is formed, and a laminated device chip 51 having a structure in which the first device chip 25 whose side surface is covered with the first resin layer 19 and the second device chip 45 whose side surface is covered with the second resin layer 39 are overlapped can be manufactured.
[0058] However, there is no particular limitation on the method of cutting the first resin layer 19 and the second resin layer 39. For example, the first resin layer 19 and the second resin layer 39 can also be cut by a method called so-called ablation processing using a laser beam having a wavelength absorbed by the first resin layer 19 and the second resin layer 39. After cutting the first resin layer 19 and the second resin layer 39, it is preferable to reduce the adhesive force of the adhesive layer 23 and separate the laminated device chip 51 from the first support 21.
[0059] As described above, in the method for manufacturing a stacked device chip according to the present embodiment, after forming the first groove 17 having a depth corresponding to the finished thickness of the first device chip 25 in the first wafer 11, the first resin layer 19 is formed in the first groove 17. Further, after forming the second groove 37 having a depth corresponding to the finished thickness of the second device chip 45 in the second wafer 31, the second resin layer 39 is formed in the second groove 37.
[0060] Therefore, the side surface of the first device chip 25 obtained from the first wafer 11 and the side surface of the second device chip 45 obtained from the second wafer 31 are each covered with the first resin layer 19 and the second resin layer 39. That is, the side surface of the stacked device chip 51 having a structure in which the first device chip 25 and the second device chip 45 are stacked is also covered with the first resin layer 19 and the second resin layer 39. Thereby, adhesion of foreign matter to the side surface of the stacked device chip 51 can be suppressed.
[0061] Further, when the first wafer 11 is thinned to the finished thickness of the first device chip 25 and the second wafer 31 is thinned to the finished thickness of the second device chip 45, the first wafer 11 is divided into the first device chip 25, and the second wafer 31 is divided into the second device chip 45. Therefore, the stacked device chip 51 can be completed only by cutting the first resin layer 19 along the first groove 17 and cutting the second resin layer 39 along the second groove 37. That is, when cutting the stacked device chip 51, the first wafer 11 and the second wafer 31 are not damaged.
[0062] Note that the present invention is not limited to the description of the above-described embodiments and can be implemented with various modifications. For example, in the above-described embodiments, the second wafer 31 before being thinly processed is bonded to the first wafer 11, but the second wafer 31 may be bonded to the first wafer 11 after being thinly processed. In this modification, the surface 31a side of the second wafer 31 provided with the second resin layer 39 is fixed to a second support (not shown) (second fixing step) in the same procedure as when the surface 11a side of the first wafer 11 is fixed to the first support 21 (first fixing step).
[0063] After the first wafer 11 is fixed to the first support 21, the first wafer 11 is thinned from the back surface 11b side to a thickness corresponding to the finished thickness of the first device chip 25, and the first resin layer 19 provided in the first groove 17 is exposed on the back surface side of the first wafer 11 (first wafer processing step).
[0064] And after the second wafer 31 is fixed to the second support, the second wafer 31 is thinned from the back surface 31b side to a thickness corresponding to the finished thickness of the second device chip 45, and the second resin layer 39 provided in the second groove 37 is exposed on the back surface side of the second wafer 31 (second wafer processing step).
[0065] After the first wafer 11 and the second wafer 31 are thinned, for example, after separating the second support from the second wafer 31, the back surface side of the first wafer 11 and the surface 31a side of the second wafer 31 are bonded together (bonding step). More specifically, the back surface side of the first wafer 11 and the surface 31a side of the second wafer 31 are bonded together so that the first resin layer 19 exposed on the back surface side of the first wafer 11 and the second resin layer 39 exposed on the surface 31a side of the second wafer 31 overlap when viewed from a direction perpendicular to the back surface of the first wafer 11.
[0066] When separating the second support from the second wafer 31, it is advisable to attach a dicing tape to the back side of the second wafer 31 and support the second wafer 31 via the dicing tape. The adhesive layer used for bonding the first wafer 11 and the second wafer 31 is the same as the adhesive layer 27 in the above-described embodiment.
[0067] After bonding the first wafer 11 and the second wafer 31 together, a through electrode is formed as necessary (through electrode formation step). Then, by cutting the first resin layer 19 along the first groove 17 and cutting the second resin layer 39 along the second groove 37, a stacked device chip having a structure in which the first device chip 25 and the second device chip 45 are stacked is manufactured (resin layer cutting step).
[0068] Note that in this modification, after thinning the first wafer 11 and the second wafer 31, the second support is separated from the second wafer 31, and then the back side of the first wafer 11 and the front surface 31a side of the second wafer 31 are bonded together. However, the first wafer 11 and the second wafer 31 may be bonded together without separating the second support from the second wafer 31.
[0069] In this case, the first resin layer 19 exposed on the back side of the first wafer 11 and the second resin layer 39 exposed on the back side of the second wafer 31 are bonded together so that they overlap when viewed from a direction perpendicular to the back surface of the first wafer 11 (bonding step).
[0070] Then, after separating the second support from the second wafer 31, the first resin layer 19 may be cut along the first groove 17 and the second resin layer 39 may be cut along the second groove 37 (resin layer cutting step). Also in this case, a stacked device chip having a structure in which the first device chip 25 with its side surface covered by the first resin layer 19 and the second device chip 45 with its side surface covered by the second resin layer 39 are stacked can be obtained.
[0071] Also, in the above-described embodiments and modifications, the first resin layer 19 and the second resin layer 39 are cut while the first wafer 11 (and the second wafer 31) is fixed to the first support 21. However, the first resin layer 19 and the second resin layer 39 may be cut after separating the first support 21 from the first wafer 11.
[0072] Also, in the above-described embodiments and modifications, the through electrode 47 for connecting the device 15 and the device 35 is formed, but this through electrode 47 does not necessarily have to be formed. For example, when an electrode or the like for connecting the device 15 and the device 35 is provided in advance, the process of forming the through electrode 47 can be omitted.
[0073] Also, in the above-described embodiments and modifications, a stacked device chip having a structure in which two device chips are stacked is formed by bonding two wafers. However, a stacked device chip having a structure in which three or more device chips are stacked can also be formed by bonding three or more wafers in the same manner.
[0074] In addition, the structures, methods, etc. according to the above-described embodiments and modifications can be appropriately changed and implemented without departing from the scope of the object of the present invention.
Explanation of Reference Numerals
[0075] 11: First wafer 11a: Front surface 11b: Back surface 13: Scheduled division line 15: Device 17: First groove 19: First resin layer 21: First support 21a: Front surface 21b: Back surface 23: Adhesive layer 25: First device chip 25a: Back surface 27: Adhesive layer 31: Second wafer 31a: Front surface 31b: Back surface 35: Device 37: Second groove 39: Second resin layer 45: Second device chip 45a: Back surface 47: Through electrode 49: Kerf 51: Stacked device chip
Claims
1. A method for manufacturing a stacked device chip having a structure in which a plurality of device chips are stacked, using a wafer in which devices are provided in respective regions of a surface partitioned by a plurality of planned division lines, comprising: a first groove forming step of forming a first groove having a depth corresponding to the finished thickness of a first device chip obtained by dividing the first wafer, from the surface of the first wafer along the plurality of planned division lines of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; a second groove forming step of forming a second groove having a depth corresponding to the finished thickness of a second device chip obtained by dividing the second wafer, from the surface of the second wafer along the plurality of planned division lines of the second wafer; a second resin layer forming step of forming a second resin layer in the second groove of the second wafer; a fixing step of fixing the front surface side of the first wafer to a plate-shaped first support; a first wafer processing step of thinning the first wafer fixed to the first support from the back surface side to a thickness corresponding to the finished thickness of the first device chip, and exposing the first resin layer provided in the first groove on the back surface side of the first wafer; a bonding step of bonding the back surface side of the first wafer and the front surface side of the second wafer so that the first resin layer exposed on the back surface side of the first wafer and the second resin layer provided in the second groove of the second wafer overlap when viewed from a direction perpendicular to the back surface of the first wafer; a second wafer processing step of thinning the second wafer bonded to the first wafer from the back surface side to a thickness corresponding to the finished thickness of the second device chip, and exposing the second resin layer provided in the second groove on the back surface side of the second wafer; a through electrode forming step of forming a through electrode for connecting the device of the first wafer and the device of the second wafer bonded to the first wafer; a resin layer cutting step of cutting the first resin layer along the first groove and cutting the second resin layer along the second groove, to manufacture a stacked device chip having a structure in which a first device chip whose side surface is covered with the first resin layer and a second device chip whose side surface is covered with the second resin layer are stacked. A method for manufacturing a stacked device chip in which a through electrode is formed so as to penetrate at least the second device chip. **Claim 2** A method for manufacturing a stacked device chip having a structure in which a plurality of device chips are stacked, using a wafer in which devices are provided in respective regions of a surface partitioned by a plurality of planned division lines, a first groove forming step of forming a first groove having a depth corresponding to the finished thickness of a first device chip obtained by dividing the first wafer, from the surface of the first wafer along the plurality of planned division lines of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; a first fixing step of fixing the front surface side of the first wafer to a plate-shaped first support; a first wafer processing step of thinning the first wafer fixed to the first support from the back surface side to a thickness corresponding to the finished thickness of the first device chip, and exposing the first resin layer provided in the first groove on the back surface side of the first wafer; a second groove forming step of forming a second groove having a depth corresponding to the finished thickness of a second device chip obtained by dividing the second wafer, from the surface of the second wafer along the plurality of planned division lines of the second wafer; a second resin layer forming step of forming a second resin layer in the second groove of the second wafer; a second fixing step of fixing the front surface side of the second wafer to a plate-shaped second support; a second wafer processing step of thinning the second wafer fixed to the second support from the back surface side to a thickness corresponding to the finished thickness of the second device chip, and exposing the second resin layer provided in the second groove on the back surface side of the second wafer; a bonding step of bonding the back surface side of the first wafer and the front surface side of the second wafer so that the first resin layer exposed on the back surface side of the first wafer and the second resin layer exposed on the front surface side of the second wafer overlap when viewed from a direction perpendicular to the back surface of the first wafer, after separating the second support from the second wafer. By cutting the first resin layer along the first groove and cutting the second resin layer along the second groove, a resin layer cutting step of manufacturing a laminated device chip having a structure in which a first device chip whose side surface is covered with the first resin layer and a second device chip whose side surface is covered with the second resin layer are overlapped, and a method of manufacturing a laminated device chip including the same.
3. A method of manufacturing a laminated device chip having a structure in which a plurality of device chips are overlapped, using a wafer in which devices are provided in each of a plurality of regions on the surface partitioned by a plurality of division planned lines, A first groove forming step of forming a first groove having a depth corresponding to the finished thickness of the first device chip obtained by dividing the first wafer from the surface of the first wafer along a plurality of division planned lines of the first wafer; A first resin layer forming step of forming a first resin layer in the first groove of the first wafer; A first fixing step of fixing the front surface side of the first wafer to a plate-shaped first support; A first wafer processing step of thinning the first wafer fixed to the first support from the back surface side to a thickness corresponding to the finished thickness of the first device chip, and exposing the first resin layer provided in the first groove to the back surface side of the first wafer; A second groove forming step of forming a second groove having a depth corresponding to the finished thickness of the second device chip obtained by dividing the second wafer from the surface of the second wafer along a plurality of division planned lines of the second wafer; A second resin layer forming step of forming a second resin layer in the second groove of the second wafer; A second fixing step of fixing the front surface side of the second wafer to a plate-shaped second support; A second wafer processing step of thinning the second wafer fixed to the second support from the back surface side to a thickness corresponding to the finished thickness of the second device chip, and exposing the second resin layer provided in the second groove to the back surface side of the second wafer; A bonding step of bonding the back surface side of the first wafer and the back surface side of the second wafer so that the first resin layer exposed on the back surface side of the first wafer and the second resin layer exposed on the back surface side of the second wafer overlap when viewed from a direction perpendicular to the back surface of the first wafer. After separating the second support from the second wafer, the first resin layer is cut along the first groove, and the second resin layer is cut along the second groove, thereby manufacturing a laminated device chip having a structure in which a first device chip whose side surface is covered with the first resin layer and a second device chip whose side surface is covered with the second resin layer are stacked, and a resin layer cutting step. A method for manufacturing a laminated device chip including:
4. The method for manufacturing a laminated device chip according to claim 2 or claim 3, further comprising a through electrode forming step of forming a through electrode connecting a device on the first wafer and a device on the second wafer bonded to the first wafer.
5. In the resin layer cutting step, the method for manufacturing a laminated device chip according to any one of claims 1 to 4, wherein after separating the first support from the first wafer, the first resin layer is cut along the first groove, and the second resin layer is cut along the second groove.
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