Power converter

Abstract

To provide a power converter capable of generating an interpolation pulse that suppresses current waveform distortion as much as possible with a low computational load.SOLUTION: Converters 5 connected in parallel drive a motor 4 by generating pulses and outputting them to the motor 4. On the basis of control information output from a control unit 11, a pulse generation unit 12 generates a multiplexed pulse for multiplexing n converters 5. An interpolator 12b generates an interpolated multiplexed pulse Pu that interpolates between multiple multiplexed pulses output to the n converters 5.SELECTED DRAWING: Figure 21

Description

Technical Field

[0001] The present invention relates to a power converter.

Background Art

[0002] As this type of technology, a power generation device for a hybrid vehicle has been proposed (see, for example, Patent Document 1). The power generation device described in Patent Document 1 connects a multi-phase converter to each phase of a permanent magnet synchronous motor and connects the multi-phase converters connected to each phase in parallel. Each multi-phase converter outputs a sinusoidal voltage by driving while changing the phase, thereby reducing the output current ripple.

[0003] Generally, by increasing the number of parallel-connected converters, the output current ripple can be reduced. However, when the current command value becomes small, the period becomes short, and the pulse width for driving the converter also becomes short.

[0004] According to the technology described in Patent Document 1, the slave phase of the m-th phase (where m ≥ 2) operates following the master phase of the first phase. However, when generating interpolation pulses, even if the on-time of the interpolation pulses becomes long temporarily, it causes distortion of the current waveform. Also, since calculations are required for each of the master phase and the slave phase, the amount of calculation increases and it becomes difficult to generate interpolation pulses.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] An object of the present invention is to provide a power converter capable of generating interpolation pulses that suppress distortion of the current waveform as much as possible with a low calculation load.

Means for Solving the Problem

[0007] The invention according to claim 1 is directed to a power converter including two or more n converters connected in parallel. When the control unit outputs control information corresponding to an input current command value, the pulse generation unit generates multiple pulses so as to operate the n converters of the power converter in a multiple operation based on the control information output by the control unit. The interpolation unit generates interpolation multiple pulses for interpolating between a plurality of multiple pulses output to the n converters when operating the converters in a multiple operation simultaneously, so that distortion of the current waveform can be suppressed as much as possible. The converter is composed of a plurality of switches to which a power supply voltage is input. The pulse operation unit includes a pulse width counter that defines the time of the pulse width of the multi-pulse, a start phase counter that measures based on the point in time when counting starts by the pulse width counter and measures the phase within a time shorter than the pulse width measured by the pulse width counter and measures the start phase, which is the timing to turn on any one of the switches of the converter, as the start phase, and an end phase counter that measures based on the point in time when counting ends by the pulse width counter and measures the phase within a time shorter than the pulse width measured by the pulse width counter and measures the end phase, which is the timing to turn off the turned-on switch, as the end phase. By starting to output a pulse at the start phase of the start phase counter and stopping the output of the pulse at the end phase of the end phase counter, multi-pulses having the same pulse width and different start and end phases are generated. According to the invention described in claim 2, the pulse operation unit includes a start phase counter that measures the start phase at which each pulse of the multi-pulse starts to be output, and a multi-pulse width counter that measures based on the start phase measured by the start phase counter and measures the pulse width of each pulse of the multi-pulse. Each time the start phase counter measures the start phase, multi-pulses are generated with each pulse width measured by the multi-pulse width counter. According to the invention described in claim 5, the pulse generation unit generates a first multi-pulse according to a first current command value as the command value, and generates a second multi-pulse according to a second current command value following the first current command value. When the interpolation unit generates an interpolation multi-pulse between the first multi-pulse and the second multi-pulse, the interpolation unit calculates the width of the interpolation multi-pulse and the phase difference between the interpolation multi-pulses based on the first multi-pulse and the second multi-pulse.

[0008] Claim 6 According to the described invention, soft switching is continued by switching on the power switch constituting the converter at the timing detected by the zero current detection unit, and the total current flowing through the n converters is shared by 1 / n respectively, and the drive current of the converter is equalized by driving with a phase difference of T / n from each other. Since the phase difference T / n is calculated and the total current flowing through the n converters is shared by 1 / n respectively, the calculation amount can be reduced as much as possible.

Brief Description of the Drawings

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Mode for Carrying Out the Invention

[0010] Hereinafter, several embodiments will be described with reference to the drawings. For the same or similar components in a plurality of embodiments, the same or similar reference numerals may be given and the description may be omitted.

[0011] (First Embodiment) The first embodiment will be described with reference to FIGS. 1 to 12. As illustrated in FIG. 1, a three-phase inverter 3 as a power converter is connected to a battery 2. The battery 2 is a storage battery such as a nickel-metal hydride battery or a lithium battery. A motor 4 is connected to the three-phase inverter 3. The motor 4 is, for example, a power generation device that drives the wheels of a hybrid vehicle, and a permanent magnet synchronous motor (PMSM) is exemplified.

[0012] A multi-phase converter 6u, 6v, 6w for a plurality of phases of the U-phase, V-phase, and W-phase is provided in the three-phase inverter 3. The three-phase inverter 3 is composed of multi-phase converters 6u, 6v, 6w in which converter units 5u, 5v, 5w serving as basic units are connected in multiple parallel by two or more n.

[0013] In FIG. 1, subscripts "1 to n" are attached to the symbols of the converters 5u, 5v, and 5w that are basic units for illustration. In the following description, any one or a single one of the converters 5u1, 5u2, 5u3... 5un, 5v1, 5v2, 5v3... 5vn, 5w1, 5w2, 5w3... 5wn may be simply abbreviated as converter 5. Also, the converters 5u1, 5v1, 5w1 through which the current flowing through the inductor (hereinafter, inductor current I L ) is to be detected may be referred to as "converters 5 of the master phase". An example of the configuration of converter 5 is shown in FIG. 3.

[0014] For example, the U-phase multi-phase converter 6u distributes the total current flowing through n converters 5 equally at 1 / n and drives them with a phase difference of T / n from each other, thereby equalizing the drive currents of the converters 5u1... 5un. Since the output currents of the converters 5u1... 5un are combined, current ripples can be canceled out, and thus, it is configured to output a desired current waveform, here, a sine-wave current. The same applies to the V-phase and W-phase multi-phase converters 6v and 6w.

[0015] As shown in FIG. 3, each of the above-mentioned individual converters 5 includes an upper-arm switch SW1, a lower-arm switch SW2, an inductor L, and a capacitor C in the illustrated form, and is constituted by a step-down non-inverting buck converter that converts the voltage of the battery 2 as desired.

[0016] The upper-arm switch SW1 and the lower-arm switch SW2 are configured as power switches such as N-channel power MOSFETs, and freewheeling diodes D1 and D2 are connected between the drain and the source, respectively, to commutate the load current. In the following description, both the upper-arm switch SW1 and the lower-arm switch SW2, or one of them may be referred to as a "power switch".

[0017] The control system 1 according to this embodiment is configured such that a control device 10 is connected to a three-phase inverter 3, and control is executed mainly by the control device 10 shown in FIG. 1. The control device 10 is constituted by a computer including a plurality of cores and memories 37 (volatile and non-volatile), and functionally includes a control unit 11 and a pulse generation unit 12. The memory 37 is used as a holding unit that holds various data as a non-transitory tangible storage medium. A voltage sensor 13 is installed in the battery 2, and the detected voltage of the voltage sensor 13 is input to the control unit 11.

[0018] In addition, current sensors 14 are provided in the energization paths of the inductors L that constitute the converters 5u1, 5v1, and 5w1 serving as the master phases of each of the U, V, and W phases. The control unit 11 inputs the inductor current I L detected by the current sensor 14. Also, a voltage sensor 15 is provided to detect the output voltage Vout of the capacitor C, and the detected voltage by the voltage sensor 15 is input to the control unit 11.

[0019] The control unit 11 inputs the current command value Io calculated according to the required torque as a command value, and outputs control information corresponding to the current command value Io to the pulse generation unit 12. Note that the update period of the current command value Io is set to a sufficiently short time compared to the period of the AC frequency, and the current command value Io that changes at the AC frequency can be set finely.

[0020] Also, current sensors 16 are provided to detect the phase currents Iu, Iv, and Iw to be input to the motor 4, and the detected currents by the current sensors 16 are input to the control unit 11. Also, the control unit 11 inputs the angle θ of the rotor by means of a rotation position sensor 4a such as a resolver installed in the motor 4, and calculates information on the angular velocity ω. The control unit 11 outputs this information to the pulse generation unit 12 as feedback control information.

[0021] Based on the control information input from the control unit 11, the pulse generation unit 12 generates multi-pulses (multi-phase pulses) so as to multiplexly operate 3×n converters 5 of the three-phase inverter 3.

[0022] As functionally exemplified in FIG. 2, the pulse generation unit 12 has a functional configuration as a gate drive unit 21, a zero current detection unit 22, and a pulse calculation unit 23. As shown in FIG. 3, the pulse calculation unit 23 includes a counter 24 including a pulse width counter 24a, a start phase counter 24b, an end phase counter 24c, and the like.

[0023] The pulse calculation unit 23 calculates each parameter of the on-time Ton, off-time Toff, period T, and phase difference Td between multiple pulses input to a plurality of converters 5 of the same phase (for example, U phase) of the multi-phase converters 6u, 6v, 6w of each phase when each converter 5 operates in the current boundary mode.

[0024] The current boundary mode indicates a mode in which the on / off of the upper arm switch SW1 and the lower arm switch SW2 is switched on the condition that it is detected that the inductor current IL becomes zero. Each parameter of the on-time Ton, off-time Toff, period T, and phase difference Td is set identically among the multiple pulses input to each converter 5 of the multi-phase converter (for example, 6u) of the same phase.

[0025] The gate drive unit 21 drives the three-phase inverter 3 based on the calculation result of the pulse calculation unit 23. The gate drive unit 21 on / off drives the upper arm switch SW1 or the lower arm switch SW2 based on the on-time Ton, period T, and phase difference Td calculated by the pulse calculation unit 23.

[0026] In the present embodiment, for example, when the current command value Io of a certain phase, for example, the U phase, exceeds 0, the gate drive unit 21 on / off drives the upper arm switch SW1 while holding the lower arm switch SW2 of each converter 5 constituting the multi-phase converter 6u in the off state. When the upper arm switch SW1 is turned on, the capacitor C is charged while gradually increasing the inductor current I L from the battery 2 through the upper arm switch SW1.

[0027] After the on-time Ton has elapsed, the gate drive unit 21 drives the upper arm switch SW1 to turn off. Even when the upper arm switch SW1 turns off, the inductor current I flows through the freewheeling diode D2 attached to the lower arm switch SW2. L continues to flow.

[0028] The inductor current I L gradually decreases, but the zero current detection unit 22 detects the timing when the inductor current I L becomes zero. When the inductor current I L becomes zero, the gate drive unit 21 turns on the upper arm switch SW1 again. As long as the current command value Io exceeds 0, this operation is repeated. Each converter 5 operates in a current boundary mode in which the upper arm switch SW1 is turned on on the condition that the zero current detection unit 22 detects that the inductor current I L has been detected as zero.

[0029] Conversely, when the current command value Io is less than 0, the gate drive unit 21 drives the lower arm switch SW2 to turn on and off while keeping the upper arm switch SW1 off. When the lower arm switch SW2 turns on, the inductor current I L is discharged from the capacitor C while gradually decreasing. After the on-time Ton has elapsed, the gate drive unit 21 drives the lower arm switch SW2 to turn off. Even when the lower arm switch SW2 turns off, the inductor current I L continues to flow through the freewheeling diode D1 connected to the upper arm switch SW1.

[0030] The inductor current I L gradually increases, but the zero current detection unit 22 detects the timing when the inductor current I L becomes zero. When the inductor current I L becomes zero, the gate drive unit 21 turns on the lower arm switch SW2 again. As long as the current command value Io is below 0, this operation is repeated. Each converter 5 operates in a current boundary mode in which the lower arm switch SW2 is turned on on the condition that the zero current detection unit 22 detects that the inductor current I LIt operates in a current boundary mode that turns on the lower arm switch SW2 on the condition that zero is detected.

[0031] Fig. 4 shows an example of waveforms when the number of multiple operations n = 4, the period is T, and the phase difference Td is T / n. When the inductor current I L gradually increases and then gradually decreases, the inductor L will be energized with the inductor current I L in a triangular wave shape.

[0032] The control device 10 outputs control information to the pulse generation unit 12 while gradually changing the current command values Io of each phase of UVW sinusoidally based on the aforementioned feedback information. The pulse generation unit 12 changes each parameter (on time Ton, off time Toff, period T, phase difference Td) of the multiple pulses as illustrated in Fig. 4.

[0033] Each converter 5 can energize each phase of the motor 4 while superimposing the output currents of each converter 5 by a factor of n by energizing the phase currents Iu, Iv, Iw to the motor 4 with the same phase difference Td = T / n. Thereby, the phase currents Iu, Iv, Iw can be controlled to the desired current command value Io, here the current command value Io that changes sinusoidally.

[0034] The maximum output of each phase current Iu, Iv, Iw is determined to be smaller than the inductor saturation current and satisfy the heat generation requirements of the three-phase inverter 3. It is advisable to determine the number of multiple operations n based on the upper limit that satisfies the maximum output. Also, the frequency corresponding to the period T of the multiple pulses is preferably set higher than the audible frequency.

[0035] The larger the number of multiple operations n, the higher the current ripple cancellation effect. Therefore, it is desirable to make it as large as possible. However, if the number of multiple operations n is made too large, it will complicate the control by the control device 10. Therefore, it is advisable to determine the number of multiple operations n according to the processing capacity based on the resources of the control device 10.

[0036] Hereinafter, the processing operations related to the multi-phase converters 6u, 6v, and 6w of each phase will be described in detail with reference to the flowchart. Since the operations of each of the UVW phases are generally the same, the processing operation of the multi-phase converter 6u of the U phase will be described, and the description of the processing operations of the multi-phase converters 6v and 6w of the V and W phases will be omitted.

[0037] As shown in the processing steps of the first-stage converter 5u1 in FIG. 5, on the condition that the zero-current detection unit 22 detects the timing at which the inductor current I L becomes zero at S1 and S2, the gate drive unit 21 turns on the upper-arm switch SW1 or the lower-arm switch SW2 at S3 or S4. At this time, based on the value of the current command value Io at S2, the pulse calculation unit 23 determines whether to turn on the upper-arm switch SW1 or the lower-arm switch SW2.

[0038] If the current command value I o exceeds zero, the gate drive unit 21 turns on the upper-arm switch SW1 at S3. If the current command value I o is less than zero, the gate drive unit 21 turns on the lower-arm switch SW2 at S4.

[0039] When driving the converter 5u1, the pulse calculation unit 23 calculates the on-time Ton for continuously turning on the power switch SW1 or SW2 of each converter 5, and the phase difference Td between the multiple pulses applied to each converter 5.

[0040] Assuming that the current command value of the phase current Iu is Io and the multiplicity of the converter 5 is n, the average current I of the converter 5 is I = Io / n. In this control system 1, since the inductor current I L repeats gradual increase or gradual decrease with zero as the boundary, the peak current I L of the inductor current I Lp is twice the average current I = 2I.

[0041] When the current command value Io > 0, the pulse calculation unit 23 calculates the on-time Ton and off-time Toff of the upper arm switch SW1, as well as the period T and phase difference Td, based on the following equations (1-1) to (1-4), respectively.

Equation

[0042] When the current command value Io < 0, the pulse calculation unit 23 calculates the on-time Ton and off-time Toff of the lower arm switch SW2, as well as the period T and phase difference Td, based on the following equations (2-1) to (2-4), respectively.

Equation

[0043] The pulse generation unit 12 generates pulses for driving the upper arm switch SW1 and the lower arm switch SW2, and the gate drive unit 21 turns on the upper arm switch SW1 or the lower arm switch SW2 at S3 and S4.

[0044] Fig. 6 shows an example of pulse generation for starting the converters 5 from the first multiple to the nth multiple. The pulse width counter 24a measures the on-time Ton by setting the counter value to a predetermined value and counting down on the condition that the inductor current I L is detected as zero by the zero current detection unit 22.

[0045] When the on-time Ton has elapsed, the pulse calculation unit 23 determines YES at S5 in Fig. 5 and turns off the power switch SW1 or SW2 that is on at S6. As a result, the power switch SW1 or SW2 can be continuously turned on for the on-time Ton.

[0046] Also, the pulse operation unit 23 of the pulse generation unit 12 operates the start phase counter 24b simultaneously with the pulse width counter 24a. The start phase counter 24b indicates a counter for measuring the start timing of the pulses to be input to the second to n-th converters 5u2... 5un. The start phase counter 24b measures the time corresponding to the phase difference Td calculated by the pulse operation unit 23 by setting the counter value to a predetermined value and counting down. The end phase counter 24c indicates a counter for measuring the end timing of the pulses to be input to the first to n-th converters 5u1... 5un, respectively. The end phase counter 24c measures the time corresponding to the phase difference Td calculated by the pulse operation unit 23 by setting the counter value to a predetermined value and counting down.

[0047] Fig. 7 shows the processing steps of the m-th (where m≥2) converter 5. The pulse generation unit 12 performs the processing after S12 on the condition that the power switch SWm-1 of the (m-1)-th converter 5 is on in S11. The power switch SWm-1 shown here indicates either the upper arm switch SW1 or the lower arm switch SW2 of the (m-1)-th converter 5 and changes based on the current command value I o accordingly.

[0048] After the power switch SWm-1 of the (m-1)-th converter 5 is turned on, the start phase counter 24b measures whether the phase difference Td = Ton / n, which is the start timing of the m-th converter, has elapsed in S12. When the condition of S12 is satisfied, the power switch SWm of the m-th converter 5 is turned on in S13. The power switch SWm indicates either the upper arm switch SW1 or the lower arm switch SW2 of the m-th converter 5 and changes based on the current command value I o accordingly.

[0049] Thereafter, each time the count of the start phase counter 24b ends, the pulse generation unit 12 generates a pulse for sequentially turning on the power switch SWm of the m-th converter 5. As a result, the driving pulses can be started with a phase difference Td from each other.

[0050] On the other hand, as shown in FIG. 6, when the counting by the pulse width counter 24a of the first-stage converter 5u1 ends, it is determined that the on-time Ton has elapsed, and the pulse generation unit 12 stops the pulse output to the power switch SW1 or SW2 of the first-stage converter 5u1. The pulse generation unit 12 starts the counting of the end phase counter 24c at the timing when the counting by the pulse width counter 24a ends. After that, the pulse generation unit 12 ends the counting by the end phase counter 24c, and each time the on-time Ton elapses in S14, sequentially stops the pulses output to the power switch SWm of the m-stage converter 5. Thereby, the m-stage power switch SWm is sequentially turned off.

[0051] Hard switching occurs when turning off the power switch SW1 or SW2. However, if the charging time of the capacitor C provided in the output of the power switches SW1 and SW2 is made sufficiently longer than the switching time, the period for restricting the voltage rise can be extended, and zero voltage switching (ZVS) can be achieved. Thereby, the switching loss can be made substantially zero. When the capacity of the output capacitor is insufficient, it is advisable to add the capacitor C in parallel.

[0052] As a result, the pulse calculation unit 23 can generate multi-pulses to be input to the first to n-stage converters 5u1 to 5un by sequentially outputting pulses after the phase difference Td calculated as described above from the timing when the pulses are output to the first-stage converter 5u1.

[0053] The resonance time of each converter 5 is determined by the output capacitance of the power switches SW1 and SW2, the junction capacitance of the freewheeling diodes D1 and D2, and the inductance of the inductor L. The on-timing of the power switches SW1 and SW2 is preferably set at the voltage minimum point after the resonance half period determined by these capacitances and inductance. The voltage minimum point after the resonance half period means that by turning off the power switch SW1 or SW2, the inductor current IL After exceeding zero and then approaching zero again, it reaches a timing. As a result, ZCS (Zero-Current-Switching) and pseudo-ZVS (Zero-Voltage-Switching) can be achieved, and the switching loss during turn-on can be made substantially zero.

[0054] <Description of the multiplicity switching unit 25> Hereinafter, the configuration of the multiplicity switching unit 25, which is a feature of the present embodiment, and its technical significance will be described. As shown in FIG. 1, the pulse generation unit 12 includes a block that functions as a multiplicity switching unit 25 for changing the multiplicity number n a (operation multiplicity) of simultaneously operating the converters 5. The multiplicity switching unit 25 corresponds to a multiplicity number changing unit.

[0055] The multiplicity switching unit 25 changes the multiplicity number n a of the converter 5 according to the current command value Io or the maximum value of the current command value Io that changes depending on the input command rotational speed. Hereinafter, the method of switching the multiplicity number n a by the multiplicity switching unit 25 according to the present application and its significance will be described.

[0056] The multiplicity switching unit 25 calculates the multiplicity number n a according to the current command value Io or the rotational speed command value, and outputs it to the pulse calculation unit 23. Alternatively, the control device 10 calculates the multiplicity number n a from the current command value Io or the rotational speed command value, outputs the multiplicity number n a to the multiplicity switching unit 25, and the multiplicity switching unit 25 may switch the multiplicity number n a based on this data.

[0057] When the current command value I o > 0, the multiplicity switching unit 25 uses the multiplicity number n a to calculate the on-time Ton1, off-time Toff1, period T of the upper arm switch SW1, and the phase difference Td between the converters based on equations (3-1) to (3-4), respectively.

Number

[0058] Also, the multiple - number switching unit 25 invalidates the operation of the gate driving unit 21 that outputs a pulse to the converter 5 of the slave phase exceeding the multiple operation number n a That is, it holds the power switches SW1 and SW2 in the OFF state. As shown in FIGS. 8 and 9, when the current command value Io is the same, the smaller the multiple operation number n a , the longer the period and the wider the pulse width become.

[0059] Also, the multiple - number switching unit 25 may switch the multiple operation number n a according to the current command value Io. As shown in FIG. 10, the larger the current command value Io, the larger the multiple operation number n a , and the smaller the current command value Io, the smaller the multiple operation number n a . Also, FIG. 10 shows a form in which the switching timing of the current command value Io is made to coincide with the switching timing of the multiple operation number n a , but it is not limited to this.

[0060] As shown in FIG. 11, the timing at which the multiple - number switching unit 25 switches the multiple operation number n a does not have to be the same timing as the switching timing of the current command value Io, and it may switch the multiple operation number n a at a timing delayed from the current switching timing upon receiving the switching command of the current command value Io. By reducing the multiple operation number n a , shortening of the pulse width can be suppressed, and even when the current command value Io is relatively small, the converter 5 can output a pulse normally.

[0061] As shown in FIG. 12, when the command rotation speed is used as the command value, the multiple operation number n a may be switched according to the command rotation speed. When the control device 10 inputs the command rotation speed, it changes the output current in a sinusoidal shape based on the current command value Io.

[0062] In this case, the multiplicity switching unit 25 may increase the number of multiple operations n as the commanded rotational speed increases, and decrease the number of multiple operations n as the commanded rotational speed decreases. Further, the multiplicity switching unit 25 may switch the number of multiple operations n according to the maximum value of the current command value Io that changes depending on the commanded rotational speed input, or may switch the number of multiple operations n according to the commanded rotational speed. a In this case, the multiplicity switching unit 25 may increase the number of multiple operations n as the commanded rotational speed increases, and decrease the number of multiple operations n as the commanded rotational speed decreases. Further, the multiplicity switching unit 25 may switch the number of multiple operations n according to the maximum value of the current command value Io that changes depending on the commanded rotational speed input, or may switch the number of multiple operations n according to the commanded rotational speed. a In this case, the multiplicity switching unit 25 may increase the number of multiple operations n as the commanded rotational speed increases, and decrease the number of multiple operations n as the commanded rotational speed decreases. Further, the multiplicity switching unit 25 may switch the number of multiple operations n according to the maximum value of the current command value Io that changes depending on the commanded rotational speed input, or may switch the number of multiple operations n according to the commanded rotational speed. a In this case, the multiplicity switching unit 25 may increase the number of multiple operations n as the commanded rotational speed increases, and decrease the number of multiple operations n as the commanded rotational speed decreases. Further, the multiplicity switching unit 25 may switch the number of multiple operations n according to the maximum value of the current command value Io that changes depending on the commanded rotational speed input, or may switch the number of multiple operations n according to the commanded rotational speed. a In this case, the multiplicity switching unit 25 may increase the number of multiple operations n as the commanded rotational speed increases, and decrease the number of multiple operations n as the commanded rotational speed decreases. Further, the multiplicity switching unit 25 may switch the number of multiple operations n according to the maximum value of the current command value Io that changes depending on the commanded rotational speed input, or may switch the number of multiple operations n according to the commanded rotational speed.

[0063] According to this embodiment, the multiplicity switching unit 25 can change and switch the number of multiple operations n. By decreasing the number of multiple operations n, shortening of the pulse width can be suppressed. Therefore, even when the commanded rotational speed is relatively low, the converter 5 can be driven normally. a According to this embodiment, the multiplicity switching unit 25 can change and switch the number of multiple operations n. By decreasing the number of multiple operations n, shortening of the pulse width can be suppressed. Therefore, even when the commanded rotational speed is relatively low, the converter 5 can be driven normally. a According to this embodiment, the multiplicity switching unit 25 can change and switch the number of multiple operations n. By decreasing the number of multiple operations n, shortening of the pulse width can be suppressed. Therefore, even when the commanded rotational speed is relatively low, the converter 5 can be driven normally.

[0064] (Second Embodiment) The second embodiment will be described with reference to FIG. 13. Regarding the second embodiment, parts different from the first embodiment will be described, and descriptions of the same parts will be omitted.

[0065] FIG. 13 shows a flowchart substituting for FIG. 7. As shown in FIG. 13, after the phase difference T of the pulses of the m-th multiplicity = Ton×(m - 1) / n has elapsed from the timing when the power switch SW1 or SW2 of the first multiplicity converter 5 is turned on in S11a, the power switch SWm of the m-th multiplicity converter 5 may be turned on in S13. dm FIG. 13 shows a flowchart substituting for FIG. 7. As shown in FIG. 13, after the phase difference T of the pulses of the m-th multiplicity = Ton×(m - 1) / n has elapsed from the timing when the power switch SW1 or SW2 of the first multiplicity converter 5 is turned on in S11a, the power switch SWm of the m-th multiplicity converter 5 may be turned on in S13.

[0066] Note that the phase difference Tdm of the start phase of the m-th multiplicity with respect to the start phase of the first multiplicity can be calculated based on the relational expression of the following equation (4).

Equation

[0067] For example, in the case of the U phase, after turning on the power switch SW1 or SW2 of the converter 5u1 of the first multiplicity as the master phase, the power switches SW1 or SW2 of two or more converters 5u2... 5un of the m-th multiplicity may be sequentially turned on as the slave phases. Also in this embodiment, the same operational effects as those of the first embodiment are achieved.

[0068] (Third Embodiment) The third embodiment will be described with reference to FIGS. 14 and 15. Differences from the first and second embodiments will be described. When the multiplicity switching unit 25 switches the number of multiple operations n of the converter 5 a there may be a case where the rules in the current boundary mode cannot be continued.

[0069] As illustrated in FIG. 14, consider switching the number of multiple operations n from 2 to 4 at a switching timing ta and switching the period T of the multiple pulses to a period T2 = T / 2. a Before the switching timing ta as shown in FIG. 14, the phase current Iu is controlled to a desired current command value Io while continuing the current boundary mode by operating the converters 5u1 and 5u3 of the first and third multiplicities.

[0070] However, when the operations of the converters 5u1... 5u4 of the first to fourth multiplicities are sequentially switched at a period Td2 = T2 / 4 after the switching timing ta, the inductor current I flowing through the converter 5u1 of the master phase

[0071] can be made zero, but the inductor current I of the converter 5u3 of the third multiplicity in the slave phase L cannot be made zero, and the operation in the current boundary mode cannot be continued. L Thus, when switching the current number of multiple operations n to the next number of multiple operations n

[0072] a a the pulse generation unit 12 may receive the switching output from the multiplicity switching unit 25 and generate an interpolated multiple pulse Pu to continue the current boundary mode.

[0073] Number of multiple operations n a An example of the pulse generation unit 12 generating an interpolated multiple pulse Pu to continue the operation in the current boundary mode when switching will be described with reference to FIG. 15.

[0074] Pre-switching period T, post-switching period T a , pre-switching number of multiple operations n, post-switching number of multiple operations n a , provided that n < n a Let it be so. At this time, the pre-switching phase difference T d = T / n a , post-switching phase difference T da = T a / n a will result.

[0075] Here, the pre-switching phase difference T d is expressed as the phase difference in the case of the number of multiple operations n a . As shown in FIG. 15, since the number of multiple operations before switching is n, there is no change in the phase current Iu before and after the switching timing tb.

[0076] At this time, if the period of the m-th multiple in the interpolated multiple pulse Pu is Tm, the periods T1 to Tm can be calculated based on FIG. 15 and the following formula (5).

Equation

[0077] By generating an interpolated multiple pulse Pu with a period Tm of the m-th multiple from the switching timing tb shown in FIG. 15, the number of multiple operations n can be switched while continuing the current boundary mode.

[0078] Note that the above method is an example, and the method for generating the interpolated multiple pulse Pu is not limited to the above method. For example, the phase difference T o between the interpolated multiple pulses Pu can be set to any value between the pre-switching phase difference T / n a and the post-switching phase difference T a / n a .

[0079] As described above, according to the third embodiment, when switching the number of multiple operations n, the interpolated multiple pulse Pu is generated in the middle. As a result, even if the number of multiple operations n of the converter 5 is switched, the current boundary mode can be stably continued.

[0080] (Modification example of the feedback control configuration related to the first to third embodiments) A modification example of the feedback control configuration related to the first to third embodiments will be described with reference to FIGS. 16 to 20. As shown in FIG. 16, the control device 10A may be configured. The control device 10A incorporates a control unit 11A, a pulse generation unit 12A, and a memory 37. The control unit 11A is configured by connecting a subtractor 30, a current controller 31, a two-phase three-phase converter 32 as a phase converter, and a three-phase two-phase converter 34 in the illustrated form.

[0081] The control unit 11A inputs a d-axis current command value Id* and a q-axis current command value Iq*. Further, the three-phase two-phase converter 34 of the control unit 11A inputs phase currents Iu, Iv, and Iw, and inputs the angle θ of the rotor by a rotation position sensor 4a such as a resolver installed in the motor 4 and calculates information on the angular velocity ω. The three-phase two-phase converter 34 converts the three-phase phase currents Iu, Iv, and Iw of the motor 4 into a d-axis current Id and a q-axis current Iq and outputs them to the subtractor 30.

[0082] The subtractor 30 subtracts the d-axis current Id and the q-axis current Iq from the d-axis current command value Id* and the q-axis current command value Iq* respectively, and outputs them to the current controller 31. The current controller 31 outputs dq-axis current command values Id_cmd and Iq_cmd to the two-phase three-phase converter 32 by, for example, proportional-integral control. The two-phase three-phase converter 32 converts the dq-axis current command values input from the current controller 31 into current command values Iu_cmd, Iv_cmd, and Iw_cmd for each phase of the motor 4 and outputs them to the pulse generation unit 12A.

[0083] The pulse generation unit 12A includes pulse generation blocks 12u, 12v, and 12w for each of the three phases, and also includes one multiplicity switching unit 25 for changing the operation multiplicity. Each of the pulse generation blocks 12u, 12v, and 12w has a functional configuration as a zero current detection unit 22, a pulse calculation unit 23, and a gate drive unit 21, respectively. The pulse calculation units 23 for each phase of the pulse generation blocks 12u, 12v, and 12w receive the current command values Iu_cmd, Iv_cmd, and Iw_cmd for each of the three phases of the motor 4, respectively. The zero current detection unit 22 detects the zero current for each phase and outputs it to the pulse calculation unit 23.

[0084] The pulse calculation unit 23 calculates each parameter of the on-time Ton and off-time Toff of the upper arm switch SW1 and the lower arm switch SW2, the period T, and the phase difference Td between multiple pulses input to a plurality of converters 5 of the same phase (for example, the U phase) when each converter 5 of the multi-phase converters 6u, 6v, and 6w of each phase operates in the current boundary mode.

[0085] The gate drive unit 21 drives the three-phase inverter 3 based on the calculation result of the pulse calculation unit 23. The gate drive unit 21 turns on and off the upper arm switch SW1 or the lower arm switch SW2 based on the on-time Ton, the period T, and the phase difference Td calculated by the pulse calculation unit 23.

[0086] The multiplicity switching unit 25A receives the current command value Iq_cmd of the q-axis current from the current controller 31 and is a block for changing the multiplicity number n of the converter 5. a As shown in FIG. 17, the multiplicity switching unit 25A switches and changes the multiplicity number n based on the value of the current command value Iq_cmd. For example, if the current command value Iq_cmd exceeds 10, the multiplicity number n is set to 8. If the current command value Iq_cmd exceeds 4 and is 10 or less, the multiplicity number n is set to 4. If the current command value Iq_cmd exceeds 1 and is 4 or less, the multiplicity number n is set to 2. If the current command value Iq_cmd is 1 or less, the multiplicity number n a is switched and changed. For example, if the current command value Iq_cmd exceeds 10, the multiplicity number n a is set to 8. If the current command value Iq_cmd exceeds 4 and is 10 or less, the multiplicity number n a is set to 4. If the current command value Iq_cmd exceeds 1 and is 4 or less, the multiplicity number n a is set to 2. If the current command value Iq_cmd is 1 or less, the multiplicity number n aIt may be set to 1.

[0087] In this way, when the number of multiple operations n is changed every 2^n according to the current command value Iq_cmd, it becomes possible to omit the phase difference calculation in the pulse operation unit 23. This number of multiple operations n a Since the operation example at the time of changing this is the same as the flow of FIGS. 10 and 11 described above, the description thereof is omitted. As shown in the waveform examples of the three-phase currents Iu, Iv, and Iw before and after application in FIG. 18, the influence of harmonic current distortion can be improved.

[0088] For example, as illustrated in FIG. 19, when the converter 5 is operating in 4-multiple operation and the multiplicity switching unit 25 switches to 3-multiple operation, it is necessary to recalculate the signal related to the phase difference T / 3 with respect to the period T. As described above, based on the predetermined conditions, by switching the operation / stop of the corresponding converter 5, the converter 5 to be operated can be changed. As shown in the example of switching to 2-multiple operation in FIG. 20, since it is only necessary to stop the signals of the 2nd and 4th multiples, it is not necessary to calculate the signal related to the phase difference T / 2, and the control processing amount can be reduced.

[0089] (Fourth Embodiment) The fourth embodiment will be described with reference to FIGS. 21 to 24. In this embodiment, an embodiment will be described in which, while keeping the number of multiple operations n of the converter 5 the same, the phase currents Iu, Iv, and Iw based on multiple pulses are smoothly changed according to the change in the current command value Io. That is, in this embodiment, the configuration of the multiplicity switching unit 25 described in the first to third embodiments may be omitted.

[0090] In order to be able to continue the operation in the current boundary mode even in a transient state where the pulse width is changed according to the change in the current command value Io, the pulse generation unit 112 preferably generates an interpolation multiple pulse Pu that interpolates between a plurality of multiple pulses sequentially output to each converter 5 by the function of the interpolation unit 12b. As shown in FIG. 21, the pulse generation unit 112 has a function as the interpolation unit 12b.

[0091] For example, the interpolation unit 12b may set the value of the phase difference between the turn-off timings during the current first multiplex pulse input to each converter 5 in each of the U, V, and W phases, and the value of the phase difference between the turn-off timings during the next second multiplex pulse, to the value of the phase difference between the turn-off timings during the interpolation multiplex pulses Pu.

[0092] Specifically, it is desirable to generate the interpolation multiplex pulses Pu as follows by the function of the interpolation unit 12b. As shown in FIG. 22, let the phase difference between the turn-off timings during the current first multiplex pulse be P k and the phase difference between the turn-off timings during the next multiplex pulse be P k+1 Then, the phase difference P ka between the turn-off timings during the interpolation multiplex pulses Pu is calculated based on the following equation (6).

Equation

[0093] Here, a linear interpolation method exemplified by equation (6) is described, but it is not limited thereto. It is sufficient that the phase difference between the turn-off timings or the phase difference between the turn-on timings during the interpolation multiplex pulses Pu is set to a value between the phase differences during the current and next multiplex pulses. Then, the output current between the current and next multiplex pulses can be smoothly interpolated, and the drive current output of the converter 5 can be leveled.

[0094] FIG. 23 shows an example of the change in the counter values of the pulse width counter 24a, the start phase counter 24b, and the end phase counter 24c, and the output result of the interpolation multiplex pulses Pu by the pulse operation unit 23 when generating the interpolation multiplex pulses Pu using the counter 24 described in the foregoing embodiment.

[0095] Hereinafter, with reference to the flowchart of FIG. 24, a method for generating the interpolation multiplex pulses Pu will be described. As shown in FIG. 24, the pulse generation unit 12, in S11, measures the inductor current I of the converter 5u1 of the master phase LDetermine whether zero has been detected, and set the counter value in S12 on the condition that zero has been detected.

[0096] The pulse operation unit 23 sets the counter values by the pulse width counter 24a, the start phase counter 24b, and the end phase counter 24c using the same method as the method shown in the first embodiment, thereby setting the on-time Ton, off-time Toff, period T of the power switch SW1 or SW2, and the phase difference Td of the on / off timing between the converters 5u1...5un of the master phase and the slave phase.

[0097] When the current command value Io does not change and the next pulse width is not changed from the current pulse width of the multi-pulse, the pulse generation unit 12 determines NO in S13 and outputs the next multi-pulse in S18 based on the set counter value.

[0098] However, when the current command value Io changes and the next pulse width is changed from the current pulse width of the multi-pulse, the pulse generation unit 12 determines YES in S13, calculates the counter value so as to satisfy the condition between the phase differences of the interpolation multi-pulses Pu described above in S14, and outputs the interpolation multi-pulses Pu in S15.

[0099] On the other hand, when the pulse generation unit 12 detects zero current in the master phase of the interpolation multi-pulses Pu in S16, it sets the counter value again based on the pulse width and phase difference of the next multi-pulses in S17, and outputs the next multi-pulses in S18.

[0100] In the above, the flow is illustrated by a flowchart for easy understanding, but each processing step may be processed in parallel as necessary according to the processing process.

[0101] When applying the conventional technology, it is necessary to calculate the widths of the pulses input to the converters 5 of the master phase and each slave phase as interpolation values between the multi-pulses, and it has been confirmed that the output current temporarily increases while these interpolation pulses are being output.

[0102] According to this embodiment, paying attention to the phase difference between the current first multi-pulse and the next second multi-pulse, an interpolation multi-pulse Pu is generated so that the phase difference is linearly interpolated by the function of the interpolation unit 12b. In the method described above, the phase difference between the first multi-pulses before interpolation is P k , and when the phase between the second multi-pulses after interpolation is P k+1 , the phase difference between the interpolation multi-pulses Pu is set to a value between the phase difference P k and the phase difference P k+1 . Thereby, the interval between the current multi-pulse and the next multi-pulse can be smoothly interpolated, and the drive current output of each converter 5 can be equalized.

[0103] Also according to this embodiment, since the phase difference between the interpolation multi-pulses Pu can be set to the same phase difference, the calculation process can be completed in one time. When linearly interpolating the phase difference between the interpolation multi-pulses Pu, for example, the average value of the phase difference P k between the current multi-pulses and the phase difference P k+1 between the next multi-pulses can be obtained, and the calculation load can be reduced with respect to the interpolation calculation amount of the prior art. The width of the interpolation multi-pulse Pu corresponding to the multiplicity of the converter 5 and the phase difference between the interpolation multi-pulses Pu may be mapped and stored in the memory 37, and the calculation may be performed using the map stored in this memory 37.

[0104] (Fifth Embodiment) The fifth embodiment will be described with reference to FIGS. 25 and 26. Since this embodiment is a modification of the fourth embodiment, the parts different from the fourth embodiment will be described.

[0105] As shown in FIG. 25, the pulse operation unit 23 includes a start phase counter 24b that measures the start phase of each pulse of the multi-pulse, and a multi-pulse width counter 24d that controls the pulse width for each pulse of the multi-pulse. The pulse generation unit 112 inputs a pulse to the next multi-stage converter 5 every time the start phase counter 24b reaches the end.

[0106] The start phase counter 24b measures the start phase at which each pulse of the multi-pulse outputs the start. Also, the multi-pulse width counter 24d is a counter that measures the time of each pulse width to be input to the converters 5u1 to 5u4 of the first to fourth multiplicities. It measures based on the start phase measured by the start phase counter 24b and measures each pulse width of the multi-pulse.

[0107] Let the pulse width of a group of multi-pulses to be input to the converter 5 in the master phase to slave phase this time be T k and let the phase difference between these multi-pulses be P k Also, let the pulse width of a group of multi-pulses to be input to the converter 5 in the master phase to slave phase next time be T k+1 and let the phase difference between these multi-pulses be P k+1 Then, the pulse width T ka of the interpolated multi-pulse Pu shown in Fig. 26 can be calculated based on the following equation (7). [Equation]

[0108] The pulse operation unit 23 sequentially measures the phase differences P k , P k+1 by the start phase counter 24b, and measures the pulse widths T k , T ka , T k+1 by the multi-pulse width counter 24d, thereby sequentially calculating the current multi-pulse, the interpolated multi-pulse Pu, and the next multi-pulse. Also by the method of this embodiment, multi-pulses can be generated, thus achieving the same operational effects as in the fourth embodiment.

[0109] (Modification example of the feedback control configuration related to the third to fifth embodiments) A modification example of the feedback control configuration related to the third to fifth embodiments will be described with reference to FIGS. 27 to 31. The control device 10B may be configured as shown in FIG. 27. The control device 10B incorporates a control unit 11B, a pulse generation unit 12B, and a memory 37. The control unit 11B is configured by connecting a subtractor 30, a current controller 31, a two-phase three-phase converter 32 as a phase converter, and a three-phase two-phase converter 34 in the illustrated form.

[0110] The control unit 11B inputs a d-axis current command value Id* and a q-axis current command value Iq*. The three-phase two-phase converter 34 of the control unit 11 also inputs phase currents Iu, Iv, Iw, and inputs the angle θ of the rotor by a rotation position sensor 4a such as a resolver installed in the motor 4 and calculates information on the angular velocity ω. The three-phase two-phase converter 34 converts the three-phase phase currents Iu, Iv, Iw of the motor 4 into a d-axis current Id and a q-axis current Iq and outputs them to the subtractor 30.

[0111] The subtractor 30 subtracts the d-axis current Id and the q-axis current Iq from the d-axis current command value Id* and the q-axis current command value Iq* respectively, and outputs them to the current controller 31. The current controller 31 outputs dq-axis current command values Id_cmd and Iq_cmd to the two-phase three-phase converter 32 by, for example, proportional-integral control. The two-phase three-phase converter 32 converts the dq-axis operation amount input from the current controller 31 into current command values Iu_cmd, Iv_cmd, Iw_cmd for each of the three phases of the motor 4, and outputs them to the pulse generation unit 12B.

[0112] The pulse generation unit 12B includes pulse generation blocks 12u, 12v, 12w for each of the three phases. Each of the pulse generation blocks 12u, 12v, 12w has a functional configuration as a zero current detection unit 22, a pulse calculation unit 23Z, and a gate drive unit 21. The pulse calculation units 23Z for each phase of the pulse generation blocks 12u, 12v, 12w input the current command values Iu_cmd, Iv_cmd, Iw_cmd for each of the three phases of the motor 4 respectively. The zero current detection unit 22 detects a zero current for each phase and outputs it to the pulse calculation unit 23Z.

[0113] The pulse operation unit 23Z calculates each parameter of the on-time Ton, off-time Toff, period T of the upper arm switch SW1 and the lower arm switch SW2, and the phase difference Td between multiple pulses input to the plurality of converters 5 of the same phase when each converter 5 of the multi-phase converters 6u, 6v, 6w of each phase operates in the current boundary mode.

[0114] The gate drive unit 21 drives the three-phase inverter 3 based on the calculation result of the pulse operation unit 23. The gate drive unit 21 turns on and off the upper arm switch SW1 or the lower arm switch SW2 based on the on-time Ton, period T, and phase difference Td calculated by the pulse operation unit 23.

[0115] Each phase pulse operation unit 23Z calculates the on-time Ton, off-time Toff of the upper arm switch SW1, and the period T and phase difference Td based on the values of the current command values Iu_cmd, Iv_cmd, Iw_cmd. For example, in the U-phase pulse generation block 12u, when the current command value Iu_cmd > 0, the pulse operation unit 23Z calculates the on-time Ton, off-time Toff of the upper arm switch SW1, and the period T and phase difference Td based on equations (1-1) to (1-4) respectively.

[0116] In the V-phase pulse generation block 12v, when the current command value Iv_cmd > 0, the pulse operation unit 23Z calculates the on-time Ton, off-time Toff of the upper arm switch SW1, and the period T and phase difference Td based on equations (1-1) to (1-4) respectively. In the W-phase pulse generation block 12w, when the current command value Iw_cmd > 0, the pulse operation unit 23Z calculates the on-time Ton, off-time Toff of the upper arm switch SW1, and the period T and phase difference Td based on equations (1-1) to (1-4) respectively.

[0117] The pulse operation unit 23Z calculates the on-time Ton and off-time Toff of the upper-arm switch SW1, as well as the period T and phase difference Td, based on the values of the current command values Iu_cmd, Iv_cmd, and Iw_cmd. For example, in the U-phase pulse generation block 12u, when the current command value Iu_cmd < 0, the pulse operation unit 23Z calculates the on-time Ton and off-time Toff of the lower-arm switch SW2, as well as the period T and phase difference Td, based on equations (2-1) to (2-4), respectively.

[0118] In the V-phase pulse generation block 12v, when the current command value Iv_cmd < 0, the pulse operation unit 23Z calculates the on-time Ton and off-time Toff of the lower-arm switch SW2, as well as the period T and phase difference Td, based on equations (2-1) to (2-4), respectively. In the W-phase pulse generation block 12w, when the current command value Iw_cmd < 0, the pulse operation unit 23Z calculates the on-time Ton and off-time Toff of the lower-arm switch SW2, as well as the period T and phase difference Td, based on equations (2-1) to (2-4), respectively.

[0119] Fig. 23 shows the changes in the counter values of the pulse width counter 24a, start phase counter 24b, and end phase counter 24c when generating the interpolation multiple pulse Pu using the counter 24. The pulse operation unit 23 can also realize the generation of the interpolation multiple pulse Pu with the hardware configuration shown in the upper part of Fig. 28.

[0120] By executing the processing of equations (1-1) to (2-4), this pulse operation unit 23Z inputs the on-time Ton and period T of the upper-arm switch SW1 and lower-arm switch SW2 as parameters of the counter 24 to the pulse width counter 24a. Then, the pulse operation unit 23 inputs the phase difference P k+1 between the next multiple pulses to the start phase counter 24b and end phase counter 24c.

[0121] When the pulse operation unit 23Z linearly interpolates the phase difference between the interpolation multiple pulses Pu, for example, the phase difference P between the previous multiple pulsesk and the phase difference P between the current multiple pulses k+1 and the average value P k +P k+1 / 2 is obtained, and this average value is output to the end phase counter 24c, and the end phase is corrected by the end phase counter 24c. Thereby, the interpolation multiple pulse Pu of the 1st to nth multiples can be generated as shown in FIG. 23 using the counter 24. By generating the interpolation multiple pulse Pu using this method, the current boundary mode at the time of pulse width change can be maintained, but for example, in a case where the changes in the phase voltages Vu, Vv, and Vw are large, the current boundary mode may not be maintained.

[0122] If it is in the region of the maximum and minimum values where the phase voltages Vu, Vv, and Vw are substantially constant, there is no problem with the interpolation pulse output of the pulse operation unit 23. Refer to the middle figure of FIG. 29. However, in the time region where the phase voltages Vu, Vv, and Vw change steeply, the voltage changes between the time when the master first multiple pulse is output and the time when the slave second to fourth multiple pulses are output. For this reason, the current with respect to the on-time Ton of the pulse operation unit 23 decreases or increases, and the period of the slave pulse changes, resulting in an unintended output. Refer to the right figure of FIG. 29. In the embodiment described later, it is shown that correction is performed based on the back electromotive force, but there are cases where the current boundary mode cannot be maintained even when correction is performed based on the back electromotive force. Experimental examples of the first and second multiple pulses at this time are shown in the upper figure of FIG. 31, but the current boundary mode cannot be maintained in region B.

[0123] To solve this problem, it is preferable that the pulse operation unit 23Z has the hardware configuration shown in the lower part of FIG. 28. In this hardware configuration, every time the pulse operation unit 23Z finishes measurement by the start phase counter 24b and the end phase counter 24c, the end phase is corrected.

[0124] At this time, the pulse operation unit 23Z executes the operation processing of formulas (1-1) to (2-4) to input the on-time Ton and period T of the upper-arm switch SW1 and the lower-arm switch SW2 into the pulse width counter 24a as parameters of the counter 24. Further, the pulse operation unit 23Z inputs the phase difference P k+1 between the next multi-pulses to the start phase counter 24b and the end phase counter 24c. Similarly to the above, when the pulse operation unit 23Z linearly interpolates the phase difference between the interpolation multi-pulses Pu, for example, the phase difference P k between the previous multi-pulses and the phase difference P k+1 between the current multi-pulses, the average value P k +P k+1 / 2 is obtained, and this average value is output to the end phase counter 24c to correct the end phase by the end phase counter 24c. Further, each time the measurement is completed by the start phase counter 24b and the end phase counter 24c, the pulse operation unit 23Z outputs a correction value A to the end phase counter 24c based on a counter correction instruction to update the counter value.

[0125] As shown in the timing chart on the right side of FIG. 30, the value of the end phase counter 24c is gradually changed based on the value of the correction value A. Then, the phase currents Iu, Iv, and Iw can be maintained at the intended amplitudes. By doing so, as shown in the lower diagram of FIG. 31, the pulse current boundary mode can be maintained.

[0126] (Sixth Embodiment) The sixth embodiment will be described with reference to FIGS. 32 to 35.

[0127] The motor 4 generates a back electromotive force due to a change in magnetic flux according to the rotational speed, and the output voltage fluctuates. When the responsiveness of the control is insufficient, affected by this back electromotive force, as shown in Fig. 32, the phase currents Iu, Iv, and Iw generate harmonic current distortion. This high-frequency current component causes the motor 4 to generate noise. In this case, if the responsiveness of the control is not increased, the influence of the harmonic current distortion cannot be improved, and there is a risk that it cannot be improved by the control device 10 with limited physical resources. In particular, when the motor 4 is rotated at a high speed above a predetermined rotational speed, the output voltage Vout is significantly affected by the back electromotive voltage, and thus there is a risk that the current distortion becomes even larger.

[0128] Therefore, in this embodiment, a method for correcting the pulse width of multiple pulses based on the back electromotive voltage generated in the motor 4 will be described. As shown in Fig. 33, the control device 10 includes a pulse generation unit 212. The control device 10 has a function as a back electromotive voltage correction unit 12c.

[0129] At this time, let the amplitude at which the back electromotive voltage is maximum be Vm, and the phase information of the back electromotive voltage be (ω e t + φ) = (2πf e t + φ). Here, t is time, ω e is the electrical angular velocity, φ is the phase difference with respect to the current, f e is the electrical frequency. The output voltage Vout preferably operates around half of the input voltage Vin, that is, Vin / 2, and it is good to control so as to have the relational expression of the following equation (8) in consideration of the above-mentioned back electromotive voltage.

Equation

[0130] Also, when the pulse generation unit 212 calculates the amplitude Vm of the back electromotive voltage, it is preferable to calculate it based on the rotational speed of the motor 4. Then, the pulse generation unit 212 calculates the output voltage Vout based on the rotational position of the motor 4, the amplitude Vm of the back electromotive voltage, and the phase information, and it is desirable to correct the pulse width of the multi-pulse based on this output voltage Vout. Specifically, for example, Vout may be calculated as the formula (8) in the formulas (1-1) to (1-4), (2-1) to (2-4), and (3-1) to (3-4).

[0131] Since the back electromotive voltage is an eigenvalue based on the individual of the motor 4, it is predictable. For example, it is good to calculate and predict the back electromotive voltage by multiplying the rotational speed of the motor 4 by the back electromotive voltage constant uniquely determined for the motor 4. Further, in order to correct the pulse width with high precision, in addition to the back electromotive voltage of the output voltage Vout, the voltage generated in the winding resistance and inductance of the motor 4 may be considered.

[0132] The control device 10 obtains the rotational speed of the motor 4 using the sensing result of the rotational position sensor 4a of the motor 4, and based on the three-phase phase currents Iu, Iv, Iw and the position of the rotor of the motor 4, converts the phase currents Iu, Iv, Iw into currents in the magnetic force direction related to torque and performs vector control.

[0133] An example of the feedback control configuration at this time will be described with reference to FIG. 34. The control unit 11 is configured by connecting a subtractor 30, a current controller 31, a two-phase three-phase converter 32 as a phase converter, and a three-phase two-phase converter 34 in the illustrated form.

[0134] The control unit 11 inputs a current command value Io and performs current feedback control based on the differential current between the current command value Io and each phase current Iu, Iv, Iw of the motor 4. The three-phase two-phase converter 34 converts the three-phase current into dq-axis currents, and the current controller 31 outputs an operation amount on the dq-axis by, for example, proportional integral control. The two-phase three-phase converter 32 converts the operation amount on the dq-axis input from the current controller 31 into an operation amount for each of the three phases of the motor 4.

[0135] In this embodiment, the pulse generation unit 212 has the functions of the back electromotive force correction unit 12c and the pulse calculation unit 33. The pulse calculation unit 33 calculates parameters including the on-time Ton1, off-time Toff1, period T, and phase difference Td of the multi-pulse to be input to the converter 5 for each phase of the motor 4. These on-time Ton1, off-time Toff1, and period T can be calculated using the on-time Ton1, off-time Toff1, period T, and phase difference Td of the aforementioned equations (1-1) to (1-4) when the current command value Io is positive. Also, when the current command value Io is negative, they can be calculated using the on-time Ton2, off-time Toff2, period T, and phase difference Td of the aforementioned equations (2-1) to (2-4).

[0136] The functions of the back electromotive force correction unit 12c referred to here include, for example, a process of calculating the amplitude Vm of the back electromotive force from the rotational speed of the motor 4, and a process of calculating the output voltage Vout based on the amplitude Vm of the back electromotive force and the phase information. When the pulse calculation unit 33 calculates the above parameters for each phase of the motor 4, it corrects the width of the pulse based on the output voltage considering the back electromotive force by the function of the back electromotive force correction unit 12c. Since the amplitude Vm of the back electromotive force is proportional to the rotational speed of the motor 4, it is desirable to calculate the amplitude Vm of the back electromotive force to be proportional to the rotational speed of the motor 4.

[0137] As a control method, the current control method was exemplified above, but as shown in FIG. 35, the control unit 211 may be configured instead of the control unit 11. The control unit 211 includes a speed controller 35 and a subtracter 36 in addition to a subtracter 30, a current controller 31, a two-phase to three-phase converter 32, and a three-phase to two-phase converter 34. As shown in this control unit 211, the angular velocity ω of the motor 4 may be obtained using the rotation position sensor 4a, the difference from the command angular velocity ω* may be detected by the subtracter 36, and speed control may be performed by the speed controller 35. At this time, a non-interference control method for eliminating the mutual interference between the d-axis current and the q-axis current may be used. Thereby, the destabilizing factors generated during the driving of the motor 4 can be eliminated. When the back electromotive force becomes large with respect to the input voltage Vin, it is desirable to perform field weakening control.

[0138] Each converter 5 is configured by connecting buck converters in parallel as shown in FIG. 33. This configuration is suitable when the output voltage Vout fluctuates within the range of the power supply voltage of the battery 2.

[0139] In the foregoing, an example was given of obtaining the back electromotive force by calculation from the rotation speed of the motor 4. However, a map associating the rotation speed of the motor 4 with the amplitude Vm and phase information of the back electromotive force may be prepared in advance in the memory 37. The pulse generation unit 212 may correct the width of the multiple pulses with reference to the amplitude Vm and phase information of the back electromotive force stored in the memory 37 corresponding to the rotation speed of the motor 4. Further, while detecting the output voltage Vout by the voltage sensor 15, it may be used in the calculation in consideration of the delay time based on the detection of the voltage sensor 15.

[0140] The pulse generation unit 212 may cause the memory 37 to hold the result of periodically correcting the width of the multiple pulses according to the back electromotive force by the back electromotive force correction unit 12c corresponding to the current command value Io or the commanded rotation speed. Further, while the pulse calculation unit 33 is periodically calculating the correction content based on the next current command value Io, the width of the multiple pulses may be corrected by the function of the back electromotive force correction unit 12c using the current or past calculation results regarding the multiple pulses held in the memory 37.

[0141] As shown in this embodiment, by correcting the pulse width based on the back electromotive force by the back electromotive force correction unit 12c, the back electromotive force of the motor 4 can be incorporated into the calculation of the pulse width in a feed-forward manner. As a result, as shown in FIG. 36, the current waveform can be made closer to the target ideal sine wave, and high efficiency, low noise, and low EMC can be achieved. Further, it can be realized by a simple and straightforward control system with only current feedback control.

[0142] (Seventh Embodiment) The seventh embodiment will be described. For example, in the converter 5 shown in FIGS. 3 and 33, when the upper arm switch SW1 is turned on and off as the first arm switch while the lower arm switch SW2 remains off, the current commutes through the inductor L and the freewheeling diode D2.

[0143] At this time, instead of the reflux action of the reflux diode D2, the lower arm switch SW2 facing the upper arm switch SW1 may be turned on as the second arm switch for synchronous rectification.

[0144] By synchronous rectification, losses can be further reduced. Also, an external reflux diode D2 becomes unnecessary and miniaturization can be achieved. For synchronous rectification, the upper arm switch SW1 facing it may be turned on for a time set based on the calculation formula for the off-time Toff of the previous pulse (for example, the off-time Toff1 of formula (1-2), the off-time Toff2 of formula (2-2), or the off-time Toff1 of formula (3-2)). However, in order to prevent short-circuiting between the power switches SW1 and SW2, it is desirable to provide a dead time between the on-times Ton of the upper arm switch SW1 and the lower arm switch SW2.

[0145] According to the above-described synchronous rectification method, the synchronous rectification time can be predicted and obtained by calculation. In this case, since there is no need to separately provide an external sensor to detect the timing of synchronous rectification, miniaturization and cost reduction of the system can be achieved.

[0146] As described above, when the current command value Io > 0, the on-time Ton1, period T, and phase difference Td of the upper arm switch SW1 are set in the same manner as in formulas (1-1), (1-3), and (1-4), respectively. However, for the synchronous rectification time, a time equal to the off-time Toff1 shown in formula (1-2) may be set corresponding to the on-time Ton2 of the lower arm switch SW2 during synchronous rectification.

[0147] Also, when the current command value Io < 0, the on-time Ton2, period T, and phase difference Td of the lower arm switch SW2 are set in the same manner as in formulas (2-1), (2-3), and (2-4), respectively. A time equal to the off-time Toff2 shown in formula (2-2) may be set corresponding to the on-time Ton1 of the upper arm switch SW1 during synchronous rectification.

[0148] (Modification Example of Feedback Control Configuration Related to the Sixth and Seventh Embodiments) A modification example of the feedback control configuration related to the sixth and seventh embodiments will be described with reference to FIGS. 37 to 42. The control device 10C may be configured as shown in FIG. 37. The control device 10C incorporates a control unit 11C, a pulse generation unit 12C, and a memory 37. The control unit 11C is configured by connecting a subtractor 30, a current controller 31, a two-phase to three-phase converter 32 as a phase converter, and a three-phase to two-phase converter 34 in the illustrated form.

[0149] The control unit 11C inputs a d-axis current command value Id* and a q-axis current command value Iq*. Also, the three-phase to two-phase converter 34 of the control unit 11C inputs phase currents Iu, Iv, Iw and, based on the rotation position sensor 4a, inputs the angle θ of the rotor and calculates information on the angular velocity ω. The three-phase to two-phase converter 34 converts the three-phase phase currents Iu, Iv, Iw of the motor 4 into a d-axis current Id and a q-axis current Iq and outputs them to the subtractor 30.

[0150] The subtractor 30 subtracts the d-axis current Id and the q-axis current Iq from the d-axis current command value Id* and the q-axis current command value Iq* respectively, and outputs them to the current controller 31. The current controller 31 outputs dq-axis current command values Id_cmd and Iq_cmd to the two-phase to three-phase converter 32 by, for example, proportional-integral control. The two-phase to three-phase converter 32 converts the dq-axis operation amount input from the current controller 31 into current command values Iu_cmd, Iv_cmd, Iw_cmd for each phase of the motor 4 and outputs them to the pulse generation unit 12A.

[0151] The pulse generation unit 12C includes pulse generation blocks 12u, 12v, 12w for each of the three phases. Each pulse generation block 12u, 12v, 12w has a functional configuration as a zero current detection unit 22, a pulse calculation unit 23, a gate drive unit 21, and a back electromotive voltage correction unit 12c for correcting pulses based on the back electromotive force. The pulse calculation units 23 for each phase of the pulse generation blocks 12u, 12v, 12w input the current command values Iu_cmd, Iv_cmd, Iw_cmd for each phase of the motor 4 respectively. The zero current detection unit 22 detects a zero current for each phase and outputs it to the pulse calculation unit 23.

[0152] When each converter 5 of the multi-phase converters 6u, 6v, and 6w of each phase operates in the current boundary mode, the pulse operation unit 23 calculates each parameter of the on-time Ton and off-time Toff of the upper arm switch SW1 and the lower arm switch SW2, the period T, and the phase difference Td between multiple pulses input to the converters 5 of the same phase (for example, the U phase).

[0153] The gate drive unit 21 drives the three-phase inverter 3 based on the calculation result of the pulse operation unit 23. The gate drive unit 21 turns on and off the upper arm switch SW1 or the lower arm switch SW2 based on the on-time Ton, the period T, and the phase difference Td calculated by the pulse operation unit 23.

[0154] In the memory 37, a map associating the rotational speed of the motor 4 with the amplitude Vm of the back electromotive force and the phase difference φ is stored in advance. Each back electromotive force correction unit 12c of each phase refers to the rotational speed of the motor depending on the angle θ of the motor 4 by comparing it with the stored content of the memory 37, and inputs the amplitudes Vm_u, Vm_v, Vm_w of the back electromotive force and the phase differences φ_u, φ_v, φ_w for each phase.

[0155] Each back electromotive force correction unit 12c calculates the output voltages Vout_u, Vout_v, Vout_w based on the power supply voltage Vin and the amplitudes Vm_u, Vm_v, Vm_w of the back electromotive force and the phase differences φ_u, φ_v, φ_w. At this time, as also shown in the aforementioned equation (8), as shown in FIG. 38, the back electromotive force correction unit 12c calculates the output voltage Vout. Thereby, the influence of the back electromotive force can be corrected in the same manner as in the aforementioned embodiment. As illustrated in FIG. 39, the output voltage Vout can be corrected based on the back electromotive force, and as illustrated in FIG. 40, the influence of the harmonic current distortion can be eliminated as much as possible and improved.

[0156] Also, when the rotational speed of the motor 4 increases to a high speed, the amplitude Vm of the back electromotive voltage increases. As the amplitude Vm of the output voltage Vout approaches the power supply voltage Vin, the voltage generated in the inductor L decreases, and current cannot flow through the inductor L. In this case, there is a risk of loss of control and inoperability. Therefore, as shown in FIG. 41, it is desirable to provide a power supply voltage utilization improvement control unit 21d that improves the utilization rate of the power supply voltage Vin. When the amplitude Vm of the back electromotive voltage exceeds a predetermined threshold value, this voltage utilization improvement control unit 12d sets upper and lower limits for the output voltage Vout after correction of the back electromotive voltage and outputs it.

[0157] For example, an upper limit value is set to a value slightly lower than the power supply voltage Vin, and a lower limit value is set to a value slightly higher than the reference value 0 of the power supply voltage Vin. Here, when the output voltage Vout after correction of the back electromotive voltage exceeds the upper limit value, the voltage utilization improvement control unit 12d clamps it to stay at the upper limit value, and when it falls below the lower limit value, it clamps it to stay at the lower limit value.

[0158] As a result, the pulse operation unit 23 can perform pulse operation while limiting the sine wave peak of the output voltage Vout for pulse width correction calculation to the upper limit value and the lower limit value. Since the upper and lower limits are provided for the output voltage Vout, it becomes possible to operate without problems even when a relatively large back electromotive voltage is generated, and the operable range can be expanded. Also, the utilization rate of the voltage can be increased.

[0159] (Eighth Embodiment) The eighth embodiment will be described with reference to FIG. 43. In the above-described sixth and seventh embodiments, the number of multiple operations n is not limited to 2 or more, and it can also be applied when n = 1.

[0160] That is, as shown in FIG. 43, in each phase of the UVW phases, a single pulse may be generated for each phase using converters 5u1, 5v1, and 5w1 with the number of multiple operations n = 1 corresponding to the master phase to drive the motor 4.

[0161] (Ninth Embodiment) The ninth embodiment will be described with reference to FIG. 44. The control device 10D may be configured as shown in FIG. 44. The control device 10D includes all of the multiplexing switch unit 25A in the control device 10A, the pulse calculation unit 23Z in the control device 10B, and the back electromotive voltage correction unit 12c in the control device 10C described in the foregoing embodiments. That is, it can be applied to a configuration having all the features of the foregoing embodiments. Here, the multiplexing switch unit may be configured by 25, the pulse calculation unit may be configured by 23, and the back electromotive voltage correction unit may be configured by "12" or "12d".

[0162] (Other embodiments) The present invention is not limited to the foregoing embodiments, and can be implemented with various modifications, and is applicable to various embodiments without departing from the gist thereof. For example, the following modifications or expansions are possible.

[0163] In the foregoing embodiments, a power converter using the buck converter 5 has been described, but the present invention is not limited thereto. For example, a boost converter or a buck-boost converter 5 can be used. Further, the converter 5 may be non-insulated or insulated. The voltage sensor 15 may be provided as necessary.

[0164] In the foregoing embodiments, the form in which the number of multiplex operations n is set to 4 or 2 has been shown, but the number of multiplex operations n may be 3 or 5 or more. In the foregoing embodiments, the power switches SW1 and SW2 are exemplified by N-channel power MOSFETs, but may be configured by other types of power switching elements.

[0165] In the foregoing embodiments, freewheeling diodes D1 and D2 are provided in parallel to divert the load current to the power MOSFETs constituting the power switches SW1 and SW2, but the present invention is not limited thereto. Instead of the freewheeling diodes D1 and D2, body diodes added to the power MOSFETs may be used. Further, a power switch having reverse conductivity (for example, a reverse conducting IGBT (RC-IGBT)) may be used for configuration.

[0166] Also, similar to the first-stage converters 5u1, 5v1, and 5w1, zero-current detection units 22 are provided for two or more m-stage converters 5u2…5un, 5v2…5vn, 5w2…5wn, and after detecting that the inductor current I L becomes zero, the corresponding power switch SW1 or SW2 may be turned on. It is desirable to use the on-time Ton of the power switches SW1 and SW2 calculated as in the aforementioned equations (1-1), (2-1), or (3-1).

[0167] The "control unit 11" and "pulse generation units 12, 112, 212" which are components of the control device 10 may be realized using hardware that combines logic circuits, or may also be realized by hardware such as a microcomputer executing a program.

[0168] The method by the control devices 10, 10A, 10B, 10C, 10D described in the present disclosure may be realized by a dedicated computer configured by a processor and a memory programmed to execute one or more functions embodied by a computer program. Alternatively, the control devices 10, 10A, 10B, 10C, 10D and the method thereof described in the present disclosure may be realized by a dedicated computer configured by a processor constituted by one or more dedicated hardware logic circuits. Or, the control devices 10, 10A, 10B, 10C, 10D and the method thereof described in the present disclosure may be realized by one or more dedicated computers configured by a combination of a processor programmed to execute one or more functions and a memory and a processor constituted by one or more hardware logic circuits. Also, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions to be executed by a computer.

[0169] The present invention has been described in accordance with the foregoing embodiments, but it should be understood that the present invention is not limited to such embodiments and structures. The present invention also includes various modifications and modifications within the equivalent scope. In addition, various combinations and forms, and further other combinations and forms including one element, more than one, or less than one thereof, are also within the scope and spirit of the present invention.

Description of Reference Numerals

[0170] In the drawings, 3 is a three-phase inverter (power converter), 5, 5u1, 5v1, 5w1, 5u2, 5v2, 5w2, 5u3, 5v3, 5w3, 5un, 5vn, 5wn are converters, 6u, 6v, 6w are multi-phase converters, 10, 10B are control devices, 11, 11B are control units, 112, 12B are pulse generation units, 12c is an interpolation unit, 22 is a zero current detection unit, SW1 is an upper arm switch, and SW2 is a lower arm switch.

Claims

1. A power converter (3) comprising two or more, n, converters (5u1... 5un, 5v1... 5vn, 5w1... 5wn) connected in parallel, a control unit (11, 11B) that outputs control information according to an input command value, a pulse generation unit (112, 12B) that includes a pulse calculation unit and generates multi-pulses so as to operate the n converters in a multi-operation based on the control information output by the control unit, and an interpolation unit (12b) that generates interpolation multi-pulses for interpolating between a plurality of multi-pulses output to the n converters. The converter is configured using a plurality of switches (SW1, SW2) to which a power supply voltage is input. The pulse calculation unit includes a pulse width counter (24a) that defines the time of the pulse width of the multi-pulses, a start phase counter (24b) that measures based on the time point when counting is started by the pulse width counter and measures a phase of a time shorter than the pulse width measured by the pulse width counter, and measures the timing of turning on any one of the switches of the converter as the start phase, and an end phase counter (24c) that measures based on the time point when counting is ended by the pulse width counter and measures a phase of a time shorter than the pulse width measured by the pulse width counter, and measures the timing of turning off the turned-on switch as the end phase. A power converter that starts outputting a pulse at the start phase of the start phase counter and stops outputting a pulse at the end phase of the end phase counter, thereby generating multi-pulses having the same pulse width and different start phases and end phases.

2. A power converter (3) comprising two or more, n, converters (5u1... 5un, 5v1... 5vn, 5w1... 5wn) connected in parallel, a control unit (11, 11B) that outputs control information according to an input command value, a pulse generation unit (112, 12B) that includes a pulse calculation unit and generates multi-pulses so as to operate the n converters in a multi-operation based on the control information output by the control unit, and an interpolation unit (12b) that generates interpolation multi-pulses for interpolating between a plurality of multi-pulses output to the n converters. The pulse calculation unit includes a start phase counter (24b) that measures the start phase at which each pulse of the multi-pulses starts to be output, A multi-pulse width counter (24d) that measures based on the start phase measured by the start phase counter and measures the pulse width of each of the multi-pulses. A power converter that generates the multi-pulses with the respective pulse widths measured by the multi-pulse width counter each time the start phase is measured by the start phase counter. **Claim 3** The power converter according to claim 1, wherein the pulse operation unit corrects the end phase each time the measurement is completed by the start phase counter and the end phase counter. **Claim 4** A power converter (3) including two or more n converters (5u1... 5un, 5v1... 5vn, 5w1... 5wn) connected in parallel, A control unit (11, 11B) that outputs control information according to an input command value, A pulse generation unit (112, 12B) including a pulse operation unit that generates multi-pulses so as to operate the n converters in multiple based on the control information output by the control unit, An interpolation unit (12b) that generates interpolation multi-pulses for interpolating between a plurality of multi-pulses output to the n converters, A gate drive unit (21) that drives the converter, The converter is configured by a step-down converter using an upper arm switch (SW1) and a lower arm switch (SW2) to which a power supply voltage is input, and an inductor (L) and a capacitor (C). When the current command value as the command value is positive, the gate drive unit drives the upper arm switch of the converter. The pulse operation unit sets the on-time Ton1 and off-time Toff1 of the upper arm switch, the period T, and the phase difference Td between the multi-pulses based on equations (1-1) to (1-4), respectively. When the current command value as the command value is negative, the gate drive unit drives the lower arm switch of the converter. The pulse operation unit sets the on-time Ton2 and off-time Toff2 of the lower arm switch, the period T, and the phase difference Td between the multi-pulses based on equations (2-1) to (2-4). A power converter. Here, Vin: input voltage, Vout: output voltage, IL is the inductor current, L: inductance of the inductor, n: number of multiple operations of the converter. 【Number 1】 【Number 2】

5. A power converter (3) comprising two or more n converters (5u1... 5un, 5v1... 5vn, 5w1... 5wn) connected in parallel, a control unit (11, 11B) that outputs control information according to an input command value; a pulse generation unit (112, 12B) that includes a pulse calculation unit and generates multiple pulses to operate the n converters in a multiplexed manner based on the control information output by the control unit; an interpolation unit (12b) that generates interpolation multiple pulses for interpolating between the multiple pulses output to the n converters, wherein the pulse generation unit generates a first multiplexed pulse according to a first current command value as the command value and a second multiplexed pulse according to a second current command value following the first current command value; when the interpolation unit generates the interpolation multiple pulses between the first multiplexed pulse and the second multiplexed pulse, a power converter that calculates the width of the interpolation multiple pulses and the phase difference between the interpolation multiple pulses based on the first multiplexed pulse and the second multiplexed pulse.

6. The pulse generation unit, a gate drive unit (21) that drives the converter; a zero current detection unit (22) that detects that the current of the converter driven by the gate drive unit has reached zero; a pulse calculation unit (23) that obtains the on-time, period, and phase difference between the multiple pulses when operating the converter and outputs them to the gate drive unit, wherein the gate drive unit drives the converter based on the output of the pulse calculation unit. The power converter according to any one of claims 1 to 5.

7. The pulse generation unit generates a first multiplexed pulse according to a first current command value as the command value and a second multiplexed pulse according to a second current command value following the first current command value, when the interpolation unit generates interpolation multiple pulses between the first multiplexed pulse and the second multiplexed pulse, when the current command value is positive, set the value of the phase difference between the turn-off timings of the upper arm switches between the first multiplexed pulses and the value of the phase difference between the turn-off timings of the upper arm switches between the second multiplexed pulses, and set the value of the phase difference between the turn-off timings of the upper arm switches between the interpolation multiple pulses therebetween; when the current command value is negative, The power converter according to any one of claims 1 to 3, 5, and 6, wherein a value of a phase difference between turn-off timings of the lower arm switches during the first multiple pulses, and a value of a phase difference between turn-off timings of the lower arm switches during the second multiple pulses, are set to a value of a phase difference between turn-off timings of the lower arm switches during the interpolation multiple pulses between them. **Claim 8**: The pulse generation unit generates a first multiple pulse according to a first current command value as the command value, and generates a second multiple pulse according to a second current command value following the first current command value. When the interpolation unit generates the interpolation multiple pulse between the first multiple pulse and the second multiple pulse, The power converter according to any one of claims 1 to 4, which is obtained using a map that stores correspondingly a width of the interpolation multiple pulse corresponding to a multiplicity of the converter and a phase difference between the interpolation multiple pulses. **Claim 9** The power converter according to any one of claims 1 to 3, 5, 6, and 8, which is configured by an isolated type or a non-isolated type. **Claim 10** The power converter according to any one of claims 1 to 3, 5, 6, and 8, wherein the converter is configured by a step-down type, a step-up type, or a buck-boost type converter.

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