Power module semiconductor package and semiconductor device

Abstract

A power module semiconductor package (1) comprises a substrate (5), a first power semiconductor element (17), a second power semiconductor element (41), a heat spreader (31), and a sealing resin (53). In a plan view of the substrate (5) as viewed from a second main surface (5b) thereof, the first power semiconductor element (17) is provided with a region (18) that does not overlap with the second power semiconductor element (41) or the substrate (5). The non-overlapping region (18) is located in a substrate opening (7) of the substrate (5). A first signal terminal (37a) and a first signal electrode (21) of the first power semiconductor element (17) are electrically connected by a first bonding wire (47) through the substrate opening (7).

Description

Technical Field

[0001] The present disclosure relates to a power module semiconductor package and a semiconductor device.

Background Art

[0002] In order to handle high voltages and large currents, semiconductor elements in which the current conduction path is in the longitudinal direction of the semiconductor element are generally called power semiconductor elements. Examples of power semiconductor elements include insulated gate bipolar transistors (IGBTs), metal oxide semiconductor field effect transistors (MOSFETs), bipolar transistors, and diodes.

[0003] There is a power module semiconductor package in which a power semiconductor element is mounted on a circuit board and packaged with a sealing resin. Such a power module semiconductor package is connected to a cooler called a heat sink, control components, etc., and is used as a semiconductor device (power conversion device) in a wide range of fields such as industrial equipment, automobiles, and railways.

[0004] In recent years, with the miniaturization and weight reduction of equipment equipped with semiconductor devices (power conversion devices), there has been an increasing demand for miniaturization and weight reduction in power module semiconductor packages as well. As a structure of a power module semiconductor package, a transfer mold type semiconductor package in which a sealing resin is formed by a transfer molding method is known. Since the transfer mold type semiconductor package has high productivity and high reliability, its development has been actively carried out.

[0005] In a transfer mold type semiconductor package, in order to ensure heat dissipation, a power semiconductor element is mounted on a heat spreader which is a metal member. The electrical connection between the electrodes of the power semiconductor element and the lead frame used as an external terminal is made by bonding wires. Further, the tip portion of the lead frame serving as an external connection terminal protrudes from the encapsulating resin. Furthermore, in order to ensure heat dissipation, the bottom surface (surface) of the heat spreader is exposed on the surface of the encapsulating resin.

[0006] In this transfer mold type semiconductor package, furthermore, in order to ensure heat dissipation during actual operation, a heat sink is joined to the exposed heat spreader. The heat sink is formed in a fin shape. The heat spreader and the heat sink are joined by an insulating layer having heat dissipation and insulation properties. The transfer mold type semiconductor package with a heat sink attached is often used as a semiconductor device (power conversion device).

[0007] Examples of patent documents disclosing power module semiconductor packages include Patent Document 1, Patent Document 2, and Patent Document 3.

Prior Art Documents

Patent Documents

[0008]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0009] As described above, with the miniaturization and the like of equipment equipped with a semiconductor device (power conversion device), miniaturization and the like are strongly demanded also in the power module semiconductor package.

[0010] The present disclosure has been made under such development, and one object is to provide a power module semiconductor package capable of achieving miniaturization, and another object is to provide a semiconductor device as a power conversion device to which such a power module semiconductor package is applied.

Means for Solving the Problems

[0011] The power module semiconductor package according to the present disclosure includes a substrate, a first power semiconductor element, a second power semiconductor element, an external main terminal, a signal terminal, and a sealing resin. The substrate has a first main surface and a second main surface facing each other. The first power semiconductor element is mounted on the first main surface of the substrate. The second power semiconductor element is mounted on the second main surface of the substrate. The external main terminal includes a first external main terminal electrically connected to the first power semiconductor element and a second external main terminal electrically connected to the second power semiconductor element. The signal terminal includes a first signal terminal electrically connected to the first power semiconductor element and a second signal terminal electrically connected to the second power semiconductor element. The sealing resin seals the first power semiconductor element and the second power semiconductor element in a manner that the external main terminal and the signal terminal protrude. The external main terminal is disposed on the side opposite to the side where the signal terminal is disposed with respect to the first power semiconductor element and the second power semiconductor element. The first power semiconductor element and the second power semiconductor element are electrically connected via a via penetrating the substrate. In a plan view seen from the second main surface of the substrate, the first power semiconductor element has a region that does not overlap with the second power semiconductor element and the substrate. The first power semiconductor element and the first signal terminal are electrically connected by a bonding wire connecting between the non-overlapping region in the first power semiconductor element and the first signal terminal.

[0012] The semiconductor device according to the present disclosure is a semiconductor device having the above-described power module semiconductor package, and includes a cooler, a main conversion circuit, and a control circuit. The cooler is mounted on the power module semiconductor package. The main conversion circuit converts the input power and outputs it. The control circuit outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

Advantages of the Invention

[0013] According to the power module semiconductor package of the present disclosure, in a plan view seen from the second main surface of the substrate, the first power semiconductor element has a region that does not overlap with the second power semiconductor element and the substrate. The first power semiconductor element and the first signal terminal are electrically connected by a bonding wire that connects between the non-overlapping region in the first power semiconductor element and the first signal terminal. Thereby, miniaturization and weight reduction can be achieved.

[0014] According to the semiconductor device of the present disclosure, a cooler is mounted on the above-described power module semiconductor package. Thereby, miniaturization and weight reduction of the semiconductor device can be achieved.

Brief Description of the Drawings

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Embodiments for Carrying Out the Invention

[0016] First, in this specification, what seals a power semiconductor element with a molding resin is called a power module semiconductor package. What mounts a cooler such as a heat sink on the power module semiconductor package is called a semiconductor device as a power conversion device.

[0017] Also, in each embodiment, as necessary, the power module semiconductor package etc. are described using the X-Y-Z coordinate axes (three-dimensional coordinate axes).

[0018] Embodiment 1. An example of a power module semiconductor package according to Embodiment 1 will be described. As shown in FIGS. 1, 2, and 3, the power module semiconductor package 1 according to Embodiment 1 includes a substrate 5, a first power semiconductor element 17, a second power semiconductor element 41, a heat spreader 31, a metal block 27, a first bonding wire 47, a second bonding wire 49, a third bonding wire 51, a sealing resin 53, etc.

[0019] The substrate 5 has a first main surface 5a and a second main surface 5b that face each other. On the first main surface 5a of the substrate 5, a first wiring layer 13 and a first external main terminal 11 are formed. On the second main surface 5b of the substrate 5, a second wiring layer 35, a second external main terminal 33, and signal terminals 37 are formed. The first wiring layer 13 and the second wiring layer 35 are electrically connected by a via 9 that penetrates the substrate 5. The signal terminals 37 include a first signal terminal 37a and a second signal terminal 37b. Further, a substrate opening 7 that penetrates the substrate 5 is formed in the substrate 5.

[0020] A first main electrode 19 and a first signal electrode 21 are formed on the first power semiconductor element 17. A second main electrode 43 and a second signal electrode 45 are formed on the second power semiconductor element 41. The first main electrode 19 of the first power semiconductor element 17 is joined to the first wiring layer 13 by solder 23. Also, a metal block 27 is joined to the first external main terminal 11 by solder 23.

[0021] A heat spreader 31 is joined by solder 25 to the side of the first power semiconductor element 17 and the metal block 27 opposite to the side to which the substrate 5 is joined. The second power semiconductor element 41 is joined to the second wiring layer 35 by solder 39.

[0022] In a plan view (X - Y plane) as viewed from the second main surface 5b of the substrate 5, the first power semiconductor element 17 has a region 18 (offset region) that does not overlap with the second power semiconductor element 41 and the substrate 5, and the non - overlapping region 18 is located in the substrate opening 7 of the substrate 5. Through the substrate opening 7, the first signal electrode 21 of the first power semiconductor element 17 and the first signal terminal 37a are electrically connected by a first bonding wire 47.

[0023] Also, the second signal electrode 45 of the second power semiconductor element 41 and the second signal terminal 37b are electrically connected by a second bonding wire 49. The second main electrode 43 of the second power semiconductor element 41 and the second external main terminal 33 are electrically connected by a third bonding wire 51.

[0024] The sealing resin 53 is formed so as to seal the first power semiconductor element 17, the second power semiconductor element 41, etc. in such a manner that the first external main terminal 11, the second external main terminal 33, and the signal terminal 37 protrude and the surface (bottom surface) of the heat spreader 31 is exposed.

[0025] Supplement regarding the power module semiconductor package 1. As the first power semiconductor element 17 and the second power semiconductor element 41, a semiconductor element for power control such as an insulated gate bipolar transistor (IGBT) or a MOS field effect transistor (MOSFET), or a freewheeling diode, etc. is applied.

[0026] The heat spreader 31 is formed of a metal having excellent heat dissipation properties such as copper or aluminum, for example. The first power semiconductor element 17 is joined to the heat spreader 31 by solder 25, but the joining material is not limited to solder 25, and for example, sintered silver or a conductive adhesive may be used, or joining may be performed using a liquid phase diffusion joining technique.

[0027] The metal block 27 is formed of a conductive metal such as copper or aluminum, for example. The metal block 27 has substantially the same thickness as the thickness (Z-axis direction) of the first power semiconductor element 17. The metal block 27 is joined to the heat spreader 31 by solder 25, but sintered silver or a conductive adhesive may be used, or joining may be performed using a liquid phase diffusion joining technique. The metal block 27 has a function of electrically connecting between the heat spreader 31 and the first external main terminal 11 and guiding the current flowing from the first power semiconductor element 17 to the heat spreader 31 to the first external main terminal 11.

[0028] If it is possible to electrically connect between the heat spreader 31 and the first external main terminal 11, it is not limited to the metal block 27. For example, solder balls or metal balls may be applied. Further, as the heat spreader 31, a heat spreader provided with a protrusion by forging may be applied in advance.

[0029] Here, the substrate 5 assumes a glass epoxy-based organic insulating substrate. As the substrate 5, an insulating film applying a polymer material such as liquid crystal polymer or polyimide may be applied. Further, as the substrate 5, an inorganic insulating substrate such as ceramic may be applied.

[0030] The first wiring layer 13 and the first external main terminal 11 formed on the first main surface 5a of the substrate 5 are formed, for example, by patterning by etching a metal layer such as copper. Also, the second wiring layer 35 and the second external main terminal 33 formed on the second main surface 5b of the substrate 5 are also formed by patterning by etching a metal layer such as copper.

[0031] The first main electrode 19 of the first power semiconductor element 17 is joined to the first wiring layer 13 by solder 23. The metal block 27 is joined to the first external main terminal 11 by solder 23. The joining material is not limited to solder 23. For example, sintered silver or a conductive adhesive may be used, or joining may be performed using a liquid phase diffusion joining technique.

[0032] The second power semiconductor element 41 (back side) is joined to the second wiring layer 35 by solder 39. The joining material is not limited to solder 39. For example, sintered silver or a conductive adhesive may be used, or joining may be performed using a liquid phase diffusion joining technique. The first main electrode 19 of the first power semiconductor element 17 and the second power semiconductor element 41 (back surface) are electrically connected via the first wiring layer 13, via 9, and the second wiring layer 35.

[0033] The first bonding wire 47 that electrically connects the first signal electrode 21 of the first power semiconductor element 17 and the first signal terminal 37a is formed to pass through the substrate opening 7. The second bonding wire 49 that electrically connects the second signal electrode 45 of the second power semiconductor element 41 and the second signal terminal 37b is formed to straddle the substrate opening 7. The third bonding wire 51 that electrically connects the second main electrode 43 of the second power semiconductor element 41 and the second external main terminal 33 is formed on the side of the second power semiconductor element 41 opposite to the side where the substrate opening 7 is located (negative X-axis direction). The power module semiconductor package 1 according to the first embodiment is configured as described above.

[0034] Next, the current flow in the power module semiconductor package 1 described above will be explained. First, from outside the power module semiconductor package 1, current is input to the second external main terminal 33. The current input to the second external main terminal 33 flows into the second main electrode 43 of the second power semiconductor element 41 via the third bonding wire 51.

[0035] The current flowing into the second main electrode 43 flows from the back surface of the second power semiconductor element 41 through the second wiring layer 35, via the via 9 and the first wiring layer 13, and into the first main electrode 19 of the first power semiconductor element 17. The current flowing into the first main electrode 19 is output from the back surface of the first power semiconductor element 17 to the outside of the power module semiconductor package 1 via the heat spreader 31, the metal block 27, and the first external main terminal 11.

[0036] On the other hand, from the first signal electrode 21 of the first power semiconductor element 17, a signal current is output to the first signal terminal 37a via the first bonding wire 47. Also, from the second signal electrode 45 of the second power semiconductor element 41, a signal current is output to the second signal terminal 37b via the second bonding wire 49.

[0037] Next, an example of the manufacturing method of the power module semiconductor package 1 described above will be briefly explained.

[0038] First, as shown in FIG. 4, the first power semiconductor element 17 and the metal block 27 are joined to the surface of the heat spreader 31 by solder 25. Next, a substrate 5 having a first main surface 5a and a second main surface 5b facing each other is prepared (see FIG. 5). In advance, a first wiring layer 13 and a first external main terminal 11 are formed on the first main surface 5a of the substrate 5. Also, a second wiring layer 35, a second external main terminal 33, and a signal terminal 37 are formed on the second main surface 5b of the substrate 5. Further, a substrate opening 7 is formed in the substrate 5 so as to penetrate the substrate 5.

[0039] Next, as shown in FIG. 5, the first main electrode 19 of the first power semiconductor element 17 and the first wiring layer 13 are joined by solder 23, and the metal block 27 and the first external main terminal 11 are joined by solder 23. Next, as shown in FIG. 6, the second wiring layer 35 and the second power semiconductor element 41 (back surface) are joined by solder 39.

[0040] Next, as shown in FIG. 7, the first signal electrode 21 of the first power semiconductor element 17 and the first signal terminal 37a are electrically connected by a first bonding wire 47 through the substrate opening 7. The second signal electrode 45 of the second power semiconductor element 41 and the second signal terminal 37b are electrically connected by a second bonding wire 49 so as to straddle the substrate opening 7. The second main electrode 43 of the second power semiconductor element 41 and the second external main terminal 33 are electrically connected by a third bonding wire 51.

[0041] Next, the first power semiconductor element 17, the second power semiconductor element 41, etc. mounted on the substrate 5 are arranged, for example, in a transfer mold (not shown), and a sealing resin 53 (see FIG. 8) is filled. Then, by taking it out of the transfer mold, as shown in FIG. 8, the power module semiconductor package 1 sealed with the sealing resin 53 is completed.

[0042] In the above-described power module semiconductor package 1, in a plan view (X-Y plane) as viewed from the second main surface 5b of the substrate 5, the first power semiconductor element 17 has a region 18 (offset region) that does not overlap with the second power semiconductor element 41 and the substrate 5. Thereby, miniaturization and the like of the power module semiconductor package 1 can be achieved. This will be described in comparison with a power module semiconductor package according to a comparative example.

[0043] First, the power module semiconductor package according to the first comparative example will be described. As shown in FIGS. 9 and 10, in the power module semiconductor package 501 according to the first comparative example, two copper patterns 505 are formed on one main surface of the insulating substrate 503. The first power semiconductor element 507 is joined to one of the copper patterns 505. The second power semiconductor element 509 is joined to the other copper pattern 505.

[0044] The signal terminal 515 and the first power semiconductor element 507 are electrically connected by a bonding wire 519. The first external main terminal 511 and the first power semiconductor element 507 are electrically connected via one of the copper patterns 505. The first power semiconductor element 507 and the second power semiconductor element 509 are electrically connected by the bonding wire 519 and the other copper pattern 505.

[0045] The signal terminal 515 and the second power semiconductor element 509 are electrically connected by a bonding wire 519. The second external main terminal 513 and the second power semiconductor element 509 are electrically connected by a bonding wire 519. Each of the signal terminal 515, the first external main terminal 511, and the second external main terminal 513 is formed from a lead frame 517.

[0046] In the power module semiconductor package 501 according to the first comparative example, two copper patterns 505 are formed on one main surface of the insulating substrate 503, the first power semiconductor element 507 is joined to one copper pattern 505, and the second power semiconductor element 509 is joined to the other copper pattern 505. Further, a signal terminal 515, a first external main terminal 511, and a second external main terminal 513 formed from a lead frame 517 are arranged so as to surround the insulating substrate 503. For this reason, there is a limit to miniaturizing the power module semiconductor package 501.

[0047] Next, the power module semiconductor package 501 according to the second comparative example will be described. As shown in FIG. 11, an organic layer 559 is formed so as to surround the periphery of the heat spreader 551. On the surface of the heat spreader 551 and the like, a laminated structure in which a plurality of organic layers 559 and a plurality of plated wiring layers 557 including vias are laminated is formed. In the laminated structure, the first power semiconductor element 507 and the second power semiconductor element 509 are arranged in such a manner that the second power semiconductor element 509 is positioned above the first power semiconductor element 507. At the outer peripheral portion of the laminated structure, the plated wiring layers 557 serving as the first external main terminal 511, the second external main terminal 513, and the signal terminal 515 are exposed.

[0048] In the power module semiconductor package 501 according to the second comparative example, it becomes extremely difficult to manufacture with existing manufacturing equipment using solder or bonding wires or the like. Further, it takes a long time to form the plated wiring layer, and the manufacturing cost increases.

[0049] For the first comparative example and the second comparative example, in the power module semiconductor package 1 according to the first embodiment, the first power semiconductor element 17 is joined to the first main surface 5a of the substrate 5, and the second power semiconductor element 41 is joined to the second main surface 5b. Moreover, in a plan view (X-Y plane) seen from the second main surface 5b of the substrate 5, the first power semiconductor element 17 has a region 18 (offset region) that does not overlap with the second power semiconductor element 41 and the substrate 5. The first signal electrode 21 located in the non-overlapping region 18 and the signal terminal 37 are electrically connected by the first bonding wire 47.

[0050] As described above, in the power module semiconductor package 1, the first power semiconductor element 17 and the second power semiconductor element 41 are stacked in the Z-axis direction, and the first power semiconductor element 17 is provided with a region 18 (offset region) that does not overlap with the second power semiconductor element 41 and the substrate 5.

[0051] Thereby, while reducing the size of the power module semiconductor package 1, it can be manufactured using existing manufacturing equipment such as solder or bonding wires. As a result, the size of the power module semiconductor package 1 can be reduced, the weight can be reduced as the size is reduced, and the manufacturing cost can also be suppressed.

[0052] Embodiment 2. An example of the power module semiconductor package according to the second embodiment will be described. As shown in FIGS. 12, 13, and 14, in the power module semiconductor package 1 according to the second embodiment, a metal frame 55 is applied instead of the heat spreader 31 and the metal block 27 in the power module semiconductor package 1 described above. In the metal frame 55, a portion (die pad) on which the first power semiconductor element 17 is mounted, the first external main terminal 11, and the signal terminal 37 are integrally formed.

[0053] In a plan view (X-Y plane) seen from the second main surface 5b, the first power semiconductor element 17 has a region 18 (offset region) that does not overlap with the second power semiconductor element 41 and the signal terminal 37. The signal terminal 37 is disposed at a position spaced apart from the non-overlapping region 18 in the X-axis direction.

[0054] The first signal electrode 21 of the first power semiconductor element 17 located in the non-overlapping region 18 and the signal terminal 37 are electrically connected by a first bonding wire 47. On the back surface (Z-axis negative direction side) of the encapsulating resin 53, the surface of the metal frame 55 is exposed.

[0055] For other configurations, since they are the same as those of the power module semiconductor package 1 shown in FIGS. 1 to 3, the same reference numerals are given to the same members, and the description thereof will not be repeated unless necessary.

[0056] Next, an example of a method for manufacturing the above-described power module semiconductor package 1 will be described. First, a metal frame 55 is prepared (see FIG. 15). In the metal frame 55, a portion (die pad) on which the first power semiconductor element 17 is mounted, the first external main terminal 11, and the signal terminal 37 are integrally formed. Next, as shown in FIG. 15, the back surface of the first power semiconductor element 17 and the metal frame 55 are joined by solder 25.

[0057] Next, a substrate 5 having a first main surface 5a and a second main surface 5b facing each other is prepared (see FIG. 16). In advance, a first wiring layer 13 is formed on the first main surface 5a of the substrate 5. Also, a second wiring layer 35 and a second external main terminal 33 are formed on the second main surface 5b of the substrate 5. Next, as shown in FIG. 16, the first power semiconductor element 17 and the first wiring layer 13 of the substrate 5 are joined by solder 23. Also, the first external main terminal 11 in the metal frame 55 is joined to the first main surface 5a of the substrate 5.

[0058] Next, as shown in FIG. 17, the second wiring layer 35 of the substrate 5 and the second power semiconductor element 41 (back surface) are joined by solder 39. Next, as shown in FIG. 18, the first signal electrode 21 of the first power semiconductor element 17 and the first signal terminal 37a are electrically connected by the first bonding wire 47. The second signal electrode 45 of the second power semiconductor element 41 and the second signal terminal 37b are electrically connected by the second bonding wire 49. The second main electrode 43 of the second power semiconductor element 41 and the second external main terminal 33 are electrically connected by the third bonding wire 51.

[0059] Next, the first power semiconductor element 17, the second power semiconductor element 41, etc. mounted on the substrate 5 are arranged, for example, in a transfer mold (not shown), and the encapsulating resin 53 (see FIG. 19) is filled. Thereafter, by taking it out from the transfer mold, as shown in FIG. 19, the power module semiconductor package 1 encapsulated by the encapsulating resin 53 is completed.

[0060] In the power module semiconductor package 1 according to the second embodiment, the first power semiconductor element 17 is joined to the first main surface 5a of the substrate 5, and the second power semiconductor element 41 is joined to the second main surface 5b. Moreover, in a plan view (X-Y plane) as viewed from the second main surface 5b of the substrate 5, the first power semiconductor element 17 has a region 18 (offset region) that does not overlap with the second power semiconductor element 41 and the signal terminal 37. The first signal electrode 21 and the signal terminal 37 located in the non-overlapping region 18 are electrically connected by the first bonding wire 47.

[0061] Thereby, while reducing the size of the power module semiconductor package 1, it can be manufactured using existing manufacturing equipment such as solder or bonding wires. As a result, it is possible to reduce the size of the power module semiconductor package 1 and the weight reduction associated with the size reduction, and the manufacturing cost can also be suppressed.

[0062] In addition, in the power module semiconductor package 1 described above, the substrate 5 in which the substrate opening 7 is not formed is used. Further, the first external main terminal 11 and the signal terminal 37 are formed from the metal frame 55. Thereby, it is possible to contribute to the reduction of the production cost including the cost required for the substrate 5. Further, since it is not necessary to pass the first bonding wire 47 through the substrate opening, the bonding wire can be performed more easily.

[0063] Embodiment 3. An example of a power module semiconductor package according to Embodiment 3 will be described. As shown in FIG. 20, in the power module semiconductor package 1 according to Embodiment 3, a metal plate 61 is joined via an insulating material 63 to the surface of the heat spreader 31 on the side opposite to the side to which the first power semiconductor element 17 is joined. The metal plate 61 is exposed from the sealing resin 53.

[0064] As the insulating material 63, in order to achieve both insulation and heat dissipation properties, an inorganic filler such as alumina, boron nitride, silica, aluminum nitride, etc. having excellent thermal conductivity may be applied. Further, as the insulating material 63, a thermally conductive sheet mixed with a thermosetting resin may be applied. Note that for other configurations, since they are the same as the configuration of the power module semiconductor package 1 shown in FIGS. 1 to 3, the same members are denoted by the same reference numerals, and the description thereof will not be repeated unless necessary.

[0065] In the power module semiconductor package 1 described above, in addition to the effects such as miniaturization described in Embodiment 1, the following effects can be obtained.

[0066] An insulating material 63 is interposed between the heat spreader 31 and the metal plate 61. Thereby, when a cooler such as a heat sink is attached to the metal plate 61, for example, insulation between the cooler and the first power semiconductor element 17 or the like can be ensured. As a result, the cooler can be more firmly fixed to the metal plate 61 using a metal bonding material such as solder.

[0067] Embodiment 4. An example of the power module semiconductor package according to Embodiment 4 will be described. As shown in FIG. 21, in the power module semiconductor package 1 according to Embodiment 4, a metal plate 61 is joined to the surface of the metal frame 55 on the side opposite to the side where the first power semiconductor element 17 is joined, with an insulating material 63 interposed therebetween. The metal plate 61 is exposed from the encapsulating resin 53.

[0068] In order to achieve both insulation and heat dissipation properties, the insulating material 63 is applied with an inorganic filler such as alumina, boron nitride, silica, aluminum nitride, or a thermally conductive sheet mixed with a thermosetting resin. Regarding other configurations, since they are the same as those of the power module semiconductor package 1 shown in FIGS. 12 to 14, the same reference numerals are assigned to the same members, and the description thereof will not be repeated unless necessary.

[0069] In the above-described power module semiconductor package 1, in addition to the effects such as miniaturization described in Embodiment 2, the following effects can be obtained.

[0070] An insulating material 63 is interposed between the metal frame 55 and the metal plate 61. Thereby, when, for example, a cooler (heat sink) is attached to the metal plate 61, insulation between the cooler and the first power semiconductor element 17 or the like can be ensured. As a result, the cooler can be more firmly fixed to the metal plate 61 using a metal bonding material such as solder.

[0071] Embodiment 5. An example of the power module semiconductor package according to Embodiment 5 will be described. As shown in FIG. 22, in the power module semiconductor package 1 according to Embodiment 5, an insulating substrate 65 is provided. A first copper pattern 67 is joined to one surface (lower surface) of the insulating substrate 65. A second copper pattern 69 is joined to the other surface (upper surface) of the insulating substrate 65.

[0072] The second copper pattern 69 and the first wiring layer 13 are joined by solder 23. Also, the second copper pattern 69 and the metal block 27 are joined by solder 23. The first copper pattern 67 is exposed from the surface of the encapsulating resin 53. Regarding the other configurations, since they are the same as those of the power module semiconductor package 1 shown in FIGS. 1 to 3, the same members are denoted by the same reference numerals, and the description thereof will not be repeated unless necessary.

[0073] In the power module semiconductor package 1 described above, in addition to the effects of miniaturization and the like described in the first embodiment, the following effects can be obtained.

[0074] An insulating substrate 65 is interposed between the first copper pattern 67 and the second copper pattern 69. Thereby, when, for example, a cooler (heat sink) is attached to the first copper pattern 67, insulation between the cooler and the first power semiconductor element 17 or the like can be ensured. As a result, the cooler can be more firmly fixed to the first copper pattern 67 using a metal bonding material such as solder.

[0075] Embodiment 6. An example of a power module semiconductor package according to Embodiment 6 will be described. As shown in FIG. 23, in the power module semiconductor package 1 according to Embodiment 6, an insulating substrate 65 is provided. A first copper pattern 67 is joined to one surface (lower surface) of the insulating substrate 65. A second copper pattern 69 is joined to the other surface (upper surface) of the insulating substrate 65.

[0076] The second copper pattern 69 and the first wiring layer 13 are joined by solder 23. Also, the second copper pattern 69 and the first external main terminal 11 are joined by solder 71. The first copper pattern 67 is exposed from the surface of the encapsulating resin 53. Regarding the other configurations, since they are the same as those of the power module semiconductor package 1 shown in FIGS. 12 to 14, the same members are denoted by the same reference numerals, and the description thereof will not be repeated unless necessary.

[0077] In the above-described power module semiconductor package 1, in addition to the effects such as miniaturization described in the second embodiment, the following effects can be obtained.

[0078] An insulating substrate 65 is interposed between the first copper pattern 67 and the second copper pattern 69. As a result, when, for example, a cooler (heat sink) is attached to the first copper pattern 67, insulation between the cooler and the first power semiconductor element 17 or the like can be ensured. As a result, the cooler can be more firmly fixed to the first copper pattern 67 using a metal bonding material such as solder.

[0079] Embodiment 7. Here, a semiconductor device as a power conversion device in which a heat sink is attached to the power module semiconductor package 1 will be described.

[0080] (First example) As shown in FIG. 24, in the semiconductor device 3 according to the first example, a heat sink 75 is joined to the surface (lower surface) of the heat spreader 31 exposed from the encapsulating resin 53 with an insulating material 73 interposed therebetween. For other configurations, since they are the same as those of the power module semiconductor package 1 shown in FIGS. 1 to 3, the same reference numerals are given to the same members, and the description thereof will not be repeated unless necessary.

[0081] In the semiconductor device 3 according to the first example described above, in addition to the effects such as miniaturization described in the first embodiment, the following effects can be obtained.

[0082] In the semiconductor device 3 according to the first example, a heat sink 75 is attached to the power module semiconductor package. Heat generated in the power module semiconductor package is transmitted to the heat sink 75 via the insulating material 73. As a result, the heat dissipation performance of the semiconductor device 3 can be further improved.

[0083] (Second example) As shown in Fig. 25, in the semiconductor device 3 according to the second example, an insulating substrate 65 is provided. On one surface (lower surface) of the insulating substrate 65, a first copper pattern 67 is joined, and on the other surface (upper surface), a second copper pattern 69 is joined. A heat sink 75 is joined to the first copper pattern 67 exposed from the surface of the encapsulating resin 53 by a conductive metal bonding material 77.

[0084] Regarding other configurations, since they are the same as those of the power module semiconductor package 1 shown in Fig. 22, the same reference numerals are given to the same members, and the description thereof will not be repeated unless necessary.

[0085] In the semiconductor device 3 according to the second example described above, in addition to the effects such as miniaturization described in Embodiment 5, the following effects can be obtained.

[0086] In the semiconductor device 3 according to the second example, an insulating substrate 65 is interposed between the first copper pattern 67 and the second copper pattern 69. Therefore, when attaching the heat sink 75 to the first copper pattern 67, insulation between the heat sink 75 and the first power semiconductor element 17 etc. is ensured. As a result, the heat sink 75 can be joined to the first copper pattern 67 by the conductive metal bonding material 77, and the heat generated in the power module semiconductor package 1 is efficiently transmitted to the heat sink 75 via the conductive metal bonding material 77. Consequently, the heat dissipation performance of the semiconductor device 3 can be further improved.

[0087] Embodiment 8. Here, a semiconductor device as a power conversion device in which a cooler such as a heat sink is attached to the power module semiconductor package 1 described in Embodiments 1 to 6, or the semiconductor device 3 as a power conversion device described in Embodiment 7 will be described. Although the present disclosure is not limited to a specific semiconductor device, hereinafter, as Embodiment 8, the case where the present disclosure is applied to a three-phase inverter will be described.

[0088] FIG. 26 is a block diagram showing the configuration of a power conversion system to which the semiconductor device according to the present embodiment is applied. The power conversion system shown in FIG. 26 includes a power supply 100, a semiconductor device 200, and a load 300. The power supply 100 is a DC power supply and supplies DC power to the semiconductor device 200. The power supply 100 can be configured by various means, for example, it can be configured by a DC system, a solar cell, or a storage battery. Further, the power supply 100 may be configured by a rectifier circuit or an AC / DC converter connected to an AC system. Alternatively, the power supply 100 may be configured by a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0089] The semiconductor device 200 is a three-phase inverter connected between the power supply 100 and the load 300, converts the DC power supplied from the power supply 100 into AC power, and supplies the AC power to the load 300. As shown in FIG. 26, the semiconductor device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201.

[0090] The load 300 is a three-phase motor driven by the AC power supplied from the semiconductor device 200. Note that the load 300 is not limited to a specific application and is a motor mounted on various electrical devices. For example, it is used as a motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioner.

[0091] Hereinafter, the details of the semiconductor device 200 will be described. The main conversion circuit 201 includes a switching element and a freewheeling diode (not shown). By switching the switching element, the DC power supplied from the power supply 100 is converted into AC power and supplied to the load 300. Although there are various specific circuit configurations of the main conversion circuit 201, the main conversion circuit 201 according to the present embodiment is a two-level three-phase full-bridge circuit and can be configured by six switching elements and six freewheeling diodes connected in anti-parallel to the respective switching elements.

[0092] At least one of each switching element and each freewheeling diode of the main conversion circuit 201 is a switching element or a freewheeling diode included in a semiconductor module 202 corresponding to the power module semiconductor package 1 according to at least one of the above-described Embodiments 1 to 7. The six switching elements are connected in series in pairs of two switching elements to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. Then, the output terminals of each upper and lower arm, that is, the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0093] Further, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be incorporated in the semiconductor module 202, or may be configured to include a drive circuit separately from the semiconductor module 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201 and supplies it to the control electrode of the switching element of the main conversion circuit 201. Specifically, in accordance with a control signal from a control circuit 203 described later, a drive signal for turning on the switching element and a drive signal for turning off the switching element are output to the control electrodes of the respective switching elements. When maintaining the switching element in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when maintaining the switching element in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.

[0094] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that desired power is supplied to the load 300. Specifically, based on the power to be supplied to the load 300, the time (on-time) during which each switching element of the main conversion circuit 201 should be in the on state is calculated. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on-time of the switching element according to the voltage to be output. Then, a control command (control signal) is output to the drive circuit included in the main conversion circuit 201 so that an on signal is output to the switching element that should be in the on state at each time point, and an off signal is output to the switching element that should be in the off state. The drive circuit outputs an on signal or an off signal to the control electrode of each switching element as a drive signal according to this control signal.

[0095] In the semiconductor device 200 according to the present embodiment, since the power module semiconductor package 1 according to Embodiments 1 to 7 is applied as the semiconductor module 202 constituting the main conversion circuit 201, miniaturization, weight reduction, etc. can be realized.

[0096] In this embodiment, an example in which the present invention is applied to a two-level three-phase inverter has been described. However, the present disclosure is not limited to this, and can be applied to various semiconductor devices. In this embodiment, a two-level semiconductor device is used, but a three-level or multi-level semiconductor device may be used. When supplying power to a single-phase load, the present disclosure may be applied to a single-phase inverter. Further, when supplying power to a DC load or the like, the present disclosure can also be applied to a DC / DC converter or an AC / DC converter.

[0097] Further, the semiconductor device to which the present disclosure is applied is not limited to the case where the above-described load is an electric motor. For example, it can also be used as a power supply device for a discharge processing machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system. Furthermore, it can also be used as a power conditioner for a solar power generation system or a power storage system.

[0098] Regarding the power module semiconductor packages and the like described in each embodiment, various combinations can be made as necessary.

[0099] The embodiments disclosed this time are illustrative and not limited thereto. The present disclosure is not within the scope described above, but is indicated by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

Industrial Applicability

[0100] The present disclosure is effectively used in a power module semiconductor package mounted with a power semiconductor element and a semiconductor device including the power module semiconductor package and a cooler.

Explanation of Signs

[0101] 1 Power module semiconductor package, 3 Semiconductor device, 5 Substrate, 5a First main surface, 5b Second main surface, 7 Substrate opening, 9 Via, 11 First external main terminal, 13 First wiring layer, 15 Solder, 17 First power semiconductor element, 18 Non-overlapping region, 19 First main electrode, 21 First signal electrode, 23, 25 Solder, 27 Metal block, 29 Solder, 31 Heat spreader, 33 Second external main terminal, 35 Second wiring layer, 37 Signal terminal, 37a First signal terminal, 37b Second signal terminal, 39 Solder, 41 Second power semiconductor element, 43 Second main electrode, 45 Second signal electrode, 47 First bonding wire, 49 Second bonding wire, 51 Third bonding wire, 53 Encapsulating resin, 55 Metal frame, 61 Metal plate, 63 Insulating material, 65 Insulating substrate, 67 First copper pattern, 69 Second copper pattern, 71 Solder, 73 Insulating material, 75 Heat sink, 77 Conductive metal bonding material, 100 Power supply, 200 Semiconductor device, 201 Main conversion circuit, 202 Semiconductor module, 203 Control circuit, 300 Load.

Claims

1. A substrate having a first main surface and a second main surface facing each other, A first power semiconductor device mounted on the first main surface of the substrate, A second power semiconductor device mounted on the second main surface of the substrate, An external main terminal including a first external main terminal electrically connected to the first power semiconductor device and a second external main terminal electrically connected to the second power semiconductor device, A signal terminal including a first signal terminal electrically connected to the first power semiconductor device and a second signal terminal electrically connected to the second power semiconductor device, A sealing resin that seals the first power semiconductor device and the second power semiconductor device in a manner that the external main terminal and the signal terminal protrude, having, The external main terminal is disposed on the side opposite to the side where the signal terminal is disposed with respect to the first power semiconductor device and the second power semiconductor device, The first power semiconductor device and the second power semiconductor device are electrically connected via a via penetrating the substrate, In a plan view seen from the second main surface of the substrate, the first power semiconductor device has a region that does not overlap with the second power semiconductor device and the substrate, The first power semiconductor device and the first signal terminal are electrically connected by a bonding wire connecting between the non-overlapping region in the first power semiconductor device and the first signal terminal, a power module semiconductor package.

2. A substrate opening penetrating the substrate is formed in the substrate, In a plan view seen from the second main surface of the substrate, the non-overlapping region is located in the substrate opening, the power module semiconductor package according to claim 1.

3. A power module semiconductor package according to claim 2, comprising a heat spreader that is joined to the side of the first power semiconductor element opposite to the side to which the substrate is joined and is electrically connected to the first external main terminal and the first power semiconductor element.

4. A first metal plate is joined to the heat spreader on the side opposite to the side to which the first power semiconductor element is joined, with a first insulating material interposed therebetween. The power module semiconductor package according to claim 3, wherein the first metal plate is exposed from the encapsulating resin.

5. Comprising a metal frame including the first external main terminal and the signal terminal. The power module semiconductor package according to claim 1, wherein in a plan view seen from the second main surface of the substrate, the signal terminal is disposed at a distance from the non-overlapping region.

6. The power module semiconductor package according to claim 5, wherein the metal frame is joined to the side of the first power semiconductor element opposite to the side to which the substrate is joined.

7. A second metal plate is joined to the metal frame on the side opposite to the side to which the first power semiconductor element is joined, with a second insulating material interposed therebetween. The power module semiconductor package according to claim 5, wherein the second metal plate is exposed from the encapsulating resin.

8. Comprising an insulating substrate joined to the side of the first power semiconductor element opposite to the side to which the substrate is joined. The insulating substrate includes an insulating plate having a third main surface and a fourth main surface facing each other, a first conductive pattern formed on the third main surface of the insulating plate, and a second conductive pattern formed on the fourth main surface of the insulating plate. And the first conductive pattern is exposed from the encapsulating resin. The power module semiconductor package according to claim 1 or 5, wherein the first power semiconductor element and the first external main terminal are joined to the second conductive pattern.

9. A semiconductor device having the power module semiconductor package according to any one of claims 1 to 8, a cooler mounted on the power module semiconductor package; a main conversion circuit that converts and outputs input power; and a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit A semiconductor device comprising.

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