Method and apparatus for FMCW radar processing

Abstract

Optimize radar memory requirements. In the described example, a radar device (100) includes a transmitter (101) that transmits a first chirp. The first chirp is spread by one or more obstacles to generate spread signals. A plurality of receivers (110) receive the spread signals. Each of the receivers (110) generates a digital signal in response to one of the spread signals. A processor (120) is coupled to the receivers (110) and receives the digital signals from the receivers (110). The processor (120) performs a range FFT (Fast Fourier Transform) and an angle FFT on the digital signals received from the receivers (110) to generate a first matrix of complex samples.

Description

Technical Field

[0001] This application generally relates to radar, and more particularly to optimizing the memory requirements of a radar.

Background Art

[0002] The use of radar in automotive applications is rapidly evolving. Radar has found applications in many vehicle-related applications such as collision warning, blind spot warning, lane change assistance, parking assistance, and rear collision warning. In such applications, pulsed radar and FMCW (Frequency Modulated Continuous Wave) radar are mainly used.

[0003] In an FMCW radar, a local oscillator generates a frequency ramp segment by frequency modulating a transmission signal. The frequency ramp segment is also called a chirp. The frequency ramp segment is amplified and emitted by one or more transmission units. The frequency ramp segment is scattered by one or more obstacles to generate a scattered signal. The scattered signal is received by one or more receiving units in the FMCW radar. The signal obtained by mixing the frequency ramp segment and the scattered signal is called an IF (Intermediate Frequency) signal. The frequency (f) of the IF signal is proportional to the distance (d) of the obstacle from the FMCW radar and also to the slope (S) of the frequency ramp segment.

[0004] The IF signal is sampled by an ADC (Analog-to-Digital Converter). The sampled data generated by the ADC is processed by a processor to obtain the positions and velocities of one or more obstacles. In certain types of FMCW radars, the processor performs FFT (Fast Fourier Transform)-based coherent processing on the sampled data. However, this conventional processing requires a large amount of memory in the processor. This has an adverse effect on the size of the FMCW radar.

[0005] Some existing FMCW radars use known memory compression techniques to compress the data generated in the FFT process. However, these memory compression techniques are inherently lossy, and as a result, the accuracy of the radar system deteriorates. Another conventional approach to reducing memory is based on limiting the range of the FMCW radar that can be observed in a single frame of the FFT process. Therefore, multiple frames are transmitted by the transmitting unit, and each frame is dedicated to a specific range (range). In this approach, multiple frames are required for a single observation, so the power consumption of the FMCW radar increases, and it becomes difficult to use the FMCW radar in real-time application examples. SUMMARY OF THE INVENTION

[0006] In the example described, the radar device includes a transmitter that transmits a first chirp. The first chirp is scattered by one or more obstacles to generate a scattered signal. A plurality of receivers receive the scattered signal. Each of the receivers generates a digital signal in response to one of the scattered signals. A processor is coupled to the receivers and receives the digital signals from the receivers. The processor performs a range FFT (Fast Fourier Transform) and an angle FFT on the digital signals received from the receivers to generate a first matrix of complex samples. BRIEF DESCRIPTION OF THE DRAWINGS

[0007]

Figure 1

[0008]

Figure 2A

Figure 2B

Figure 2C

[0009]

Figure 3A

Figure 3B

[0010]

Figure 4

[0011]

Figure 5

DETAILED DESCRIPTION OF THE INVENTION

[0012] FIG. 1 illustrates a radar device 100 according to one embodiment. The radar device 100 includes a transmitter 101. The transmitter 101 includes a local oscillator 102 and a transmitting antenna 104. The transmitting antenna 104 is coupled to the local oscillator 102. In one version, a power amplifier is coupled between the local oscillator 102 and the transmitting antenna 104. The radar device 100 also includes a receiver 110. The receiver 110 includes a receiving antenna 108, a low noise amplifier (LNA) 112, a mixer 114, an intermediate frequency (IF) filter 116, and an analog-to-digital converter (ADC) 118. The LNA 112 is coupled to the receiving antenna 108. The mixer 114 is coupled to the LNA 112. The mixer 114 is also coupled to the local oscillator 102.

[0013] The IF filter 116 is coupled to the mixer 114. The ADC 118 is coupled to the IF filter 116. The processor 120 is coupled to the ADC 118. In one version, the radar device 100 includes a plurality of receivers that are similar to the receiver 110 in connection and operation. Each of the receivers includes a receiving antenna, an LNA, a mixer, an IF filter, and an ADC. The ADC in each of the receivers is coupled to the processor 120. In one example, the radar device 100 includes a plurality of processors, and each of the receivers is coupled to one of the processors. The radar device 100 may include one or more additional components that are not described here for the sake of brevity.

[0014] In the operation of the radar device 100 of FIG. 1, the local oscillator 102 generates a frequency ramp segment (also referred to as a chirp). In one example, a power amplifier is coupled between the local oscillator 102 and the transmitting antenna 104. The chirp is amplified by the power amplifier and provided to the transmitting antenna 104. The transmitting antenna 104 in the transmitter 101 transmits the chirp. The chirp is scattered by one or more obstacles to generate a plurality of scattered signals.

[0015] One of the scattered signals is received by the receiver 110. The receiving antenna 108 receives the scattered signal. The LNA 112 amplifies the scattered signal. The mixer 114 mixes the chirp generated by the local oscillator 102 with the LNA 112 received from the amplified scattered signal. The mixer 114 generates an IF (intermediate frequency) signal. The IF signal is filtered by the IF filter 116 to generate a filtered IF signal. The ADC 118 samples the filtered IF signal to generate a digital signal.

[0016] In the above example, when the radar device 100 includes a plurality of receivers, each of the receivers receives one of the spread signals and generates a digital signal. The spread signal is generated corresponding to the chirp transmitted by the transmitting antenna 104. Therefore, the processor 120 receives the digital signal from the receiver.

[0017] The digital signal is processed by the processor 120 to obtain the range and angle of one or more obstacles. The processor 120 performs an FFT (Fast Fourier Transform) on the digital signal. The peak in the FFT spectrum represents an obstacle, and the position of the peak in the FFT spectrum is proportional to the relative distance of the obstacle from the radar device 100. The processing performed by the processor 120 will be described later in the explanations related to FIGS. 3A and 3B.

[0018] FIGS. 2A to 2C illustrate the FFT processing in the radar device. The FFT processing is described in relation to the radar device 100. The radar device 100 transmits a plurality of chirps. A set of chirps forms a certain frame. In one example, the frame includes N chirps, where N is an integer. One of the N chirps is spread by one or more obstacles, and a plurality of spread signals are generated.

[0019] When the radar device 100 includes a plurality of receivers, each of the receivers receives one of the spread signals and generates a digital signal. Therefore, the processor 120 receives the digital signal from the receiver. The digital signal corresponds to one of the N chirps.

[0020] The processor 120 performs a range FFT (Fast Fourier Transform) or 1D FFT over each digital signal received from the receiver. The range FFT data generated by the processor 120 over the receivers and over the set of chirps is stored in the primary memory within the processor 120. This is illustrated in FIG. 2A for the case of four receivers.

[0021] Figure 2A illustrates four matrices represented as M1, M2, M3, and M4 that are generated corresponding to four receivers. These matrices are stored in the primary memory. The frame includes the first chirp, the second chirp to the Nth chirp. The processor 120 receives digital signals from the four receivers corresponding to the first chirp (chirp #1). The first receiver generates a first digital signal with respect to the first chirp (chirp #1). The processor 120 generates range FFT data 202 corresponding to the first digital signal and stores it in matrix M1.

[0022] The second receiver generates a second digital signal with respect to the first chirp (chirp #1). The processor 120 generates range FFT data 204 corresponding to the second digital signal and stores it in matrix M2. Similarly, the processor 120 processes the digital signals received from the third and fourth receivers corresponding to the first chirp (chirp #1) and stores them in matrix M3 and matrix M4, respectively.

[0023] The first receiver generates a fifth digital signal with respect to the second chirp (chirp #2). The processor 120 generates range FFT data 212 corresponding to the fifth digital signal and stores it in matrix M1. The second receiver generates a sixth digital signal with respect to the second chirp (chirp #2). The processor 120 generates range FFT data 214 corresponding to the sixth digital signal and stores it in matrix M2. Similarly, the processor 120 processes the digital signals received from the third and fourth receivers corresponding to the second chirp (chirp #2) and stores them in matrix M3 and matrix M4, respectively.

[0024] In a similar manner, the processor 120 performs a range FFT on the digital signal received corresponding to the Nth chirp (chirp #N) and stores the range FFT data in the corresponding matrix. For example, the first receiver generates a digital signal corresponding to the Nth chirp (chirp #N). The processor 120 generates range FFT data 220 corresponding to the Nth chirp and stores it in matrix M1. The range FFT resolves one or more obstacles in the range. In one example, the size of the range FFT is N range is.

[0025] After the range FFT data corresponding to the entire frame is stored in the primary memory, the radar device 100 performs a Doppler FFT or a 2D FFT as illustrated in FIG. 2B. The Doppler FFT is performed across columns C1, C2 to CM, and the Doppler FFT data generated by the processor 120 is stored in the Doppler bins illustrated as 240. In one example, the range FFT data is stored across the rows of the primary memory (as illustrated in FIG. 2A), which are called range bins and illustrated as 230. The Doppler FFT is performed across the columns of the primary memory, and the Doppler FFT data is stored in the Doppler bins illustrated as 240 (as illustrated in FIG. 2B).

[0026] In another example, the range FFT data is stored across the columns of the primary memory. Accordingly, the Doppler FFT is performed across the rows of the primary memory. In one example, the size of the Doppler FFT is N doppler is. When zero-padding is performed in the Doppler FFT, N doppler is larger than the number of chirps per frame. The Doppler FFT resolves one or more obstacles in the Doppler.

[0027] After the processor 120 performs the range FFT and the Doppler FFT, each matrix includes a plurality of data bins as illustrated in FIG. 2C. For example, matrix M1 includes data bins (1,1), (2,1) to (M,N). Similar data bins are created in matrices M2, M3, and M4. Subsequently, the processor 120 performs an angular FFT on the data stored in the primary memory. The angular FFT is performed along the corresponding elements of the matrices. Therefore, the angular FFT is performed along M1(i,j), M2(i,j), M3(i,j), and M4(i,j). For example, the angular FFT is performed on the following data bins, M1(1,1), M2(1,1), M3(1,1), and M4(1,1).

[0028] The angular FFT is performed on all data bins of matrices M1 to M4. In one example, the size of the angular FFT is N angle . When zero-padding is performed in the angular FFT, N angle is greater than the number of receivers in the radar device 100. After this sequence of range FFT, Doppler FFT follows, and then angular FFT follows, resolving one or more obstacles in range, velocity, and angle respectively. The processor 120 uses this sequence to determine the range, velocity, and angle of the one or more obstacles.

[0029] However, this FFT processing method used by the processor 120 requires a large amount of primary memory. The number of samplings required to be stored in the primary memory is (N range )×(N doppler )×(N angle ). In one example, this requires a size of 512 MB in the primary memory. A large primary memory affects the size of the radar device 100.

[0030] Figures 3A and 3B illustrate the FFT processing in a radar device according to an embodiment. The FFT processing is described in relation to the radar device 100. The radar device 100 transmits a plurality of chirps. A set of chirps forms a frame. In one example, the frame includes N chirps, where N is an integer.

[0031] The frame includes a first chirp. The transmitter 101 in the radar device 100 transmits the first chirp. The first chirp is scattered by one or more obstacles, generating a first plurality of scattered signals. A plurality of receivers similar to the receiver 110 in the radar device 100 receive the first plurality of scattered signals. For ease of understanding, in this example, the radar device 100 includes four receivers, Receiver #1, Receiver #2, Receiver #3, and Receiver #4. Each of these receivers generates a digital signal in response to one of the first plurality of scattered signals. Thus, the radar device 100 generates a first plurality of digital signals in response to the first chirp. The processor 120 receives the first plurality of digital signals from the receivers and performs a range FFT (Fast Fourier Transform) on the digital signals, generating a matrix illustrated in FIG. 3A corresponding to the four receivers. The matrix is stored in the primary memory.

[0032] The processor 120 receives digital signals from four receivers corresponding to the first chirp. The first receiver (Receiver #1) generates a first digital signal in response to the first chirp. The processor 120 generates range FFT data 302 corresponding to the first digital signal and stores it in the matrix.

[0033] The second receiver (Receiver #2) generates a second digital signal for the first chirp. The processor 120 generates range FFT data 304 corresponding to the second digital signal and stores it in a matrix. The third receiver (Receiver #3) generates a third digital signal for the first chirp. The processor 120 generates range FFT data 306 corresponding to the third digital signal and stores it in a matrix. The fourth receiver (Receiver #4) generates a fourth digital signal for the first chirp. The processor 120 generates range FFT data 308 corresponding to the fourth digital signal and stores it in a matrix.

[0034] The range FFT resolves one or more obstacles in the range. In one example, the size of the range FFT is N range is. After the range FFT data corresponding to the first chirp is stored in the primary memory, the radar device 100 performs an angle FFT or 3D FFT as illustrated in FIG. 3B.

[0035] The angle FFT is performed across columns C1, C2~CN to generate a first matrix of complex samples. The processor 120 performs the angle FFT and stores the complex samples in the primary memory. The first matrix of complex samples corresponds to the first chirp. In one example, the range FFT data is stored across the rows of the primary memory (as shown in FIG. 3A). The angle FFT is performed across the columns of the primary memory, and thus the first matrix of complex samples generated is stored in the primary memory (as shown in FIG. 3B).

[0036] In another example, the range FFT data is stored across the columns of the primary memory. Accordingly, the angle FFT is performed across the rows of the primary memory. In one example, the size of the angle FFT is N angleThis is the case. After this sequence of range FFT, an angle FFT follows, resolving one or more obstacles in the range and angle respectively. In one example, the processor 120 uses peak values in the matrix of complex samples to determine the range and angle of one or more obstacles.

[0037] The processor 120 generates first output data from the first matrix of complex samples. The first output data corresponds to the first chirp. In one example, the first output data is generated from a non-linear operation on the first matrix of complex samples. The non-linear operation is at least one of a modulus operation and a magnitude square operation. In the modulus operation, an absolute value is generated for each sample of the first matrix of complex samples. In the magnitude square operation, the real and imaginary parts of each sample of the first matrix of complex samples are squared and added. Also, the first output data is in the form of a matrix. The processor 120 stores the first output data in the secondary memory.

[0038] In a similar manner as described above, the processor 120 generates second output data from a non-linear operation on the second matrix of complex samples generated corresponding to the second chirp. The second chirp is transmitted by the transmit antenna 104 in the transmitter. The second chirp is scattered by one or more obstacles, generating a second plurality of scattered signals. The plurality of receivers in the radar device 100 receive the second plurality of scattered signals and generate a second plurality of digital signals.

[0039] The processor 120 performs a range FFT and an angle FFT on the second plurality of digital signals to generate a second matrix of complex samples. The processor 120 generates second output data from the second matrix of complex samples. In one version, the processor 120 non-coherently accumulates the first matrix of complex samples and the second matrix of complex samples to generate a two-dimensional image.

[0040] In another version, the processor 120 is configured to add the first output data and the second output data stored in the secondary memory to generate a two-dimensional image. This is shown in the following formula. B final =B first +B second (1) Here, B first is the first output data, B second is the second output data, and B final is the final data obtained by adding the first output data stored in the secondary memory. B final is used by the processor 120 to generate a two-dimensional image.

[0041] In yet another version, the processor 120 is configured to add the weighted average of the first output data and the second output data to generate a two-dimensional image. The two-dimensional image is stored in the secondary memory. The processor 120 determines the range and angle of one or more obstacles from the two-dimensional image. This is shown in the following formula. B final =αB first +(1-α)B second (2) Here, α represents a weight.

[0042] The memory requirement by the processor 120 using the non-coherent accumulation method is N range ×N angle ×2 (here, the factor of 2 is for considering both the primary memory and the secondary memory). This is much smaller than the memory requirement described in relation to FIGS. 2A - 2C.

[0043] The FFT processing in the radar device 100 when a plurality of chirps are transmitted by the transmitter 101 is described. The processing described above with reference to the first chirp and the second chirp is applicable to the following description when the chirps include the first chirp and the second chirp.

[0044] The transmitter 101 in the radar device 100 transmits a chirp. In one example, the frame includes N chirps, where N is an integer. The plurality of chirps are scattered by one or more obstacles, generating a plurality of scattered signals.

[0045] The radar device 100 includes a plurality of receivers. The plurality of receivers receive the scattered signals. Each of the receivers receives one of the scattered signals and generates a digital signal. Therefore, the processor 120 receives the digital signals from each of the receivers. The digital signal corresponds to one of the chirps.

[0046] The processor 120 performs range FFT and angle FFT on the digital signals received from the receivers, generating a matrix of complex samples corresponding to the chirps. The processor 120 performs range FFT and angle FFT in a similar manner as described for the first plurality of digital signals. The processor 120 non-coherently accumulates the matrices of complex samples corresponding to each of the chirps to generate a two-dimensional image.

[0047] Processor 120 performs non-coherent accumulation in two ways. In the first way, processor 120 generates output data by performing a non-linear operation on a matrix of complex samples generated corresponding to one of the chirps. The output data is stored in the secondary memory. Processor 120 updates the secondary memory by adding the output data and the data obtained by performing a non-linear operation on the matrix of complex samples generated corresponding to each of the chirps. The non-linear operation is at least one of a modulus operation and a magnitude square operation. By updating the output data, final data is generated. The processor generates a two-dimensional image from the final data. This is shown in the following formula. The non-linear operation used for this illustration is a modulus operation in which the absolute value of the matrix of complex samples is considered. For example, initially output data S0 is stored in the secondary memory, and processor 120 adds the absolute value |x1| of the matrix of complex samples generated corresponding to the first chirp. In one example, the output data S0 is initialized to zero. The final data is given as follows. S1 = S0 + |x1| (3)

[0048] When processor 120 adds the absolute value |x2| of the matrix of complex samples generated corresponding to the second chirp, the final data is given as follows. S2 = S1 + |x2| (4)

[0049] Therefore, when processor 120 adds the absolute value |xn| of the matrix of complex samples generated corresponding to the Nth chirp, where N is an integer, the final data is given as follows. SN = S(N - 1) + |xn| (5)

[0050] In the second method, the processor 120 generates output data from a non-linear operation performed on a matrix of complex samples generated corresponding to one of the chirps. The output data is stored in the secondary memory. The processor 120 updates the secondary memory by sequentially adding a weighted average of the output data and the data obtained by performing a non-linear operation on the matrix of complex samples generated corresponding to each of the chirps. Final data is generated by updating the output data. The processor generates a two-dimensional image from the final data. This is illustrated in the following equation. The non-linear operation used for this illustration is a modulus operation in which the absolute value of the matrix of complex samples is considered. For example, initially, output data S0 is stored in the secondary memory. In one example, the output data S0 is initialized to zero. The final data is given as follows. S1 = αS0+(1 - α)|x1| (6) Here, α is the weight.

[0051] When the processor 120 adds the absolute value |x2| of the matrix of complex samples generated corresponding to the second chirp, the final data is given as follows. S2 = αS1+(1 - α)|x2| (7)

[0052] Therefore, when the processor 120 adds the absolute value |xn| of the matrix of complex samples generated corresponding to the Nth chirp and N is an integer, the final data is given as follows. SN = αS(N - 1)+(1 - α)|xn| (8)

[0053] Processor 120 determines the range and angle of one or more obstacles from the two-dimensional image corresponding to the final data. The non-coherent accumulation of data over multiple chirps serves to increase the signal-to-noise ratio (SNR) of the radar device 100 as described above. In one example, processor 120 non-coherently accumulates the data (in the secondary memory) corresponding to N chirps in a frame and then performs the determination of the range and angle of one or more obstacles.

[0054] In another example, processor 120 non-coherently accumulates the data (in the secondary memory) corresponding to a defined number of chirps and then performs the determination of the range and angle of one or more obstacles. This feature is useful when continuous chirps are transmitted by transmitter 101.

[0055] Also, the speed of an obstacle can be measured by using the difference in the range of the obstacle over consecutive frames.

[0056] FIG. 4 illustrates an image generated by a radar device according to one embodiment. The image is generated by radar device 100 using the FFT processing described in connection with FIGS. 3A and 3B. FIG. 4 illustrates that the radar device includes 8 receivers and there are 256 samples per chirp.

[0057] FIG. 4 is a table representing the final data (SN) after non-coherent accumulation of 64 chirps in a frame. FIG. 4 illustrates the peak occurring at N = 50, and the angle index of 2. For the radar device 100 with a range resolution of 4 cm, N = 50 range corresponds to a range of 50 × 4 = 200 cm. Similarly, the angle index of 2 corresponds to an azimuth angle of sin(2 × 2 / number of receivers) = 30 degrees. range

[0058] ​FIG. 5 is a flowchart for illustrating a method of operation of a radar device according to an embodiment. In step 502, a plurality of chirps are generated. In one example, a frame includes N chirps, where N is an integer. In step 504, a plurality of digital signals are generated corresponding to one of the chirps. The plurality of chirps are scattered by one or more obstacles, and for each chirp, a plurality of scattered signals are generated. For example, the radar device 100 illustrated in FIG. 1 includes a plurality of receivers. For each chirp, the receiver receives the scattered signal. Each of the receivers receives one of the scattered signals and generates a digital signal.

[0059] In step 506, a matrix of complex samples corresponding to the chirps is generated by performing range FFT (Fast Fourier Transform) and angle FFT on the digital signals generated corresponding to the chirps. A processor, such as the processor 120 illustrated in FIG. 1, receives the digital signals from each of the receivers. The digital signals correspond to the chirps. The processor performs range FFT and angle FFT on the digital signals received from the receivers to generate chirps corresponding to the matrix of complex samples.

[0060] In step 508, for generating a two-dimensional image, the matrices of complex samples corresponding to each of the chirps are non-coherently accumulated. The processor determines the range and angle of one or more obstacles from the two-dimensional image. The non-coherent accumulation of data over multiple chirps serves to increase the signal-to-noise ratio (SR) of the radar device.

[0061] Within the scope of the claims of the present invention, variations may be made to the illustrated exemplary embodiments, and other embodiments are possible.

Claims

1. A radar device, a transmitter configured to transmit a plurality of chirps, a plurality of receivers, each receiver being configured to receive one of a plurality of spread signals resulting from the plurality of chirps and generate a digital signal in response to the spread signal, the plurality of receivers, a primary memory, a secondary memory, a processor coupled to the plurality of receivers, the primary memory, and the secondary memory, receiving the digital signal from the plurality of receivers, performing a range FFT on the digital signal corresponding to a first chirp of the plurality of chirps to generate an item of range FFT (Fast Fourier Transform) data for the first chirp, storing each item of the range FFT data for the first chirp in a first FFT matrix in the primary memory in a first direction, performing an angle FFT in a second direction perpendicular to the first direction across the items of the range FFT data in the first FFT matrix in the primary memory to generate a first matrix of complex samples corresponding to the first chirp, storing the first matrix of complex samples in the primary memory, performing a non-linear operation on the first matrix of complex samples to generate first output data corresponding to the first chirp, storing the first output data in the secondary memory, performing a range FFT on the digital signal corresponding to a second chirp of the plurality of chirps to generate an item of range FFT data for the second chirp, storing each item of the range FFT data for the second chirp in a second FFT matrix in the primary memory in the first direction, Performing an angular FFT in the second direction across the items of the range FFT data in the second FFT matrix in the primary memory to generate a second matrix of complex samples corresponding to the second chirp, Storing the second matrix of the complex samples in the primary memory, Performing a non-linear operation on the second matrix of the complex samples to generate second output data corresponding to the second chirp, Updating the secondary memory with data generated by non-coherently accumulating the first matrix of the complex samples and the second matrix of the complex samples, Generating a two-dimensional image based on the generated data, The processor configured as described above, A radar device including the same.

2. The radar device according to claim 1, The radar device, wherein the two-dimensional image is generated by adding the first output data and the second output data.

3. The radar device according to claim 1, The radar device, wherein the processor is further configured to determine the range and angle of one or more obstacles from the two-dimensional image.

4. The radar device according to claim 1, The transmitter, A local oscillator configured to generate the first chirp, A transmission antenna coupled to the local oscillator and configured to transmit the first chirp, A radar device including the same.

5. The radar device according to claim 1, Each of the plurality of receivers, A receiving antenna configured to receive one spreading signal of a plurality of spreading signals, A low-noise amplifier (LNA) configured to amplify the spread signal to generate an amplified spread signal; A mixer coupled to the LNA and a local oscillator, the mixer being configured to mix the amplified spread signal and the first chirp to generate an IF (intermediate frequency) signal; An IF filter coupled to the mixer and configured to generate a filtered IF signal from the IF signal; An ADC (analog-to-digital converter) coupled to the IF filter and configured to sample the filtered IF signal to generate the digital signal; A radar device including the above.

6. The radar device according to claim 1, The radar device, wherein the non-linear operation includes an operation in which an absolute value is generated for each complex sample of the matrix of the complex samples.

7. The radar device according to claim 1, The radar device, wherein the non-linear operation is a magnitude squared operation, and the real part and the imaginary part of each complex sample of the matrix of the complex samples are squared and added.

8. A method, Generating a first plurality of digital signals, each of the first plurality of digital signals corresponding to a respective spread signal among the first plurality of spread signals of a first chirp, the first plurality of spread signals being received by a plurality of receivers respectively, generating the first plurality of digital signals; Performing a range fast Fourier transform (FFT) on the first plurality of digital signals; Storing the result of the range FFT on the first plurality of digital signals in a first FFT matrix in a first direction in a primary memory; Performing an angular FFT in a second direction perpendicular to the first direction across the results of the range FFT on the first plurality of digital signals in the first FFT matrix in the primary memory to generate a first matrix of complex samples corresponding to the first chirp; Storing the first matrix of complex samples in the primary memory; Performing a non-linear operation on the first matrix of complex samples to generate first output data; Storing the first output data in a secondary memory; Generating a second plurality of digital signals, each of the second plurality of digital signals corresponding to a respective spread signal among the second plurality of spread signals of a second chirp, the second plurality of spread signals being received respectively by the plurality of receivers; Performing a range FFT on the second plurality of digital signals; Storing the results of the range FFT on the second plurality of digital signals in the second FFT matrix in the primary memory in the first direction; Performing an angular FFT in the second direction across the results of the range FFT on the second plurality of digital signals in the second FFT matrix in the primary memory to generate a second matrix of complex samples corresponding to the second chirp; Storing the second matrix of complex samples in the primary memory; Performing a non-linear operation on the second matrix of complex samples to generate second output data; Updating the secondary memory with data generated by non-coherently accumulating the first matrix of complex samples and the second matrix of complex samples; Generating a two-dimensional image based on the generated data; A method comprising.

9. The method according to claim 8, wherein generating the two-dimensional image comprises updating the secondary memory content by adding the first output data and the second output data to generate final data; generating the two-dimensional image from the final data; A method comprising:

10. The method according to claim 9, wherein said adding comprises adding the first output data and the second output data to generate final data.

11. The method according to claim 9, wherein for at least one additional chirp, generating a plurality of digital signals, performing range and azimuth FFTs on the plurality of digital signals, storing the results of the range and azimuth FFTs as complex signals, performing a non-linear operation on the complex signals, and repeatedly non-coherently integrating; final data is generated by non-coherently integrating for at least one additional spread chirp.

12. The method according to claim 8, wherein said non-linear operation includes an operation in which an absolute value is generated for each complex sample of the matrix of complex samples.

13. The method according to claim 8, wherein said non-linear operation is a magnitude squared operation, and the real and imaginary parts of each complex sample of the matrix of complex samples are squared and added.

Images