Semiconductor module

Abstract

To estimate degradation of solder parts with accuracy.SOLUTION: Provided is a semiconductor module that comprises: a first semiconductor chip and a second semiconductor chip each including a semiconductor element; a wiring part bonded with the first and second semiconductor chips; a first solder part bonding between the first semiconductor chip and the wiring part; and a second solder part bonding between the second semiconductor chip and the wiring part, cracking against thermal history more easily than the first solder part. The second solder part may have a smaller thickness in a direction connecting between the semiconductor chip and the wiring part than the first solder part. The second solder part may be formed of a material composition different from that of the first solder part.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a semiconductor module.

Background Art

[0002] Conventionally, a semiconductor module including a semiconductor chip on which a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) is formed has been known (see, for example, Patent Document 1). Further, a technique for fixing a semiconductor chip with solder has been known (see, for example, Patent Document 2). Patent Document 1 Japanese Patent Application Laid-Open No. 2019-186510 Patent Document 2 Japanese Patent Application Laid-Open No. 2-26058

Summary of the Invention

Problems to be Solved by the Invention

[0003] In a semiconductor module, it is preferable to be able to detect the deterioration state of the solder for fixing the semiconductor chip.

Means for Solving the Problems

[0004] In order to solve the above problems, in one aspect of the present invention, a semiconductor module is provided. The semiconductor module may include a first semiconductor chip and a second semiconductor chip each including a power semiconductor element. The semiconductor module may include a wiring portion joined to the first semiconductor chip and the second semiconductor chip. The semiconductor module may include a first solder portion joining the first semiconductor chip and the wiring portion. The semiconductor module may include a second solder portion joining the second semiconductor chip and the wiring portion, which is more likely to crack with respect to the thermal history than the first solder portion.

[0005] The second solder portion may have a smaller thickness in the direction connecting the semiconductor chip and the wiring portion than the first solder portion.

[0006] The thickness of the second solder portion may be 20 μm or more and 100 μm or less.

[0007] The second solder portion may be formed of a material composition different from that of the first solder portion.

[0008] The indium content (by weight %) in the second solder portion may be smaller than the indium content (by weight %) in the first solder portion.

[0009] The semiconductor module may include main terminals. The semiconductor module may include a main circuit portion connected to the main terminals. The first semiconductor chip and the second semiconductor chip may be provided in the main circuit portion.

[0010] The semiconductor module may be disposed below the first semiconductor chip and the second semiconductor chip, and may include a cooling portion that allows a refrigerant to flow in a direction from the first semiconductor chip toward the second semiconductor chip.

[0011] The first semiconductor chip may be provided in the main circuit portion. The second semiconductor chip may not be provided in the main circuit portion.

[0012] The first semiconductor chip and the second semiconductor chip may be fixed to the same insulating substrate.

[0013] The semiconductor module may include a plurality of first semiconductor chips. The second semiconductor chip may be disposed sandwiched between two first semiconductor chips.

[0014] The semiconductor module may include a characteristic detection portion that detects the electrical characteristics of the second solder portion and the second semiconductor chip.

[0015] The semiconductor module may include an estimation portion that estimates the state of the second solder portion based on the electrical characteristics detected by the characteristic detection portion.

[0016] Note that the above summary of the invention does not list all the necessary features of the present invention. Also, sub-combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0017]

Figure 1

Figure 2

Figure 3

Figure 4

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Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Mode for Carrying Out the Invention

[0018] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of the features described in the embodiments are essential for the solution means of the invention.

[0019] In the present specification and the drawings, for elements having substantially the same functions and configurations, the same reference numerals are used to omit redundant descriptions, and elements not directly related to the present invention may be omitted from the illustration. Further, in one drawing, for elements having the same functions and configurations, representative reference numerals may be attached, and other reference numerals may be omitted.

[0020] In the present specification, one side in the direction parallel to the depth direction of the semiconductor chip is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction during mounting of the semiconductor module.

[0021] In the present specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without specifying positive or negative, it means the directions parallel to the +Z-axis and -Z-axis. In the present specification, the orthogonal axes parallel to the upper and lower surfaces of the semiconductor chip are the X-axis and Y-axis. Further, the axis perpendicular to the upper and lower surfaces of the semiconductor chip is the Z-axis. In the present specification, the direction of the Z-axis may be referred to as the depth direction. Also, in the present specification, the direction parallel to the upper and lower surfaces of the semiconductor chip, including the X-axis and Y-axis, may be referred to as the horizontal direction.

[0022] In the present specification, when referred to as "identical" or "equal", it may include cases having errors due to manufacturing variations or the like. The error is, for example, within 10%.

[0023] FIG. 1 is a top view showing an example of a semiconductor module 300. The semiconductor module 300 includes one or more first semiconductor chips 101 and one or more second semiconductor chips 102. Each semiconductor chip is a chip in which a power semiconductor element such as an IGBT is formed on a semiconductor substrate. The power semiconductor element may be a MOSFET or a diode. The power semiconductor element may be, for example, an element with a breakdown voltage of 100 V or more. The power semiconductor element may be formed on a silicon substrate or a compound semiconductor substrate such as GaN or SiC.

[0024] The first semiconductor chip 101 and the second semiconductor chip 102 preferably have the same structure. The area occupied by the power semiconductor element such as a transistor formed on the first semiconductor chip 101 on the semiconductor substrate may be the same as the area occupied by the power semiconductor element formed on the second semiconductor chip 102 on the semiconductor substrate. At least a part of the manufacturing process of the first semiconductor chip 101 and the manufacturing process of the second semiconductor chip 102 may be the same process, or all may be the same process. The same process means that the conditions set for the manufacturing apparatus used are the same, and is not limited to the processes executed simultaneously.

[0025] The number of first semiconductor chips 101 included in the semiconductor module 300 may be more than the number of second semiconductor chips 102 included in the semiconductor module 300. The semiconductor module 300 of this example includes one second semiconductor chip 102 and a plurality of first semiconductor chips 101.

[0026] The first semiconductor chip 101 and the second semiconductor chip 102 are joined to the wiring portion 170 by solder portions. The wiring portion 170 is, for example, a thin-film wiring pattern formed on an insulating substrate. The first semiconductor chip 101 and the second semiconductor chip 102 may be joined to a plate-shaped wiring portion such as a bus bar or a lead frame by solder portions. The wiring portion is not limited to these.

[0027] The solder portion for fixing the second semiconductor chip 102 is more likely to crack with respect to the thermal history than the solder portion for fixing the first semiconductor chip 101. Thus, by observing the state of the solder portion of the second semiconductor chip 102, the state of the solder portion of the first semiconductor chip 101 can be estimated. For example, if there is no crack in the solder portion of the second semiconductor chip 102, it can be estimated that there is no crack in the solder portion of the first semiconductor chip 101 either. Also, when a crack occurs in the solder portion of the second semiconductor chip 102, it can be estimated that the possibility of a crack occurring in the solder portion of the first semiconductor chip 101 has increased.

[0028] The thermal history refers to the history of heat applied to the solder portion. The thermal history may be the history of the temperature of the solder portion. The thermal history for the solder portion fixing the second semiconductor chip 102 and the solder portion fixing the first semiconductor chip 101 is preferably substantially the same or the thermal history of the solder portion fixing the second semiconductor chip 102 is larger. A larger thermal history means that the total amount of heat applied is large. The thermal history increases when the solder portion is heated. By making the thermal history for the solder portion of the second semiconductor chip 102 greater than or equal to the thermal history for the solder portion of the first semiconductor chip 101, cracks are more likely to occur in the solder portion of the second semiconductor chip 102. Therefore, it becomes easier to detect a sign of a crack occurring in the solder portion of the first semiconductor chip 101.

[0029] The amount of heat generated by the first semiconductor chip 101 and the second semiconductor chip 102 is preferably equivalent. The second semiconductor chip 102 is preferably controlled in synchronization with any one of the first semiconductor chips 101. The same gate signal as any one of the first semiconductor chips 101 may be input to the second semiconductor chip 102. Thereby, the thermal history given from each semiconductor chip to each solder portion can be made equivalent.

[0030] The semiconductor module 300 of this example includes a housing 208 and one or more main circuit units 200. The housing 208 houses the main circuit unit 200. The main circuit unit 200 may be placed on the bottom surface 206 of the housing 208. The housing 208 is, for example, a resin case formed of resin. The housing 208 of this example houses three sets of the main circuit units 200. The main circuit unit 200 of this example functions as an inverter, but the function of the main circuit unit 200 is not limited to this. The semiconductor module 300 of this example functions as a three-phase inverter.

[0031] Each main circuit unit 200 includes one or more first semiconductor chips 101. Also, any one of the main circuit units 200 includes one or more second semiconductor chips 102. In the example of FIG. 1, one second semiconductor chip 102 is provided in the main circuit unit 200-1. All other semiconductor chips are first semiconductor chips 101. In other examples, second semiconductor chips 102 may be provided in a plurality of the main circuit units 200, or second semiconductor chips 102 may be provided in all of the main circuit units 200. Also, the second semiconductor chip 102 may be provided outside the main circuit unit 200.

[0032] The housing 208 has a plurality of main terminals 210, one or more output terminals 212, and a plurality of control terminals 214. Power supply power is supplied to the main terminals 210 from an external power supply or the like. Two main terminals 210 may be provided for one main circuit unit 200. One of the main terminals 210 may be connected to a reference potential such as a ground potential, and the other main terminal 210 may be connected to an external power supply or the like.

[0033] One output terminal 212 may be provided for one main circuit unit 200. The output terminal 212 is connected to a predetermined position in the main circuit unit 200.

[0034] One or more control terminals 214 may be provided for one main circuit section 200. Any of the control terminals 214 may be connected to the gate terminals of the respective semiconductor chips. In this specification, the first semiconductor chip 101 and the second semiconductor chip 102 may sometimes be simply referred to as semiconductor chips. The switching operation of the semiconductor chip is controlled according to the control signal input to the control terminal 214. Any of the control terminals 214 may be connected to each sensor such as a temperature sensor or a current sensor provided in the semiconductor chip. The control terminal 214 may control the operation of each sensor and output the detection result in each sensor to the outside.

[0035] A cooling section for cooling the semiconductor module 300 may be arranged below the housing 208. In FIG. 1, the cooling section is omitted. The housing 208 may have a through hole 216 for fixing the semiconductor module 300 to an external device.

[0036] FIG. 2 is an enlarged view of the main circuit section 200-1. The main circuit section 200-1 in this example includes an insulating substrate 162, wiring sections 130, 164, 166, 168, 170, a plurality of first semiconductor chips 101, and one second semiconductor chip 102. The insulating substrate 162 is a plate-shaped substrate formed of an insulating material such as resin or ceramic. In FIG. 2, the insulating substrate 162 is hatched with oblique lines. However, the hatching is omitted in the areas covered by the wiring sections and semiconductor chips.

[0037] On the upper surface of the insulating substrate 162, wiring portions 164, 166, 168, and 170 are provided. The wiring portions 164, 166, 168, and 170 in this example are thin-film wirings provided on the upper surface (the surface shown in FIG. 2) of the insulating substrate 162. The wiring portions 164, 166, 168, and 170 are formed of a conductive material such as copper. A layer formed of a conductive material such as copper may also be provided on the lower surface (the surface opposite to the surface shown in FIG. 2) of the insulating substrate 162. The conductive layer provided on the lower surface of the insulating substrate 162 may be connected to the cooling portion. Further, the wiring portion 130 connects between the wiring portion provided on the upper surface of the insulating substrate 162 and each member such as a semiconductor chip. The wiring portion 130 is a wire, a lead frame, a bus bar, etc. disposed above the upper surface of the insulating substrate 162. In FIG. 2, the wiring portion 130 is indicated by a broken line.

[0038] Each semiconductor chip has a gate pad 116 and one or more sense pads 118. The gate pad 116 is connected to the gate electrode of a transistor element formed in the semiconductor chip. The sense pad 118 is connected to a sensor portion such as a temperature sensor or a current sensor formed in the semiconductor chip. Further, pads such as emitter electrodes are provided in a region on the upper surface of the semiconductor chip where no pads are provided. Each pad of the semiconductor chip is connected to other members by the wiring portion 130. Also, pads such as collector electrodes are provided on the lower surface of the semiconductor chip. The semiconductor chip in this example is a vertical device in which current flows between the upper surface and the lower surface.

[0039] The wiring portion 166 is connected to the control terminal 214 shown in FIG. 1. The wiring portion 166 is connected to the gate pad 116 and the sense pad 118 of the semiconductor chip via the wiring portion 130 and the wiring portion 164, etc. Each wiring portion 164 has a plurality of wiring portions 130 connected thereto. The wiring portion 164 relays the wiring portion 130 to connect two members.

[0040] The wiring section 170 is connected to the main terminal 210 shown in FIG. 1. The main circuit section 200 of this example has two wiring sections 170 corresponding to the two main terminals 210. One or more semiconductor chips are provided on each wiring section 170. The first semiconductor chip 101 and the second semiconductor chip 102 may be provided on any one of the wiring sections 170. That is, the second semiconductor chip 102 may be provided on the same wiring section 170 as any one of the first semiconductor chips 101. The wiring section 170 may be connected to other members via the wiring section 130.

[0041] The wiring section 168 is connected to the output terminal 212 shown in FIG. 1. The wiring section 168 is connected to other members by the wiring section 130.

[0042] As described above, a cooling section may be provided below the main circuit section 200. The cooling section cools the main circuit section 200 by flowing a refrigerant in a predetermined direction below the main circuit section 200. In FIG. 2, the direction in which the refrigerant flows is indicated by an arrow. The cooling section may flow the refrigerant in a direction from the first semiconductor chip 101 toward the second semiconductor chip 102. That is, the second semiconductor chip 102 may be arranged on the downstream side of the flow of the refrigerant with respect to the first semiconductor chip 101. In this case, the refrigerant reaching below the second semiconductor chip 102 has already been warmed by the heat generation of the first semiconductor chip 101. For this reason, the solder portion of the second semiconductor chip 102 may have a larger heat history than the solder portion of the first semiconductor chip 101. By arranging the semiconductor chips as in this example, it is possible to make the solder portion of the second semiconductor chip 102 more likely to crack and to easily detect a sign that the solder portion of the first semiconductor chip 101 is about to crack.

[0043] FIG. 3 is a diagram showing an example of arranging the A-A cross section and the B-B cross section in FIG. 2 side by side. The A-A cross section is the XZ plane passing through the first semiconductor chip 101, and the B-B cross section is the B-B cross section passing through the second semiconductor chip 102.

[0044] As described above, a wiring portion 170 is provided on the upper surface of the insulating substrate 162. Also, a conductive layer 171 is provided on the lower surface of the insulating substrate 162. The wiring portion 170 and the conductive layer 171 may be formed of a metal such as copper.

[0045] The first semiconductor chip 101 and the second semiconductor chip 102 are each joined to the wiring portion 170. The first semiconductor chip 101 and the second semiconductor chip 102 may be joined to a common wiring portion 170. That is, the wiring portion 170 to which the first semiconductor chip 101 is joined and the wiring portion 170 to which the second semiconductor chip 102 is joined may be provided continuously on the upper surface of the insulating substrate 162. In another example, the wiring portion 170 to which the first semiconductor chip 101 is joined and the wiring portion 170 to which the second semiconductor chip 102 is joined may be provided separately on the upper surface of the insulating substrate 162.

[0046] The first semiconductor chip 101 is joined to the wiring portion 170 by a first solder portion 111. The second semiconductor chip 102 is joined to the wiring portion 170 by a second solder portion 112. Each solder portion is formed of a conductive material containing solder. The solder portion may contain tin (Sn), may contain silver (Ag), or may contain indium (In).

[0047] The second solder portion 112 is more likely to crack with respect to the thermal history than the first solder portion 111. The second solder portion 112 may have different resistance to thermal history than the first solder portion 111 due to differences in structure such as shape and thickness. Also, the second solder portion 112 may have different resistance to thermal history than the first solder portion 111 due to differences in material. Also, the second solder portion 112 may have differences in both structure and material compared to the first solder portion 111.

[0048] In the example shown in FIG. 3, the thickness T2 of the second solder portion 112 is smaller than the thickness T1 of the first solder portion 111. The thickness of the solder portion refers to the thickness in the direction (Z-axis direction in FIG. 3) connecting the semiconductor chip and the wiring portion 170. The thickness of the solder portion in this example is the thickness in the direction perpendicular to the lower surface of the semiconductor chip. Also, the thickness of the solder portion may be the average thickness of the portion arranged to overlap the semiconductor chip in the XY plane, or may be the maximum thickness of the portion.

[0049] By reducing the thickness T2 of the second solder portion 112, when the semiconductor chip and the insulating substrate 162 etc. are deformed due to thermal fluctuations, it becomes difficult for the second solder portion 112 to absorb the deformation, and cracks are likely to occur in the second solder portion 112. The thickness T2 may be 75% or less of the thickness T1, may be half or less, or may be 25% or less.

[0050] FIG. 4 is a diagram showing the relationship between the thickness T of the solder portion and the length of cracks (cracks) occurring in the solder portion. In FIG. 4, the length of cracks is shown when the temperature cycle of heating and cooling is repeated about 500 times. Also, the relationship is shown for each of the solder portion formed of SnAg and the solder portion formed of SnAgIn.

[0051] Regardless of the material formed, the smaller the solder thickness, the larger the crack length of the solder portion. Also, in the example of the SnAg solder portion, it can be seen that no cracks occurred when the thickness of the solder portion was greater than 150 μm, but cracks occurred when the thickness was 150 μm or less. That is, the smaller the solder thickness, the more likely cracks are to occur in the solder portion. Also, in any example of the solder portion, when the thickness of the solder portion becomes 100 μm or less, the crack length increases rapidly.

[0052] The thickness T2 of the second solder portion 112 may be 100 μm or less. As a result, cracks are likely to occur in the second solder portion 112. The thickness T2 may be 90 μm or less, and may be 80 μm or less. Also, the thickness T2 may be 20 μm or more. If the thickness T2 becomes too small, cracks will easily occur in the second solder portion 112, making it difficult to estimate the deterioration of the first solder portion 111. The thickness T2 may be 30 μm or more, and may be 40 μm or more.

[0053] The thickness T1 of the first solder portion 111 is preferably 150 μm or more. As a result, cracks are less likely to occur in the first solder portion 111. The thickness T1 may be 200 μm or less. The difference between the thickness T1 and the thickness T2 may be 10 μm or more, may be 50 μm or more, and may be 100 μm or more.

[0054] Also, the second solder portion 112 may be formed with a different material composition from the first solder portion 111. The different material composition includes both the case where different types of materials are included and the case where the content of the material is different. For example, the indium content (by weight) in the second solder portion 112 is smaller than the indium content (by weight) in the first solder portion 111. As shown in FIG. 4, the smaller the indium content, the easier it is for cracks to occur in the solder portion. The indium content in the second solder portion 112 may be half or less, may be 1 / 4 or less, and may be 1 / 10 or less of the indium content in the first solder portion 111. Also, the indium content in the second solder portion 112 may be 0%.

[0055] FIG. 5 is a diagram showing the relationship between the number of temperature cycles and the crack length. It can be seen that regardless of the number of temperature cycles, the smaller the indium content, the easier it is for cracks to occur.

[0056] FIG. 6 is a diagram showing another example of the A-A cross section and the B-B cross section. In this example, a wiring portion 130 connected to the upper surface of the semiconductor chip, a first solder portion 111-2 that joins the wiring portion 130, and a second solder portion 112-2 are shown. The wiring portion 130 in this example is a lead frame.

[0057] In this example, the first solder portion 111 is provided on both the upper surface and the lower surface of the first semiconductor chip 101. The lower surface of the first semiconductor chip 101 is joined to the wiring portion 170 by the first solder portion 111-1, similar to the example of FIG. 3. The upper surface of the first semiconductor chip 101 is joined to the wiring portion 130 by the first solder portion 111-2.

[0058] In this example, the second solder portion 112 is provided on both the upper surface and the lower surface of the second semiconductor chip 102. The lower surface of the second semiconductor chip 102 is joined to the wiring portion 170 by the second solder portion 112-1, similar to the example of FIG. 3. The upper surface of the second semiconductor chip 102 is joined to the wiring portion 130 by the second solder portion 112-2.

[0059] The second solder portion 112-2 is more likely to crack with respect to the thermal history than the first solder portion 111-2. Similar to the first solder portion 111 and the second solder portion 112 described in FIGS. 3 to 5, at least one of the structure and the material of the first solder portion 111-2 and the second solder portion 112-2 is different.

[0060] In the example of FIG. 6, the thickness T2-2 of the second solder portion 112-2 is smaller than the thickness T1-2 of the first solder portion 111-2. The thickness T2-1 of the second solder portion 112-1 disposed on the lower surface side of the semiconductor chip may be the same as or different from the thickness of the first solder portion 111-1. According to this example, the state of the first solder portion 111-2 can be estimated by observing the state of the second solder portion 112-2.

[0061] FIG. 7 is a diagram showing another example of the A-A cross section and the B-B cross section. Each structure in this example is the same as the example in FIG. 6, except that the thickness T2-1 of the second solder portion 112-1 is smaller than the thickness T1-1 of the first solder portion 111-1. According to this example, by observing the states of the second solder portion 112-1 and the second solder portion 112-2, the states of the first solder portion 111-1 and the first solder portion 111-2 can be estimated. That is, when a crack occurs in either the second solder portion 112-1 or the second solder portion 112-2, it can be estimated that the possibility of a crack occurring in at least one of the first solder portion 111-1 and the first solder portion 111-2 has increased.

[0062] FIG. 8 is a circuit diagram showing an example of the main circuit portion 200-1. The main circuit portion 200-1 is connected to two main terminals 210. The main circuit portion 200-1 in this example is a circuit electrically connected between the two main terminals 210. In this example, both the first semiconductor chip 101 and the second semiconductor chip 102 are included in the main circuit portion 200-1. That is, the second semiconductor chip 102 also operates as a part of the main circuit portion 200-1 (for example, an inverter). The second semiconductor chip 102 may be connected to the same wiring portion 170 (see FIG. 2) as any one of the first semiconductor chips 101. The second semiconductor chip 102 may be fixed to the same insulating substrate 162 as any one of the first semiconductor chips 101. By switching the second semiconductor chip 102 on or off, at least one of the voltage and current output from the output terminal 212 changes.

[0063] By using any semiconductor chip included in the main circuit section 200 - 1 as the second semiconductor chip 102, it is possible to detect the deterioration of the solder portion without increasing the circuit scale. The second semiconductor chip 102 is preferably provided in parallel with any of the first semiconductor chips 101. That is, the second semiconductor chip 102 is connected to the same control terminal 214 as any of the first semiconductor chips 101. Thereby, the heat generated by the second semiconductor chip 102 can be made equal to the heat generated by the first semiconductor chip 101. Also, even when a crack occurs in the second solder portion 112 and the resistance of the current path including the second semiconductor chip 102 increases, by providing the first semiconductor chip 101 in parallel, an increase in the resistance value of the entire circuit can be suppressed.

[0064] FIG. 9 is a diagram showing another arrangement example of the second semiconductor chip 102. In this example, the first semiconductor chip 101 is provided in the main circuit section 200, and the second semiconductor chip 102 is not provided in the main circuit section 200. The power supply power may be input to the second semiconductor chip 102 from a main terminal 211 different from the main terminal 210 of the main circuit section 200. However, the second semiconductor chip 102 may be connected to the common control terminal 214 with any of the first semiconductor chips 101. The second semiconductor chip 102 is not connected to the output terminal 212. That is, the operating state of the second semiconductor chip 102 does not affect the voltage and current output from the output terminal 212.

[0065] The second semiconductor chip 102 is provided in a wiring portion different from that of the first semiconductor chip 101. The second semiconductor chip 102 may be provided on an insulating substrate 162 different from that of the first semiconductor chip 101. According to this example, even if a crack occurs in the second solder portion 112 of the second semiconductor chip 102, an influence on the operation of the main circuit section 200 can be prevented.

[0066] FIG. 10 is a diagram for explaining an arrangement example of the second semiconductor chip 102. The second semiconductor chip 102 may be arranged between two first semiconductor chips 101 in the XY plane. As a result, heat generated by the two first semiconductor chips 101 reaches the second solder portion 112 of the second semiconductor chip 102, making it easier for cracks to occur. Therefore, it is possible to accurately detect that the possibility of cracks occurring in the first solder portion 111 has increased. Note that the second semiconductor chip 102 being sandwiched between the two first semiconductor chips 101 means that the second semiconductor chip 102 is arranged overlapping any straight line connecting the two first semiconductor chips 101.

[0067] As shown in FIG. 10, the second semiconductor chip 102 may be arranged between two main circuit portions 200. Also, as described in FIG. 2 and the like, the second semiconductor chip 102 may be included in any one of the main circuit portions 200.

[0068] FIG. 11 is a diagram showing an example of a configuration included in the semiconductor module 300. The semiconductor module 300 in this example includes a characteristic detection unit 302. The characteristic detection unit 302 detects the electrical characteristics of the second solder portion 112 and the second semiconductor chip 102.

[0069] When a crack occurs in the second solder portion 112, the resistance of the second solder portion 112 increases, so the electrical characteristics of the second semiconductor chip 102 when the second solder portion 112 is used as an electrode change. The characteristic detection unit 302 may detect the collector-emitter voltage V ce of the second semiconductor chip 102 when the second solder portion 112 is used as a collector electrode or an emitter electrode. For example, the characteristic detection unit 302 may detect the voltage V ce between the wiring portion 130 and the wiring portion 170 shown in FIG. 6. When a crack occurs in the second solder portion 112, the collector-emitter voltage V ce rapidly increases.

[0070] The characteristic detection unit 302 may output information indicating the detected electrical characteristics to an external device via the external terminal 306. The external device may control the semiconductor module 300 based on the information. For example, when the external device determines that a crack has occurred in the second solder portion 112 based on the information, it may control the semiconductor chip of the semiconductor module 300 to the off state.

[0071] FIG. 12 is a diagram showing another example of the configuration included in the semiconductor module 300. The semiconductor module 300 in this example further includes an initial value generation unit 303 and an estimation unit 304 in addition to the configuration shown in FIG. 11.

[0072] The initial value generation unit 303 generates an initial value of the electrical characteristics of the second semiconductor chip 102. For example, when the characteristic detection unit 302 detects the voltage V ce the initial value generation unit 303 generates an initial value of the voltage V ce .

[0073] The estimation unit 304 compares the electrical characteristics detected by the characteristic detection unit 302 with the initial value generated by the initial value generation unit 303, and estimates whether a crack has occurred in the second solder portion 112. The estimation unit 304 may estimate that a crack has occurred in the second solder portion 112 when the deviation amount between the detected value and the initial value exceeds a predetermined threshold. Also, the estimation unit 304 may estimate that a crack has occurred in the second solder portion 112 when the detected value exceeds a value obtained by multiplying the initial value by a predetermined coefficient. Further, the estimation unit 304 may estimate that a crack has occurred in the second solder portion 112 when the amount of change in the detected value per unit time exceeds a predetermined threshold.

[0074] The estimation unit 304 may compare the electrical characteristics with the initial values in the state of an analog signal. In this case, the initial value generation unit 303 may include a constant voltage circuit that generates a predetermined voltage from the voltage of an internal power supply provided in the semiconductor module 300. The estimation unit 304 may compare the electrical characteristics with the initial values in the state of a digital signal. In this case, the initial value generation unit 303 may include a memory such as an EEPROM that stores the initial values. Further, the characteristic detection unit 302 may include an AD converter that converts the detected electrical characteristics into a digital signal.

[0075] The estimation unit 304 outputs information indicating the estimation result. The estimation unit 304 may output the estimation result to an external device via the external terminal 306 shown in FIG. 11. In another example, the estimation unit 304 may output the estimation result to a control unit provided in the semiconductor module 300. The control unit may control each semiconductor chip based on the estimation result.

[0076] FIG. 13 is a diagram showing an example of the cooling unit 114. The cooling unit 114 is provided below the main circuit unit 200. The cooling unit 114 in this example is disposed below the bottom surface 206 of the housing 208. The cooling unit 114 may include cooling fins 95 that form a flow path through which a refrigerant flows. The cooling fins 95 in this example form a flow path parallel to the Y-axis direction. The cooling fins 95 preferably form a flow path below the first semiconductor chip 101 and the second semiconductor chip 102. As shown in FIG. 2, the cooling unit 114 may flow the refrigerant in the direction from the first semiconductor chip 101 toward the second semiconductor chip 102.

[0077] As described above, the present invention has been described using the embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that embodiments with such changes or improvements can also be included in the technical scope of the present invention.

Explanation of Reference Numerals

[0078] 95 ··· Cooling fins, 101 ··· First semiconductor chip, 102 ··· Second semiconductor chip, 111 ··· First solder portion, 112 ··· Second solder portion, 114 ··· Cooling portion, 116 ··· Gate pad, 118 ··· Sense pad, 130, 164, 166, 168, 170 ··· Wiring portions, 162 ··· Insulating substrate, 200 ··· Main circuit portion, 171 ··· Conductive layer, 206 ··· Bottom surface, 208 ··· Housing, 210 ··· Main terminal, 211 ··· Main terminal, 212 ··· Output terminal, 214 ··· Control terminal, 216 ··· Through hole, 300 ··· Semiconductor module, 302 ··· Characteristic detection portion, 303 ··· Initial value generation portion, 304 ··· Estimation portion, 306 ··· External terminal

Claims

1. A main terminal to which power supply power is supplied, An output terminal that outputs voltage and current, A first semiconductor chip and a second semiconductor chip each including a power semiconductor element, A wiring portion joined to the first semiconductor chip and the second semiconductor chip, A first solder portion that joins the first semiconductor chip and the wiring portion, A second solder portion that is more likely to crack with respect to the thermal history than the first solder portion and joins the second semiconductor chip and the wiring portion and comprising, The first semiconductor chip is provided between the main terminal and the output terminal, The second semiconductor chip is provided in parallel with the first semiconductor chip between the main terminal and the output terminal, By switching the second semiconductor chip, at least one of the voltage and current output from the output terminal changes Semiconductor module.

2. Further comprising an insulating substrate provided with a plurality of the wiring portions, The first semiconductor chip and the second semiconductor chip are provided on the common wiring portion The semiconductor module according to claim 1.

3. The wiring portion is A first wiring portion that joins the upper surface on the side opposite to the insulating substrate of the first semiconductor chip, A second wiring portion that joins the upper surface on the side opposite to the insulating substrate of the second semiconductor chip and includes, The first solder portion is provided between the upper surface of the first semiconductor chip and the first wiring portion, The second solder portion is provided between the upper surface of the second semiconductor chip and the second wiring portion, The thickness of the second solder portion is smaller than the thickness of the first solder portion The semiconductor module according to claim 2.

4. The second solder portion has a smaller thickness in the direction connecting the semiconductor chip and the wiring portion than the first solder portion. The semiconductor module according to claim 1.

5. The thickness of the second solder portion is 75% or less of the thickness of the first solder portion. The semiconductor module according to claim 4.

6. The thickness of the second solder portion is 20 μm or more and 100 μm or less. The semiconductor module according to claim 4.

7. The second solder portion is formed of a material composition different from that of the first solder portion. The semiconductor module according to any one of claims 1 to 6.

8. The indium content (by weight %) in the second solder portion is smaller than the indium content (by weight %) in the first solder portion. The semiconductor module according to claim 7.

9. The indium content in the second solder portion is half or less of the indium content in the first solder portion. The semiconductor module according to claim 8.

10. A main terminal, A main circuit portion connected to the main terminal, and further includes The first semiconductor chip and the second semiconductor chip are provided in the main circuit portion. The semiconductor module according to any one of claims 1 to 9.

11. A cooling portion disposed below the first semiconductor chip and the second semiconductor chip and flowing a refrigerant in a direction from the first semiconductor chip toward the second semiconductor chip, and The semiconductor module according to any one of claims 1 to 10, further comprising. Claim 12 The first semiconductor chip and the second semiconductor chip are fixed to the same insulating substrate. The semiconductor module according to claim 1. Claim 13 A plurality of the first semiconductor chips are provided. The second semiconductor chip is disposed sandwiched between two of the first semiconductor chips. The semiconductor module according to any one of claims 1 to 12. Claim 14 Further provided is a characteristic detection unit that detects electrical characteristics of the second solder portion and the second semiconductor chip. The semiconductor module according to any one of claims 1 to 13. Claim 15 Further provided is an estimation unit that estimates the state of the second solder portion based on the electrical characteristics detected by the characteristic detection unit. The semiconductor module according to claim 14.

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