Semiconductor device

By reducing the particle size of specific solders and incorporating a Ni layer with a solidification starting point, the semiconductor device enhances its Electromigration life by delaying the disappearance of the Ni layer and reducing Cu movement.

JP7694512B2Active Publication Date: 2025-06-18DENSO CORP
View PDF 7 Cites 0 Cited by

Patent Information

Application Number
JP2022140168
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-09-02
Publication Date
2025-06-18
Estimated Expiration
2042-09-02

AI Technical Summary

Technical Problem

Existing semiconductor devices face challenges in improving the Electromigration (EM) life, particularly due to the small joint area of solder joints and high current densities in certain areas, which can lead to the disappearance of Ni layers and reduce the EM life.

Method used

The semiconductor device incorporates a configuration where the particle size of at least one of the first upper solder, the second upper solder, and the intermediate solder is smaller than the particle size of the first lower solder and the second lower solder, with a Ni layer on the connection targets and a solidification starting point, such as wire pieces or a concavo-convex oxide film, to reduce the solder particle size and inhibit Cu movement.

Benefits of technology

This configuration delays the disappearance of the Ni layer due to EM, thereby improving the EM life of the semiconductor device by reducing the particle size of critical solders and increasing the grain boundaries, which inhibits Cu movement and prolongs the alloy layer and Ni layer durability.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007694512000001
    Figure 0007694512000001
  • Figure 0007694512000002
    Figure 0007694512000002
  • Figure 0007694512000003
    Figure 0007694512000003
Patent Text Reader

Abstract

To provide a semiconductor device capable of improving the EM life.SOLUTION: The semiconductor device that makes up an upper and lower arm circuit for one phase includes joints 80 and 81 connected via a solder 104. Each of the multiple solders electrically connected to the main electrode of the semiconductor element includes Cu and Sn. Each solder connection target has a Ni layer. The solder 104 includes Cu and Sn, and the joint parts 80 and 81 have Ni layers 801 and 811. The particle size of the solder 104 is smaller than the particle size of the solder to which the collector electrode is connected.SELECTED DRAWING: Figure 8
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The disclosure in this specification relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device including a semiconductor element constituting an upper arm of an upper and lower arm circuit and a semiconductor element constituting a lower arm. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The above-described semiconductor device includes a joint conductor that connects, via solder, a conductor connected to a low-potential-side main electrode of a semiconductor element constituting an upper arm and a conductor connected to a high-potential-side main electrode of a semiconductor element constituting a lower arm. The joint area of the solder joint of the joint conductor is small. In Patent Document 1, in order to suppress the EM progress of the solder joint of the joint conductor, a Ni layer is provided on the joint conductor. EM is an abbreviation for ElectroMigration.

[0005] With the proposal of carbon neutrality and the progress of the EV conversion of vehicles, further miniaturization and increased current capacity are required for semiconductor devices. That is, further improvement for improving the EM life is required. From the above viewpoints or other viewpoints not mentioned, further improvement of the semiconductor device is required.

[0006] This disclosure has been made in view of such problems, and an object thereof is to provide a semiconductor device capable of improving the EM life.

Means for Solving the Problem

[0007] One of the disclosed semiconductor devices is It has signal pads on the upper surface and upper electrodes which are main electrodes, and main electrodes on the lower surface which is the surface opposite to the upper surface in the plate thickness direction, and has a plurality of semiconductor elements (40) having lower electrodes with an area larger than that of the upper electrodes when viewed in plan from the plate thickness direction, A plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrodes via solder, and The plurality of semiconductor elements include a first semiconductor element (40H) constituting the upper arm (9H) of the upper and lower arm circuit (9), and a second semiconductor element (40L) constituting the lower arm (9L) of the upper and lower arm circuit and arranged side by side with the first semiconductor element in one direction orthogonal to the plate thickness direction so that the upper surfaces are on the same side in the plate thickness direction, The plurality of conductors include a first upper conductor (50H, 70H) connected to the upper electrode of the first semiconductor element via a first upper solder (101H, 102H), a first lower conductor (60H) connected to the lower electrode of the first semiconductor element via a first lower solder (103H), a second upper conductor (50L, 70L) connected to the upper electrode of the second semiconductor element via a second upper solder (101L, 102L), a second lower conductor (60L) connected to the lower electrode of the second semiconductor element via a second lower solder (103L), and a joint conductor (80, 81) connecting the first upper conductor and the second lower conductor via an intermediate solder (104), Each solder contains Cu and Sn, Each of the connection targets of each solder has a Ni layer (801, 811), The particle size of at least one of the first upper solder, the second upper solder, and the intermediate solder is smaller than the particle size of the first lower solder and the second lower solder く, Inside the small solder, which is solder smaller than the particle sizes of the first lower solder and the second lower solder, or on the surface of the object to be connected by the small solder, there is a solidification starting point for reducing the particle size.

[0008] In the case of a configuration in which the upper electrode is smaller than the lower electrode and includes a joint conductor, the current densities in the first upper solder, the second upper solder, and the relay solder are higher than the current densities in the first lower solder and the second lower solder. According to the disclosed semiconductor device, the particle size of at least one of the first upper solder, the second upper solder, and the relay solder having a high current density is smaller than the particle size of the first lower solder and the second lower solder. Thereby, the disappearance of the Ni layer due to EM can be delayed. As a result, a semiconductor device capable of improving the EM life can be provided.

[0009] The plurality of aspects disclosed in this specification employ different technical means in order to achieve their respective purposes. The claims and the reference numerals in parentheses described in this section exemplify the correspondence with the parts of the embodiments described later, and are not intended to limit the technical scope. The objects, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Embodiments for Carrying Out the Invention

[0011] Hereinafter, a plurality of embodiments will be described with reference to the drawings. In each embodiment, the same reference numerals may be given to corresponding components, and redundant descriptions may be omitted. When only a part of the configuration is described in each embodiment, the configuration of other embodiments described previously can be applied to other parts of the said configuration. Also, not only the combinations of configurations explicitly shown in the description of each embodiment, but also the configurations of a plurality of embodiments can be partially combined with each other as long as there is no problem with the combination, even if not explicitly stated.

[0012] The semiconductor device of the present embodiment is applied, for example, to a power conversion device of a moving body having a rotating electric machine as a drive source. The moving body is, for example, an electric vehicle (BEV), a hybrid vehicle (HEV), a plug-in hybrid vehicle (PHEV), etc., a flying body such as an electric vertical takeoff and landing aircraft or a drone, a ship, a construction machine, or an agricultural machine. Hereinafter, an example applied to a vehicle will be described.

[0013] (First Embodiment) First, based on FIG. 1, the schematic configuration of the vehicle drive system 1 will be described.

[0014] <Vehicle drive system> As shown in FIG. 1, the vehicle drive system 1 includes a DC power source 2, a motor generator 3, and a power conversion device 4.

[0015] The DC power source 2 is a DC voltage source composed of a rechargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electrical machine. The motor generator 3 functions as a driving source for vehicle travel, that is, as an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power source 2 and the motor generator 3.

[0016] <Power conversion device> Next, based on FIG. 1, the circuit configuration of the power conversion device 4 will be described. The power conversion device 4 includes a power conversion circuit. As shown in FIG. 1, the power conversion device 4 includes a smoothing capacitor 5 and an inverter 6 which is a power conversion circuit.

[0017] The smoothing capacitor 5 mainly smooths the DC voltage supplied from the DC power source 2. The smoothing capacitor 5 is connected to a P line 7 which is a high-potential side power line and an N line 8 which is a low-potential side power line. The P line 7 is connected to the positive electrode of the DC power source 2, and the N line 8 is connected to the negative electrode of the DC power source 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power source 2 and the inverter 6. Similarly, the negative electrode is connected to the N line 8 between the DC power source 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel with the DC power source 2.

[0018] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage into a three-phase AC voltage according to switching control by a control circuit (not shown) and outputs it to the motor generator 3. Thereby, the motor generator 3 is driven to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 receiving the rotational force from the wheels into a DC voltage according to switching control by the control circuit and outputs it to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.

[0019] The inverter 6 is configured to include upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are serially connected between the P line 7 and the N line 8 with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the corresponding phase winding 3a in the motor generator 3 via the output line 10. The inverter 6 has six arms. At least a part of each of the P line 7, the N line 8, and the output line 10 is constituted by a conductive member such as a bus bar.

[0020] The elements constituting each arm include an IGBT 11 which is a switching element and a diode 12 for freewheeling. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. In this embodiment, an n-channel type IGBT 11 is adopted. The diode 12 is connected in anti-parallel to the corresponding IGBT 11. In the upper arm 9H, the collector of the IGBT 11 is connected to the P line 7. In the lower arm 9L, the emitter of the IGBT 11 is connected to the N line 8. And the emitter of the IGBT 11 in the upper arm 9H and the collector of the IGBT 11 in the lower arm 9L are connected to each other. The anode of the diode 12 is connected to the emitter of the corresponding IGBT 11, and the cathode is connected to the collector.

[0021] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into DC voltages of different values. The converter is provided between the DC power supply 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-described upper and lower arm circuits 9. According to this configuration, step-up and step-down are possible. The power conversion device 4 may include a filter capacitor for removing power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0022] The power conversion device 4 may include a drive circuit for a switching element that constitutes the inverter 6 or the like. The drive circuit supplies a drive voltage to the gate of the IGBT 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding IGBT 11, that is, turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0023] The power conversion device 4 may include a control circuit for the switching element. The control circuit generates a drive command for operating the IGBT 11 and outputs it to the drive circuit. The control circuit generates a drive command based on a torque request input from an upper ECU (not shown) and signals detected by various sensors. Examples of the various sensors include a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as a drive command. The control circuit is configured to include, for example, a processor and a memory. ECU is an abbreviation for Electronic Control Unit. PWM is an abbreviation for Pulse Width Modulation.

[0024] <Semiconductor Device> Next, based on FIGS. 2 to 6, the schematic configuration of the semiconductor device 20 will be described. FIG. 2 is a plan view showing the semiconductor device 20. FIG. 2 is a plan view of the upper surface of the semiconductor device 20. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2. FIG. 5 is a view in which the sealing body 30 is omitted with respect to FIG. 2. FIG. 6 is a view in which the heat sink 50 on the emitter electrode 42 side is omitted with respect to FIG. 5.

[0025] For some of the elements constituting the semiconductor device, an "H" indicating the upper arm 9H side is added to the end of the reference numeral, and an "L" indicating the lower arm 9L side is added. For some other elements, for convenience, the same reference numeral is given to the upper arm 9H and the lower arm 9L.

[0026] Hereinafter, the thickness direction of the semiconductor element (semiconductor substrate) is defined as the Z direction. One direction orthogonal to the Z direction is defined as the X direction. The direction orthogonal to both the Z direction and the X direction is defined as the Y direction. Unless otherwise specified, the shape viewed from the Z direction in plan view, in other words, the shape along the XY plane defined by the X direction and the Y direction, is defined as the planar shape. Also, the plan view from the Z direction may be simply referred to as the plan view.

[0027] As shown in FIGS. 2 to 6, the semiconductor device 20 includes a sealing body 30, a semiconductor element 40, heat sinks 50 and 60, a conductive spacer 70, joints 80 to 82, and external connection terminals 90. The semiconductor device 20 further includes bonding wires 97 and solder 100. The semiconductor device 20 constitutes the above-described upper and lower arm circuits 9 for one phase.

[0028] The encapsulation body 30 encapsulates a part of other elements constituting the semiconductor device 20. The remaining part of the other elements is exposed outside the encapsulation body 30. The encapsulation body 30 is made of, for example, resin. An example of the resin is an epoxy resin. The encapsulation body 30 is formed using, for example, the transfer molding method with resin as the material. Such an encapsulation body 30 may be referred to as an encapsulation resin body, a molded resin, a resin molded body, etc. The encapsulation body 30 may be formed using, for example, a gel. The gel is filled (arranged) in, for example, the opposing regions of the heat sinks 50 and 60.

[0029] As shown in FIGS. 2 to 4, the encapsulation body 30 has a substantially rectangular planar shape. The encapsulation body 30 has, as the surfaces forming the outer contour, a front surface 30a and a back surface 30b which is the surface opposite to the front surface 30a in the Z direction. The front surface 30a and the back surface 30b are, for example, substantially flat surfaces. Further, the encapsulation body 30 has side surfaces 30c, 30d, 30e, 30f that are continuous with the front surface 30a and the back surface 30b. The side surface 30c is the surface where the main terminals 91 to 93 of the external connection terminals 90 protrude. The side surface 30d is the surface opposite to the side surface 30c in the Y direction. The side surface 30d is the surface where the signal terminal 94 protrudes. The side surfaces 30e, 30f are the surfaces where the external connection terminals 90 do not protrude. The side surface 30e is the surface opposite to the side surface 30f in the X direction.

[0030] The semiconductor element 40 includes a semiconductor substrate 41, an emitter electrode 42, a collector electrode 43, and pads 44. The semiconductor element 40 may be referred to as a semiconductor chip. The semiconductor substrate 41 is made of, for example, silicon (Si), a wide bandgap semiconductor having a wider bandgap than silicon, etc., and a vertical element is formed thereon. Examples of the wide bandgap semiconductor include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond.

[0031] The vertical element is configured to allow a main current to flow in the thickness direction of the semiconductor substrate 41 (semiconductor element 40), that is, in the Z direction. The vertical element in this embodiment is the IGBT 11 and the diode 12 that constitute one arm. The vertical element is an IGBT in which the diode 12 is connected in antiparallel, that is, an RC-IGBT. RC is an abbreviation for Reverse Conducting. The vertical element is a heating element that generates heat when energized. A gate electrode (not shown) is formed on the semiconductor substrate 41. The gate electrode has, for example, a trench structure.

[0032] The semiconductor substrate 41 has a substantially rectangular planar shape. The emitter electrode 42, which is one of the main electrodes, is disposed on one surface of the semiconductor substrate 41. The collector electrode 43, which is the other main electrode, is disposed on the back surface of the semiconductor substrate 41. One surface of the semiconductor substrate 41 is the surface on the one surface 30a side of the sealing body 30 in the thickness direction among the main surfaces of the semiconductor substrate 41. The back surface of the semiconductor substrate 41 is the surface on the back surface 30b side of the semiconductor substrate 41 in the thickness direction among the main surfaces of the semiconductor substrate 41.

[0033] When the IGBT 11 is turned on, a current (main current) flows between the main electrodes, that is, between the emitter electrode 42 and the collector electrode 43. The emitter electrode 42 also serves as the anode electrode of the diode 12. The collector electrode 43 also serves as the cathode electrode of the diode 12. The collector electrode 43 is formed over substantially the entire back surface of the semiconductor substrate 41. The emitter electrode 42 is formed on a part of one surface of the semiconductor substrate 41. That is, in a plan view, the collector electrode 43 has a larger area than the emitter electrode 42. The emitter electrode 42 corresponds to the upper electrode, and the collector electrode 43 corresponds to the lower electrode.

[0034] The emitter electrode 42 has a Ni layer formed using a material mainly composed of Ni (nickel). The emitter electrode 42 in this embodiment has an Al layer formed using a material mainly composed of Al (aluminum) and a Ni layer laminated on the Al layer. The collector electrode 43 also has an Al layer and a Ni layer, similar to the emitter electrode 42.

[0035] Pad 44 is an electrode for signals. Pad 44 is formed in a region different from the formation region of emitter electrode 42 on one surface of semiconductor substrate 41. Pad 44 is formed at an end portion on the opposite side of the formation region of emitter electrode 42 in the Y direction. Pad 44 is provided side by side with emitter electrode 42 in the Y direction. The number of pads 44 is not particularly limited. Pad 44 includes at least a pad for a gate electrode.

[0036] As an example, semiconductor element 40 has five pads 44. Specifically, it has a pad for a gate electrode, a pad for detecting the emitter potential, a pad for detecting the cathode potential of a temperature-sensitive diode (not shown) included in semiconductor element 40, a pad for detecting the anode potential in the same way, and a pad for current sense. The five pads 44 are arranged side by side along the X direction.

[0037] Semiconductor device 20 includes two semiconductor elements 40. Specifically, it includes semiconductor element 40H that constitutes the upper arm 9H and semiconductor element 40L that constitutes the lower arm 9L. Semiconductor element 40H may be referred to as a first semiconductor element, an upper arm element, etc. Semiconductor element 40L may be referred to as a second semiconductor element, a lower arm element, etc. Semiconductor elements 40H and 40L have the same specifications as each other, that is, they are common members. Semiconductor elements 40H and 40L are arranged side by side in the X direction. Semiconductor elements 40H and 40L are arranged at substantially the same position as each other in the Z direction. Semiconductor elements 40H and 40L are arranged such that their one surfaces, that is, emitter electrodes 42 are located on the same side in the Z direction.

[0038] The heat sink 50 is electrically connected to the emitter electrode 42 and provides a wiring function. Similarly, the heat sink 60 is electrically connected to the collector electrode 43 and provides a wiring function. The heat sinks 50 and 60 provide a heat dissipation function for dissipating the heat generated by the semiconductor element 40. For this reason, the heat sinks 50 and 60 may be referred to as wiring members, conductive members, heat dissipation members, etc. The heat sinks 50 and 60 are arranged so as to sandwich the semiconductor element 40 in the Z direction. The heat sinks 50 and 60 are arranged so that at least a part of them faces each other in the Z direction. The heat sinks 50 and 60 enclose the semiconductor element 40 in a plan view.

[0039] The heat sinks 50 and 60 are metal plates made of a metal with good conductivity such as Cu or a Cu alloy. The metal plate is provided, for example, as a part of a lead frame. The heat sinks 50 and 60 have a Ni layer formed on the surface by plating or the like. The heat sinks 50 and 60 have the Ni layer at least on the solder joint surface.

[0040] As the wiring member, instead of the heat sinks 50 and 60, a substrate in which metal bodies are arranged on both sides of an insulating base material such as ceramic or resin may be adopted. In this case, the metal body on the semiconductor element 40 side corresponds to a conductor to which soldering is performed, that is, an upper conductor or a lower conductor. The metal body on the semiconductor element 40 side has a Ni layer on the surface.

[0041] The heat sink 50 has a facing surface 50a which is the surface on the semiconductor element 40 side, and a back surface 50b which is the surface opposite to the facing surface 50a. Similarly, the heat sink 60 also has a facing surface 60a and a back surface 60b. The back surfaces 50b and 60b of the heat sinks 50 and 60 are exposed from the sealing body 30. The back surfaces 50b and 60b may be referred to as heat dissipation surfaces, exposed surfaces, etc. The back surface 50b of the heat sink 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the heat sink 60 is substantially flush with the back surface 30b of the sealing body 30.

[0042] The semiconductor device 20 includes two heat sinks 50. Specifically, it includes a heat sink 50H that constitutes the upper arm 9H and a heat sink 50L that constitutes the lower arm 9L. The heat sink 50H corresponds to the first main body portion of the first upper conductor, and the heat sink 50L corresponds to the second main body portion of the second upper conductor.

[0043] As shown in FIG. 5, the heat sinks 50H and 50L are substantially rectangular in plan view. The heat sinks 50H and 50L are arranged side by side in the X direction. As shown in FIGS. 3 and 4, the heat sinks 50H and 50L have substantially the same thickness and are arranged at substantially the same position in the Z direction. The heat sinks 50H and 50L enclose the corresponding semiconductor elements 40 and conductive spacers 70 in plan view. Grooves 51 for accommodating the overflowed solder are formed on the opposing surfaces 50a of the heat sinks 50H and 50L respectively. The grooves 51 surround the solder joints on the opposing surfaces 50a. The grooves 51 are formed, for example, in an annular shape. The back surfaces 50b of the heat sinks 50H and 50L exposed from the sealing body 30 are arranged side by side in the X direction.

[0044] The semiconductor device 20 includes two heat sinks 60. Specifically, it includes a heat sink 60H that constitutes the upper arm 9H and a heat sink 60L that constitutes the lower arm 9L. The heat sink 60H corresponds to the first lower conductor, and the heat sink 60L corresponds to the second lower conductor.

[0045] As shown in FIG. 6, the heat sinks 60H and 60L are substantially rectangular in plan view. The heat sinks 60H and 60L are arranged side by side in the X direction. As shown in FIGS. 3 and 4, the heat sinks 60H and 60L have substantially the same thickness and are arranged at substantially the same position in the Z direction. The heat sinks 60H and 60L enclose the corresponding semiconductor elements 40 in plan view. The back surfaces 60b of the heat sinks 60H and 60L exposed from the sealing body 30 are arranged side by side in the X direction.

[0046] The conductive spacer 70 is interposed between the semiconductor element 40 and the heat sink 50 in the Z direction. The conductive spacer 70 provides a spacer function for securing a predetermined interval between the semiconductor element 40 and the heat sink 50. For example, the conductive spacer 70 secures a height for electrically connecting the corresponding signal terminal 94 to the pad 44 of the semiconductor element 40. The conductive spacer 70 is positioned in the middle of the electrical conduction and heat conduction paths between the emitter electrode 42 of the semiconductor element 40 and the heat sink 50, and provides a wiring function and a heat dissipation function. The conductive spacer 70 constitutes an upper conductor together with the heat sink 50.

[0047] The conductive spacer 70 is a metal member made of a metal with good electrical conductivity and thermal conductivity such as Cu. The conductive spacer 70 may be referred to as a terminal, a terminal block, a metal block body, etc. The conductive spacer 70 has a Ni layer formed on its surface by plating or the like. The conductive spacer 70 has the Ni layer at least on the solder joint surface. The conductive spacer 70 of the present embodiment is a columnar body having a substantially rectangular planar shape that is substantially the same size as the emitter electrode 42 in plan view.

[0048] The semiconductor device 20 includes two conductive spacers 70. Specifically, it includes a conductive spacer 70H that constitutes the upper arm 9H and a conductive spacer 70L that constitutes the lower arm 9L. The conductive spacer 70H corresponds to the first spacer portion of the first upper conductor, and the conductive spacer 70L corresponds to the second spacer portion of the second upper conductor.

[0049] The joints 80 to 82 connect the elements that make up the upper and lower arm circuits 9. The joints 80 to 82 connect the elements that make up the semiconductor device 20. The joints 80 to 82 are metal members made of a metal with good electrical conductivity and thermal conductivity such as Cu. The joints 80 to 82 have a Ni layer formed on their surface by plating or the like. The joints 80 to 82 have the Ni layer at least on the solder joint surface.

[0050] As shown in FIGS. 3 and 6, the joint portion 80 is continuous with the heat sink 60L. The thickness of the joint portion 80 is thinner than that of the heat sink 60L. The joint portion 80 is continuous with the opposing surface (side surface) to the heat sink 60H in a state substantially flush with the opposing surface 60a of the heat sink 60L. The joint portion 80 has two bent portions and thus forms a substantially crank shape in the ZX plane. The joint portion 80 is covered by the sealing body 30.

[0051] The joint portion 80 may be continuous and integrally provided with respect to the heat sink 60L, or may be provided as a separate member and be continuous by joining. The joint portion 80 of the present embodiment is integrally provided with the heat sink 60L as a part of the lead frame. The Ni layer is continuously and integrally provided with respect to the heat sink 60L and the joint portion 80.

[0052] As shown in FIGS. 3, 4, and 5, the joint portions 81 and 82 are continuous with the corresponding heat sinks 50. The joint portion 81 is continuous with the heat sink 50H. The joint portion 82 is continuous with the heat sink 50L. The thicknesses of the joint portions 81 and 82 are thinner than those of the corresponding heat sinks 50. The joint portions 81 and 82 are covered by the sealing body 30.

[0053] The joint portions 81 and 82 may be continuous and integrally provided with respect to the heat sink 50, or may be provided as separate members and be continuous by joining. The joint portions 81 and 82 of the present embodiment are integrally provided with respect to the corresponding heat sinks 50H and 50L. The joint portions 81 and 82 extend in the X direction from the opposing side surfaces of the heat sinks 50H and 50L. The Ni layer is continuously and integrally provided with respect to the heat sink 50H and the joint portion 81. The Ni layer is continuously and integrally provided with respect to the heat sink 50L and the joint portion 82. As an example, the heat sink 50H including the joint part 81 and the heat sink 50L including the joint part 82 are common members. The arrangement of the heat sink 50H including the joint part 81 and the heat sink 50L including the joint part 82 is rotationally symmetric about the Z axis twice. Solder is interposed between the opposing surfaces of the joint part 80 and the joint part 81, and a solder joint is formed. As shown in FIG. 5, the joint parts 81 and 82 are arranged between the heat sinks 50H and 50L in a plan view. The joint parts 81 and 82 are arranged side by side in the Y direction between the heat sinks 50H and 50L.

[0054] A groove 83 for accommodating the overflowed solder is formed on the joint surfaces of the joint parts 81 and 82. The groove 83 is formed in an annular shape so as to surround the solder joint. The groove 83 is formed, for example, by pressing. The joint parts 80 and 81 correspond to a joint conductor and a first joint conductor. The joint part 82 corresponds to a second joint conductor.

[0055] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed using a metal material having good conductivity such as copper. The external connection terminal 90 is, for example, a plate material. The external connection terminal 90 may be referred to as a lead. The external connection terminal 90 includes main terminals 91, 92, 93 and a signal terminal 94. The main terminals 91, 92, 93 are external connection terminals 90 electrically connected to the main electrodes of the semiconductor element 40.

[0056] As shown in FIGS. 5 and 6, the main terminal 91 is electrically connected to the collector electrode 43 of the semiconductor element 40H. The main terminal 91 is electrically connected to the positive electrode terminal of the smoothing capacitor 5. The main terminal 91 may be referred to as a P terminal, a high potential power supply terminal, etc. The main terminal 91 is connected to the collector electrode 43 of the semiconductor element 40H via the heat sink 60H. The main terminal 91 is continuous with one end of the heat sink 60H in the Y direction. The thickness of the main terminal 91 is thinner than that of the heat sink 60H. The main terminal 91 is continuous with the heat sink 60H so as to be substantially flush with the opposing surface 60a, for example. The main terminal 91 may be continuous by being integrally provided continuously with respect to the heat sink 60H, or may be provided as a separate member and be continuous by bonding.

[0057] The main terminal 91 of the present embodiment is integrally provided with the heat sink 60H as a part of the lead frame. The main terminal 91 extends in the Y direction from the heat sink 60H and protrudes outside from the side surface 30c of the sealing body 30. The main terminal 91 has a bent portion in the middle of the portion covered by the sealing body 30 and protrudes from near the center in the Z direction on the side surface 30c.

[0058] As shown in FIGS. 5 and 6, the main terminal 92 is electrically connected to the emitter electrode 42 of the semiconductor element 40L. The main terminal 92 is electrically connected to the negative electrode terminal of the smoothing capacitor 5. The main terminal 92 may be referred to as an N terminal, a low potential power supply terminal, etc. The main terminal 92 is connected to the emitter electrode 42 of the semiconductor element 40L via the joint portion 82, the heat sink 50L, and the conductive spacer 70L. The main terminal 92 extends in the Y direction and protrudes outside the sealing body 30 from the same side surface 30c as the main terminal 91.

[0059] The main terminal 92 has a connection portion 920 with the joint portion 82 near one end in the Y direction. Among the main terminals 92, a part including the connection portion 920 is covered by the sealing body 30, and the remaining part protrudes from the sealing body 30. The connection portion 920 has a greater plate thickness than the portion protruding from the sealing body 30. The plate thickness of the connection portion 920 is, for example, approximately the same thickness as the heat sink 50L. The main terminal 92 also has a bent portion like the main terminal 91 and protrudes from near the center in the Z direction on the side surface 30c. The main terminal 92 has a Ni layer formed on its surface by plating or the like. The main terminal 92 has the Ni layer at least on the solder joint surface of the connection portion 920.

[0060] The main terminal 93 is connected to the connection point between the upper arm 9H and the lower arm 9L. The main terminal 93 is electrically connected to the emitter electrode 42 of the semiconductor element 40H and the collector electrode 43 of the semiconductor element 40L. The main terminal 93 is electrically connected to the winding 3a of the corresponding phase of the motor generator 3. The main terminal 93 may be referred to as an output terminal, an AC terminal, an O terminal, etc. The main terminal 93 is electrically connected to the emitter electrode 42 of the semiconductor element 40H via the heat sink 60L, the joint portions 80, 81, the heat sink 50H, and the conductive spacer 70H. The main terminal 93 is connected to the collector electrode 43 of the semiconductor element 40L via the heat sink 60L.

[0061] The main terminal 93 is continuous with one end in the Y direction of the heat sink 60L. The thickness of the main terminal 93 is thinner than that of the heat sink 60L. The main terminal 93 is continuous with the heat sink 60L so as to be substantially flush with the opposing surface 60a, for example. The main terminal 93 may be continuous by being continuously and integrally provided with respect to the heat sink 60L, or may be provided as a separate member and be continuous by bonding.

[0062] The main terminal 93 of this embodiment is integrally provided with the heat sink 60L as a part of the lead frame. The main terminal 93 extends in the Y direction from the heat sink 60L and protrudes outside the sealing body 30 from the same side surface 30c as the main terminal 91. The main terminal 93 also has a bent portion like the main terminal 91 and protrudes from near the center in the Z direction on the side surface 30c. The three main terminals 91 to 93 are arranged in the order of the main terminal 91, the main terminal 92, and the main terminal 93 in the X direction.

[0063] The signal terminal 94 is electrically connected to the corresponding pad 44 of the semiconductor element 40. The signal terminal 94 of this embodiment is electrically connected to the pad 44 via a bonding wire 97. The signal terminal 94 extends in the Y direction and protrudes outside from the side surface 30d of the sealing body 30. The semiconductor device 20 includes five signal terminals 94, that is, a total of ten signal terminals 94 for one semiconductor element 40. The plurality of signal terminals 94 are arranged side by side in the X direction. The signal terminal 94 is formed, for example, on the same lead frame as the heat sink 60 and the main terminals 91 to 93.

[0064] Note that the semiconductor device 20 includes a suspension lead 95. The heat sink 60 (60H, 60L), the joint portion 81, the main terminals 91 to 93, and the signal terminals 94 are formed on a lead frame which is a common member. The lead frame is a deformed strip with different thicknesses in part. The signal terminal 94 is supported by the suspension lead 95 via a tie bar (not shown) in the state before cutting. Unnecessary parts of the lead frame, such as the tie bar and the outer peripheral frame, are cut (removed) after the molding of the sealing body 30.

[0065] The semiconductor device 20 includes a plurality of solder joints 100 for connecting between elements. The solder joints 100 include solder joints 101H, 101L, 102H, 102L, 103H, 103L, 104, and 105. The solder joint 101H is interposed between the emitter electrode 42 of the semiconductor element 40H and the conductive spacer 70H, and joins the emitter electrode 42 and the conductive spacer 70H. The solder joint 102H is interposed between the conductive spacer 70H and the heat sink 50H, and joins the conductive spacer 70H and the heat sink 50H. The solder joints 101H and 102H correspond to the first upper solder joints. The solder joint 103H is interposed between the collector electrode 43 of the semiconductor element 40H and the heat sink 60H, and joins the collector electrode 43 and the heat sink 60H. The solder joint 103H corresponds to the first lower solder joint.

[0066] The solder joint 101L is interposed between the emitter electrode 42 of the semiconductor element 40L and the conductive spacer 70L, and joins the emitter electrode 42 and the conductive spacer 70L. The solder joint 102L is interposed between the conductive spacer 70L and the heat sink 50L, and joins the conductive spacer 70L and the heat sink 50L. The solder joints 101L and 102L correspond to the second upper solder joints. The solder joint 103L is interposed between the collector electrode 43 of the semiconductor element 40L and the heat sink 60L, and joins the collector electrode 43 and the heat sink 60L. The solder joint 103L corresponds to the second lower solder joint.

[0067] Note that the solder joints 101H and 101L may be referred to as on-element solder joints. The solder joints 102H and 102L may be referred to as on-spacer solder joints. The solder joints 103H and 103L may be referred to as under-element solder joints.

[0068] Solder 104 electrically connects heat sink 50H and heat sink 60L together with joints 80 and 81. The solder 104 in this embodiment is interposed between joint 80 connected to heat sink 60L and joint 81 connected to heat sink 50H, and joins joints 80 and 81. The solder 104 corresponds to an intermediate solder and a first intermediate solder. Solder 105 electrically connects heat sink 50L and main terminal 92 together with joint 82. The solder 105 in this embodiment is interposed between joint 82 connected to heat sink 50L and connection portion 920 of main terminal 92, and joins joint 82 and main terminal 92. The solder 105 corresponds to a second intermediate solder.

[0069] Each of the plurality of solders 100 contains Cu and Sn. The solder 100 is, for example, a multi-component lead-free solder containing Cu, Bi, Sb, etc., with the balance being Sn. The thickness of each solder 100 is, for example, about 100 μm.

[0070] As described above, in the semiconductor device 20, a plurality of semiconductor elements 40 constituting the upper and lower arm circuits 9 for one phase are encapsulated by the encapsulant 30. The encapsulant 30 integrally encapsulates a part of each of the plurality of semiconductor elements 40, heat sink 50, heat sink 60, conductive spacer 70, joints 80 to 82, main terminals 91 to 93, and a part of signal terminal 94.

[0071] The semiconductor element 40 is disposed between heat sinks 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched by the opposed heat sinks 50 and 60. Thereby, the heat of the semiconductor element 40 can be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the heat sink 50 is substantially flush with one surface 30a of the encapsulant 30. The back surface 60b of the heat sink 60 is substantially flush with the back surface 30b of the encapsulant 30. Since the back surfaces 50b and 60b are exposed surfaces, the heat dissipation performance can be enhanced.

[0072] Note that an Au layer may be provided on the above-described Ni layer by plating or the like. Au suppresses oxidation of Ni and improves wettability with solder, for example. Since Au diffuses into the solder during soldering, it exists in the state before joining and does not exist in the joined state.

[0073] <Output current and reflux current> Next, with reference to FIG. 7, the output current and the reflux current will be described. FIG. 7 shows the output current and the reflux current for the semiconductor element 40H on the upper arm 9H side as an example. In FIG. 7, the output current is indicated by a dashed arrow, and the reflux current is indicated by a dash-dotted arrow.

[0074] The output current (main current) flows during IGBT operation. The output current on the upper arm 9H side flows from the main terminal 91, through the IGBT 11 of the semiconductor element 40H and the main terminal 93, to the motor generator 3. Specifically, as indicated by the dashed arrow in FIG. 7, it flows along the path of main terminal 91 (P terminal) → heat sink 60H → semiconductor element 40H (IGBT 11) → conductive spacer 70H → heat sink 50H → joint part 81 → joint part 80 → heat sink 60L → main terminal 93 (O terminal).

[0075] The reflux current flows during diode operation. The reflux current on the upper arm 9H side flows in the direction opposite to the output current, that is, from the main terminal 93, through the diode 12 of the semiconductor element 40H and the main terminal 91, to the DC power supply 2 side. Specifically, as indicated by the dash-dotted arrow in FIG. 7, it flows along the path of main terminal 93 (O terminal) → heat sink 60L → joint part 80 → joint part 81 → heat sink 50H → conductive spacer 70H → semiconductor element 40H (diode 12) → heat sink 60H → main terminal 91 (P terminal).

[0076] Note that the same applies to the lower arm 9L side. The output current flows along the path of main terminal 93 → IGBT 11 of semiconductor element 40L → main terminal 92. The reflux current flows along the path of main terminal 92 → diode 12 of semiconductor element 40L → main terminal 93.

[0077] <Joint structure and particle size of solder> Next, based on FIGS. 8 to 10, the bonding structure and solder particle size will be described. FIG. 8 is a cross-sectional view showing the bonding structure of the joint portions 80 and 81 in the semiconductor device 20 according to the present embodiment. FIG. 8 is an enlarged cross-sectional view of the region VIII indicated by the dashed-dotted line in FIG. 3. For convenience, in FIG. 8, the wire piece 120 is omitted from the illustration. FIG. 9 is a cross-sectional view showing the wire piece 120 provided on the surface of the joint portion 80. In FIG. 9, for convenience, the alloy layer 110 is omitted. FIG. 10 is a cross-sectional view showing a reference example. FIG. 10 corresponds to FIG. 8. In the reference example, the reference numerals of the respective elements are those obtained by adding an "r" to the end of the reference numerals of the related elements of the semiconductor device 20.

[0078] As shown in FIG. 8, the joint portion 80 has a Cu-based base material 800 and a Ni layer 801 provided on the base material 800. Similarly, the joint portion 81 also has a Cu-based base material 810 and a Ni layer 811 provided on the base material 810. As an example, the Ni layers 801 and 811 are NiP formed by electroless plating. The Ni layers 801 and 811 are Ni plating films containing P.

[0079] The semiconductor device 20 includes an alloy layer 110 interposed between the Ni layer 801 and the solder 104, and an alloy layer 111 interposed between the Ni layer 801 and the solder 104. The alloy layers 110 and 111 are sometimes referred to as IMC. IMC is an abbreviation for Intermetallic Compound. The alloy layers 110 and 111 are formed during solder bonding. The alloy layers 110 and 111 contain Ni, Cu, and Sn. The composition of the alloy layers 110 and 111 is, for example, (Ni - Cu)3Sn4.

[0080] The semiconductor device 20 further includes P-rich layers 802 and 812. The P-rich layer 802 is formed on the surface of the Ni layer 801. The P-rich layer 812 is formed on the surface of the Ni layer 811. The P-rich layers 802 and 812 are formed by diffusion of a part of the Ni in the Ni layers 801 and 811 toward the solder 104 during bonding. The P-rich layers 802 and 812 are layers richer in P than the Ni layers 801 and 811 (NiP). The composition of the P-rich layers 802 and 812 is, for example, Ni3P.

[0081] As shown in FIG. 9, at least one of the joints 80 and 81 has a plurality of wire pieces 120 on the solder joint surface. The wire piece 120 is a small piece of a bonding wire. The wire piece 120 may be referred to as a protrusion or stud bonding. The wire piece 120 is disposed in the solder 104. The plurality of wire pieces 120 are dispersedly arranged in the solder 104. By appropriately setting the height of the wire piece 120, it is also possible to guarantee the minimum thickness of the solder 104. The plurality of wire pieces 120 are fixed (joined) to a first opposing surface which is one of the opposing surfaces constituting the solder joint portion, and protrude toward a second opposing surface which is the other of the opposing surfaces. As an example, in the present embodiment, the wire piece 120 is provided on the solder joint surface of the joint 80. The wire piece 120 is provided, for example, at a predetermined pitch.

[0082] By having the wire piece 120, the surface of the joint 80 has an uneven shape. The solder 104 starts to grow in grains when the solder 104 solidifies starting from the wire piece 120. The grain boundaries 106 are formed by the adjacent grains colliding with each other. The crystal grains grow starting from the corner portion of the wire piece 120, for example, the upper end corner portion. For this reason, the grain size of the solder 104 is smaller than the grain sizes of the solders 103H and 103L, for example. As described above, the thickness of the solder 104 is about 100 μm. The grain size of the solder 104 is smaller than the thickness of the solder 104, that is, smaller than 100 μm.

[0083] In the comparative example shown in FIG. 10, no wire piece is provided on the solder joint surfaces of the joints 80r and 81r. That is, the grain size of the solder 104 is not controlled. Regarding other configurations, they are the same as those of the semiconductor device 20 of the present embodiment. In such a case, the grain size of the solder 104r is about 100 μm. The crystal grains of the solder 104r exist in one or two in the thickness direction (Z direction) of the solder 104.

[0084] In this embodiment, among the plurality of solders 100, the wire pieces 120 are not arranged on the solders 103H and 103L. The particle sizes of the solders 103H and 103L are equivalent to those of the comparative example shown in FIG. 10. The particle sizes of the solders 103H and 103L are larger than those of the solder 104 on which the wire pieces 120 are arranged.

[0085] <em> Next, based on FIG. 11, electromigration (EM) will be described. FIG. 11 is a reference diagram showing the mechanism of EM progress. Also in FIG. 11, the reference numerals of each element are assumed to have an "r" added to the end of the reference numerals of the related elements of the semiconductor device 20. In the example shown in the reference diagram, similar to the configuration shown in FIG. 10, the particle size control of the solder 104r is not performed. For other configurations, they are the same as those of the semiconductor device 20 of the present embodiment.

[0086] The 1st in FIG. 11 shows the initial stage before energization. An alloy layer 110r is interposed between the Ni layer 801r and the solder 104r. Also, a P-rich layer 802r is formed on the surface of the Ni layer 801r.

[0087] The 2nd, 3rd, and 4th in FIG. 11 show the application of the output current. The dashed arrows indicate the direction in which electrons (e-) flow. As shown in the 2nd of FIG. 11, as the electrons move, Cu and the like in the alloy layer 110r move (diffuse) toward the joint portion 81r side. Specifically, metals such as Cu are ionized and move toward the joint portion 81r side. As a result, the alloy layer 110r gradually becomes thinner and disappears as shown in the 3rd of FIG. 11.

[0088] When the alloy layer 110r disappears, as shown in the 3rd of FIG. 11, as the electrons move, Ni in the Ni layer 801r moves (diffuses) toward the joint portion 81r side, the Ni layer 801r decreases, and the P-rich layer 802r increases. Then, as shown in the 4th of FIG. 11, the Ni layer 801r disappears and the P-rich layer 802r reaches the base material 800r. That is, the P-rich layer 802r replaces the Ni layer 801r.

[0089] After the P-rich layer 802r reaches the base material 800r and further elapses, the adhesion decreases, for example, voids are generated. Also, starting from the voids, cracks along the interface are generated. Also, cracks can occur in the P-rich layer 802r.

[0090] As described above, in the configuration where the solder particle size is not controlled (see Fig. 10), the particle size of the solder 104r is large. There are few grain boundaries in the movement path of Cu. Therefore, the Cu in the alloy layer 110r easily moves as the electrons move.

[0091] Although an example of the output current has been shown, the same applies to the case of the reflux current. When the reflux current is applied, first, the alloy layer 111r on the joint part 81r side disappears, and then the P-rich layer 812r is replaced with the Ni layer 811r. After the P-rich layer 812r reaches the base material 810r, if more time elapses, the adhesion decreases, and for example, voids or cracks occur. Since the particle size of the solder 104r is large, the Cu in the alloy layer 111r easily moves as the electrons move.

[0092] On the other hand, in the configuration of the present embodiment (see Fig. 8), the particle size of the solder 104 at the joint parts of the joints 80 and 81 where the current density is high is smaller than the particle sizes of the solders 103H and 103L for which the solder particle size is not controlled. Therefore, the Cu in the alloy layers 110 and 111 hardly moves as the electrons move. That is, the alloy layers 110 and 111 hardly disappear. The time required until the alloy layers 110 and 111 disappear becomes longer. As a result, the time when the Ni layers 801 and 811 start to decrease and become the P-rich layers 802 and 812 is delayed. The time required until the Ni layers 801 and 811 disappear becomes longer.

[0093] <Summary of the First Embodiment> In a plan view, the area of the collector electrode 43, which is the main electrode on the high potential side, is larger than the area of the emitter electrode 42, which is the main electrode on the low potential side. Also, for miniaturization of the semiconductor device 20, it is difficult to increase the area of the solder joints of the joint parts 80 and 81 and the solder joint of the joint part 82. As a result, in the semiconductor device 20 constituting the upper and lower arm circuits 9 for one phase, the current densities of the solders 101H, 101L, 102H, 102L, 104, and 105 are higher than the current densities of the solders 103H and 103L. That is, among the plurality of solders 100, EM is likely to progress at the joints of the solders 101H, 101L, 102H, 102L, 104, and 105. Among the plurality of solders 100, EM is less likely to progress at the joints of the solders 103H and 103L.

[0094] As an example in this embodiment, the particle size of the solder 104 (intermediate relay solder, first intermediate relay solder) is smaller than the particle sizes of the solders 103H and 103L (first lower solder and second lower solder). The solder 104 has more grain boundaries 106 between the connection targets. The grain boundaries 106 inhibit the movement of Cu. Therefore, it is difficult for the Cu in the alloy layers 110 and 111 to move along with the movement of electrons. Thus, the time taken until the alloy layers 110 and 111 disappear can be lengthened. Also, the time taken until the Ni layers 801 and 811 disappear can be lengthened. From the above, the EM life can be improved.

[0095] The current density of the semiconductor device 20, that is, the current density of the current conduction path connected to the main electrode, is maximum, for example, at the solder joints of the joint parts 80 and 81. In this embodiment, since the particle size of the solder 104 is reduced, the EM life can be improved.

[0096] Note that the effect of the particle size of the solder 104 has been confirmed by trial production. It has been confirmed that by reducing the particle size of the solder 104, the disappearance of the alloy layers 110 and 111 is delayed, that is, the progress of EM can be slowed down. At this time, the Ni layers 801 and 811 were formed by electroless NiP plating. The composition of the alloy layers 110 and 111 was (Ni - Cu)3Sn4.

[0097] In this embodiment, the joint portion 80 has a plurality of wire pieces 120 on the solder joint surface. The solder 104 solidifies starting from the wire pieces 120. The wire pieces 120 are the starting portions of solidification. By providing the wire pieces 120, the particle size of the solder 104 can be reduced and the EM life can be improved.

[0098] <Modification example> Although an example of providing the wire pieces 120 on the joint portion 80 has been shown, the present invention is not limited thereto. The wire pieces 120 may be provided on the solder joint surface of the joint portion 81. Also by this, the solder 104 solidifies starting from the wire pieces 120 and becomes granulated. The wire pieces 120 may be provided on each of the joint portions 80 and 81. That is, it may be provided on at least one of the connection targets.

[0099] Although an example of the solder 104 has been shown as fine-grained solder with a small particle size, the present invention is not limited thereto. As the fine-grained solder, at least one of the solders other than the solders 103H and 103L among the plurality of solders 100 can be adopted.

[0100] For example, the solder 105 may be fine-grained solder. By providing a plurality of wire pieces 120 on the solder joint surface of the joint portion 82 and / or the connection portion 920 of the main terminal 92, the particle size of the solder 105 can be made smaller than the particle sizes of the solders 103H and 103L. Thereby, the progress of EM at the joint portion of the solder 105 can be suppressed.

[0101] For example, the solders 101H and 101L may be fine-grained solder. By providing a plurality of wire pieces 120 on the solder joint surface of the emitter electrode 42 and / or the conductive spacer 70, the particle sizes of the solders 101H and 101L can be made smaller than the particle sizes of the solders 103H and 103L. Thereby, the progress of EM at the joint portions of the solders 101H and 101L can be suppressed. This is effective in miniaturizing the semiconductor element 40.

[0102] For example, even if the solders 102H and 102L are fine-pitch solders, the particle sizes of the solders 102H and 102L can be made smaller than those of the solders 103H and 103L by providing a plurality of wire pieces 120 on the solder joint surfaces of the conductive spacer 70 and / or the heat sink 50. Thereby, the progress of EM at the joints of the solders 102H and 102L can be suppressed. Similar to the miniaturization of the solders 101H and 101L, it is effective in the miniaturization of the semiconductor element 40.

[0103] The arrangement of the plurality of wire pieces 120 is not particularly limited. For example, as shown in FIG. 12, the plurality of wire pieces 120 may be provided at a portion overlapping near the center of the semiconductor element 40 on the solder joint surface of the conductive spacer 70. EM progresses more as the temperature is higher and the current density is higher. By providing the wire pieces 120 at a portion overlapping near the center of the element in plan view, miniaturization can be surely achieved at the portion where the temperature becomes high. Therefore, the progress of EM can be suppressed. Further, the plurality of wire pieces 120 may be provided at a portion overlapping the four corners of the emitter electrode 42 on the solder joint surface of the conductive spacer 70. The four corners have a low temperature and the solder is likely to solidify. Thereby, miniaturization can be promoted.

[0104] The arrangement of the wire pieces 120 shown in FIG. 12 is not limited to the conductive spacer 70. In the emitter electrode 42, it may be provided near the center of the element or at the four corners. In the heat sink 50, it may be provided at a portion overlapping near the center of the element or at a portion overlapping the four corners.

[0105] Although an example in which the semiconductor device 20 includes the conductive spacer 70 has been shown, it is not limited thereto. Instead of the conductive spacer 70, a convex portion providing a spacer function may be provided on the heat sink 50. In this case, the heat sink 50 corresponds to the upper conductor. The upper solder is interposed between the emitter electrode 42 and the heat sink 50 and joins the emitter electrode 42 and the heat sink 50. In order to miniaturize the upper solder, a plurality of wire pieces 120 may be provided on the solder joint surfaces of the emitter electrode 42 and / or the heat sink 50.

[0106] Although an example in which the semiconductor device 20 includes the joint portion 82 has been shown, the present invention is not limited to this. The heat sink 50L, the joint portion 82, and the main terminal 92 may be continuously and integrally provided. That is, the semiconductor device 20 may be configured not to include the solder 105.

[0107] Although an example in which the semiconductor device 20 includes two joint portions 80 and 81 for connecting the upper arm 9H and the lower arm 9L has been shown, the present invention is not limited to this. Only one of the joint portions 80 and 81 may be provided. For example, only the joint portion 80 may be provided, and the joint portion 80 may be connected to the heat sink 50H via the solder 104. Alternatively, only the joint portion 81 may be provided, and the joint portion 81 may be connected to the heat sink 60L via the solder 104.

[0108] (Second Embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be incorporated. In the preceding embodiment, a plurality of wire pieces were provided as the starting points of solidification. Instead of this, an uneven oxide film formed by laser irradiation may be provided.

[0109] <Uneven Oxide Film> FIG. 13 is a cross-sectional view showing the uneven oxide film 803 provided on the surface of the joint portion 80 in the semiconductor device 20 according to this embodiment. FIG. 13 corresponds to FIG. 9. In FIG. 13, for convenience, the P-rich layer 802 and the alloy layer 110 are omitted.

[0110] As described above, the joint portion 80 has the base material 800 and the Ni layer 801 provided on the surface of the base material 800. As shown in FIG. 13, the joint portion 80 further has the uneven oxide film 803 provided on the Ni layer 801. The uneven oxide film 803 is formed in a plurality of locations on the solder joint surface of the joint portion 80 by irradiating the Ni layer 801 with laser light.

[0111] The uneven oxide film 803 is a film of an oxide mainly composed of Ni. For example, among the components constituting the uneven oxide film 803, 80% is NI2O3, 10% is NiO, and 10% is Ni.

[0112] The concave portion 801a on the surface of the Ni layer 801 is formed by irradiating the pulsed laser beam. One concave portion 801a is formed for each pulse. The concavo-convex oxide film 803 is formed by the surface layer portion of the Ni layer 801 melting, vaporizing, and depositing due to the irradiation of the laser beam. The concavo-convex oxide film 803 is an oxide film derived from the Ni layer 801. The concavo-convex oxide film 803 is a film of an oxide of the metal (Ni) that is the main component of the Ni layer 801. The concavo-convex oxide film 803 is formed following the unevenness on the surface of the Ni layer 801 having the concave portion 801a. On the surface of the concavo-convex oxide film 803, unevenness is formed at a pitch finer than the width of the concave portion 801a. That is, very fine unevenness (roughened portions) is formed.

[0113] The pulsed laser beam has an energy density greater than 0 J / cm 2 and less than 100 J / cm 2 Hereinafter, the pulse width is adjusted to be 1 μs or less. To satisfy this condition, a YAG laser, a YVO4 laser, a fiber laser, etc. can be adopted. For example, in the case of a YAG laser, the energy density may be 1 J / cm 2 or more. In the case of electroless Ni plating, for example, even at about 5 J / cm 2 the Ni layer 801 can be processed.

[0114] <Void> The oxide film (concavo-convex oxide film 803) has lower wettability with respect to solder than the metal film. Since the concavo-convex oxide film 803 has fine unevenness on its surface, the contact area with the solder becomes small, and a part of the solder becomes spherical due to the surface tension. That is, the contact angle becomes large, and the wettability with respect to the solder is low.

[0115] As described above, the concavo-convex oxide film 803 has low wettability with respect to the solder 104. Therefore, as shown in FIG. 13, voids 121 are formed so as to cover the concavo-convex oxide film 803. The voids 121 are formed around the concavo-convex oxide film 803. In the semiconductor device 20, a plurality of voids 121 exist in the vicinity of the solder joint surface of the joint portion 80. Regarding other configurations, they are the same as those described in the previous embodiment.

[0116] <Summary of the Second Embodiment> According to the configuration described in this embodiment, the same effects as those of the configuration described in the previous embodiment can be achieved. Specifically, a plurality of voids 121 derived from the concavo-convex oxide film 803 exist in the solder 104. When the solder 104 solidifies, grain growth starts from the voids 121. The voids 121 are the starting portions of solidification. By providing the concavo-convex oxide film 803 and thus the voids 121, the particle size of the solder 104 can be made smaller than the particle sizes of the solders 103H and 103L, and the EM life can be improved.

[0117] <Modification Example> Although an example in which the concavo-convex oxide film 803 is provided on the joint portion 80 has been shown, the present invention is not limited to this. Among the conductors to be connected, it can be provided on other conductors excluding the heat sink 60. For example, a concavo-convex oxide film may be provided on the solder joint surface of the joint portion 81. Concavo-convex oxide films may be provided on each of the joint portions 80 and 81. A concavo-convex oxide film may be provided on the solder joint surface of the heat sink 50. A concavo-convex oxide film may be provided on the solder joint surface of the conductive spacer 70.

[0118] The arrangement of the concavo-convex oxide film is not particularly limited. They may be dispersedly arranged at a predetermined pitch. As shown in FIG. 12, in the heat sink 50 and the conductive spacer 70, they may be provided at a portion overlapping near the center of the element, or may be provided at a portion overlapping the four corners.

[0119] (Third Embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In the preceding embodiment, the solder particle size was reduced by providing wire pieces or concavo-convex oxide films. Instead of this, irregularities may be provided at the inner peripheral end of the groove for accommodating the overflowed solder.

[0120] FIG. 14 is a plan view showing a heat sink 50H including a joint portion 81 in the semiconductor device 20 according to this embodiment. FIG. 14 is a plan view seen from the side of the opposing surface 50a. FIG. 15 is an enlarged view of a region XV indicated by a one-dot chain line in FIG. 14. FIG. 15 shows the solder 104 disposed on the joint portion 81. In FIG. 15, only a part of the grain boundary 106 is shown.

[0121] Similar to the preceding embodiment, the joint portion 81 is continuously and integrally provided with respect to the heat sink 50H. As shown in FIG. 14, the heat sink 50H has a groove 51. Further, the joint portion 81 has a groove 83. As shown in FIG. 15, in a plan view, the inner peripheral end 830 of the groove 83 has a continuous concavo-convex shape. The joint portion 81 has a concavo-convex portion 831 at the inner peripheral end 830 of the groove 83. As an example, the concavo-convex portion 831 is provided over the entire length of the groove 83.

[0122] The solder 104 grows grains during solidification starting from the concave portion and / or convex portion of the concavo-convex portion 831 provided at the inner peripheral end 830 of the groove 83. Since it grows starting from such irregularities, the crystal grains in the solder 104 become small. For other configurations, they are the same as those described in the preceding embodiment.

[0123] <Summary of the Third Embodiment> According to the configuration described in this embodiment, the same effects as those of the configuration described in the previous embodiment can be achieved. Specifically, the inner peripheral end 830 of the groove 83 that houses the overflowed solder 104 has a continuous concavo-convex shape. When the solder 104 solidifies, it grows in grains starting from the concavo-convex portions of the inner peripheral end 830. The concavo-convex portion 831 is the starting portion of solidification. By making the inner peripheral end 830 of the groove 83 concavo-convex, the particle size of the solder 104 can be made smaller than the particle sizes of the solders 103H and 103L, and the EM life can be improved.

[0124] Although an example in which the concavo-convex portion 831 is provided over the entire length of the groove 83 has been shown, the present invention is not limited to this. The concavo-convex portion 831 may be provided at least in part of the entire length of the groove 83. By making at least a part of the inner peripheral end 830 of the groove 83 concavo-convex, the particle size of the solder 104 can be made smaller than the particle sizes of the solders 103H and 103L.

[0125] Note that when the heat sink 50H including the joint portion 81 and the heat sink 50L including the joint portion 82 are common members, the joint portion 82 also has the concavo-convex portion 831 at the inner peripheral end 830 of the groove 83. In this case, the solder 105 can also be made finer.

[0126] <Modification Example> Although an example in which the concavo-convex portion 831 is provided in the groove 83 has been shown, the present invention is not limited to this. The concavo-convex portion may be provided at the inner peripheral end of the groove 51 of the heat sink 50. It may be provided at the inner peripheral end of the groove 51 of the heat sink 50H, or may be provided at the inner peripheral end of the groove 51 of the heat sink 50L. Concavo-convex portions may be provided in each of the groove 51 and the groove 83.

[0127] (Fourth Embodiment) This embodiment is a modification example based on the previous embodiment, and the description of the previous embodiment can be incorporated by reference. In the previous embodiment, the particle size of the solder was reduced by devising the connection target of the solder. Instead of this, the particle size of the solder may be reduced by devising the solder.

[0128] FIG. 16 is a cross-sectional view showing the bonding structure of the joint portions 80 and 81 in the semiconductor device 20 according to the present embodiment. FIG. 16 corresponds to FIG. 8.

[0129] As shown in FIG. 16, conductive balls 122 are added to the solder 104. The balls 122 are mainly composed of Ni or Cu. Such balls 122 are sometimes referred to as Ni balls or Cu balls. By appropriately setting the diameter of the balls 122, for example, it is possible to ensure the minimum thickness of the solder 104.

[0130] Due to the presence of the balls 122, the solder 104 grows grains starting from the balls 122 during solidification. Since the growth starts from the balls 122, the crystal grains of the solder 104 are smaller than those in a configuration where the balls 122 are not added. For other configurations, they are the same as those described in the previous embodiment.

[0131] <Summary of the Fourth Embodiment> According to the configuration described in the present embodiment, the same effects as those of the configuration described in the previous embodiment can be achieved. Specifically, balls 122 are added to the solder 104. When the solder 104 solidifies, it grows grains starting from the balls 122. The balls 122 are the starting portions of solidification. By providing the balls 122, the particle size of the solder 104 can be made smaller than the particle sizes of the solders 103H and 103L, and the EM lifetime can be improved.

[0132] Note that the effects of the balls 122 have also been confirmed by trial production. It has been confirmed that by adding the balls 122, the particle size of the solder 104 becomes smaller. It has also been confirmed that the disappearance of the alloy layers 110 and 111 is delayed, that is, the progress of EM can be slowed down. At this time, the Ni layers 801 and 811 were formed by electroless NiP plating. The composition of the alloy layers 110 and 111 was (Ni-Cu)3Sn4.

[0133] <Modification Example> The solder 104 may have a multilayer structure, and the occupancy rate of the balls 122 per unit volume may vary depending on the layer. In the example shown in FIG. 17, the solder 104 has a first layer 104a and a second layer 104b. The first layer 104a is the layer on the side of the joint portion 80, and the second layer 104b is the layer on the side of the joint portion 81. FIG. 17 corresponds to FIG. 16. In FIG. 17, for the sake of convenience, the grain boundary 106 is omitted.

[0134] In the example shown in FIG. 17, the occupancy rate of the balls 122 in the first layer 104a is higher than the occupancy rate of the balls 122 in the second layer 104b. The first layer 104a has a larger amount of balls 122 than the second layer 104b. With such a configuration, the particle size of the second layer 104b can be reduced while further reducing the particle size of the first layer 104a. Therefore, in a configuration where EM easily progresses due to the output current, the EM life can be improved.

[0135] Note that by making the diameters of the balls 122 different between the first layer 104a and the second layer 104b, the occupancy rate of the balls 122 in the first layer 104a may be made higher than the occupancy rate of the balls 122 in the second layer 104b. Both the amount and the diameter of the balls may be made different.

[0136] The occupancy rate of the balls 122 in the second layer 104b may be made higher than the occupancy rate of the balls 122 in the first layer 104a. With such a configuration, the particle size of the first layer 104a can be reduced while further reducing the particle size of the second layer 104b. Therefore, in a configuration where EM easily progresses due to the reflux current, the EM life can be improved.

[0137] The two-layer structure of the solder 104 can be realized, for example, by arranging two layers of solder foils with different ball contents. Instead of this, three layers of solder foils without balls may be laminated, and the amount and / or diameter of the balls 122 arranged between the solder foils may be made different. The number of layers of the solder 104 is not limited to two layers. Three or more layers may be used.

[0138] Although an example where the ball 122 is arranged on the solder 104 has been shown, the present invention is not limited thereto. The ball 122 can be arranged on at least one of the other solders excluding the solders 103H and 103L among the plurality of solders 100.

[0139] (Other embodiments) The disclosure in this specification, drawings, etc. is not limited to the illustrated embodiments. The disclosure includes the illustrated embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of components and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes those in which components and / or elements of the embodiments are omitted. The disclosure includes the replacement or combination of components and / or elements between one embodiment and another embodiment. The technical scope disclosed is not limited to the description of the embodiments. Some of the technical scopes disclosed should be understood to be indicated by the description of the claims and to include all changes within the meaning and scope equivalent to the description of the claims.

[0140] The disclosure in the specification, drawings, etc. is not limited by the description of the claims. The disclosure in the specification, drawings, etc. includes the technical idea described in the claims and extends to more diverse and extensive technical ideas than the technical idea described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification, drawings, etc. without being restricted by the description of the claims.

[0141] When an element or layer is referred to as being "on," "connected to," "attached to," or "coupled to" another element or layer, it may be directly on, connected to, attached to, or coupled to the other element or layer, and there may also be intervening elements or intervening layers. In contrast, when an element is referred to as being "directly on," "directly connected to," "directly attached to," or "directly coupled to" another element or layer, there are no intervening elements or intervening layers. Other words used to describe the relationship between elements should be interpreted in a similar manner (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0142] Spatially relative terms such as "inside," "outside," "beneath," "below," "lower," "above," "upper," etc. are used herein to facilitate description of the relationship of one element or feature to another element or feature as illustrated. Spatially relative terms can be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the drawings. For example, if the device in the figures is turned over, an element described as "beneath" or "under" another element or feature would then be oriented "above" the other element or feature. Thus, the term "beneath" can encompass both an orientation of above and below. The device may be oriented in other directions (rotated 90 degrees or other orientations), and the spatially relative descriptors used in this specification are to be interpreted accordingly.

[0143] The drive system 1 of the vehicle is not limited to the above-described configuration. For example, although an example in which one motor generator 3 is provided has been shown, it is not limited thereto. A plurality of motor generators may be provided. Although an example in which the power conversion device 4 includes the inverter 6 as the power conversion unit has been shown, it is not limited thereto. For example, a configuration including a plurality of inverters may be used. A configuration including at least one inverter and a converter may be used. Only a converter may be provided.

[0144] The switching element is not limited to the IGBT 11. For example, a MOSFET may be adopted. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the case of an n-channel type MOSFET, the source electrode corresponds to the upper electrode and the drain electrode corresponds to the lower electrode. In the case of a MOSFET, a parasitic diode (body diode) may be used as the reflux diode, or an external diode may be used.

[0145] Although an example in which the semiconductor device 20 includes only one semiconductor element 40 constituting each arm has been shown, it is not limited thereto. The semiconductor device 20 may include a plurality of semiconductor elements 40 constituting each arm. That is, a plurality of semiconductor elements 40H may be connected in parallel to each other to form one arm 9H, and a plurality of semiconductor elements 40L may be connected in parallel to each other to form one arm 9L.

[0146] Although an example in which the back surfaces 50b and 60b of the heat sinks 50 and 60 are exposed from the sealing body 30 has been shown, it is not limited thereto. At least one of the back surfaces 50b and 60b may be covered by the sealing body 30. At least one of the back surfaces 50b and 60b may be covered by an insulating member (not shown) different from the sealing body 30. The semiconductor device 20 may be configured not to include the sealing body 30.

[0147] Although an example in which the semiconductor device 20 includes the sealing body 30 has been shown, it is not limited thereto. A configuration excluding the sealing body 30 may be used.

[0148] (Disclosure of Technical Ideas) This specification discloses a plurality of technical ideas described in a plurality of clauses listed below. Some clauses may be described in a multiple dependent form that alternatively quotes preceding clauses in subsequent clauses. Furthermore, some clauses may be described in a multiple dependent form that quotes other multiple dependent form clauses. The clauses described in these multiple dependent forms define a plurality of technical ideas.

[0149] <Technical Idea 1> A plurality of semiconductor elements (40) having a pad for signals and an upper electrode which is a main electrode on the upper surface, a main electrode on the lower surface which is the surface opposite to the upper surface in the plate thickness direction, and a lower electrode having an area larger than that of the upper electrode when viewed in a plan view from the plate thickness direction; A plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder; The plurality of semiconductor elements include a first semiconductor element (40H) constituting the upper arm (9H) of the upper and lower arm circuit (9), and a second semiconductor element (40L) constituting the lower arm (9L) of the upper and lower arm circuit and arranged side by side with the first semiconductor element in a direction orthogonal to the plate thickness direction such that the upper surface is on the same side in the plate thickness direction; The plurality of conductors include a first upper conductor (50H, 70H) connected to the upper electrode of the first semiconductor element via a first upper solder (101H, 102H), a first lower conductor (60H) connected to the lower electrode of the first semiconductor element via a first lower solder (103H), a second upper conductor (50L, 70L) connected to the upper electrode of the second semiconductor element via a second upper solder (101L, 102L), a second lower conductor (60L) connected to the lower electrode of the second semiconductor element via a second lower solder (103L), and a joint conductor (80, 81) connecting the first upper conductor and the second lower conductor via an intermediate solder (104). Each solder contains Cu and Sn, Each connection target of each solder has an Ni layer (801, 811), A semiconductor device in which at least one of the first upper solder, the second upper solder, and the relay solder has a smaller particle size than the first lower solder and the second lower solder.

[0150] <Technical Idea 2> The first upper conductor has a first main body portion (50H) and a first spacer portion (70H) interposed between the upper electrode of the first semiconductor element and the first main body portion. The second upper conductor has a second main body portion (50L) and a second spacer portion (70L) interposed between the upper electrode of the second semiconductor element and the second main body portion. The first upper solder is interposed between the upper electrode of the first semiconductor element and the first spacer portion, and between the first spacer portion and the first main body portion, respectively. The semiconductor device according to Technical Idea 1, wherein the second upper solder is interposed between the upper electrode of the second semiconductor element and the second spacer portion, and between the second spacer portion and the second main body portion, respectively.

[0151] <Technical Idea 3> The joint conductor is a first joint conductor that connects the first upper conductor and the second lower conductor via a first relay solder that is the relay solder. The plurality of conductors includes a main terminal (92) and a second joint conductor (82) that connects the second upper conductor and the main terminal via a second relay solder (105). The semiconductor device according to Technical Idea 1 or Technical Idea 2, wherein the second relay solder has a smaller particle size than the first lower solder and the second lower solder.

[0152] <Technical Idea 4> Inside the small-particle solder, which is solder smaller than the particle sizes of the first lower solder and the second lower solder, or on the surface of the connection target of the small-particle solder, there is a starting point of solidification for reducing the particle size. The semiconductor device according to any one of Technical Ideas 1 to 3.

[0153] <Technical Idea 5> The starting point is a plurality of wire pieces (120) arranged inside the small-particle solder and fixed to the surface of the connection target of the small-particle solder. The semiconductor device according to Technical Idea 4.

[0154] <Technical Idea 6> The conductor, which is the connection target of the small-particle solder, has, on the Ni layer, a concavo-convex oxide film (803) mainly composed of Ni and having a continuously uneven surface. The starting point is a void (121) covering the concavo-convex oxide film. The semiconductor device according to Technical Idea 4.

[0155] <Technical Idea 7> The conductor, which is the connection target of the small-particle solder, has a groove (83) for accommodating the overflowed solder. The inner peripheral end of the groove has a continuous concavo-convex shape. The starting point is the concave part and / or convex part of the inner peripheral end of the groove. The semiconductor device according to Technical Idea 4.

[0156] <Technical Idea 8> A conductive ball (122) is added to the small-particle solder. The starting point is the ball. The semiconductor device according to Technical Idea 4.

[0157] <Technical Idea 9> The ball contains Ni or Cu. The semiconductor device according to Technical Idea 8.

Explanation of Reference Numerals

[0158] 1... drive system, 2... DC power supply, 3... motor generator, 3a... winding, 4... power conversion device, 5... smoothing capacitor, 6... inverter, 7... P line, 8... N line, 9... upper and lower arm circuits, 9H... upper arm, 9L... lower arm, 10... output line, 11... IGBT, 12... diode, 20... semiconductor device, 30... encapsulant, 30a... one side, 30b... back side, 30c, 30d, 30e, 30f... side surfaces, 40, 40H, 40L... semiconductor elements, 41... semiconductor substrate, 42... emitter electrode, 43... collector electrode, 44... pad, 50, 50H, 50L... heat sink, 50a... opposing surface, 50b... back side, 51... groove, 60, 60H, 60L... heat sink, 60a... opposing surface, 60b... back side, 70, 70H, 70L... conductive spacer, 80, 81, 82... joint parts, 800, 810... base materials, 801, 811... Ni layers, 801a... recess, 802, 812... P-rich layers, 803... concavo-convex oxide film, 83... groove, 830... inner peripheral end, 831... concavo-convex part, 90... external connection terminal, 91, 92, 93... main terminals, 920... connection part, 94... signal terminal, 95... suspension lead, 97... bonding wire, 100, 101H, 101L, 102H, 102L, 103H, 103L, 104, 105... solder, 104a... first layer, 104b... second layer, 106... grain boundary, 110, 111... alloy layer, 120... wire piece, 121... void, 122... ball< / em>

Claims

1. It has pads for signals and upper electrodes which are main electrodes on the upper surface, and main electrodes on the lower surface which is the surface opposite to the upper surface in the plate thickness direction, and has a plurality of semiconductor elements (40) having lower electrodes with an area larger than that of the upper electrodes when viewed in a plan view from the plate thickness direction, and a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrodes via solder, The plurality of semiconductor elements include a first semiconductor element (40H) constituting the upper arm (9H) of the upper and lower arm circuit (9), and a second semiconductor element (40L) constituting the lower arm (9L) of the upper and lower arm circuit and arranged side by side with the first semiconductor element in one direction orthogonal to the plate thickness direction so that the upper surface is on the same side in the plate thickness direction, The plurality of conductors include a first upper conductor (50H, 70H) connected to the upper electrode of the first semiconductor element via a first upper solder (101H, 102H), a first lower conductor (60H) connected to the lower electrode of the first semiconductor element via a first lower solder (103H), a second upper conductor (50L, 70L) connected to the upper electrode of the second semiconductor element via a second upper solder (101L, 102L), a second lower conductor (60L) connected to the lower electrode of the second semiconductor element via a second lower solder (103L), and a joint conductor (80, 81) connecting the first upper conductor and the second lower conductor via an intermediate solder (104), Each solder contains Cu and Sn, Each connection target of each solder has a Ni layer (801, 811), The particle size of at least one of the first upper solder, the second upper solder, and the intermediate solder is smaller than the particle size of the first lower solder and the second lower solder, A semiconductor device having a solidification starting point portion for reducing the particle size inside the small particle solder which is the solder having a particle size smaller than the particle sizes of the first lower solder and the second lower solder, or on the surface of the connection target of the small particle solder.

2. The first upper conductor has a first main body portion (50H) and a first spacer portion (70H) interposed between the upper electrode of the first semiconductor element and the first main body portion. The second upper conductor has a second main body portion (50L) and a second spacer portion (70L) interposed between the upper electrode of the second semiconductor element and the second main body portion. The first upper solder is interposed between the upper electrode of the first semiconductor element and the first spacer portion, and between the first spacer portion and the first main body portion, respectively. The second upper solder is interposed between the upper electrode of the second semiconductor element and the second spacer portion, and between the second spacer portion and the second main body portion, respectively. The semiconductor device according to claim 1.

3. The joint conductor is a first joint conductor that connects the first upper conductor and the second lower conductor via a first relay solder that is the relay solder. The plurality of conductors includes a main terminal (92) and a second joint conductor (82) that connects the second upper conductor and the main terminal via a second relay solder (105). The semiconductor device according to claim 1, wherein the particle size of the second relay solder is smaller than the particle sizes of the first lower solder and the second lower solder.

4. The starting portion is a plurality of wire pieces (120) disposed within the small-particle solder and fixed to the surface of the connection target of the small-particle solder. The semiconductor device according to any one of claims 1 to 3.

5. The conductor that is the connection target of the small-particle solder has, on the Ni layer, a concavo-convex oxide film (803) having Ni as a main component and a continuously uneven surface. The starting portion is a void (121) that covers the concavo-convex oxide film. The semiconductor device according to any one of claims 1 to 3.

6. The conductor that is the connection target of the small-particle solder has a groove (83) for accommodating the overflowed solder. The inner peripheral end of the groove has a continuous concavo-convex shape. The semiconductor device according to any one of claims 1 to 3, wherein the starting point portion is a concave portion and / or a convex portion on the inner peripheral end of the groove.

7. Conductive balls (122) are added to the small-grain solder. The semiconductor device according to any one of claims 1 to 3, wherein the starting point portion is the ball.

8. The semiconductor device according to claim 7, wherein the ball contains Ni or Cu.

Citation Information

Patent Citations

  • Inverter unit and manufacturing method thereof

    JP2004087609A

  • Method for manufacturing electronic apparatus

    JP2014082526A

  • Semiconductor device and manufacturing method of the same

    JP2016092166A

  • Manufacturing method of semiconductor device and semiconductor device

    JP2021145081A

  • Semiconductor device

    JP2022126905A